GE Transistor Manual Circa 1960 1 PDF

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(IN :ANADA. CANADIAN GEN[JtA[i ELECTRIC COMPANY, LTD., TORONTO ONTARIO • OUTSIDE THE U.S.A AND CANI..DA. av
ELECTRONICS PARK • SYRACUSE \1. N. Y. • INTJ RNJ.TIONAL GENERAL ELtcT"1,11c COMPANY. INC , ELECTRONICS DIVISION, 150 EAST 42.NO ST , N[WYORK, N. Y , U.S.A.
GENERAL ELECTRIC
I TRANSISTOR
I MANUAL
I
I
fifth edition
I CONTRIBUTORS:
H. R. Lowry, Manager
J. Giorgis
I E. Gottlieb
F. W. Gutzwiller
I D. V. Jones
G. E. Snyder
R. A. Stasior
II T. P. Sylvan
A PPLICATION ENGINEERING
,I
EDITED BY :
I Semiconductor Products Department
~
'lt
Advertising and Sales Promotion
General Electric Company
Charles Building
Liverpool, New York
I
I
The circuit diagrams included in this manual are included for
illustration of typical transistor applications and are not intended
as constructional information. For this reason, wattage ratings of
I
resistors and voltage ratings of capacitors are not necessarily given.
Similarly, shielding techniques and alignment methods which may
be necessary in some circuit layouts are not indicated. Although
reasonable care has been taken in their preparation to insur e their
I
technical correctness, no responsibility is assumed by the General
Electric Company for any consequences of their use.
The semiconductor devices and arrangements disclosed herein
I
may be covered by patents of General Electric Company or others.
Neither the disclosure of any information herein nor the sale of
semiconductor d evices by General Electric Company conveys any
license under patent claims covering combinations of semiconductor
I
devices with other devices or elements. In the absence of an express
written agreement to the contrary General Electric Company as-
sumes no liability for patent infringement arising out of any use
of the semiconductor devices with other devices or elements by any
purchaser of semiconductor devices or others.
I
I
I
Copyright 1960
by the
I
General Electric Company
I
I
I
www.SteamPoweredRadio.Com I
I
I contents
I 1. BASIC SEMICONDUCTOR THEORY ..............
Page
5
I 2. TRANSISTOR CONSTRUCTION TECHNIQUES . .

Metal Pre paration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Junction F ormation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
12
12
13
Lead Attachme nt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
I Encaps ulatio n . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Reliability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
20
21
I 3 .
4 .
SMALL SIGNAL CHARACTERISTICS . . . . . . . . . . . . .
LARGE SIGNAL CHARACTERISTICS .............

Parame ters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
25
32
32
I Basic Equatio ns . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Collecto r L eak age Curre nt (I rEo) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Collecto r Le akage Curre nt (I cER) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Collector a nd Emitter L eakage Current -
33
33
33
I Collector and Emitter Junctions Re ve rse Biased . . . . . . . . . . . . . . .

Collector L eakage Current (lcEa) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Collector Leakage Current - Silicon Diode in Se ries with Emitter . . .
Collector to Emitter Voltage - Collector Open Circuited . . . . . . . . . . .
34
34
34
35
I Base Input Charac teristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Volta ge Co mparator Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
35
35
5. BIASING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
I 6.
Thermal Runaw ay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
AUDIO AMPLIFIERS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
40
43
Single Sta ge Audio Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
I Two Stage R-C C oupled Amplifie r . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Class B Push-Pull Output Stages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Class A Output Sta ges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
43
44
45
Class A Driver Stages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
I D esign Charts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Amplifie r Circuit Dia grams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
46
54
7 . .. HI-Fl " CIRCUITS .. ................................

I Preamplifiers . . . . . . . . . . . .
Power Amplifiers . . . . . . . . . .
Stereophonic System . . . . . . .
.................................
.................................
.................................
58
58
63
65
I 8. RADIO RECEIVER CIRCUITS . . . . . . . .

Autodyne Conve rte r Circuits . . . . . . . . . . . . . . . . . . . .
IF Amplifiers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
..
..
..
..
..
..
..
..
..
.....
.....
.....
..
..
..
67
67
68
I Autom atic Volume Control Circ uits . . . . . . . . . . . . . . .

D etecto r Sta ge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Re flex Circu its . . . . . . . . . . . . . . . . . . . . . . . .
Complete Ra dio Receiver Circ uit Diagram s . . . . . . .
..
..
..
..
..
..
..
..
..
..
..
..
.....
.....
.....
.....
..
..
..
..
69
71
72
73
I C o n t inued - f o llowin g page
I www.SteamPoweredRadio.Com
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9. TRANSISTOR RADIO SERVICING
Page
I
TECHNIQUES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
10. SWITCH I NG CHARACTERISTICS . . . . . . .

T emperature Effects on Switching Circuits . . . . . . . . . . . .
.........
.........
. 89
. 91
I
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Saturation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Transient Response Time . . . . . . . . . . . . . . . . . . . . . . . . . .
.........
.........
.........
. 95
. 95
. 100
I
11 . BASIC COMPUTER CIRCUITS .....................
Flip-Flop Design Procedures .................................
Triggering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
106
106
117
I
12.
Special Purpose Circ uits .....................................
LOGIC ................................................. 125

122
I
Binary Arithme tic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136
13. UNIJUNCTION TRANSISTOR CIRCUITS .........

Theory of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
138
138
I
P arameters - D e finition and Measurement . . . . . . . . . . . . . . . . . . . . . .
Relaxation Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Sawtooth Wave Generator ...................................
139
141
142
I
Staircase Wave G ene rator .................................... 143
Time D elay Relay ..........................................
Multivibrator ..............................................
Hybrid Timing Circuits ......................................
143
144
145
I
14. TUNNEL DIODE THEORY AND SWITCHING
CIRCUITS ............................................. 148
I
1S.
Electrical Charact eristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149
Switching Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 1
TUNNEL DIODE AMPLIFIERS .................... 154

I
Biasing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
T emperature Characteristics ..................................
Frequency Limitations ......................................
154
155
155
I
Noise Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Nuclear Radia tion Effects ....................................
Ne gative Co nducta nce Amplifier In The P arallel Connection . . . . . . .
Stability Crite ria . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
155
156
156
157
I
Stable Amplification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Amplifie r D esign Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Tunnel Diode O scillators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Relaxatio n O scillators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
159
159
161
161
I
Sinew ave O scillators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Tunnel Diod e Cryst al Co ntrolled O scillat or . . . . . . . . . . . . . . . . . . . . .
Tunnel Diode FM Tran smitte r . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
162
162
163
I
Tunnel Diode Conve rters .................................... 164
I
I
I 16. FEEDBACK AND SERVO AMPLIFIERS 167
Use of e gative F eedbac k In Transistor Amplifiers .............. . 167
Page
I 17.
Servo Amplifier For Two Phase Servo Motors ................... . 169
TEST CIRCUITS ...................................... 177

Breakdown Voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 177
I DC Current Cain Sa turation Characteristics,
h ►'Eo Vs•:, V c t:ic, ( SAT ) a nd R Rc. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
H P arame te rs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
182
185
I Base Spreading Resistance And Collector Capacity r b' and C ob . . . . . .

Alpha Cut-Off Freque ncy fhrb .................................
Tra nsie nt Response Time t.1, t r, t ,., t , . . . . . . . . . . . . . . . . . . . . . . . . . . .
188
188
190
Simple Transistor T este r . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 193
I 18. SILICON CONTROLLED RECTIFIER ............. 194
I 19. POWER SUPPLIES ................... . ..............

o n-Isolate d Po w er Supplies for Class A Fixed Loads . . . . . . . . . . . . .
Isolate d Power Supplies with Tra nsformer Step-down . . . . . . . . . . . . .
200
200
201
Regulated Power Supplies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 202
I 20. TRANSISTOR SPECIFICATIONS ..................
H ow to Read a Specification Sheet . . . . . . . . . . . . . . . . . . . . . . . . . . .
204
204
I E xplan atio n of P ar am eter Symbols . . . . . . . . . . . . . . . . . . . . . . .•. . . . . .

G-E Transisto r Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
R egistere d JEDEC Transistor Types with
206
208
Inte rch a ngeability Informa tion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 279

I Abbrevia tions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
C-E Outline Drawings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
299
300
I 21. RECTIFIER SPECIFICATIONS .....................

Notes o n R ectifier Specification Sheet . . . . . . . . . . . . . . . . . . . . . . . . .
Condensed Rectifie r Specificatio ns . . . . . . . . . . . . . . . . . . . . . . . . . . . .
306
306
307
Silicon Controlled Rectifiers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 307
I G-E Outline Drawings ( Controlled Rectifiers) . . . . . . . . . . . . . . . . .
Conventional Rectifiers . . . . . . ...............................
G-E Outline Drawings ( Conventional Rectifie rs) . . . . . . . . . . . . . .
313
314
324
I 22. NOTES ON CIRCUIT DIAGRAMS ................. 328
I 23. READING LIST ...................................... 329
I
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I
FOREWORD
I
In the past few years the transistor has become the symbol of the
modem electronics industry. The widespread usage of transistors
is well deserved. It answers the equipment designers desire for a
I
small, light, active and truly reliable electronic component having
low heat dissipation, small power requirements and almost infinite
life. Indeed, the transistor has opened an unlimited array of new
I
application areas beyond those normally considered truly electronic.
With new transistors coming onto the market almost every day,
there is an urgent and continuing need for sound, basic information.
I
With this in mind the first edition Transistor Manual was intro-
duced by General Electric early in 1957 to provide a handy refer-
ence guide on available transistors and the basic principles of
using them.
I
Since. that time, General Electric has distributed more than a half
million copies all over the world and the manual has been trans-
lated into four different languages.
I
Again, w e take pleasure in presenting the newest Transistor Manual,
the fifth edition. This edition has been expanded by over 100 pages
to include all new available transistor material. It is our hope that
I
you find the manual informative an<l of continuing usefulness.
I
H. Brainard Fancher
General Manager
Semiconductor Products Department
I
Syracuse, New York
I
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I
I
I 1. BASIC SEMICONDUCTOR THEORY
In the few years since its introduction, the junction tran sistor h as played a steadily
I increasing part in every bran ch of electronics. First applied in h earing aids and portable
radios, the transistor now sees service in su ch diverse applications as industrial control
syste ms, digital computers, a utomatic telephone exch an ges, and te lemetering tra ns-
I mitters for satellites. The next few years promise an e qually sp ectacular growth since a
"second generation" of semiconductor devices is now b e ing introduced which will com -
ple me nt the junction transistor and extend the capabilities of semiconductor electronics.
The fre quency ran ge of transistors will b e e xtended into the UHF range by such d e-
I vices as the tunnel diode a nd the ..mesa" tra nsistor. The power range will be
e xtended by new d evices such as the Silicon Controlled R ectifier which will m ake
p ossible control circuits cap able of operating to over 50 amperes, 400 volts, and 20
kilowa tts. D evices such as the tunnel d iode and the unijunction transistor w ill make
I possible simpler and more economical timing and switching circ uits. Fig ure 1. 1 lists the
n ames and symbols for most of the sem iconduc tor d evices w hich are com mercially
a vailable at the present time.
I 4 5
82
I
I 81
6 7 8 9 10
I
I
I (1) NPN tran sistor
(2) P P transistor
B
B
= b ase electrod e
= breakdown device in (9) a nd (10)
I (3) P N t e trod e transistor
( 4) Tunnel diode
(5) PN unijunc tion transistor
Bl
B2
E
= b ase-one e lectrod e
= b ase-two e lectrode
= emitte r e lectrod e
I (6)(7) silicon controlled rectifier
( P P tran sistor)
(8) r ectifier or diod e
C
C
= collector electrod e
( symbols 1-3 only)
= cathode electrode
I (9) zener or breakdown diod e
(10) symme trical zener diod e
A
G
( symbols 4, 6-9 only)
= anode e lectrod e
= gat e electrod e
I STANDARD SYMBOLS FOR SEMICONDUCTOR DEVICES
FIGURE 1 . 1
5
BASIC SEMICONDUCTOR THEORY I
A complete understanding of semiconductor physics and the theory of transistor
operation is, of course, not necessary for the construction or design of transistor circuits.
However, both the electronics engineer and the hobbyist can obtain practical benefits
from a general understanding of the basic theory of semiconductors. Such an under-
I
standing will often aid in solving special circuit problems and will prove of great
assistance in the successful application of the newer semiconductor devices which
become available. This chapter is concerned with the terminology and theory of semi-
I
conductors as it pertains t o rectifiers and junction transistors. The theory and charac-
teristics of other types of semiconductor devices such as the silicon controlled rectifier,
the unijunction transistor, and the tunnel diode are discussed in later chapters of
this manual.
I
The basic materials used in the manufacture of transistors are the semiconductors -
materials which lie between the metals and the insulators in their ability to conduct
electricity. The two semiconductors now being used are germanium and silicon. Both
I
of these materials have four electrons in the outer shell of the atom (valence electrons).
Germanium and silicon form crystals in which each atom has four neighboring atoms
with which it shares its valence electrons to form four covalent bonds. Since all the
valence electrons are required to form the covalent bonds there are no electrons free to
I
move in the crystal and the crystal will b e a poor electrical conductor. The conductivity
can be increased by either heating the crystal or by adding other types of materials
(impurities) to the crystal when it is fonned.
I
Heating the crystal will cause vibration of the atoms which form the crystal. Occa-
sionally one of the valence electrons will acquire enough energy (ionization energy) to
break away from its parent atom and move through the crystal. When the parent atom
I
loses an e lectron it will assume a positive charge equal in magnitude to the charge of
the e lectron. Once an atom has lost an electron it can acquire an electron from one of
its neighboring atoms. This neighboring a tom may in turn acquire an electron from one
of its neighbors. Thus it is evident that each free electron which results from the break-
I
ing of a covalent bond will produce an electron deficiency which can move through
the crystal as readily as the free electron itself. It is convenient to consider these elec-
tron deficiencies as particles which have positive charges and which are called holes.
Each time an e lectron is generated by breaking a covalent bond a h ole is generated at
I
the same time. This process is known as the thermal generation of hole-electron pairs.
If a hole and a free electron collide, the electron will fill the e lectron deficiency which
the hole represents and both the hole and electron will cease to exist as free charge
I
carriers. This process is known as recombination.
The conductivity. of a semiconductor material can also be increased by adding
impurities to the semiconductor crystal when it is formed. These impurities may e ither
I
be donors such as arsenic which "donate" extra free electrons to the crystal or acceptors
such as aluminum which "accept" e lectrons from the cryst al and produce free holes.
A donor atom, which has five valence electrons, t akes the place of a semiconductor
atom in the crystal structure. Four of the five valence electrons are used t o form
I
covalent bonds with the neighboring semiconductor atoms. The filth electron is easily
freed from the atom and can move through the crystal . The donor a tom assumes a
positive charge, but remains fixed in the crystal. A semiconductor which contains donor
atoms is called an n-type semiconductor since conduction occurs by virtue of free
I
electrons (negative charge).
An acceptor atom, which h as three valence electrons, can also take the place of a
semiconduc tor atom in the crystal structure. All three of the valence electrons are used
I
to form covalent bonds with the neighboring atoms. The fourth electron which is
needed can be acquired from a neighboring atom, thus giving the acceptor atom a
negative charge and producing a free hole in the crystal. A semi condu ctor which con-
I
6
I
I BASIC SEMICONDUCTOR T H EORY
tains acceptor atoms is called a p-type semiconductor since conduction occurs by
I virtue of free holes in the crystal (positive charge).
I ELEMENT
<SYMBOL )
GROUP IN
PERIODIC
TABLE
NUMBER
VALENCE
ELECTRONS
APPLI CATIONS IN
SEMICONDUCTOR DEVICES
I acceptor elements, form p-type

boron (B) semiconductors, each atom
I aluminum (Al)
gallium (Ga)
indium (In)
III 3
substitutes for a Ge or Si atom
in the semiconductor crystal
and can take on or accept an
e>.1:ra electron thus producing a
I hole
I germanium (Ge)
silicon (Si)
IV 4
basic semiconductor materials,
used in crystal form with con-
trolled amounts of donor or
I acceptor impurities
donor elements, form n-type

I phosphorus (P)
arsenic (As)
antimony (Sb)
V 5
semiconductors, each atom
substitutes for a Ge or Si atom
in the semiconductor crystal
I and can give up or donate an

extra electron to the crystal
I MATEIUALS USED I N THE CONSTRUCTION OF TRANSISTORS

AND OTHER SEMICONDUCTOII DEVICES
FIGUR E 1.2
I To summarize, conduction in a semiconductor takes place by means of free holes

and free electrons ( ca"iers) in the semiconductor crystals. These holes or electrons may
I originate either from donor or acceptor impurities in the crystal or from the thermal
generation of hole-electron pairs. During the manufacture of the crystal, it is possible
to control the conductivity and make the crystal either n-type or p-type by adding
I controlled amounts of donor or acceptor impurities. On the other hand, the thermally
generated hole electron pairs cannot be controlled other than by varying the tempera-
ture of the crystal.
One of the most important principles involved in the operation of semiconductor
I devices is the principle of space charge neutrality. In simple terms, this principle states
that the total number of positive charges (boles plus donor atoms) in any region of a
semiconductor must equal the total number of negative charges (electrons plus acceptor
I atoms) in the same region provided that there are no large differences in voltage within
the region. Use of this principle can frequently result in a simpler and more accurate
interpretation of the operation of semiconductor devices. For example, in explaining
7
B A S IC SEMICONDUCTOR TH E ORY I
the characteristics of an n-type semiconductor it is usually st ated that the function of
the donor atoms is to produce free electrons in the crystal. However, using the prin-
ciple of space charge neutrality it is more accurate to say that the function of the donor
atoms is to provide positive charges within the crystal which permit an equal number
I
of free electrons to How through the crystal.
Carriers can move through a semiconductor by two different mechanisms: diffusion
or drift. Diffusion occurs whenever there is a difference in the concentration of the
I
carriers in any adjacent regions of the crystal. The carriers have a random motion
owing to the temperature of the crystal so that carriers will move in a random fashion
from one region to another. However, more carriers will move from the region of
higher concentration to the region of lower concentration than will move in the oppo-
I
site direction. Drift of carriers occurs w h enever there is a difference in voltage between
one region of the semiconductor and another. The voltage difference produces a force
on the carriers causing the holes to move toward the more negative voltage and the
I
electrons to move toward the more positive voltage. The mechanism of drift is illus-
trated in Figure 1.3 for both n-type and p-type semiconductors. For the n-type material,
the electrons enter the semiconductor at the lower electrode, move upwards through
the semiconductor and leave through the upper electrode, passing then through the
I
wire to the positive terminal of the battery. Note that in accordance with the principle
of space charge neutrality, the total number of electrons in the semiconductor is deter-
mined by the total number of acceptor atoms in the crystal. For the case of the p -type
semiconductor, hole-electron pairs are generat ed at the upper terminal. The electrons
I
flow through the wire to the positive terminal of the battery and the holes move down-
ward through the semiconductor and recombine with e lectrons at the lower t erminal. I
tI tI
I
G) DONOR ATOMS
(f)
♦
♦
(±)
-
+
e
+
♦
+
e
♦
-
+
e
( POSITIVE CHARGE)
ACCEPTOR ATOMS
I
♦ (NEGATIVE CHARGE)
(±)
♦
G)
e
+
♦
+
e
♦
+ FREE HOLES I
FREE ELECTRONS
N-TYPE P-TY P E I
CONDUCTION IN N-TYPf AND P-TYPf SEMICONDUCTORS
FIGURE 1.3 I
If a p-type region and an n-type region are formed in the same crystal structure,
we have a device known as a rectifier or diode. The boundary between the two regions
is called a i unction, the terminal connected to the p-region is called the anode, and the
I
terminal connected to the n-region is called the cathode. A rectifier is shown in Figure
1.4 for two conditions of applied voltage. In Figure 1.4A the anode is at a negative
voltage with respect to the cathode and the rectifier is said to be reverse biased. The
I
holes in the p-region are attracted toward the anode terminal (away from the junction)
and the electrons in the n-region are attracted toward the cathode terminal (away from
the junction). Consequently, no carriers can How across the junction and no current
I
8
I
I B ASIC SEM ICONDUCTOR THEOR Y
will How through the rectifier. Actually a small leakage current will How because of the
I few hole-electron pairs which are thermally generated in the vicinity of the junction.
Note that there is a region near the junction where there are no carriers ( depletion
layer). The charges of the donor and acceptor atoms in the depletion layer generate a
voltage which is equal and opposite to the voltage which is applied between the anode
I and cathode terminals. As the applied voltage is increased, a point will be r eached
where the electrons crossing the junction (leakage current) can acquire enough energy
to produce additional hole-electron pairs on collision with the semiconductor atoms
I (avalanche multiplication). The voltage at which this occurs is called the avalanche
voltage or breakdown voltage of the junction. If the voltage is incr eased above the
breakdown voltage, large currents can How through the junction and, unless limited by
the external circuitry, this current can result in destruction of the rectifier.
I In F igure 1.4B the anode of the rectifier is a t a positive voltage with respect to the
cathode and the rectifier is said to be forward biased. In this case, the holes in the
p-region will flow across the junction and recombine with electrons in the n-region.
I Similarly, the electrons in the n-region will flow across the junction and recombine
with the holes in the p-region. The net result will be a lar ge current through the recti-
fier for only a small applied voltage.
I
I I -+O
e
l
+ e
ANODE
+ e
l
+ e +
tI
p REGION
• •
I --
~
♦
e
+
G)
- @
e
G)
- G)
+
e
G)
- -
- JUNCTION
N REGION
-
- +
e +. e +- e
@+-Et>
t •
- (±)
+t •
t G>
t- @ 1
♦
==:
I (A} REVERSE
1
BIAS
CATHODE
I
( 8) FORWARD BIAS
I
I CONDUCTION IN A PH JUNCTION 11.ECTIFIEII.
FIGURE 1.4
I An NP transistor is formed by a thin p-region between two n-regions as indicated

in Figure 1.5. The center p-region ;s called the base anc.l in practical transistors is
generally less than .001 inch wide. One junction is called the emitter junction and the
I other junction is called the collector junction. In most applications the transistor is
used in the common emitter configuration as shown in Figure 1.5 where the current
through the output or load (RL) flows between the emitter and collector and the control
or input signal (VBK) is applied between the emitter and base. In the normal mode of
I operation, the collector junction is reverse biased by the supply voltage V co and the
emitter junction is forward biased by the applied base voltage Va&. As in the case of
the rectifier, electrons flow across the forward biased emitter junction into the base
I region. These electrons are said to be emitted or injected by the emitter into the base.
They dilfuse through the base region and flow across the collector junction and then
through the external collector circuit.
9
BASIC SEMICONDUCTOR THEORY
I
COLLECTOR
I
~ - - N- TYPE COLLECTOR REGION
I
~ - - COLLECTOR JUNCTION
~ - - P - TYPE BASE REGION
I
-
Ie
BASE
--o------ +
+ - + -
+- +-+-
~ - - EMITTER JUNCTION
~ - - N - TYPE EMITTER REGION
I
(DONOR ANO ACCEPTOR ATOMS
ARE NOT SHOWN)
EMITTER I
CONDUCTION IN A NPN JUNCTION TRANSISTOR
(COMMON IMITTI• CON11GU•A TION)
FIGURE 1.5
I
If the principle of sp ace charge ne utrality is u sed in the analysis of the transistor,
it is e vident that the ·collector current is controJle d by m eans of the positive ch arge
I
(hole concentra tion) in the b ase region . As the b ase volta ge V eE is increased the posi-
tive charge in the b ase re gion will b e increased, which in turn will p ermit an e quivalent
increase in the number of electron s flowing b etween the emitter and collector across
I
the b ase re gion . In an ideal transistor it would only b e n ecessary to allow b ase curre nt
to flow for a sh ort time to est ablish the d esired p ositive charge. The b ase circuit could
the n b e open ed a nd the d esired collector curre nt wo uld flow indefinitely. The collect or
current could b e stopped by applying a n e gative voltage to the b ase and allowing the
I
p ositive ch arge to How out of the b ase re gion . In ac tual tran sistors, h owever, this can
not b e done b ecau se of seve ral b asic limitations. Som e of the holes in the b ase region
will flow across the emitter junction and som e will combine with the electrons in the
b ase region . For this reason, it is n ecessary to supply a c urre nt to the b ase to m ake up
I
for these losses. The ratio of the collector c urrent to the b ase current is known as
the current ga in of the transistor hFE
(3 = hte=
= Io/l e. F or a-c signals the current gain is
ic/ib, The r atio of the a-c collector current t o a -c emitter c urrent is desig-
I
= =
na teu by a h ,b i .,/ie.
When a transistor is u sed at higher freque ncies, the fun dame ntal limita tion is the
time it takes for carrie rs to diffuse a cross the b ase re gion from the emitte r to the col-
I
lector. Obviously, the time can b e reduced by d ecreasing the width of the b ase re gion.
The frequency cap abilities of the transistor are usually expressed in terms of the
alpha cutoff frequency ( fh rb). This is d efine d as the frequency a t which a d ecreases to
0 .707 of its low fre quency value. The alpha cutoff frequency m ay b e re la ted to the
I
b ase charge characteristic a nd the b ase width by the equations :
I
where T & is the emitter time con st ant, Qa is the b ase charge re quired for an emitter
curre nt I E, W is the b ase width, and D is the diffusion const ant whic h d ep ends on the
semiconductor m a te rial in the b ase r egion.
I
10
I
I B A SIC SEM I CONDU CTOR T HEORY
As evident from F igure 1.5, the NPN transistor has some similarity with the vacuum
I tube triode. Positive voltage is applied to the collector of the transistor which corre-
sponds to the pla te of the tube, electrons are "emitted" by the cathode and are
"collected" by the plate of the t ube, and the control signal is applied to the base of
I the transistor which corresponds to the grid of the tube. One important difference be-
tween transistors and tubes is that the input impedance of the transistor is generally
much lower than that of a tube. It is for this reason that transistors are usually consid-
I ered as current controlled devices and tubes are usually considered as voltage controlled
devices. Another important difference between transistors and tubes is the existence of
complementary transistors. That is, a PNP transistor will have characteristics similar to
a NPN transistor except that in normal operation the polarities of all the voltages and
I currents will be reversed. This permits many circuits which would not be possible with
tubes (since no tube can operate with negative plate voltage). Examples of comple-
mentary circuits can be found in other parts of this manual.
I The operation of the transistor has been described in terms of the common emitter
configuration. The term grounded emitter is frequently used instead of common
emitter, but both terms mean only that the emitter is common to both the input circuit
I and output circuit. It is possible and often advantageous to use transistors in the
common base or common collector configuration. The different configurations are
shown in Figure 1.6 together with their comparative characteristics in class A amplifiers.
I
I
CIRCUIT CONFIGURATION CHARACTERISTICS 0
moderate input impedance (1.3 K)

COMMON moderate output impedance (50 K)
I EMITTER
(CE)
high current gain
high voltage gain
highest power gain
(35)
(-270)
(40 db)
I COMMON
lowest input impedance
highest output impedance
(35 n)
(1 M)
I BASE
(CB)
low current gain
high voltage gain
moderate power gain
(-0.98)
(380)
(26 db)
I COMMON
COLLECTOR
highest input impedance
lowest output impedance
(350 K)
(500 n)
(CC) high current gain (-36)
I (EMITTER
FOLLOWER)
unity voltage gain
lowest power gain
{1.00)
(15 db)
I •Numerical values are typical for the 2N525 at audjo fre quencies with a bias of
5 volts and l ma., a load resistance of l OK, and a source (gen e rator) resistance
of lK.
I TRANS/STOit CIIICUIT CONflGUIIATIONS

FIGURE 1 . 6
11
I
2. TRANS I S T OR CONSTRUCTION TECHNIQUES
The knowledge of m any sciences is r e quired to build transistors. Physicists u se the

I
m athe matics o f ato mic physics f or d esign. M e tallurg ists study semiconductor alloys and
crystal characteristics to provide data for the physicist . Chemists contribute in every
facet o f m anufacturing through ch emical reactions which etch , clean and stabilize
I
tran sisto r surfaces. M echanical e ngineers d esign intricat e m achines for precise handling
of microminiature p arts. Electro nic e ngineers t est transistors and d evelo p n ew uses for
them . Statisticians d esign m e aningful life test procedures to d e termine reliability. Their
inte rpret ation of life t est and quality control d at a leads to b e tter m anufacturin g
I
procedures.
The concerte d effort of this sort of group h as r esulte d in m any differ ent construc-
tion techniques. All these t echni ques attem p t to accomplish the same goal - namely t o
I
construct two p ar allel junctions as close togethe r as possible . The refore, these t ech-
niques h ave in common the fundamental proble m s of growing suitable c ryst als, form-
ing junctions in the m, attaching lead s t o the structure and encapsulating the r esulting
tran sistor. The r em ainde r of this ch apter discusses these problems and concludes with
I
their bearing o n reliability as illustrate d by exam ples.
M E TAL PR E PARAT I ON
I
D epe nding o n the type of semiconductor d evice b e ing m ad e, the structure of the
semiconduc tor mate rial varies from highly p e rfect single crystal to extreme ly p oly-
cryst alline . The theory o f tran sistors and rectifie rs, h ow ever, is b ased on the properties
of single crystals. D efects in a single crystal produce effects much the sam e as impuri-
I
ties and are ge ne rally undesirable .
G ermanium and silicon m et al for use in transistor m anufacture m ust be so purified
that the impurity concentratio n r an ges from ab o ut one p art in 103 to o ne p art in 10 •
11
I
Then a d o minant impurity concentration is obtained b y d o ping. Finally, the m etal m ust
b e grown into a single highly perfect crystal.
I
I
I
DIRECTION OF TRAVEL
_ .,___ _ __ _ OF I NDU CTION COI L ANO
MOLTEN ZONE
I
0 @
I
GRAPHITE BOAT QUARTZ TUBE
@ BAR OF H I GH PURITY © MOLTEN ZONE

SOL ID GERMANIUM
G) BAR OF LOW PURITY
@ INERT ATMOSPHERE SOLi O GERMANIUM
© INDUCTION COIL
I
S/MPUFlfD ZONE aEFINING APPAaA TUS
FI G URE 2 . 1
I
12
I TRANSISTOR CONSTRUCTION TECHNIQUES
The initial purification of germanium and silicon typically involves reactions which
I produce the chemical compounds germanium and silicon te trachloride or dioxide.

These compounds can be processed to give metallic germanium or silicon of relatively
high purity. The metal so prepared is further purified by a process called zone refining.
This technique makes use of the fact that many impurities are more soluble when the
I metal is in its liquid state, thus enabling purification to result by progressive solidifica-
tion from one end of a bar of metal.
In practical zone refining a narrow molten zone is caused to traverse the length of
I a bar. A cross-sectional view of a simplified zone refining furnace is shown in Figure

2.1. High purity metal freezes out of the molten zone as the impurities remain in
solution. By repeating the process a number of times, the required purity level can be
reached. During the process it is important that the metal be protected from the intro-
I duction of impurities. This is done by using graphite or quartz parts to hold the metal,
and by maintaining an inert atmosphere or vacuum around it. The heating necessary to
produce a narrow molten zone is generally accomplished by induction heating, i.e., by
I coils carrying radio frequency energy and encircling the metal bar in which they
generate heat.
The purified metal is now ready for doping and growing into a single crystal.
I A common method for growing single crystals is the Czochralski method illustrated in
Figure 2.2. In it a crucible maintains molten metal a few degrees above its melting
point. A small piece of single crystal called a seed is lowered into the molten metal and
then slowly withdrawn. If the t emperature conditions are properly maintained a single
I crystal of the same orientation, i.e., molecular pattern as the seed grows on it until aJl
the metal is grown into the crystal. Doping materials can be added to the molten metal
in the crucible to produce appropriate doping. The rate at which doping impurities are
transferred from the molten metal to the crystal can be varied by the crystal growing
I rate, making it possible to grow transistor structures directly into the single crystal .
This is discussed in detail in the next section.
The floating zone technique for both refining and growing single crystals has
I recently been introduced. It is quite similar in principle to zone refining except that
the graphite container for the bar is eliminated, reducing the risk of contamination.
In p lace of it, clamps a t both ends hold the bar in a vertical position in the quartz
I tube. The metal in the molten zone is held in place by surface tension. Doping agents
added at one end of the bar can be uniformly distributed through the crystal by a
single cycle of zone refining. This technique has h ad much success in producing high
quality silicon metal.
I JUNCTION FORMATION
I A junction may be defined as the s urface separating two parts of a semiconductor

with different properties. P-type or N-type doping usually defines the different prop-
erties. Transistors generally utilize PN junctions; however, metal to semiconductor
junctions are used to manufacture point contact and surface barrier transistors. A tran-
I sistor can be defined as a structure with two junctions so close together that they
interact with one another. For example , the collector junction is close enough to the
emitter to collect the current that diffuses into the base region.
I Techniques for forming junctions may be subdivided into two basic types, impurity
contact or grown junction. The impurity contact method involves treating a homo-
geneous crystalline wafer with impurities to generate the different properties which
form the junction. The grown junction technique involves incorporating into the crystal
I during its growth the impurities necessary to produce junctions. Alloy transistors, sur-
face barrier transistors, as well as transistors using surface diffusion are examples of
13
TRAN SIST OR CON STRU CTIO N TECH
NIQU ES
I
I
I
--- @ GAS INLE T I
I
I
I
SEED HOLD ER
SEED I
SING LE CRYS TAL
MOLTEN META L
I
QUAR TZ TUBE
GRAP HITE CRUCIBLE

I
HEAT ER
I
•••
I
..--.-.-.-.----- •
•
••• ••• I
I
I
SIMl'UflED atYS J'Al GIIOW ING RJ•N ACE
FIGU RE 2 . 2
I
14
I
I the impurity contact process. Rate grown, meltback and grown diffused transistors are
examples of the grown process. These processes, illustrated in Figure 2.3, are dis-
cussed below.
I IN ITIA L INTERMEDIATE FINISHED
I
CONDITIONS STAGE STRUCTURE
ALLOY
I ( IMPURITY CONTACT)
W22lN2UZ2D
COTS APPLI EO HEAT MELTS COTS

DOTS
RECRYSTALLIZE
I DIFFUSION
( IMPURITY CONTACT)
\
J~~l,
I GASEOUS DOPING
DOUBLE
DIFFUSION
ETCHING
EXPOSES
=
AGENTS APPLIED COMPLETED BASE
I RATE
GROWING
(GROWN)
CYCLE JUST
~
HEAT REMOVAL
GIVES RAPID
1~--:-~.- ~1
n
HEAT REAPPLIED
TO FORM
n
I COMPLETED GROWTH JUNCTIONS
I
MELTBACK
(GROWN)
DOUBLE
OOPEO PELLET HEAT MELTS TIP
9 .
..
TIP FREEZING
FORMS JUNCTIONS
I GROWN
DIFFUSED
(GROWN)
I MOLTEN METAL
OOPEO WITH
EMITTER ANO
BASE IMPURITIES
BASE IMPURITY
DIFFUSES
RAPIDLY INTO
COLLECTOR
EMITTER
REGION ALONE
CONTINUES
TO GROW
I l_,..,RITY CONTACT AND GROWN JUNCTION TfOINIQUfS

FIGURE 2.3
I The alloy transistor process starts with a wafer of semiconductor material doped
I to a desired level. Alloying contacts or dots containing impurities are then pressed on
either side of the wafer. Heat is applied to the assembly, melting the dots which dis-
solve some of the wafer, giving an alloy solution. Heat is removed and the solution
allowed to freeze. Due to the behavior of impurities during recrystallization, a heavy
I concentration of donors or acceptors is left at the alloy-semiconductor material bound-

ary. The boundaries are the emitter and collector junctions. The larger dot is the
collector. Indium, an acceptor type impurity, when alloyed to antimony doped germa-
15
TRANSISTOR CONSTRUCTI ON TECHNIQUES I
nium results in PNP alloy transistors such as the 2N123, 2N396 and 2 525. The final
structure of surface barrier and microalloy transistors is similar to that of the alloy
transistor. The difference lies in initial etching of the wafer to minimize its thickness
I
followed by plating of the emitter and collector dots. Microalloy transistors melt the
dots, generating a recrystallized region which results in normal semiconductor to
semiconductor junctions. Surface barrier transistors do not melt the dots and therefore
have metal to semiconductor junctions.
I
In diffusion processes, a wafer of semiconductor material is inserted into a capsule
containing one or more impurity elements. The starting material has an impurity con-
centration suitable for the collector of the transistor. H eat is applied to this system
I
with the result that the impurity elements diffuse into the semiconductor material.
If only one impurity element is used, it generates a diHused base region. Subsequently,
an emitter region must be added to the structure to form a complete transistor. If two
impurity e lements are used with germanium wafers, the donor e lements will diffuse
I
faster than the acceptor elements and a P P structure will result. If silicon wafers are
used, the acceptor e lement will diHuse faster than the donor element, resulting in a
NP structure. After the diffusion cycle, proper cutting and etching of the wafer yields
I
transistor structures.
The rate grown process has been applied successfully to germanium yielding tran-
sistors such as the 2 78 and 2 167. The molten metal in the crucible contains both
donor and accepto r elements. The donor element is sensitive to growth rate so that the
I
amount of this impurity being deposited in the crystal varies as the growing conditions
are varied. While a single crystal is being grown from the molten metal, the power is
turned off and the crystal is permitted to grow very rapidly. Then excessive power is
I
applied. Growth stops and the crystal starts to remelt. Again the power is turned off.
As the metal cools, melting stops and the crystal begins to grow. At the point where the
growth rate is zero, the acceptor element predominates and a P region is established
across the germanium crysta l. Repeating this process, it is possible to grow multiple
I
NPN structures in a single crystal.
In the meltback process, a single crystal doped with both donor and acceptor
elements is grown. The crystal is then waferized and diced into small pellets or bars.
I
Each pellet has both donors and acceptors in it. Heat is applied to the tip of the pellet,
producing a small drop of molten metal held on by surface tension. Heat is removed
and the drop recrystallizes. By taking advant age of the differences in the rate of deposi-
tion of the donor and acceptor elements in the drop, a very thin base region is formed.
I
The meltback process yields NPN transistors such as the germanium 2Nl289.
The grown diffused process is st arted by growing a crystal which is doped to the
desired collector resistivity. Donor and acceptor e lements are added to the molten
I
metal at the same time. Growth continues, but the concentration of impurities has
vastly increased. During the growing period, advantage is taken of the different diffu-
sion rates of donor and acceptor elements. In silicon the more rapid acceptors generate
I
diffused base PN transistors such as the 2 335 and 2 338.
Figure 2.4 lists some of the attributes of junction formation processes. It is seen
that the grown processes yield bar shaped transistor structures. Also, a ll but the now
obsolete double-doped process give accelerating base fields to enhance high frequency
I
performance. The rat e grown process alone gives more than one wafer from each
crystal. Grown diffused and double-doped processes give one wafer per crystal while
the meltback process requires melting of each individual bar. Among the limita-
I
tions of the grown processes is the fact that complimentary types generally are not
possible. Also, the bar structure is relatively difficult to heatsink. H owever, the intro-
duction of the fixed bed constn1ction has resulted in thermal impedances lower than
those of many alloy transistors.
I
16
I
I Transistors utilizing a surface diffused region have a Bat collector surface facilitat-
ing heatsink attachment. Because theoretically diffusion can be applied in a variety of
ways, great design flexibility is possible. Practically, however, process complexity has
limited the number of types being made.
I Alloy and microalloy transistors yield two-sided structures which most nearly
approximate ideal switches in DC characteristics. Both types have been combined with
diffused bases to enhance high frequency performance.
I It is seen that many of the structures give similar resistivity profiles and therefore
are capable of similar results. For example, both meltback and microalloy diHused
transistors have a sharp emitter to base emitter junction, an accelerating field in the
I base and a low resistivity collector. This results in excellent high frequency charac-
teristics while maintaining relatively high voltage ratings and a moderate saturation
resistance. Comparing these with the grown diffused transistor, the latter has the same
abrupt emitter junction and graded base resistivity for good high frequency perform-
I ance, but it does not have a low saturation resistance. Therefore, it is best suited for
amplifier applications. On the other hand, the combination of grown diffused bars and
fixed bed construction h as l ed to respectable NPN silicon switching transistors such as
I the G-E 2N338.

The diffused alloy and alloy diffused structures differ in that the former is essen-
tially a conventional alloy transistor with the addition of a diffused base region on the
I emitter side. The alloy diffused structure, however, has a wafer doped to the required
collector resistivity and generates the base region by diffusion out of the emitter dot
which has initially been doped with both donor and acceptor impurities.
The diffused base and diffused emitter-and-base structures have the same profiles.
I However, the former has the emitter junction formed by microalloying a semiconductor
junction onto the surface of the base; the latter has the emitter already formed by
diffusion.
I Generally uniformity in transistor characteristics is attributed to processes capable

of forming a large number of transistor structures simultaneously, but this uniformity
can only be exploited if there is corresponding uniformity in pellet mounting and lead
attachment.
I LEAD ATTACHMENT
I Both ohmic and semiconductor type contacts are required for attaching leads to a
transistor structure. Ohmic contacts, i.e., normal non-rectifying contacts, are used to
attach leads to ex-posed regions such as the emitter and collector dots of an alloy tran-
sistor or the emitter and collector portions of grown transistor bars. The connection
I between the mounting base or header leads, and the leads from the transistor structure
should a lso be ohmic. Unless care is taken, leads may form additional P junctions.
If the PN junction is in the collector a PNP structure results. The same structure is
I found in the Silicon Controlled Rectifier and therefore it may cause the transistor to
tum on regeneratively either at high temperatures or at high collector currents. If the
P junction is in the base lead, it results in a higher base to emitter input voltage,
which is a strong function of temperature. This additional junction also affects the
I base turn off drive in switching circuits and will increase storage time and fall time
beyond that of a normal transistor.
On the other hand, semiconductor contacts, i.e., P junctions, can be useful. They
I make possible contact with the base region when overlapping the emitter or collector
region by the base lead is unavoidable. Grown transistors have extremely narrow base
regions so that rugged base leads generally overlap adjacent regions. By doping the
base lead heavily with the same impurity as the base, an ohmic type contact is formed
17
TRANSISTOR CONSTRUCTION TECHNIQUES
I
GEOMETRICAL
8
SHAPE
= Bar
CROSS-SECTIONAL
VIEW
RESISTIVITY*
PROFILE
I
PROCESS (Horizontal line is intrinsic
=
DESIGNATION
D Double
Sided Wafer
S = Single
Sided Wafer
SHOWING
JUNCTIONS
( Not to scale)
resistivity and separates
regions. Emitter always
on the left.)
I
RATE GROWN B
EB C
I II I ~ -
I
MELTBACK B O[)
-=v== I
MELTBACK - DIFFUSED B a[> -r=-= I
GROWN DIFFUSED B I II I -v------ I
DOUBLE DOPED B I II I -l--1---- I
ALLOY D
ij -1-~-- - I
DIFFUSED ALLOY
(DRIFT)
D
i -1 I t
I
ALLOY DIFFUSED s
~ -1 I - t
I
DIFFUSED BASE
(MESA)
s
:fil ~ I
DIFFUSED EMITTER-BASE
(MESA)
s
:rn -r=-= I
SURFACE BARRIER D
E ~ I
MICRO ALLOY D
~ -1-f=-== I
MICRO ALLOY DIFFUSED D
i --v=-==
•Pro61es are typical and not necessarily to the same scale since processing details can a lter profiles
I
considerably. t Diffused alloy and alloy diffused are capable of identical profiles.
18
I
I ACCELERATING
TYPES
THEORETICALLY POSSIBLE
( Bracketed Types
NUMBER
Of REPRESENTATIVE
I BASE Unavailable Commercially) STRUCTURES TRANSISTOR

FIELD FORMED TYPES
SIMULTANEOUSLY
GERMANIUM SILICON
I YES NPN - MULTIPLE 2N167
I YES NPN
(NPN)
(PNP)
INDIVIDUAL 2N1289
I YES PNP NPN INDIVIDUAL --
I YES PNP NPN MULTIPLE 2N335
I NO
(NPN)
(PNP)
NPN
(PNP)
MULTIPLE 903
I NO
PNP
NPN
PNP
NPN
INDIVIDUAL 2NS25
I YES
PNP
(NPN)
(PNP)
(NPN)
INDIVIDUAL 2N247
I YES PNP (NPN) INDIVIDUAL --
PNP (PNP)
I YES
(NPN) (NPN)
MULTIPLE 2N695
(PNP) PNP
--
I YES MULTIPLE
(NPN) NPN
PNP (PNP)
NO INDIVIDUAL 2N344
I (NPN)
PNP
(NPN)
PNP
INDIVIDUAL 2N393
NO (NPN) (NPN)
I YES
PNP NPN
INDIVIDUAL 2NS01
(NPN) (PNP)
I JUNCTION PROCESSES AND CHARACTERISTICS FIGURE 2.4
19
I
to the base region while semiconductor contacts are simultaneously made to the emitter
and collector. With normal transistor biasing, the collector to base PN junction so
formed is normally reverse biased. Its primary effect is to increase the collector capaci-
I
tance. The emitter junction, however, is forward biased, permitting a portion of the
base current to be shunted through the overlap diode rather than to be injected into
the base region. However, emitter overlap can be completely eliminated by electrolytic
etching as in the 2Nl289. Mesa-like transistors can also use advantageously heavily
I
doped base leads to permit deep penetration of the base region.
Many materials are suitable for leads, especially if they are doped appropriately.
Aluminum, gold, indium, nickel have been used successfully. Gold, which is readily
I
doped P or N-type, is used successfully with both germanium and silicon.
Leads of circular and rectangular cross sections are common. Circular leads offer
ease of h andling; rectangular, offer a lower base resistance. With rate grown transistors,
a circular lead is placed along the full length of the base region to combine the low
I
base resistance of a ribbon contact with the advantages of the circular cross-section.
Alloying, soldering, welding and thermo compression bonding (TCB) are used for
attaching leads to header terminals and to the transistor structure. Cold and aluminum
I
are alloyed with germanium and silicon. In some cases, fluxless soldering is the pre-
ferred method, for example, in attaching leads to the indium dots on P P alloy tran-
sistors. Welding finds an application primarily in attaching leads to the header terminals.
I
Thermo compression bonding (TCB), which forms contacts by crushing the leads into
the transistor structure at elevated t emperatures, is of interest since it permits the very
shallow surface penetration by the leads which is essential in extremely high frequency
transistors. TCB also minimizes potential damage to the junctions because the leads are
I
attached at relatively low temperatures. Close process control is necessary, however,
since a precise balance between plastic and elastic deformation must be held to pre-
vent contact failure during thermal cycling.
I
ENCAPSULATION
The term encapsulation is used here to describe the processing from the completion
of the transistor structure to the final sealed unit. The primary purpose of encapsulation
I
is to ensure reliability. This is accomplished by protecting the transistor from mechani-
cal damage and providing a seal against harmful impurities. Encapsulation also governs
thermal ratings and the stability of electrical characteristics.
I
The transistor structure is prepared for encapsulation by etching to dissolve the
surface metal which may have acquired impurities during manufacture. Following
etching, a controlled atmosphere prevents subsequent surface contamination. The
transistor now is raised to a high temperature, is evacuated to eliminate moisture and
I
is refilled with a controlled atmosphere. Then the cap, into which a getter may be
placed, is welded on.
In some respects the design of the case, through its contribution to transistor reli-
I
ability, is as important as that of the transistor structure. lechanically, users e:.\.'I)Cct to
drop transistors, snap them into clips or bend their leads without any damage. Ther-
mally, users expect the header lead seals to withstand the thermal shock of soldering,
I
the junctions to be unaffected by heating during soldering, and the internal contacts to
be unchanged by thermal cycling. Considerable design skill and manufacturing cost is
necessary to meet the users expect ations. Within the transistor structure, coefficients of
expansion are matched to prevent strain during thermal cycling. Kovar lead seals with-
I
stand the shock of soldering and do not fatigue and lose their effectiveness after thermal
cycling. Hard solders and welds maintain constant thermal impedance with time, avoid-
ing possible crystallization of soft solders.
I
For the stability of electrical characteristics, hermetic seals cannot be over-
20 I
I emphasized. They not only preserve the carefully controlled environment in which the
transistor is sealed but they exclude moisture which causes instability. \Vhile some
transistors can tolerate pure water vapor, water makes possible the ionization and
migration of other harmful contaminants. Moisture can be responsible for slow reverc;i-
I ble drifts in e lectrical characteristics as operating conditions a re changed. Also, while
a transistor is warming up after exposure to low temperatures, moisture may precipitate
on the transistor surfaces, causing a large temporary increase in Ico. Kovar-hard glass
I l ead seals are used in transistors designed for reliability. Kovar does not have the low
thermal impedance or ductility of copper, however, and therefore seal integrity is paid
for by a lower dissipation rating and a lower tolerance to lead bending.
I The case design governs the transistor's thermal impedance, which should be as
low as possible and consistent from unit to unit. Very small cases minimize the junction
to case impedance while increasing the case to air impedance. L arger cases such as
the JEDEC 370 mil TO-9 combine a lower case to air impedance, with a lead configura-
I tion and indexing t ab permitting automatic insertion of transistors into printed circuit
boards.
I RELIABILITY
Transisto rs have no known failure m echanism which should limit their life expect-
ancy. Sufficient data has been collected to date to show that with careful construction
I techniques, transistors are capable of operation in excess of 30,000 hours at maximum

ratings without appreciable degradation. Since transistors can perform logical opera-
tions at very low dissipation and amplify at high efficiency, the resulting low dissipation
reduces the ambient tempera ture for other components, enhancing their reliability as
I w ell. The transistor's small physical size and its sensitivity to small voltage ch anges at
the base, results in low circuit capacit ances and low power requirements, permitting
large safety factors in design. The variety of manufacturing processes being used by
I the industry permits ch oosing the optimum transistor for any circuit requirement. For
example, rate grown transistors offer low Ico and low Cc for applications requiring low
collector current. Alloy transistors offer high peak power capabilities, g reat versatility
in application, and are available in both P P and P types. Me ltback or mesa tran-
I sistors give high speed at high voltage ratings while microalloy transistors give high
speed and good saturation characteristics in lieu of high voltages.
Reliability is a measure of how well a device or a system satisfies a set of electrical
I requirements for a given p eriod of time under a specified set of operating conditions.
Because reliability involves the element of time, only life tests can provide data on
reliability. Life tests, however, indicate what the transistor was and how much it has
changed during the life t est, but they are only a measure of re liability if correlations
I have b een establish ed between the deterioration during life tests and reliability. Life
tests alone are inadequate in guaranteeing reliability b ecause they cannot check all
potential causes of failure. For example, they will not detect intermitte nt contacts
I or the excessive moisture which may cause erratic low t empera ture performance.
Fortunately, other t ests de tect such conditions, but these problems have led to the
adage that re li ability cannot be tested in.
\Vhile it is true that reliability must be built in, it has seldom proved practical in
I the past to make an absolute measurement of a specific tranristor's reliabilit/. Tran-
sistors currently are sufficiently reliable that huge samples and considerable ex-pense in
manpower, equipment, and inventory are necessary to get a true measure of their reli-
I ability. However, tests can readily show if a transistor falls far sho rt of the required
reliability; therefore, they are useful in assigning ratings, in obt aining rate of degrada-
tion measurements, and as a measure of quality control or process variability. Figures
2.5, 2.6, 2.7 sh ow some of the considerations in designing reliable transistors.
21
I
I
I
I
I
G)
@
KOVAR METAL FOR BEST HERMETIC SEAL
RIDGE ASSURES BETTER PRECISION IN WELDING
I
@
@
COPPER CLAD STEEL FOR STRAIN FREE FABRICATION,
SALT SPRAY RESISTANCE ANO MECHANICAL STRENGTH
WELDED CONTACTS BETWEEN COLLECTOR ANO
EMITTER TABS,ANO HEADER LEADS
I
@ SPECIAL ALLOYS ANO PROCESSING TO PREVENT POOR
@
WETTING ANO CONSEQUENT INTERMITTENT CONTACT
SPECIAL ALLOYS BETWEEN WAFER ANO SUPPORTING
WINDOW TO CONTROL STRESSES DUE TO THERMAL
EXPANSION, TO GET GOOD WETTING BETWEEN WINDOW
ANO WAFER REDUCING THERMAL IMPEDANCE ANO
I
{z)
@
SERIES BASE RESISTANCE, TO GET PURELY OHMIC CONTACT
CRYSTAL ORIENTATION CHOSEN TO PREVENT DOT SPREADING
COLLECTOR DOT CENTERED EXACTLY OPPOSITE EMITTER
DOT FOR HIGH CURRENT GAIN
I
THICK W I NDOW TO MINIMIZE THERt.4AL IMPEDANCE TO CASE
TWO LARGE WELDS PROVIDE HEAT PATH FROM WINDOW TO CASE
SHOULDER ON SEAL FOR STRENGTH
KOVAR TO HARO GLASS MATCHED COEFFICIENT SEAL
I
KOVAR LEADS HELP REDUCE JUNCTION HEATING DURING SOLDERING
GASEOUS ATMOSPHERE AVOIDS THE MIGRATION OF IONS
POSSIBLE WITH FLUID TYPE FILLERS
GETTER TABLET TO PERMANENTLY ABSORB ANY MOISTURE
I
DUE TO OUTGASSING
SPECIAL ETCHING ANO SURFACE TREATMENT RESULTS IN STABLE
Ico AT ALL TEMPERATURES, VERY LOW NOISE FIGURE' ANO
SMALL Ico VARIATION WITH COLLECTOR VOLTAGE. I
DESIGN FOIi IIEUA&IUTY
(1Yftll 2N43, 2N396, 2N525)
FIGURE 2 . 5 I
While a transistor's design must b e inherently reliable to yield a reliable product ,
the design must b e couple d with vigorous quality control in manufacturing and accel-
erated life t ests to verify that the process is truly under control.
I
There are a number of t ests which appear to correlat e with reliability; however,
the ir significance and applicability to any specific transistor type will vary and must b e
assessed on this basis.
I
Storage of transistors at their m aximum rated t emperature can b e a m easure of
process cleanliness, since chemical activity doubles approxim ately every te n degrees
centigrade. Caution should b e used since some organic fillers d ecompose if the rated
temp erature is exceed e d .
I
22 I
I TRANSISTOR CONSTRUCTION TEC HNIQUES
I
.I
I
I CD KOVAR METAL HEADER FOR BEST HERMETIC SEAL
I @
@
RAISED GLASS BEAD TO PREVENT POSSIBLE
OCCLUSION OF CONTAMINANTS
CERAMIC DISK WITH COEFFICIENT OF THERMAL
EXPANSION MATCHING THAT OF SILICON
I @
@
GOLD STRIPS BONDED TO CERAMIC BY TECHN IQUES
PERFECTED FOR CERAMIC TUBE
SLIT IN DISK CUT TO ± 0 .001" TOLERANCE
@
I (!}
BASE REGION PLACED CLOSE TO COLLECTOR CONTACT
FOR LOW THERMAL IMPEDANCE ANO LOW SATURATION
RESISTANCE
HARO SOLDER PREVENTS THERMAL FATIOUE PROBLEMS
I @
@
SPECIAL NON- POROUS CERAMIC IS IMPERVIOUS TO
PROCESSING CHEMICALS
DISK DIAMETER SMALL ENOUGH TO PREVENT ANY
CONTACT WITH CASE
I @ BASE LEAD ATTACHED TO GOLD STRIP
I FIXED SEO MOUNTING

DESIGN FOR REUASIUTY
(TY.-H 2N33S, 2N337, 2N491)
FIGURE 2.6
I When operating transistors under dissipation, it is preferable to turn the transistors

off for approximately ten minutes every hour in order to induce thermal cycling.
I Thermal cycling will tend to fatigue compression seals, will detect intermittent contacts
or poor welds and, by est ablishing thermal gradients, will accelerate migration of any
impurities that may be present.
Some transistors find operation at high voltages and high junction temperatures
I simulta neously most deleterious. Thermal runaway can be avoided without invalidat-
ing the test by applying a collector to base potential and disconnecting the emitter .
To determine the safety factor in the manufacturer's dissipation rating, life tests at
I 20% over-rating should d etect marginal units. Caution should be exercised with tran-
sistors using organic fillers such as greases or oils, since the cases may rupture if the
transistors overheat.
I With some transistors, a drift in I co at room temperature is believed to correlate

with reliability. In germanium transistors, a drift of more than 1 µa in 15 seconds after
power is applied is considered excessive where reliability is of paramount importance.
23
TRANSISTOR CONSTRUCTION TECHNIQUES I
A transistor may pass the high temperature t ests readily even though it will mal-
function at low temperatures due to moisture. Moisture can be detected by monitoring
I co while a transistor warms up after being cooled to dry ice temperatures. A significant
increase in I co while the transistor is warmfog up is indicative of moisture. Care should
I
be taken, however, that vapor condensation on the outside of the transistor case is not
responsible for the increase in Ico. Two tests of hermetic seal which are widely used in
the industry are the detergent pressure bomb and the Radiflo test. The former involves
I
pressurizing transistors in water to which a small quantity of detergent has been added.
On penetrating leaky seals, the detergent contaminates the junctions. To be significant,
the test should use a relatively high pressure for a long period of time, particularly if
organic fillers are used which might protect the junction temporarily. The Radiflo test
I
forces a gas with a radioactive tracer into the transistor through leaky seals. A Geiger
counter detects the presence of the radioactive gas within the leaky transistors.
Another measure of potential reliability are the distribution curves of the major
I
parameters. Except where screening has been done to narrow limits, the distribution
curves should be approximately Gaussian, indicating that the transistors represent good
process control and statistically will ensure non-critical circuit performance.
The above tests can be made more significant by selecting the samples from several
I
sources over a period of time. This permits a realistic appraisal of the manufacturing
process control. I
I
6 } . - - - - - - - ---C,
u..:=::::::,,o--..:.
I
I
I
(D KOVAR HEADER RESEMBLES THAT FOR 2N 335
@ STEP ETCH REVEALS BASE REGION PREVENTING
I
I
EMITTER OVERLAP
@THE HEAT SINK IS A METAL TAB WELDED TO THE
HEADER LEAD AND ALLOYED TO THE EMITTER OF
MELTBACK BAR
I
@CANTILEVER CONSTRUCTION MINIMIZES MECHANICAL
AND THERMAL STRAINS ON BAR
@ GOLD RIBBON BASE LEAD FOR DUCTILITY ,LOW
ELECTRICAL RESISTANCE AND LINE CONTACT TO
@
BASE REGION
COLLECTOR LEAD
I
DESIGN FOR REUABIUTY
(TYPES 2Nf289, 3N36, 3H37)
FIGURE 2.7
I
24
I
I
I 3 . SMALL SIGNAL CHARACTERISTICS
A major area of transistor applications is in various types of low level a-c amplifiers.
I One example is a phonograph preamplifier where the output of a phonograph pickup

(generally about 8 millivolts) is amplified to a level suitable for driving a power ampli-
fier (generally 1 volt or more). Other examples of low level or small signal amplifiers
include the IF and RF stages of radio and TV receivers and preamplifiers for servo
I systems.
As described in Chapter 4 on large signal characteristics a transistor can have very
nonlinear charaaeristics when used at low current and voltage levels. For example, if
I conduction is to take place in an NPN transistor the base must be positive with respect
to e emitter." Thus, if an a-c signal were applied to the base of an NPN transistor,
conduction would take place only during the positive half cycle of the applied signal
and the amplified signal would be highly distorted. To make possible linear or undis-
I torted amplification of small signals, fixed d-c currents and voltages are applied to the
transistor simultaneously with the a-c signal. This is called biasing the transistor, and
the d-c collector current and d-c collector to emitter voltage are referred to as the
I bias conditions.
The bias conditions are chosen so that the largest a-c signal to be amplified is small
compared to the d-c bias current and voltage. Transistors used in small signal amplifiers
are normally biased at currents between 0.5 and 10 ma. and voltages between 2 and 10
I volts. Bias currents and voltages below this range can cause problems of distortion,
while bias currents and voltages above this range can cause problems of excessive noise
and power dissipation.
I A typical circuit for a single stage low level a-c amplifier is shown in Figure 3.1.
Resistors R1, ~ . and Ra form the biasing circuit, the design of which is described in
Chapter 5. The capacitors serve to block the d-c voltages, but offer a low impedance
path to the a-c signal voltages. Thus, as far as the a-c signals are concerned, the circuit
I of Figure 3.1 is equivalent to the much simpler circuit of Figure 3.2. Resistor RA repre-
sents the parallel resistance of R1 and Rz, while v and i designate the values of the a-c
voltage and current.
I +
I R1 R4
.
'2
r---<> II
I o--1
INPUT
OUTPUT
t
V2
v,
I R2 R3 I
R4
I
I --
I TYPICAL LOW LEVEL A-C AMPUFIER CIRCUIT AND A-C EQUIVALENT CIRCUIT
FIGURES 3 . 1 AND 3 . 2
25
S M ALL S I G N AL C H A R ACTER ISTICS
I
For the purpose of circuit design any amplifier, whether a single transistor stage or
a complete circuit, can be •considered as a "black box" which has two input terminals
and two output terminals as indicated in Figure 3.3. The circuit designer, knowing the
electrical characteristics of the "black box", can calculate the performance of the ampli-
I
fier when various signal sources are applied to its input and various loads are connected
to its output.
I
I
INPUT
TERM INALS
"BLACK
BOX"
OUTPUT
TERMINALS
I
I
aox
81.ACIC RfNfSENTATION Of AN AMPUflfR CIRCUIT
FIGURE 3 . 3
I
Network theory tells us that the complete e lectrical characteristics of a "black box"
such as Figure 3.3 can be specified in terms of four parameters. The parameters which
are frequently used for specifying the characteristics of transistors and in the analysis
of transistor circuits are the "hybrid" or "h" parameters. The "h" parameters are
I
defined by the equations:
V1
ill
= hui1 + h12V2 = h, i1+ hr V:1
= ~ i1 + hnvia = hr i1 + h o V2
(1)
(2)
I
where
ha= h, is the input impedance with the output a-c short circuited (ohms) I
h12 = h. is the reverse voltage transfer ratio with the input a-c open cir-
h:n = he
cuited (dimensionless)
is the forward current transfer ratio with the output a-c short
circuited (dimensionless)
I
is the output admittance with the input a-c open circuited (mhos)
The letter and numerical subscripts for the "h" parameters are completely equiva-
I
lent and may be used interchangeably. Common practice is to use the numerical
subscripts for general circuit analysis and the letter subscripts for specifying the char-
acteristics of transistors. Since transistors can be measured and used in either the
common base, common emitter, or common collector configuration an additional sub-
I
script (b, e, or c) is added to the "h" parameters to indicate the particular configuration
involved. For example, the forward current transfer ratio in the common emitter con-
figuration is designated by either hr. or ~••.
I
It is frequently advantageous to use equivalent circuits for transistors to aid in
circuit design or to gain understanding of transistor operation. The equivalent circuit
for the "h" parameters in the common base configuration is shown in Figure 3.4. In this
circuit the voltage transfer ratio, h.b, appears as a voltage generator in the input circuit
I
and the current transfer ratio, h,b, appears as a current generator in the output circuit.
Figure 3.5 shows another form of equivalent circuit for the transistor, the "T" equiva-
lent circuit. This equivalent circuit is of interest since it approximates the actual
I
26
I
I SMALL SIGNAL CHARACTERISTICS
transistor structure. Thus r. and r c represent the ohmic resistances of the emitter and
I collector junction while r b represents the ohmic resistance between the base contact
and the junctions. The current generator ai. represents the transfer of current from the
emitter junction to the collector junction across the base region.
I .
I I
I
I
I HY8IHD EQUIVALENT CIRCUIT
I (COMMON 8AA CON,,GUaA noN)
I •
•e
I e
►
re
I re
I
I b
"1" IQUIVAUNT CIRCUIT
I FIGURES 3.4 AND 3 . 5
I If the "h., parameters are measured or specified for one configuration (e.g., common
emitter) the values of the 'n., parameters for the other configurations or the values of
the parameters in the "T,. equivalent circuit may be calculated. Figure 3.6 gives simple
I conversion equations for a ll possible cases. Also given in Figure 3.6 are typical values
for all the parameters of the 2N525 transistor biased at 1 ma and 5 volts. The "h.,
parameters are dependent upon the biasing conditions and it is important in circuit
design to correct the values of the parameters from the bias conditions under which
I trey are specified to the bias conditions under which the transistors are used. The
correction factors can be obtained from a graph such as Figures 3. 7 and 3.8.
27
SMALL SIGNAL CHARACTERISTICS 11
APPROXIMATE CONVERSION FORMULAE
H PARAMETERS ANO T EQUIVALENT CIRCUIT
(NUMERICAL VALUES ARE TYPICAL FOR THE 2N525 AT I MA , 5V )
I
SYMBOL S COMMON COMMON COMMON T EQUIVALENT
IRE OTHER
h _I
EMIT TER
1400 OHMS
BASE
hib
COLLECTOR
hie
CIRCUIT
'b +.!&...
I
hje I - ca
I
Ue 'Yue l +h t b
hre "12e•~bc
3 .37 X I0 - 4
hj bhob
I+ hfb - hrb
I- h,c '•
(I- ca) re
hte " 21., /J 44 - hfb

l + htb
-( l+ htc>
Cl
7-=;- I
hot h _I_
22e'Z22e
I
27 X I0- 6 MHO S
hie
hob
l+ hfb
hoc
_ hie
I
(I- ca) re
I
hjb 31 0H MS 'e + (1-o)rb
hrb
"11 ·Yjj
h12 • ~ec
hjthot
l+ hte
l+hfe
- h re 5 x ,o- 4 h,c-I -
htc
h 1, h2,
htc
'b
'c
I
htb h2 1 • a - hfa
l+ hte
-0. 978 - I+ hft2
htb
- a I
hot h I
2 2•222
hoe
l+hfe
0 .6 0 X I0- 6 MHOS
hoc
- htc
I
'c
,.
I
I ~ 1400 OHMS
I
hjc h lie hie rb+ - -
'Yue l+hfb I-ca
, _ ....!!...._
hrc h12c • ~be I - llre I 1.0 0
(I - ca)rc
hfc h2 1c • 0 eb - (I + hte > - I

l +hf b
- 45 --- I
I - ca
I
hoc h I
22c •z 22c hoe ~
l+h f b
2 7 X 10- 6 MHOS -- I
( 1-a)rc I
~ 1-t-hfc
re
a
1-t-hfe
l+hfe
- htb
1- hrb -~
hfc
0.978
1.67 MEG
I
I
hoe hob hoc
~ !!m 1-hrc
re hoe
hj b - hob (l+hfb)
hoc
12 .5 OHMS
rb h ie - !n. (l+ hfe)

hoe
~
hob
hfc
hie+ hoc ( I-h,c) 840 OHMS I
FIGURE 3.6
I
28
I
I SM A LL SIGNAL CHAR A CTERISTICS
I 10
T•• 2s•c
I
j
/
,, /
/
"ho11
~ lb ,,,
I " r---..
~"'
Vc•-SV
,,,,,,,,
V
"' "' ' ""'~ V '

I
I "-. ~ /
V
---
h,r
I"- r---
' V
...... ~
L
l+h11,
r--..:..:._ r-....
r-- "'~~ hf•
I ... 11,.,
ht•
I/
/
- -' '"'
'\. 1+11,.,
~v
'\.
' I'\."'\._ r--..... :
I 0)
hob --- i..--
~
I'-- I'-,.
~rr~
I
r---.
"
I
I
...............
r;;;-
01
-o., -o l -1 0
t: MITTEII CUllll[NT
-) 0
Ic(MA)
II' ~
1h11,
-10
I
I CHARACTERISTICS VS EMITTER CURRENT
I -
:=:.
TA•25"C
:IE9I MA
I
r,....hob
h~
~ r-.....
I
>u
~
...
>
;::
◄
...-'
CIC
1.0
h lb
r-h1e h re
~
~ ""--
- ~
------
- I
-=-
h ie h re
hl b
hob
h ,b
I
I u
;::
......iii:"'
u
C 0 .3
I -
I
I 01
-1.0 - :so -10.0
COLLECTOR VOLTAGE, IVcl
CHARACTERISTICS VS COLLECTOR VOLTAGE

-30.0
I VARIATION Of "ff" PARAMfTfRS WITH 81AS CONDITIONS

FIGURE 3 .7 FIGURE 3 .8
I For example, suppose that it is d esired to find the typical value of h ob for the
2 525 at 0.5 ma and 10 volts. From Figure 3.6 the typical value of h .. 11 at 1 ma and
5 volts is 0.6 X 10_., mhos. From Figure 3.7 the correction factor at 0.5 m a is 0.6 and
29
SMALL SIGNAL CHARACTERISTICS I
from Figure 3.8 the correction factor at 10 volts is 0.75. The value of h ob is then
calculated from:
h ob (0.5 ma, 10 v) = 0.60 X 10... X 0.6 X 0.75

I
= 0.27 X 10-e mhos
Once the "h" parameters are known for the particular bia::- conditions and configura-
I
tion being used, the performance of the transistor in an amplifier circuit can be found
for any value of source or load impedance. Figure 3.9 gives the equations for determin-
ing the input and output impedance, as well as the current, voltage, and power gain of
I
a transistor amplifier stage directly from the "h" parameters. The particular "h" param-
eters used in these equations must correspond to the particular circuit configuration
used. For example, if it is desired to calculate the voltage gain of a common emitter
amplifier stage the values h,., h .., hr., hoe must be used in equation 8.
I
\,Vith the exception of equation 9 all of the equations in Figure 3.9 are valid at any
frequency provided that the values of the "h" parameters at that particular frequency
are used. At the higher frequencies "h., parameters become complex and the low fre-
I
quency "h" parameters are no longer valid. The matched power gain given by equation
10 requires that both the input and the output of the amplifier stage be tuned and the
input and output resistances be matched to the generator and load resistance respec-
tively. This situation is seldom met exactly in practice, but it is generally met closely
I
enough to permit accurate results from equation 10.
If the voltage feedback ratio, hr, is very small or is balanced out by external feed-
back the circuit is said to be unilateral. This means that no signal transmission can take
I
place from the output of the circuit to the input. Under these conditions the input
impedance of the circuit will be equal to h, and the output impedance will be equal
to 1/ho. The power gain under matched, unilateral conditions is given by equation 11.
This power gain is a good figure of merit for the transistor since it is independent of
I
circuit conditions and transistor configuration. It represents the maximum power gain
that can be obtained from a transistor under conditions of absolute stability.
As an example of the use of these equations suppose that it is desired to design a
I
tuned amplifier using the 3N37 operating at 150 me. What power gain can be obtained
and what input and output impedances should be used for the matching transformer?
From the 3N37 specifications (converting from polar to rectangular form when
I
necessary): a1. = 80, a,. =
0.00187, a,., =
-0.191, aoe =
5.5 X 10-', h,. =-10,
hr.,= 0.0179, bh = -1.08, h oe
tions in Figure 3.9 gives:
=
12.5 X 104 • Putting these numbers into the equa-
I
C = -0.062
D = 0.75
F = 0.43
I
Gm= 8.75
Z,m
Yom
=
60 - j 5.0 ohms
=
(4.15 + j 12.8) X 10-• mhos I
In a tuned circuit the reactive part of the output admittance would be tuned out
so that: I
= 60 ohms
R,
Ro
Gm
= 2400 ohms
= 10 log (8.75) = 9.43 db
I
30
I
I SMALL SIGNAL CHARACTERISTICS
I INPUT IMPFDANCE (3)
I MATCHED INPUT IMPEDANCE* Zim = Oj [D -jCJ + jbj

hthr
(4)
OUTPUT ADMITTANCE (5)
I MATCHED OUTPUT ADMITTANCE*

h j +Zg
(6)
I CURRENT GAIN
io
A· =-•----
1 ii l+hoZL
ht
(7)
I VOLTAGE GAIN
Av=vr•
Vo I
hi (l+hoZL)
(8)
hr - ZL hf
I OPERATING POWER GAIN (LOW FREQUENCY ONLY, Zg=Rg,ZL•RL)
I POWER INTO LOAD

G = POWER INTO TRANSISTOR (9)
I MATCHED POWER GAIN*
I MATCHED UNILATERAL POWER GAIN

(hr= 0)
o'+b2f
Gmu = ---'----- =
401 Oo
(II)
I Z9•R9+jX9 = OUTPUT IMPEDANCE OF GENERATOR
ZL • RL + jXL • IMPEDANCE OF LOAD
I * FOR MATCHED CONDITIONS
I Z1m :i:
Zom•RL - jXL
R9 - jXg
2oj ao
I hj•Oj+jbj
hr• Or+ jb,
F= Or Of - br bf
OiOo
ht= Of+ j bf
I ho• oo + j bo
D • ✓1-F-c 1
I raANSlsro• c,acu,r fQUA TIONS WITH H-PAa.AMETas
FIGURE 3.9
31
I
_ _____.j
'-----4_._L_A_R_G_E_s_1G_N_A_L_c_H_A_R_A_c_T_E_R_1_s_T_1_c_s I
The large signal or d-c characteristics of junction transistors can be described in
many cases by the equations derived by Ebers and Moll (Proc. IRE, December, 1954).
These equations are useful for predicting the behavior of transistors in bias circuits,
switching circuits, choppers, d-c amplifiers, etc. Some of the more useful equations are
I
listed below for reference. They apply with a high degree of accuracy to germanium
alloy junction transistors operating at low current and voltage levels, but are also useful
for analyzing other types of transistors.
I
PARAM ETERS
The parameters used in the following large signal equations are listed below and
I
indicated in Figure 4.1.
le
I
I
I
80-----------11----------□ B
PJUtAMfTERS USED IN LARGE SIGNAL EQUATIONS
FIGURE 4 . 1
I
l eo = l oso Collector leakage current with reverse voltage applied to collector and
emitter open circuited (leo has a positive sign for NPN transistors and
I
a negative sign for PNP transistors)
Emitter leakage current with reverse voltage applied to emitter and
collector open circuited (IEo has a positive sign for NPN transistors and
a negative sign for PNP transistors)
I
Normal alpha, small signal common base forward current transfer ratio
from emitter to collector with output a-c short circuited, low current
and voltage levels (a. has a positive sign for NPN transistors and PNP
I
transistors)
Inverted alpha, same as a.N but with emitter and collector interchanged
Ohmic resistance internal to transistor in series with base, emitter and
I
collector leads respectively
Is, IE, le 0-C currents in base, emitter and collector leads respectively, positive
sense of current corresponds to current How into terminals
Bias voltage across collector junction, collector to base voltage exclu-
I
sive of ohmic drops (across Rs, Re), forward bias is positive polarity
Bias voltage across emitter junction, emitter to base voltage exclusive I
VEs, V c R, V e i,;
of ohmic drops (across Rs, RE), forward bias is positive polarity
Terminal voltages, emitter to base, collector to base, collector to emitter I
A=~
KT
1/A = 26 millivolts at 25°C
32
I
I LARGE SIGNAL CHA RA C TERISTICS
q Electronic charge = 1.60 X 10- 111 coulomb
I K
T
Boltzmann's constant= 1.38 X 10- 23 watt sec/°C
Absolute temperature, degrees Kelvin = °C + 273
I
BASIC EQUATIONS
I (4a)
I a, Ico
1 - ClNCl l
(eAf/>c -1) (4b)
lc_o_ _ (eAf/>c -1)

I l e=+
1-
aN ho
ClN Cll
(eAf/>E - 1) - __
1 - ClN Cll
(4c)
Under normal operating conditions, the collector is reverse biased so f/>c is negative.
I If the collector is reverse biased by more than 0.10 volts, then eAf/>c 1 and can b e
eliminated from equations 4b and 4c. The equations given below are derived from
equations 4a, 4b and 4c.
<<
I COLLECTOR LEAKAGE CURRENT ( l c1:o)
+Ve£> 0 .1 volt
I l coo
I I a =0
l cEO = __,.._lc_o_
1- CIN
(4d)
I l cEo is the collec tor leakage current with the base open circuited and is generally
much larger than Ico.
I COLLECTOR LEAKAGE CURRENT ( l cES)
+ VcE > 0.1 volt
I l cEs
I 1-
l co -
lcEs= .....,...--
ClNCll
(4e)
I l o,:s is the collector leakage current with the b ase shorted to the emitter and equals the
leakage current the collector diode would have if the emitter junction was not present.
Accurate values of a N and a, for u se in the equations in this section are best obtained
I by measurement of I co, IcEo and I cEs and calculation of G N and a, from equ a tions 4d
and 4e. The value of I Eo may be calculated from equation 4a.
33
LARGE SIGNAL CHARACTERISTICS I
COLLECTOR AND EMITTER LEAKAGE CURRENT-
COLLECTOR AND EMITTER JUNCTIONS REVERSE BIASED
I
Ic- = ~-o (1 -
1 - a.xa.1
a.1) (4f) I
L: = ....!t~o (1 -
1 -
a.x)
a.x a.,
(4g)
I
--
Equation 4f indicates that if bo th the e mitter and the collecto r arc reverse biased the
collector le aka ge c urre nt will b e less tha n I co a nd the e mitte r l eakage c urre nt will b e
less than h o. The reverse base curre nt will b e g reate r than Ico, but will b e less tha n
I
I co/a.x. F or e xample, if a.x
Is =
= 0.99 a nd a., = 0.90 the n l e = 0.92 Ico, I.: 0.09 l•:o and
- 1.004 Ico. This re lationship indicates the advantage of using transistors in the
inverted connection (collecto r a nd emitter interch an ged) whe n a low leakage c urrent is
=
I
d esire d in switching c ircuits.
COLLECTOR LEAKAGE CURRENT ( lcER)

I
+ VeE > 0.1 volt
! l c•;R
I
I c ,:rn = __
1 -
(1 +
+
a.xa.1
AI.:oR ) l c_o _
ARho (1-a.i-)
_ ( 4h) I
R
Ic ,rn is the collector le akage c urre nt m easured with the e mitter grounded and a resistor
I
R b e tween b ase and ground. The size of the resisto r is gen erally about l0K. From
equation 4h, it is seen that as R b ecom es very large l e t:•t approach es I<'m ( E q ua tion 4d).
Similarly as R approaches zero, Ic ,rn approach es Jc..;:; (Equa tio n 4e). I
COLLECTOR LEAKAGE CURRENT -
SILICON DIODE IN SERIES WITH EMITTER
I
+Ve> 0.8 volt
l le
I
R
Vo
l e= -
(1 + AL,:oR -
..:.....--=--
1 - a.i-a.1 +
a.1AV0) l co
ARL-:o (1-a.x)
(4i)
I
This circuit is useful in some switching applications where a low collector leakage
c urrent is required and a ne gative s upply voltage is not ava ilable for reverse biasing
I
the base of the tran sistor. The diode voltage V o used in the equa tion is m easured at a
forward curre nt equal to the l co of the tra nsisto r. This e quation holds for values of l e
larger than Ico.
I
34
I
I LARGE SIG NAL CHA RACTERISTICS
COLLECTOR TO EMITTER VOLTAGE -
I COLLECTOR OPEN CIRCUITED
l e= 0
I 1
A
1
ln - -
a1
( 4j)
I The second te rm in eq uation 4j indicates that the value o f Ve t: for sm all values of In
is d e te rm ined b y the value o f a,. As a, a pproach es unity, the second term in equa tion
I 4j will a pproach zero. This indicates the a d vantage o f us ing a transisto r in the inverted
connection if a low voltage drop in a switching ci rcuit is d esired . Equation 4j a lso
indicates tha t the series emitter r esista n ce m ay b e obtained by m easuring the a-c
resistan ce R E = 6 V c.:./ 6 h. The series collector resistance can b e m easured in the
I s ame manne r if the tra ns isto r is inverted .
I BASE INPUT CHARACTERISTICS
for le = 0 :
I 1
A
(4k)
for Vet: > 0 .1 volt :

I VaE = I " (Rn + - Rt: ) + - 1 - Jn [ _In (1- axa,) + 1 + a :-(1- a ,)] (41)
1 - a :- A h o (1- a N) a, (1- a x) ·
I A com parison of e q uatio ns 4k a nd 41 ind icates that they are a pproximately equ al if
R .:. is small a nd a x is s m aller than a , (1 - a x >>
1 - a,). F o r this condition , the b ase
I input ch ar acteristic will b e the sam e whe the r the collector is rever se biased or op en
circ uite d.
I VOLTAGE COMPARATOR CIRCUIT

Is
• + V ee
I fo r V o= V ('('
Ia = ~ [ l + ( ~a "-) ( 1 - a,)] (4m)
I RL ,
If an e mitter follo~ r is overdriven s u ch tha t the b ase curre nt exceed s the e mitter
1 - ax
I c urrent the emitter voltage can b e m ad e exactly equal to the collecto r volta ge . F or
example, if a square w ave with an amp litude greate r than V c c is a pplied to the b ase of
the transistor the output voltage V o will b e a squ are w ave exactly equal to V c c •
Equa tion 4m g ives the b ase curre nt required for this conditi on and indicates that the
I tran sistor sh ould b e u sed in the inverted connection if the required base c urrent is to b e
minimized. This circuit is useful in voltage compar ators and similar c ircuits where a
p recise setti n g o f volta ge is n ecessary.
35
I
_ _ _ _ _ _ _ _ _ _ _s_
. _s_1A_s_1_N_G
____________ I I
One of the basic problems involved in the design of transistor amplifiers is estab-
lishing and maintaining the proper collector to emitter voltage and emitter current
(called the biasing conditions) in the circuit. These biasing conditions must be main-
tained despite varations in ambient temperature and variations of gain and leakage
I
current between transistors of the same type. The factors which must be taken into
account in the design of bias circuits would include:
1. The specified maximum and minimum values of current gain (hn:) at the oper-
I
ating point for the type of transistor used.
2. The variation of h••s with temperature. This will determine the maximum and
minimum values of hFE over the desired temperature range of operation. The
variation of hn: with temperature is shown in Figure 10.7 for the 2 525
I
transistor.
3. The variation of collector leakage current (Ico) with temperature. For most
transistors, Ico increases at approximately 6 .5-8%/°C and doubles with a tem-
I
perature change of 9-11 °C. In the design of bias circuits, the minimum value of
I co is assumed to be zero and the maximum value of Ico is obtained from the
specifications and from a curve such as Figure 10.6. If silicon transistors are used,
it is best to use the specified high temperature Ico for estimating the maxi-
I
mum I co.
4. The variation of base to emitter voltage drop (Vnt:) with temperature. Under
normal bias conditions, Vs•~ is about 0.2 volts for germanium transistors and 0.7
I
volts for silicon transistors and has a temperature coefficient of about -2.5 milfi-
volts per °C. Figure 5.1 shows the variation of Vo•~ with collector current at
several different temperatures for the 2N525. ote that for some conditions of
high temperature it is necessary to reverse bias the base to get a low value of
I
collector current.
5. The tolerance of the resistors used in the bias networks and the tolerance of the
supply voltages.
I
-
l.,.,-'""
- ..,.,•c I
~
/
o•c
I
-
I
- -
25't
/'
/
(/ l....--- - •c
----
cc
t,I
ct: .1::
70't
I
CD
0 (
/ ---- i.--
r
a: ,/"'
~ I 0
w
+ I -,
.100
-2 •3 -4 •5
EMITTER CURRENT- IE - MIWAMPERES
-6
I
INPUT CHARACTERISTICS Of 2N525 (VcE - ,v)
FIGURE 5 . 1
I
36
I
I BIASING
Two of the simpler typ es of bias circ uits a re show n in Figures 5.2 and 5.3. The e
I c irc uits can b e u sed only in cases whe re a w ide range of collector voltage can b e
tolera te d (for Figure 5 .2 a t least as great as the specified range of h n:) a nd where
hn:"'ax times Ico"'u is less tha n the maximum desired bias c urre nt. e ither c irc uit can
I be used with tra nsisto rs which do no t h ave specificatio ns for m aximum and minimum
h••E unless the bias resistors ar e selecte d individually for each transistor . The circuit of
Figure 5.3 provides u p to twice the stability in collecto r c urre nt with ch an ges in h .-.:
or Ico than the circuit of Figure 5 .2 . H ow ever, the circ uit of Figure 5 .3 h as a-c feed-
I b ack thro ugh the bias netwo rk which reduces the gain and input impe d ance slightly.
This fee dback can be reduced by using two series resistors in place of R:: and connect-
ing a capacitor b etween their commo n po int and g round.
I +Vee
I
I
I FIGURE 5 . 2
TRANSISTOR 8IAS CIRCUITS
FIGURE 5.3
I In cases whe re m ore stability is desire d than is provided by the circ uits of Figure
5.2 or 5 .3, it is necessary to use a resistor in series w ith the e mitter of the tra nsisto r as
shown in Figure 5.4. There are several variations of this circ uit, all of which may b e
I obtaine d by the gene ral d esign procedure o utlined b elow .
---o+Vc c
I
I
I hFE = -
a
1- a-
I
8ASIC TRANSISTOR 81AS CIRCUIT
I FIGURE 5 . 4
For the c irc uit of Figure 5 .4, the following equations apply:
=
I It:
VB = [
(h rE +
Ro
(hn-:
1) ( IB + l co)
+
1)
+ Rt: ] It: + Vs E - l coR s
(Sa)
(5b )
37
BIASING I
Considering bias conditions at the temperature extre mes, at the minimum tem-
p erature, Lll will h ave its minimum value a nd the worst conditions would occur for
h FE -- llJl'E
t. mi n, V B E -- V BE max, I CO -- 0 or I
JI min+ V
a t lowest temperature : VB = [ h
FE
Rs
mi n
+1
+ R8 E
and at the highest t emperature of operation h will h ave its m aximum value a nd the
worst conditions wo uld occur for h ,.E = h 11Emax, VsE =
V uEmln, l oo = l oomax.
BE
max (Sc)
I
at highest
t emperat ure:
V8 = [ h
FE
Rs
max
+l
+ R B JIEmax+ v BEmln_ l CO max R.
8
(5d)
I
from these two equations the value of R s can b e calcula ted:
Rs = --(
I max - _ J
''--E_ _
J m ax
_
min) R + V '_min
E_--'-_£___,__ _ s.;..E
IE max
+
_ _-_ _
1
.,
V u;_E_
..,.m l n
max_
(Se)
I
CO - h11Emax + 1 h n :mln + 1
As an e xample, conside r the followin g bias circuit design :
1. Select the tran sistor type t o b e used (2 N525).
I
2. D etermine the re quire d ra nge of te mperature
0 °C to + 55°C
I
3. Select the supply voltage a nd load resist ance
Vee= 20 volts; R t= 7 .5K
4. D e termine l comax :
I
From the sp ecific ations the upper limit of l oo is 10 µ.a at 25°C a nd from
Figure 10.6 l oo will increase by a factor of 10 at 55°C, t h us Icomax = 10 X 10 =
100 µ.a.
5. D e te rmine the values of h umtn and h .-Emax
I
From the specifications, the range of h FE at 25°C is 34 to 65. From Figure
10.7 h FE can ch a nge by a factor of 0 .75 at 0 °C and by a factor of 1.3 a t + 55°C .
Thus h.li'&mln = 0 .75 X 3 4 = 25 and h vEmax = 1.3 X 65 = 85.
I
6 . D e termine the allowable range of I &:
In general, the variation of the circuit p erformance with e mitter c urrent
d etermines the allowable range of emitte r c urrent. In some cases the allow able
I
range of emitter current is d e termine d by the p eak signal volta ge required
across R t,
Assume that the minimum curre nt is .67 m a which gives a minimum voltage
of 5 volts across R t and the maximum emitter current is 1.47 ma which gives a
I
m aximum voltage of 11 volts across Rt , The allowable range of e mitter curre nt
must b e modified to take into account the tolerance of the bias resistors. Assum-
ing a bias n e twork u sing three 5 % resistors, then
I
Jsm ln = (1 + 3 X .05) (0.67) = 0 .77 ma a nd
I Emax = (1 - 3 X .05) (1.47) = 1.25 m a
7 . E stimate the values of vBEml n and Vs&max
I
From Figure 5 .1 V uEm ln at 55°C and I & = 1.47 ma is ab out 0.08 volt,
V u&max at 0 °C and I& = 0.67 ma is ab out 0 .17 volt.
8. Calculate the value of R s from equation 5e
I
R s= 4.17 R E - 0.78K
9. U sing the e quation trom (8), choose a suitable value of Rs a nd Ri;;:. This involves
a compromise since low values of R E r equire a low value of Rs which shunts the
I
38
I
I BI A SI N G
input of the stage and reduces the gain. A high value of RE reduces the collector
I to emitter bias voltage which limits the peak signal voltage across RL,
Choose RI,)= 2.7K for which Ro = 10.4K. This gives a minimum collector to
emitter voltage of 20 - (2.7 + 7.5) 1.47 = 5 volts.
I 10. Calculate Vu using equation 5c

Vu = 2 .56 volts
11. Uthe bias circuits of either Figures 5.5 or 5 .6 are to be used, the values of the
I bias resistors can be calculated from the values of Ru, RE and Vu obtained in
the preceding design by the use of the conversion equations which are given.
In these figures Rs represents a series resistance which would be present if trans-
former coupling were used in which case Rs would be the d-c resistance of
I transformer secondary. In cases where capacitor coupling is used Rs will usually
be equal to zero. A comparison of Figures 5.5 and 5.6 indicates that the circuit
of Figure 5.6 is superior in that for a given bias stability, it allows a lower value
I of the emitter resistor or larger values of the base resistors than the circuit of
Figure 5.5. On the other hand, the circuit of Figure 5 .6 gives a-c feedback
through the bias circuits which may be a disadvantage in some cases.
For the circuit of Figure 5 .5, assume R s =
0. Then R3 = RE = 2 :7K,
I R1 = 77K or, choosing the next lowest standard value, R1 ~ 6§1(. Usirig this
value, calculate R2 = l0K. For the circuit of Figure 5.6 as before R'1 = 68K
and R'2 = 1~. Resistor R'a is calculated as 1.73K or, using the next highest
I standard value, R'a = 1.8K.
. - - - - --+--o+~e
I (----o
(Re-R 1 lVee
R1•.....;;"--...;;........;;..;;..
R1Ve
Ve
R 2 • -----------
I
Vee -Ve
I VOLTAGE DIVIDER TYPE BIAS CIRCUIT
I FIGURE 5 . 5
I
I
I
I VOLTAGE DIVIDER TYPE BIAS CIRCUIT WITH FEED8ACK
FIGURE 5.6
39
BIASING I
TH E R MA L RUNAWAY
When a transistor is used at high junction temperatures (high ambient temperatures
and/or high powe r dissipation) it is possible for regenerative heating to occur which will
result in thermal run-away and possible destruction of the transistor. In any circuit the
I
junction temperature (T,) is determined by the total power dissipation in the transistor
(P), the ambient temperature (T...), and the thermal resistance (K).
T, =
T ... + KP (Sf)
I
If the ambient temperature is increased, the junction temperature would increase an
equal amount provided that the power dissipation was constant. However, since both
hEE and Ico increase with temperature, the collector c urrent can increase with increas-
I
ing t emperature which in turn can result in increased power dissipation. Thermal run-
away will occur when the rate of increase of junction t e mperature with respect to the
power dissipation is greater than the thermal resistance (6 T,/ 6P > K ~
Thermal run-away is generally to be avoided since it can result in failure of the
I
circuit and possibly in destruc tion of the transistor. By suitable circuit d esign it is
possible to ensure e ither that the transistor can not run away under any conditions or
that the transistor can not run away below some specified ambient temperature . A dif-
I
ferent circuit analysis is required depending on whether the transistor is used in a
linear amplifier or in a switching circuit.
In switching circuits such as those described in Chapter 10, it is common to operate
the transistor either in saturation (low collector to emitter voltage) or in cutoff (base to
I
emitter reverse biased). The dissipation of a transistor in saturation does not change
appreciably with tempe rature and therefore run-away conditions are not possible. On
the other hand, the dissipation of a transistor in cutoff depends on I co and therefore
I
can increase rapidly at higher temperatures. If the circuit is d esigned to e nsure that the
e mitter to base junction is reverse biased at all tempe ratures (as for the circ uit of Fig-
ure 5.7) the following analysis can b e u sed: I
- Ico
1.,-- ---0
Vee= -3ov
I
2N527
I
The transistor power dissipation will be,
F I G UR E 5.7
I
P = IcoV CE = l co(V cc - IcoRr.)
The rate of change of power dissipation with te mperature will b e,
(5g)
I
~ = (V cc - 2IcoR L) dd1.i, =
0
(V co - 2IcoR L) cHco (Sh )
where 6 5!! 0.08 is the fractional increase in Ico with te mperature . The condition for
run-away occurs when dP/dT =
1/ K or,
I
=
(Vcc - 2lcouRr.) ~Icou
I coM =_Vee± v(Vc~r1

1/ K
where Icoi1 is the value of Ico a t the run-away point. Solving for Ico11 gives,
(8R L /(6K}
(Si)
(5j)
I
4R,.
In this equ ation the solution using the negative sign gives the value of Icou , while the
solution using the positive sign gives the value of I co after nm-away has occurred. It is
I
40
I
I B IAS ING
seen from the equatio n that the value of I co after run-away can neve r b e greater than
I V cc/2RL so that the collector voltage after run-aw ay can neve r b e less than one h alf of
the supply voltage V cc. If the term under the square root sign in the above e quatio n is
zero or ne gative, thermal run-a w ay cannot occur under a ny conditions. Also, if thermal
I run-aw ay does occur it must occur when the collecto r voltage is greater than 0.75Vcc.
Once the value of Ico" is d ete rmined from Equa tion (5j) the corresponding junction
t emperature can be de te rmined from a graph such as Figure 10.6 . The h eating due to
I co)t is found by substituting Icoy for I co in Equation (5g). Finally, the ambient t em-
I pe rature at which run-aw ay occurs can b e c alcula ted from Equation (5£).
In circuits which have appreciable resist ance in the base circ uit such as the circuit
of Figure 5 .8 the base t o em itter junction will b e reverse biased only over a limited
I te mpera ture range . Whe n the tempe rature is incr eased to the point whe re the b ase to
emitte r junction ceases to b e re verse biased emitte r curre nt will flow and the dissipation
will incre ase rapidly. The solution for this case is give n by:
I Ve = + IV
- Ic
~ - --ovcc=-3ov
I 2N527
I (Vee - 2R~tel x) ± v Vee - 2R

FIGUR E 5 . 8
IcoM = (5k)
I where Ix = VB/ Rs,
4Rt ~
In the an alysis of run-aw ay in linear amplifiers it is convenient to classif y linear
I a mplifiers into preamplifiers and p ow er amplifie rs. Preamplifiers are op e ra te d at low

signal le vels and conseque ntly the b ias voltage and current are very low particularly in
sta ges where good n oise performan ce is important. In cap acitor couple d stages a large
collector resistance is used to increase gain and a large e mitter resist ance is used to
I improve bias stability. Accordingly, thermal run-aw ay conditio ns are seldo m m et in

preamplifier circ uits.
In contrast , pow er amplifiers invariably re quire tran sistors t o op erate a t p ow er
I levels which are near the run-aw ay condition . The conditio ns a re aggravated b y the
use of biasing netwo rks of marginal st ability which are required for pow er efficiency
and b y the use of tran sformer coupling to the load which re duces the effective collecto r
series resistance. Since therm al run-aw ay in p ow e r st ages is likely to result in d estruc-
I tio n of the transistors, it is wise to use w orst case design principles to ensure that
thermal run-aw a y cannot occur. The w o rst case condition s are with h r~ ~ 00, V BE
RL = 0, a nd Ico =
= 0,
I conax. If these conditions are applied to a tra nsisto r in the gene ral
I bias circ uit shown in Figure 5.9 the tot al tran sisto r dissipatio n is given b y:
I
I FIGURE 5 . 9
41
BIASING I
= V<'dc = (Vcc -
P Vu - IcoRs) ( I co +
Equating dP/ dT with 1/ K and solving for I co11 as b efore,
(51)
I
I co:u = (Vee - R1VB) ± v(V~ - R1Va)
2
(R:i)/ (~K)- (Sm )
I
-
4Rn
where
R:i =_
8_ R_1c:_R_s_
RE+ Rs
As b efore, the solution of Equation (Sm) using the negative sign gives the value of
IcoM, while the solution u sing the positive sign gives the final value of I o after run-away
I
has occurred. If the quantity under the square root sign is zero or negative, run-away
cannot occur unde r any conditions.
In class-B power amplifiers the maximum transistor p ow er dissipation occurs when
I
the power output is at 40 % of its m aximum value at which point the power dissipation
in each transistor is 20% of the m aximum power output. In class-A pow er amplifiers
on the other h and, the maximum transistor dissip ation occurs when the re is no a pplie d
I
signal. The maximum power dissipation is obtained by s ubstituting I co)1 in Equation (51)
and the maximum junction temp e ra ture is obtained from Equation (5£).
In the design of power amplifiers the us ual procedure is to d esign the circ uit to
m eet the requirements for gain, power output, distortio n, and bias stability as described
I
in the o ther sections of this manual. The circ uit is then analyzed to dete rmine the
conditions under which run-away can occur to de te rmine if these conditions m eet the
operating requirements. As a prac tical example, conside r the analysis of the class-A
I
output st age of the receiver shown in Figure 8.16. The transistor is the 2 241A for
which K = 250°C/ watt and I comax = l6µa at 25°C and 25 volts. Calculating the circuit
values corresp onding to Figure 5.9 and Equation (Sm): I
v cc = 9 v, RE = 100 n
V8 = (1000) (9)
1000 + 4700
= 1.58 V Ro = (1000) (47001
1000 + 4700
8(100) (825)
= 825 n
= 713 n
I
_1_0_0_+.:.__
2..:..
(8_2_5.;_
) = 1.89
100 + 825
C alc ulating I coMfrom Equation (Sm),
- 100 + 825
I
6-
I co.u = - + v 0.47
- - = 1 .61 ma or 2 .02 m a
3300
Since the quantity under the square roo t is p ositive, thermal run-away can occur. The
two solutions -give the value of Ico:u (1.61 m a) a nd the value of Ico after run-away has
I
occurred (2.02 ma). The fact that these two curre nts are very nearly equ al indicates
that the change in pow er dissipation whe n run-away occurs will no t b e very la rge.
Using the value I coitll comnx =
100 the junction temperature at run-away from Fig ure
I
10.6(A) is ab o ut 92°C. The dissipation a t run-away, calcula ted from Equation ( 5 1), is
about 187 milliwatts. The rise in junctio n temp erature due to this po w er dissip ation
is (0 .25) (187)
92 - 46.7 =
=
46.7°C. The ambient temp erature at run-away is then calculated to b e
45.3°C. The above value of maxin1um tra nsistor p ow er dissipation is
I
calculated under the assumption that the series collector resistance is zero. In the
circuit unde r consideration the tra nsformer primary will h ave a small d -c resistance (RT)
which will reduce the transistor power dissipation by approximat ely (Ic)2RT whe re l e is
given by the second t erm in Equation (51). Assuming that the d-c resist an ce of the
I
transforme r is 20 ohms the redu ction in power dissipation for the case just considered
will be 18.8 milliwatts a nd the a mbie nt t emperature at run-away will be increased
to 50.0°C.
I
42
I
I
I 6 . AUDIO AMPLIFIERS
SINGLE STAGE AUDIO AMPLI FIER
I Fig ure 6 .1 sh ow s a typic al single sta ge a udio am p lifier using a 2

tra nsistor .
190 PNP
I IOOK
,---- -- ......- - - - - 12 V
I
I
I SINGLE STAGE AUDIO AMPUF/Ea
FIGURE 6 . 1
With the r esistan ce values sh own, the bias conditio ns on the tran sistor are 1 m a
I o f collector curre nt a nd six volts fro m collector to emitter. At frequencies a t

which C -1 provides good by-passing, the input resist ance is given by the formula :
Ran = ( 1 + h ,- ) hab. At 1 m a for a d esign cente r 2Nl90, the input resistan ce w o uld
be 43 X 29 o r abo ut 1250 ohms.
I · -
The a-c voI tage gam eout
-1s· approXJmate
e an
· Iy eq u al to- h-
Rr,-. F or the ctrc
lb
· wt· s h own th·1s
w o uld be _§~O or approximate ly 172.

I The freque ncy a t which the voltage gain is d own 3 d b fro m the 1 Kc value
d epends on r". This frequency is given approximately b y the formula:
I I ow f3db
n -
_v
+hfe
I
"\., 6 .28( r g CI)
I TWO STAG E R-C COUP L ED AMPL IFI E R
T h e circuit of a two s tage R -C coupled amplifie r is shown by Fig ure 6.2. The
I inpu t impedance is the same as the sing le stage am plifier and w ould be ap-
p roximately 1250 ohms.
I
I
I F IGUR E 6 . 2
43
AUDIO AMPLIFIERS I
The load resistance for the first stage is now the input impedance of the second
stage. The voltage gain is given approximately by the formula:
I
I
More exact formulas for the performance of audio amplifiers may be found in
Chapter 3 on small signal characteristics. I
CLASS B PUSH - PULL OUTPUT STAGES
In the majority of applications, the output power is specified so a design will

usually begin at this point. The circuit of a typical push-pull Class B output stage is
I
shown in Figure 6.3.
I
FROM
DRIVER
STAGE
I
I
' - - - - - - - - - - - - ~~ - - -Ecc
FIGURE 6 . 3
The voltage divider consisting of resistor, R and the 47 ohm resistor gives a slight
I
forward bias on the transistors to prevent cross-over distortion. Usually about 1/ 10 of
a volt is sufficient to prevent cross-over distortion and under these conditions, the
no-signal total collector current is about 3.0 ma. The 8.2 ohm resistors in the emitter
I
leads st abilize the transistors so they will not go into thermal runaway when the junc-
tion t emperature rises to 75°C. Typical collector characteristics with a load line are
shown below: I
COLL.ECTOR CURRENT
I: MAX
I
Ecc
NO SIGNAL OPERATING
POINT
I
COLLECTOR VOLTAGE
FIGURE 6 .4
I
It can be shown that the maximum a-c output power without clipping using a push-
pull stage is given by the formula:
P O\lt -_ -In,
-
u Vet;_ I
2
\Vhere V ct: =
collec tor to emitter voltage
Since the load resistance is equal to
_
R L-
Vc-t:
lm u
-
at no signal.
I
44
I
I AUDIO AMPLI FIERS
and the collector to collector impedance is four times the load resistance p e r collector,
I the output power is given by the formula :

Po= _ 2 V e&'
Rc-c
(6a)
Thus, for a sp ecifie d output pow e r and collector voltage the colle<-tor to collecto r load
I resistance can b e d ete rmined. F o r o utput p ow ers in the order of 50 row to 850 row,
the load imped an ce is so low that it is essentially a sh ort circuit compared to the out-
put impe d ance of the transistors. Thus, unlike sm all signal a mplifiers, no attempt is
I m ad e to m atch the o utput impe dance of transisto rs in power output stages.

The power gain is given by the formula :
Power Gain
p
~ = I0 2
=-
- ---
2
RL
P In lt n R 1n
I Since Io is e qual to the curre nt gain, Be ta, for sm all load resistance, the power gain
lin
formula can b e writte n as :
= ps RRb-b
I P. G. c-c
where R c- c = collector to collector load resistan ce.

R b-b = b ase to b ase input resistan ce.
(6b)
= grounded e mitter current ga in.

I f3
Since the load resistance is d e termined by the re quired m a ximum undistor ted output
p ow e r, the p ow er g ain can b e written in te rms of the m aximum output power by com-
bining e quations (6a) and (6b) t o give :
I P. G.
CLASS A OUTPUT STAGES

= Rb-I>
2 V e'f/-
P ou t
(6c)
I A Class A output sta ge is biased as sh own on the collector characteristics b elow:
I MAX.
I COLLECTOR CURRENT
I c
I Vcs 2V ca
I COLLECTOR VOLTAGE
F IGURE 6 . 5
The op erating poin t is chosen so that the o utput signal can swing equally in the posi-
I tive and nega tive direction . The maximum output power without clipping is equal to:
p _ V o& I c
ou t -
2
I The load resistance is then given b y the formula:

RL =Ve&
le
Combining these two equations, the load resistance can be e xpressed in terms of the
I collector voltage a nd pow e r o utput b y the formula b elow :

R - Vc&:1
L-2 Po
(6d)
F o r o utput pow ers of 10 mw and ab ove, the load resist ance is very small compare d to
I the transistor o utp ut imp e d an ce and the c urrent gain of the tran sistor is essentially the
short circ uit curre nt gain Bet a . Thus for a Class A out put sta ge the po w er gain is given
45
AUD I O A MPLIFIERS
by the form ula:

I
P. G. = p_2
R 1n
RL = ff'Vn:2
2 R 1n P o
(6e)
I
C LASS A DRI V ER STAGES
For a re quired o utput pow e r of 250 mw, the typical gain for a push -pull o utput
stage w ould be in the orde r of 23 db. Thus the inp ut p ow er to the output st age would
I
b e about 1 to 2 m w . The load resistance of a Class A driver stage is th e n de termine d
by the pow e r that m ust b e furnished to the o utput st age and this load resista nce is
given by e quatio n (6d). F or o utput powe rs in the order of a few milliwa tts, the load
resist ance is n ot neglig ible in comparison to the o utput impedan ce of the transistors,
I
therefore, more exact eq uations must be used to de term ine the powe r gain of a Class A
d ri ver st age. From four te rminal netwo rk theor y, afte r makin g appropriat e approxim a-
tions, it can b e shown that the voltage gain is g iven by the form ula:
I
~=R~ ~
h tb
where h 11, =
grounded b ase input impedance.
The current gain is given by the formula :
I
Ai= ct
1 - ct+ RLhob
=
where h ob gro unded base output conduc ta nce.
(6g)
I
· T he p ow e r gain is the product of the c urre nt gain and the voltage gain , thus unlike
the formula for high power o u tput st ages, there is no simple relationship b etween
required o utput p ow er and pow er gain for a Class A driver amplifier .
I
DES IGN CH ARTS
Figures 6 .6 through 6.16 are d esign charts for d eterminatio n of tran sformer imped-
I
an ces and typical pow er gains for Class A driver sta ges, Class A o utput stages, a nd
Class B push -pull stages. The transformer-p ow er output ch arts take into account a
transformer efficiency of 75 % and therefore may b e read directly in terms of pow e r
d elivered t o the lo udsp eaker. Pow e r gain ch arts sh ow the ra tio of o utput pow er in tl1e
I
collector c irc uit to input p ow e r in the b ase circuit and therefore do not include trans-
former losses. Since the output tran sformer loss is included in the one ch art a nd tl1e
d esign p rocedure u sed below includes the driver transformer loss, it can b e seen that
the major losses are accounted for.
I
The ch arts can b est b e understood b y w orking through a typical example. Assume
a 500 mw o u tput is de ired from a 9v amplifie r consisting of a driver a nd push -pull
out p ut p air. Also the signal source h as an available powe r output of 156 m µw
I
(156 X 10-11 w atts). O verall pow er gain re quired then is:
P.G. = P out _ _§00 m~ _ 500 X 10-
Pin 156 mµw
3
=
156 X 10-0
3 .2 X 1oe I
or approximately 65 d b .
T o obtain 500 m w in the loudspeaker, the output p air must d evelop 500 mw plus
the transformer loss. I
=
P c o l l ec1or -
_ _ _P_o_ut_ _ _ _ 500 mw_ __ 667 mw
tran sfor mer eff. . 75
From Figure 6.10, a pair of 2N32l's in Class B push-pull h as a power gain of
approximately 24 .5 db at 667 mw. This is a nume rical gain of 280 so the pow er
I
re quired by the output st age is:
P l n_- -P out -
Gain
667 m w
280
= 2 .38 mw I
46
I AUDIO AMPLIFIERS
If the driver transformer is 75% efficient, the driver must produce:

I P driver -_ P into output stage _ 2.38 mw _ 3 18 m
75% - .75 - • W
The remaining power gajn to be obtained from the driver is 65 db - 24.5 db= 40.5 db.
I From Figure 6.15 the 2N322 has a power gain of 40.5 db at a power output of 3.18mw.
The output transformer primary impedance is obtained from Figure 6.6, on the
9 volt supply line at 500 mw output, and is 212 ohms or approximately 200 ohms. The
I secondary should, of course, match the loudspeaker. From Figure 6.12 the driver trans-
former primary impedance is 7000 ohms. Therefore, a 7000 ohm or even a 5000
ohm transformer can be used. The secondary must be center-tapped. Typical values of
impedance run from 1200 ohms to 4000 ohms. See the specification sheet of the specific
I output type used for the exact value of input impedance. When this procedure is used
for commercial designs it must be remembered that it represents full battery voltage,
typical power gain and input impedance, and therefore does not account for end-limit
I points.
I 1000
800
''
' '' I
DESIGN CHART FOR
I I I I .... ,...
.... ,...
.... ,...
" ........
I
OUTPUT TRANSFORMER
........
z
0
600
' ' I',.
IN CLASS 8 PUSK-PULL
AUDIO AMPLIFlERS r-r-
.::
~
400
"' . . r---. r-....
I ' r--
"
1-
(1)
I r--~
i5 I'....
I'-..
~
2 200 I"'-..
'
I'. r-.__ """<"o )'
V
' I'-.. ... "-.,. ~ o'<)' ~~>-
~"'~~"o<J ,,~~J ,~
(I)
I-
I ~
3
::i
..J
:i
100
80
60
'
' "
., o< '-.·6- I,,,
r-,..>-
,$'GI
;,o~
>-
I "
....._
r-...
' ...
......
' I"
,t V. ~A,o' I',,.
"' '
I 40
~>-
~ ~i-
......
I~ "--.
I'---. ....
"' 'I',.
I'.
' I'..
',._
:-- "'- ........
'
I 20
r-- r--
""-,._
"
'
i"" '
........
I"- ......
I'"
10
' r-......
I
100 200 500 IK 2K IOK
COLLECTOR TO COLLECTOR LOAD - OHMS
I FIGURE 6 . 6
I
I
47
I
--.----
AUDIO AMPLIFIERS
z4oo
...~
0
t;;zoo
300 ~ - -....;:: --- - - - _....,
-- --- .......... ---
........._
- -- - -
......... ....
~
~
~ ~
.........-: ...........
-- ...._ - -- -- ....__
MAX PRACTICAL POWER
2NIHAI
I
0
~
,n
........ ..... ~
.........
.........
-
, .. "-" .........
2H18TA.2H l89, 2N319
2Nl92.2N 324
- - .,. - - -
I
-100 2Hl88A,,Nl90,2N320,2 NS22
~ 80
.... 2N26&,zt,o8
i 80
'-
'
.............:: .... •
' '\. " " '
2Nl91,2i 41A,2N321,2N3.'.S
::;
.J 40
r--...
' '"
ii
I
...s
~
0
.....,
20
0
-
TYPICAL POW R GAIH
FOR CLASS 8
PUSH-PULL AMPLIFIERS
3 .0 VOLT SIJPPLY
....
I
...i ,; ~
0
10 12 14 16 18
POWER GAIN - DECIBELS
20 22 24 28 30 32
i
34
FIGURE 6.7 I
1000
850 - -- -- - - - -- - - M AX RATE
I
800
--=-
- ----
-....-.... .... --- -- ..... ,_ -
I
MAX RATE~ ~WER
!100 i,,.,._ ........:. ........ r-...,_,
~ 400 ........ ...........
.......,
;::
' -- .........
, ....... ~
I
ZN-89
0
' ........ ........ ........ l'...""i.:
0
200
.......' .,..._ - r-..., I'.. ■
I
2Nl90
.,,
It
~ [\..'\ 2Ni 22
...
.,,
!c
it
:;
100
80
80 " " " ., ,_
-- '\.
'
' '\..
'
' '\. - '
' ,-
'
' ■
Z N 1111
2 N.2S
I
~ \ \,,,\
2
...I
...i
40 '----
-
TYPICAL POWER GAI N
....__
FOR CLASS 8
PUSH-PULL AMPLI FIERS
\ \ \ \ \ r-...
l'\._ 2 Nlf6S
--
2Nl92
2N324
2N508
.. 20 '---- 4 ,5 VOLT SUPPLY

5
.., I
it
f 10
0
=r
10 12 14 18 20 22 24 26 28 so
~==
34
FIGURE 6 .8
I
POWER OAIN -OECIBELS
I
I
0
'
.... - IIIAX
I
o--
0
0
·- ~
.....
"
......
'~
'- ........
......
~
- - -·--
.......
........
....... ....... .......
.,..._ ...................
'- ,........_
- - ...
-•
MAX I I A . ~ -
2.N!_!9
%Nl90
ZN; :2 I
0
' ... ' '
' " ~ ......
''
' •
ZN191
I
' tN: S
... '
---
0
' '
Z N■
0 '
\. "\. '\ "'\. \. \... ....,
19l
2.Ni 4
t---..._tNH5
tN50e
0 TVl'ICAL P'OWCR GAIN
'
f'OR CLASS 8
l'USH-NIU. A . .LJ,.11:RS
0
,.. .,
~ 12 i.
i- - l (UPP\.YI
,. to U
POWCII GAIN-0£Clll!:LI
l4 M H llO
~
FIGURE 6 . 9
I
48
I
I A UDI O AMPLI FIERS
-
I
r
1000 MAX. RATED POWER
850 ~
- - -
--
--..
....... ._
z _ --
••
600 .......
500 -~ - I- ----...;:,. ....... - - MAX . RATED POWER
I
2
I- ....... .......
400 ,.....__
~
I-
Ill
r--.....
...... - ...... ......
- .....
......
....._,
..... .............
~ 2N~ 9
2Nt86A
I
0
it 200
I"',,.. ~ -- ' .....
■
2Nl87A
2Nl9
'- -
"-...
"' r\.
,n
I " 2N190
- 2N322
.... ..... " ,.,.,.

~~
II)
I\,. ■
,. ,. ...
I-
I- 100 2Nl88A
•:::;...,
C
,. .
2N320
■
, ,
80
11• • 1t. -
2Nl91
2N323
I
i
60
~ ..J
•
I
2N241A
I- ' 40
la
2N'/;2
2N321
::>
I I
I
2N324
•
0..
I-
::>
0 2N265
a:: 20 TYPICAL POWER GAIN 2N508
I
w
'
FOR CLASS B
0•
0..
PUSH · PULL AMPLIFI ERS
9 VOLT SUPPLY
10
0
.T,. I I I f
I 16 18 20 22
POWER GAIN- DECIBELS
24 26 28 30 32 34
FIGUR E 6 . 10
I
I
I
I .:..
z
g
I-
~
1000
850
600
500
~
-
~
,._ - ""--- -
.....
--
~
...
""""=-~
-
- -
.....
- .....
-
-......
' "' . --
·-
- MAX RATEO POWER
--
MAX RATED PO WER
- -r
•
400 2N 186A
" .....
I-
Cl)
... " "- "- ?.N l 89
I "\.'
ci "I '- 2Nl87A
'\. '- '\. I'\. '\.
~
,n 200 . 2N319
...
Cl)
\ \ \ \. \ 1
-
2Nl90
2N322
I
' \
'
I-
' 1 2N188A
100
•...,...,
C
I
2N320
80 2N191
I
--....--
j 2 N323
60
2 I J .....
2N241A
I- '
:::, 40
/
J
/
J
,J /
v . .V ,r-- ....
//
2N192
2N321
I •
a. 2N324
I-
::> -.....
0 2N265
a:: 20 2N508
w
•f
' '
TYPICAL PO WER GAIN
FOR CLASS 8
I 10
;-
0
18 20 22
PUSH · PULL A MPLIFIERS
12 VOLT SUPPLY
24
I
26
I
28
I
30 32 34
i
36
I POWER GAIN - DECIBELS
FIGURE 6 . 11
49
AUDIO AMPLIFIERS I
10 ......
' " ......
I
--z 8
......
0
i=
a:
0
I-
6
I'\.
'-
' f\..
I\.
" " ...

"'
"" ~
" "'
' "' -
I
" ' ...
(/)
0 4
~
Q
':!. "'" " "
' '-
I'\.
I'-..
['\
" I\.
' "'
.s>
'~t-0 I
(/)
I-
~
31:
_,_,
2
""' }¾I"'- "t-at'> I"\
~
' <S't-.
I\. t-0
'<>~
G-..,o
~)- K
'<>
~~G-..,o
,0
I
r,....S-~
1.0 ~ -~
~.,.
I
2 o<> ......
~ ',"<.>- .__
::> 0 .8 ~ ~ ' ...... '"
CL
I- "" " ~.s- ~)- ",
::::,
0 06
" -~"°..,o '- ""
a:
w
31: 0.4 "' ~
' f\.. "
~ I'-. ...
I
"'
0
~
CL t'\ ~
2 " i\..
::>
" ' " "' '

2
X
cl
2
0 .2
DESIGN CHART FOR
OUTPUT TRANSFORMER
IN CLASS A SINGLE -
ENDED OUTPUT STAGES
" "' I'\.
~ ~
~ ~ I
"' I'....
0 .1
ti< 2K
I
COLLECTOR
I
5K IOK
II
20K
LOAD RESISTANCE - OHMS "' "' r-.....
50K
~
IOOK
I
FIGURE 6 . 12 I
(/)
t-
i-
i
100
'-
'
....
... ......
I
I
I
I I
:J z 70 "
""" "" " "' _,..
:::!o
2j::
._!. a: 50
" "" "
DESIGN CHART FOR
OUTPUT TRANSFORMER •
-.... I
~
~t,., I'~ IN CLASS A SINGLE-
""'"
::> 0
CL I- ~--- ~- ENDED OUTPUT STAGES
._ 0 "-0<> ....
azs
I- (/)
- '<> 1"\.. IS'~ > ~~ I
I
:\..IS'~
30
a:~
~(,.. i',~
i"-,"<)-- - ~ I
wo
31:-
oV 20
~
~IS'~
<'.>- " - ~
)-
"'"'~"''
a.. -
2
::>
" :'\.
"" I
"
:! "t'\
"'
X
~
2 10
~ t'\
100 200 !500 IK 2K 5K IOK
COLLECTOR LOAD RESISTANCE - OHMS
FIGURE 6.13
I
I
50
I
I AUDIO AMPLIFIERS
I
I
I
100 c---""' ,__ - ~ - --- ~-- --- --- --- - - -MAX- RATED
- - --- POWER
I "- ......
' ... ' ' '\.
l
80 .....
~,, \
'-
60
!50
40
-- ~ "- ~ - -\.- " --~ --·- --- --- MA~ RAT~D_POWER
.. ~
I ~, ~,
'\ \\ .-
2Nl86A
z
2
20
\
\
\
\ - \ \\ -----
l-\--
\~ ~ L.--- 2Nl89
I
I I- 2Nl87A
.... - - ---- -
1- :1\ ----
a::
~
-\
~
0 2N319
I
I-
en 10 2Nl90
0
•• I •• • I I 2N322
8
'ti- ~ I
,_ I
I
in I 1 2Nl88A
en
I-
i
6
4
\
1
1
---- ,__ ---- -
\.- \
\ l
\
, , ---
\ l
~
I
2Nl91
2N,_323
2N320
... -- ----
::;
1 ,- I
2N, 41A
2N321
I
...I
__.
:i
I
I-
::>
2
.. --- ...-
2Nl92
•
2N324
Q.
I-
::> ...---- 2N265
2N508
I 0 1.0
I
a:: 0 .8
II.I
~ l l l
0 0.6
Q. I I I I I
I 0.4
TYPICAL POWER GAi N
FOR CLASS A
0.2 SINGLE - ENDED AMPLIFIERS
I 0.1
26 28 30
I
32
6 VOLT SUPPLY
34
I
36
I I
38 40 42 44
I POWER GAIN· DECIBELS
FIGURE 6 . 14
I
I
I
51
AUDIO AMPLIFIERS I
I
I
100 ~ -
- ...... -
I- ---.ii; - - ~ .....-
- - -- ,___ - --- ~-- -- -- --
I- ~
MAX RATED POWER
I
1
....
80
60
- --
...... ' '-
.. '' _, ~,
MAX RATED
POWER
50 - ~ ~~ 1,- -- ,__
---
I
".. \. ' \. \
------- ---
40
, 2Nl86A
z
0
.... \ \ \ ___J ~~ ~
- 2Nl89 •
I
a:: 2Nl87A
0 20 ...... 2N319
.... \, ~ ~~
(I)
0
\ ~
LA~
\\ ~ L---
_ 2Nl90
2N322
2Nl88A < I
I I
~ 10
IC) ' • ' ' ,.__ 2N320
' ' ' ', .-
~
8
' '
'\ '' T', ' \
2Nl91
6
'\
~
'\ \ 2N323
........
(I)
\ L.--
\ , 18'{ \ 2N241A
C(
3
..J
..J
:IE
I
4
l
\ \ \ \~
\ \ U--\-
-
~
-
-
_2N192
2N324
2N265
2N508
I
2N321
2
....
I
l - ---
::::, \ \ \ \\ \
....
0..
\1 l\
::::,
0 1.0
a:: 0 . 8
\.. ' ' ' ....
• ' l
• "\ • •
.....
3
0
0..
0 .6
0.4
-
,..._ TYPICAL POWER GAIN
I
I
\
'\ '\
\ I
l I I
\\\ I
FOR CLASS A
0.2
-
-
SINGLE - ENDED AMPLIFIERS
I
9 VOLT SUPPLY
I I I I
I
0.1
26 28 30 32 34 36 38 40 42 44 46
I
POWER GAIN - DECIBELS
I
FIGURE 6 . 15
I
I
I
52
I
I AUDIO AMPLIFIERS
I
I
I 100 - -- - - ·~ ' - i~ --- - - ...J:!.A~A.!f_D
.... ~
I
80 ......
' ' '
'" ' '
60
50
40
--- - - \ -- ~-' r\- \\-
_:.._
l ~
- - - MAX.
-- RATED POW
-
\ \ \ \ \\ - 2Nl86A
I --z
0
.:: 20
\ \ ,~\ ' ~ L-------
L--- ~
- 2N189
■
2Nl87A
2N319
--- ll--L---
a: ..--
\ ... I\"\ L-- Lo.--
I
....
0 _ 2Nl90
I
'
2N322
~
~~
- I\' -·~ -
0
~ 10
ll - "
2N188A
2N320
'"\
IC) ll ll
8
" ll ll
....
U)
~ ·
\ -"'"" l
_2Nl91
2N323 I
I
6
....
~
\
\
\
\
r-
1 ,-
\ 1 _i---
2N241A
,
~ 4 2N321
~ l \ \ I.oil -
~~ 2Nl92
2N324
•
~
\ \. i---
'
2 TYPICAL POWER GAIN
I ....:::,
I
....
Q.
2 ... FOR CLASS A
SINGLE-ENDED AMPLIFIERS,
- 12 VOLT SUPPLY
\ ...--
_2N265
2N508
'
:::,
0
I a:
u,
~
0
CL
0 .8
0 .6
l l I I l
I
0 .4
0.2
I 0 .1
28 30 32 34 36 38 40 42 44 46 48
I POWER GAIN-OECI BELS
I FIGURE 6 .1 6
I
I
I. www.SteamPoweredRadio.Com
53
A U DIO AMPLIFIERS I
AMPLIFIER CIRCUIT DIAGRAMS
.O5..u f
I
o---1~
AUDIO
G.E. 2N107
2000..n.
HEAD
PHONES I
INPUT
I
27K
. 5W 3V T+
-- -- - I
SIMPLE AUDIO AMPUflER
FIGURE 6 . 17
I
l.)lfd (3V) 2Nl07
I
2K
INPUT+ -
2N170
PHONE
I
+3V
I
R SHOULD BE ADJUSTED FOR OPTIMUM
DIRECT COUPLED "8ATTERY SAVER" AMPUFIER

RESULTS
I
FIGURE 6 . 18
I
G.E.
2NI07
2K.n
I
PHONES
(MAGNET le) I
22K
I
RESISTORS .5W
I
CODE PRACTICE OSCIL.LA TOR
FIGURE 6.19
I
54
I
I AUDIO AMPLIFIE RS
I
I AUDIO
INPUT
II<
I SW
Tl• TRI AD A·81X
OR EQUIV.
T2 • TRIAD S-51X
I 22 K OR EQUIV
SW ALL RESISTORS
. 5W
6V 6V
I LOUDSPEAKER AUDIO AMl'UflfR

FIGURE 6.20
I
I
I "11
I
I TRt
I
♦
SW 9V
1 ~11M~
I
I
I
I L-
R 1,- - - 220,000 OHM

"2, - - - VOLUME CONTROL 10,000 OHM
1/2 W AUDIO TAP£R
Cl - - e,-td , 12V
C2 --100,-fd , 3V
C3, C4 ,-50,-fd, 12V
MAXIMUM POWER OUTPUT
_J
MAXIMUM POWER OUT AT 10%

HARMONIC DISTORTION : 25 WATTS
35 WATTS
I
R3, - - - &e,OOO OHIII Cs, - -.02,,.fd SEN SITIVITY FOR 50 MILLI WATTS
R 4 ~ 10,000 OtW TR1, - G E. 2Nl92 OR 2N265 REFERENCE POWER OUTPUT 2 VOLTS
R 5 , - - 4 70 OHM rRz, TR3,-G E . 2N241A FOR USE W ITH MAG N ETIC CAR TRIDGE
**
OMIT RI, I N THIS CONDITION SENSITIVITY
Re, - - 220 OHM T1 - - - 6 K0/5K0CT
5 MILLIVOLTS
R7,---1eo o OHM T2---500 Q CTI VC
R 9 , - - 330MM ALL MSISTORS .SW
I
Rg,"ic).-- &2 OHM
Ru,- - -4.71( OHM
* P'Oft l'URTl'IER co•u•ONENT INl"OMIATION !IEE ...a: 328
TH1tff TRANSISTOR PHONO AMPUflfR
I FIGURE 6 . 21
55
►
C
Ru 0
G.E. RELUCTANCE 0
INPUT
c, ,,►?
R3
r-
"I
HI LEVEL CARTRIDGE
"':u
* T2 en
c,
TO SPEAKER
- ., • • •' r
R1 R2 ~ R4 C2 R6 R9<R9,
'-C:> 1 I 1 9 VOLTS
1 11
':" -= 1 1~
C3 ♦ R7
en Ca ~
O')
~
- - _J
I - - -
FREQUENCY RESPONSE R1,-5000 OHM VOLUME ~TROL MAXIMUM POWER OUTPUT : .75 WATTS
OF FOUR TRANSISTOR AMPLIFIER 1/2 W AUDIO TAPER R13,---47 OHM MAXIMUM POWER OUT AT 10% HARMONIC
R2, --150,000 OHM R14, RJ5,-- 8.2 OHM DISTORTION : .45 WATTS
MAXIMUM 8ASS POSITION
MAXIMUM TIIEIILE POSITION········ ··
DISTORTION AT 100 MILLIWATTS
R3,--470,000 OHM C1,C3,C7,C9,-501&fd, 12V AT 100 C/ S : 5•1.
•51 R.t,--10,000 OHt.l C2,C6,--501'fd, 3V AT 1000 C/S : 2%
R6,R9,-4700 OHM C4, ---15,afd, 12V AT 5000C/S : 5•4
ol ,-~ t-··- -1 R7,--IOOO OHM C5,---.021&fd SENSITIVITY FOR 50 MILLIWATTS REFERENCt
-·' Re, --33,000 OHM TR1 ,TR2,-G.E. 2Nl91 OR 2N323
POWER OUTPUT : CRYSTAL CARTRIDGE : 150 M V.
db 51 #I I \: I MAGNETIC PICK UP : 2 M V.
Ru,--25,000 OHM LINEAR TR3 ,TR4,-G.E. 2Nl88A OR 2N320
- 101 i I I \ I R12,--22.0 OHM T1, - - -41</2.61< CT
---200'1 C.T .I 'IC. ALL RESISTORS .SW
**T2,
R5,R10,-470 OHM
. ,!1,f-------1.- --...L.-----'
10 101 101 10 4
AMPL I FIER LOADED WI TH 3.2 A VOICE
* FOR FURTHER COMPONENT INFORMATION SEE PAOE 328
COIL SPEAKEII IIESONANCE @ 1,0 CPS
FOUi TRANSISTOR PHONO AMPUFIEI

FIGURE 6 .22
11111. 1111 1111 1111 Ill 1111
R13
- - .. - - -
A
I
.. - - - -
R14 ,,-I TR4
I
R2 .,. r::i ,.._ TR3
T~ ~ .~I ~S6r lT2•
C2
+le,
tRI R3
INPUT
,W
C6 C10
R7
+ + = 6V
• T+
CJ\
~
• • • •• • •• •
R 1 - - 10,00C OHMS R11--2200 OHMS C1--8mfd 6V PERFORMANCE DATA•
R2--150,000 OHMS R1 2 - -4700 OHMS c2--.50 "'fd
MAXIMUM POWER
R 3 - - 6800 OHMS R13 - - 3 3,000 OHMS C3--.02 "
) OUTPUT----1.00 WATTS
R4--50,000 OHMS R14--47,000 OHMS C4--.20 " MAXIMUM POWER
BASS LINEAR R15-- 1500 OHMS C5-- .005" OUTPUT® 10%
R 5 - -IOOOOHMS DISTORTION---- .75 WATTS
Rs--10,000 OHMS Ris--330 OHMS Cg-- .10 •
DISTORTION AT
R 7 - -IOO,OOOOHMS R17--220 OHMS C7-- IOmld IV 100 MILLIWATTS :
R9--50,000 OHMS R19--1200 OHMS C9 - - I0111fd • 60c/a - -- - - - - 3.0 "X.
TREBLE LINEAR R19--33 OHMS Cg--50mfd " IOOOc/a - -- - - - 1.5 "X,
Rg--10,000 OHMS 5000c/a- - - - - - 3.0"X.
C10-- 50111fd ,.
TAPER AUDIO V.C. SENSITIVITY FOR 50 I~
R1 0 - -220,000 OHMS C11--50mld " MILLIWATTS REFERENCE
POWER OUTPUT C
*T1-- l l</IKC.T.
TRt, TR2, TR3-GE 2N323 (CRYSTAL CARTRIOG£)--3.8111v 0
TR4,TR5---GE2N321 (WITH CLIP-ON HEATSINK ) *T2 IOOQ C.T/\!C.
ALL RESISTORS .5W

►
.. f'0A FURTHER INFORMATION SEE PAGE 328 3:
"II
FIVE TRANSISTOR PHONO AMPUFIIR
FIGURE 6 .23 ~
I,~
I
' - - - - --
7 . " H I-F l" CIRCUITS
----------
I I
Transistors are ide ally suited for high :fidelity amplifiers since there is no problem
with micropho nics or hum pick -up from filam ents as there is with tubes. Transistors
are inhere ntly low impedance d evices and thus offer be tter m atching to m agne tic
pick-ups and lo udspeakers for m ore efficient po w er transfer.
1
Tra nsistor circuits with negative feedback can give the wide frequency response
and low distortion need ed in hi-fi equipme nt. In ge neral, the distortion reduction is
ab out e qual to the gain reduction for the circuit to which ne gative feedback is applie d.
I
The input and output impe d an ces of amplifie rs with feedb ack are e ither incre ased or
d ecreased , dep e nding on the form of feedback u sed . Voltage feedback, over one or
several transistor stages, from the collector decreases the o utput impedance of that
stage; whereas c urrent feedback from the emitte r incre ases the output imped ance of
I
that stage. If e ithe r of these n etworks are fed back to a transistor base the input im-
pe dance is decrea sed, but if the feedback is to the emitter then the impedance is in-
creased . The feedback can b e applied to the e mitter for effective operation with a low
I
ge nerator impedance, whe reas the fee dback to the base is effective with a high imped -
ance (constant curre nt) source. If the source impedance w as lo w in the latter case then
most of the feedback curre nt would flow into the source and not into the feedback
amplifier. The feedback connections must b e chosen to give a feedback signal that is
I
out-of-phase with the input for n e gative feedback.
Care must b e used in a pplying feedback around more tha n two tran sistor stages to
pre vent high frequency instability. This instability results when the phase shift through
I
the transistor amplifiers is sufficie nt to change the f eedback from n e gative to positive.
The freque ncy response of the feedback loop is sometimes limite d to st abilize the cir-
cuit. At the present time, the amount of feedback tha t can b e applied to most audio
power transistors is limite d b ecause of the poor fre que ncy respo nse in the common
I
emitte r and commo n collector connections. The common collector connection offers the
advantage of local volta ge feedback that is inhe rent with this connection . Local feed-
b ack (one stage only) can b e used on high phase shift amplifie rs to increase the fre-
I
quency response and decrease distortio n .
PREAMP L I Fl ERS
I
Preamplifiers have two m ajor func tions: (1) inc reasing the signal level from a
pick-up d evice to 1 or 2 volts rms, a nd (2) providing compensation if re quired to
equalize the input signal for a constant output with fre quency . I
The circuit of Figure 7.1 m eets these requirements whe n the pick-up device is a
magnetic pbono cartridge (monaural or stereo), o r a tap e he ad. The total harmonic
distortion of the preamp is less than ½ % .
This preamp will accommodate m ost ma gne tic pick-up imped ances. The input im-
I
pedance to the preamp increases with frequency b ecause of the frequen cy selective
ne gative fee dback to the emitter of TRI. The impedance of the m agne tic pick-ups will
also increase with freque ncy but are b elow that of the preamp.
I
The first two st ages of this c ircuit h ave a fee dback bias arrangeme nt for current
stabilization of b o th stages at a mbient te mperatures less than 40°C (105°F ). R2 from
the emitter of TR2 provides this DC current feedback to the b ase of TRI. R2 sho uld
b e adjusted to give 2 volts at the collector of TRI. The output stage is w ell stabilized
I
with a SK e mitte r resistance.
The AC n egative feedback from the collecto r of TR2 to the emitter of TRI is
frequency selective to compensate for the standard ARTB recording characteristic
I
58
I
I 00
HI-Fl 0
' CIRCUITS
I
[Al
TAPE
(NARTB) PHONO
I .01
I L5K -18V
I
15K
2V TR3
2N1414
TR I
I MA GNETIC
TAPE OR
PHONO
2N508
- I001,1f
LEVEL
47n + IOV
I
PICKUP
RI
NOTE ALL RESISTORS ARE
I PHONO- TAPf NfAMPUflfR

FIGURE 7.1
for tape or the standard RIAA for phonograph records. The flat response from a stand-
I ard NARTB pre-recorded tape occurs with the Treble Control (Rl2) at mid-position or
12K ohms (see Figure 7.2). There is about 8 db of treble boost with the Control at 25K
maximum position, and approximately 20 db of treble cut with Rl2 0. Mid-position =
of the Treble Control also gives flat response from a standard RIAA recording.
I
I ♦ 10 Rl2 • 251( -
-
~
0
---- t---_ Rl2..,12K
I -10
-20
........__
..............
~ Rl2• 0
I
I
I 40 IOO ! ICC 10 1$KC
I
UP[ PMAMll'l.i,1[11 llt[SPOf,JSE FROM NA.IITI Rt:COftOING
FIGURE 7 .2
59
" HI-Fl"" CIRCUITS I
The voltage feedback from the collector of TR2 decreases at low frequencies be-
cause of the increasing reactance of th.e feedback capacitor in series with the Treble
Control. Each of the two feedback networks give the desired increase in gain at the
lower frequencies to accomplish the correct compensation. If this feedback capacitor
I
were shunted by an electrolytic capacitor, the preamplifier would give constant gain at
all frequencies (in the "Tape" switch position) and the gain will decrease as Rl2 is
decreased. With this flat preamp response a tuner may be connected to the preamp
I
input with a variable attenuator network. This network might consist of a SOK poten-
tiometer in series with a lK resistor across the tuner output to ground, connect the
preamp input across the lK resistor which has one side on ground.
The RlAA feedback network (with Treble Control at mid-position) has a net feed.
I
back resistance of 6K to decrease the gain because of the higher level input. This
resistance has a .01 µf capacitor in parallel for decreasing the amplifier gain at the
higher frequencies in accordance with RlAA requirements. This eliminates the need to
I
load a reluctance pick-up with the proper resistance for high frequency compensation.
If it is desirable to build the preamplifier for phonograph use only, the compensating
feedback network would consist only of a .04 µf feedback capacitor in series with a
6K resistor (or a lOK Treble Control) which has a .01 µf capacitor in parallel.
I
The emitter-follower output stage of the preamp gives a low impedance output for
a cable run to a power ampliner (transistor or tube) and acts as a buffer so that any
preamp loading will not affect the equalization characteristic.
I
The Treble Control should have a linear taper and the Level Control an audio
taper. Two 9 volt batteries will give good life in this application since the total supply
drain is approximately 3.5 ma DC. This 18 volts may also be obtained by suitable
decoupling from a higher voltage supply that is available.
I
The preamplifier of Figure 7.1 may be altered to compensate for tapes recorded at
3¾ inches per second by setting Rl2 at 25K ohms and making the feedback capacitor
.02 µf ± 20%. In addition, the 47 ohm resistor from the emitter of TRl to ground may
I
be shunted with .5 µf to attain a relatively fiat response to 10 Kc. The value needed for
this shunt capacitor will depend somewhat on the high frequency response of the tape
head that is used, since this capacitor contributes to increased circuit gain above 3 Kc.
I
BASS BOOST CIRCUIT
The bass boost circuit of Figure 7.3 operates on the output of the preamp (Figure
I
7.1). With this addition, the operator now haii the necessary treble and bass control
I
- BASS BOOST I
I
I
SASS aoosr CIRCUIT
FIGURE 7 . 3
I
60
I
""Hl•f'I" CI RC UI TS
to compensate for listening levels, or deficiencies in program material, pick-up, speak·

ers, etc. This bass boost circuit gives the operator independent control of the level, or
amount of bass boost desired, or the level control can be used as a loudness control.
It is usually desi rable to have some method of boosting the level of the lower
I portion of the audio spectrum as the overall sound level is decreased. This is to com-
pensate for the non-linear response of the human ear as shown in the Fletcher-Munson
curves that are often referred to in the audio industry. The ear requires a higher level
for the low frequency sound to be audible as the frequency is decreased and also as
I the overall spectrum level is decreased.

Figure 7.4 shows the frequency characteristics of this bass boost circuit. With the
level control set for zero attenuation at the output there is no bass boost available, but
I as the output level is attenuated, the available bass boost increases.
I
0 OdbLEVEL-
I t---~
I ~
~
------ _ MAX"}BASE BOOST
~
MIN.
AT-20db
LEVEL -
I - 40
MAX]BASE BOOST
MIN.
AT-40db
LEVEL -
I 30 100 IKC
FREQUENCY RESPONSE Of BASS BOOST CIRCUIT
FIGURE 7 .4
ISKC
I Figure 7.4 shows the frequency response {lower dashed curve) when the output is
attenuated 40 db and the Bass Boost Control is set for minimum (SOK ohms). The solid
I curve immediately above represents the frequency response when the Bass Boost Con-
trol is set at maximum (zero ohms). Thus a frequency of 30 cycles can have anything
from zero to 27 db of boost with respect to l KC, depending on the adjustment of the
Bass Boost Control.
I The Fletcher-Munson contours of equal loudness level show most of the contour
changes involve a boost of the bass frequencies at the lower levels of intensity. There-
fore, this circuit combination fulfills the requirements of level control, bass boost and
I loudness control. This boost circuit operates with the preamp (Figure 7.1) Level Con-
trol performing the same function as the Level Control in Figure 7.3. The Bass Boost
Control may be a standard SOK potentiometer with a linear taper. The desired in-
ductance may be obtained by using the green and yellow le.ids on the secondary of
I Argonne tmnsistor transformer #AR-128.
HYBRID PREAMPLIFIER
I The hybrid preamplillcr circuit of Figure 7.5 uses a simil.ir feedback equalization
technique to that of Figure 7.1 and therefore will .1<-'<.'<>mmodatc most magnetic pick-up
61
impedances. There is a small amount of treble boost above 10 KC due to the .01 µE
capacitor from tJ1e 12AX7 cathode to ground. The Treble Control is set near mid-
position for a compensated output from a standard RIAA recording or an NARTB
recorded tape.
I
TAPE
PHONO ♦ IIO'tOC
I
TREBLE
EQUALIZATION
.001 .01
.02 220K
.05
I
tllOK 25K
20.,
-
20V
♦
R4
2N508
.05
,,.~
OUTPUT
I
MAGNETIC
PICKUP
Cl
AZ
IOOI< IOK 2.2IIEG. 2.7K
.Ot
I
= NOT£ : ALL R£SISTORS ARE i WATT
I
HYHID PHONO- TAPf PllEAMPUFIER
FIGU R E 7 .5
I
The 2N508 transistor is biased at approximately .6 ma from a constant current
source for good current stability with temperature and transistor interchangeability.
I
Rl and R2 bias the base for the desired VcE. Vo.: is in tllc range of .5 to 5 volts. This
voltage varies with leakage current of Cl, also witJ1 hvE and Ico for different transistors.
This range of Vor. bias has little effect on tlle operation of the preamplifier. Ve., may
reach saturation at ambient temperatures above 55°C.
I
The standard reference level for S/ N (signnl-to-noise) measurements in tape record-
ing is the maximum level nt which a 400 cycle signnl can be recorded at 2% harmonic
distortion. The hybrid preamplifier of Figure 7.5 is c.1pable of a S/ N of 60 db. The
I
signal output from this reference level is approximately 1.5 volts and the total harmonic
distortion of tJ1e preamp at this level is under 1%.
A dual preamp for a stereophonic disc or tape system could be built with two identi-
I
cal preamps as in Figure 7.5, using only one tube (12AX7) and two transistors (2N508).
NPN PREAMPLIFIER FOR MAGNETIC PICKUPS

I
In vacuum tube circuitry there is a problem in maintaining high S/ N ratio at low
audio frequencies because of tJ1e lower signal transfer from a magnetic pickup (tape,
phono, or microphone) lo the tube grid.
The lower input impedance of the transistor morn nearly matches the source at
I
low frequencies for a better signal transfer and thus improved S I N ratio. The input
signnl level at 100 cps has about 40 db of amplification in Figure 7.6 before it reaches
the tube grid.
I
62
I
I "" HI-Fl " CIRCUITS
This circuit has a constant collector bias current that is independent of transistor
I parameters. The collector to emitter voltage, VoF., is biased with a DC feedback net-
work from the collector which helps to stabilize Yeo:. This circuit should operate to
about 50°C ambient temperature with the 2Nl69 and to 60°C with the 2Nl67.
I
I
I
I
I
I HPH l'REAMPUFIP FOR MAGNETIC PICKUPS
FIG U RE 7 .6
I The circuit has an input impedance of about 3K ohms, and frequency compensation
of the input signal may be accomplished in a following stage.
I P OWER AMPLIFIERS
A great deal of effort has gone into developing transformerless push-pull amplifiers
I using vacuum tubes. Practical circuits, however, use many power tubes in parallel to
provide the high currents necessary for direct driving of low impedance loudspeakers.
The advent of power transistors has given new impetus to the development of
transformerless circuits since the transistors are basically low voltage, high current de-
I vices. The emitter follower stage, in particular, offers the most interesting possibilities
since it has low inherent distortion and low output impedance.
Figure 7.7 is a direct coupled power amplifier with excellent low frequency response,
I and also has the advantage of a feedback arrangement for current stabilization of all
stages. The feedback system also stabilizes the voltage division across the power output
transistors TR4 a nd TR6 which operate in a Class B push-pull arrangement. TR3 and
TRS also operate Class B in the Darlington connection to increase the current gain.
I Using an NPN for TR5 gives the required phase inversion for d riving TR6 and also
has the advantage of push-pull emitter follower operation. TR4 and TR6 have a small
forward bins to minimize crossover distortion. This bins is set by the voltage drop across
I the 100 ohm resistors that shunt the input to TR4 nod TR6. TR3 and TR5 arc biased
for the same reason with the voltage drop across the 1N91. A 68 ohm resistor would
serve the same function as the 1N91 except there would be no temperature compensa-
tion. Thermistors have also been used to compensate for tl1e temperature variation of
I the emitter-base resistance, but they do not track this variation ns well as a germanium
junction diode which has tcmpernture characteristics similar to the transistor.
63
"" Hl•Fl" C I ~
I
TR2 is a Class A driver requiring a very low impedance drive which is accom-
plished by an emitter follower TRI. TRl needs a current source for low distortion,
thus Rl and the Level Control supply the desired drive impedance. The Level Control
should be set for a value of approximately 2K ohms when this amplifier is driven by
I
the preamplifier of Figure 7.1. This will permit the amplifier to be driven to full output.
TRl has an emitter current of 1 to 1.5 ma, and TR2 has a 2 to 3 ma bias.
I
NOT( ALL ~£SISTORS All( 1WATT I
I
I
I
Wl'UT
2
I
I
SEVIN WATT ~own AMl'Uflf.
F IG U R E 7.7 I
The bias adjust R2 is set for one-half the supply voltage across TR6 and can be
trimmed for symmetrical clipping at maximum power output. TR4 and TR6 have a
beta cut-off at approximately 7 Kc. The phase shift and drop in beta gives rise to a
I
decline in transistor efficiency which causes an elevation of junction temperature. The
.001 µfd feedback capacitor from collector to base of TR2 aids in stabilizing this circuit
by reducing the phase shift and high frequency gain of this stage. The 220 µµfd capac-
itor shunting the bias network further aids the stabilization with high frequency
I
negative feedback from output to input. This circuit has -approximately 15 db of overall
voltage feedback with the 27K resistor from load to input. The speaker system is
shunted by 22 ohm in series with .2 µfd to prevent the continued rise of the amplifier
I
load impedance and its accompanying phase shift beyond the audio spectrum.
The overall result, from using direct-coupling, no transformers, and ample de-
generation, is an amplifier with output impedance of ½ ohm for good speaker damping,
and very low total harmonic distortion. The frequency response at avernge listening
I
levels is flat over the audio spectrum.
When checlcing for maximum power out at the higher frequencies, a sinewave can
be applied only for a short duration before sufficient heating for runaway results as
I
indicated above. To protect the power transistors, a current meter should be used in
series with the voltage supply for quick, visual indication of runaway while checking
power output above approximately 2 Kc. There is not sufficient sustained high fre-
I
64
I
I "HI-Fl" CIRCUITS
quency power in regular program material to precipitate this instability. Thus the
I actual performance of the amplifier does not suffer since the power level in music and
speech declines as the frequency increases beyond about l Kc.
This amplifier is capable of a 7 watt output with less than l % harmonic distortion
I into a 4, 8 or 16 ohm speaker when used with the power supply of Figure 19.3, page 202.
The power transistors TR4 and TR6 should each be mounted on an adequate heat
radiator such as used for transistor output in an automobile radio, or mounted o n a
I 3" x 3" x ¥.12" aluminum plate that is insula ted from the chassis.
STEREOPHONIC SYST E M
I A complete semiconductor, stereophonic playback system may be assembled by

using the following circuits in conjunction with a stereophonic tape deck or phono
player.
I
I
~
7WATT
# I PREAMP POWER
SPEAKER
TRACK FIG. 7.16 7.3 AMP.
I STEREO
TAPE
POWER
FIG.7.7
I
DECK
~11~1IF SUPPLY
I OR
PHONO -
9V 9V FIG. 19.'I-
l
K
PLAYER 7 WATT
#2 PREAMP POWER SPEAKER
I TRACK FIG. 7.16 7.3

AMP
FIG.7.7
I llOCK DIAGRAM OF STEREOPHONIC SYSTEM

FIGURE 7 .8
Two identical preamplifier circuits can use a common 18 volt battery supply. The
I circuitry of Figure 7.1 may be used with the switch and RIAA network eliminated if
the preamps are to be used for tape only.
The output of each preamp is fed to a power amplifier as indicated in Figure 7.8.
I Two identical power amplifiers with circuitry as in Figure 7.7 can use a common power
supply as shown in Figure 19.4, page 202. The output of each amplifier fed to its
respective speaker completes the stereo system as shown in Figure 7.8.
I DUAL 10 WATT STEREO SYSTEM
A dual 10 watt stereo system consists of two identical amplifiers with circuitry of
I Figure 7.9 using the common power supply of Figure 19.5, page 202. This power
supply has separate dec.-oupled outputs for each amplifier. The stereo system uses the
same preamplifiers as that of Figures 7.1 and 7.3.
I The power amplifier of Figure 7.9 is similar to that of Figure 7.7. Figure 7.9 uses
transistors with a higher voltage rating, and also the 2N553 transistor has a beta cut-off
frequency of approximately 25 Kc. Thus the 2N553's in Figure 7.9 give increased
65
.'..'...!il:.f.J..:.' CIRCUITS
efficiency and thus better stability at the higher frequencies. This amplifier with power
supply of Figure 19.5, page 202, is capable of a 10 watt output with less thnn 1 %
distortion into an 8 or 16 ohm speaker.
-llOV
NOTE: All llf:SISTORS I 5Mo -NO SIONAl
ARE ½'MTT .4A @ IOWATTS)
1/ZA
UJl
I OR
lln S-ER
.z
TIN WATT l"OWD AMl"U"O

FIGURE 7.9
66
I
I I. . ____ a_._R_A_o_1_o_R_E_c_E_1v_E_R_c_1_R_c_u_1T_s
_ _ _ ___,
AUTO0Y NE CON VE RTER C IRC UITS
I The converter stage of a transistor radio is a combination of a local oscillator, a

mixer and an IF amplifier. A typical circuit for this stage is shown in Figure 8.1.
I L-438
,,..
4C•t90.t,-_.,,
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FOR ADOITIONAL INFOIIIIIATION $[[ PAGE 226
l AUTODYNf COHVIJtJ'R
FIGURE 8 . 1
Redrawing the circuit to illustrate the oscillator and mixer sections separately, we
obtain Figures 8.2 and 8.3.
Tl
r----,
I I
I I
I I
I
I
I
II .-------------ot9V
PRIMARY FIGURE 8 .3
I
SCCONIIMY
t-----------------o+tV
I FIGURE 8 . 2
The operation of the oscillator section (8.2) Is as follows:
I Random noise produces a slight variation in base current which is subsequently

amplifled to a larger variation of collector current. This A.C. signal in the primary of
L. induces an A.C. current into the secondary of L. tuned by Ca to the desired
oscillator frequency. C. then couples the resonant frequency signal back into the
I emitter circuit. U the feedback (tickler) winding of L. is properly phased the feedback
will be positive (regenerative) and of proper magnitude to cause sustained oscillations.
The secondary of L, is an auto-transformer to achieve proper impedance match be-
tween the high impedance tank circuit of L. and the relatively low impedance of the
I emitter circuit.
67
RADIO RECEIVER CIRCUITS I
C. effectively bypasses the biasing resistors R. and R. to ground, thus the base is
A.C. grounded. In other words, the oscillator section operates essentially in the
grounded base configuration.
The operation of the mixer section (8.3) is as follows:
I
The ferrite rod antenna L, exposed to the radiation field of the entire frequency
spectrum is tuned by c .. to the desired frequency (broadcast station).
The transistor is biased in a relatively low current region, thus exhibiting quite
I
non-linear characteristics. This enables the incoming signal to mix with the oscil1ator
signal present, creating signals of the following four frequencies:
1. .The local oscillator signal.
I
2. The received incoming signal.
3. The sum of the above two.
4. The difference between the above two.
I
The IF load impedance T, is tuned here to the difference between the oscillator
and incoming signal frequencies. This frequency is called the intermediate frequency
(I.F.) and is conventially 455 KC/ S. This frequency will be maintained fixed since C..
and Ca are mechanically geared (ganged) together. R. and C. make up a filter to pre-
I
vent undesirable currents flowing through the collector circuil C, essentially bypasses
the biasing and stabilizing resistor R,_ to ground. Since the emitter is grounded and
the incoming signal injected into the base, the mixer section operates in the "grounded
I
emitter" connguration.
I F AMPL IFIERS
A typical circuit for a transistor IF ampliner is shown by Figure 8.4.
t\
I\
I
+9V
It
FIGURE 8 .4
The collector current is determined by a voltage divider on the base and a large
I
resistance in the emitter. The input and output are coupled by means of tuned IF
transformers. The .05 capacitors are used to prevent degeneration by the resistance
in the emitter. The collector of the transistor is connected to a tap on the output
transformer to provide proper matching for the transistor and also to make the per-
I
formance of the stage relatively independent of variations between transistors of the
same type. With a rate-grown NPN transistor such as the 2N293, it is unnecessary
to use neutralization to obtain a stable IF ompliner. With PNP alloy transistors, it
I
is necessary to use neutralization to obtain a stable amplifier and the neutralization
capacitor depends on the collector capacitance of the transistor. The gain of a tran-
sistor IF amplifier will decrease if the emitter current is decreased. This property
of the transistor can be used to control the gain of the IF amplifier so that weak
I
stations and strong stations will produce the same audio output from a radio. Typical
circuits for changing the gain of an IF ampliner in accordance with the strength
of the received signal a.re explained in the A.V.C. section of this chapter.
I
68
I
I RADIO RECEIVER CIRCUITS
I AUTO MATIC VOLUME CONTRO L CIRCU ITS

A.V.C. is a system which automatically varies the total amplification of the signal
in a radio receiver with changing strength of the received signal carrier wave.
From the definition given, it would be correctly inferred that a more exact term
I to describe the system would be automatic gain control (A.C.C.).
Since broadcast stations are at different distances from a receiver aod there is a
great deal of variation in transmitted power from station-to-station, the field strength
I around a receiver can vary by several orders of magnitude. Thus, without some sort
of automatic control circuit, the output power of the receiver would vary considerably
when tuning through the frequency band. It is the purpose of the A.V.C. or A.C.C.
circuit to maintain the output power of the receiver constant for large variations of
I signal strengths.
Another important purpose of this circuit is its so-called "anti-fading"' properties.
The received signal strength from a distant station depends on the phase and amplitude
I relationship of the ground wave and the sky wave. With atmospheric changes this
relationship can change, yielding a net variation in signal strength. Since these changes
may be of periodic and/or temporary nature, the A.V.C. system will maintain the
average output power constant without constantly adjusting the volume control.
I The A.V.C. system consists of taking, at the detector, a voltage proportional to the
incoming carrier amplitude and applying it as a negative bias to the controlled amplifier
thereby reducing its gain.
I In tube circuits the control voltage is a negative going DC grid voltage creating
a loss in transconductance (Cm).
In transistor circuits various types of A.V.C. schemes can be used:
I EMITTER CURRENT CONTROL

As the emitter current of a transistor is reduced (from 1.0 ma to .1 ma for instance)
various parameters change considerably (see Figure 8.5).
I .. ... ..
I ·= ....
'- ~ /
,I
,,
•
I ;/ ~
I'-
.
i.,l.-
- L--
-
.... ....
... ·•--
I r-.... ,,.. nt11
I
i.---
.
II
~
I
I . I
'
l'-'!'11.1' tlAt,1U
( "'&IIACUJltl.TtCI WS l • tU &'.11 C.\1~11:( lfT
•
FIGURE 8 . !5
I The effect of these changes will be twofold:

1. A change in maximum available gain and
I 2. A change in imped,mce matching since it can be seen tliat both h ••

and ho vary radically.
Therefore, a considerable change in power gain can be obtained as shown by Figure 8.6.
69
RADIO RECEIVER CIRCUITS I
,....
3l
v ...
i.---1--
Vu: •1'11
Vea alh
r--.....
......._
l'\
I
/
•
H
2 • //
/,,
1// \
I
. 22 Gt 2NllU
9
,., to
: II
/I
//
, AOC CURVE.
Pc:M[R GAIN VS EMITTUII CUAftOIT
1N,VT MATCM[O AT I1 • Ill'•
our,ur TUNED AT 4~1((
I
i .. II 1//
ZI.OAO• lettt\• \': • & VOLTS
It
10
·- I
.04 ..2 A .6
tlrill'TTE.R ClHlll[N'T • --•
A I I
F I GURE 8 .6
On the other hand, as a result of loo (collector leakage current) some

I
current always flows, thus a transistor can be controlled only up to a
point and cannot be "cue-off' completely. This system yields generally
fair control and is, therefore, used more than others. For performance
data see Figure 8.7.
r
+6
EMITTER CVRflENT
~US AVXIUAAY A.V.C DIODE
I
♦4
+2
0
IDEAL CURVE
~/
_,,.,, /
/ I
I
- .._ / EMITTER CURRENT
-2 -.._ CONTROi. ONLY
'- IOVERUlAD
-• 08TAINA8U:
CURVE
'\.
\
ABOVE .I Vltn
YIEU>S DISTOATIONI
- 6 \
\
-9
-«>
-12
I
I
-l'o.ooo.
' - -.L.-- - -0.
-'0- 0I _ _ _ _ _
O._O_I _ _ _ ___i
O._I - - - - - -
,.0
-
Sl CNAL STRENGTH IN 'IOI.TS / METER

I
FIGURE 8.7
AUXILIARY A .V.C . SYSTEMS

Since most A.V.C. systems are somewhat limited in performance, to
I
obtain improved control, auxiliary diode A.V.C. is sometimes used.
The technique used is to shunt some of the signal to ground when
operating at high signal levels, as shown by Figure 8.8.
I
70
I
I c•
RADIO RECEIVER CIRCUITS
I ,.,
COMVUITl.tl
C ..., o
I
I ...
♦
..___,.,,v,,_ _ _...,•• c
,IIION 0€TtcTOlt
I FIGURE 8 . 8
I In the circuit of Figure 8.8 diode CR, is back-biased by the voltage drops across
R, and R, and represents a high impedance across T , at low signal levels. As the signal
strength increases, the conventional emitter current control A.V.C. system creates a
I bias change reducing the emitter current of the controlled stage. This current reduction
coupled with the ensuing impedance mismatch creates a power gain loss in the shtge.
As the current is further reduced, the voltage drop across R~ becomes smaller thus
changing the bias across CR,. At a predetermined level CR, becomes forward biased,
I constituting a low impedance shunt across T , and creating a great deal of additional
A.V.C. action. This system will generally handle high signal strengths as can be seen
from Figure 8.7. Hence, almost all radio circuit diagrams in the circuit section of this
I manual use this system in addition to the conventional emitter current control.
DETECTOR STAGE
In this stage (see Figure 8.9), use is made of a slightly forward biased diode in
I order to operate out of the square law detection portion of the 1-E characteristics. This
stage is also used as source of ACC potential derived from the filtered portion of the
signal as seen across the volume control (R9). This potential, proportional to the signal
I level, is then applied through the ACC filter network C4, R7 and C5 to the base of the
1st IF transistor in a manner to decrease collector current nt increasing signal levels.
R8 is a bins resistor used to fix the quiescent operating points of both the 1st IF and the
detector stage, while C6 couples the detected signal to the audio amplifier. (Sec
I Chapter 6 on Audio Amplifiers.)
I
I cs
~
I AVC
TO COLD SIDE OF lat lF.
TRANSFOftMER
TO AUDIO
AMPLIFIER
I FIGURE 8 . 9
8 PLUS
71
RADI O R EC E I V ER C IRC UITS I
REFLEX CI R CUITS
"A reOex amplifier is one which is used to amplify at two frequencies - usually
intermediate and audio frequencies." •
I
The system consists of using an I.F. amplifier stage and after detection to return the
audio portion to the same stage where it is then amplified again. Since in Figure 8.10, I
I
I
FIGURE 8 .1 0
I
two signals of widely different frequencies are amplified, this does not constitute a
"regeneratiue effect" and the input and output loads of these stages can be split audio
- 1.F. loads. In Figure 8.11, the I.F. signal (455 Kc/s) is fed through T2 to the detector
I
circuit CRl, C3 and RS. The detected audio appears across the volume control RS
and is returned through C4 to the cold side of the secondary of Tl.
I
I
I
FIGURE 8 . 11
·- I
Since the secondary only consists of a few turns of wire, it is essentially a short
circuit at audio frequencies. Cl bypasses the I.F. signal otherwise appearing across
the parallel combination of Rl and R2. The emitter resistor R3 is bypassed for both
I
audio and I.F. by the electrolytic condenser C2. After ampli6cation, the audio signal
appears across R4 from where it is then fed to the audio output stage. CS bypasses R4
for I.F. frequencies and the primazy of T2 is essentially a short circuit for the
audio signal.
I
The advantage of "reOex" circuits is that one stage produces gain otherwise
requiring two stages with the resulting savings in cost, space, and battery drain. The
disadvantages of such circuits are that the design is considerably more difficult,
although once a satisfactory receiver has been designed, no outstanding production
I
difficulties should be encountered. Other disadvantages are a somewhat higher amount
of playthrough (i.e. signal output with volume control at zero setting), and a minimum
volume effect. The latter is the occurrence of minimum volume at a volume control
setting slightly higher than zero. At this point, the signal is distorted d ue to the
I
balancing out of the fundamentals from the normal signal and the out-of-phase play-
through component. Schematics of complete radios are on pages 73 through 83.
• F. Lansford-Smith , Radlotroo Designers Handbook, Australia, 1953, p. 11 40
I
72
I
I RADIO RECEIVER C I RCUITS
COMPLE TE RADI O R ECEIVER C IRCUIT D IAG RAM S
I
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09, - - - 10.000 OHM C14, - - - 100.11t• , 1tV (IIU - [ 0 WITH 5 MILLIWATTS OC,[ O[IOC[ ,OWU OUTPUT)
0 1 0 , - - - tt,000°"" 1'11, - - - GE 2N1081,2MOIIA IIAX I - l'OWU OUTPUT'. 75 1111.LIWATTS
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It fOII f\ll!THVI COIIIPON[NT INf'OlallATIOII SU: ,... 328
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FIGURE 8 . 20
, C111 :Jl&l.~ IWIIOIGIS-..S
4'122:) at
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113,---IOOO OHM C.,Cc,C7,Ce,C.,ct4,-.05.wff
"4,ll1 ► lli,,- 410 OHM C a , - - - - - - - 15.wf4, 12V
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111,1111,-- 33000HIII T l l 1 , - - - - - - I t t-,ZNIOH 011 ZNI081 CONVEIITER :II
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NOMINAL SENSITIVITY ISO MICIIOVOI.TS/ MEYER
l0.000 OHM 1/lW AUDIO TAP[II T l l s , - - - - - - 8 . E, ZNIHA 011 ZN!tO OUTPUT I MEASUIIEO WITH S MILLIWATTS ll('(flENCE POW[II OUTPUT l :II
1113,---4100 OHM II T 1 , - - - - - - - 5 0 0 11/VC MAXIMUM POW[II OUTPUT 7' MILLIWATTS
1114,--- 51,000 OHIII L1,-------43S.W~110... SELECTIVITY AT -14' 1.0 •C IS "'0
1111,--- 5100 OHM Lz,-------uo.-~110,i, S[l[CTIVITYAT - - &SOKC/ S
1111,---IOOO OHM Cll1,Clli,-----011117,IN- ◄ G 0 11 t•TOCA TOTAL 9.ATT(ftY DRAIN 1e o IIIIILLIAN"5 "'
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MAXIMUM POWER OU'TflUT : 00 MILLIW,UTS..
!13,flt, , - - 470 0!<111 C4 ,Ce,C1 ,C1 ,Ct ,-M,.,,. SCLCCTtYITY AT -u• : 8.0 KC I S
R4 , - - -270 0HII ~.Cto,-- lpM ,I Y S[LECTIYt TY 4T -IOO . U .0 KC/$
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• '°" , u ,nHDI COllll'ON[NT INfCMIIMATM>N SE£ PAO[ 328
SIX TRANSISTOR THJtH VOLT IROADCAST RKflVfR

CAN If ,OWflfO IY SUH 01 ILASHUOHT IATTfllfS
F IGURE 8 . 22
••
RAOK> IN'OUSTRIIES AA010 INOUSTIIICS AAOIO INCUSTRICI
• 1222 OR • 1222 OR . .223 OR
---------------- olUTOMATIC
85• 72:IG
To co,
AUTOlolATIC
as-=
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" ·• • - -- 270 OHM C9- .O:,.-f4. N0WW. SO<SITMTY : 2CIO MICIIO ..a.T S/ MCTEA
ft" , - - - 47,000 OH., c,,.c12,c0 , - - - -,o•••.-12v "'EASl#tCD WITH ,0 IILLl• TTS A£F[fl[)j(£ POwt'.111
R9, - - 220 OHM MAXI- POWEJI OUTl'UT : 200 111W
R7, R9, - - 2200 OHM
c,., _ _ _ __ .z~"·
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llu,R~,- - - 4 700 OHM T R2, _ _ _ _ _ _ G,[ . 2N2U ZVIO SIGHAI. 8AYT[RY 0IWN 8 MLLIAWS
R12, V0UM COHTIIOL T R3, G. E. 2Nlct OR 211021
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R&,.- - - - - 470 01W IO To • 3600Q/ 2000n CT
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R19, )30HM
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IO fOlt fU!T- IWOIIMAJION SEE l'Ki£ 329 ~
0
SIX TIANSISTOll SIX VOLT IIOADCAST lfCflVfR ~
0
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Cz,C3, --.01,ulo Cit~ Cllz, - ORll7, IN64G, OR CIC1'0CA OR EQUIV,
R3, - - - I ~ OHII
fl4, R,o,R15,- 470 OHII C4 ,Cg,C7,Ce,-.OS,ulO • bC~-CIO&) RIC MOOEL 242
C5, C,o, - - l,ulo, IZV II 6 CZ-99. 3)
R5, - - - 61,000 OHII
Rg, - - - no OHM ~----.o,,.,.
R7, - - - 3300 OHM C11, - - - .003,wfd
R9,- - - 10,0000H"' Cjz,C13,C14, - &0,ufd, l'V
TR1, - - - G.E. 2NIOl7 CONVERTER
R9, - - - 82,000 OHM TRz,--- G.E. 2 N293 1ST I.F.
R11, - - - 2700 OH"' NOMINAL SENSITIVITY• 200 lrlffCAOVOlTS / METER
TR3, - - - G.E. 2Nl69 OIi ZNIIZI 21101.f ( MEASUREO WITH ,0 M1LLI WATT'S REfERENOE POWER OUT.,.,T)
R1z , - - - VOLUME CONTROi.
10,000 OHM l/2W AUOtO TAPEft TR4, - - - G.E. 2Nl92 OR 2N324 DRIVER MAXIMUM POW[R OUTPUT . 6 WATTS
TR5,TRg,- G.( . 2 NIHA OR 2N 320 AUOIO SELECTIVITY AT -10 : a.o •c1s
R:13, - - - 4 700 OHM SELECTIVITY AT -&o•: ,o.o•c,s
1114, - - - 54,000 OHII
• r 1, - - - ,.00012,ooocr ZERO SIGNAL BATTERY ORAIN 70 MILLIAMP$
II Tz, - - - Z&OOCT/V. C.
..... - - - 2 2 0 0 H"'
R17.-- - 35 OHM
* r0R FURTHER COMPONENT ..,OIIIIATION SEE l'AGt: 328
SIX TIANSISTOI NINE VOLT SUPflHfTDODYNE IIOAOCAST IKffVM

FIGURE 8 . 24
PUSH·PULL
~~ AIOO OUTPUT
AUTOMATIC AUTOMATIC AUTOMATIC I
---------------- EX0~4110
CRl
!'.X05460 lXO-~OR
8S614G
~~
ti
~ - '
R1. R11.--uoo OHM Ci,- - - - 02pfd • T1, -- --20ooneoo CT
R2, - - - 33,000 OHM C2.C3,--.04pt4 II Tz,----2000 CT/VC
R3,----1soo OHM C4,Cg,C7,Ca,-,lpfd L1,---- ◄35phtto,
R4,R10,R15,-470 OHM C5,----6pld, t2V Lz,----250pht 10,
R5. ---100,ooo OHM C 9 , - - - .05pfd
6C1,-190.6} Rlt MOOEl:
R6,----330 OHM c,o,---lpfd, 6V 6Cz,-H.3
R7,R13,--4700 OHM C 1 1 , - - -.003pfd CR1,CRz--lN64 OR IN29' OR EQUIV.
Ra,---2200 OHM C1z,C13,C14,-50pfd. 12V
R9,----2, 700 OHM C 1 5 - - -. 2pfd
I~
R12,---VOLUIIE CONTROL TR1,--- GL 2Nl087 I~
10,000 OHM 1/ZW AUOIO TAPER CONVERTEll NOMINAL SENSITIVITY : 150 IIICIIOVOLTS/IIETER 'O
R14 ,---1s.ooo OHM ( MEASURED WITH 50 MILLIWATTS REFERENCE
T"2, - - - G . £ 2N2931ST I F.
POWER OUTPUT) :u
Rig,---220 OHM TR3, - - - G E . 2""9 Oft 2"'121 ho 1.F. IIUIMUM POWER OUTPUT : I WATT
R17, - - - 2 7 0 0 OHM TR4, ---G.E. 2N92 OR 2N324 Dftt/E.R SELECTIVITY AT -64b SD KC/S Fl
R19, R19,--IO OHII "'5,TRg,--G.E. 2N241A AUDIO SELECTIVITY AT-600 . 31.0 KC/S !!!
Rzo,---33 OHM WITH CLIP..ON HEAT SINK ZERO SIGNAL BATTERY ORAIN . 10 MIL LIA MPS <
-O<Ot lAL=-211 OR EQUIV)
II FO'!_FUIITHER COMPONENT INFORMATION SEE PAGE 328
"':u
0
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0
SIX TIAHSISTC., 12 VOLT I WATT ua,vo C
:j
FIGURE 8 .25 Ill
I
9 . TRANSISTOR RADIO SERVICING TECHNIQUES
I
The major function of a radio receiver is to pick up modulated electromagnetic
energy and transform .its intelligence (modulation) into acoustical energy. Most modern
receivers are of the "Superheterodyne" type, and consist of an Autodyne Converter or
Oscillator-Mixer, one or two stages of IF Amplification, a Detector (which also provides
I
a source of Automatic Volume Control power), and finally, one or more stages of Audio
Amplification.
The components making up the AC circuitry o( these stages include the antenna,
I
oscillator coil, IF and audio transformers, tuning, coupling or bypass capacitors, and
the speaker. Troubles in these components can usually be spotted by a DC lest after
the trouble area has been located by using signal tracing techniques.
Since the trans.istor is probably the most reliable component in the receiver, it
I
should be the last component to be suspected. This is contrary to the long established
r ule of thumb used in tube radios, where the tubes are normally checked first. This is
especially true in personal portable receivers using subminiature components, i.e., coils
using extremely fine wire, electrolytics of extremely small dimension with low voltage
I
ratings, etc. Because of their reliability, transistors are generally soldered into the
circuit in printed circuit transistor radios. Removing and testing each transistor, as
usually done in a tube set, will not only unnecessarily subject the transistor to high
I
peak heating, but will pro~ably damage some other component, particularly the printed
circuit board.
Now that th~ ground rules are laid for a trouble-shooting procedure. proceed with
it in a logical sequence.
I
First determine whether the battery voltage under load is high enough to operate
the receiver. Although most receivers are designed to operate down to one-half the
battery voltage, severe distortion, low sensitivity and reduc:ed power output, as well as
I
possible "motorboating", may result from a low supply voltage. Also make a quick
visual inspection to locate possible loose, dirty, or intermittent battery, speaker, or
antenna connections. The set can now be analyzed further.
I
The fastest trouble-shooting technique is to inject an appropriate signal into each
transistor base going from speaker to antenna. Starting at the audio stages (the volume
control, for instance), apply a 400 or 1000 cycle audio signal. If a clean sine-wave
with adequate power output appears at the speaker as indicated by an oscilloscope
I
presentation or listening test, both audio circuits and speaker are in operating condition.
In this event take an RFl lF generator and apply a 455 Keis signal (30% modulation -
400 or 1000 el s) to the high frequency section of the receiver. As soon as the applied
signal is not passed by a stage of amplification, this stage should be investigated on a
I
DC basis. Note: Care must be taken that the generator's leads have a series DC
blocking condenser in order not to change the bias condition in the circuit under
investigation.
I
As a first check, it should be determined that both the magnitude and polarity of
the supply voltage are appropriately applied. If NPN transistors are used, the collector
will be positive with respect to emitter and base. The latter two wiJl be very close
I
voltage-wise, the base being somewhat more positive than the emitter. The opposite
polarity applies to P P transistors.
Figure 9.1 shows collector current vs. base to emitter bios voltage. Notice thnt a
very small increase in V8 ., produces a large increase in collector current. Thus, there
I
will generally be from .1 to .2 volts between the base and emitter. Either the positive
or negative side of the battery mny be grounded, cspecinlly in sets using both PN and
PNP transistors.
I
84
I
I TRANSISTOR RADIO SERVICING TECH NIQUES
I
-10
I
• 9
I
BASE TO EMITTER BIAS VOLTAGE
I I I I
· 8
vs.
COLLECTOR CURRENT
'7
I I
I
2N l 88A ., I
JI 7
I
I I
I
7
I 2Nl87A
2Nl86A
I I/
,
/
/
7
7
,
~ 17 7
I _., ~V
)-½-'
-I
.....
I 0
60 80 100 120 140 160
BASE TO EMITTER BIAS ( VBE l MILLIVOlTS

180 200
I FIGURE 9. 1
The next step is to determine bias current. Since base, emitter and collector current
I are dependent on each other, it generally suffices to measure only one, the collector
current foe instance. This should be almost equal to the emitter current while the base
current, being tl1e difference between the two (Iu = Lo - Io), will generally be very
I small. Looking at Figure 8.6, it appears that since power gain is maximum between
1.5 and 3.0 ma, most stages will operate in this region. Actually, most RF/IF stages
may have operating points down to .5 ma witl1out serious loss of gain. An easy way to
measure emitter current in most circuits is to measure to voltage drop across either the
I emitter resistor or possibly a collector resistor and calculating the current by Ohm's
law. For example, if the emitter resistor is 1000 ohms and the measured voltage drop is
1.0 volt then the emitter current is I = i= ~ =
.001 ampere ·= 1.0 milliamp.
1
I The insertion of a milliammeter into the emitter circuit will change the bias in the
stage and is not a satisfactory testing technique.
If a stage (with the exception of the output stages) operates considerably below
I .5 ma or above 3.0 ma, it is fairly certain that the stage is operating improperly. Note:
Care should be taken to measure these currents in the absence of signal since in AVC
controlled stages, current will vary with signal strength.
I In an improperly biased circuit, an ohmmeter check of the resistors and capacitors

is in order next. If this fails to isolate the problem, the transistor can be replaced. Since
it normally takes highJy specialized equipment to test transistors (especially high fre-
quency types) it is more practical to test by substitution.
I If the trouble is located in the oscillator section of the converter, an IF signal can
be passed through the mixer but an RF signal will not produce the necessary IF to get
a signal through. In this case it should be determined at once whether the oscillator is
I operating at all. In the case of the autodyne converter in Figure 8.1, any AC VTVM,
such as the Hewlett-Packard 400C, D, or H, or the Ballantine Models 310-A or 314, is
sensitive enough to measure down to 50 mv and can be connected to the emitter of
the converter transistor. If these instruments are not available, use a Vacuum Tube
I Voltmeter such as the Heathkit Model V-7A on the lowest AC-RMS Scale.
Since the local oscillator operates from .99-2.075 Meis, this VTVM should be pro-
vided with an RF probe (Heathkit Model 309C or equivalent). The presence or absence
85
TRANSISTOR RAD IO SERVICI NG TECHNIQUES I
of oscillator injection voltage can, however, be determined even without the use of
such a probe.
The proper magnitude of oscillation should be somewhere between 50 and 500 mv
I
rrns, and oscillation must be present over the entire broadcast band. (This can easily be
checked by rotating the variable condenser from end to end.) No voltage at this point
indicates the absence of oscillator injection, and an ohmmeter check of the oscillator
coil should prove it faulty.
I
To trouble-shoot or align a transistor radio, it is generally helpful to know how
much signal strength should be applied at a given stage in order to evaluate the gain
of the receiver. The following is a measurement procedure useable for this purpose.
I
1. An AC VTVM should be connected across the speaker terminals ( speaker re•
maining connected).
2. Applying the signal at any test point, the generator attenuator should be adjusted
to get .13 or .4 volts rms reading on the output VTVM. (Since most speaker
I
voice coil impedances are 3.2 ohms, this means that the "reference power out-
put"• is either P = ~
Z
"" ~
3.2
"" 5 mw or P = _.:£_ = 50 mw
3.2
I
Io various subminiature sets, however, the voice coil impedance is about
=
16 ohms•• in which case the reference AC voltage becomes V V5 X 10=- X 16
- .28 volts rms for 5 mw reference and V = V 50 X 10-1 X 16 - .89 volts rms
for 50 mw reference.
I
3. The signal can then be applied to any base as shown in Figures 9.2 and 9.3.
VOL.
AUOIO
AMPLIFIER
I
CETECTOR CONT.
IOOmld I
I AUDIO
= GENERATOR
B-
I
AUDIO STAGE MEASUREMENT
FIGURE 9 .2
zND1.F.
I
IST IF.
AMPLIFIER AMPLIFIER
I
Jmld
I
I B+
_I I
R,/ lf STAGE MIASURfMfNT
RF/lF
GENERATOR
I
FIGURE 9.3
•Th e " reference power output" is the power output conventionally used to make sensitivity measure-
I
ments This value is fixed by IRE standard at 5 milUwatts for miniature portable receivers and
50 milUwatts for the larger type portables.
. .To determine the voice coil imoedance of a speaker, a DC resistance test should yield a value close
to the AC impedance of the voice coil, eroviding the speaker is measured while disconnected from
the output transformer. A 3.2 ohm speal<er will measure about 2.7 ohms while a 16 ohm speak er
measures around 12 ohms in general.
I
www.SteamPoweredRadio.Com 86
I
I TRANSISTOR RADIO SERVI CI N G TECHNIQ UES
I By having a reference power output, it is now possible to read the input voltage at
the generator and obtain the receiver sensitivity at this point. The sensitivity, the opera-
tional condition, and the quality of the receiver under test can now be assessed. This
assumes the use of audio and RF generators having calibrated and metered attenuators
I (like Heathkit Model LG-1). In the absence of this type of equipment, two very simple
attenuators can be built for RF/IF and for audio. See Figures 9.4 and 9.5. The attenua-
tion will permit the injection of small signal into any circuit under test while the rela-
tively unsensitive VTVM measures RMS voltages 10 or 100 times larger.
I .,._...
r-----, ,-----------,
,,,,1, IDCUl'CIR .. ---- ,.,.,._,,..
r-----, r----------,
I :
I
I
.,.,..
I
I
I
"' I
I
I
I
I
:
I
.,,_.
I I
I I
I I
I
I
I
I
II I I I
I I
I
I
I
I
IL _L---4---+--+--"-----'--+-----
____ j
I°"""' 1
I
I
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L _ _ _ _ _J
I
I
I I
I I
I
1..,_
I
I RF/ If DECADE ATTfNUATOlt
FIGU R E 8 .4
AUDIO DfCADE ATTENUATOR
FIG UR E 9 . 5
T Y PICAL INPUT VOLTAGES FOR REFERENCE OUTPUT
I Audio Audio
Output Driver Detector 2ndlF 1st IF Converter
I 6 Transistor
Base Base Base Base Base Base
Radio# 150 mv 2.5 mv 50 mv 2.5mv 50-100 p.V 5-10 p.V
I 5 Transistor
Radio 20 mv 5.0mv 50mv 2.5mv 50µv 5-10 p.V
4 T ransistor
I Radio 20mv .5mv 5-10 mv

#Reference output is 50 mw, all others 5 mw.
200 p.V 10-20 p.V
I It will be found that sensitivities will vary from set to set because this measurement
is only an indication of the order of magnitude of appropriate sensitivities. Even a 5/1
deviation at times can be normal. Deviations larger than 10/ 1 are strong indications
I of trouble.
Broadcast Receiver Alignment Procedure:
A conventional set-up procedure is as follows:
I a) Connect the output of the IF / RF generator to a radiating loop (Hazeltine #ll50

or equivalent).•
I *This loop is a calibrated lnhoratory loop used for accurate sensitivity measurements. Since the pur-
pose hen~ is only to alij(n rRther than measur(". either R.n air loop or n fenite rod Antenna may be
used as a rndiahnl( e)-,ment. If thes" nre not nvnilabl" either, it often suffices to hrinsc the 11enerator
lt'nds close to the receiver's antenna and induce a sil(nnl throu11h capacitive couplinR,
!_RANSISTOR RADIO SERVICING TEC HN IQUES I
b) The output meter (AC VTVM) should be connected across the voice coil termi-
nals, the speaker remaining connected.
c) The receiver should be placed one to two feet away from tl1e radiating loop in a
I
plane iliat optimizes ilie coupling between the receiving and radiating antennas.
d) Set ilie volume control of the receiver at maximum volume.
e) Turn ilie Variable Condenser to ilie high frequency end of ilie dial (Gang wide
I
open).
The set is now ready to be aligned.
1. Set the signal generator to 455 Keis and at maximum signal output. At iliis point
I
iliere should be considerable output from ilie receive.r.
If the set is operative but does not show enough output, reduce ilie distance
between the receiver antenna and radiating element.
I
If the output is much larger than the standard reference value (.4 volts across
3.2 ohms - 50 mw), reduce the output of ilie signal generator.
2. Peak ilie last IF transformer, ilien ilie interstage IF transformer, and finally ilie
I
1st lF transformer while maintaining an output voltage close to ilie reference
value by gradually reducing the signal generator output voltage.
3. Repeat tl1e same operation going from the 1st IF to ilie last IF iliis time. The
I
IF strip is now aligned.
4. Set the generator frequency to 1630 Kei s. The variable condenser in ilie receiver
should still be tuned to tlle high frequency end. Adjust the oscillator "trimmer"
I
for maximum output at this point.
5. Now set the variable condenser to its lowest frequenty point (gang fully meshed)
and tune ilie signal generator until output is observed from the set (this should
I
be around 530-540 Kei s).
Should the low frequency fall below 520 Kei s or above 540 Kei s, the oscil-
lator coil slug should be adjusted to move the low frequency end to 530 Kcl s.
If this is done, operation number 4 must be repeated. This means that the set
I
was thoroughly misaligned and it may require repeating operations 4 and 5 two
or three times before a full frequency rnnge is obtained.
6. Set ilie generator to 1400 Keis and tune the receiver in very carefully. Now
I
peak ilie antenna trimmer. The set is now"tracked" •(fully aligned) at 1400 Kei s.
7. Since it should also be "tracked" at 600 Kei s,•• set the generator to this fre-
quency, tune in the set, and observe whether ilie sensitivity of the receiver is
I
close to its 1400 Kei s value. If tllis is not the case, tllen peak the oscillator coil
slug (providing the coil is slug tuned) while rocking the gang back and forth
around 600 Kei s. Although this procedure will somewhat reduce the Frequency
range of tl1e set, it will yield the greatest sensitivity at tl1e tracking points.
I
8. In case the oscillator coil is not tunable, the variable condenser will have to be
"knifed", a procedure of bending tlle plates on tlle RF section of the air capaci-
tor, plus realignment, that requires u high degree of experience and is not gen-
I
erally recommended.
I
•The term "t,acldng" here a pplies to the procedure of having the osclllolor and antenna circuit
tuned to be exactly 455 Kc/s apart., yielding maximum gain at each tracked p0int.
• •Most commercial variable condensers are designed to track a t three p0ints along the band. 1400
Kc/s, 1000 Kc/s, and 600 Kc/ s.
I
88
I
I
I l. . .___ o. _s_w_,_T_c_H
1_ __1N_G
__c_H_A_R_A_c_T_E_R_1s_T_1c_s_____,
I A switch is characterized by a high resistance when it is open and a low resistance

when it is closed. Transistors can be used as switches. They offer the advantages of no
moving or wearing parts and are easily actuated from various electrical inputs. Transis-
tor collector characteristics as applied to a switching application is shown in Figure 10.1.
I The operating point A at which le = Ico/1-a. indicates the transistor's high resistance
I
I
I Ic
RATED DISSIPATION
I l
I --
I COLLECTOR
E
CHARACTERISTICS
I F I GURE 10. t
when Ia= 0. Since 1-a is a small number, lo may be many times greater than Ico.
I Shorting the base to the emitter results in a smaller le. If the base to emitter junction
is reversed biased by more than .2v, Io will approach lcci. Reverse biasing achieves
the highest resistance across an open transistor switch.
I When the transistor switch is turned on, the voltage across it should be a minimum.
At operating point B of Figure 10.1, the transistor is a low resistance. Alloy transistors
such as the 2N525 have about one ohm resistance when switched on. Crown junc-
tion transistors, such as the 2Nl67 have approximately 80 ohms resistance which
I makes them less suitable for high power switching although they are well suited for
high speed computer applications. In order that a low resistance be achieved, it is
necessary that point B lie below the knee of the characteristic curves. The region
I below the knee is referred to as the saturation region. Enough base current must
be supplied to ensure that this point is reached. It is also important that both the on
and off operating points lie in the region below the maximum rated dissipation to
avoid transistor destruction. It is permissible, however, to pass through the high dissi-
I pation region very rapidly since peak dissipations of about one watt can be tolerated
for a few microseconds with a transistor rated at 150 mw. In calculating the Ia neces-
sary to reach point B, it is necessary to know how hPK varies with le. Curves such as
SWITCHING CHARACTERIS TICS I
Figure 10.2 are provided for switching transistors. Knowing h~• from the curve gives
l1 • ,. since 11 • ,. =
hie . Generally I. is made two or three times greater than Ia • ,.
PK
I
to allow for variations in hn with temperature or aging. The maximum rated collector
voltage should never be exceeded since destructive heating may occur once a transistor
breaks down. Inductive loads can generate injurious voltage transients. These can be
avoided by connecting a diode across the inductance to absorb the transient as shown
I
in Figure 10.3.
I
~•-IY
Ta •n-C
I
- --- I
IOO
/
/"
.,,,,,,-
-- ---- ---- 2N521
r--
2N5H
r--
I
2N5n
2N524
I
. ----- I
.....
I
.-eo • to -100 - 110 •t40 -IIO
- to • 40
COLUC'JOR CUMtt"tT Tc(lllA.)
D C. BASE CURRENT GAIN (h,c) VS CXlt.LECTOft CURRENT
FIGURE 10.2
-E
I
DIODE
IN34 FOR SMALL I NDUCTANCE
IN9 1 FOR LARGE I NDUCTANCE
I
PNP
I
DIODE USED TO PROTECT TRANSISTOR FR OM INDUCTIVE
I
I
VOLTAGE TRANSIENTS.
FIGURE 10.3
Lighted incandescent lamps have about 10 times their off rcsbtance. ConsequentJy,
11 must be increased appreciably to avoid overheating the switching transistor when
lighting a lamp.
I
I
J S W ITCHING CHA RACTERIST ICS
I A typical switching circuit is shown in Figure 10.4. The requirement is to switch a
-25V TYPICAL VALUES
I 1250
5 WATTS
Ic • ao,. A SWITCH OPEN
Ic • 0 .2 A SWITCH CLOSED
I r
SWITCH
11
v,0 •
• IOOIA • CURRENT THROUGH SWITCH
.19V $WITCH CLOSED
I r· V00 • .-48V SWITCH CLOSED
INPUT POWER • 15 MILLIWATTS
LOAD POWER • 5 WATTS
I Typical transistor switch application

FI G URE 10.4
I 200 ma current in a 25 volt circuit, delivering 5 watts to the load resistor. The
mechanical switch contacts are to carry a low current and be operated at n low voltage
to minimize arcing. The circuit shown uses a 2N525. The lK resistor from the base
I to ground reduces the leakage current when the switch is open. Typical values are
indicated in Figure 10.4.
TEMPERATURE EFFECTS ON SWITC HING C IRCUITS
I At high junction temperatures, l oo can become a problem. In the off condition,

both the emitter and collector junctio'!s are generally reverse-biased. As a rule, the
bias source has an appreciable resistance permitting a voltage to be developed across
I the resistance by loo. The voltage can reduce the reverse bias to a point where the
base becomes forward biased and conduction occurs. Conduction can be avoided by
reducing the bias source resistance, by increasing the reverse bias voltage or by
reducing loo through a heat sink or a lower dissipation circuit design.
I The loo of a transistor is generated in three ways. One component originates in
the semiconductor material in the base region of the transistor. At any temperature,
there are a number of interatomic energy bonds which will spontaneously break into
I a hole-electron pair. If a voltage is applied, the hole and electron drift in opposite
directions and can be seen as the loo current. If no voltage is present, the hole and
electron eventually recombine. The number of bonds that will break can be predicted
I theoretically to double about eve.r y l0"C in germanium transistors and every 6°C in
silicon. Theory also indicates that the number of bonds broken will not depend on
voltage over a considerable voltage range. At low voltages, loo appears to decrease
because the drift field is too small to extract all hole-electron pairs before they recom-
I bine. At very high voltages, breakdown occurs.

A second component of lco is generated at the surface of the transistor by surface
energy states. The energy levels established at the center of a semiconductor junction
I cannot end abruptly at the surface. The laws of physics demand that the energy levels
adjust to compensate for the presence of the surface. By storing charges on the surface,
compensation is accomplished. These charges can generate an loo component; in fact,
in the processes designed to give the most stable l oo, the surface energy levels con-
I tribute much loo current. This current behaves much like the base region component
with respect to voltage and temperature changes. It is described as the surface
thermal component in Figure 10.5.
SWITCHING CHARACTERISTICS
I
A third component of loo is generated at the surface of the transistor by leakage
across the junction. This component can be the result of impurities, moisture or surface
imperfections. It behaves like a resistor in that it is relatively independent of tempera-
I
ture but varies markedly with voltage. Figure 10.S(A) shows the regions which contrib-
ute to the three components. Figure 10.S{B) illustrates how the components vary with
voltage. It is seen that while there is no way to measure the base region and surface
energy state components separately, a low voltage loo consists almost entirely of these
I
two components. Thus, the surface leakage contribution to a high voltage loo can be
readily determined by subtracting out the low voltage value of loo. I
0 • tt0L[
• • EL.ECTftOH
AftftOWS SHOW PUIECTICH
0, CAtUtllll Dfltl,T
EMIT TU,
out:
MATIElt1AL
•co
I
o •-
I o •-
1
O •-
I
I
co1.u:cro11
QIOSS• SE"CTlON 0# PNP AUDY

I
T11t.AH$lSTOlt ~ MG40NS O(NfllATINO l CO
CA l I
~-INDICAU T~ IAH ,t(ltON lco
$Jl!lW-IIIIIOfC.Aft n~ IUllf 0# HH ltHIOH
ANO IUM"A.C( fHltUU4, 1(0
~-fNCt.Uot TNI 1u11,a c:t 1,.(HA$C
COfd 'OflltNT' UD INCMCATl lMI'
lll(AtUll!tO t'°
I
co ,---------A
I
1
-----•: __
I lco AT u·c
___ ,(, ,.,,.(
cow,:- -
•••'-"Di Of 1cc, 01)t#i'ON[HTI
WtTiol CO.UCT'OIII ...o..uG<
eot.1.[C TOA! VOU. .l
I
CB ) CC)
F I GURE 10.5
I
Figure 10.S{C) shows the variation of loo with temperature. Note that while the
surface thermal and base loo components have increased markedly, the leakage com-
ponent is unchanged. For this reason, as temperature is changed the high voltage lco
I
will change by a smaller percentage than the low voltage loo.
Figure 10.6 shows the variation of loo with temperature and voltage for a number
of transistor types. Note that the three curves for the 2N396 agree with the principles
I
above and show a leakage current less than one microampere.
The variation of current gain at high temperatures is also significant. Since bu is
defined as Io/ l s, hFE depends on loo since Io - h,. {Is + loo). lf Is 0 i.e., if the base =
I
is open circuited, a collector current still Bows, le h,.Ioo. Thus hrs is infinite when =
I. = 0. As base current is applied, the ratio Io/I• becomes more meaningful. If hn
is measured for a sufficiently low Io, then at a high temperature hr.loo will become
equal to Io. At this temperature h,.,. becomes infinite since no I. is required to maintain
I
I
I SWITCHING C HARACTERISTICS
I l e. The AC current gain h,., however, is relatively independent of Ico and generally
increases about 2:1 from -55°C to + 85°C.
I I
T
I
I
I T
I I
I
I
-
I
L...- l'u •• J\' ""!w••l $"AJ
Tl'JIO ~lllRl..,.,._t-1..,. /
I /
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....
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-- .... -• • ·",,""
.....
·ec •to·-
I 00U.tCTOII CJTOff Ct.MlttHT VS

TO.,OlATUM NOflMMJUO TO
NTl:lttilCCMATI CAIOS AM: Af Z.4., 1,I
u•c
( A )
...
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T-=-T~= • N
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TYPES 2H394, 2N39S .... ,

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'- 2N3M, 2Nll7
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I 17
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•
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•
I 11
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I/
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- ~ L-- -'----
COU.Jfm j':t::~pu :
I • .IUMCl1~,_:1:~::T'°"'I :
~
'- -.. ~ •
,I
,
I .. "'
.,.,, .,, .,, .,, .,, "'
T,-NNCT101rt TtwtAAT\Nll•N'Q lU CU TINAOI
-~.,,
( B ) ( C)
I F I GURE 10.6
The different electrical properties of the base, emitter and collector regions tend
I to disappear at high temperatures with the result that transistor action ceases. This
temperature usually exceeds 85°C and 150°C in germanium and silicon transistors
respectively.
SWITC H ING CHARACTERISTIC&
I
When a transistor is used at high junction temperatures, it is possible for regenera-
tive heating to occur which will result in thermal run-away and possible destruction of
the transistor. For the maximum overall reliability, circuits should be designed to pre-
I
clude the possibility of thermal run-away under the worst operating conditions. The
subject of thermal run-away is discussed in detail in Chapter 5.
In accordance with theory the collector saturation voltage, V c11<uTi, decreases
I
linearly with temperature for most transistors. In the case of alloy transistors, this is a
result of the increase of loo with temperature which increases the effective base charge
at high temperatures. However, transistors which have an appreciable ohmic resistance
in series with the collector or silicon transistors which have a low loo, generally exhibit
I
a positive temperature coefficient for V c,.<BAT>.
The base to emitter voltage, VaE, has a negative temperature coefficient which is
about 2.0 millivolts per degree Centrigrade for both silicon and germanium transistors.
I
Figure 5.1 shows the emitter to base characteristics of the 2N525 at several different
temperatures. The series base resistance and emitter resistance (ri,', r.') have a positive
temperature coefficient so that the IR drops across these resistances can offset the
normal variation of Va& at high values of base current.
I
The increase in Vc.,cu.T> and the decrease in VBK at high temperatures can lead to
instability in DCTL circuits such as shown in Figure 10.9 and result in operation closer
to saturation in circuits such as those shown in Figure 10.11.
I
A major problem encountered in the operation of switching circuits at low tempera-
tures is the reduction in both the a-c and d-c current gain. Figure 10.7 shows the
variation of h~E with temperature for the 2N525 and indicates that at -55°C the value
I
of hr11 drops to about 50% of its value at 25°C. Most germanium and silicon transistors
show approximately this variation of hn and h,. with temperature. In the design of
switching circuits the decrease of hu and the increase of Vai< at the lower temperatures
must be taken into account to guarantee reliable circuit operation.
I
10
I
'. I
',.. V
I/
/
v
/
I
,,.,V
:
0
=
10
j o.a
V
V
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v '-"
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o.a
o.•
L--- ~
--- I
0.1 I
I
0
· 50 -10 +IO ♦SO ♦ 50 ♦10 +ao
JUNCTI(llrll TtW'PAHIM (+Cl
CURRENT GAIN (h,. I VS TEMPERATURE NORMALIZED TO 2~•c
FIGURE 10.7
www.SteamPoweredRadio.Com 94 I
I SWITC H ING CHARACTERISTICS
I P OWER DISSIPAT I ON
As with most electrical components, the transistor's range of operating conditions

is limited by the transistor power dissipation.
I Because the transistor is capable of a very low Voe when it is in saturation it is

possible to use load lines which exceed the maximum rated dissipation during the
switching transient, but do not exceed it in the steady state. Such load lines can be
used safely if the junction temperature does not rise to the runaway temperature
I during the switching transient. If the transient is faster than the thermal time constant
of the junction, the transistor case may be considered to be an infinite heatsink. The
junction temperature rise can then be calculated on the basis of the infinite heatsink
I demting factor. Since the themtal mass of the junctions is not considered, the calcula-
tion is conservative.
In some applications there may be a transient over-voltage applied to transistors
when power is turned on or when circuit failure occurs. lf the transistor is manufactured
I to high reliability standards, the ma.timum voltages may be exceeded provided the
dissipation is kept within specifications. While quality alloy transistors and grown
junction transistors can tolerate operation in the breakdown region, low quality alloy
I transistors with irregular junctions should not be used above the maximum voltage
ratings.
Quality transistors can withstand much abuse. In experimental work, a 2N43 was
operated at a peak power of 15 watts and a peak current of 0.5 amperes with no
I change in characteristics. 2N396 Transistors in an avalanche mode oscillator were
operated at peak currents of one ampere. 3N37 Tetrodes rated at 50 milliwatts and
25 milliamperes maximum were operated at a peak power of one watt and a peak
I current of 200 milliamperes without change in characteristics. Standard production

units however should be operated within ratings to ensure consistent circuit perform-
ance and long life.
I It is generally desirable to heatsink a transistor to lower its junction temperature

since life expectancy as well as performance decreases at high temperatures. Heat
sinks also minimize thermal fatigue problems, if any exist.
I S AT U RATION
A transistor is said to be in saturation when both junctions are forward biased.

Looking at the common emitter collector characteristics shown in Figure 10.8(A) the
I saturation region is approximately the region below the knee of the curves, since hrg
usually falls rapidly when the collector is forward biased. Since all the characteristic
curves tend to become superimposed in the saturation region, the slope of the curves
I is called the saturation resistance. If the transistor is unsymmetrical electrically -

and most transistors are unsymmetrical - then the characteristics will not be directed
towards the zero coordinates but will be displaced a few millivolts from zero. For ease
of measurement, generally the characteristics are assumed to converge on ze.ro so that
I =
the saturation resistance is r. Vci,cuTi .
Ia
While the chamcteristic curves appear superin1posed, an expanded scale shows
I that Vc&tl!AT> depends on le for any given Io. The greater Is is made, the lower Vo11cuTi
becomes until Ia is so large that it develops an appreciable voltage across the ohmic
emitter resistance and in this way increases Vos(sat). In most cases the saturation
voltage, Vo~cuT,, is specHied rather than the saturation resistance. Figure 10.8(B) show-
I ing the collector characteristics in the saturation region, illustrates the small voltage
off-set due to asymmetry and the dependence of r. on Ia. Note also that r, is a low
resistance to both AC and DC.
S W I T CHI N G CH ARACTER ISTIC& I
-160
INi _ l!!Om!"5SIPATION
\
I 118 °-3.0ma . /
J_ >- COMMON EMITTER COLLECTOII CHARACTERISTICS
FOR A T YPICAL UNIT
-- .._
I
TYPE 2 N:S96
~5-120
:; ;
I \ . L/ le•-2.5mo 1.....-
A--1
TA • 25"C
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COL.LECTOR l.'OLTAGE, VtE 11.'0LTS)
FIGURE 10 . B ( A )
I
I
,_ ._.
I
-200
,_ .......
0
~
~ TYPICALCOULCTCIII SATIIIATION CKARACTERISTICS J.-1
T YPE 2 N395 Vo•-.,.,.
-,oo
0 /
I/
~
I
,
,I
,I
.,...,,
V
.. - .-
~
I
, ...... 1a• • l1M
V
V
V
,.,.
v
V
,_ ......
I/
L,..
L-i - -
'-,• .. z.ao
T-.•z,-c.
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..... .......
I
I/ ~ V •11•-1...
-20
./V V
, ,:;.. ......
,.... :;,:::
--
,._..-
..... I I
-zoo -220
I
O •20 -40 ..ec, -10 -900 -120 •140 -IIO -IIO -240 - HO -280
COU,.!C'TOA \O.TAGt. "ti: tMI..UYOLTSl
FIGURE 10.B ( B )
Some circuits have been designed making specific use of saturation. The dire<:t
I
coupled transistor logic (DCTL) flip-flop shown in Figure 10.9 utilizes saturation.
In saturation Vc£<uT, can be so low tJ,at if this voltage is applied between the base
and emitter of another transistor, as in tl,is flip-flop, there is insufficient forward bias
to cause this transistor to conduct appreciably. The extreme simplicity of the circuit
I
I
I S W ITCH I N G CHARACTER I S TICS
_ _ _ _ _ _ _ _...,_ _ _ 3y
I
I
I -0.02V
VcE (sot.)
-0.50V
4JDIA68
I
I DlltfCT COU,.LED TltANSISTOlt lOGIC (DCTl) fU,..,tOI'
FIGURE 10.9
I is self evident and is responsible for its popularity. However, special requirements are
placed on the transistors. The following are among the circuit characteristics:
I First, the emitter junction is never reverse biased permitting excessive current to
flow in the off transistor at temperatures above 40°C in germanium. In silicon, how-
ever, operation to 150°C has proved feasible.
I Second·, saturation is responsible for a storage time delay, slowing up circuit speed.
In the section on transient response we see the importance of drawing current out of
the base region to increase speed. In DCTL, this current results from the difference
between Vc.,<tu.T> and Va11 of a conducting transistor. To increase the current, v0,.<uT>
I should be small and r'• should be small. However, if one collector is to drive more
than one base, r'• should be relatively large to permit uniform current sharing between
bases since large base current unbalance will cause large variations in transient
I response resulting in circuit design complexity.

Third, since Vc,.<0&T> and Vat: differ by less than .3 volt, in germanium, stray
voltage signals of this amplitude can cause faulty performance. While stray signals
can be minimized by careful circuit layout, this leads to equipment design com-
I plexity. Silicon transistors with a .7 volt difference between V c£<1AT> and V 8 ,. are less
prone to being turned on by stray voltages but are still susceptible to turn off signals.
This is somewhat compensated for in transistors with long storage time delay since
I they will remain on by virtue of the stored charge during short tum-off stray signals.
This leads to conflicting transistor requirements - long storage time for freedom from
noise; short storage time for circuit speed.
I Another application of saturation is saturated flip-flops of conventional configura-

tion. Since V c.,<sAT> is generally very much less than other circuit voltages, saturating
the transistors permits the assumption that all three electrodes are nearly at the Slime
potential making circuit voltages independent of transistor characteristics. This yields
I good temperature stability, and good interchangeability. The stable voltage levels are
useful in generating precise pulse widths with monostable flip-flops. The section on
flip-flop design indicates the ease with which saturated circuits can be designed.
I In general, the advantages of saturated switch design are: (a) simplicity of circuit
design, (b) well defined voltage levels, (c) fewer parts required than in non saturating
circuits, (d) Jew transistor dissipation when conducting, and (e) immunity to short
97
S W ITCHING CH A R A CTER IST!£!_ I
stray voltage signals. Against this must be weighed the reduction in circuit speed.
Speed is aHected in a number of ways: (a) much higher trigger power is required
to tum off a saturated transistor than an unsaturated one, (b) since Vc r.'uT>, hFt: and
Vns all vary markedly with temperature, circuit soeed also depends on temperature.
I
I
I
Ic
l I
1IT
DIODE COLLECTOR
Eo Ecc-vcE
COLLECTOR CHARACTERISTICS
I
I
CLAMPING CIRCUIT TO SHOWING LOAD LINE AND OPERATING
AVOID SATURATION POINTS
Collector voltage clamp

F I GURE 10. 10
A number of techniques are used to avoid saturation. The simplest is shown in

I
Figure 10.10. The diode clamps the collector voltage so that it cannot fall below the
base voltage to forward bias the collector junction. Response time is not improved
appreciably over the saturated case since Io is not clamped but rises to htsl e. With
typical variations of Ia and hn with temperature and life for a standard transistor, lo
I
may vary by as much as 10: 1. Care should be taken to ensure that the diode prevents
saturation with the highest le. When the transistor is turned off, Io must fall below the
value given by (Ecc-Eo)/RL before any change in collector voltage is observed. The
I
time required can be determined from the fall time equations in the section on transient
response. The diode can also have a long recovery time from the high currents it has
to handle. This can further increase the delay in turning off. I
I
VcE :::::
R2 Ecc
RL hFE+R2
I
Ecc R2
RL hFE
I
I
Collector current clamp without bias
supply
FIGURE 10. 11 ( A )
I
98
I
I SWI TC H I N G CHARACTERISTICS
I A much better way of avoiding saturation is to control Ia in such a way that le is

just short of the saturation level. This can be achieved with the circuit of Figure
10.ll(A). The diode is connected between a tap on the base drive resistor and the
collector. When the collector falls below the voltage at the tap, the diode conducts
I diverting base current into the collector, preventing any further increase in le. The
voltage drop across R, is approximately IcR,/ hrs since the current in R, is Is. Since
the voltage drop across the diode is approximately tJ1e same as the input voltage to
I the transistor, Vc'lll is approximately IcR,/hu. It is seen that if the load decreases (le
is reduced) or h,.,, becomes very high, Vcs decreases towards saturation. Where the
change in hr,; is known and the load is relatively fixed, this circuit prevents saturation.
I
I
I
I
Collector current using bias supply
FIG U RE 10. 11 ( B )
I To avoid the dependence of Vc•: on le and hPs, R, may be added as in FigUTe 10.ll(B).
By returning R, to a bias voltage, an additional current is drawn through R,. ow
Ve&is approximately (hie
FR
+ I,) R,. I, can be chosen to give a suitable minimum Vcs.
I Ecc
I VcE::::: 0. 7 V al 25° C.
I
I Collector current clamp using silicon
and germanium diodes
I FIGURE 10. 11 (Cl
The power consumed by R, can be avoided by using the circuit of Figure 10.ll(C).
The silicon diode replaces R, . Since the silicon diode has a forward voltage drop of
I approximately .7 volts over a considerable range of current, it acts as a constant
voltage source making Vos approximately .7 volts. I£ considerable base drive is used, it
may be necessary to use a high conductance germanium diode to avoid momentary
8WI TC H INC. C H ARACTERISTICS I
saturation as the voltage drop across the diode increases to handle the large base drive
current.
In applying the s3Ille technique to silicon transistors with low saturation resistance,
it is possible to use a single germanium diode between the collector and base. While
I
this permits Vos to fall below Yu, the collector diode remains essentially non-
conducting since the .7 volt forward voltage necessary for conduction cannot be
reached with the germanium diode in the circuit.
I
The diode requirements are not stringent. The silicon diode need never be back
biased, consequently, any diode will be satisfactory. The germanium diode will have
to withstand the maximum circuit Vog, conduct the maximum base drive with a
low forward voltage and switch rapidly under the conditions imposed by the circuit,
I
but these requirements are generally easily met.
Care should be taken to include the diode leakage currents in designing these
circuits for high temperatures. All the circuits of Figure 10.11 permit large base drive
I
currents to enhance switching speed, yet they limit both IB and Io just before saturation
is reached. In this way, the transistor dissipation is made low and uniform among
transistors of differing characteristics.
I
It is quite possible to design flip-Bops which will be non-saturating without the
use of clamping diodes by proper choice of components. The resulting flip-flop is
simpler than that using diodes but it does not permit as large a load variation before
malfunction occurs. The design procedure for an undamped non-saturating flip-ffop
I
can be found in Transjst-Or Circuit Engineering by R. F. Shea, et al (Wiley).
I
1~ 1~__ 1 IJ
R C I
I
Stored charge neutralization by capacitor
FIGURE 10. 12
I
Another circuit which is successful in minimizing storage time is shown in Figure
10.12. If the input is driven from a voltage source, it is seen that if the input voltage
and capacitor are appropriately chosen, the capacitor charge can be used to neutralize
the stored charge, in this way avoiding the storage time delay. In practical circuits,
I
the RC time constant in the base necessary for this action limits the maximum pulse
repetition rate.
I
TRA NSIEN T RESPO N S E TIME
The speed with which a transistor switch responds to an input signal depends on
the load impedance, the gain expected from the transistor, the operating conditions just
prior to the input signal, as well as on the transistor's inherent speed. The following
I
discussion will assume that the collector load resistance is sufficiently small that
2rR1.Cof. << 1 where Co is the collector capacitance. If this is not the case, the rise
and fall time equations must be multiplied by the correction £actor (1 + 2rR1.Ccf.).
I
100
I
I SWITCHING CHARACTERISTI CS
(o l TYPICAL CIRCUIT
I Ie1 " Ie2z0.5 mo

Ic" 10 mo
Ir/ < hFE
I 7Ie1
I
I I
I
I
I + IOV 1 - - - - - - - 1
0 - -- - ------ -
-,ov
( b) WAVEFORM GENERATED
AT A BY SWITCH
I I
I
I
0 - ' - - -- - -- - -1-
(c) WAVEFORM AT B
SHOWING FORWARD BIAS
-iov ' - --- - --- -4- j I ON BASE OUR I NG
I
I
1 I
-,-
I I SATURATION
I I I
I I I I
I I I I
1 81 - - - - - - - - :I ,I (d) BASE CURRENT WAVEFORM
I 0 1---------
I
:I
--I-
I I
' Ie2
I I
NOTE REVERSE CURRENT
le2 DUE TO BASE BI AS
DURING SATURATION
I I
I
'
I
I
--------1--t- --- 10¾
I :
: :
I
I I
I
( e ) COLLECTOR WAVEFORM
SHOWING STANDARD
I • ltd
ov- -~+
1 I I
- -
..,tr:+
I I
-----1--
I I I
t·--· 900Yo
i.; _ _ _ _ _ _ ""_
I
I I I
-+1 t5 141
- '- • - -
•-+'t,.....
DEF I N ITIONS OF
RESPONSE T I MES
I - - + TIME
Transient response
FIGURE 10. 1 3
I Consider the simple circuit of Figure 10.13(a). Closing and openi,1g the switch
to generate a pulse as shown in Figure 10.13(b), gives the other waveforms shown in
I the figure. When the switch closes, current flows through the 20K resistor to tum on
the transistor. However there is a delay before collector current can begin to flow since
the 20K must discharge the emitter capacitance which was charged to -10 volts prior
I to closing the switch. Time must also be allowed for the emitter current to diffuse
across the base region. A third factor adding to the delay time is the fact that at low
emitter current densities current gain and frequency response decrease. The total delay
from all causes is called the "delay time" and is measured conventionally from the
I beginning of the input pulse to the 10% point on the collector waveform as shown in
Figure 10.13(e). Delay time can be decreased by reducing the bias voltage across the
emitter capacitance, and by reducing the base drive resistor in order to reduce the
SWITCHING CHARACTER IST.!£!_
I
charging time constant. At high emitter current densities, delay time becomes neg-
ligible. Figure 10.14 shows typical delay times for the 2N396 transistor.
I
Q5--- ------ ----- ----- ----- -
PI\P ALLOY TRANSISTOR
PULSE RESPONSE: DELAY TIME
TYPE 2N396 I
OAl---ll. -4M~---- . 10 1,.s) VS 181 11M)
Vee• - 5v
le • - 5mo
RL • IICtl
I
Re • IOtctl
I
I
I
·LO -l5
Ia1 (mo)
·2.0 · 2.5 -30 I
FIGURE 10. 14
I
The rise time refers to tho turn-on of collector current. By basing tho definition of
rise time on current rather than voltage it becomes the same for NPN and PNP tran-
sistors. The collector voltage change may be of either polarity depending on the tran-
sistor type. However, since the voltage across the collector load resistor is a measure
I
of collector current, it is customary to discuss the response time in terms of the collector
voltage. The theoretical analysis of rise time suggests that a single exponential curve as
defined in Figure 10.15 fits the e.11)erimental results. I
i..
hF£ 191
------~--------------------
I
, I
/1 . . [)CP()HENTI AL CURVE I
..,"'
a:
a:
::,
u
I ,. le
r 1912rfa
I
TIME -
I
GIW'HICAL ANALYSIS OF RISE TI ME
SYMIIOl.S O(flNEO I N FIGURE Kit
THE INTERCEPT OF le ANO THE CURVE GIVES
FIGURE 10.15
Ir.
I
If the load resistor RL in Figure 10.13(a) is small enough that a current, hnh,,
through it will not drive tl1e transistor into saturation, tile collector current will rise ex-
I
ponentially to h,.Ia, witll a time constant, hF£/2rf•. However, if R ,. limits the current to
I SWITCHING CHARACTERISTICS
less than hvda,, the same exponential res[>Onse will apply except that the curve will
=~ c~. Figure 10.15 illustrates the case for 1.. ~h,,.,I.,/ 2. Note that
I be terminated at Ic
the waveform will no longer appear ex[}Onentlal but rather almost linear. This curve
can be used to demonstrate the roles of the circuit and the transistor in determining
I rise time. For a given hv11 and f., it is seen that increasing hr11Ia, / Ic wilJ decrease rise
time by having le intersect the curve closer to the origin. On the other hand, for a given
Ia, and l o, speed will be pro[>Ortlonal to £. but nearly independent of hv11 since its
effect on the time constant is balanced by its effect on the curve amplitude. A useful
I expression for rise time is t, =le/la, 2rf•. It is valid for le/Ia < hn/5. Since this
analysis assumes that hF., and f. are the same for all operating points the calculated
results will not fit experimental data where these assumptions are invalid. Figure 10.16
I shows that tl1e rise time halves as tl1e drive current doubles, just as the expression for
t, suggests. However the calculated value for t, is in error by more than 50%. This
shows that even though the calculations may be in error, if the response time is specified
for a circuit, it is possible to judge fairly accurately how it will change with circuit
I modifications using the above equations.
1.4
I I.2
\ PNP ALLOY TRANSISTOR TYPE 2N396
PULSE RESPONSE RISE TIME
\ tr (,.Sl VS 191 (mo)

Vee• - 5V
I .o
,: \ Ie •
RL •
R9 •
- 5mo
I KO
IOKO
11 ..
-o - \
Cl4
i\.
I 02
~
-
I l -0.5 -10 -1.5
Ie1 - mo
-2.0 -2.5
I FIGURE 10.16
Storage time is the delay a transistor exhibits before its collector current starts to
I tum off. In Figure 10.13, Ra and Rt. are chosen so that Rt. rather than hve will limit the
collector current. Tl1e front edge of the collector waveform, Figure 10.13(e), shows the
delay time followed by the nearly linear risetime. When the collector voltage falls
below the base voltage, the base to collector diode becomes forward biased with the
I result that the collector begins emitting. By definition, the transistor is said to be in
saturation when this occurs. This condition results in a stored charge of carriers in
the base region. Since the flow of current is controlled by the carrier distribution in
I the base, it is impossible to decrease the collector current until the stored carriers arc
removed. When the switch is open in Figure 10.13, the voltage at A drops immedi-
ately to -10 volts. The base voltage at B however cannot go negative since the tran-
sistor is kept on by the stored carriers. The resulting voltage across Ra causes the
I carriers to flow out of the base to produce a current Is,. This is illustrated in Figure
10.13(c) and 10.13(d). As soon as the stored carriers arc swept out, the transistor starts
103
SWITCHI N G C HA RACT ERIST ICS I
to turn off; the base voltage dropping to -10 volts and the base current decreasing to
zero. The higher Ia, is, the greater the stored charge; the higher Ia, is, the faster
it is swept out. Since both junctions are forward biased during storage time, the
I
inverse characteristics of the transistor are involved. The inverse characteristics are
obtained by interchanging the collector and emitter connections in any test circuit.
They are identified by the subscript I following the parameter, e.g., hr&, is the inverse
DC beta. Figure 10.17 shows a curve which is useful for calculating storage time graph-
I
ically. The maximum value is hr&(IB1+lo,) where la, is given the same sign as Ia,,
ignoring the fact it flows in the opposite direction. The time constant of the curve
involves the forward and inverse current gain and frequency cut-off. The storage time
corresponds to the time required to reach the current hrde,-Io. It can be seen that
I
for a given frequency response, high hrE gives long storage time. The storage time
also decreases as Is, is increased or le, is decreased. I
I
I
--
Fr(;;;+;~)(,~)
TIME --+ I
GRAPl<ICAL ANALYSIS OF STORAGE TIME .
THE INTERCEPT OF lhFE I91-lc I ANO THE CURVE GIVES Is
FIGURE 10. 17
II
. f . I . . . 1 hn, + 1
Th e time constant or a very unsymmetnca transistor 1s approx:imate y 2,rf:, . It is
I
seen that the generally specified normal h,& and f. are of little use in determining
storage time. For a symmetrical transistor, the time constant is approximately
1
h~J. . It is possible for a symmetrical transistor to have a longer storage time than
I
PNP TRANSISTOR TYPE 2N396
I
;;;
l4
Vee• - av
le • - ~..,.
I\••
"a •
IKQ
IOKA
I
j •ol-----.----,,,C....l---+-:,....~+-:::o-:::::i:.::..--1
I
I
FIGURE 10. 18
I
104
I
I SWITCHING CHARACTERISTICS
an unsymmetrical transistor with the same hn and f•. Figure 10.18 shows the depend-
I ence of storage time on Ia, and Ia, for the 2N396 transistor.
Iez hFE + 1c
------~--------------------
I r... I
I
/
/ I
I EXPONENTIAL CURVE
I z
...
a:
a:
:::>
c.>
I TIME ----+
I GRAPHICAL ANALYSIS OF FALL TIME

THE INTERCEPT OF le AND THE CURVE GIVES ff .
F I GURE 10. 19
I The collector current fall time can be analyzed in much the same manner. Figure
10.19 indicates the exponential curve of amplitude Io + hula,, and a time constant,
I hra:/ 2..-f•. The fall time is given by the time it talces the exponential to reach le. If
hula, > > le, fall time is given by the expression,
tr _ _ 1_ hrs le/ I.,
- 2..-f. hrs+ le/la,
I As hn becomes large, this exPression reduces to,
1 le
tr = 2..-f. lat
I which is identical to the expression for t, except that Ia, replaces l a,. Figure 10.20
shows typical fall time measurements for a 2N396.
I 1.0
0.9 Vee• ... 5y

PNP ALLOY TRANSISTOR TYPE 2N396
PULSE RESPONSE FALL TIME
I le• ·S- If (,.S) VS let (o,o)

o.e I\. • IKO
Re • 101(.Q
192 (mo)
0.7 .2!>
I 0 .6
/
-----
I 0.4
0.3
.!10
." le
I 02
0.1
,.o
I ·1.0 • L!I
FIGURE 10.20
l91 !Mo)
·2.0
105
I
11 . BASIC COMPUT ER CIRCUIT S
Computers are generally classi6ed as either analog or digita1. An example of an

I
analog computer is the slide rule where the numerical values involved in the calcula-
tions are represented by the distance along the scales of the slide rule. For the slide
rule, distance is the analog of the numerical values. l n an electronic analog computer
I
the voltage or current in the circuit is used as the analog of the numerical values
involved in the calculation. Analog computers are used primarily in cases where mini-
mum cost is important and high accuracy is not required.
In a digital computer the numerical values change in discrete steps rather than
I
continuously as in an analog computer. An example of a digital computer is the ordi-
nary desk calculator or adding machine. ln an electronic digital computer numerical
values involved in the calculation are represented by the discrete states of llip-fiops
I
and other switching circuits in the computer. Numerical calculations are carried out in
digital computers according to the standard rules of addition, subtraction, multip ,ca-
tion and division. Digital computers are used primarily in cases where high accuracy
is required such as in standard accounting work. For example, most desk cn!culators
1
I
are capable of giving answers correct to one part in one million, but a sHde rule (analog
computer) would have to be about ¼ of a mile long to be read to the same accuracy.
The transistor's small size, low power requirements and inherent reliability have
I
resulted in its extensive use in digital computers. Special characteristics of the transistor
such as low saturation resistance, low input impedance, and complementary NPN and
PNP types, have permitted new types of digital circuits which arc simple, efficient and
fast. Computers operating at speeds of 5 megacycles are a commercial reality, and
I
digital circuits have been proved feasible at 160 megacycles.
This chapter offers the design engineer practical basic circuits and design proce-
dures based on proven techniques and components. Flip-flops are discussed in detail
I
because of their extensive use in digital circuits.
FLIP-FLOP DESIGN PROC EDURES

SATURATIN G FLIP-FLOPS
I
The simplest flip-Bop possible is shown in Figure 10.9, however, for standard
transistor types the circuit in Figure 11.l(A) is preferable at moderate temperatures.
\Ve shall refer to the conducting and non-conducting transistors as the on and off
I
. . - - - - - - - - - -- ·UY . . - - - - - - - - -- --nv °'tc I
I
I
I
FIGURE 11 .1 ( A )
SATUltATfO fUl'-flOl'S
FIGURE 11 . 1 ( B )
I
106
I
I BASI C COMPUTER CIRCUITS
transistors respectively. For stability, the circuit depends on the low collector to
I emitter voltage of the saturated on transistor to reduce the base current of the off
transistor to a point where the circuit gain is too low for regeneration. The 220!1
emitter resistor can be removed if emitter triggering is not used. By adding
I resistors from base to ground as in Figure 11.l(B), the off transistor has both junctions
reverse biased for greater stability. While the 33K resistors divert some of the formerly
available base current, operation no longer depends on a very low saturation voltage
consequently less base current may be used. Adding the two resistors permits stable
I operation beyond so•c ambient temperature.

r - - - - - - - - - - ---4>--- - 25V
I
I 2N3
I
I (Cl
I SA TUltATEO fUP-fLOP
FIGURE 1 1. 1 (C)
I The circuit in Figure 11.l(C) is stabilized to l00°C. The price that is paid for the
stability is (1) smaller voltage change at the collector, (2) more battery power con-
sumed, (3) more trigger power required, (4) a low Ico transistor must be used. The
capacitor values depend on the trigger characteristics and the maximum trigger repeti-
I tion rate as well as on the flip-flop design.

By far, the fastest way to design saturating flip-flops is to define the collector and
emitter resistors by the current and voltage levels generally specified as load require-
I ments. Then assume a tentative cross-coupling network. With aJl components specified,
it is easy to calculate the on base current and the off base voltage. For example, the
circuit in Figure 11.l(B) can be analyzed as follows. Assume Va£ = .3 volt and Vea =
.2 volt when the transistor is on. Also assume that V Ea = .2 volts will maintain the off
I transistor reliably cut-off. Transistor specifications are used to validate the assumptions.
I. Check for the maximum temperature of stability.
R.Voo 220
= R1+ R, = =
2200 + 220 (25} 2.3 volts
I Vc
Ve••= Ve+ Ve,:••= 2.3 + .2 = 2.5 volts
Assuming no l oo, the base of the off transistor can be considered connected to
a potential,
I V,•= V R, th h
C•• R, + R. roug a resistor R'a = R.R.
R, + R.
V'8 = <2 -5) (33K)
(42K + 33K) ='1 1 It
I R'a = (33K) (42K)

75K =
VO s
18 5K
.
107
BA8lC COMPUTER CIRCUITS I
The loo of the off transistor will How through R'" reducing the base to emitter
potential. If the loo is high enough, it can forward bias the emitter to base junction
causing the off transistor to conduct. In our example, Yr. = 2.3 volts and Vu = .2 volts
will maintain off conditions. Therefore, the base potential can rise from 1.1 volts to
I
2.1 volts (2.3 - .2) without circuit malfunction. This potential is developed across
R'a by loo= ·!
2
~~-
8
1
54 µa. A germanium transistor with loo = 10 µa at 25°C I
will not exceed 54 µa at 50°C. If a highe r operating temperature is required, Rt and R.
may be decreased and/or R. may be increased.
II. Check for sufficient base current to saturate the on transistor.
I
Vs •• = V,. + Yu •• = 2.3 + .3 = 2.6 volts
The current through Ra = I. = i:3~ = .079 ma

Yeo - Va•• 25 - 2,6
I
The current through R, and Rt in series is I• = - ..;;R:;..,- +
- = , :=- = - -42-K
R:.. - +- 2- .~2-K-
=
.506 ma
The available base current is 111 = I. - L = .43 ma
I
•
The co11ector current 1s l e =
Yeo - Vo••
R, =
25 - 2.5
2 _2 K = 10.25 ma
The transistor will be in saturation if hn at 10 ma is greater than
I
.!!:-= 10.25 =24
la .43
If this circuit were required to operate to -55°C, allowance must be made for
the reduction of h ra at low temperatures. The minimum allowable room temperature
I
hn should be 50% higher or h ra .. ,. = 36.
Generally it is not necessary to include the effect of loo flowing through R, when
calculating I. since at temperatures where loo subtracts from the base drive it simulta-
I
neously increases hn. If more base drive is required, Ra and R. may be decreased.
If their ratio is kept constant, the off condition will not deteriorate, and so need not be
rechecked.
I
Ill. Check transistor dissipation to determine the maximum junction temperature.
The dissipation in the on transistor is
Va11 • • I a + Vc" •• Io= (.3) (.43) + (.2) (10.25) _ 2 18
- . mw
I
1000 1000
The dissipation in the off transistor resulting from the maximum loo is
Vcalco -
(25) (55)
----ro--- = 1.4 mw
I
Generally the dissipation during the switching transient can be ignored at speeds
justifying saturated circuitry. In both transistors the junction temperature is within 1 •c
of the ambient temperature if transistors in the 2N394-97 or 2N524-27 series are used.
I
NON-SATURATED FLIP-FLOP DESIGN
The abundance of techniques to prevent saturation makes a general design pro-
I
cedure impractical if not impossible. While it is a simple matter to design a Hip-Hop
as shown above, it becomes quite tedious to check all the worst possible combinations
of component change to ensure manufacturability and long term reliability. Often the
I
job is assigned to a computer which calculates the optimum component values and
tolerances. While a number of Hip-flop design procedures have been published, they
generally make simplifying assumptions concerning leakage currents and the voltages
developed across the conducting transistors.
I
I
I BASIC COMPUTER CIRCUITS
., CIRCUIT CONFIGURATION FOR
I NON-SATURATING
FLIP-FLOP DESIGN PROCEDURE
Characteristics:
I Trigger input at points E

Trigger steering by D. and R,
Collector clamping by D, and Ro
Connect points A, B, C, D , E as shown in
I "• Figure 11.3 to get counter or shift regis-
ter operation
Cl and C2 chosen on basis of speed re-
quirements
I FIGURE 11.2 ( A)
I The design procedure described here is for the configuration in Figure ll.2(A}. No
simplifying assumptions are made but all the leakage currents and all the potentials
are considered. The design makes full allowance for component tolerances, voltage
fluctuations, and collector output loading. The anti-saturation scheme using one resistor
I (R3) and one diode (Dl} was chosen because of its effectiveness, low cost and
simplicity. The trigger gating resistors (RS) may be returned to different collectors to
get different circuit functions as shown in Figure 11.3. This method of triggering offers
the trigger sensitivity of base triggering and the wide range of trigger amplitude
I permissible in collector triggering. The derivation of the design procedure would
require much space, therefore for conciseness, the procedure is shown without any
substantiation. The procedure involves defining the circuit requirements explicitly then
I determining the transistor and d.iode characteristics at the anticipated operating points.
A few astute guesses of key parameters yield a fast solution. However, since the
procedure deals with only one section of the circuit at a time, a solution is readily
reached by cut and try methods without recourse to good fortune. A checking pro-
I cedure perm.its verification of the calculations. The symbols used refer to Figure
ll.2(A} or in some cases are used only to simplify calculations. A bar over a symbol
denotes its maximum value; a bar under it, its minimum. The example is based on
I polarities associated with NPN transistors for clarity. The result is that only E, is
negative. While the procedure is lengthly, its straightforward steps lend themselves
to computation by technically unskilled personnel and the freedom from restricting
assumptions guarantees a working circuit when a solution is reached. The circuit
I designed by this procedure is shown in Figure 11.2(B).
I
I
I
I NON- SA TUR.A TfD FUP-flOP
FIGURE 1 1.2 ( B )
109
B AS I C C OMPUTER C IRCU ITS
I
The same procedure can be used to analyze existing Hip-Oops of this configuration
by using the design check steps.
I
.----- - - - - - - ---111- - - - IO V
91 0 !\ I
I
HD2085 HD 2 08S
I
2N1 2 3 2Nl23 I
I
I
IN192 IN l 9 2
C .,__ _,, f--t---1
2 .2 K 2 50µµfb 2S0 }'/•" 2. 2 K
I
( A J FLIP -
E
FL OP
I
A
C E D
B A
C E
8
0
I
IN PUT
( B J I NTER CONNECTION AS COUNTER
I
A B A B A e-o--+--
I
C E D C E 0 C E 0
I
.___ _ _ __ _ ---4.,__ _ _ _ _ _....._ TRI GG ER
(CJ I NTERCONNECTION AS SHIFT REGIST E R I

.SOO ICC COUHTM- SHIFT ltfGISTD fUP- flOI'
F I GURE 1 1. 3
I
110
I
NON-SATURATING FLIP-FLOP DESIGN PROCEDURE
-~-------------- STEP I DEFINITION OF OPERATION SYMBOL SAMPLE DESIGN FOR 2N396 TRANSISTOR
(A) Circuit Requirements and Device Characteristics

1 Assume maximum voltage design tolerance Ile Let Ile=± 5%
2 Assume maximum resistor design tolerance <ir Let llr = ± 7% (assuming ± 5% resistors)
3 Assume maximum ambient temperature TA Let TA= 40°C
4 Assume maximum load current out of the off side Io Let Io= 1 ma
5 Assume maximum load current into the on side I, Let I , = 0.2 ma
6 Estimate the maximum required collector current in the on I, Let 1, < 17.5 ma
transistor
....
....
.... 7 Assume maximum design loo at 25°C From spec sheet loo < 6 ,,_a
8 Estimate the maximum junction temperature T, Let L = oo·c
9 Calculate loo at T, assuming loo doubles every l 0"C or 11 I, = 6e·"'T' = 71 µa; Let I.= 100 µa
Ioo,..1 = loooo e·°''"1 -•>
10 Assume the maximum base leakage current is equal to the I. Let I.= 100 µa
maximum loo ID
►
en
11 Calculate the allowable transistor dissipation 2N396 is deratcd at 3.3 mw/°C. The junction temperature 0
rise is estimated at 20°C therefore 67 mw can be allowed. 0
0
Let Pc= 67 mw 3:
,,
12 Estimate hn minimum taking into account low temperature fJmlft Let Clmlo = 0.94 Or {Jmla = 15.67 C
-I
degradation and speciflc assumed operating point
"';u
13 Estimate the maximum design base to emitter voltage of v, Let V, = 0.35 volts 0
the "on" transistor ;u
0
C
14 Assume voltage logic levels for the outputs Let the level separation be > 7 volts -I
a,
m
NON-SATURATING FLIP-FLOP DESIGN PROCEDURE ( CONTINUED) ►
GI
0
DEFINITION OF OPERATION SYMBOL SAMPLE DESIGN FOR 2N396 TRANSISTOR 0
STEP 0
I:
15 Choose the maximum collector voltage permissible for the v. Let v. < 2.0 volts "O
C
"on" transistor ~
l'I
ll
16 Choose suitable diode types Let all diodes be 1Nl98
0
Maximum leakage estimated as < 25 µ.a. Let L = 40 µ.a at ll
17 Estimate the maximum leakage current of any diode L 0
end of life C
~
18 Calculate I. = I. + L I. 40 + 100 = 140 µ.a •

19a Choose the minimum collector voltage for the "off" transistor v. Let V, > 9.0 volts
keeping in mind 14 and 15 above
19b Choose the maximum collector voltage for the "off" tran- v. Let V, < 13.0 volts
sistor
....
....
to 20 Choose the· minimum design base to emitter reverse bias to v. Let V, = 0.5 volt
assure off conditions
21a Estimate the maximum forward voltage across the diodes v. Let V, = 0.8 volt
21b Estimate the minimum forward voltage v, Let V, = 0.2 volt
22 Estimate the worst saturation conditions that can be tol-
erated.
22a Estimate the minimum collector voltage that can be tolerated v. Let V, = 0.1 volt
22b Estimate the maximum base to collector forward bias volt- v. Let V, = 0.1 volt
age that can be tolerated
23a Calculate V, + V, v,. 2 + 0.2 = 2.2 volts
23b Calculate V• + V, Vu 2 + 0.8 = 2.8 volts
24a Calculate V, + V, v,. 0.1 + 0.2 = 0.3 volt
STEP DEFINITION OF OPERATION
- - - - - - ·- ,-·I- - - •- - - - -·
24b Calculate V• + V.
SYMBOL
v.. 0.1
SAMPLE DESIGN FOR 2N396 TRANSISTOR
+ 0.8 = 0.9 volt
25 Calculate V, + V, v,. 0.1 + 0.1 = 0.2 volt
(B) Cut and Try Circuit Design
1 Assume E. E, Let Es= -16 volts± 5%; E, = -15.2 v; E, = -16.8 v
(1 6r)
+ 1.07 5
2a Calculate (l _ 6 r) K, 0.93 = 1.1
(1 6e)
+
2b Calculate (l _ 6e)- K, ~:: = 1.105
2c Calculate~ K. i1;-:, = 1.117 ma
....
2d Calculate I. + Io + 2L JC. 0.1 + 1.0 + 0.08 = 1.18 ma
....
....
w v. -v. 08 O.l 0 0454 I
2e Calculate V V E K. 0.1 +· 0.1- + 15.2 = ' VO ts
•+ ·-.
3 -
Calculate R. < y1 [V,oK,K.
-V, - K, (V, - ~) ]
1.:11 [ c/i;)(O~t) - 1.15 (0.35 + 16.8)] = 14.03 K
4 Choose R, R. Let R. = 13K ± 7%; R. = 13.91 K; R. = 12.09 K m
>
VI
5 Calculate R. > K. R. (0.0454) (13.91K) = 0.632 K 0
0
6 Choose R. R. Let R. = 0.68 K ± 7%; R. = 0.7276 K; R. = 0.6324 K 0
i:
,,
- R. (V,o - V,) (12.09 K) (2.2 - 0.35) h . C
7 -t
Check R. by calculating R. < V, _ Es + K. R. 0.35 + 16.8 + (1.117) (12.09) = 0 ·730 K; c o1Ce of
R. satisfactory "'21
0
21
R. 13.91 K 0
8 Calculate 1'• C
-V, - E, - I. R. -0.5 + 15.2 - (0.14) (13.91) = l.09l K/ V -t
VI
m
>
NON-SATURATING FLIP-FLOP DESIGN PROCEDURE ( CONTINUED ) Ill
n
SAMPLE DESIGN FOR 2 N396 TRANSISTOR n
STEP DEFINITION OF OPERATION SYMBOL 0
3:
"!I
•. K. (V1 + V,) - R. (1.091) (2.0 + 0.5) K - 0.632 K _ K C
g 2 19 ...
Calculate R1 > l _ K.L 1 - (1.091) (0.04) - .
"';o
n
10 Choose R. - If there are difficulties at this point, assume a Let R, = 2.7 K ± 7%; R, = 2.889 K; R, = 2.511 K ;o
R1 n
different E,. C
K,1 [V, - Vu+ K. R,] (1.15)'[9.0 - 0.3 + (1.18) (2.511)] ...

Ill
11 Calculate K 1 = 1.51
V. -Vu 13.0 - 2.8
- K1V• - Ve (1.51) (13.0) - 9.0 _ 17
12 Calculate E, < K _ l / K. 63
1
1.51 - 1/ 1.105 - .
.... 13 Choose E, E, Let E, = 16 volts± 5%; E, = 16.8 volts; E, = 15.2 volts

....
"" _ (E, - V,) Rt (15.2 - 9.0) (2.511)
14 335
Calculate R, < V, _ Vt2 + K. R. 9.0 - 0.3 + (1.18) (2.511) = 1. K
I (E. - v.J (R;} (16.8 - 13.0) (2.889)

15 Ca culate R, > V, _ Vu = 1.077K
13.0 - 2.8
16 Choose R, R, Let R, = 1.2 K ± 7%; Ri = 1.284 K; R, = 1.116 K
(C) Design Checks

1 Check "off" stability. Reverse bias voltage is given by:
_ 15 2 + 13.91
Vu< -E, + = - ~ R. - -1[V1 - E.- + I, R, + I. (Rt+ Rt)] I V£8 . 17.05
R.+R.+~ - - - [2 + 15.2 + (0.04) (2.511) + (0.14) (3.14)) -0.7 volts=
The design value of V, was 0.5 volts. Therefore, the "off'
Circuit stable if Vsa < -V,
condition is stable .
STEP DEFINITION OF OPERATION SYMBOL SAMPLE DESIGN FOR 2N396 TRANSISTOR
2
---------------
Check for non-saturation under the worst conditions.
Vs& < E. + R. (Vu - E.) Vat:
_ 15 2 + 13.91 (0.9 + 15.2) _ 0 19 I
. _ - . VO IS
- R.+R. 14 54
Circuit non-saturated if VBE < v.. The design maximum of v.. was 0.2 volts.
3 Check for stability. Calculate:
3a R.- = R, + R. R, 1.284 + 2.889 = 4.173 K ~ -------
3b Ra = R, + R. + R, + R. Ra 1.284 + 2.889 + .728 + 12.09 = 16.99 K
3c Re= R. + R. Ro .728 + 12.09 = 12.82 K

3d E',= E, - JC. R, E'. 15.2 - (1.18) (1.284) = 13.68 volts
3e Ro = R, + R. + R. + R. Ro 1.116 + 2.889 + .728 + 13.91 = 18.643 K
..... Ro (E, - V.) - R, [E, - E, - LR. - L (R. + HJ] 18.64 (16.8 - 2) - 1.116 [16.8 + 16.8 - (0.14) (13.91)
..... I,
Cit 3f I,= 1.116 (18.64 - 1.116)
!!.! (Ro - R,) - (.04) (.728 + 13.91)] = 12_34 ma
(13.68 + 16.8)
3g I, = /; (E', - V,o) - -j- (E', - E.) I, (4.17;~-~2.82) (13.68 - 2.2) - 1.266 ma
A O O - 12.82
I _ I, + I,+ I, m
3h 0.2 + 12.34 + 1.266 0 831 ►
• - (J,. ,. + R,/ Rc I. 15.67 + 12.09/ 12.82 = · ma Ill
0
3 0
- 16.8 + !!:: ( l + 1~~;18 ) ( 13.683 + 16.8) 0
,,3:
C
3i V'811 = ~+ ~ ( l + :: ) ( E', - E, ) - /2\0:S ( 13.683 - 2.2) - 0.831-{!::- -t
I'\
:u
- ) 41 9 0
R. ( E,
- -=- l - v,. ) - L--=-----
R. ( - R.R,
- -- - R. - R. V's ►: (< · ~~J!!•0 ) - 4.173 - 0.7276) = .55V
Ro Ra Ro :u
0
.55V is great.e r than V, = .35V, therefore the design is C
satisfactory. -t
Ill
BASIC COMPUTER C I RCUITS
I
I
I
I
I
[SYMBOLS DEFINED IN FIGURE 11.2 W] I
Oita/IT CONflGUltATIONS fOlt NON-SATUltATING
fUl'-flOI' WITH CLAMHO Off VOLTAGE
FIG URE 11 .4 I
The non-saturating flip-flop design procedure just discussed has been extended to
the circuit in Figure 11.4. This circuit is identical to that in Figure ll.2(A) except that
a diode clamp (D.E,) determines the collector off voltage. A number of design solutions
I
which have been calculated for a nominal 10 ma flip-flop and 5 volt logic level are
shown in Figure 11.5. The standard conditions chosen are wide enough to include
diode and transistor parameter variations from -55•C to 75°C junction temperature.
The solutions use only standard RTMA resistor values which are permitted to change
I
up to ± 10% during life.
k(l,) 1.,.,.0 Devia tion rrom

~=::!:5% .lr =::!:7% 4c = ±5% .lr = ±10% .lc =±l0% <)r =:!:7%
I
max Out ( lo) STD Conditions R, R, R, R,
I
R, I\, R. I\, R. R. R. R.
ma. ma
10 1.0 - 2.7 2.4 .82 II 2.2 2.0 .68 9.1 2.4 2.2 .75 10
10 1.5 - 2.4 2.4 .82 l l 2.2 2.2 .68 9.1 2.2 2.4 .75 10
- 1.8 1.5 .56 7.5 1.5 1.2 .47 6.2 1.8 1.5 .51 6.8
I
15 1.0
15 1.5 - 1.8 1.5 .56 7.5 1.5 1.3 .47 6.2 1.8 1.5 .51 6.8
10 1.25 v~ = .2v max 3.0 3.0 .91 13 2.2 2.0 .68 9.1 2.2 2.2 .75 10
10 1.25 V, = .5v max 2.7 2.7 .91 12 2.4 2.7 .82 II 2.4 2.7 .82 11
10
10
1.25
1.25
V,
V,
= .4v mu
= .6v max
3.3
4.7
3.6
8.2
I.I
1.3
15
24
2.4
4.3
2,7
7.5
.91 12
1.20 22
2.7
4.3
3.0
9.1
1.0
1.3
13
24 I
Standanl Conditions: E, = 18v, E, = -12v, E. = 6v, 0.8v > Vo,ooa (V., V,) > 0.2v, 1010•• LU•••• (I, < .04 ma,
loo< .1 ma, 2v > Vu o, (V., V,) > Ov, Vu (V,) < .55v, Vn (V,) > .2v, v.. (V,) < , Iv, l&.0,0,. (1,) = .2 ma, 7.lv
=
> Vn on (V., V,) > 5.9v, h,. 18 min. All n,slstor values In kilohms.
/
HACTICAl ClltCUITS, 8ASID ON ,u,.,10, CONIIGUltATION IN flGUII n.4
I
(IYMIOU OIRNID IN NON-SAruUnNo
FIGURE 11.!5
,u,.no, DIIION NoaDUII)
I
V,
The high on voltage (Vos•••• Vo) when the transistor is conducting is primarily the
result of the assumed forward voltage of the diode. It is seen that raising the minimum
collector to emitter voltage (V,) from O to 0.2 volts has a minor effect on the solutions.
= O.lv gave identical solutions to v. 0.2v. =
I
I BASIC COM PUTER CIRCUITS
I The last solution in Figure 11.5 shows that a high conductance diode permits more
efficient design.
The capacitors in the circuit are determined by the frequency response of the
I transistor or by the maximum trigger pulse repetition rate.
I Type
Number
Ambient Temperature Range in
Degrees Centigrade Assuming
Worst Case loo and hrR
Potential
Switching
Speed
Type
I 2N43 -55 to 45 low PNP

2Nl23 IV -55 to 60 med PNP
I 2N396
2N397
-55 to 60
-55 to 60
med
high
PNP
PNP
2N404 - 10 to 75 med PNP
I
I
2N450 -55 to 60 med PNP

...
I
2N524
2N525 .--.~ (
25 to 55
-55 to 55
low
low
PNP
PNP
2N526 -55 to 55 low PNP
2N527 -55 to 55 low PNP
I 2N634
2N635
25 to 60
-55 to 60
low
med
NPN
NPN
I 2N636
2Nl289
-55 to 60
-55 to 60
high
high
NPN
NPN
I TRANSISTOltS SUIT.AIU ,oa fUP,. flO,, SOUITIONS IN flOUH

F IGURE 1 1.6
n.s
I Figure 11.6 lists a number of military and industrial transistors which meet the
conditions of the solution. In all cases the maximum ambient temperature is limited by
I loo while the minimum ambient temperature is limited by hu. No switching speeds
are given because they depend on the trigger power available as well as on the inherent
transistor speed.
I TRI GGERI N G
Flip-Hops are the basic building blocks for many computer and switching circuit
I applications. In all cases it is necessary to be able to trigger one side or the other into
conduction. For counter applications, it is necessary to have pulses at a single input
make the two sides of the Hip-Hop conduct alternately. Outputs from the Hip-Hop must
have characteristics suitable for triggering other similar Hip-Hops. When the counting
I period is finished, it is generally necessary to reset the counter by a trigger pulse to
one side of all Hip-Hops simultaneously. Shift registers, and ring counters have similar
triggering requirements.
BASIC COMPUTER CIRCUITS
I
In applying a trigger to one side of a flip-flop, it is preferable to have tho trigger
tum a transistor off rather than on. The off transistor usually has a reverse-biased
I
emitter junction. This bias potential must be overcome by tho trigger before switching
can start. Furthermore, some transistors have slow tum on characteristics resulting in
n delay between the application of the trigger pulse and the actunl switching. On the
other hand, since no bins bas to be overcome, there is less delay in turning off n
I
transistor. As tum-off begins, the flip-flop itself turns the other side on.
A lower limit on trigger power requirements can be determined by calculating
the base charge required to malntain the collector current in the on trnnsistor. The
I
trigger source must be capable of neutralizing this charge in order to tum off tho
transistor. It hAS been detennined that the base charge for a non-saturated transistor is
approximately Qa = 1.22 k / 2rf.. The tum-off tin1e constant is approximately
hr•. 2rf•. This indicates that circuits utilizing high speed transistors at low collector
I
currents will require tho least trigger power. Consequently, it may be advantageous to
use high speed transistors in slow circuitry if trigger power is critical. If the on tran-
sistor was in saturation, the trigger power must also include the stored charge. The
I
stored charge is given by
Qs = -2~.r ( fl. + -f.,l ) ( 1 - 1u,,ci, ) ( Ia, - J£_)

hr,. I
where the symbols are defined in the section on transient response time.
Generally, the trigger pulse is capacitively coupled. Small capacitors permit more
frequent triggering but a lower limit of capacitance is imposed by base charge con-
I
siderations. When a trigger voltage is npplied, the resulting trigger current causes the
charge on the capacitor to change. When the change is equal to the base charge just
calculated, the transistor is turned off. lf the trigger voltage or the capacitor are too
small, the capacitor charge may be less than the base charge resulting in incomplete
I
tum-off. In tho limiting cnse C = S; .The speed with which the trigger turns off n
transistor depends on the speed in which Q11 is delivered to the bnse. This is detem1ined
I
by the trigger source impedance and r'•·
In designing counters, shift registers or ring counters, it is necessary to make
alternate sides of a flip-Oop conduct on alternate trigger pulses. There arc so-called
I
steering circuits which accomplish this. At low speeds, the trigger may be applied at
the emitters as shown in Figure 11.7. It is important that the trigger pulse be shorter
than the cross coupling time constnnt for reliable operation. The circuit features few
parts and n low trigger voltage requirement. Its limitations lie in the high trigger
I
current required.
At this point, the effect of trigger pulse repetition rate can be analyzed. In order
that each trigger pulse produce reliable triggering, it must find the circuit in exactly
I
the same state as the previous pulse found it. This means that all the capacitors in the
circuit must stop charging before a trigger pulse is applied. If they do not, the result
is equivalent to reducing the trigger pulse amplitude. The transistor being turned off
I
presents a low impedance perrnitting the trigger capacitor to charge rapidly. The
capacitor must then recover its initial charge through another impedance which is
generally much higher. The recovery time constant can limit the maximum pulse rnte.
I
Steering circuits using diodes arc shown in Figures ll.8 and 11.9. The collectors
are triggered in 11.8 by applying a negative pulse. As a diode conducts during trigger-
ing, the trigger pulse is loaded by the collector load resistance. When triggering
I
is accomplished, the capacitor recovers through the biasing resistor RT. To minimize
1 IR I
I . - - - - - - - - - - - - - - -..---o+IOV
B"SIC COMPUTER CIRCUITS
I
I 2Nl67
2Nl67
I ._---4-------+----...,_--!f-o ~ E
150,,,.f
Cr WAVE
I
INPUT
EMITTER TRIGGERING
MAXIMUM TRIGGER RATE EXCEEDS 500KCS WITH TRIGGER
I AMPLITIJOE FROM 2V TO 12V
FIG URE 1 1.7
I trigger loading, RT should be large; to aid recovery, it should be small. To avoid the
recovery problem mentioned above, Rr can be replaced by a diode as shown in 11.10.
The diode's low forward impedance ensures fast recovery while its high back im-
I pedance avoids shunting the trigger pulse during the triggering period.
,---------+--O+IOV
I
I .--------------<> ♦ IOV
CT
2NIS7
t--====---H
IJ::f=R[
I INPUT
I
31K
I COLLECTOR TRIOOERINO
MAXIMUM TIUGGER It.ATE EXC[tOS IMC WITH TRtOG£R
AMPLITUDE ,1toM 4V TO 12V.
BASE TRIGGERING
MAXIMUM TRIGGER RATE EXCEEDS I MC
WITH TRIGGER AMPLITUDE FROM 0 .7S TO
3 VOLTS.
I FIG URE 1 1.B FIG U RE 1 1.9
Collector triggering requires a relatively large amplitude low impedance pulse but
has the advantage that the trigger pulse adds to the switching collector waveform to
I enhance the speed. Large variations in trigger pulse amplitude are also permitted.
In designing a counter, it may be advantageous to design all stages identically the
same to permit the economies of automatic assembly. Should it prove necessary to
I increase the speed of the early stages, this can be done by adding a trigger ampli6er
as shown in Figure 11.11 without any change to the basic stage.
119
B ASI C COM P UTER CI RCUIT S I
,----------<.,_.... IOV
I
167
I
~.nnr
47K
SOUAR£
WA\/t
IMPUT
I
COLL(CTOft TfUGG[RING
0100f TO SUPP\,.'t VOLTA«;.[ JtfDUCE S
fllltGGUt POVrUI AHO U.TtNOS MAXIMUM
COU£CTOR TftlGGEJIING WITH TftlGGEft AMPLlflEft
FOR IMC TftlGG[R UT[ LESS THAN I VOt.T TftKlG[R
I
I
T" IGGI:" l'IATC AMP\.ITUOE REOOIR[O.
F I GURE 11.10 FIGURE 11.11
Base triggering shown in Figure 11.9 produces steering in the same manner as
collector triggering. The diHerences are quantitative with base triggering requiring
less trigger energy but a more accurately controlled trigger amplitude. A diode can
I
replace the bias resistor to shorten the recovery time.
Hybrid triggering illustrated in Figure 11.12 combines the sensitivity of base
triggering and the trigger amplitude variation of collector triggering. In all the other
I
steering circuits, the bias potential was fixed, in this one the bias potential varies in
I
I
I
HOl).61
.,.
H02$59
tut Ry
I
- - - - ---4t---te!...-ll--+-- - ---J
2 0,.,.1 \ i / Z20f'1&f
BASE. TIIIGGUIING Wrnt H'1'MO GATt
FIGURE 1 1. 12
Cy
I
order to more effectively direct the trigger pulse. By returning the bias resistor to the
collector, the bias voltage is Vea. For the conducting transistor, Vea is much less than
I
for the off transistor, consequently, the trigger pulse is directed to the conducting
transistor. This steering scheme is particularly attractive if Vea for the conducting
transistor is very small as it is in certain non-saturating circuits such as shown in
Figure 10.11.
I
Care should be taken that the time constant CrRT does not limit the maximum
counting rate. Generally RT can be made approximately equal to Rx the cross-coupling
resistor.
I
120
I
I BASIC COMPUTER CIRCUIT&
To design a shift register or a ring counter, it is only necessary to return RT

I to the appropriate collector to achieve the desired switching pattern. The connections
for the shift register are shown in Figure ll.3(A) and (B). A ring counter connection
results from connecting the shift register output back to its input as shown in Figure
I ll.3(C).
I
I
I
I $\'MM£TAICAL TR.AHSISTOII TRIG<.t'.RS 80TH SIOfS OF
·6V
TRIGGER TRAHSIST011$ SlloU.TANEOUSI.Y SUPP\.Y ~
TO TUAN OFF ONE 510[ OF Fl.IP-FLOP AHO TI) Cl(V£l.OP A
fUP· F\.01' SlhU.TANEOUSI.Y,
I
IIQ."'6[ ACIIOSS THEC01.L£CTOIII.OAOONTHEOTKRSIOE.
FIGURE 11.13 ( A ) FIGURE 1 1.13 ( B )
I
I
I
I
I CIRCUIT OF FIOUR[ IIJ:S(I ) WITH TRIGGER STEERIHO
AOOE:O roR COUNTER APPLICATION
TRIGGB OtCUITS
.,..,o
I USINO Tl.1000 ,-OWII. TO IHQIA. . SWITCHING
FIGURE 11.13 ( C)
By using transistors as trigger arnpli6ers, some circuits superpose the trigger on the
I output of the flip-fl.op so that an output appears even if the flip-flop is still in the
transient condition. Figure ll.13(A) shows a symmertical transistor used for steering.
The transistor makes the trigger appear in opposite phase at the flip-flop collectors
speeding up the transition. The circuit in Figure ll.13(B) can have Re and RK so
I chosen so that a trigger pulse will bring the collector of the transistor being turned on
to ground even though the transistor may not have started conducting. The circuit in
ll.13(B) may be converted to a steering circuit by the method shown in ll.13(C).
121
BASIC COMPUTER CIRCUITS
I
SPECIAL PURPOSE CIRCUITS
SCHMITT TRI GGER
A Schmitt trigger is a regenerative bistable circuit whose state depends on the
amplitude of the input voltage. For this reason, it is useful for waveform restoration,
I
signal level shifting, squaring sinusoidal or non-rectangular inputs, and for DC level
detection. Practical circuits are shown in Figure 11.14. I
r----------....--<>-12V
I
FREQUENCY RANGE 0- !IOOKC
OUTPUT OUTPUT AT COLLECTOR HAS 8V
MINI MUM LEVEL CHANGE
Q 1 ALWAYS CONDUCTS IF INPUT
IS MORE NEGATIVE THAN -!IV
I
Oz
2N396
Oz ALWAYS CONDUCTS IF INPUT
IS MORE POSITIVE THAN -2V
AMBIENT TEMPERATURE - 55°C
TO 71-C
I
I
- --
(A )
- - - - - - - - - < i + 12v I
OUTPUT
FREQUENCY RANGE O TO I MC
OUTPUT AT COLLECTOR HAS 2V
M INIMUM LEVEL CHANGE
I
0 1 ALWAYS CONOUCTS IF INPUT
EXCEEDS 6.8V
Oz ALWAYS CONDUCTS IF INPUT
IS BELOW 5.ZV
I
6.8K
AMBIENT TEMPERATURE
TO 7 1-C
0-C
I
( B ) I
SCHMITT TRIGGERS
F I GURE 11 . 14
Circuit operation is readily described using Figure ll.14(B). Assuming Ql is non-

I
conducting, the base of Q2 is biased at approximately +6.8 volts by the voltage
divider consisting of resistors 3.3K, 1.8K and 6.8K. The emitters of both transistors are
then at 6.6 volts due to the forward bias voltage required by Q2. If the input voltage
is less than 6.6 volts, Ql is off as was assumed. As the input approaches 6.6 volts, a
I
critical voltage is reached where Ql begins to conduct and regeneratively turns off Q2.
If the input voltage is now lowered below another critical value, Q2 will again conduct. I
ASTABLE MULTIVIBRATOR
The term multivibrator refers to a two stage amplifier with positive feedback. Thus
a flip-flop is a bistable multivibrator; a "one-shot" switching circuit is a monostable
I
122
I
I B ASIC COMPUTER CIRCUITS
multivibrator and a free-running oscillator is an astable multivibrator. The astable
I multivibrator is used for generating square waves and timing frequencies and for
frequency division. A practical circuit is shown in Figure 11.15. The circuit is sym-
metrical with the transistors DC biased so that both can conduct simultaneously. The
I cross-coupling capacitors prevent this, however, forcing the transistors to conduct

alternately. The period is approximately T = CT !o lOO microseconds where ~ is
measured in µµf. A synchronizing pulse may be used to lock the multivibrator to an
I external oscillator's frequency or subharmonic.
I
I fR£0UENCY RANGE I CPS TO 2SOl<CPS BY
CHANGING Cr
OUTPUT AT COLLECTOR HAS 8 VOLT
I MINIMUM lEVEL CHANGE

AMBIENT TEMPERATURE -"-C
SYNCHRONIZING PULSES PERMIT
GENERATING SllBHARMOHICS
TO 71•C
SYNC PVI.SE AMPllTUOE MUST EXCEED
I 1.5V POSITIVE I RISETIME MUST BE LESS

THAN LO,. SEC.
I
I ASTASLE MULTIVIHATOR
FIGURE 11.15
I M O N OSTABLE MULTIVIBRATOR
I On being triggered a monostable multivibrator switches to its unstable state where

it remains for a predetermined time before returning to its original stable state. This
makes the monostable multivibrator useful in standardizing pulses of random widths
or in generating time delayed pulses. The circuit is similar to that of a flip-flop except
I that one cross-coupling network permits AC coupling only. Therefore, the flip-flop can
only remain in its unstable state until the circuit reactive components discharge. Two
circuits are shown in Figure 11.16 to illustrate timing with a capacitor and with an
I inductor. The inductor gives much better pulse width stability at high temperatures.
INDICATOR LAMP DRIVER
I The control panel of a computer frequently has indicator lamps to permit monitor-
ing the computer's operation. The circuit in Figure 11.17 shows a bistable circuit
which permits controlling the lamp by short trigger pulses.
I A negative pulse at point A turns on the lamp, which remains on due to regenera-
tive feedback in the circuit. A positive pulse at A will tum off the lamp. The use of
complementary type transistors minimizes the standby power while the lamp is off.
123
BAS IC COMPUTER CI RCU I TS I
•12V
I
Cr
331(
82,.,.f
OUTPUT
OUTPUT AT COl.LECTORS HAS 8 VOLT
LEVEL CHANGE
OUTl"UT PU\.SE DURATION 2;,SEC TO I SEC
MAXIMUM INPUT FREOUENCY 250KC
MAXIMUM REQUIRED INPUT PULSE IS
I
I
2N~ 5 VOLTS
IN191
DUTY CYCLE EXCEEDS 60"11,
IN191 AMBIENT TEMPERATURE ·55"C TO 71"C
I
( A )
I
OUTPUT AT COLLECTOR HAS
5 VOLT LEVEL CHANGE
I
I
OUTPUT PU.SE DURATION APPROX
600 MICROSECONDS
MAXIMUM INPUT PVLSE REQUIRED
3 VOi.TS
I
AMBIENT TEMPt:RATURE - 55°C
I
TO 71°C
(B )
MONOSTAILI MUtTIVIUATOlt
I
FIGURE 1 1. 16
, - - - - --41-- - - -- - - - - --41---0 2 4Vi20"•
IN1692
I
6 .81( 6 .8K 221<
A
INPUT 0---4t-- - - + - t
2N78
2N526
I
6.81(
.Ol ,.td 151<
I
GE-E24 LAMP I
TRIGGER PULSE REQUIREMENT 2 VOL TS MAXIMUM.
A.M BIENT TEMPERATURE -M'C TO 71°C
I
±
RESISTOR TOLERANCE 10 "4 AT END OF LIFE .
81STA8Lf IHOICATOlt LAMI' OltlVllt

FIGURE 11.17
I
I
I
I . _ _ I_ _ _ _ _ _ _12_._L_o_G_1_c_ _ _ _ __ ___,
Large scale scientific computers, smaller machine control computers and electronic
I animals all have in common the facility to take action without any outside help when
the situation warrants it. For example, the scientific computer recognizes when it has
completed an addition, and tells itself to go on to the next part of the problem. A
I machine control computer recognizes when the process is finished and another part
should be fed in. Electronic animals can be made to sense obstructions and change
their course to avoid collisions. Mathematicians have determined that such logical
operations can be described using the conjunctives AND, OR, AND NOT, OR NOT.
I Boolean algebra is the study of these conjunctives, the language of logic. A summary
of the relations and operations of Boolean algebra follow the example of its use below.
Transistors can be used to accomplish logic operations. To illustrate this, an example
I from automobile operation will be used. Consider the interactions between the ignition
switch, the operation of the motor and the oil pressure warning light. If the ignition is
off, the motor and light will both be off. If the ignition is turned on, but the starter is
not energized the warning lamp should light because the motor has not generated oil
I pressure. Once the motor is running, the ignition is on and the lamp should be off.
These three combinations of ignition, motor and lamp conditions are the only possible
combinations signifying proper operation. Note that the three items discussed have
only two possible states each, they are on or off. This leads to the use of the binary
I arithmetic system, which has only two symbols corresponding to the two possible states.
Binary numbers will be discussed later in the chapter.
I I M L Result
V
I z fGNITION
I 0 0 0 Ma MOTOR
I 3
2 0
0
0
I 0
I X
X
L=LAMP
R =RESULT
I =ON
4 0 I I X 0 =OFF
I 5
6
I
I
0
0
0
I
X
V
V = ACCEPTABLE
X =UNACCEPTABLE
N =3:: NO. OF VARIABLES
7 I I 0 V
I 8 I I I X
2N,. 8
I Table of all possible combinations of ignition, motor and lamp conditions

FIGURE 12. 1
To write the expressions necessary to derive a circuit, first assign letters to the
I variables, e.g., I for ignition, M for motor and L for lamp. Next assign the number one
to the variable if it is on; assign zero if it is off. Now we can make a table of all possible
combinations of the variables as shown in Figure 12.1. The table is formed by writing
I ones and zeros alternately down the first column, writing ones and zeros in series of
two down the second; in fours down the third, etc. For each additional variable,
double the number of ones or zeros written in each group. Only 2" rows are written,
where N is the number of variables, since the combinations will repeat if more rows
I are added. Indicate with a check mark in the result column if the combination repre-
sented in the row is acceptable. For example, combination 4 reads, the ignition is off
and the motor is running and the warning light is on. This obviously is an unsatisfactory
125
I
situation. Combination 7 reads, the ignition is on and the motor is running and the
warning light is oH. This obviously is the normal situation while driving. H we indicate
that the variable is a one by its symbol and that it is a zero by the same symbol, with
a bar over it and if we use the symbol plus (+) to mean "OR" and multiplication to
I
+ + =
mean "AND" we can write the Boolean equation IML I ML IML R where R
means an acceptable result. The three terms on the left hand side are combinations 1, 6,
and 7 of the table since these are the only ones to give a check mark in the result
I
column. The plus signs indicate that any of the three combinations individually is
acceptable. While there are many rules for simplifying such equations, they are beyond
the scope of this book. I
INPVTS
11
I
"
I
11 "
1f I
A fl'tCTO#tlAL ftflnE'HT&T·ION
I
A PICTOfllAl PAESENTATION
"
OF TH£ GATES REOUUIEO 11>
EXPRESS TH£ IOOlUII
EQUATION
liiC+1M1..•u•r·.,.
11
Of THE G.ATtS M':OUlftEO 10
(XPAUS Tl£ 900lEAII
AflON
ll•M+l-lff....Utf+M+U• W°
[QU,
I
FIG URE 1 2 .2 FIGURE 12.3
I
To express this equation in circuitry, two basic circuits are required. They are
named gates because they control the signal passing through. An "AND" gate generates
an output only if all the inputs representing the variables are simultaneously applied and
an "OR" gate generates an output whenever it receives any input. Our equation tran.s-
I
lated into gates would be as shown in Figure 12.2. Only if all three inputs shown for an
"AND" gate are simultaneously present will an output be generated. The output will
pass through the "OR" gate lo indicate a result. Note that any equation derived from
I
the table can be written as a series of "AND" gates followed by one "OR" gate.
It is possible to rearrange the equation to give a series of "OR" gates followed by one
"AND" gate. To achieve this, interchange all plus and multiplication signs, and remove
bars where they exist and add them where there are none. This operation gives us,
I
+ L) (I+ M + L) = R
(I +M+ L) (T+ M
In ordinary language this means if any of the ignition or motor or lamp is on, and
simultaneously either the ignition is oH or the motor is on or the lamp is off, and
I
simultaneously either the ignition is off or the motor is off or the lamp is on, then the
result is unacceptable. Let us apply combination 4 to this equation to see if it is accept-
able. The ignition is off therefore the second Md third brackets are satisfied. The first
bracket is not satisfied by the ignition because it requires that the ignition be on.
I
However, the motor is on in combination 4, satisfying the conditions of the first bracket.
Since the requirements of all brackets are met, an output results. Applying combination
7 to the equation we find that the third bracket cannot be satisfied since its condi-
I
126
I
I
tions are the opposite of those in combination 7. Consequently, no output appears.
I Note that for this equation, an output indicates an unacceptable situation, rather than
an acceptable one, as in the first equation. In gate form, this equation is shown in
Figure 12.3.
I Table 12.1 summarizes the definitions used with the Boolean equations above and
indicates some of the rules which were used to convert the equation represented in
Figure 12.2 to that of Figure 12.3. The more conventional symbols a, b, c are used in
place of I, M, and L.
I
DEFINITIONS
I a, b, c, etc.
ab or a• b or (a)(b)
Symbols used in equations
Reads as "a and b"
I ~+b
a
1
Reads as "a or b"
Reads as "not a"
Reads as "true" or "on"
0 Reads as "false" or "off'
I LAWS
Commutative Laws Distributive Law

I a+h=b+a
ab = ha
a(b + c) = ab + ac
S~iaJ Distributive Law
Associative Laws (a + b)(a + c) = a + be
I (a + b) + c = a + (b + c)
(ab)c = a(bc)
De Morgan's Theorem
a+b = (ab) aG =ca+@
I 1=0
RELATIONSH IPS
0=1
a+a=a a•a = a
I a+l=l
a+a=l
a•l = a
a-a=0
a=a a + ab = a(l + b) = a
I TABLE 12. 1
I Methods for using transistors in gate circuits are illustrated in Figure 12.4. The base
of each transistor can be connected through a resistor either to ground or a positive
voltage by operating a switch. In Figure 12.4(A) if both switches are open, both tran•
I sistors will be non-conducting except for a small leakage current. If either switch A or
switch B is closed, current will flow through RL. If we define closing a switch' as being
synonymous with applying an input then we have an "OR" gate. When either switch is
closed, the base of the transistor sees a positive voltage, therefore, in an "OR" gate the
I output should be a positive voltage also. In this circuit it is negative, or "NOT OR".
The circuit is an "OR" gate with phase inversion. It bas been named a "NOR" circuit.
Note that if we define opening a switch as being synonymous with applying an input,
I then we have an "AND" circuit with phase inversion since both switch A and switch B
must be open before the current through RL ceases. We see that the same circuit can
be an "AND" or an "OR" gate depending on the polarity of the input.
127
LOGIC I
...-- ----- ----- ----- -+ IOV I
A
IOK
I
I
I
<A> GATE USING NPN TRANSISTORS
IF CLOSING A SWITCH IS AN INPUT, THIS IS AN "oR" GATE
I
IF OPENING A SWITCH IS AN INPUT, THIS IS AN "AND" GATE
NOTE: PHASE INVERSION OF INPUT I
+IOV9 - - - + - -- - - -- 4 1 - - - - -- - - I
B
I
I
- - - o OUTPUT
I
I
<B > GATE USING PNP TRANSISTORS
IF CLOSING A SWITCH IS AN INPUT THIS IS AN "ANO" GATE
IF OPENING A SWITCH IS AN INPUT THIS IS AN "OR" GATE
I
NOTE: PHASE INVERSION OF INPUT
8ASIC LOO,C a1tcutrs USING ~AltAWL

FIGURE 12.4
ntANSISTOH I
The circuit in Figure 12.4(B) has identically the same input and output levels but
uses PNP rather than NPN transistors. If we define closing a switch as being an input,
I
we find that both switches must be closed before the current through R,. ceases. There-
fore, the inputs which made the NPN circuit an "OR" gate make the P P circuit an
"AND" gate. Because of this, the phase inversion inherent in transistor gates docs not
complicate the overall circuitry excessively.
I
128
I
I
Figure 12.S(A) and (B) are very similar to Figure 12.4(A) and (B) except that the
I transistors are in series rather than in paralJel. This change converts "OR" gates into
"AND" gates and vice versa.
I
I
I
I
I ( A ) GATE USING NPN TRANSISTORS
IF CLOSING A SWITCH IS AN INPUT THIS IS AN "ANO" GATE
IF OPENING A SWITCH IS AN INPUT THIS IS AN "oR" GATE
I NOTE: PHASE INVERSION OF INPUT
I ...
I
I
I
I ( B >GATE USING PNP TRANSISTORS
IF CLOSING A SWITCH IS AN INPUT THIS IS AN "OR" GATE
I IF OPENING A SWITCH IS AN INPUT THIS IS AN"ANO"GATE

NOTE: PHASE INVERSION OF INPUT
BASIC LOGIC CIRCUITS
I USING u•11s 11tAHIIS101S

FIGURE 12.5
I Looking at the logic of Figure 12.3, let us de6ne an input as a positive voltage; a
lack of an input as zero voltage. By using the circuit of Figure 12.4(A) with three
129
transistors in parallel, we can perform the "OR" operation but we also get phase
I
inversion. We can apply the output to an inverter stage which is connected to an
"AND" gate of three series transistors of the configuration shown in Figure 12.S(A).
An output inverter stage would also be required. This is shown in Figure 12.6(A).
I
By recognizing that the circuit in Figure 12.4(A) becomes an "AND" gate if the
input signal is inverted, the inverters can be eliminated as shown in Figure 12.6(B). I
I
I
ALL TRAHSISTORS - 2N634
I
INVERTER
I
INVERTER
(A ) INVERTERS OOM'ENSATE FOIi PHAS£ INVERSION 01' GATES
,------------ ---------o~~v
I
I
"NoR• GATE TO OTHER
"NOR" OATES
IO K
NOT"AND"
GAtE
I
I
( B ) PHASE INVERSION UTILIZED TO ACHIEVE "AND" AND "OR" !'UNCTIONS FROM THE SANE CIRCUIT.
Circuits representing (I + M + L) (f+ M +L) (f + M + L) =R

FIGU RE 12. 6
If the transistors are made by processes yielding low saturation voltages and high
I
base resistance, the series base resistors may be eliminated. Without these resistors the
logic would be called direct-coupled transistor logic DCTL. While DCTL offers ex-
treme circuit simplicity, it places severe requirements on transistor parameters and
does not offer the economy, speed or stability offered by other logical circuitry.
I
The base resistors of Figure 12.6 relax the saturation voltage and base input voltage
requirements. Adding another resistor from each base to a negative bias potential
would enhance temperature stability.
I
Note that the inputs include both "on" and "off" values of all variables e.g., both
I and 1 appear. In order that the gates function properly, I and I cannot both be posi-
tive simultaneously but they must be identical and oppositely phased, i.e. when I is
I
positive T must be zero and vice versa. This can be accomplished by using a phase
inverter to generate T from I. Another approach, more commonly used, is to take I
and I from opposite sides of a symmetrical flip-Bop.
I
130
I
I ----+20V
I A
IK
I B 2N634
I C
I 27K
-10
I IF A OR B OR C IS RAISED FROM ZERO TO

12 VOLTS THE TRANSISTOR WILL CONDUCT.
8ASIC NOii CMCUIT
I FIGURE 12.7
"NOR" logic is a natural extension of the use of resistors in the base circuit. In the
I circuit of Figure 12.7, if any of the inputs is made positive, sufficient base current
results to cause the transistor to conduct heavily. The "OR" gating is performed by
the resistors; the transistor amplifying and inverting the signal. The logic of Figure
I 12.3 can now be accomplished by combining the "NOR" circuit of Figure 12.7 with
the "AND" circuit of Figure 12.S(A). The result is shown in Figure 12.7. In comparing
the circuits in Figure 12.6(A) and 12.8, we see that the "NOR" circuit uses one-fourth
as many transistors and one-half as many resistors as the brute force approach. In fact if
I we recall that the equation we are dealing with gives R rather than R, we see that
we can get R by removing the output phase inverter and making use of the inherent
inversion in the "NOR" circuit.
I
I
I
I
·-
ALLTIWfSIITOfll
OV
( B)
_.,,
I (A)
Nor logic using inversion for
"and" gate
Nor logic using series transistors for

I "and" gate
FIGURE 12.8
131
I
Because of the fact that a generalized Boolean equation can be written as a series
of "OR" gates followed by an "AND" gate as was shown, it follows that such equations
can be written as a series of "NOR" gates followed by a "NOR" gate. The low cost
of the resistors used to perform the logic and the few transistors required make "NOR"
I
logic attractive.
Vee I
IK
Re
RK
I
--+
I
Ie N
M
-+ Dvce I
----+
IK
I
RK
RT
11T
I
DEFINITIONS
I
IK: MINIMUM CURRENT THROUGH RK FOR
TURNING TRANSISTOR ON
Ie = MINIMUM BASE CURRENT FOR
I
TURNING TRANSISTOR ON
I r =BIAS CURRENT TO KEEP TRANSISTOR
OFF AT HIGH TEMPERATURES
I
M = MAX . NUMBER OF INPUTS PERMITTED
N "MAX. NUMBER OF OUTPUTS PERMITTED
Vee MAX. BASE TO EMITTER VOLTAGE WHEN
I
THE TRANSISTOR IS ON .
VcE = MAX. COLLECTOR TO EMITTER VOLTAGE WHEN
THE TRANSISTOR IS ON. I
Circuit used for design of NOR circuitry
FIGURE 12.9 I
A detailed "NOR" building block is shown in Figure 12.9. The figure defines the
basic quantities. The circuit can readily be designed with the aid of three basic
equations. The first derives the current IK under the worst loading conditions at the
I
collector of a stage.
Vee - Vu - lco,.Rc
RK + NRo
h I
....... w ere co" (12a) I
132
I
I
is the maximum l oo that is expected at the maximum junction temperature. The second
I equation indicates the manner in which It< is split up at the base of the transistor.
I I ( = I B + M (Vco:w - VcsN Vu+ RK
- VH)-(Vn- Yco:N)+ I
COM (12b)
I where Vcgs is the minimum expected saturation voltage, VcEw is the maximum expected
saturation voltage and V"s is the reverse bias required to reduce the collector current
to l oo. Vn is a negative voltage. The third equation ensures that Ve11 will be reached
to turn off the transistor.
I I
cow
+<Ycgw - Vu)M _ I
RK - T (12c)
Knowing IT and choosing a convenient bias potential permits calculation of RT, In
I using these equations, first select a transistor type. Assume the maximum possible
supply voltage and collector current consistent with the rating of the transistor and the
maximum anticipated ambient temperature. This will ensure optimization of N and
I M. From the transistor specifications, values of l oou, Va,:, VcEs, and Io (min) can be
calculated. Ia (min) is the minimum base current required to cause saturation. Re is
calculated from the assumed collector current. In equation (12a) solve for IK using the
desired value of N and an arbitrary value for RK. Substitute the value for IK in equa-
I tion (12b) along with a chosen value for M and solve for In. While superficially l e need
only be large enough to bring the transistor into saturation, increasing Is will improve
the rise time.
I
I
I
I CLAMPING DIODE REDUCES STORAGE CAPACITORS REDUCE STORAGE
I TIME TO INCREASE SPEED TIME TO INCREASE SPEED
I (A) ( B)
I FIGURE 12. 10
Circuit speed can also be enhanced by using a diode as shown in Figure 12.l0(A)
I to prevent severe saturation or by shunting RK by a capacitor as in 12.l0(B). The capac-

itors may cause malfunction unless the stored charge during saturation is carefully
controlled; they also aggravate crosstalk between collectors. For this reason it is pref-
erable to use higher frequency transistors without capacitors when additional speed
I is required.
Table 12.2 lists the ch.aracteristics of common logic systems employing transistors.
133
I
NAME
TYPICAL CIRCUIT
I Positive signals ore defined os 1 I I
+
RTL
Resistor
00--,1\11,,-- --. o+ b+c
I
I
l1'11rulstor
logJc
( NOR )
RCTL a +b
I
Resistor
capacitor
tran,lstor
logic
+
ob "'ii".tb
DCTL
D~ a b
coup!~
transistor
logic
DL
Diode
lol(ic
I
+
I
LLL
Low
0 0 - - -. . .- - .
o+b+c
I
level
logic
co----tM--- -1 I
CML I
Curttnt a
mode
lo&lc
COMMON LOGIC fflTIMS
134
I
SUITABLE TRANSISTORS
DESCRIPTION FEATURES
GERMANIUM SILICON
Logic Is performed by re- Th e circuit design ls 2N43A• 2N335•

sistors. Any positive input straightforward. All logical 2N78•
produces an inverted out• operations can be per• 2Nl67•
put irrespective of the formed with only this cir- 2Nl69A
I other inputs. Resistor Re

gives temperature stability.
(Seep. 131)
cuit. Many transistors
readily meet the steady
state requirements.
2N396•
2N525
2N526•
2N635
2Nl057
Same as RTL except that Faster than RTL at the ex• No standard
capacitors are used to en· pense of additional comPo- types are
hance switching speed. nents and stringent stored characterized
I The capacitors increase the

base current for fast 001-
lector current turn on and
minimize storage time by
charge requirements. specifi~y
for this
logic
2N404•
2N525
supplying a charge equal 2N634
to the stored base charge. 2Nl ll5
Logic is performed by Very low supply voltages 4JD1A68

transistors. Vc11 and Vu, may be used to achleve
I
(PNP Alloy)
measured with the !:ran· high power efficiency and Surface
slstor in saturation, define mlnlaturization. Relatively barrier t ypes
the two logic levels. V ca: fast ,witching speeds are
must be much less than practical.
Va■ to ensure stability and
I circuit flexibility. ( See p.

130)
I
Logic is performed by Several gates may be used 2N43A• 2N333•
diodes. The output Is not between amplillers. High 2N78• 2N337•
inverted. Ampl16ers are re- speeds can be attained. 2Nl23•
quired to maintain the oor• Non • inversion slmplilles 2Nl67•
rect logic levels through circult design problems. 2N396•
several gates in aeries. Relatively inexpensive 2N525
I oomponents are used. 2N635
I L ogic is performed by
diodes. The output Is in-
verted. The diode D Iso-
lates the transistor from
The number of Inputs to
the diode gate does not
affect the transistor base
current thus giving pre•
2Nl23•
2N396•
2N525
2N526•
2N335•
2N338•
the gate permitting R to
I
dlctable performance. The 2N635
turn on the oollector cur• small voltage excursions 2Nlll5
rent. By proper choice of minimize the effects of
components only small stray capacitance and en•
volta1e changes occur. hance switching speed.
Logic is performed by Very high switching speeds 2Nl289 2N337*

transistors which are biased are possible because the Mesa Types 2N338*
f rom const ant current transistors are operated at
I
sources to keep them far optimum operating oondi-
out of saturation. Both in- tions. Although the volt•
verted and non-inverted age excursion is small the
outputs are available. circuitry Is relatively un-
affected by noise.
• M Uitary types.
TABLE 12 .2
~
I
BINARY A RITHMETIC
Because bistable circuits can be readily designed using a variety of components

from switches to transistors, it is natural for counters to be designed to use binary
I
numbers, i.e., numbers to the base, or radix, 2. In the conventional decimal system, a
number written as 2904 is really a contraction for 2 X 10' + 9 X 10' + 0 X 10' + 4 X 1.
Each place refers to a different power of 10 in ascending order from the right.
I
In the binary system, only two symbols are permitted, 0 and 1. All numbers are
constructed on the basis of ascending powers of 2. For example, ll0ll means
1 X 2' + 1 X 21 + 0 X 21 + 1 X 2' + 1 X 1. This is 27 in the decimal system.
This notation applies also to decimal fractions as well as integers. For example, the
I
number 0.204 is a contraction of 2 X 10-• + 0 X 10-• + 4 X 10-•. Similarly, the binary
number 0.1011 is a contraction of 1 X 2-• + 0 X 2-• + 1 X 2-a + 1 X 2.... Using this
construction, a table of equivalent binary and decimal numbers can be obtained as
I
shown below.
Binary
0
Decimal
0
Binary
0.000
Decimal
0.000
I
1
10
11
1
2
3
0.001
0.010
0.011
0.125
0.250
0.375
I
100
101
no
4
5
6
0.100
0.101
0.110
0.500
0.625
0.750
I
lll 7 0.lll
Arithmetic operations can best be described by comparative examples.

0.875
I
Addition
42 101010
10010
Subtraction
-18
44 101100
10010
I
.±.!§.
60 111100 - 26 ll0l0
During addition, the digits in a column are added to the carry from the previous
I
column. The result is expressed as a sum digit which is recorded and a carry digit
which is applied to the next column. The term digit generally refers to the figures in a
decimal number; the term bit (an abbreviation of binary digit) is used with binary
numbers. If the digit being subtracted is the larger of the two in the column, the
I
techniques used to handle this situation in decimal subtraction are also applicable in
the binary system. I
Multiplication Division
~
42
21
101010
10101
101010
1.35
5 V6~7500
5
1.0101
101 V110.llOOO
101
I
84
882
101010
101010
1101110010
17
15
-zs--
111
1 01
1000
I
25 101
110
Multiplying a binary number by two is equivalent to adding a zero to its right hand
I
I
I
I side, just as multiplying a decimal number by 10 adds a zero. This is equivalent to
shifting the number one place to the left. In computers, this operation is done by a
shift register. Division can be readily understood since it involves the operations of
additions, subtraction and multiplication only.
I Computers generally employ circuits called adders wWch can perform the opera-
tion of addition. Adders can also perform other arithmetic operations besides addition.
For example, an adder can perform subtraction by the use of a number's complement.
I The complement is obtained numerically by interchanging all ones and zeros. In

equipment the complement can be obtained by taking the output from the opposite
side of flip-flops.
I The manner in which subtraction with an adder is accomplished is given by the

following example:
Problem: Calculate
I 1101 - 1001
Complement of 1001 is 0110
=
(1111 - 1001 0110)
=
1101 + 0110 10011
I Add:
Add 1 10011 + l
Omit left hand digit to obtain
=
10100
=
I 1101 - 1001 100
Flip-flops can be connected in series so that the first flip-flop will alternate states
with each input pulse, and successive flip-flops will alternate states at half the rate of
I the preceding flip-flop. In this way the flip-flops assume a unique configuration of
states for a given number of input pulses. The flip-flops actually perform the function
of binary counting. A practical circuit of a binary counter is shown in Figure ll.3(B)
The count in a binary counter can be determined by noting whether each stage is in
I the l or O condition, and then assigning the appropriate power of 2 to the stage to
reconstruct the number as in the examples above.
If it is required to count to a base other than 2, a binary counter can be modified
I to count to the new base.

The rules for accomplishing the modification will be illustrated for a counter to
the base 10.
I Rule
1) Determine the number of binary stages M =
Example
10
(N) required to count to the desired 2' < 10<2'
I new base (M)
2) Subtract M from 2"
N=4
=
2' - 10 6
3) Write tl1e remainder in binary form 6=110
I 4) When the count reaches 2"- 1, feed
back a one to each stage of the counter
having a one in the remainder shown in 3)
2s-, = =
21 1000
Feedback added gives
l 110
I As additional pulses are added beyond tl1e C(lunt 2N-1, they will count through to M
and then recycle to zero. This method is based on advancing the count at the point 2s-,
to the extent that the indicated count is 2N when M input pulses are applied. The feed-
I back is applied when the most sigoi6cant place becomes a one but it is imperative that
feedback be delayed until the counter settles down in order to avoid interference with
the normal counter action.
I
L..-_1_3_._u_N_1J_u_N_c_T_1_o_N_T_R_A_N_s_1_s_T_o_R_c_1R_c_u_1T_s
_ ___,j I
The unijunction transistor is a three-terminal semiconductor device which bas
electrical characteristics that are quite different from those of conventional two-junction
transistors. Its most important feature is its highly stable negative resistance character-
I
istic which permits its application in oscillator circuits, timing circuits and bistable
circuits. Circuits such as sawtooth generators, pulse generators, delay circuits, multi-
vibrators, one-shots, trigger circuits and pulse rate modulators can be greatly simplified
by the use of the unijunction transistor.
I
THEORY OF OPERATION
The construction of the unijunction transistor is shown in Figure 13.2. Two ohmic
I
contacts, called base-one ( Bl) and base-two (B2) are made at opposite ends of a
small bar of n-type silicon. A single rectifying contact, called the emitter ( E), is made
on the opposite side of the bar close to base-two. An interbase resistance, Ru, of
I
between 5K and lOK exists between base-one and base-two. In normal circuit opera-
tion, base-one is grounded and a positive bias voltage, Vaa, is applied at base-two.
With no emitter current flowing, the silicon bar acts like a simple voltage divider
(Figure 13.3) and a certain fraction, ,, of Vas will appear at the emitter. If the emitter
I
voltage, Vg, is less than ,, Vu, the emitter will be reverse-biased and only a small
emitter leakage current will flow. If V" becomes greater than ,, Vn, the emitter will be
forward biased and emitter current will flow. This emitter current consists primarily
I
of holes injected into the silicon bar. These holes move down the bar from the emitter
to base-one and result in an equal increase in the number of electrons in the emitter
to base-one region. The net result is a decrease in the resistance between emitter and
base-one so that as the emitter current increases, the emitter voltage decreases and a
I
negative resistance characteristic is obtained (Figure 13.5).
I
B2 I
B2
Bl P-N EMITT ER
JUNCTION
OHMIC
CONTACTS
I
N-TYPE
SI LICON BAR I
Symbol for unijunction transistor with
indenti6cation of principle voltages and
Construction of unijunction transistor-
cross sectional view
I
currents
FIGURE 13.1 FIGURE 13.2
The operation of the unijunction transistor may be best understood by the repre-
I
sentative circuit of Figure 13.3. The diode represents the emitter diode, Re, represents
the resistance of the region in the silicon bar between the emitter and base-one and
Ra, represents the resistance between the emitter and base-two. The resistance Rs,
I
varies with the emitter current as indicated in Figure 13.4.
I U NIJUNCTION T RAN SISTOR CI R C UITS
I B2
IE
(MA)
0
RBI
(OHMS)
4 600
I E 2
I
!5
10
2000
900
240
I !50
20 90
I 81
Unijunction transistor representative

Bl
Variation of Ra, with I■ in representa-

50 40
circuit tive circuit (typical 2N492)
I FIGURE 1 3.3
The large signal properties of the unijunction transistor are usually given in the
FIGURE 13.4
form of characteristic curves. Figure 13.5 gives typical emitter characteristic curves as
I plots of emitter voltage vs. emitter current for fixed values of interbase voltage. Figure
13.6 gives typical interbase characteristic curves as plots of interbase voltage vs. base-
two current for fixed values of emitter current. On each of the emitter characteristic
I curves there are two points of interest, the peak point and the valley point. On each of
the emitter characteristic curves the region to the left of the peak point is called the cut-
off region; here the emitter is reverse biased and only a small leakage current Bows. The
region between the peak point and the valley point is the negative resistance region.
I The region to the right of the valley point is the saturation region; here the dynamic
resistance is positive and lies in the range of 5 to 200.
:r\.
..
I I
I t.
I
.... _,.
7, 7
I I
,, I
I • IOIM
I/
I
I
I
I
I
•
~
' C,
' ........
I "
"
.' ri
'-
I/ 1,-
,._.. ·- ,•io1111,1
.'
L--
I'\
!/ ..... •·.!.- .........
I '
..
..
'l'i: "
"
" 1':
r.....
.... ,_
... "-'" ·'-
T-1 ..... . '
/
,
~
.....
.._
,._
- ._
,_
L--
....
I
•
I
'-
L ' .._ I
'
I a t a t • T I
",""r'm
I JO fl II • M
0
e • • P M
IJIJIIIMN 'IOL.t MI. •V. .• 'IOl,.TS
• • ~ N
U.1t"TVI ~ . , , .. 1, • · ' "~
I Typical emitter characteristics

(type 2N492)
FIGURE 13.!5
Typical interbase characteristics
(type 2N492)
FIGURE 13.6
I PARAMETERS- DEFINITIO N ANO MEASU REMENT
1. Rn - Interbase Resistance. The interbase resistance is the resistance measured

between base-one and base-two with the emitter open circuited. It may be measured
I with any conventional ohmmeter or resistance bridge if the applied voltage is five
volts or less. The interbase resistance increases with temperature at about 0.8% / °C.
This temperature variation of Raa may be utilized for either temperature compensation
or in the design of temperature sensitive circuits.
I 2. 11 - Intrinsic Stand-off Ratio. This parameter is defined in terms of the peak

point voltage, Yr, by means of the equation: Yr 11Vaa + Vo .. . where Vo is
about 0.70 volt at 25°C and decreases with temperature at about 3 millivolts/°C. It is
=
UNIJUNCTION TRANSISTOR CIRCUITS I
found that ,, is constant over wide ranges of temperature and interbase voltage. A
circuit which may be used to measure 'I is shown in Figure 13.7. In this circuit R,. C,
and the unijunction transistor form a relA:<ation oscillator and the remainder of the
I
circuit serves as a peak voltage detector with the diode automatically subtracting the
voltage Vo. To use the circuit, the voltage V, is set to the value desired, the "cal."
button is pushed and R. adjusted to make the meter read full scale. The "cal" button
is then released and the value of 'I is read directly from the meter (1.0 full scale). I(
I
the voltage V, is changed, the meter must be reca.Hbrated.
3. IP - Peak Point Current. The peak point current corresponds to the emitter
current at the peak point. It represents the minimum current which is required to fire
I
the unijunction transistor or required for oscillation in the relaxation oscillator circuit.
Ir is inversely proportional to the interbase voltage. Ir may be measured in the circuit
of Figure 13.8. In this circuit, the voltage V, is increased until the unijunction transistor
fires as evidenced by noise from the loudspeaker. V, is then reduced slowly until the
I
unijunction ceases to 6re and the current through the meter is read as Ir.
I
I
.--------o+V&B
0-30V
I
I
TUT a1cu,r ,01 INTIINSIC STAN0011 IATI0 !.)
FIGURE 13.7
TIST QICUIT ,01 HAIC l'OINT IMITTIIS
CUHINT (II')
FIGURE 13.8
I
4. Vr - Peak Point Emitter Voltage. This voltage depends on the interbase voltage
as indicated in (2). Vr decreases with increasing temperature because of the change
in Vo and may be stabilized by a small resistor in series with base-two.
I
5. Vs (sat)- Emitter Saturation Voltage. This parameter indicates the forward
drop of the unijunction transistor from emitter to base-one when it is conducting the
maximum rated emitter current. It is measured at an emitter current of 50 ma and
I
an interbase voltage of 10 volts.
6. In, (mod) - Interbase Modulated Current. This parameter indicates the effective
current gain between emitter and base-two. It is measured as the base-two current
under the same condition used to measure v~ (sat).
I
7. ltto - Emitter Reverse Cu.rrent. The emitter reverse current is measured with
60 volts between base-two and emitter with base-one open circuit. This current varies
with temperature in the same way as the loo of a conventional transistor.
I
8. Vv - Valley Voltage. The valley voltage is the emitter voltage at the valley
point. The valley voltage increases as th~ interbase voltage increases, it decreases
with resistance in series with base-two and increases with resistance in series with
base-one.
I
9. Iv - Valley Current. The valley current is the emitter current at the valley
point. The valley current increases as the intcrbflse voltage increases and decreases
with resistance in series with base-one or base-two.
I
140
I UN IJU N CTION T R A N SISTOR CI R CUIT&
RELAXATION OSCILLA TOR
I The relaxation oscillator circuit shown in Figure 13.9 is a basic circuit for many
applications. It is chiefly useful as a timing circuit, a pulse generator, a trigger circuit
or a sawtooth wave generator.
I BASIC ltfLAJCATIOH OSCII.LATOlt
I WITH TYl'ICAl WAVf,O•MS

FIGURE 13.9
I Conditions for Oscillation.

V, - Vr
R,
> I •• V, - Vv
R,
<I V
I It is found that these conditions are very broad permitting a 1000 to 1 range of R,
from about 2K to 2M. R, is used for temperature compensation, its value may be cal-
culated from the equation:
R., a 0.6S Rea (units are ohms, volts)
I ,iV,
The maximum and minimum voltages of the emitter voltage waveform may be
calculated from:
Vr. (max.)= V, = ,iVn + 0.7 volt
I Va (min.)"" 0.5 V11 (sat)

The frequency of osc.illation is given by the equation:
1
I f 5!f R,C In ( - 1- )
1-,i
and may be obtained conveniently from the nomogram of Figure 13.10.
I j ! 2 ~
lt(SJSTANC[ - ,-.1 - KllOHMS
~ :: .. .
·7
0
I? ~ ~ ~ l!
1at ttl l l t l e I 11 f I I I I I I I , l1111lr 11L I I I
I
I 7489,
MAX I MUM 'REQU[NCY TVPES 2H4J1 , 2N4t2
NOMINAL FR[OU£NCY TYPES 2N490
I Flll[OU(NCY- f - CYCLES ll'IUI HCOHD
I NOMINAL l'REOO[NCY TYPES 2N49), ZN 4t'4
I C I .. I
2
I II I I
ft . . . .
I • '"'""'1' I',.,, ••
H
1
9d:JJa:
4,,,,,,,,, I •I.,. I""""",,,.,
a~q~a~
CAll'M;ITAHC[ • C - M ICM),AR401
qgg
.
I Nomogram for calculating frequency of relaxation oscillation

FIGURE 13. 10
141
UNIJUNCTION TRANSISTOR CIRCUITS I
The emitter voltage recovery time, tu, is defined as the time between the 90%
and 10% points on the emitter voltage waveform. The value of tn is determined
primarily by the size of the capacitor C in Figure 13.9 and may be obtained from
Figure 13.11.
I
_
~
~ 50
::: 30
100
MAX 110'1
':/MEAN -
I
l3 20
0:
u
i
I
..
!;;!
10
~ - .-
--
M IN 8 0"/l
,/
11 ~ 2 ly[
I
.:.
~
;:
3
2
---
...
-
---- 11:,19,,IA
-.l I-
11
I
.001 .01 0.1
CAPACITANCE -C-(MICROFARA0S)
1.0
Recovery time of unijunction transistor relaxation oscillator vs. capacity

10
I
FIGURE 13. 11
I Bt<pukl 51!1
tv,.
Ia, (mod)
Units are ma,
volts, mµf, µ.sec.
!
The pulse amplitude at base-one or base-two may be determined from the equations:
I-.,,.,., B!I!
[V,-l/ 2V&(sat)]C
I
I
7
SAWTOOTH WAVE GENERATOR
The circuit of Figure 13.12 may be used as a linear sawtooth wave generator. The
NPN transistor serves as an output buffer amplifier with the capacitor C, and resistor R.
I
serving in a bootstrap circuit to improve the linearity of the sawtooth. R, and C1 give
integrator type feedback which compensates for the loading of the output stage. Opti-
mum linearity is obtained by adjusting R,. Linearity is 0.3% or more depending on
I
hr& of the NPN transistor.
+2ov I
12K IK
N'1'
OUTPUT
6V P-P
I
V SYNC
INPUT
2N491
2Nl67
2N336
I
2N492
0.1
vvt,
OUTPIJT
I
c, RL IOV P-P
0.05 2K IKC
I
SAWTOOTH GfHD.ATO. WITH HIGH UHEAJUTY
FIGURE 13. 12
I
142
I
I UNIJUNCTION TRANSISTOR CIRCUITS
S TAIRCASE WAVE GENERATOR
I Figure 13.13 shows a simple staircase wave generator which has good stability and
a wide operating range. The unijunction transistor Q, operates as a free running oscil-
lator which generates negative pulses across R,. These pulses produce current pulses
I from the collector of Q. which charge capacitor C, in steps. When the voltage across C,
reaches the peak point voltage of Q. this transistor 6res and discharges C,.
Resistor R, determines the frequency of the steps and resistor R. determines the
I number of steps per cycle. The circuit shown can be adjusted for a step frequency
from 100 cps to 2 KC and the number of steps per cycle can be adjusted from one to
several hundred. This circuit can also be adapted to a frequency divider by cascading
stages similar to the stage formed by Q, and Q,.
I . - -...- 4 t - - - - - - - - - - . - - - - - 4 t - - 0 + 20V
I 3300 3300
I 03 I A
Lr
I 01
2N491
2N491 l_,-f"
STAIRCASE
OUTPUT
IOV P-P
I STAIRCASE WAVI GfNOAT0lt

(flfQllfNCY l>IVIOR)
I TIME DELAY RELAY

FIGURE 13. 13
Figure 13.14 shows how the unijunction transistor can be used to obtain a precise
I delay in the operation of a relay. When the switch SWl is closed, capacitor ~ is
RELAY
CONTACTS
I Rr
3K-500K 3300
----o--,'o--o + VI
SWI (24-32V)
I 2N49I
2N492 3300
2W
I + Cr RELAY GE A38
100,- fd 1200 S2791G200
I 25V DPOT
I TIIM PILAY OltCUIT WITH ltlLA Y

FIGURE 13. 14
143
UN I JUNCTION TRANSISTOR CIRCUITS I
charged to the peak point voltage at which time the unijunction transistor fires and the
capacitor discharges through the relay thus causing it to close. One set of relay contacts
hold the relay closed and the second set of contacts can be used for control functions.
To be used in this circuit, relays must have fast operating times, low coil resistance
I
and low operating power.
The time delay of this circuit is determined by RT, about one second of delay is
obtained for each lOK of resistance, RT. The time delay is quite independent of tem-
I
perature and supply voltage.
MULTIVI BRATOR I
Figure 13.15 shows a unijuoction transistor multivibrator circuit which has a fre•
quency of about 1 Kc. The conditions for oscillation of this circuit are the same as for
the relaxation oscillator. The length of time during which the unijunction transistor is off
(no emitter current Bowing) is determined primarily by R,. The length of time during
I
I
,--------...---0 + v,
+25V
I I
~ 12--- 11 -i
I I
I i ,,,,,--- + 12.5 V
Vo +-_ _ _ _ .,_,._~
VE
V 7
L....Y' L_
. - - ,-
82 L....---' i.-_
+ 3V
+ 21 V
+ 16 V
I
IN457
2N491
Vo
- - +0.7
- - - 8.5 V
I
UNIJUNCTION TRANSISTOll MUlTIVIUATOll
I
WITH TYl'ICAL WAVI ,oaMS
FIGURE 1 3.15
I
RELAY
I
OR
LOAD I
2N491
I
I
--
Unijunction transistor multivibrator used to drive NPN transistor
FIGURE 13 . 16
I
144
I
I UN I JU N CTION TRANSISTOR CIRCUITS
which the unijunction transistor is on is determined primarily by R.. The periods may
1 be calculated from the equations:

t, = R,C ln[ V,V, -_ VE]
V,
I Where
t. = R.C ln[V• ◊,~~.Ve]
Ve is measured at an emitter current of Ia= V, <~•.it R,) and may be obtained
-1 from the emitter characteristic curves.
An NPN transistor may be direct coupled to the multivibrator circuit by replacing
the diode as shown in Figure 13.16. This circuit has the advantage that the load does
I not have any effect on the timing of the circuit.
H Y BHID TIMING C IRCU ITS

The unijunction transistor can be used in conjunction with conventional PNP or
I NPN transistors to obtain versatile timing circuits such as symmetrical and unsym-
metrical multivibrators, one-shot multivibrators, variable frequency oscillators and time
delay circuits. The advantages of these circuits inclurle: (1) The output at the collector
I of each transistor is very nearly an ideal rectangular waveform. (2) The circuits will
tolerate large variations in hFE or lco of the transistors as compared to conventional
circuits. (3) The circuits are not prone to "lock-up" or non-oscillation. (4) The timing
stability is excellent. (5) A single small timing capacitor Cr can be used, avoiding the
I use of electrolytic capacitors in many applications.

The hybrid timing circuits can use either germanium or silicon transistors as
desired. The basic circuits for PNP or NPN transistors are shown in Figures 13.17 and
I 13.18. In both of these circuits, the junction transistors form a conventional Bip-8op
with the unijunction transistor serving the timing and triggering fu'lctions. Each time
the unijunction transistor fires the discharge current from the capacitor Cr develops a
pulse across R,. which triggers the flip-flop from one state to the other.
I The basic circuits as shown in Figures 13.17 and 13.18 will operate at frequencies
from about 1 cps to 500 cps and at temperatures above 75°C. Frequencies from 1 cycle
per minute to 100 KC can be obtained by proper choice of Cr and R,. and suitable flip-
Bop design. The operating temperature range may be extended to 150'C by the use of
I silicon transistors.
I ~-------- ----<>-20'1
c,
I 'o
o,
t.N491
I
I
!IOOQ
L--- - -- --<>G
I IASIC HY81UD TIMING CIRCUITS USING PNP AND Nl'H TRANSISTOltS
FIGURE 13.17 FIGURE 13. 18
145
UN I JUNCTION TRANIIUITOR CIRCUITII I
The basic hybrid timing circuits in Figures 13.17 and 13.18 can be adapted to
perform desired functions by connecting resistors or potentiometers between the points
in the circuit (C,. C., E, G) as indicated below.
(A) Symmetrical Multivibrator - Square Wave Generator
r
E o~
RT
---'V\/\,......-- - - 0 G (FIXED)
I
'l.r -- - - o
Vo
G (VARIABLE)
----1L.JL I
R2
Connecting the resistor between points E and G in the basic circuits gives a square
wave generator which bas perfect symmetry. By the use of a 2 megohm potentiometer
I
the frequency may be varied continuously from 1 cps to 500 cps. The frequency is
f= l/2RTCr.
(B) One-Shot Multivibrator
I
C1 0
RT
VV\, OE (FIXED) I
-1L
C1
R1>3K R2
E (VARIABLE)
Vo t-r--i
, ~Rrcr I
The collector of Q• will be positive in the quiescent state. A positive pulse at the
base of Q, in Figure 13.17 or a negative pulse at the base of Q, in Figure 13.18 will
trigger the circuit. At the end of the timing interval, the unijunction transistor will lire
I
and cause the circuit to revert to its quiescent state. This circuit has the advantage of a
fast recovery time so it may be operated at a high duty ratio without any loss of
accuracy.
I
(C) Non-symmetrical Multivibrator
I
E (VARIABLE l
,, ~(Rn + R1l Cr
I
t2:li:(Rrz+R1) Cr
I
I
.,__ _ _-OE (FIXED)
I
The timing capacitor Cr will be charged through the resistor RT, or Rn which is
connected to the positive collector. The diodes will isolate the other resistor from the
I
146
I
I UNIJUNCTION TRANSISTOR CIRCUIT&
timing capacitor. The two parts of the period (ti. t.) can thus be set independently by
~
RT, and RTt and may differ by as much as 1000 to 1.
(D) Non-symmetrical Multivibra~or - Constant Frequency
'1
I
OE
I
This configuration gives a multivibrator which has a constant frequency but a
I variable duty cycle.
(E) Variable Frequency Oscillator
I E
I
I
INPUT
- Ii
I INPUT
1·
...!..+
I G
I v-- - - - oE
6Vj
I
I In the equations Van is the voltage between base-one and base-two of the unijunction
transistor. These circuits give a variable frequency square wave output. For the first
two circuits the frequency is proportional to the input current. The first circuit has a
higher effective current gain than the second circuit, but the temperature stability is
I not as good. The third circuit is useful if only a small range of frequency variation is
desired. The variation of frequency with input voltage is linear only for small changes
in input voltage.
I Further information on the characteristics and circuit applications of the unijunction

transistor is given in application note ECG-380, "Notes on the Application of the Sili-
con Unijunction Transistor". Available on written request.
147
I
'i•1
14. TUNNEL DIODE THEORY AND
SWITCHING CIRCU I TS
The tunnel diode is a new semiconductor device which offers the device en-
gineer a unique physical mechanism for semiconductor operation and at the same
time offers the circuit engineer a unique set of electrical characteristics for im-
proved circuit design. In comparison with conventional types of transistors, the tunnel
diode offers advantages of extremely high frequency operation, low noise, small size,
low operating power levels, together with a potential low cost and high reliability.
I
Physically, the tunnel diode is a two terminal device consisting of a single PN
junction. The essential difference between a tunnel diode and a conventional diode is
due to the fact that the conductivity of the P and N material used in the fabrication of
I
a tunnd diode is more than 1,000 times as high RS the conductivity of the material
used in the fabrication of conventional diodes. This higher conductivity is obtained
by increasing the concentration of acceptor and donor impurities in the semiconductor
material when it is formed as explained in Chapter 1 and 2.
I
Owing to the very high conductivity of the P and N materials used in fabricating
tunnel diodes the width of the junction (the depletion layer) is ve.r y small, of the order
I
of 10◄ inch. Because of the extremely narrow junction it is possible for electrons to
tunnel through the junction even though they do not have enough energy to surmount
the potential barrier of the junction. Although tunneling is impossible in terms of
classical physics, it can be explained in terms of quantum mechanics. For this reason
I
the mechanism is commonly called quantum mechanical tunneling.
Referring to the diagram of a rcctifler shown in Figure 1.4, it is seen that under
I
conditions of reverse bias there are no free electrons in the P region and no free holes
in the N region to conduct charge across the junction. In the tunnel diode however,
a small reverse bias will cause the valence electrons of the semiconductor atoms near
the junction to tunnel across the junction into the N region and thus the tunnel diode
I
wili conduct under reverse bias. Similarly, for a low value of applied forward voltage
the conventional rectifier will not conduct since the holes and electrons do not have
enough energy to overcome the potentiRl barrier of the junction. In the tunnel diode
a small forward bias will cause the electrons in the N region to tunnel across the junc-
I
tion into the P region (appearing as valence electrons in the semiconductor atoms),
and thus the tunnel diode will also conduct under small values of forward bias. II the
forward bias on a tunnel diode is increased (e.g. above 50 millivolts for germanium)
I
the energy of the free electrons of the N region will become greater than the energy
of the valence electrons in the P region and consequently the tunneling current will
decrease. The decrease in tunnel current with increasing forward bias causes the nega-
tive conductance characteristic which is typical of the tunnel diode. As the forward
I
bias is increased further (above 300 millivolts for germanium) the free holes and elec-
trons will have enough energy to Bow over the potential barrier of the junction in a
manner identical to that of a conventional diode.
I
Quantum mechanical tunneling, with a theoretical frequency limit of 10' mega-
cycles per second, is inherently a much higher frequency mechanism than the dri~
and diffusion mechanisms involved in the operation of conventional diodes and tran-
I
sistors. In practice, the frequency I.imitation of the tunnel diode is detem1ined by the
parasitic capacity, inductance and resistance of the device rather than by the tunneling
mechanism itself.
I
148
I
I TUNNEL DIODE THEORY ANO SWITCHING CIRCUITS
ELEC TRI CAL C HARACTERI S TI CS
I A static characteristic curve for a typical germanium tunnel diode is shown in

Figure 14.l. It is seen from this figure that the tunnel diode exhibits a low a-c resistance
under reverse bias and for low values of forward voltage. With intermediate values of
I forward voltage the diode exhibits a negative conductance characteristic. At higher

values of forward bias the diode characteristic approaches the forward characteristic
of a conventional diode shown by the dotted line. The points on the characteristic
curve where the a-c conductance is zero are called the peak point and the valley point.
I The voltages and currents at these points are called the peak point voltage - V ,., the
valley point voltage - V "• the peak point cuffent - I,., and the valley point current - Iv.
The forward voltage at a current equal to the peak point current is designated by VPr.
I
I
...
I ~
0:
0:
B
0
o.e Ip
: 0.6Ip ~ - ' - -+-1---1-----1---....;..- - ~- - - - 1
I 'It
..
0:
0
~
N
::;
0 .41:p
I ~
0:
i
1:y
I Yp 0.10 0. 20 030
FORWARD VOLTAGE - VOLTS
Vy O. ◄O
I STATIC CHAUCTPJSTIC Of TYPICAL GIRMANIUM TUNNU DIODE

FIGURE 14.1
The voltages of the tunnel diode characteristic are determined by the semicon-
I ductor material of which the tunnel diode is made and can only be controlled over a
small range. The currents of the tunnel diode characteristics can be varied over a very
wide range however. The peak current which is the characteristic commonly specified
I can be varied from 10.ua to 10 amperes or more although most applications require
peak currents in the range of 1 to 50 ma. It is generally desired that the ratio of the
peak current to valley current have a high value although the maximum value is deter-
mined by the semiconductor material.
I C
I
I SMAU SIGNAL IQUIVAUHT c1•cu11 o, A TUNNEL OIOOI
FIGURE 14.2
149
TUNNEL. DIVIDE THEORY AND SWITCHING CIRCUITS I
The small signal (ac) equivalent circuit of a tunnel diode biased in the negative
conductance region is shown in Figure 14.2. The inductance, L., is determined pri-
marily by the package and the leads. For a TO-18 transistor package L. is about
6 X 10-0 henries if connections are made to the leads only and about 3 X 10◄ henries
I
if connections are made to the case and the two common leads. For a microstrip pack-
age L. is about 3 X 10-10 henries. The resistance, R., is determined by the bulk resist-
ance of the semiconductor material and is generally less than 2 ohms. The capacity, C,
I
is primarily due to the capacity of the junction although a small portion is due to the
package and the leads. The negative conductance, -g,, in the equivalent circuit is
equal to the slope of the voltage-current characteristic at the particularly bias point
under consideration. The value of the negative conductance can be assumed to be
I
independent of frequency, the chief limitations in the frequency response of the tunnel
diode being determined by the parasitic elements in the equivalent circuit (R., L., C).
Some of the more important electrical parameters of germanium and gallium
I
arsenide tunnel diodes are summarized in Figure 14.3 together with their temperature
coefficients. The variation of the peak current with temperature is shown in Figures
14.4 and 14.5. I
CHARACTERISTIC
PEAK POINT VOLTAGE Vp
SYMBOL
55 MV
TEMPERATURE COEFFICIENT AVP/t::,T - 80MV/ •c
GERMANIUM
GALLIUM
ARSENIDE
150 MV
- 120 MV /"C
I
VALLEY POINT VOLTAGE Vv 350 MV
TEMPERATURE COEFFICIENT t::, Vy/t::,T -I .0MV/"C
F"ORWARD VOLTAGE AT PEAK
CURRENT
v,, 500MV
500MV
-I,0 MV/ "C
IIOO MV I
TEMPERATURE COEFFICIENT t::,v,,1t::,T -1.0 MV 1•c -1.0 Mvt•c
DEAK TO VALLEY RATIO lp/ lv
VALLEY CURRENT TEMPERATURE t::,lvlt::,T
COEFFICIENT
CONDUCTANCE TO PEAK o4 / Ip
8
+LO'r./"C
6.5MHO/AMP
15
+o,5-,. 1•c
5.0MHO/AMP
I
CURRENT RATIO
CONDUCTANCE TEMPERATURE
COEFFICIENT
t::,o 4 tt::,T
!CAPACITANCE TO PEAK CURRENT C/ lp

RATIO
-.5% 1•c
5 Pf/mo
-
1.5 p f /mo I
TY'l"K:At fUCTalCAt CHAltACTPISTICS Of GPMANIUM
AND GAWUM AltSfNIDf TUNNft DIODfS
FIGURE 14. 3
I
1.10 ,----,.--- - - r - - " " T " - - - , - - - , - - - - - , - - - r - - - ,
I
I
I
- &0-c . 30•c -1<>•c +1<> •c +3o•c +&<>•c +ro•c +90'C +uo•c
I
TEMPE"ATURE-" C
flfAIC CUHfNT VS. TIMl'SIATURf GPMANIUM TUNNft DIODf

FIGURE 14.4
I
150
I
I TUNNEL DIODE T HEORY AND S WITCHI N G C IRCU ITS
I I.I !I r---r---.-----r---r---r----r--,----,--,---,-----,
I. I Ot---+---t--+---+---+---+---+-----t---1t---t-----1
I
I
><
~ OS!l·!=----4--+-+-+----4--+
~
~ o., ,a-----1-----1--T- U_N_NLE_L_D
_ ILO-D__
E_SLIO
_ M_A.___.__-+-
I I TYPE ZJ- 6 1-10, 4 0 UNITS

i oA!li--+--+--.----,---,,.:...._;_,---r--+--+-~ f---,
I -so-c •lO"C -ro•c +10-c 3o•c so•c 10•c , o•c 110-c 130• 1so•c
TEMP£RAT\JRE-"C
110-c
I HAIC C:UUBIT VS, TEMl'aATUlff GALUUM AltSENIDf TUNNEL DIODf

FIGURE 14. !5
SWITCHING CIRC UITS
I One of the most promising areas for the application of tunnel diodes is in switching
circuits, particularly in large scale computers where the tunnel diode can economically
perform both the logic and memory functions. Here the tunnel diode offers the advan-
I tages of small size, low operating power, high speed and potential low cost and high
reliability.
I
I
I TUNNEL DIODE THRESHOLD LOGIC
FIG URE 14.6
It is possible to form a simple bistable circuit by connecting a tunnel diode in series
I with a voltage source and a resistor as indicated in Figure 14.6. Here the load line is
chosen to intersect the tunnel diode characteristic at two points where the dynamic
resistance is positive. The circuit then has two stable states represented by "O" and ''l''
I and can be switched from one state to the other by means of appropriate positive or
negative signals. As indicated in Figure 14.6, the circuit can be used to perform
analog threshold logic. Current from two or more inputs may cause the diode to switch
to the high voltage state depending on the amplitude of the input signals and the
I biasing conditions of the diode. If the circuit is designed so that only a single input
current is required to switch the diode an "OR" function is obtained, whereas if cur-
rents are required from all the inputs, an "AND" function is obtained. The chief
limitation of this type of logic is that it places difficult requirements on the stability
I of the diodes and the other circuit components. This problem can be alleviated to
some extent by connecting a second tunnel diode in parallel with R,. This tunnel diode
should have about twice the peak current of the first tunnel diode and the supply volt-
TU NN EL DIODE THEORY AND SWITCHING CIRCUITS I
age V, should be low enough so that both diodes can not be in the high voltage state.
When the first diode is switched to the high voltage state, the second diode provides
a low resistance across R, and thus permits a greater range of current to be drawn
I
from the output.•
I
+
OUtPUT
I
I
IASIC TUNNEL DIODE MAJOIUTY LOGIC ORCUIT "GOTO PAIR"
F I GURE 14.7
I
An example of the use of tunnel diodes in a majority logic circuit is shown in
Figure 14.7. Here the tunnel diodes are periodically turned on and oJf by an AC
supply which may furnish either a sinewave or a square wave. The voltage of the
I
supply has a sufficiently low value so that only one of the diodes can switch to the
high voltage state. The diode which switches to the high voltage state will be deter-
mined by the majority decision of the inputs. For example, if the majority of the input
I
currents are flowing to the right then the net current will be a positive current into
the common point of the two diodes. This will cause a larger current to flow into tl1e
lower diode and when the upper side of the transformer goes positive the lower diode
will switch to the high voltage state producing a positive output.
I
+v,
I
7/V\,
TRIGGER
I NPUT
~
TRIGGER OUTPUT I
I
IASIC TUNNEL DIODf FUP- FLOP CIRCUIT
F I GU R E 14.8
I
The circuit of Figure 14.8 can operate as a flip-flop or multivibrator depending on
the biasing conditions chosen. As a £lip-flop, the circuit is designed so that only one
diode can be in the high voltage state and only one diode can be in the low voltage
I
state. The current through the inductor will then Bow through the diode which is in
the low voltage state. When a negative pulse occurs at the trigger input, one diode will
switch so they will both be in the low voltage state. At the end of the trigger pulse
I
the current Bowing in the inductor will cause a larger current to flow through the
diode which was originally in the low voltage state thus causing it to switch to the
high voltage state. The circuit thus operates as a counter stage. The output can be
differentiated and used to trigger similar circuits as indicated in the figure.
I
I
I T U NN EL DI O DE T HEORY AN D S WI TCH ING C IRC UI TS
I ..,
(I)
1.00
I\ I I I
:'
I
' I
..,a: ;;;. TUNNEL DIODE~

I 'f 1-....... -l.1 I
I +v,
...~
:;
..J
i
0.80
\
TRANSISTOR -
COMBINATION .._
-'I
"-- -H r-1
I
I .
...'._ 0 .60
... \
,I I
..,z \ I ' J
!a: 0.40
' // I
I "~
CL
!: 0 .20
I \- _, I I I
I ~.. J V
I I
0 . 10 0 20
~
0. 3 0
v""
0.40
INPUT V0LTAGE -V1- VOLTS
0.IS0
I HYHIO Jll/GGH CIRCUIT AND INPUT CHARACTlltlSTIC

(Us/n9 Germon/um Alloy Tro,ul,ror ond Germon/um Tunnel Diode)
I FIGURE 14.9
The tunnel dlode may also be combined with a transistor to perform many practical
I types of switching functions. A simple, graphical analysis of a circuit using a germa-

nium tunnel diode i_n parallel with the input to a germanium transistor is shown in
Figure 14.9. The characteristic of the tunnel diode in series with a 50 ohm resistor is
first plotted. The input characteristic of the transistor is then plotted on the same
I graph but is displaced by 0.15 volts to account for the bias generated across the 50 ohm
resistor. The net input characteristic is then obtained by adding the two curves together
(add currents at each voltage for a parallel combination). The net input characteristic
I may then be analyzed by means of load lines for bistable or astable operation as
desired. A flip-flop circuit can be obtained by connecting a resistor of suitable value
from the base of the transistor to the +V, supply such that the current flowing through
the resistor is slightly less than the peak current of the tunnel dlode.
I Additional details on the design of tunnel dlode switching circuits can be obtained
by writing for ECG-488 "Tunnel Diodes as Amplifiers and Switches."
I REFERENCES
l. Lesk, Holonyak, Davidsohn, Aarons, "Germanium and Silicon Tunnel Diodes -
Design, Operation and Application", 1959 IBE WESCON Convention Record,
I Part 3-
2. Sylvan, T. P., Gottlieb, E., "Tunnel Diodes as Amplifiers and Switches", Electronic
Equipment Engineering, May 1960.
I 3. Chow, W. F., "Tunnel Diode Logic and Memory Circuits", 7th Annual Symposium
on Computers and Data Processing, University of Denver, July 1960.
I
'
I
.___ _ _1_s_._T_u_N_N _ _ ____,I
_ E_L_ o_,_o_o_E_A_M_P_L_ 1F_,_E_R_s I
BIASING
Examining the tunnel diode V-1 characteristics (see Figure 14.1), it becomes evident
that for amplifler operation the "operating point" must be chosen in the negative con-
I
ductance region. Furthermore, to secure a stable operating point, the bias must be
derived from a voltage source. The location of this operating point will depend on the
magnitude of the anticipated signal swing, the required signal-to-noise ratio, and the
operating temperature range.
I
Biasing at the center of the more linear portion of the negative conductance slope
will allow the greatest signal swing (about 100 mv for Ge and 150 mv for GaAs). For
high temperature operation, the large signal distortion will increase, as a result of the
I
increase in valley current. (See Figure 14.3 for valley current temperature coefficient).
If this increased distortion is unacceptable, smaller signal swings and/ or a higher cur-
rent operating point will alleviate this problem. Another important bias consideration
is the noise flgure of the device. From Equation ( 1) on page 155 it can be seen that a
I
lower operating current will provide a lower noise flgure. This is only true if the
reduction in diode conductance, resulting from this bias change, is smaller than the
change in current. The above statement is predicated on a condition of match between
I
-g• and the generator conductance g, as outlined in the section on noise.
If low noise is of paramount importance, a device with inherently high Ip/Iv ratio,
refrigerated to further improve this ratio, and operated at the lowest permissible bias
current, will give best results.
I
In most cases, it will be quite adequate to select the bias around the inflection
point. This is the point of maximum negative conductance and occurs at about 130 mv
for germanium and 250 mv for gallium arsenide.
I
The greatest bias problem is that the negative conductance region is not linear. In
amplifler circuits it is necessary to match the diode conductance closely to the circuit
conductance if high gain is to be achieved. Slight variations in bias point with the
consequent variations in diode conductance can cause large changes in circuit gain.
I
Hence it is important to ensure a very stable bias voltage.
Some of the possible methods for obtaining stable, low impedance bias supply
voltages are;
I
1) the use of mercury cells
2) the use of forwa.rd biased diodes as voltage regulators
3) the use of breakdown diodes as voltage regulators
I
An example of the use of a forward biased diode for bias stabilization is shown
in Figure 15.1. Here an inexpensive silicon diode is biased heavily in the forward
direction so that it exhibits a low voltage and a low dynamic resistance. A low im-
pedance voltage divider is used to reduce the diode voltage to the value desired for
I
biasing of the tunnel diode.
Db 470.0
.641V
M.11
JZ,V
E
I
I
0 .2
SIUCON OIOOE VOlTAGf afGULAT(M!

FIGURE 15. 1
I
I
I TUNNEL. DIODE AMf'L.IFIERS
I
TEMPERATURE CHARACTERISTICS
Figure 14.3 in the previous chapter gives the temperature coefficients of the various
tunnel diode parameters. Each specific application may be dependent on the tempera-
ture coefficient of a different parameter. For example, in switching circuits the primary
I concern is the stability of the peak current since it determines the switching threshold,
although the changing forward voltage can effect the amplitude of the output voltage.
In oscillators where matching is not required, it may be important only to make
I sure that, at the lowest operating temperatures, the device is driven from a voltage
source. This requires the source resistance supplying the voltage to the tunnel diode
to be much smaller than the negative resistance of the diode. Oscillators have been
operated successfully over a temperature range from 4°K to over 573°K - a remarkably
I wide operating range. In ampliflers where some degree of match between the diode
conductance and the circuit conducta nce is required, it is obvious that this match
must be maintained over the required operating temperature range. Stable amplifica-
I tion can be achieved by using either negative feedback, direct temperature compen-
sation with thermistors or othe.r temperature sensitive devices or taking advantage of
the non-linearity of g. vs. bias by making the bias network deliberately temperature
sensitive.
I FREQUENCY LIMITATIONS
Two significant frequency figures of merit can be assigned to the tunnel diode:'
I a) resistive cut-off frequency f -

·• -
J_g. I
2...c-
__l__ -1
R, I g. I
I b) self-resonant frequency f.. = - 1-

2,r
Both of these frequencies are derived from the equivalent circuit of Figure 14.2. The
resistive cut-off frequency is the frequency at which the real part of the diode im-
I pedance, measured at its terminals, goes to zero. The tunnel diode can not amplify
above this frequency. The self-resonant frequency is the frequency at which the
imaginary part of the diode impedance goes to zero. It should be pointed out that both
I frequencies are reduced by external circuit components and therefore the highest
possible operating frequency is very circuit dependent. In a transistor package the
tunnel diode is limited to operating frequencies in the order of 1 KMc, this limit being
due primarily to the lead inductance. Microstrip or microwave packaging, owing to
I its inherently lower inductance, can raise the frequency capabilities by an order of
magnitude or more.
I NOISE PERFORMANCE
In the tunnel diode, one of the major t'Ontributions to noise is shot noise. The noise
figure in a correctly designed amplifier can be in the range of 3 or 4 db provided that
the source conductance is matched to the negative conductance of the tunnel diode.
I The noise figure is also dependent on the load conductance which might be n mixer
or converter stage and be relatively noisy. It is possible, for example, to connect the
tunnel diode in parallel with the input of an RF amplifier stage nnd obtain both
I reduced noise and increased gain. The noise figure• is given by the equation:
N.F. ..,. 1 + 20 L.
g.
+ ..!.!...:.&,_
T,•g•
(1)
I where I •• is the DC bias current through the tunnel diode, g, and g, are the c.'<>n-
ductances of the generator and the load, the T, and T, are the effective noise tempera-
tures of the generator and the load. From this equation it can be seen that it is desirable
TUNNEL DIODE AMPLll'IERS I
to make g, lnrge and g, smnll. To achieve high gain It is necessary that g, + g, be very
ne.irly equnl to the conductance of the diode, I -g• I. Tims to minimize the noise
6gure it is de irable to make g, very nearly equal to I -g• I, The value of t.. should
be chosen as low as possible, consistent with a reasonable value of I -g• I. To satisfy
I
this requirement, tunnel diodes with high valu,s of peak current to valley current
ratios are desirable. I
NUCLEAR RADIATION EFFECTS
Encouraging results have been obtained from preliminary investigations of the
effects of nuclear radiation on the characteristics of some germanium tunnel diodes.
I
Under a doseage of 3 X 10" NVT (90% thermal, 10% fast), no apparent change in
the electrical characteristics were observed except for the noise Ggure which increased
by approximately 20% at the point of maximum negative conductan.c e and by 100%
near the valley point.
I
At a dosage of 5 X 10'" NVT, the valley cu"ent increased by about 25% while
the other DC characteristics had not changed. The noise 6gure increased by a factor
of 3 at the point of maximum negative conductance while the noise 6gure in the
I
vicinity of the valley point was extremely high. Further tests on gallium arsenide
tunnel diodes shows that they are still quite useful in switching circuits around 10"
NVT fast neutrons/cm•. In general, the radiation resistance of tunnel diodes appears
I
to be higher than some tubes (especially glass envelope types) and transistors and
should be of ddinite value for military applications. Also it appears that CaAs units
are more resistant to nuclear radiation than germanium or silicon units. I
NEGATIVE CONDUCTA NCE AMPLIFIER
IN THE PARALLEL CONNECTIO N
A graphical analysis of this connection can be seen in Figure 15.2. The diode
I
characteristic is represented by curve #1; the positive circuit conductance is shown
by curve #2. Adding these conductances algebraically the resultant net input charac-
teristic of the amplifier stage can be seen in curve #3. The slope of the input character-
istic in the nctive region (between A "and B") is close to horizontal indicating a high
I
input impedance. The value of this input impedance is given by:
z,. = ..!_ =
g,
1
g, + g, - g.
I
and the avaiJable power gain is:
Pc... =iw!.
(g,)'
I
It can be seen botJ, graphically and mathematicall y that to obtain a high value of
9vaiJable stable power gain it is necessary for Z,. to be very large and positive. This
requires g, + g, to be very nearly equal to but larger than I -g• I. Since the voltage
I
is the same across all the conductances in the circuit, the voltage gain of the parallel
circuit wiJI be unity.
The closer g, + g, is to I -g• I, the greater is the c""ent ampliflcation obtained.
I
A similar graphical analysis can be applied to the series connection resulting in a "low"
input impedance circuit and voltage gain. The basic low frequency equivalent circuit
of the parallel connection can be seen in Figure 15.3(A). Essentially it consists of a
signal current source driving the parallel combination of tJ1e lond resistance (rl) and
I
the diode resistance (-rd).
Figure 15.3(8) shows the actual circuit yielding about 30 db gain. It is relatively
difficult to build a stable low frequency amplifier circuit. since the tunnel diode is
I
15fl
I
I TU NNEL DIODE A MPLI FIERS
I
AIX Av • Ap
$INC[ .b• I
Ai • &p
t ZIN• A l ul
l POUT• L)nlOWT
I
:: ao,u •
I 6
2 0 :
'
;ii,,,a+-tt,1-:- ,._!_ I
· '• -our,
ZIJlih f280fi
I S\OH
I 500 V
(lnmv)
I
Av:: lOOIPlw
l'ARAWL AMPUFIP STAGE AND EQUIVAUNT ORCUIT
I
FIGURE 15.2
inherently trying to oscillate at very high frequencies (see Stability Criteria). The use
of audio components and audio type layouts, generally result in enough stray in-
I ductance to enable the circuit to oscillate freely at high frequencies, since bypassing
is not a simple matter in the UHF range.
(A)
I
(B)
I
I
I GRAPHICAL ANALYSIS Of l'ARAWL AMPUFIM STAGE
FIGURE 15. 3
Eblt(pl••l
I STABILITY C RITERIA
Successful linear operation of a tunnel diode amplliler depends on the stability
of the complete system, including in particular the internal impedance of the bias
I supply and the signal source impedance. The basic amplifier circuit can be reduced
=
to that shown in Figure 15.4 where RT R, + Ri + R., Lr L. + L1, C is the total
diode capacitance and -g• the negative conductance of the diode at the operating
=
I current and voltage.
To determine the system stability one can examine the distribution of poles or
zeros of the circuit determinant in the complex S-plane.'
157
TUNNEL DIODE AM PLIFIERS I
I
L.9
C I
Ar • A1 + A9 + A,
L.r • L., + L.,
I
z- x Ra
(A) SfltlfS CONflGUftATION Of AMPUfla

(81 5/MPUflfD SfltlES CONFIGURATION
I
Olt OSCILLATOR CIRCUIT
FIGURE 15.4 I
If the zeros of Z seen at the input, fall in the right half side of the S plane, the
system is unstable. Conversely, if the zeros fall in the left half side of the S-plane the
circuit is stable. I
The inp11t impedance is given as:
Z
1 1
•
and the zeros are:

+
s· Lr c s (RT c - Lr I -g. lL+ (1 - RT I - gJt
SC - I- g. I I
I
Then S will have a negative real part only if botl,: ~ - I -J• I > 0
ond 1 - RT I -g• I > 0. This can be rewritten as I 1 -
-g• 1
> RT > .kL.=.s•
C
I I
Figure 15.5 p0rtrays the stability criteria graphically.
(POINT OF FREE OSCILLATION)
( POINT OF "INFINITE" LO W
I
FREQUENCY AMPLIFICATION )
I
( N ON- L INEAR
OSCILLATION)
~
(SWITCHING)
I
STABLE
I
I
CONDITION FOR STABLE OPEltATION SHOWN a.APHICAlLY
FIGURE 15.5
I
158
I
I T UNNEL DIODE AMPLI FIERS
It is therefore imp<>rtant to remember that L-r must be smaller than:

I L,. < ___fuQ_
l -g• I
in order to provide stable amplification. Spelling out the many stability criteria:
I STABLE AMPLIFICATION
1) The circuit inductance must be smaller tl1an, (L,.) < I RTC I

I -g.
2) The sum of the p<>sitive circuit conductances must be nearly equal to, but always
greater than the negative conductance of the diode.
I g, + g. + g. = I -g• I or RT< I
1
I -g.
3) The total DC loop resistance must be less than the negative diode resistance
(voltage source).
I 4) All above requirements must remain satisfied over a range of supply voltages
and temperature conditions.
Ampliller circuits have been built from audio frequencies up to several hundred
I megacycles with gains in the 30 db range having excellent bandwidth.
The following design procedure will treat such a 100 Mc/s amplifier circuit in the
series configuration.
I AMPLIFIER DESIGN PROC EDURE

In this circuit (see Figure 15.6), the source is a 50 ohm generator, the load is also
50!l while the series resistance ( R.) of the device is 2n. Hence RT= 50 + 50 + 2 = 102n.
I Use is made of a 1N2939 having a 5µµfd capacitance and a negative conductance of
7 millimhos (-rd = 143fl) at the in8ection p<>int.
,------------,
I I
I
I
-od • .007mho I
I
I
I I 6mJ'h
Ro• 50Sl IL __________
C•5,.,.fd
20 I
JI
I
I A.C. SOIES 1001' CIRCUIT
FIGURE 15.6
In order to abide by the previously mentioned stability criteria, tl1e real part of the
I negative conductance must be made equal to zero at the operating frequency. This
also means that the circuit cut-off frequency is made equal to the operating frequency.
Hence,
I RT - _ _._I-_,g<l__
I -g• 1 + ,,le'
1
0 th s R
= ' u T =
l
( 1 ...1.. w'c' )
l-g. l ~·-.- g,,
I RT must be therefore be made equal to:

RT = __!iL
}.21 511!
11sn
TUNNEL DIODE AMPLIFIERS I
Since the present series loop only exhibits a RT 111 1020, a 160 series resistance must
be added to meet the previously outlined gain and stability criteria.
The last component in this AC circuit design procedure is the choice of the tuning
I
inductance L ,. To get the highest value of stable gain k total must be only slightly
r.,..
<
smaller than tl1c oscillation criteria k
< 118 X 5 X 10-u _ 84 3
7 X lo-' -
RTCI I -g• I which here must be:
h
. l1lJl
I
Since 2 -12 mµh are inherent in the leads of the device (depending on lead length)
and some stray circuit inductance will be found in the circuit, the actual coil (L,) will
have to present a slightly smaller inductance value.
I
I
I
I
A,C, ClltQHT 0, JOO MC/ S.AM#'URR STAGI
FIGURE 15 .7 I
The bias arrangemen t can be derived in the following manner:
I
I
I
I
I
I
D.C. 81AS CIICUIT ,01 JOO MC/ S AMl'U"M STAGE
FIGU RE 15. 8
I
Assuming that the inflection point occurs at 130 mv and .7 ma, then Va
Io is .7 ma and V, is ( RTK + R,.) Io
= 130 + 44 = 174 mv.
= (16 + 50) .7 X 10-• =
=
130 mv and
44 mv; therefore, V, I
I
I TUNNEL DIODE AMPLIFIERS
Io therefore is 174 X 104 /50 = 3.48 ma, and the total DC current l oo= 10 + Io
I = 3.48 + .7 = 4.18 ma. If one were to use a 6.3v battery, then Re = 6.3 - .174/4.18
X 104 = 6.126/4.18 X 10-• ,.. l.5KO. In order to decouple the DC supply from the
amplifier by at least a lOKO inductive reactance,
I X
Lav choke > _ L_ -
w 6
10'
Figure 15.9 shows the complete circuit.

- l5µh
X I 08
I ,
I
50.0 LINE
I 500 L INE
Rt=500
I
I
COMl'I.ETE JOO MC./ S "SlltlfS" AMPUflD CIRCUI T
I FIGURE 1 !5.9
The measured results were 32 db gain at 100 Meis with a 20 Mc/s symmetrical band-
width. As Lt is increased toward Lt =
RTCII -g• I, the gain increases at the expense
I of bandwidth magnitude and symmetry.
TUNNEL DIODE OSCILLATORS
I Oscillators can be divided into two major groupings:

1) the relaxation oscillator
2) the sinusoidal oscillator
The distinction is that sinusoidal oscillators just barely satisfy the criterion for supply-
I ing the losses, therefore do not swing far off the linear region of the negative con-
ductance portion of the V-1 characteristic. Relaxation oscillators traverse large loops
about the static characteristic (see Figure 15.10).
I __/OSCILL~S -
RELAXATION
I \
\
,
I
SINUSOIDAL
. -OSCILLATIONS
I
..... I
I
I RELAXATION OSCILLATORS
OSCILLATOR UMIT CYCLES
FIGURE 1!5. 10
I If the real component of the input impedance of the circuit is quite negative, the
oscillation amplitude will be large, resulting in significant limiting (i.e. relaxation
oscillation). A tunnel diode circuit employing this principal is shown in Figure 15.11.
TUNNEL DIODE AMPLl~IERS I
+
I
I
TUHNft 0,00, HlAXATIOH OSCJUATO.
FIGURE tS.11
I
The voltage swing of such a circuit could be as high as one volt (for CaAs units where
V,, - V, - 1v), while the current swing depends on the peak current of the device
and could be as high as several amperes.
I
SINEWAVE OSCILLATO RS
The mathematical condition for "free" sinusoidal oscillations requires the real and
I
imaginary part of the circuit input impedance to be equal to zero.
=
Z,. R. (Z,.) + J,. (Z,.) 0 =
Practically, if the real part is slightly negative, good sinusoidal oscillations occur.
I
..!k _ I -8• I _ o
k C
and the resonant frequency is:
I
=-1- ( 1- RT l-g•l ) ½
f
• 2.- kC
The frequency limit of the circuit is determined by the self-resonant frequency (f..)
I
and the resistive cut-off frequency (£,.) of the device. Since f •• is determined largely
by La and C both terms will have to be minimized for microwave applications. Hence
for such applications, the use of the highest available I -g• j/C ratio (presently CaAs
yields the highest commercially available I -g. I/C) and extremely low L, (microwave
I
package) is recommended.
TUNNEL DIODE CRYSTAL CONTROLL ED OSCILLATO R

I
The circuit of Figure 15.121 works basically as per above conditions with the
exception of the criteria for RT.
I
I
+ Ebb
I
I
QYSTAl COHTltOWD OSCJUATO.
FIGU RE 15.12
I
162
I
I TUNNEL D IODE A MPLI F I ERS
R, and R, are identical and are chosen to be about twice the value required for RT,
I As a result, oscillation is not possible "off resonance." At resonance, the crystal becomes
a short circuit and R, is in parallel with R,, essentially halving RT, This value of RT
will now permit the circuit to oscillate stably.
I The power output of such oscillators is limited by the allowable voltage and current
excursions. The voltage swing has to be smaller than the length of the negative portion
of the V-1 characteristic. The current swing depends on the I, of the device. Since the
latter is a direct function of area, for any given material, it also determines the device
I capacity. It follows then, that given a constant package (lead and structure) induc-
tance, the capacitance must be small for higher frequency performance, hence it will
take a low current device to extend the frequency limits.
I The power output of a sinewave oscillator is given by the following expression:
P••• s,, (
V.-V,
--
2 '1/2
) ' - LC RL
T
I TUNNEL DIODE FM TRANSMITTER

A simple micropower FM transmitter using the 1N2939 tunnel diode is shown in
I Figure 15.13.
PART 8
I ANt PART A
OSCILLATOR
(100 MC/S l
AUDIO AMPLIFIER
I
I
I R1
Ra
220 .1/2 WATT
non -1/Z WATT c,
C1 .001 " RAIIIC DISC.
~O J£f4 IEL£CTftOLYTIC
O ,..,. l LlCTROI.YTiC
ANT.
IT NO. IUllllt . 3/1° DIAlt. 0,[N AIR (L•.,,...I
ANTENNA 4 314 • UNG'T" NO. t4 WMitt
IIICIIO MK:IIOl'IIONt "SHUit[ 9"0TMtM" IIOOEL NO. 420
"• 4700 ·1/2 WATT
'•
I R4 IOKO -112 WATT
R. 10KO -112 WAT•

c4 1.a-a.o ,..,..,- AIR VARIABLE
OR EQUIV
I a,.,oa MC/ S WIIEU SS I.M. MICROPHONE

FIGURE 15. 1 3
I Operation may be best explained by separating the circuit into two portions.
Part A is a basic tunnel diode oscillator whose frequency is primarily determined by
the resonant circuit in the cathode. Resistors Rl and R2 provide a stable low imped-
ance voltage for the anode of approximately 150 mv. Capacitor C, is the RF bypass
I for the anode.

Part B is a transistor emitter follower stage to amplify the audio signal from the
microphone. The amplified audio is fed through capacitor C2 to the anode of the
I tunnel diode. FM modulation is accomplished by the audio signal instantaneously

changing the anode bias. -Since the characteristic curve is not perfectly linear in the
negative resistance region, the negative conductance changes slightly with bias. As can
163
TUNNEL DIODE AMPLIFIERS I
be seen from the self-resonant frequency equation, f •• is a function of I -g• I and
therefore the resonance of the circuit is aHected. FM deviations of ±75 KC are readily
obtainable with this type of circuit.
I
The transmitter shown in the diagram has been successfully used as a wireless
portable microphone. Its great advantage is that it allows complete mobility on the
part of the speaker, and of course has no wires or cords. When used with an average
FM receiver having a sensitivity of l0µv, an operating range in excess of 100 feet was
I
obtained. With the introduction of gallium arsenide tunnel diodes, this operating
range can be appreciably e;\'1:ended due to the larger dynamic voltage swing possible
with the gallium arsenide diodes, as well as their improved I -g• I/C ratio.
I
T UNNEL OIOOE CON VERTE R S
The following simultaneous functions must be performed by a single tunnel diode
when used as a high gain self-oscillating converter":
I
a) oscillation at the L.O. frequency
b) amplification at the R.F. frequency
c) mixing due to non-linearities
I
d) amplification at the I.F. frequency
Rephrasing the above on a mathematical basis:
1) The imaginary part of the external circuit admittance across the negative
I
conductance of the diode should ideally have zeros at the local oscillator and I.F.
frequencies.
2) The real term of the external circuit admittance Y across I -g• I at the L.O.
I
frequency must be smaller than the negative conductance of the diode.
3) The real part of the external admittance across I -g• I must be larger than the
magnitude of I -g• I at the I.F. frequency.
I
According to condition #1, Im ~Y} as a function of., has the characteristic shown
in Figure 15.14. In addition to the property of Im ~ Yf of Figure 15.14, conditions #2
and #3 make it possible to operate the two resonant circuits for oscillations at the L.O.
frequency and amplification at the I.F. frequency.
I
Im{Y} I
w
I
I
IM (Y) AS A FUNCTION Of FREQUENCY FOlt TWO llfSON.ANT CIRCUITS
FIGURE 15. 14
I
If the R.F. signal is introduced at a frequency close to the L.O., RT is slightly
different from I -g• I and Im iY} is small. Therefore, amplification can be ob-
tained provided that the R.F. signal does not interfere with the L.O. signal. This
I
latter could occur if the R.F. signal is strong, (and its frequency close to the L.O.).
Figure 15.15 shows the non-linear conductance variation vs. local oscillator swing
for mixing.
I
164
I
I T U NNEL DIOD E A MPLI F IER S
I +o<tl
I
I
I - O (t)
CONDUCTANCE VARIATIONS VERSUS LOCAL OSCII.LATOR SWING
I FIGURE 15. 15
The operating point in Figure 15.15 is chosen around the inflection point since
this would yield considerable non-linearity and low noise. Operation near the peak
I point current also seems quite practical however.

A possible tunnel diode converter circuit is shown in Figure 15.16.
I
I
+
I
I
I TUNNEL DIODE CONVERTER CIRCUIT
FIGURE 15. 16
I Since C. is chosen to be a short circuit at the R.F. and L.0. Figure 15.16 can be
reduced to Figure 15.17.
I
I
I SIMl'UflE0 CONVUTER CIRCUIT @ LOCAL OSCII.LATOR FREQUENCY
FIGURE 15. 17
TUNNEL D I O DE AMPLIFIERS I
The condition for oscillation is I -g• I ~ (C,/L,) RT. Off resonance, I Y,. I becomes
larger thao I -g• I aod no oscillations occur.
If a small R.F. signal is introduced, since I Y.. I is slightly larger than I -g• I ampli-
I
fication can occur.
L, is a short circuit at the I.F. frequency and since C, is very small the circuit can
further be simplified to the ooe shown in Figure 15.18. I
I
I
S/MPUflfD CONVPTflt CIRCUIT @ IF
I
FIGURE 15.18
It is assumed that the effect of RT is small enough to be neglected at the I.F.

frequency.
I
If the load g, is chosen so that it is only slightly larger than I -g• I and Im ~y~ is
zero at I.F. frequency, amplification of the I.F. signal can also be obtained. I
I
REFERENCES
1. Davidsohn, U. S., Hwang, Y. C., Ober, G. B., "Designing With Tunnel Diodes",
Electronic Design, February 3, 1960.
I
2. Tiemann, J. J. Watters, R. L., "Noise Considerations of Tunnel Diode Amplifiers"
presented at the 1959 IRE-AIEE Solid State Devices Research Conference, Cornell
University, June 17, 1959.
3. Chow, W. F., Davidsohn, U. S., Hwang, Y. C., Kim, C. S., Ober, G. B., "Tunnel
I
Diode Circuit Aspects and Applications", AIEE, January 1960, Conference Paper
#CP-60-297. I
I
I
I
I
I
I
II.___ 1_s_._
F _E_E_c_s_A
_ c _K_ A_N_c__
s _E_R_v_o_ A
_ M_P_L_1_F_1_E_R_s_ ____,
USE OF NEGATIVE FEEDBACK IN TRANSI S TOR AMPLIFIERS
I Negative feedback is used in transistor amplifiers to fix the amplifier gain, increase
the bandwidth (if the number of transistors is less than three), reduce distortion, and
change the amplifier input and output impedances. Feedback is used in servo ampli-
I fiers to obtain one or more of tJ1ese characteristics.

Cain is reduced at the midband frequencies as the feedback is increased, and the
predictability of the midband gain increases with increasing feedback. Thus, tht1 greater
the feedback, the less sensitive will be the amplifier to the gain changes of its transistors
I with operating point and temperature, and to the replacement of transistors.
The output and input impedances of the amplifier are dependent upon the type of
feedback. If the output voltage is fed back, the output impedance is lowered. In con-
I trast, feedback of the output current raises the output impedance. If the feedback
remains a voltage, the input impedance is increased, while if it is a current, the input
impedance is decreased.
I C G I GH
R ·l+GH. ii 1i'+GH1
• • R- 8
H 8 • HC
I FEEDBACK
C• GE
I INPUT
8
R ___+~w•=---.t
ERROR
G
AMPLIFIER
C
OUTPUT
I SRVO-TYPE FEEOIACIC SYSRM

FIGURE 16. 1
I A convenient metJ1od for evaluating the external gain of an amplifier with feedback
is the single loop servo-type system as shown in Figure 16. l. (The internal feedback
of transistors can be neglected in most cases.) The forward loop gain of the amplifier
without feedback is given by C and it includes the loading effects of tJ1e feedback
I network and the load. H is the feedback function, and is usually a passive network.
In using this technique, it is assumed that the error current or voltage docs not affect
the magnitude of the feedback function. The closed loop gain is then:
I C
=
C
"""i\ 1 +CH H =
1 CH
1 + CH
where C is the output function and R is the input. If CH is made much larger than
I one, tJ1e closed loop response approaches 1/H and becomes independent of the ampli-
fier gnin. Thus, CH determines the sensitivity of the closed loop gain to changes in
amplifier gain.
Since CH is a complex quantity whose magnitude nnd phase nre a function of
I frequency, it also determines the stability of the amplifier. The phnse shift of CH for
all frequencies must be Jess than 180° for a loop gain equal to or greater than one or
the amplifier will become unstable and oscillate. Therefore, if the number of transistors
I in the amplifier is greater than two, the phase shift of CH can exceed 180° at some
frequency, and stabilizntion networks must be added to bring the loop gain to one
before tJ1e phase shift becomes 180°.
f67
FEEDB AC K AND SERVO A M PLIF I ER S I
z,.
I
GAIN ANO IMPE DAN CE
RELATI ONS HIPS
I
I~
z,
••
:
I
I
I
I
I
I
I
I
z, z,
( A l BLOCK DI AGRAM
Zio<: -l+ GH os I A
+~
Z
I
z,
I
I
Zon
CONDITIONS : Z I I
I
""z;"" « ;
( Il l SIMPLIFI ED E OUIVALE NT CIRCU IT

Z1
- -«GH +I
z,
I
VOLTAGf fffDIACK AMPUFlfR
FIGURE 16 .2
I
Figure 16.2 shows a voltage feedback amplifier where both the input and output
impedances are lowered. A simplified diagram of the amplifier is shown in 16.2(B),
which is useful in calculating the various gains and impedances. Z, is the input im-
I
pedance of the first stage without feedback, and z•• is the output impedance of the last
stage without feedback. Ai is the short circuit current gain of the ampH6er without
=
feedback (the current in the load branch with RL 0 for a unit current into the base
of the first transistor). Any external resistors, such as the collector resistor which are
I
not part of the load can be combined with z••. The gain and impedance equations
shown arc made assuming that the error voltage (i.Z.) is zero which is nearly correct
in most cases. If this assumption is not made, the loop gain of the amplifier can be
I
derived by breaking the loop at y-y' and terminating the point y with Z,. The loop
gain is then i,/i., with the generator voltage set equal to zero. Since the loop is a
numeric, the voltage and current loop gains are identical. The loop gain is then: I
where
Ai (
z,.. + Zr + Z,'
ZL' ) (
z. +
Z
Z,
)
I
Z .u ' -- z,. z.. =Z L'Y, aTI d
z.. + z..
Z,'=
z, Z,
z, + z,
I
168
I
I FEEDB A C K AND SER VO A M PLI FIERS
Notice that if z. > > Z, and Zr > > z., then the loop gain is very nearly equal to CH
I as given in Figure 16.2.
+
The input impedance of the ampli6er is reduced by 1 CH, while the output im-
pedance is also decreased.
I Figure 16.3 shows a current ampli6er where both the output and input impedances
are increased. The loop is obtained by breaking the circuit at y-y' and terminating
points y-a with Z,. The loop gain is it!i. and is approximately equal to:
I -yAi Zr
Zc+Z,
I ,_ GAIN AND IMPEDANCE

RELATIONSHIPS
I I Zo
t"l
A 1 yz 9
z,
I
It z, +z 1
!L.
' I; I +A1)'ZF
I - - -
( A l BLOC K DIAGRAM
-
~-
.,
z,+z,
A1)'Z L
l +A1yz,
I z 1+z 0
z,ft .zl~+A1;1z, )
I ~
y y' Zo•Zon('+A1ZF)
A1Y Z F
z 1+z,
< GH•- - -
I 1! 1, t<:•z ,
<'I
Zon ZL z ,+z,
I
)'• l + ZL
Zon
I - - -
IL1
-
••
:r,•--
z,
CONDITIONS:
I (Bl SIMPLIFIED EQUIVALENT CIRCUIT
CCJltltfNT HEOIACK AMPUFIER

Zf« Z1 ; Z,« ZL
I F I G URE 16 . 3
SERVO A M P LI FI E R FOR T WO PHASE SERVO M OTORS
I
PREAM PLIFI ERS
Figure 16.4 shows a two stage preampli6er which has a low input impedance, and
which is quite stable in bias point and gain over wide te mperature ranges. In addition,
no selection of transistors is required.
I Because only two stages are involved, the amplifier is stable, and frequency stabili-
zation networks arc not required. The current gain i.,/i,. is approximately RdR,· if the
generator impedance and R., are much larger than the grounded emitter input imped-
I ance of Q,. RF should not exceed a few hundred ohms because it contributes to t he
loss of gain in the interstage coupling network. The loss of gain in the interstnge
coupling is:
169
FEEDBACK ANO SERVO A M PLIF I ERS I
------------E99
Co I
Cln
I
I
R 1• 4.7K
R2• 33K
R3 • I0K
C1• 20,-f,I0V
C2• 20,-f, 15 V
C;n• C0 • 20,-f
I
R4 •20K
R5 • 24K
RF•1eo.n
01• 02• G.E.2N335 OR
GE 2 N336
Eaa • 45V.
~
I
i;:--,r,;- FOR !l....
RE• 22K
R << I.
In F 4
400 CYCLE HfAMPUflfft FOlt Ol'aAJION IN AMalfNTS OF - 55 TO 125° C,

FIGURE 16.4
I
K=
+
Zo,'
Z.,'
+
h, .. h,.. R.,
I
where Z.,' is the parallel combination of R, and the output impedance of Ql. The loop
gain then is approximately:
( h,., h;: KRr) ( h,.,~ R. )
I
Because the feedback remains a current, the input impedance of this circuit is quite
low; less than 100 ohms in most cases. This preamplifier will work well where current
addition of signals is desired and "cross-talk" is to be kept to a minimum.
I
Figure 16.5 shows a three stage, 400 cycle direct-coupled preamplifier with good
bias stability from -55 to 125°C. If the de conditions shown in the figure are met,
the collector voltage of Q3 is approximately:
I
Va _ [(R, + + + +
R. R.) R,] (Ee - Vo,) + (R, R. R1) Ve,
a, R,R. R,
where Va, is the breakdown voltage of the first avalanche diode. The various ac gains
and impedances can be calculated from the equations of Figure 16.1 with the exception
I
that the ac feedback is now approximately:
( ~' ) ( ~ )
I
= 1/Rr, + 1/R.- + 1/R, and R.- is the output impedance of Q3. This
where 1/R,.'
assumes that the input impedance of Ql is much less than R, and R.. The value of R,o
determines the closed loop gain, while the values of C.,, C••, R., and R. are used to
I
bring the magnitude of the loop gain to unity before the phase shift reaches 180°. The
values required for these capacitors and resistors are dependent upon the maximum
e:1.-pected loop gain. I
DRIVER STAGE
Because the output stages of servo amplifiers are usually operated either Class B
or a modified Class B, the driver must provide phase inversion of the signal. ln most
I
170
I
I F E EDBACK A NO SERVO AM PLIFIER S
I ...
•• •• i.
.__~-=-----lf-----o
I "1 • ll lt
llt • JtlC
I
1111, • 3 11(
"• • rooo
!Ito• ltlC
"' ,zoo.a
1117 •IH
lit e• 4 2K
1111 1 • JIit
I c, • to.- f.10\t
Dt • I Y l"(AKOOWN
Ot • IIV IA[AKOOWN
0 1 • D2 • 03 • lttN)H
t11 • 4&YOLTI
I I IAS STAIILITY 1u.ou11u:11111o u :
I
I WH[fU : Jti(llle+ftit
• ··
•t•,.
11111 ♦1111+111
,r2
All AIJ • !£!_
tu
WITHOUT ,uOIACIC
feot • lll.t,)l.lllilfUN tr;d>'

V11 • lft[AICOOWN VOL TAIi 0, 01
01
I( •• ~ ,,1
I THJtflf STAGE Dfl_lfCT COUl'lfD 400
FIGU R E 16 .5
~ HEAMl'UFIElt
cases, this is accomplished by transformer coupling the driver to the output stage. The
I phase shift of the carrier signal in passing through the transformer must be kept small.
However, since the output impedance of the transistor can be quite large, the phase
shift can be large if the transformer shunt inductance is small, or if the load resistance
I is large as shown in Figure 16.6. The inductance of most small transformers decreases
very rapidly if a de current flows in the transformer. Therefore in transformer coupling,
the phase shift of the carrier is reduced to a minimum if the de current through the
coupling transformer is zero, or feedback is used to lower the output impedance of
I the driver.
-----. lo • hfe I In
I
I I~
I L
I
I
,
1'- • (-
T1 S
- l -yl o
T S +I
1
i IILp i T
I
• _L_
yR:._
I
RL'
Ro
I - - I y • Ro+Ri.
L!~~OR~l!J S • L APLACE
I a REFLECTED
L OAD
Lp •
TRANSl'ORM.
PRIMARY SHUNT L
Rt:• LOAD REFLECTED
TO PRIMAIIIY
I CAl_ltlfft l'HASE SHIFT DUE TO TI_ANS10lrMfR COUl'UNG

FIGURE 16.6
171
FEEDBACK ANO SERVO A M PLIFIERS I
--------- T
OUTPUT
I
I
C 3 • TRANSFORMER
TUNNING CAPACITOR
o 1 • Oz • G. E. 2N656A I
I
TWO STAGf Cl.ASS "A" PUSH-PUll DltfVIR
F IGU RE 16.7
I
Figure 16.7 shows a modified "long tail pair" driver. In this case Ql and Q2
operate Class A, and the quiescent collector current of Ql and Q2 cancel magnetically in
the transformer. Transistor Ql operates grounded emitter, while Q2 operates grounded
I
base. Separate emitter resistors R, and R, are used rather than a common emitter re-
sistor in order to improve the bias stability. The collector current of Ql is approximately
h ,., ib,, while tl1e emitter current of Q2 is (h,.1 + 1) ib,. Since Q2 operates grounded
I
base, the collector current of Q2 is -hfb1/(h ,01 + 1) ibl or -hr. ib1 if the current gain
of Ql and Q2 are equal. Thus push-pull operation is obtained.
T
I
I
I
I
1o-t
r I
Rt • IOK
Rt• UK
Ra • 1111<
Rt • 9. IK
c1 • c 2 • zo,.. 1,aov
C3 • •l't,,OY
I
o1 • o2 • ,u. 2u,.,.
I
't4 • 2.7K
Ro • 2.111< 03 • e.E 2035"
Re • 2..TK t y • fil:l'I
llt7 • 3.eK 1 Cl . lcz· IOIIA.
111, • too
"STAalf'' 400 CYCLE DltlVfR

F IG U R E 16 .8
I
172
I
I FEEDBACK AND SERVO AMPLIFIERS
In order to stabilize the driver gain for variations in temperature and interchange-
I ability of transistors, another transistor can be added to form a stage pair with Ql as
shown in Figure 16.8. The gain of the driver is then very stable and is given approxi-
mately by:
I .!!!. Qf -i,,
i. i,
a. _!\..!._
Rr
OUTPUT STAGE
I The output stages for servo amplifiers can be grounded emitter, grounded collector
or grounded base. Output transfonners are generally not required because most servo
motors can be supplied with split control phase windings. Feedback of the motor con-
I trol phase voltage to the driver or preamplilier is very difficult if transformer coupling
is used between the driver and output stages. ff a high loop gain is desired, the motor
and transformer phase shifts make stabilization of the amplilier very difficult. One
I technique which can be used to stabilize the output stage gain is to use a grounded
emitter configuration where small resistors are added in series with the emitter
and the feedback is derived from these resistors. The motor time constants are thus
eliminated and stabilization of the amplifier becomes more practical.
I
I 0
I 0
N2
RI
I ·:8
INPUT NI
N3
1.4V
I PHASE OF
SERVO
MOTOR)
I
TRANSFORMER-Nl:N2 :N:S•I :1: I
DI, D2,O:S,O4- INl692'S
SlltVO MOTOR DRIVE CIRCUIT (I TO 4 WATTS)

FIGURE 16.9
I A second technique which results in a stable output stage gain and does not require
matched transistor characteristics is the emitter follower (common collector) push-pull
I amplifier as shown in Figure 16.9. Also it offers the advantage of a low impedan1..'C
drive to the motor. A forward bias voltage of about 1.4 volts is developed across Dl
and D2, and this bias on the output transistors gives approximately 20 ma of no signal
current. At lower levels of current the cross-over distortion increases and the current
I gain of the 2N656A decreases. D3 and 04 protect the 2N656A's from the inductive
load generated voltages that exceed the emitter-base breakdown. The efficiency of this
circuit exceeds 60% with a filtered DC voltage supply and can be increased further
I by !Ising an unfiltered rectified ac supply. This unfiltered supply results in lower

operating junction temperatures for the 2N656A's, and in turn permits operation at a
higher ambient temperature. The maximum ambient operating tempernture varies
173
FEEDBA CK AND SERVO AMPLIFIERS
I
with the power requirements of the servo motor and the type of heat radiator used
witl1 the G-E 2N656A. It is practical to attain operation in ambients to 12.5°C.
The most effective heat radiator for the 2N656A results by placing the header of
the package with intimate contact to a radiating surface of copper or aluminum.
I
Figure 16.10 indicates a practical method.
I
I
NOTE : APPLY A LAYER OF G.E. SILICONE
DIELECTRIC. GREASE tt SS- 4 005
OR EQUIVALENT BETWEEN THE
TRANSISTOR ANO THE FIN.
ASHER
APPROX. 3/4 • 0.0.
I
W { LO•.3 475± .0125
ALUMINUM FIN
(ORlffl'°COPPER)
I
l
2· 0(I
;.!.•
~13/64
I
l. I
THREE 3/32"
DIA HOLES
ALUMINUM FIN ONLY

I
TRANSISTOR fffAT ltADIATC>a
FIGURE 16. 10
I
Another technique which results in a stable output amplifier gain over wide am-
bient temperature extremes and which is compatible with low gain transistors is shown
in Figure 16.11. In this case, a grounded base configuration and a split control phase
I
motor winding are used. The driver is coupled to the output stage by means of a step-
down transformer, and the current gain occurs in the transformer since ilie current
gain of the transistors is less than one. The current gain is 2aNr,/Ns, if the drivers
are operated Class A such as shown in figures 16.7 or 16.8. The negative unfiltered de
I
supply and diode Dl are used to operate the transistor Class AB and eliminate cross-
over distortion. As the signal increases the diode Dl becomes conductive and shunts
the bias supply. The operation of the output stage thus goes from Class A to Class B.
I
An unfiltered de is used for the collector supply to reduce transistor dissipation.
If saturation resistance and leakage currents are neglected, 100% efficiency is possible
under full load conditions witll an unfiltered supply. The transistor dissipation is
given by:
I
p_ Ee.,• [ a _ a' ( 1
4RL
+ ...!h..)J
RL
+ PL
where PL is the dissipation due to leakage current during the half-cycle when the
I
transistor is turned off, a is the fraction of maximum signal present and varies from
0 to l, R. is the saturation resistance, RL is tlle load resistance, and Ee., is the peak
value of tlle unfiltered collector supply voltage. If PL is negligible and R,/RL << 1,
I
174
I
I F EEDB AC K A N O SERVO A MPLIFIERS
I
I CONTROL
PHASE
TO
I DRIVER
TRANSISTORS N pz 0
MOTOR
I 01•0z•GE2N497A OR
2N498A
01 • GE I N676
Np
R1
0
fJLINE
-» I
I Ns
C IS ADJUSTED FOR MAXIMUM
STALLED TOROUE
*eM
\NE
I GltOUNDfD IASE SERVO OUTflT STAGE
Ea T
FIGU RE 16 . 1 1
I then maximum dissipation occurs at a =1/2 or when the signal is at 50% of its maxi-
mum. Thus for amplifiers which are used for position servos, the signal uni:fer steady.
I state conditions is either zero or maximum which are the points of least dissipation.
The peak current which each transistor must supply in Figure 16.11 is given by:
. 2W
tm= - - -
Ecw
I where W is the required control phase power. The transistor dissipation can tl1en be
written in terms of the control phase power:
=; [ a- + :~ ) ] + PT
I P a• ( 1
The driver must be capable of supplying a peak current of:
~" (~N,,, )
I where " is the grounded base current gain of the output transistor.
Figure 16.12 shows a complete servo amplifier capable of driving a 2 watt ser"o
I motor in an ambient of -55 to 125°C (if capacitors capable of operation to 125°C are
used). The gain can be adjusted from 20,000 to 80,000 amperes/ampere by adjusting
R., in the driver circuit. The variation of gain for typical servo amplifiers of this design
is less than 10% from -55 to 25°C, and the variation in gain from 25 to J 25°C is
I within measurement error. The variation in gain at low temperature can be reduced if
solid tantalum capacitors are used instead of wet tantalum capacitors. The reason is
that the effective series resistance of wet tantalum capacitors increases quite rapidly
I at low temperatures thus changing the amount of preamplifier and driver feedback.
The effective series resistance of solid tantalum capacitors is quite constant with tem-
perature. Many 85°C solid tantalum capacitors can be operated at 125°C if they are
derated in voltage.
I The amplifier in Figure 16.12 can be used to drive a three watt servo motor in an
ambient of -55 to 125°C if the output transistors .are changed to G-E 2N498A's and
the unfiltered collectvr supply voltage is chnnged from 30 to 50 volts peak.
I www.SteamPoweredRadio.Com 17,5
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7 Ill
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0
+60V
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TO '11
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UNFILTERED :!!
F\JLLWAVE Ill
RECTlfl ED 400 CYCLES :u
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.... UNFILTERED
-1
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400.,
RI
PREAMPLI FER DRIVER OUTPUT

R1, 24K R12• 2.7K T1,- 12.5-1 STEP DOWN
Rz, 4.7K R13,R14,---2.4K Di,- OEIN678
R3, R11, - - 22K R 1 5 , - - - - 3.6K NOTES
L* HEAT SINK OgAND 07AS
~• 51K Cl'Cz.C3'~•~.-20,._( SPECIFIED IN FIGURE 16.10.
R5-R9- - - - 1 0 K C4,~ 10 ,., 2. ADJUST Rf FOR DESIRED GAIN.
3. Cg ADJUSTED TO TUNE MOTOR
R6• ----1900 C e , - - - - 6 ,._ f
FOR MAXIMUM STALLED TORQUE.
R7, 39K 0 ,0z,0 , - - - G E 2N~35 OR GE 2N336 4. ~ AO.AJSTED TO TUNE T1-
1 3
R9,,----1:!K ~,05, - - - GE 2N656A
R 10------ IUK 0..~- - - - OE 2N497AORGE2N498A
2 WATT 400 CYCLE savo AMPUfla fOR _ .,., TO 12.s•c. Ol'fRATIOH

FIGURE 16.12
I
I 17. TEST CIRCUITS
I Few occupations are superficially more prosaic and in reality more challenging than
precise measurement. A pertinent electronic illustration of this is the high Bdelity record
player, Playing a record can be considered measuring groove undulations and convert-
ing them precisely into air pressure undulations. High fidelity literature is profuse
I with advice oo shielding, avoiding ground loops, negative feedback i..roplifiers, non-
linearities in loudspeakers and amplifiers, microphonics, etc. This advice is largely
applicable to all measurement techniques.
I This chapter ,viii discuss proven transistor test circuits, but will stress possible
pitfalls as well.
Test circuits are commonly divided into two groups: those which measure the
actual value of a parameter, and those which indicate that the parameter exceeds a
I specified value. The latter are often referred to as go-no go tests. They are particu-
larly useful in checking components against specifications. Actual parameter values
are of interest in reliability, quality control and parameter distribution studies.
I Generally go-no go tests are simpler, less likely to damage the transistor, and
require less skill in interpretation. Most of the circuits discussed in this chapter can
measure actual parameter values or serve for go-oo go testing.
Precision is generally very difficult to achieve. Typically, even if 1% tolerance
I components are used, the cumulative error may be 5%.
For a fast thorough semi-quantitative evaluation of a semiconductor device, a
curve tracer such as the TeJ..-tronix 575 is extremely useful and oonvenient. It measures
I DC parameters such as leakage currents, breakdown voltages and saturation voltage
and permits estimating small signal, low frequency h parameters. Tunnel diodes,
unijunction transistors and controlled rectifiers can be tested. Anomalous negative
I resistance regions on conventional transistors can also be detected.
BREAKDOWN VOLTAGES
I JUNCTION BREAKDOWNS BVc110. BVE110

Figure 17.1 shows the current-voltage characteristics of a typical P-N junction.
The equations of Chapters 3, 4 and 10 utilize the solid portion of the characteristic
curve. The dotted region shows a rapidly increasing current in the reverse biased
I junction due to breakdown. U breakdown occurs at low voltages (below 6 volts), it is

generally attributed to tunoelJing or zener breakdown. Tunnelling is discussed in
Chapter 14. At higher voltages, the holes and electrons making up the leakage current
I are accelerated sufficiently by the voltage across the junction to knock electrons out
of the semiconductor atoms leaving boles behind. The holes and electrons so created
add to the total current. The additional current is in turn accelerated and cnn dislodge
other electrons. This causes an "avalanching" of current. The term "avalanche break-
I down" describes this process. The breakdown voltage can be controlled by varying
the doping of the P-N junction. While theory predicts a sudden "sharp" breakdown,
in practice breakdown often occurs gradually giving a "soft knee" or "soft" breakdown.
I This is shown in Figure 17.2 along with other variations of the breakdown characteristic.
The collector and emitter junctions being P-N junctions, exhibit this form of break-
down. Their breakdown voltages BVc•o and BV11ao are measured at a specified current
in the range of 25 to 100 µa for low p0wer transistors. The current is chosen substan-
I tially higher than loo in order to indicate true breakdown and yet low enough to avoid
excessive dissipation. Figure 17.3 illustrates two practical test circuits for measuring
avalanche breakdown. Circuit A approximates a constant current source. The VTVM
TEST CIRCUITS
I
CURRENT
FORWARO
I
CURRENT
P- N JUNCTION
I
BREAKOOWN
FORWARD BIASED
I
VOLTAGE
I
I
LEAKAGE
CURRENT
I
I
,... AVALANCHE
I CURRENT
: P-N JUNCTION
I
IREVERSE BIASED
I
I I
TYPfCAJ. VOLTAGE CUltHNT OfAIACTRJSTI C 01 A l'-H JUNCTION
FIGURE 17. 1
I
VOLTAGE
---...---
... \ ,
1 ,.
,~RESISTIV E
COMPONENT
LEAKAGE Cl#IR£NT I
NEGATIVE SOFT KNEE
RESISTANCE
P-N JUNCTION
REVERSE BIASED
CURRENT
I
I
AVALANaiE
CURRENT
TY,.,CAl VA.,ATIOHS IH UEAKOOWH CH,UACra,sr ,c Of A l'- H JUNCTION

FIGURE 17.2 I
indicates the breakdown voltage. When the transistor is out of the circuit the voltage
across the socket will rise charging the stray capacitance C•. The high voltage is an
operator hazard and the discharge of C. into the next transistor tested may damage
the transistor. To avoid these problems a normally closed push button should be con-
I
nected as shown and depressed only to take a reading. Some traisistors show a negative
resistance in the breakdown region which may cnuse oscillations. These nre best
detected on a cathode my oscilloscope curve trncer. Circuit B is more convenient for
I
go-no go testing in checking trnnsistors agninst specifications. The specified collector
supply volt,1ge is applied. The jun<.1ion current is monitored by the VTVM. R. is
chosen to give a VTVM reading of one volt at the rated breakdown current. R. is gen-
erally huge enough to protect the trnnsistor from damnge even if its breakdown voltage
I
is considcrnbly exceeded. A VTV~I is used bec,mso it will not be damaged by acci-
dental overvoltage. Precision decade resistance boxes are <.'Onvcnient for giving R, and
R,. Since circuit B docs not take the transistor into breakdown, precautions to avoid
I
transistor damage or circuit oscillation are less important.
I
I TEST CIRCU ITS
I r.:- ---
OUASI•
I CUIIRENT
CONSTANT
--,
, - - - - - -- - - - --
I ..LI,._
.._
- - - -- -------,
I I I
I ,.
SOURCE
I I : N.C.
I I I
: Yr I I
I I '----+-----''----------+---'
L - - - __ j @ CIRCUIT FOR MEASURING BVceo
I
[XAMl'lt
,110M G[ ZN55SA SPECIFICATION SHEET Ycao > 45V AT le • 50_..A
AT Vea •40V 1-vr·v w • ..:!s.L. -~ • 4.1,.A

IIYTYII IIM
Iii • v 1 - Yea (500- 45110• • ._
0
MO
I
~-lvrv11 (50+4 ll
TRAJtSISTOII PASSES IF VTYM ll[AOS MOIIE THAN 45V
I
I @ GO-NO GO BVceo CIRCUIT
I [XAMl'U
FIIOM GE ZNll!IA SPECIFICATION SHEET V.:,o >45VAT lc • SO,.A
SET Yca •I Ye10 111N ♦ IV• 45 ♦ 1 • 41V
I I
•
I SET
IVTYII •
fls • lea AT Yc,o
u'w • O.l>t,.11
PTIIANSISTOII DIIS IIAX •
• 80 X 10◄
( A N[OLIGIILE CURIIENT)
(!~.f ~I •
ZOIUI
H MW
I TIIANSISTOII PASSES IF VTYM IIEAOS LESS THAN IV
MEASUUMIHT OI IVc,o
I FIGURE 17. 3
To measure the emitter junction breakdown, the same circuits and considerations
I apply. The emitter and collector can simply be interchanged in the test socket.
COLLECTOR T O EMITTER BREAKDOWN BVc1:o, 8Vc1t11, B VcH, BVcEX, VRT

Collector to emitter breakdown is a more complex phenomenon. Figure 17.4 shows
I an idealized family of breakdown characteristics for an alloy transistor. Since conven-
tional circuits reverse bias the collector junction, it is useful to compare breakdown
voltages with BVc11<1. BVxuo is shown to illustrate that IEo is generally less than loo and
I that BVuo is approximately cqual to BVcao in alloy transistors. There are flve common
measurements for collector to emitter breakdown. Four are shown in Figure 17.4 with
the fifth, reach-through· voltage, implied by the dotted curves. The most stringent test
is BVcEO in which the collector to emitter breakdown voltage is measured while the
I base is open circuited. In this circuit configuration the collector current (Icro) is
approximately h,. loo as indicated by equation (4d), Chapter 4. If the product h,. L:o
is large, lcro may exceed 100 µa at a voltage which is far below breakdown. Therefore,
TEST CIRCU ITS
I
the breakdown sensing current must be chosen substantially above the h,. loo product.
A common value is 600 µ.a while specialized low leakage transistors like the G-E
2Nl67A use 300 µ.a. The G-E 2N335A, on the other hand, in spite of its extremely low
I
loo, uses 1 ma for reasons to be discussed in connection with BVou. Figure 17.4 shows
the significant increase in voltage due to 600 µ.a rather than 100 µ.a as the sensing cur-
rent. BVc"° has little meaning since it is impractical to operate transistors with the base
I
open. lcso approximately doubles every 10°C because of its dependence on loo. Conse-
quently, BVclCO is a very conservative rating primarily applicable to very poorly sta-
bilized circuits. I
I
C
..
...
IOK
IK
I
ffi
"'"'
B
100
I
...~u.,.,
10
8
1.0
0.1
BYc:co BVc;c BYc:o
I
COLLECroR \/Ot.TAGE
I
( BYcul
C BYcol
TYPICAL FAMllY OF AUOY TltANSISTOft 8ltr.AKOOWH CHA•ACTaJSTICS

FIGURE 17.4
BVor, is measured with the base shorted to the emitter. It is an attempt to indicate
more accurately the voltage range in which the transisor is useful. In practice, using a
properly stabilized circuit such as those described in Chapter 5, the emitter junction is
I
normally forward biased to give the required base current. As temperature is increased,
the resulting increase in l oo and h,. requires that the base current decrease if a con-
stant i.e. stabilized emitter current is to be maintained. In order that base current
I
decrease, the forward bias voltage must decrease. A properly designed biasing circuit
performs this function. If temperature continues to increase the biasing circuit will have
to reverse bias the emitter junction to control the emitter current. This is illustrated
by Figure 5.1 which shows that Vn = 0 when Io = 0.5 ma at 70°C for the 2N525.
I
=
Vn 0 is identically the same condition as a base to emitter short as far as analysis
is concerned. Therefore, the BVou rating indicates what voltage can be applied to the
transistor when the base and emitter voltages are equal, regardless of the circuit or
I
environmental conditions responsible for making them equal. Figure 17.4 indicates a
negative resistance region associated with Ice,. At sufficiently high currents the negative
resistance disappears. The 600 µa sensing current intersects Ices in the negative resis-
tance region in this example. Oscillations may occur depending on the circuit stray
I
capacitance and the circuit load line. In fact, "avalanche" transistor oscillators are
operated in just this mode.
Conventional circuit designs must avoid these oscillations. If the collector voltage
I
does not exceed V • in Figure 17.4, there is no danger of oscillation. V• is the voltage
at which the negative resistance disappears at high current.
The 1 ma sensing current for the G-E 2N335A BVcco is meant to measure V•· The
2N335A l oso is very small. As the transistor breaks down the transistor's current
I
I
I TEST C I RCUITS
I gain increases with increasing collector current. This in tum enhances the avalanche
effect generating n negative resistance region. The 1 ma sensing current measures V•
and insures that the full rated voltage will not cause oscillations.
I To avoid the p roblems of negative resistance associated with BVc,.s, BVou was
introduced. The base is connected to the emitter through a speci6ed resistor. This con-
dition falls between BVcr.o and BVc,., and for most germanium nlloy transistors avoids
I creating a negative resistance region. For most low power transistors the resistor is
10,ooon. The signi6cance of BVcu requires careful interpretation, At low voltages
the resistor tends to minimize the collector current as shown by equation ( 4h), in
Chapter 4. Near breakdown the resistor becomes less effective permitting the collector
I current to increase rapidly.

Both the value of tlte base resistor and the voltage to which it is returned are
important. H the resistor is connected to a forward biasing voltage the resulting base
I drive may saturate the transistor giving the illusion of a collector to emitter short.
Returning the base resistor to the emitter voltage is the standard BVcr.a test condition.
H the resistor is returned to a voltage which reverse biases the emitter junction, the
collector current will approach Ico.
I For example, many computer circuits use an emitter reverse bias of about 0.5 volts
to keep the collector current at cut-off. The available power supplies and desired
circuit functions determine the value of base resistance. It may range from 100 to
I 100,000 ohms with equally satisfactory performance provided the reverse bias voltage
is maintained.
In discussing the collector to emitter breakdown so far, in each case the collector
I current is Ico multiplied by a circuit dependent term. In other words all iliese collector
lo emitter breakdowns are related to ilie collector junction breakdown. They all depend
on avalanche current multiplication.
I There is another collector to emitter breakdown mechanism called reach-ilirough

(VRT), Recently, the term "reach-through voltage" (YxT) has been submitted to replace
"punch-ilirough voltage" because it is more descriptive of the actual phenomenon
and because it cannot be confused with other terms such as punch-through in dielec-
I trics. As the collector voltage is increased, ilie depletion layer which is discussed in
Chapter 1 spreads into the base region. H ilie doping of ilie base region is appropriate,
the depletion layer will spread into the emitter junction causing a large collector cur-
I rent before avalanche breakdown can occur. The dotted lines in Figure 17.4 indicate
the breakdown characteristics of a reach-through limited transistor. Several methods
are used to detect reach-through. BVc,:x {Breakdown voltage collector to emitter wiili
base reverse biased) is one practical method. The base is reverse biased by one volt.
I The collector current for.x is monitored. H the transistor is avalanche limited BV011x
will approach BVceo. If it is reach-through limited it will approach BVci:•·
Note that lt•r.x before breakdown is less than l oo. Therefore, if loo is measured at a
I speciAed test voltage and then ilie emitter is connected wiili a reverse bias of one volt,
tl,e Iro reading will decrease if reach-through is above the test voltage and will in-
crease if it is below.
I "Emitter floating potential" Is anoilier test for reach-through. If the voltage on an

open-circuited emitter is monitored while the collector to base voltage is increased,
it will remain within 500 mv of the base voltage until the reach-through voltage is
reached. The emitter voltage then increases at the same rate as the collector voltage.
I VRT is defined ns Vt•o -1 where Yen is the voltage at which V,:N = l v.

Figi1re 17.5 shows the details of a practical go-no go test set for breakdown nnd
lcaknge current measurements.
TEST CIRCUITS
I
I
UA
H
N_O.
10 TURN
I
I
IOK
5 IHTT
POT
SI 3P6POS'N
NON- SHORTING
S2 OPST NOR•
IIALLY OP£ N
S3 SPOT
S 4 PUSHBUTTON
I
I
NORMALLY
OPEN.
Ra IK
I
PR£C1$10N
R£SISTANC£
0£CAOE BOX
-=-
TEST SETSI TO SET Ve TO SET RsTO ACTION PUS IF
I co
BVeeo
Ito
BVtao
I
I
2
2
Vea lt:ST ♦ IV
Vea*MAX♦ IV
Vra TEST ♦ IV
v0 • 11AX+1v
1+-lco IIAX
1'- I e TEST
l• lro MAJt
1, IrTEST
PUSH S4
PUSH S 4
PUSH S4
PUSH S4
VTVll <IV
VTVM <IV
VTVll<IV
VTW<IV
I
Iero 3 Ve t TUT ♦ IV 1- Ieto IIAX PUSH S4 VTW<lY
8 Veto
Icts
even
3
4
4
Vu.o•MAx+IV
Ve t TEST+IV
Yet, • MAX+tv
1- I e TEST
1-:- I e u IIAX
1.,. I c TEST
PUSH S4
PUSH S4
PUSH S4
VTW<IV
VTVM<tV
VTW <fV
.1
8Vu.R 5 Ya.rt* MAX+rv 1~ le TEST PUSH S4 VTW <IV
V,r 6 V11T M IN ♦ tv
• THE AIISOLUTE MAXlll\111 VOi.TAG[ RATING CAN BE

ASSUMEO TO BE THE IIINIIIUII IIA£AKOOWl1 VOI.TAGE.
1- •J co llAX PUSH 54,
THEN PUSH
S4ANO S2
$1111.o\.TA•
NEOUSLY
M'A04NG
WITH 52
0.0SEOIS
EQUotl. TO
OR LESS
THAN WITH
I
S20PEH
EXAMPLE IIAst:0 ON GE2N12e9 GERMANIUM NPN HIGH SPEED SWITCHING TRANSISTOR
SPECIFICATION SHEET
Ico
BVceo
I
I
15 ♦ 1 • 16V
20+1•21V
t+5J&-A•200K
I+ l811A• k)t(
I
Ito
IYc tlt
v,,.
2
&
6
5 ♦ 1•6V
1& ♦ 1 • ISV
1i• ~•200K
t+.611.A•tl.6TK
15 ♦ 1 • 16V l~ !lj,.A•2001< I
CIRCUIT FOR GO-HO GO TESTING OF
LEAKAGE CURRENTS AHO HEAICOOWH VOLTAGES
F I GURE 17.5 I
LEAKAGE CURRENTS. l c o , I Eo , l cEo , l cEs
The test set shown in Figure 17.5 can also be used to measure l oo, IHo, lo1<0 and 1 011•·
The circ uit is identical to that in Figure 17 .3(B). For precise me.'\surements the ambient
I
temperature should be controlled. Also handling should be minimized since it can heat
the transistor. To measure millimicronmperc currents a VTVM is useful since one
hundred millimicroampcrcs develop one volt across its 10 megohm input impedance. I
D C CURRENT GA IN . SATURATI ON C H ARACT ERISTICS,
hFE, VBE, V e £ (SAT) ANO R sc
In switching applications, the leakage currents and breakdown voltages determine

I
dro 1it co nditions wlwn a transistor is off or non-cond ucting.
I TEST CIRCUITS
'When a transistor is turned on, it is generally necessary to know the base input
I required to produce the desired collector current. In switching circuits the minimum
collector to emitter voltage that can be achieved is often important. This data is pro-
vided by hrE, VB>:, Vo., (SAT) or R"°.
I DC beta or hrE is defined as Io divided by l e, Since hvs varies with both collector
current and collector voltage, test conditions must specify the operating conditions
precisely. Generally either the base current or the collector current is specified along
with the collector to emitter voltage. The unspecified current is then varied to produce
I the specified collector voltage. The ratio l o/ l s under these conditions is hvE. Since
accurate microammeters are expensive and prone to damage, if carelessly used, it is
often more convenient to use precision decade resistors along with a stable power
I supply. Figure 17.6 shows this principle applied to measuring the h,.., of the G-E
2N525 transistor.
I PUSH TO READ
P ~.O.
, - - - -- -- ~ - IOV. Vee
I Re
( 16.6K TO
317KI
I GE IN1692}
GE IN 1692
GE INl692
OIOOES PROTECT
TRANSISTOR FROM
ACCIDENTAL OVEJI-
OISSI PAT ION
I
I EXAMPLE FROM GE 2N525 SPECIFICATIONS
3 4<hFE<65 AT Ic•-20MA VcE•-IV
-.2V<VeE<,3VAT Ic • - 20MA Vcr•IV
I Re·
~
Ic •
10-1
2ox10-3' 4500
ADJUST Re UNTIL VcE. IV
VeE•-.25V± .05V(IGNORINO VARIATION IN Ver CAUSES LESS THAN'"" ERROR)
Ia• Vee- Ver
I R9
hFE•~-~~ ~ . 2.os R8 x 10- 3
te 1000 Re
I TO CHECK IF TRANSISTORS ARE WITHI N SPECIFICATIONS

L SET J:e.....:L._.~ OR Re• 16.6K
hfE MIN 3 4
Ver MUST READ LESS THAN IV
I 2. SET Xe • re
hf£ MAX
"ct MUST READ
• ~
65
MORE THAN IV
OR Re • 31. 7 1(
I MfAS(JlllfMfNT OF hFE AHO Va,

FI GU RE 17.6
While the measurement in Figure 17.6 can be done precisely, it requires interpre-
I tation. The transistor dissipates approxhnately 20 mw at the specified operating p0int.

This raises the junction temperature about 5 °C making this no longer a 25°C electrical
characteristic. It might be argued that the increase in junction temperature is unimpor-
183
TEST CIRCUITS
I
tant because the measu rement represents the actual hn in a 25°C ambient. This argu-
ment is only valid for amplifier applications since short pulses at low duty factors such.
as found in computer circuits will not heat up the junction because of its thermal time
constants and thermal capacity. Since hve increases with temperature the pulsed h.,.,
I
will be lower than that measured in Figure 17.6. While the difference is generally
small, this factor should not be overlooked.
The base input voltage is often specified at the same operating point as specified
I
for h,g and therefore can be read as shown in Figure 17.6.
The G-E 1Nl692 diodes limit the maximum transistor dissipation while Re is being
adjusted. The G-E 1Nl692 current is approximately 10 microamperes at 0.35 volts
forward bias, therefore the diodes introduce a negligible error at Ver.= 1 volt. At 0.75
I
volts forward bias the G-E 1Nl692 current is approximately 100 milliamperes. This
clamps VeE maximum to approximately 2 volts in Figure 17.6.
The collector saturation voltage Ver. (SAT) is measured in the same circuit as h,£.
I
The main difference is that both Ia and le are specified for Ver. (SAT). No adjustments
are required. The collector voltage is read directly and compared with the specifica-
tions. Figure 17.7 illustrates this for the G-E 2N525. The calibration of the VTVM
can be checked against a precision voltage divider as shown.
I
PB _n__N.O. I
PRECISION
VOLTAGE
DIVIDER TO
I
60n CHECK
CALIBRATION
OF VTVM I
I
I
EXAMPLE FROM GE 2N525 SPECIFICATIONS
5Om V <Ve£ (SAT) <uom V
ATie•-2Omo r 8 • - l. 3 3 mo
zVee_ V (SAT ) MAX _ V (SAT) MIN

Rc • - = - - ~
e~
£ _ _ _ _.....;,
Zic
C~£ _ _ __ IOV - 8 OmV
2Omo
- 496n
I
,on
I
_0_-_ ._2_5 _ _ - 73
_1
l. 33 mo
MEASVltEMENT OF Ve, (SAT)

FIGURE 17.7
Note that checking hn: against fixed limits is best done as a Ve.: (SAT) test as shown
I
in Figure 17.6.
The saturation resistance R.c is basically a restatement of Vn; (SAT). R~e is the
equivalent resistance of a transistor when it is in saturation. R>«: = Ve.: (SAT)/Ic. For
the C-E 2 525, Ri<e ..... = ll0 mv/20 ma = 5.5 ohms. Unfortunately Rso varies with
I
current and tcmpen1ture which limits its usefulness. To illustrate the variation with
current, the C-E 21 396 specifications show R>«:
<
<411 at le :::: 50 ma. Redefining the
200 ma h,v. rating in terms of R,c gives R11e l.75fl at Ic = 200 ma.
I
184
I
I TEST CIRCUITS
Instead of measuring l¼c, measure Ve., (SAT) and convert to Rao by R.c = Ver.
I (SAT)/Ic.
h PARAMETERS
I Historically it proved convenient to describe transistor small signal characteristics

by specially selected pairs of equations. The transistor is considered as a "black box"
with input and output terminals. One set of two equations can fully describe the per-
formance of the "black box". This is discussed in Chapter 3 on small signal charac-
I teristics.
Each set of two equations contains four variables; the input voltage and current,
and the output voltage and current. It also contains four constants, or parameters,
I describing the "black box". To be useful, the equations must have only two unknown
variables, therefore the equations depend on two of the four variables being arbitrarily
assigned. Solving the equations determines the other two variables and provides a
I complete description of the "black box" performance. By carefully chosing the arbi-
trarily assigned variables to suit the requirements of the circuit application, the
mathematics for solving the equations can be simplined.
There are six ways in which the assigned variables can be chosen. Each way
I results in different values for the parameters. The sets of parameters are identified as
the "a", "b", "g", "h", "y" and "z" parameters. Because each set of equations describes
the same "black box" it is possible to convert from one set of parameters to another
I as desired. Hence by knowing one set, all sets are known.

With transistors the most convenient parameters to measure are the h parameters.
They are discussed in detail in Chapter 3. Specification sheets most often show the
I h parameters for the common base configuration. This is partially due to the high
precision with which the two assigned variables, the emitter current and the collector
to base voltage, can be maintained.
On the other hand, common emitter configurations are used more frequently in
I actual circuits. For this reason the test circuits to be described measure common emitter
parameters which can be converted to common base parameters with tl1e conversion
factors in Chapter 3.
I Common emitter parameters should be measured at a constant collector current

and a specified collector to emitter voltage. However, for convenience of measurement
the DC operating conditions are generally obtained from a common base configmation.
I That is, the emitter current and collector to base voltage are controlled. The AC test
signal nevertheless is applied in the common emitter mode.
The circuits in Figure 17.8 apply a constant l ma emitter current tluough the SOK
I resistor and a 5 volt collector to base voltage from a separate power supply. The
capacitors must be non-polarized if the circuitry is used for both PNP and PN tran-
sistors by reversing the battery and diode conneclions. The base must be at ground to
direct current but not to the test signal. This is achieved by the tuned circuit from base
I to ground. The inductor is a high Q toroid such as the UTC HQB-12 which is tuned
by the capacitor to the test frequency of either 270 cps or 1000 cps. If large base
currents are encountered, care shou]d be taken to avoid saturating the toroid.
I Injtially 270 cps was chosen because it was "a low frequency" to even the lowest
frequency transistors, and because it was harmonically unrelated to 60 cps thus avoid-
ing power line interference. All presently available transistors however still have their
low frequency parameters unchanged at 1000 cps, and components for this frequency
I are more readily avaiJable. The circuits in Figure 17.8 may be used at either frequency
providing the inductor is tuned accordingly.
185
TEST CIRCU ITS
I
500,.fd
5V
I
I
SHIELD
' J
I P=~
••
~:OK
101
r---
1
I
I
I
Zp
GE
IN1692
GE
I
I
IK
••
AUDIO I 50V I N1692
CILLATORI
L __ _
VTVM Zp•Owl>IMO.
(UTC HBO-IZTOROID)
SET INPUT (I~~ l TO 10 mv
READ o0
h 10 • Zoo X 101
I
••
I
I
. 5,.fd
I
I
IOOK
, 1,.fd
SHIELO
+I
I
I
7
I
I
GE IN l 69Z
GE INl692
I
I
IK I
I
I
I
Zp
I
I
I SET INPUT l~I TO IOmV
I
L __ _
I
VTVM _J READ o0
hr• •.!!.,
••
@ h,o
MEASUHMINT Of $MAU SIGNAL AUDIO COMMON fMITTD Ii PAllAMfTD

I
= +
I
EQUATIONS DEFINING { v•• ht, i• h,, vu
h PARAMETERS i , = hte i• + ho, v,.
OPERATING POINT: I■ = 1 ma Vea = SV
FIGURE 17. 8
186
I
I 500
TEST CIRCUITS
I PRECISION
DECADE
RESISTOR
500~ 1d
l -l -=.. 5V
I R
r-----
I
7
I
I I
I I
I
I
Zp
I
I
I h
500~ 1d
sov
GE
INl692
GE
INl692
I I
I VTVM SET INPUT~ TO 5mV
I
'------ J
I
I ADJUST R UNTIL •• IS 5 m V
h
,•• i'o4
R
I r----,
I
.. I
I
I IOOK
••
I ioi
I
I
I
7
I
I
5011
500~1d
IK I SOK
I
GE INl692
I I
I I
I50V
I I GEINl692
IL ____ _ I
VTVM _.., I
=
I SET INPUT
READ • •
"Tifl" TO 10 mV
I ..... 5~~
•
MUSUHMBIT 0, SMAU SIGNAL AUDIO COMMON fMITTD It l'MAMfTM
EQUATIONS DEFJNlNC { v .. h1. i• h,. v c• = +
h PARAMETERS ic = hr. ib ho• vu +
I OPERATING POlNT: ls= l ma Vea= 5V
FIGURE 17.8
The 1Nl692 diodes prevent the emitter bypass capacitor from charging to -50v
I when the transistor under test is removed. lf the diodes were removed, discharging the
capacitor through the next transistor tested might damage the transistor. One diode is
sufficient if only germanium transistors a re tested. Two are required for silicon tran-
I sistors. The VTVM is an audio high impedance voltmeter such as the 'Ballantine Model
310A or Hewlett-Packard 400D. The voltmeter can be switched to calibrate the input
signal. The center ground p0sition on the switch is used as a shield between input and
187
TEST CI RCUITS
I
output. For measuring h,. and h••, the resistance of the transformer winding supplying
e. should be minimized.
If BVccs or Vn are less than 5 volts, there is a possibility of damaging the tran-
sistor in these circuits. Breakdown voltages should be measured before h parameter
I
measurements are attempted.
BASE SPREADING RES ISTANCE ANO C OLLECTOR

I
CAPACITY r•' ANO C oo
One of the more useful common emitter transistor equivalent circuits contains a
series base input resistance called r,,'. A capacitor c •• is connected in series with r. to
the collector. This collector to base time constant r. c •• can control a transistor's high
I
frequency performance. A well known expression for the maximum available power
gain of a tuned amplifier is C - O.P0 x
4
~•c•• where f.,, is the alpha cut-off fre-
r, ob
I
quency and f is an operating frequency between 1/20 and 2 f., •. The equation shows
that a large r. C•• product can offset the advantage of a high f.,•.
At high frequencies, h,. - 2,r( r.• c ••. Doubling the test frequency will double
h,. if the test frequency is high enough. For alJoy transistors 1 me is a suitable test
I
frequency. Figure 17.9 shows a suitable test circuit for high frequency h,•. The shield
is essential.
•• 5011
I
I
.=. &V
I
SOY
10011
SIGNAl.
GENERATOR
f "''''
I
1,1---- - - -- - -- - - -- ---'
SET INPUT
READ •o
' ; TO &IOV
1 1
I
'°',b • ~•2.-f Cob rt/
MEASUREMENT Of
FIG U RE 17. 9
,1,· Coh I
To determine r. and C. separately, two measurements are made. The base switch
is closed giving h,., =~= 2wfC•• r •'· The switch is opened giving h,o, =~= 2wfC••
I
L L
( r.' . for r. ' gives
+ R•). So1vmg ·
r. ' =e.,_ R.e.,) . So1vmg
(e., · f or C•• gives
· C •• = e., - e.,
2,,. feI
The significance and validity of r• and c •• as measured above depends entirely on
I
the validity of the equivalent circuit assumed for the transistor under test.
ALPHA C UT-OFF FREQUENCY ht•

I
The alpha cut-off frequency, r.,., was the earliest measure of a transistor's frequency
response. It is defined as the frequency at which alpha, the small signal common base
current gain, decreases in amplitude by 3 db. In modem transistors f.,. ranges from I
188
I
I TEST C IRCUITS
100 Kcs to 2000 mes. Since at frequencies over 100 mes accurate measurements become
I exceedingly difficult, low frequency data is often extrapolated instead of measuring f.,.
at higher frequencies.
In itself f.,. is of little importance, since for example, £.,. along with r•' and c••
I determine high frequency amplilier power gain. Special amplifier transistors therefore
are often characterized directly in terms of power gain.
In switching circuits, transient response times become shorter when f.,. increases.
But they do not correlate well because of £.,. variations with operating point and also
I because of the effects of c•• and voltage bias.
While f.,. can be increased considerably by grading the base impurity distribution
as discussed in Chapter 2, common emitter performance does not increase proportion-
I ately. Transient response time, for example, appears to correlate better with common
emitter frequency response rather than with fhf•• This leads to specifying a common
emitter gain-bandwidth product, or high frequency h,., or the frequency at which
h,.= l.
I COAXIAL
ll[LAYS
I ..
SIGNAL
, ,.
O[Nt:RATOII
I
I MEASUREMENT OF f u•
FIGURE 17. 10
I The circuit in 17.10 is suitable for measuring £.,. to 100 mes. The 3 db pad is
switched in and the base is connected to the VTVM. The signal generator is adjusted
to give l mv across the VTVM. The 3 db pad is switched out and the base grounded.
The VTVM will read l mv if the input frequency is £., •. It will read over lmv for lower
I frequencies and less than 1 mv for higher. This circuit is best for go-no go testing.
Care should be taken to minimize stray capacitance and inductance. The test as out-
lined assumes the low frequency alpha is very close to unity. U this assumption is not
I valid, an additional attenuator will compensate for low alpha. The 3 db pad is switched
in, the attenuator is switched out, the base is grounded and the signal generator is
adjusted to give l mv output at a low frequency. The base is then connected to 5011.
The attenuator is switched in and adjusted until the output is again l mv. The signal
I CA.lll.llAT(O
IN,UT
I
ATT[NllATOft
I W IDt IANO
AM,ll,1(:(111
HP • IOA
I NINCJPlf OF MEASUREMENT OF HIGH FREQUENCY hfe

FIGURE 17. 11
189
TEST CIRCUITS
generator frequency is raised and the output again adjusted to 1 mv. Finally the atten-
I
uator and 3 db pad are switched out, the base is grounded and the output reads 1 mv
if the signal generator frequency is f.,•.
Figure 17.11 indicates the principle used to measure high frequency h,.. Since
I
the resonant circuit at the base must be retuned with every change in frequency the
measurement is tedius. The principle is similar to that in Figure 17.10. The input atten-
uator is used to offset the gain of the transistor so that the reference meter reads the
same during calibration and test. This avoids errou due to non-linearities in the ampli-
I
fier, detector or meter. Calibration is achieved by removing the transistor, connecting
a capacitor jumper from base to collector and tuning the resonant circuit for maximum
output. The signal generator level is adjusted to approximately 10 µa and the meter
I
deBection is recorded. The jumper is removed and the VTVM is used to retune the
resonant circuit. The transistor is reinserted and the attenuator increased until the
meter reading returns to its calibration value. The attenuation added is equal to the
gain of the transistor at the test frequency.
I
TRANSIENT RESPONSE TIME t o, tr. t,. t,
Chapter 10 on switching characteristics defines and discusses transient response
I
times. Because they are strongly circuit dependent, transistor manufacturers have had
considerable scope in specifying response time. Figure 17.12 shows five basic circuits
currently in use. Capacitor overdrive (A) gives the fastest response times but small in-
accuracies in component values or pulse generator characteristics result in large changes
I
in response time. Also in practical circuits it is seldom possible to simulate these over-
drive conditions. I
C#llltQTOl'tOVl:9':0fNVt.
,011 'AJTHT M:l"ONst
l!MD
I
@
CUllJltMT Olll!Vt. l.t1
A.ND IN 1Cl't ilCC.UltACT
I
~ORIV!l11
~TM( OlttW:1-:
J~lilM..ATUIN.CW.
I
I
CIACUIT
~ T O I TIK
I
,-.1.,..,.t:MCMT
Slwu..AftlaMM#T
MODI[ U>IIC CMICUTS
©
HICM"IIIU,ft()H TIMI
Ml.UUltUilfNT
SlMUL&US OCT\.
C.tfteutft
I
I
BASIC CIRCUITS FOR RESl'OHSE TIMI MfASURfMfNT
FIG U RE 17. 12
I
190
I T ~ I R CUIT S
Current d rive (B) for In, and In, gives the slowest response times but is much less
I sensitive to pulse generator characteristics. If a high amplitude input pulse is used to

define the currents accurately the delay time becomes long. Also the emitter junction
breakdown voltage may be exceeded. For these reasons, it is not sufficient to define
the currents; the entire circuit must be specified.
I Storage time can be minimized by a high IBt current. In complex Hip-Hop circuits
using several transistors, it is possible to design for high Is,, Circuit C simulates this
condition by combining voltage and current drives.
I As noted in Chapter 12 on Logic, current mode logic circuits are extremely fost
although expensive in transistors. Circuit D is useful in measuring the delay i.e. the
propagation time through one level of logic. It is difficult with this circuit to measure
I the performance of an individual transistor.

DCTL offers the simple logic chain in E for measuring the propagation time
through several stages. The circuit averages the transistors' performance and permits
I reasonably accurate high speed measurements with relatively slow pulse generators
and oscilloscopes.
In order to avoid the expense or risetime limitations of pulse generators, mercury
I wetted relays capable of 0.25 nanoseconds (millimicroseconds) risetime are sometimes

specified. Most relays operate at 60 cps and generate pulses with approximately a 50%
duty factor. The 60 cycle pulse rate results in low CRT trace intensity while the 50%
duty factor may cause appreciable heating. The relay pulse generators in the Tektronix
I R nnit and type 110 pulse generator minimize these problems.

There has been considerable work done to separate transient response time into
circuit and transistor dependent parts. I t is hoped that once the intrinsic t ransistor
I characteristics of significance in response time are known and specified, the perform-
ance of any circuit can be predicted. While c.'Onsiderable progress has been made, no
analysis is valid for tl1e majority of transistors available today. For typical transistors
from a specific man ufacturing process however, response times can be predicted quite
I accurately over a moderate range of operating points. But the typical transistors ha\'(.'
never been a problem since their response time cnn be measured d irectly at the desired
opcr,1ting point, and the designer can base his circuit on the measured data. The prob-
I lem lies with the small percentage of units which do not follow the typical vuriation.
This problem has r.ot been satisfactorily resolved to date.
Since no one transient response test circuit is widely accepted, none is shown in this
I section. To test :my spe<.'ific transistor the manufacturer's test circuit should be followed
explicitly. In some cases, however, •the circuit may be incompletely specified lencling to
:m1biguity or error. T he check list in Figure 17.13 suggests the considerations under-
lying an accurate measurement. It cun be used to as;;ess the adequacy of either the
I manufacturer's or circuit designer's specified test conditions.

As the check list suggests the input pulse must be precisely specified. Whether ;1
eonvcntional pulse generator or a relay type is used generally detennines the rest of
I the circuit. The pulse risetime, width and repetition rate arc essentially predeterminccl
if a relay is used, but nil of these parameters should be given for conventional pulse
generators.
I Component characteristics should be <leflned. Predsion high st;1bility components

should he used.
At high frequencies the shunt capacitance of resistors may become significant. The
I sl'lf-rcsonant frequency of capacitors, their power factor and series incluctanc.: may
have to he l'Onsidered. Also, if any diode~ arc used it should be ascertained that their
leak,1gl• current, capacitance and rl·<·o,·cry time do not introdut·e significant errors.
191
TEST C I RCUITS
I
I
PULSE GENERATOR - TYi'£ OF GENERATOR
- PULSE WIDTH
- PULSE RISE TIME (MAX M IN LIMITS)
- PULSE AMPLITUDE
- PULSE REPETITION RATE
- GENERATORI MPEOANCE
COMPONENT$ -
-
-
-
TOLERANCE
FREOUENCY RESPONSE
LAYOUT
DISSIPATION
I
INITIAL CONDITIONS -
-
VOLTAGE BIAS
EMITTER JUNCTION PROTECTION I
DRIVE CONOITIONS - SERIES USE IMPEDANCE
-
-
-
TIME CONSTANTS IN DRIVE CIRCUIT
FORWARD BIAB CURRE NT OR CHARGE
REVERSE BIAS VOLTAGE, CURRENT OR CHARGE
- DANGER OF OVERDRIVE
-PULSE REP£TITION RATE SENSITIVITY
- PULSE WIDTH SENSITIVITY
I
OUTPUT -
-
-
AC ANO DC LOAD
LOADING EFFECT OF MEASURING EOPT
OUTPUT TIME CONSTANT OUE TO STRAY ANO
OUTPUT LOADING CAPACITANCES
I
MISC
-
-
-
-
REFERENCE TIME$
TERM S DEFINED
POWER SUPPLY DECOUPLING

RINGING
I
CHECK UST FOR RESPONSE TIME MEASUREMENT CIRCUITS
FIGURE 17. 13
I
Circuit layout may be important. For example, adding two picofarads (micromicro-
fards) stray capacity from collector to base increases the rise time approximately 40%
I
in typical high speed mesa transistor test circuits.
The voltage bias on the base before the input pulse is applied largely determines
the delay time and in some circuits affects the rise time. Also if the bias voltage exceeds
the emitter junction breakdown voltage this must either be allowed by the transistor
I
manufacturer or a protective diode voltage clamp should be specified.
The input pulse characteristic together with the series base impedance determines
the drive conditions. If capacitors are used as part of the drive impedance, the tran-
I
sient response times may be strongly dependent on the input pulse width and repetition
rate. In measuring risetime, the test circuit generally specifies a forward bias current
or base charge. By knowing the current or charge, performance can be predicted at
other operating points. Reverse bias conditions are equally important in predicting
I
storage time and fall time. If voltage drives are used, precaution should be taken to
avoid transistor damage due to equipment misadjustrnent.
In measuring very fast response times (in the order of one to five nanoseconds)
I
it may be necessary to make the oscilloscope input impedance part of the collector
load. For slower speeds, conventional low capacitance probes may be used but their
contribution to the response time should be checked. The reference times from which
measurements are made should be carefully noted. Some specifications lump together
I
delay and risetime. Some circuit engineers think of storage time in tenns of the delay
it causes and refers to it as "delay time." Pulse width may be measured across the base
of the pulse or at 50% of full amplitude.
I
It is important that the DC biasing power supplies be able to supply fast transient
currents without ringing. The power supplies may have to be decoupled right at the
transistor socket with several paralleled capacitors. Each capacitor is chosen to extend
I
192
I
I the frequency of effective bypass; electrolytics for low frequencies, button stand-off
TEST CIRCUITS
I capacitors for high frequencies. The pulse generator should be checked for overshoot
or ringing. Ringing makes the 11ulse amplitude indeterminate prutic ularly if the pulse
is capacitively coupled to the base of the transistor under test.
I SI M PLE T RANSISTOR TESTER

Occasionally after an accidental overvoltage or slip of a test probe the need arises
to quickly check if a transistor has been damaged. The circuit in Figure 17.14 is de-
I signed to meet this need. The 100 µa meter is in a network which results in a nearly
linear scale to 20 µa, a highly compressed scale from 20 µa to l ma and a nearly linear
scale to full scale at 10 ma. The network permits reading loo, l&0, l o&~ and l oKo to
I within 10% on all transistors from mesas to power alloys without switching meter
ranges or danger to tl1e meter movement.
I
I
I
I
SI
POSITION
SIMPLE Tlt.AHSISTOlt TfSTflt
PiUIT$ TEST F I GURE 17. 14
st »• POl'N HON-SHOftTINO lco AT Yee • IV
12 4 POT t• l•,.lYc AT Yo • 10,,A
I SJ
W
PUSH IUTT0N NOtlUULl.Y OPEN
14 "'514 ll!IUTTON MORltALLY 0P£N
IO(flA '1A.L ICALt
s•
$
4
0.,rlI.eAT lo • 100,,A
lcn,AT "ct• IV
lcuAT Vc:ir •IV
"• ti M!.TElt RllSllTAHct
.• Im AT Vo• IV
I
PUSH S 4 TO 09TAIN 1111,
CALO.LATE. 111,-, I N l'OSITIOHS 2 ANOS
.,. . !£....
Io
CALCULAT[ '-1, IN POSITIOflS t ANDS
I WITH 14 0,(N Ic •Ic,
WITH 1 4 CL0St0 le• lea:

Ic1 •let
tr.,, • (O,t) le
I The test set also measures h,.., with 20 µa and 100 µa base current. Depressing the
h,. button decreases tlle base drive 20% permitting h,. to be estimated from the cor-
responding change in collector current. The tests are done with a 330fl resistor limiting
I the collector current to approximately 12 ma and maximum transistor dissipation to

approximately 20 mw. Therefore, tllis test set can not harm a transistor regardless of
how it is plugged in or how the switches are set.
I By making R., + R, equal to 12K tl1e scale will be compressed only l µa at 20 µa.
The potentiometer should be adjusted to give 10 ma full scale deflection. The scale can
then be calibrated against a standard conventional meter.
I If the NPN-P 1P switch is in the wrong position, the collector and emitter junctions
will be forward biased during the le.., and l eo tests respectively. The high resulting cur-
rent can be used as a check for open or intermittent connections within the transistor.
193
.____ _ __ _ _I I
18. SILICO N CONT ROLLE D RECTI FIER
The Silicon Controlled Rectifier ( SCR) has a P PN dc,ice structure and is the
an
semi<:onductor equivalen t of a gas thyr,1tron. It is constructe d by making both
shown in Figure
I
alloyccl PN junction and a separate ohmic
18.1. This structure
circuit 5ymbol in this same figure.
is
contact
typical of
to
the
a
16
diffused
ampere
PNP
SCR
silicon
shown
pellet
with
as
its
I CATHODE
. ~
--
AUJMINUM - - - ~
_,...,,v~
I
...-..........._
,
".il
AI.\HIINUIII ~ " '
-
MCll,._YICIOiUM -..
I IITUOI
CONfflOLUD AECTl"EII
INTERNAL CONSTRUCTION
I FIGURE 18. 1
ANODE
I
In addition to the 16 ampere SCR, General Electric also offers a complete family of
SCR's capable of carrying load currents from a few hundred milliamperes to 70 am-
peres average. SCR's arc also classified within any basic current rating by the maximum
I
voltage they can block. For a list of condensed specifications on SCR's see page
I
I
qr[,, jF
VF at jF
J I IH veo IBO
I
YR
0
VF
iR at YR
I PIV
I
I FIGU R E 18 . 2
I
194
I S I LICON CONTRO L LED R ECTIFIER
T he e lectrica l charncteristics of the SCR nre shown in Fig ure 18.2. With reverse
I voltage imprcss1.-d on the device (cathode positive), it hlocks the Aow of current until
the avalanche voltage is reached as in an ordinary rectifier. With positive voltage
applied to the anode, the SCR blocks the Aow of current until the forward breakover
I voltnge (V,in) is renched. At this point the SCR switches into a high conduction state
and the voltage across the device drops to about one volt. In the high conduction state,
the current Aow is limited only by lhe external c ircuit impedance and supply voltage.
At aoodc to cathode voltages less than the breakover voltage, the SCR can be switched
I into the high 1.'0nduction mode by a small pulse ( typically 1.5 volts and 30 milliam-
peres) applied from gate to cathode. This method of "turning-on" the SCR by means
of a gate is used in the majority of applications since it permits the control of large
I amounts o r power from low power signnl sources. Once the SCR is in the high conduc-
tion state, it continues cond11ction indefinitely artcr removal of the gate signal until the
anode current is interrupted or diverted by some external means for about 20 micro-
seconds. This permits the SCR to regain its forward blocking capability.
I The magr.itude of gate pulse needed to tum on :m SCR vnries with tempernturc
and also from unit to unit. In order to achieve precise firing, it is desirnble to use a
short gate pulse with an amplitude of at lcnst 3 volts and capahle of delivering the
I mnximum firing current requirements of the SCR. A simple nnd economicnl source of
these pulses is the unijunction relaxation oscillator shown in Figure 13.9. A typicnl
value for capacitor C in this diagram is 0.2 microfarad, and the gate trigge ring pulse
is taken off at Ve,, The gate and cnthode of the SC R a rc t-onncctecl to Ve, and ground
I respectively, or are coupled to the 11nij11nction transistor circuit by a pulse trnnsformer
where isola tion is necessary.
This circuit produces pulses spnccd roughly R,C seconds apart and is the bnsis for
I SCR firing circuits in DC to AC inverters or othe r cc1uipment opernting from DC su p-
plies. The mnjor nclvantage of the 1111ij11nction circuit is thnt the interval between pulses
depends primarily on the vulues of R, nncl C and is cssentinlly t-onstant with chnngcs
I in Mtpply voltage or tcmpcrnture.

\Vhcn SCR's arc used in AC circuits, it is necessary t h;1t the firing pulses have a
precisely cletem1inccl phase relntionship with the supply voltage. A means for synchro-
I nizing is illustrntcd in Figure 18.3 which shows a 150 \Vntt AC phnse controlled
voltngc regulntor. T hb simple type or d rcuit is pnrticularly suitable for c.-ontrolling
int•andcsccnt lights nncl electric formtces, ovens, and henters opernted from 60 cps
sources.
I The I 17 volt AC supply is eonnectccl to the lond through the single phase bridgt:
formed by rcc:tificrs CRl through CR4. This bridge applies full wa\'e rectified DC to
I the anode of SCR. Through the dipping action of zcner diode CR5 in conjunction
with R3, the unijunt·tion oscillato r circuit formed by UJT, Rl, a nd C is energized hy
a 20 volt clipped voltage supply as imlicatc<l. C begins ch:1rging at the start of the AC
wn,·e and UJT produces a pulse after a time interval depending on the value of R l in
I t11e UJT e mitter circuit. As soon as SCR fires, it shorts out the voltngc supply to UJT
and prevents C from charg ing up until the start of the next half cycle, when SCR
n,t11rns to its blocking stnte by virtue of the supply voltnge momentarily dipping to
zero. Thus, the timing of the UJT is ::ilwnys synchronized to the st,1rt of each hnlf
I cycle of the supply volt11ge. For proper operation, it is essential that inductance in
se ries with SCR in~ide the rectifie r bridge be kept to a minimum. The circuit will
opernte properly howe'ver with any reasonable value of inducti\'C load in the AC circ uit.
I Since the bridge applies full wave voltage to SCR, the firing angle for both half
cycles is controlled by this single UJT, nnd symmetrical ph;1se controlled AC volll1ge
195
SILICON CONTROLLED RECTIFIER
I
AC FULL WAVE RECTIFIED
ANO CLIPPED I
NV\
AC FULL WAVE RECTIFIED
CR2
I
CRI
RI I
117 VAC
,---
1
I
:©
I
CR!5
1BASE I I
CR3 CR4 I
LOAD
SCR
UJT
G-E CIIB CONTROLLED RECTIFIER
G-E 2N1671A UNIJUNCTION TRANSISTOR
I
CRI-CR4- G-E IN 1695
CR5
RI
R2
INl527, IWATT, 20 VOLT ZENER DIODE
100 K LINEAR POT
390 .Q , 1/2 W.
I
R3 3.3 K, 5W.
R4
C
47.Q I 1/2 W,
0.1 MFO I
ISO WATT VOLTAGE RfGUlATOR
FIGURE 18.3
is delivered to the load. The firing angle, and therefore the power to the load, can be
I
adjusted by va.rying Rl. Alternately, the power output can be controlled by an NPN
transistor connected across C as shown. If a small current is injected into the base of
the NPN transistor, an amplified current will flow from collector to emitter, thus
diverting some charging current from C. Reducing the charging current to the capaci-
I
tor delays the firing of the UJT and SCR, and less average current flows to the load.
The power gain from the base circuit of the NPN transistor to the output of the SCR
is over ten million. Because of this high gain, this basic circuit can be readily adapted
I
to high performance regulated power supplies, temperature controls, and other similar
applications requiring feedback.
Through use of a pair of back-to-back connected SCR's of higher current rating
I
than the ClO, loads as high as 10 kilowatts on 117 volts may be controlled. By using
two SCR's and two conventional rectillers in a full wave phase controlled bridge
circuit, it is possible to obtain a continuously variable DC output.
Figure 18.4 shows the circuit of a ½ kilowatt, 50 volt regulated power supply
I
that will maintain the output DC voltage constant within ± ½ % for wide variations of
load current or supply voltage. By making the feedback voltage to Ql proportional
to current rather than voltage, a constant current supply will result.
I
196
I
i 'V'
R9
_- - - - - - - - - - - - - - -
~ Oz I
CR~
R6 Ci ...L
R10
Ru Rz
J A12
SGR1 ( ~ SGRz
C3 Ro
To R3f +...1... +
CR@ _T c2
<D LOAO
TEMP
--4
COMP
GA1 > "S (II

I I
!:
0
":~1- l ~, r
I 0
z
R1 10• LINEAR POT Ag- --!3", 2 WATT CR3 - INIS27 0
A2 2 2K, 1/Z WATT Aio- - -47 OHM, 1/2 VMTT CR4-(4) G·[ IN- 0
10,C, 1/2 WATT "11 .1112--25 OHM, V2 WATT
z
-i
R3 CR5 -◄- :D
R4 :!JO, I WATT c 1- - - 0 2 WO CR, - G-E 1111192 0
R5 2 2•, SWATT Cz- - -lS,000 WD,75 VOLT ELECTROLYTIC o 1- c - c 2N33S r
r
R6 4 7K, 1/Z WATT c , - - -2000 W O, IS 1/0l.T ELECTf!DI.YTIC Oz-G·E 2Nl671A
R7 3 3K, 1/Z WATT SCR1, SCRz- G·E C3!!H T1-117/117 V ISOLATION Tl!AN.SFOflllf:A 50 10
R9 330, 1/Z VMTT CR1,CRz,CRr;-c IH21:II L -0.01 H. I ISA. CHOKE
,
"'-i0
~
PHASE CONTROLUI> CONSTA NT VOLTAGE POWER SUPPLY
FIGURE 18 .4 "':D
SILICON CONTROLLED RECTI Fl ER I
ADJUST
RI
I
FOR
TWICE
OUTPUT
FRE-
QUENCY
1/120 SEC
--t+ I
v - J.JJ.l.lU
I
I
Tl
I
I
_A__ju\_jLA_
ADJUST FOR CENTER
OF LOCK-IN RANGE
AT 1/2 FREQUENCY
H
1/60 SEC
I
OF UJTI
SCRI, SCR2
UJTI, UJT2
G-E C40A CONTROLLED RECTIFIER
G-E 2N1671A UNIJUNCTI0N TRANSISTOR
I
RI
R2,R3
R4
R5
3300.n , I W
250 K, LINEAR POTENTIOMETER
1500, V2W
1800, 1/2 W
I
R6,R7
g~
L
C2
56 0 1/2 W
0.1 MFb,200VOLTS
2 MFD'- 200 VOLT
I MH. , oA CHOKE
I
O.C. TO A.C. PARAWL INVERTER
FIGURE 18.5
I
Figure 18.5 is the circuit of a 100 watt parallel type inverter suitable for converting
28 volt DC to 60 cycle AC or else to OC at a higher or lower volt.1ge level. I
UJTl is the primary oscillator and UJT2 is synchronized to UJTl through the
common resistor R4 in their base two circuits. As a result, UJT2 fires llt exactly h·•lf
the frequency of UJTl. Since UJTl p roduces the first pulse, SCRl will tum on first
and SCR2 will remain in a blocking condition. The current from the 28 volt supply
I
will then How through the upper side of transformer Tl. The transformer action will
=
produce a voltage of approximately 2 X 28 56 volts a t the :inode of SCH2 and across
capacitor C3. When the next trigger pulse is applied to the gate of SCR2, it will turn
on and the voltage at the anode of SCR2 will fall to a value equal to the forward
I
conduction drop. The voltage at the anode of SCRl will fall to approximately -56
volts because of the action of commutating capacitor C3. Capacitor C3 will maintain
a reverse bias across SCRl long enough for SCRl to recover its forward blocking
I
198
I
I SILICON CONTROLLED R ECTIFIER
I state. The next trigger pulse will occur at tJ1e gate of SCRl and cause the circuit to
revert to the original state. In tJiis manner, the current from tJie DC supply will flow
alternately tJirough tJie two sides of the transformer primary and produce an AC volt-
age in the secondary.
I The inductance L serves as II ballast to prevent excessive current Aow during

switching. During the switching interval, opposing currents can flow in both halves of
tJie transformer primary to tJie commutating capacitor C3 and to tJie anode of tJie SCR
I which has been turned on. If tJ1is current is not limited, the charging time for tJie
commutating capacitor will be very short and the SCR which is to be turned off will
not be reverse biased long enough for it to recover. Large values of L on tJie other
hand prevent the supply from adjusting to rapid changes in load. For example, if load
I current is suddenly d ecreased, a voltage will be induced across L which will also
appear at the anode of the SCR which is in the blocking condition. If this transient is
greater than the breakover voltage of tJ1is SCR, it will turn on and tJie inverter will fail.
I This condition can be prevented by placing a free-wheeling rectifier in parallel witJi L.

Many other applications make use of the unique static power handling capabilities
of the SCR. A partial list of some of these applications follows:
Radar and Beacon Modulators Servo Systems
I DC Transformers
Ultrasonic Generators
Pulse Width Modulation of Power
Temperature Controls
Reversing Drives
Transient Voltage Protection Currents
I DC Motor Armature Control

Generator Field Control
AC and DC Static Switching
Squib Firing
Regulated Power Supplies
l gnitron Firing
Latching Relays Lamp Dimmers
l Power Flip-Flops Variable Frequency Inverters

20 µsec Current-Limiting Circuit Breakers Electronic Ignition Systems
The use of SCR's in these and other types of applications is discussed in detail in
I the General Electric "Controlled Rectifier ~lanual" ECG-442, available for $1.00.
I
I
I
I
I
I
I
......__ _ _ _ _ _1_9_._P
_o_ w_ E_R_ s_u_ P E _s_ _ _ _ ____,I
_ P_L_I _ I
The low power requirements and portability of many transistorized circuits make
ope ration from batteries feasible and desirable. However, where heavier load current
requirements and the relatively short life of batteries prohibit their use, DC loads can
I
be operated from 117 volt 60 cycle power systems through use of silicon or germanium
rectifiers. A discussion of several general types of rectiller power supplies follows.
NON- I SOLATED POWER SUPPLIES FOR CLASS A FIXED LOADS

I
For load requirements less than about ¼ ampere, low cost circuits of the type
shown in Figures 19.1 and 19.2 can be used provided the load is fixed and provided
adequate safety precautions arc incorporated to prevent shock hazard due to lack of
I
isolation of the load from the 117 volt line. Both sides of the DC load should be
isolated from possible accidental contact by the user. These circuits utilize series
dropping resistors instead of transformers to reduce the line voltage to the required
level. For this reason, it is essential that these power supplies always be operated with
I
rated load across the output terminals. Absence of this load curre nt, even momentarily,
will apply excessive voltage to the filter capacitors and rectifiers. Thus this type of
power supply is limited to class A loads in which the average load current docs not
I
vary with the amplitude of the input signal.
G-E
I
RI INl692
G·E
I
Iv
117 VAC
INl692
Cl
+
R2 OUTPUT
I
+
OUTPUT OUTPUT* APPROX.

I
RI Cl R2
VOLTAGE V
12 VOLTS
CU RRENT
I MA 4 3K,l/2 W
250i<f
15 VOLT
ELECTROLYTIC
I80K
I/2W
RIPPLE
0.1%
I
12 VOLTS 2 MA 22K, I/2W
25~f
15 OLT
ELECTROLYTIC
250,.f
IOOK
I/2W
0.1•4
I
I80K
I
25 VOLTS 2 MA 18K, l/2W 30 VOLT 0.1%
ELECTROLYTIC l/2W
* TO ADJUST VOLTAGE OUTPUT FOR OTHER OUTPUT CURRENTS,

ADJUST R2.
PRE-AMP POWER SUPPUfS

I
FIGURE 19. 1
I
I G-E
I ~
Cl RI INl692 R2
I ll7VAC
G·E
INl692
C2
+ +
R3 V OUTPUT
I +
I OUTPUT OUTPUT*
VOLTAGEV CURRENT
RI R2 R3
Cl C2
METALLIZED LYTIC
PAPER
C3
200 VOLT ELECTRO· ELECTRO· APPROX.
LYTIC
RIPPLE
I 12 VOLTS 100 MA 2Il

IW
2n
100n 220011 2THREE
2W
IOOO.
IW
- JLf IN
PARALLEL
22000. FOUR
250JLf
15VOLT
250Jtf
15VOLT
250JLf
05%
2506Lf
I
12VOLTS 150MA IW I0W IW 2-,.Lf IN 15V LT 15 VOLT 0.5%
PARALL EL
TWO
25VOLTS 50 MA 2n 2500. IOK 2- JLf IN IOOJLf 250JLf 0.5%
IW 2W IW 50VOLT 30VOLT
PARALLEL
I * TO ADJUST VOLTAGE OUTPUT FOR OTHER OUTPUT CURRENTS, ADJUST R3 .

GENERAL PURPOSE TRANSISTOR POWEil SUPPUES
I FIGU R E 19.2
RC filters reduce the output ripple to very low values as indicated in the charts
in Figures 19.l and 19.2. The use of silicon rectifiers results in high reliability at mini-
I mum cost.
Since one side of the 117 volt line is carried through to the load, reversal of the
I line plug may be necessary in high gain amplifiers to reduce hum. Also, these two
power supplies develop a negative output voltage with respect to the common line
between the AC and the load. To develop a positive output voltage with respect to
this line, it is only necessary to reverse the rectifiers and electrolytic capacitors in the
I circuit.
When a siJicon rectifier feeds a capacity input filter as in Figures 19.1 and 19.2,
it is necessary to limit the high charging current that flows into the input capacitor
I when the circuit is first energized. Otherwise this surge current may destroy the recti-
fier. Resistor Rl is used in these circuits to limit this charging current to safe values.
I ISOL ATED POWER SUPPLI ES WITH T RANSFORMER S T EP-DOWN

Class B loads require a stiffer voltage source than the resistance-capacity combina-
tions of Figures 19.1 and 19.2 can provide. For this and otJ1er types of load that require
I good voltage regulation, the line voltage should be dropped through a transformer
rather Ulan series resistance or capacitance. For loads greater than about one ampere,
choke type filters are also desirable for good regulation.
I Figures 19.3 through 19.5 illustrate the use of a step-down transformer in conjunc-
tion witJ1 a rectifier bridge to secure reasonably stiff well-filtered voltage for class B
audio amplifiers illustrated elsewhere in this mnnual.
POWER SUPPLI ES I
STANCOR
, - - - -.......:.P-..-6469
I
I
ll7VAC Cl-150O/'l ,5O VOLTS
SILICON 8RIOGE-F'OUR- IN1692
I
POWER SUPPLY fOft SEVEN- WATT AMl'Uflflt
FIGURE 19.3
I
I
I
ll7VAC Cl-1500,.f ,5OV
SILICON BRIDGE-FOUR- tN537'S
I
POWER SUPPLY FOft DUAL SEVEN- WATT AMl'UFIER
FIGURE 19.4 I
I
TRIAD
~---- F·61U
,-----"V\/\,.... ---+----...:c-o 50V (NO LOAD)
415V L4A)
47K AMPLIFIER # I
1/zW
Cl 47K
+
1/2 W AMPLIFiER #2
I
.,____ __,.\AAI- - - -- - - ---CI 50V (NO LOAD)
ll5VAC
Cl - 1500 JJf, !50 VOL TS

21l
5W
- 45V (.4A)
I
C2- 1!500 JJI, 50 VOLTS
C3- 1500 JJI , 50 VOLTS
C4- 1500 JJI, 50 VOLTS
SILICON BRIOGE -FOUR- IN537'S
I
POWER SUPPLY fOft DUAL TEN-WATT AMPUF/fll
FIGURE 19 .5 I
REGULATED POWER SUPPLIES
For optimum voltage regulation and ripple reduction, active clements must be
introduced to the power supply. The 12 volt l ampere power supply in Figure 19.6
uses a power transistor as an active clement in series with the load to maintain the
I
output voltage constant. A l watt zener diode is used as the voltage reference. At full
load, the output voltage ripple i5 less than 0.1 %, and voltage regulation from no load
to full load is 2% .
I
202
I
I POWER SUPPLIES
I
I R2
I - 12V TO
PREAMPLIFIER
I
QI - 12V TO
I CRI -
CR2 -
(4) G-E I N91 RECTIFIERS
INl524A ZENER DIODE, 12V, I WATT
POWER AMPLIFIER
QI - 2N277 POWER TRANSISTOR
I Tl
RI
R2
-
-
STANCOR P-6469 117/24 VAC TRANSFORMER
2200, 5WATT RESISTOR
1500, I WATT RESISTOR
Cl - 1000 MFO, 50VOLT ELECTROLYTIC CAPACITOR
I 12 VOlT, 1 AMPERE IIEGUlATED POWEii SUPPLY

FIGURE 19 .6
I Efficiency and cost considerations in regulated pawer suppli1.>s above a few hundred
watts generally dictate active regulating elements that operate in a high speed switch-
ing mode to minimize thermal losses in the active element. A 500 watt pawer supply of
I this type that uses silicon controlled rectifiers as switches is shown in Figure 18.4.
I
I
I
I
I
I
I
_ _ _....JI
.___ _ _2_0_._T_R_A_N_s_1s_T_o_R_s_P_E_c_1_F_1c_A_T_1o_N_s I
H O W T O READ A S P ECI FIC ATI O N S HEET
Semiconductors arc available in n largo variety of different types, each with its own
I
unique characteristics. Al the present time there are over 2200 different types of diodes
and rectifiers and over 750 different types of transistors being manufactured .
The Characteristics of each of thc~e devices ore usually presented in specification
sheets similar to the ones represented on page 205 and page 306 respectively. These
I
specifications, particularly the transistor specification on the next page, contain many
terms and ratings that are probably new to you, so we have selected several of the more
important ones and explained what they mean.
I
N OTES ON TRANS ISTOR SPECIFICAT ION SHEET
Ci) The lend paragraph is a general description of the device and usually contains
I
three specific pieces of information - The kind of transistor, in this case a silicon NP
triode, - A few major application areas, amplifier and switch, - Ceneral sales features,
electrical stability and a standard size hermetically sealed package.
® The Absolute Moximum Rotings are those ratings which should not be exceeded
I
under any circumstances. Exceeding them may cause device failure.
@ The Powe r Dissipotion of a transistor is limited by its junction temperature.
Therefore, the higher the temperature of the air surrounding the transistor (ambient
I
temperature), the less power the device can dissipate. A factor telling how much the
transistor must be deratcd for each degree of incre05e in ambient temperature in de-
grees centigrade is usually given. Notice that this device can dissipate 125mw at 25"C.
I
By applying the given derating factor of lmw for each degree increase in ambient
temperature, we find that tho power dissipation has dropped to 0mw al 150"C, which
is the maximum operating temperature of this device.
@ All of the remaining ratings define what the device is capable of under specified
I
test conditions. These characteristics nre needed by the design engineer to design
matching networks and to calculate exact circuit performance.
@ Curre nt Tronsfe r Rotio is another name for beta. In this case we ore talking about
I
an a-c characteristic, so the symb<,I is h, •. Many specification sheets also IM the d-c
beta using the symbol h,.,. Beta is partially dependent on frequency, so some specifica-
tions list beta for more than one frequency.
I
@ Tl1c Freque ncy Cutoff f.,b of a transistor is defined as thnt frequency at which the
grounded base current gain drops to .707 of the I ke value. It gives a rough indication
or the useful frequency r.mge or the device.
I
{l) The Colle ctor Cutoff Current is the leakngc current from collector to base when
no emitter current is being applied. This leaknge current vr, rics with temperah.irc
changes nnd must be taken into account whenever any semiconductor device is de-
signed into equipment used over a wide rnnge of ambient temperature.
I
@ The Switch ing Characte ristics
given show how the device re-
sponds to nn input pulse under the -~ l!!!!II...!l&B I
;' ..' .
specified driving conditions. These
response times nre very dependent
on the circuit ~ed. The terms used
are explained in the curves at right.
I
I
I
I
...
I
I
I TRANSISTOR SPECIFICATIONS
I The General Electric Types 2N337 and 2N338 are

high-frequency silicon NPN transistors intended
for amplifier applications in the audio and radio
frequency range and for high-speed switching cir-
2N337, 2 N 338
Outline Drawing No. 4
cuits. They are grown junction devices with a
diffused base and are manufactured in the Fixed-Bed Mounting design for extremely
high mechanical reliability under severe conditions of shock, vibration, centrifugal
force, and temperature. For electrical reliability and parameter stability, all transistors
are subjected to a minimum 160 hour 200°C cycled a_ging o_peration included in the
I manufacturing process. These transistors are hermetically sealed in welded cases. The
case dimensions and lead configuration conform to JEDEC standards and are suitable
for insertion in printed boards by automatic assembly equipment'.
I SPECIFICATIONS
@{ ABSOLUTE MAXIMUM RATINGS : , 2s•c 1
I Volto9e
Collector to Base
Emitter to Base
Vcao
Vno
45 volts
1 volt
I @[ Curre nt
Collector
Power
Io 20 ma
I Collector Dissipation•
Te mperoture
Storage
Po
TeTO
125 mw
-65 to200 •c
Operating T& -65 to 150 ·c
I @{ ELECTRICAL CHARACTERISTICS: 125' C)
I Unless otherwise s pecified;
Vea= 20v; le= - 1 mo;
I f = 1 kc )
Smoll-Sl1nal Charocteristlcs
@-c Current Transfer Ratio hu
Min.
19
2M337
Typ.
55
Max. Min.
39
2 N338
Typ,
99
Mox.
Input lm~ance 47
I
h1• 30 80 30 47 80 ohms
Reverse oltage Transfer Ratio h,• 180 2000 200 2000 X 10◄
Output Admittance h ob .1 l .1 l µmho
Hl11h-Fre9uencl Characteristics
@< Co
I Aisha Cutoff Frequen(f
lector Capacitance f = 1 me)
Common Emitter Current Gain
( f = 2.5 me)
r.,.
c ••
hu
10
14
30
1.4
24
3
20
20
45
1.4
26
3
me
Jl,JJ,f
0 -C Choracteristics
I Common Emitter Current Gain

(Vee= Sv; Io= 10 ma )
Collector Breakdown Voltage
(Jcao = SO~; h, = 0)
Emitter Break own Voltage
hn
Vceo
20
45
35 55 45
45
75 150
volts
(IEeo =-SOI'"; lo= 0) V>:oo l l
I pe
volt
Collector Saturation Resistance
= l ma; To,= JO ma~ Rso 75 150 ohms
®f <•••• <••••«••••..,
In = .5 ma; To= 10 ma Rso 75 150 ohms
I @{
Collector Current
\Voa = 20v; IN = 0; T& = 25•C) lceo .002 1 .002 1 /1,l\
Co lector Current
(Vca=20v; IB = 0;T&=l50•C) lcao 100 100 /1,l\
Swltchln1 Chorocterlstlcs
I Rise Time
Stora11e Time
Fall Time
t,
t,
Ir
.02
.02
.04
•Deratc l mw/"C increase in ambient temperature over 25• C
.06
.02
.14
,..secs
jlSCCS
jlSCCS
TRANSISTO R SPEC IFI C ~ I
I
E X PLANATION OF P A R A METE R SYMBO L S
SMALL SIGNAL & HIGH FREQUENCY PARAMETERS (at specified bias )

Symbols Abbreviate d Dofinitions
h ob
h 1•
Com. base - small t ignal output admittance, input AC opcn•circuitl.'d
Com. base - small signal input impedance, output AC short-circuited

I
I
Com. base - smnll signal rev<•rse voltage transfer rntio, input AC opcn•circuitt-d
h t•
hte
Com. base
Com. emitter
f smnll signal forward current transfer ratio,
_ _ __ _ _ _________ output AC short•circult,-d
b ee Com. collector
Examples of other corresponding com. emitter symbols
Com. base t he frequency at which the ma1,'Tlitudc of the small•

I
signal short-circuit forward current transfer ratio is
r.,.
- -------
r,ux
Cob
Com. emitter 0.707 of its low frequency value._____________
Maximum frequency of oscillation
_ _ _ _ _ _ _ _ Collector
_ _ _ _to _ _ _ _ f Capacitance measured across the output tcrminnls
_ bnse
I
Coe Collector to emitter
Base 5preading resistance

with the input AC open-circuited
c. for com. base)

I
c. Com. emitter Power Caln ( use
cc.
NF
Conversion gain
Noise Figure
I
I
I•
tr
Delay time
Rise time
__t_, _______s_to_ ra
_._g_c t ime_ __
!
SWITCHING CHARACTERISTICS (at specified bias )
These dqx-nd on both t ransistor

nnd circmt parameters
I
tr
Ve t: (SAT.)
Fall time
Saturation voltage at speciRcd le and Is. This is defined only with the collector
saturation region (steady state condition).
I
---- ------
Com. emitter - static value of short--circuit Forward current transfer ratio. hr•: =7:
hn
hr,: (inv) Inverted hv1< ( emitter and collector leads switched)

I
UNIJUNCTION TRANSISTOR MEASUREMENTS
I
1 02
Jp
Iv
( MOD) Modulated interbase curre nt
Peak p oint emitt(!.r current
Valley current
I
Reno Jntcrbasc rcsistonoc
I ntt>rbnse voltage
I
Vv
-----
Volley volt,,ge
Intrinsic stand-off ratio. Defined by V1• ='I Voe + 2

~ (in• Kelvin) I
206
I
I TRANSISTOR SPEC I FIC~
DC MEASUREMENTS
I le, lz, 1B
Ven, V,:e
DC currents into collector, emitter, or base terminal
Voltage colk-ctor lo base, ur emitter to base
I V cs
Ve■
Voltage collector to emitter
Voltage base to emitter
Voltage, collector to base junction reverse biased, emitter o1-.en-circuited ( value of
I Ve no
Vc>:o
l e should be SJ}(.-cilled)
Voltage. collector to emitter, a t zero base current, wilh the collector junction
reverse biased. Specify Io.
I V c EO
Voltage, collector to emitter. with base open-circuited. Thi• may he a function of
both "m" (the charge carrier multiplicnt,on foctor) and the htb of the transistor.
SP<-'Cify le.
Similar to Vcr.o except a resistor of value "R" between base and emitter.
I Vess Similar to Vcito but base shorted to emitter.
Reach-throu,th voltage, collector to base voltage at which the collector spa""'

charge layer has widened until it contacts the emitter junction.
I V cce
Vcc11
Vnu
Supply voltage collector to base
Supply voltage collector to emitter
Supply voltage base to emitter
l NOTE - third subscript
may be omitted If no
confusion results.
I lco, Jceo Collector current when collector junction is reverse biased and emitter is DC
open-circuited.
Emitter current when emitter junction is reverse biased and collector iJ DC

open-circuited.
I lcr.o
re...
Collector current with collector junction reverse biased and base open-circuited.
Collector current with collector junction reverse biased and bnse shorted to emitter.
I h:ca
Rsc
Emitter current with emitter junction reverse biased and base shorted to collector.
Collector saturation resistance
I OTHER SYMBOLS USED

Peak collector power dissipat;on for n speci6ed time duration duty cycle and
wave shape.
I Pc
Average continuou., totn.l 1><>wer dissipation.
Average continuous collector power dissipation
I Po
ZI
Power output
Input impedance
Output impedance
I T, Junction Tcmvcrnture
I TaTo Storage Temperature
NOTE: In devices with several electrodes of the same type, indicate electrode by number. Example:
J,.,. In multiple unit devices, indicatedevice by nnmher preceding electrode subscript. Example: II<",
I Where ambiguity might arise, separate complete electrode designations by hyphens or commas. Exam-
ple: V1c>-JC1 ( Voltage between collector #1 of device #1 and collector #1 of device #2.)
NOTE: Reverse biased junction means hiased for current Aow in the high resistance direction.
207
I
GENERAL ELECTRIC
TRANSISTOR SPECIFICATIONS
I
I
The General Electric Type 2N43 Germanium Alloy Junc-
2N43
Outline Drawing No. l
tion Transistor Triode is a PNP
mended for high gain, low power
enclosure is provided by use of
welded seams.
unit particularly recom-
applications. A hermetic
glass-to-metal seals and
I
SPECIFICATIONS
I
ABSOLUTE MAXIMUM RATINGS :
Voltage
Collector to Base
c2s•c,
VeBO -45
I
volts
I
Collector t o Emitter ( RB& S 10 K) V ct;K -30 volts
Emitte r to B:ue - v.,so -5 volts
Cwrrent
Collector lo -300 ma
Power
Total Transistor Dissipation• PT 240 mw
I
Temperature
Storage
O perating Junction
T sro
TJ
-65 to 100
85
•c
•c
I
ELECTRICAL CHARACTERISTICS:
Small Sl11nol Characteristics
c2s·c,
Min.
Design
Center Mox.
I
C Unle ss
othe rwise specifie d; Ve= - Sv
common base; I &= - 1 me1 ;
f = 270 cps. or 1 kc )
Common base output admittance
( input A-C open circuited)
Forward current trans fer ratio
hob .1
42
.8 1.5
66
I
µmhos
( output A-C sbort circuited) hr. 30
Common base in ut impedance
1
( output A-C s ort circuited)
Common base reverse volta;c transfor
ho• 25 29 35 ohms
I
~,£
ratio ( input A-C open cncuited) h,b 1 5 15 X 10- •
Common base output capncity ( input
A-Copen circuited: f = 1 me) c •• 20 40 60
Noise F igure ( f = l Kc; BW = 1 cycle)
Freque ncy cutoff ( Common Bnse)
D-C Chorocterlstlcs
NF
r.,. .5
6
1.3
20
3.5 me
I
Collector cutnlf current (Veno = - 45v)
Emitter cutoff current ( V no = -5v)
Collecto r Saturation Voltage
( le = - 20 ma; la as indicated )
Base input voltage, common emitte r
( Vee= - 1 volt; l e= -20 ma)
l co
l v.o
V{'..:(tlAT)
@ Is =
Vni,
- 65
- 1.3
- 180
-8
-4
-90
-1.3
-230
- 16
- 10
- 130
- 1.3
-280
µamps
µamps
mv
ma
mv
I
Common emitter static forward curre nt
l e =-20 ma
=
trnnsfer ratio ) VcE - 1 voltt
Common emitter stntic forward current
transfer ratio ( Ve& = - 1 volt;
hy,:
hv&
34
30
53
48
65 I
le= - 100 ma)
Collector to emitte r voltn"c ( 10 K ohms
resistor base to emitte r; le= -0.6 ma )
Reach-through Vollngc
Vct:1t
VKT
-30
-30
•Ocrate 4 mw/"C increase in ambient tempcrnture nbovc Z5°C.
volts
volts
I
208
I
I ~NSISTOR SPECIFICATIONS
I The 2 43A is identical to the 2N43 except that h,. is guar-

anteed to be between 30 and 66. It is therefore electrically
identical to the USAF 2N43A.
2N43A
I Per MIL-T-19500/18 USAF 2N43A

I Outline Drawing No, l
I The General Electric Type 2N44 Germanium Alloy Junc-

tion Transistor Triode is a PNP unit particularly recom-
mended for medium gain, low power applications. A her-
metic enclosure is provided by use of glass-to-metal seals
2N44
Outline Dmwing No. l
I and welded seams.
SPECIFICAT ION S
I ABSOLUTE MAXIMUM RATINGS : 12S"C)

Voltage
Collector to Bllsc Vf·no - 45 volts
Collector to Emitter ( RR& ;a 10 K) Ve-KR -30 volts
I Emitter to Base
Current
Collector
VERO
lo
- 5
-300
volts
ma
I Power
Total Transistor Dissipation•
Te mperature
PT 240 ,nw
I Storage
Operating Junction
ELECTRICAL CHARACTERISTICS : 12S"C )

T STO
T,
Design
-65 to 100
85
·c
·c
$moll Sl11nol Cho rocte ristics
I
Min. Ce nter Mox,
( Unless othe rwise specifie d; V<, = - Sv
common bose; h: = - 1 mo;
f = 270 cps. or 1 k c)
Common base output admittance
( input A·C open circuited) h o• .1 .9 1.5 µmhos
I Fonvard currC"nt transfer ratio

( output A-C short circuited)
Common base in~ut impedance
( output A-C s ort circuited)
Common base reverse voltage, trans£cr
hto
ho• 27
25
31 38 ohms
ratio ( input A-C open circuited) hr, 1.0 4 13 X 10""
I Common ba,e output capacity ( input

A-Copen circuited· f = I me)
Noise Figure ( f = 1 Kc; BW = 1 cycle)
Frequency cutoff
c••
NF
r.,.
20
.5
40
1.0
6
60
15
3.0
~~
me
D-C Cho rocterlst lcs
I Coll<'Clor cutoff current (Veno = -45v)

Emitter cutoff current (V£RO = -5v)
Collector Saturation Voltage
(k = -20 ma; )t, as indicated)
lco
IF.O
Vc·&<~•T>
lfi) le =
-55
-2
-8
-4
-90
- 2
- 16
-10
-130
-2
µamps
µamps
mv
ma
Base input voltage, common emitter Ve,: -200 -250 -300 mv
I Common cmittc.r static forward current

transfer ratio ~Ve.,= -1 volt;
le =-20 ma
Common emitter static forward current
transfer ratio (Vea,= -1 volt;
hr,, 18 31 43
lo::: - 100 ma) hn 13 25
I Collector to emitter voltage ( 10 K ohms

resistor base to emitter; l e= -0.6 ma)
Reach-through Voltage
V('r,R
V11T
-30
-30
•Derate 4 mw/"C increase in ambic11t temperature above 25°C.
volts
volts
209
T R A N S I ST O R SPE~TIONS I
USAF 2N44A
Outline Drawing No. I
Per MIL-T-19500/ 6
I
The General Electric 2 78 is a rate grown NPN high fre-
I
2N78 quency transistor intended for high gain RF and IF ampli-
fier service and general purpose applications. The exclusive
C-E rate-g~owing process used in the manufacture of the
2N78 enhances the stable and unifonn characteristics re-
I
quired for military and industrial service. The 2N78's low collector cutoff current and
controlled D-C Beta simplifies bias stabilization. In order to achieve the high degree of
reliability necessary in industrial and military applications, the 2N78 is designed to
pass 500G l millisecond drop shock, 10,000C centrifuge, lOC of vibration fatigue and
lOC variable frequency vibration, as well as temperature cycling, moisture resistance,
I
and operating and storage life tests as outlined in MIL-S-19500B.
SPECIFICATIONS
I
ABSOLUTE MAXIMUM RATINGS: us· c >
Voltage
Collector to Emitter ( base open)
Collector to Base ( emitter open)
V,:,go
Vcso
15
15
5
volu
volts
volts
I
Emitter to Base V,:RO
Curre nt
Co>lector
Emitter
le
h,
20
-20
ma
ma
I
Power
Collector Dissipation•
Tempe rature
Pc
T •TO
65
85
mw
·c
I
Storai:e
ELECTRICAL CHARACTERISTICS: 12s· c 1

Low Fre9uencl Characteristics ( Common BoH l
(Vea a: Sv; 1£ a: --1 mo; f =
270 cps ) Min. Nam. Mex.
I
<See Hote l
Input l mj.edance ~utput sh ort circuited)
Voltage eedback allo
( input short circuited )
Cu1Tent Am~lillcation
( output s ort circuited)·
h i•
h,•
h tb
25
.8
.97
55
2
.983
82
10
.995
ohms
X 10... I
Output Admittance ( input open circulted) hob .1 .2 .7 p.mhos
Hlph Fre9uency Characte ristics I Common Bose )

( Vea::: Sv; h: =
Alpha Cutoff Frequency
I mo )
fhth 5 9 r.ic
I
Output Capacity ( r= J me) c •• 3 6
~lo--
I
Voltage Feedback Ratio (f = l me) h,h 14
Noise Figure db
(Vc11 = l.5v.;. 1£ ::: -0.5 ma: r = 1 kc) NF 12
Power Cain In J ypical IF Test Circuit
( 455 Ice) c. 29 31 34 db
o.c Chorocte rlst lcs

==5v)
Collector Cutoff CurTent ( V ca
Emitter Cutoff Current ( \ 1,is
D -C Base Current Cain
( le a: 1 ma; Ve£ = l v)
15v)
45
.7
.6
70
3
5
135
p.a
ltll I
Typical Operotlon !Common Emitter )
( Ve ■ = Sv; IE = I mo )
Input Frequency
Input Impedance (resis tive)
IF Amp.
262
300
IF Amp. RF Amp.
455
350
1600
700
7
kc
ohms
Kohms
I
Output Impedance ( resistive) 30 15
Matched Power Gain 37 30 23 db
Noti,: The Low Frequency Characteristics a,e design limits within which 911% of production
nonnnlly folls.
•Derate 1.1 mw/"C increase in ambient temperature.
I
210
I
I The General Electric 2 78A is a rate grown NPN high

frequency transistor intended for hjgh gain RF and lF
ampli6er service and general purpose applications. The
exclusive C .E. rate-growing process used in the manu-
2 N 7 SA
facture of the 2N78A enhances the stable and uniform
I characteristics required for n,jlitary and industry service. The 2N78A's low collector
cutoff current and controlled D-C Beta simplifies bias stabilization. In order to achieve
the high degree of reliability necessary in industrial and military applications, the
2N78A is designed to pass SOOC 1 millisecond drop shock, 10,000C centrifuge, lOC of
I vibration fatigue and l0G variable frequency vibration, as well as temperature cycling,
moisture resistance, and operating and storage life tests as outlined in i\lIL-S-19500B.
SPECIFICATIONS
I ABSOLUTE MAXIMUM RATINGS:

Voltage
Collector to Emitter ( base open )
12s•c,
Vcco
Veno
20
20
volts
volts
Vzeo 5 volts
I
Emitter to Base
Curre nt
Collector Io 20 ma
Emitter Ia - 20 ma
Power
I Collector Dissipation•
Temperature
Storage
Pc
T s'l'o
65
85
mw
•c
ELECTRICAL CHARACTERISTICS : 12s•c 1 unless otherwise specified
I D-C Chorocterlstlc1
Colle<:tor Cutoff Current
(Ven= 15v· TA = 25•C)
Collector Cutoff Cunent
lco
Min. Typ.
.7
Mox.
3
'""
( VcB = 15v; TA = 11•c) ! co 15 39 p.a
I £mille r Cutoff Current ( V&n = 5v )

D-C Base Current Gain
(le= 1 ma; Yes= lv )
Collector to Emitter Volta~e
( Base open lo = .3 ma
l co
hn
Vceo
45
20
.6
70
5
135
/1,l\
volts
I Low Frequency Characte ristics (Common Bose )
ISee Note)
=
(Ven = Sv; h : - 1 mo; f =
270 cps )
Input lmpcdnnce (Output shnrt circuited) h1•
Voltage Feedback Ratio
25 55 82 ohms
( Input open circuited ) hro .8 2 10 X 10.,
I Current Amplification
( Output ,hort circuited) hr•
Output Admittance ( Input open circuited ) h ob
.97
.1
.983
.2
.995
.7 p.mhos
,...
High Frequency Characteristics ( Common Bose)
IVcs = Sv; Ir. =- 1 mo )
I Alpha Cutoff Fr~UCDC)I

Output Capacity ( f = l me)
Voltage Feedback Ratio ( f = 1 me)
Noise Figure
(Vra = l.5v· lg = - 0.5 ma; f =l kc )
Cob
hrb
NF
5 9
3
12
6
14
mo
p.p.f
X 10-1
db
I P ower Cain in l'ypical IF Test Circuit

( 455 kc )
Typical Operation ( Common Emitter )
IVcc = Sv; IB = 1 mo)
c.
If Amp.
29 31
IF Amp.
34
RF Amp.
db
ko
Input Frequency 262 455 1600
I Input Impedance (resistive)

Output Impedance ( resistive)
Matched Power Gain
300
30
37
350
15
31
700
Note: The Low Frequency Characteristics are design limits within which 98% of
7
23
ohms
K ohms
db
production oonnally foils.
I •Dcrate 1.1 mw /°C increase in amhicnt te mperature.
I Certified to meet MIL-S-19500/90 2N78A

211
TRAN SISTOR SPECI F I CATIONS I
2N107
The General Electric type 2Nl07 is an alloy junction
PNP transistor particularly suggested for students, ex-
perimenters, hobbyists, and hams. It is available only from
franchised General Electric distributors. The 2Nl07 is
I
Outline Drawins No. 1 hermetically sealed and will dissipate 50 milliwatts in
25°C free air.
SPECIFICATIONS
I
ABSOLUTE MAXIMUM RATINGS:
Voltage
Collector ( referred to base)
12s•c1
Ve& -12 volts
I
C11rre nt
Collector
Emitter
T1mpe rot11re
lo
Ia
T1
- 10
10
60
ma
ma
•c
I
Junction
TYPICAL ELECTRICAL CHARACTERISTICS :
ICommon BaH, f - 270 Cl!S
Vee= - Sv, la= 1 ma )
Collector Voltage
12s•c>
Vea -5.0 volts

I
Emitter Current ho 1.0 ma
Oul})ut Admittance ( Input open circuit)
Current A:f.U6catio n ( ou'S,ut short circuit)
lnsut 1ml. ance c.:u:e,ut S Ort circuit)
Vo tage eedback a o ( input open circuit)
Collector Cutoff Current
hob
hrb
h1b
h,b
Ico
1.0
-.95
32
3
10
1t1nhos
ohms
X 104
Jl&
I
40 Jlpl
I
Output Capacitance Cob
Frequency Cutoff fhtb 0.6 me
Common Emitter (Vea= -5v, Ia - 1 ma)

Base Current Cain bro 20
2N123
The General Electric Type 2Nl23 is a PNP alloy junction
high frequency switching transistor intended for military,
I
industrial and data processing applications where high reli-
ability at the maximum ratings is of prime importance.
( Not recommended for new designs, use 2N396A) I
SPECIFICATIONS
Voltage
Collector to Emitter
Collector to Base
12s•c ,
Veco
Veno
-15
-20
volts
volts
I
Vr.no -10 volts
I
Emitter to Base
C11rrent
Collector Io -125 ma
Peak Collector ( 10 /lS max.) Jew -500 ma
Emitter Is 12S ma
Power
Penk Collector Dwipation
( 50 l'sec 20% Duty Cycle)•
Total 1 ransistor Di.ss1pallon • • ~~
500
150
mw
mw
I
Tempuatu re
Storage
Operating Junction Temperature
ELECTRICAL CHARACTERISTICS: ,2s•c>
T STO
T,
-55 to 85
8S
·c
·c I
D- C Characte ristics
Common Emitter Current Cain
(Vc11 = -lv; lo= - 10 ma)
Common Emitter Current Cain
(Vxc = - lv; ls = -10 ma)
Saturation Voltaite
hn
hraUNV>
Min.
30
Typ.
75
17
Mox.
150
I
( le = -.5 ma· le= - 10 ma) Vc 8 tBAT> -.15 -.2 volts
i
Collector Cutoff Current Vceo = -20v)
Emitter Cutoff Current ( £BO = -l0v)
Collector to Emitter Voltage
( le= -600 t"l
Reach-through o tage
keo
lzeo
Ve&o
VRT
-15
-20
-2
-2
-25
-3S
-6
-6 """"
volts
volts
I
I
I T R A NSISTO R SPECIFI CATI O N S
I High Freque ncy Chorocte rlstlcs (Common Basel

(Vee= - Sv; la= I ma )
Alphn Cutoff Frequency (Inverse)
Collector Capacity ( f = =
1 me)
hr•
h,tb(INV)
c••
5 8
12 20
me
p.p.f
Voltage F eedback Ratio ( f 1 me) h,o 9 X 104
I Base Spreading Resistance r'o
Low Freque ncy Chorocterlstics (Common Basel

(Vee= - 5v; h, = 1 mo ; f = 270 c ps )
90 150 ohms
lnput lmoedance h1, 3000 ohm•
I Voltage Feedback Ratio

Forward Current Transfer Ratio
Output Admittance
Switching Chorocte ristlcs
h,.
hr.
hot
6.0
90
65
X IO-<
p.mho
Clo= - 10 ma; ta,= Is•= I mo )
I Delay Time
Rise Time
Storage Time
Fllll Time
Id
t,
t.
It
.18
.45
.90
.35
/J,$e0
//,$CC
/J,$e0
p.sec
•Derate 8 mw/'C increase in ambient temperature above 25•C.
I ttDerate 2.5 mw/' C increase in ambient temperature above 25' C.
I Per MIL-T-19500/30 USAF 2N123
I Outline Drawing No. 7
I The General Electric types 2N135, 2Nl36 and

2Nl37 are PNP allo)'_ junction germanium tran-
sistors intended for RF and IF service in broadcast
2N135, 2N136.
receivers. Special control of manufacturing proc- 2N137
I esses provides a narrow spread of characteristics,
resulting in uniformly high power gain at radio
frequencies. These types are obsolete and avail-
able for replacement only.
I ABSOLUTE MAXIMUM RAT INGS : <25°Cl

SPECIFICATIONS
2 N 135 2N136 2N137
I Voltage
Collector to Emitter \ Rei,
Collector to Emitter ReB
=
= 100 ohms)
1 megohm)
Vcso
Vc si,
VC&ll
-20
- 20
-12
-20
- 20
-12
-10
-10
- 6
volts
volts
volts
I Current
Collector
Emitter
Powe r
Jc
ls
-50
50
- 50
50
- 50
50
ma
ma
I Collector Di$$ipation
Te mperature
Storage
Po
Tno
100
85
100
85
100
85
mw
·c
I ELECTRICAL CHA RACTERISTICS: Design Ce nter Va lue s

(Common Base, 25' C, Vee= 5v, Ir.= 1 mo )
ou:,:ut Capacitance ( f = 1 me)
h,b
c••
7
14
7
14
7
14
X 10-a
p.p.£
Alp a Cutoff Fr~uenw f•r• 4.5 6.5 10 me
I Mmimum Alpha uto Frequency

Collector Cutoff Cunent
(Vr o = 6v, Emitter open)
Base Current Am_pli6cation
(Common Emitter, f = 270 cps)
r...
Ico
htt
3
5
20
5
40
5 7
5
60
me min
p.a min
TRANSISTOR SPECIFICATIONS I
2N167
Outline Oro.wing No. 3
The General Electric Type 2Nl67 is an NPN germanium
high frequency, high speed switching transistor intended
for industrial and military applications where reliability is
of prime importance. In order to achieve the high degree of
I
reliability necessary in industrial and military applications,
the 2Nl67 is designed to pass 500G l millisecond drop shock, 10,000G centrifuge,
lOC of vibration fatigue and lOG variable frequency vibration, as well as temperature
cycling, moisture resistance, and operating and storage life tests as outlined in
I
MIL-T-19500A.
SPECIFICATIONS
I
ABSOLUTE MAXIMUM RATIMGS :
Voltoge
Collector to Base
us·c ,
Vt.. Bo 30 volts
I
I
Collector to Emitter Vr so 30 volts
Emitter to Base V,:HO 5 volts
Curre nt
Collector le 75 ma
Emitter
Power
Collector Dissipation ( 25•c) •
'"
Pc
-75
65
ma
mw
I
75 mw
Total Transistor Dluipation ( 25•c) ••
Tempe roture
Storage
PT
TaTo 85 ·c
I
0 -C Choroctulstlcs
Forward Current Transfer Ratlo
12s·c1
Min. Typ. Max. I
17 30 95
(Io= 8 ma; Vc11 = lv)
Base ln,put Voltage
(Ia = .47 ma; Io= 8 ma)
hrs
Va£ .3••· .41 .6•••volts I

(Base Open; le= .3 ma) Ve~ 30 volts
Saturation Voltage (In= .8 ma; le= 8 ma)
Cutoff Chorocte rlstlcs

Collector Current (I£= O; Vee= 15v)
Vcs<BAT> .35
.6 1.5
volts
I
=
l oo
.35 5 ""
p.a
I
Emitter Current (le= O; Vn 5v) h;o
Hig h Freque ncy Chorocte rlstlcs (Common Bose)
(Vee= Sv; l a= 1 mo )
Alpha Cutoff Frequency f.rb 5.0 9.0 me
Collector Capacity ( f = 1 me)
Low Freque ncy Choroctuis tlcs I Common Bose I
Co•
hr•
2.5
7.3
6 JJ,JJ,f
X 10-a
I
IVce =
5v; 111 = - 1 mo; f =
270 c ps )
Forward Current Trans£er Ratio
Output Admittance
Input Impedance
Reverse Voltage Transfer Ratio
hr•
hob
ht•
hr•
.952
.l •••
25 , ..
.985
.2
55
1.5
.995•..
.7 .. • µmhos
82•••ohms
X 10...
I
Switching Chorocte rlstlcs
lie = 8 mo; In,= .8 mo; h, = .8 mo )
Tum--on Time
Storage Time
to
t.
.4
.7
p.sec
p.sec
I
I
Fall Time tr .2 µsec
•Dernte 1.1 mw/"C increase in ambient ten,perature.
..Derate 1.25 mw/•C increase in ambient temperature.
•••These limits are design limits within which 98 % of production normally fall.
I
I TRANSISTOR SPECIFICATI ONS
The General Electric Type 2Nl67A is an isolated case,

I NPN germanium high frequency, high speed switching
transistor intended for industrial and military applica-
tions where reliability is of prime importance. In order
2N167A
lo achie ve the high degree of reliability necessary in
I industrial and military applications, the 2N167A is designed to pass 500G l millisecond
drop shock, 10,000G centrifuge, l0G of vibration fatigue and lOG variable frequency
vibration, as well as temperature cycling, moisture resistance, and operating and
storage life tests as outlined in MIL-S-19500B. The 2Nl67A is available to MIL-S-
19500/ 11 specification as USAF 2Nl67A.
I SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS: c2s•c ,
I Voltage
Collector to Base
Emitter to Base
Ve no
Vc Eo
Vr.eo
30
30
5
volts
volts
volt•
I
Current
Collector Ir 75 ma
Emitter Is - 75 ma
Power
Collector Dissipa tion ( zs•C )• Po 65 mw
Total Transistor Dissipatio n ( 25•C) .. PT
I
75 mw
Temperoture
Storage Tno 85 ·c
ELECTRICAL CHARACTERISTICS: ( 25' C) unless otherwise specified
I 0 -C Chorocte rlstlcs
Forward Curre nt T ransfer Ratio
( l e= 8 ma· Vc E = lv)
Base Input Voftagc
( IR = .47 ma ; le = 8 ma )
hn
Min.
17
Typ.
30
Mox.
90
Vs11 .3••· .41 .6••• volts
I
Collecto r to Emitter Voltage
( Base ope n; Io = .3 ma ) Vcs 30 volts
Saturation Volta11e
( In = .8 ma; le = 8 ma ) V c z UlAT) .35 volts
Cutoff Chara cteristics
I Collector Curre nt
( I,,, = O· Ved =
Collector Current
( l>J = O; Vee =
Emitter Current
15v; T .. = 25. C)
15v; TA = 71•C )
! co
! co
.6
11
1.5
29
JI.&
JI.&
( le= 0; VEe = 5v; TA = 25' C ) h :o .4 1.5 JI.&
I Emitter Current
( l e= 0 ; Vu = 5v; TA = 7l ' C)
Hig h Frequency Chorocte ristlcs (Common Bose)
=
<Vc B Sv; Is = 1 mo )
lEO 8 /1-4
Alpha Cutoff Frequency r.,. 5.0 9.0 me
I Collecto r Capacity ( f = 1 me )
Voltage Feedbnck Ratio ( £ = 1 me )
Low Frequency Chorocteristlcs (Common Bose )
(Ve n = 5v; IE = - 1 mo; f = 270 cps)
c ••
h,b
2.5
7.3
6 JI.JU
X 10""
Forward Curre nt Transfer Ratio
I
hr• .952 .985 .995••·
Output Admittance h oh .1 • •· .2 .7 ••· JL.fflhOS
Input lm!>edance ht• 2s••• 55 82••• ohmJ
Reverse Voltage Transfer Ratio h, b 1.5 X 10...
Switching Chorocterlstlcs
=
I
Uc 8 mo; l a, = .8 mo; l as = . 8 mo )
Turn-o n Time to .4 µsec
Stora ~e Time t, .7 /LSCC
Fall T imo tr .2 µsec
• Dernte l. I mw/°C Increase in ambient te mpe rature.
I ..Dcrate 1.25 mw/"C increase in ambient te mpe rature.

• ••These limits arc design limits within which 98% or productio n normally fall.
I Per MIL-S-19500/ llA USAF 2N167A

215
TRAN81STO R 8PECIFICAT ION8 I
The 2Nl68A is a rnte-grown NPN germanium transistor
2N168 A
Outline On.wins No. 3
intended for mixer/oscillator and IF ampliGer applications
in radio receivers. Special manufactur ing techniques pro-
I
vide a low value and a narrow spread in collector capacity
so that neutralization in many circuits is not required. The
2Nl68A has a frequency cutoff control to provide proper operation as an oscillator or
autodyne mixer. For IF amplifier service the range in power gain in controlled to 3 db.
I
This type is obsolete and is not recommended for new designs. For new designs we
recommend type 2Nl086.
I
CONVERTER TRANSISTOR SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS: ( 2S'C )
Volto1e
I
15 volts
Collector to Emitter (Rn= lOK )
Curre nt
Ve■■
Veno 15 volts
I
-20 ma
Collector
Power
lo
Po 65 mw
I
Collector Dissipation at 25'C•
Temporoture
~ratin11 and Stora11e T .., T■TO - SS to 85 ·c I
TYPICAL ELECTRICAL CHARACTERISTICS: llS' CI
Converter Service
I
Moxlmum Rotlnt•
Collector Suppiy Volta1e
Dotlpn Center Cllaractorlttl ct

12 voltt
I
Input Impedance (I■ = 1 ma; Vo■ = 5v; f = 455 KC/ z,
400 ohms
Output Impedance (I■ = 1 mo; Ve■ = 5v; f = 455 KC)Z.
Voltage Feedback RatJo
(Ia = l ma; Ve■ = 5v; f = 1 me) hr•
12
5
K ohms
X 10-a
I
Collector to Bue Capacitance
2.4 ,,.,.r
(Ia = l ma; Vea = 5v; f = l me)
Frequency Cutoff ( I■ = 1 ma; Vea= 5v)
Minimum Frequ"ncy Cutolf ( I■ = 1 ma; Ve■ = 5v)
Current Calo ( 111 = 20µ; Ve■ = 1v)
Co•
f•r•
r.,.
hr■
5
40
8 mo
mcmin I
hr■ 23
Minimum Bue Current Cain
Maximum Base Current Cain
Conve rsion Goin

hr■
cc.
135
l?.5 db
I
IF Amplifie r Pe rformonce
Collector Supply Volta11e
Collector Current
Input Frequency
Vco
Jc
r
5
1
455
volts
ma
KC
I
Available Power Caln c. 39 db
Mfaimum Power Caln In typical IF circuit
Power Cnin Range or Variation In typical IF circuit
c.
C,
28
3
dbmio
db
I
Cutoff Clloroc-terlstlc s
,..
Collector Cutoff Current ( Ve, = Sv)
Collector Cutoff Current ( VCB = 15v)
l co
l co
•Dcrate 1.1 mw/'C increase in ambient temperature over 25'C.
.5
5 p.amu
I
216
I
I T R A N S I STOR S P ECIFICATION S
I The General Electric Type 2Nl 69 transistor is a rate-grown

NPN germanium device, intended for use as an IF amplifier
in broadcast radio receivers. The collector capacity is con-
trolled to a uniformly low value so that neutralization in
2N169
I most circuits is not required. Power gain at 455KC in a

typical receiver circuit is restricted to a 2.5db spread. The uniformity provided by the
controls of collector capacity and power gain allows easy and economical incorporation
of this type into receiver circuits. The 2Nl69 has special high beta characteristics
I required in the final stage of reflex IF circuits where large audio gain is desired.

IF TRANSISTOR SPECIFICATIONS
(2s•c•
I Voltoge
Collector to Emitter (Rn= !OX)
Collector to Base ( emJtter open)
Vc&a
Vo110
15
15
volts
volts
I Curre nt
Collector lo -2C ma
I Power
Collector Dissipation at 25•co Po 65 mw
Te mpe rature
I Operating and Storage
ELECTRICA L CHA R.A CTERISTICS:U ( 2s•c 1

T •• TITO -55 to 85 ·c
I Re flex IF A mpllfle r Service
Maximum Ra tings
Collector Supply Voltage Vco 9 volts
I Design Ce nte r Characte ristics

( I& = 1 ma; Ver; = 5v; f = 455 KC except as noted)
Input Impedance z,
I
700 ohm,
Output Impedance Zo 7 K ohms
Voltage Feedback Ratio (Vc11 =
5v; f = 1 me) h,• 10 X 10· •
Collector to Base Capacitance ( VOB = 5v; f = 1 me) Cob 2.4 /l/lf
Frequency Cutoff (Vee= Sv) r.,. 8 me
I Base Current Cain ( le = 1 ma; Ve■ = lv)

Minimum Base Current Cain
hn
hrs
72
32
Re tie• IF Amplifier Performa nce
I Collector Supply Voltage

Collector Current
Jnput Frequency
Minimum Power Cain in Typical lF Circuit
Vee
le
f
c.
5
2
455
27
volts
ma
KC
db
c,
I Power Cain Range of Variation in Typical IF Circuit
Cutoff Characteristics
Collector Cutoff Current ( Vea = 5v)
2.5 db
,,.
loo .5
=
I Collector Cutoff Current ( V OB 15v) loo
••All values are typical unless indJeated as a min. or max.
5 ,,amu
217
The General Electric type 2Nl69A is a rate-grown NPN
2N169A
f
ermanium transistor recommeuded for high gain RF and
F amplifier service and general purpose industrial applica-
tions where high beta, high voltag~ low collector capacity
I
and extremely low collector cutott current are of prime
importance.
SPECIFICATIONS I
ABSOLUTE MAXIMUM RATINGS : 12s• c 1
Voltage
Collector to Bose
Collector to EmJtter
Emitter to Base
Current
Vc•so
VrRo
VY.no
25
25
5
volts
volts
volts
I
-20 ma
Collector
Power
Temperature
Storage
le
Pc
TsTo
65
-55 to 85
mw
·c
I
-55 to 85 ·c
I
Operating Junction T,
tLECTRICAL CHARACTERISTICS : 12s•c 1
DC Choroctulstics Desigr,
Mir,. Center Max.
(Ra■ = 10 ~ lo= .3 ma) Vrca 25
I
Reach-through oltage VRT 25
Forwa,d Cunent Transfer Ratio
( lc= lma·Ves=lvi hn 34 72 200
Base Input Voltage ~le= ma; Ve,: = lv ) Vs,: .l•• .14 .2••
j
Saturation Voltage B = .5; l e = 5 ma ) Vc,:<UT> .13•• .23 .4••
Collector Current j ,:
= 0: Vcs = 15v) lco .9 5 11-•
I
Emitter Current ( c = O; Yxs = 5v) J,:o .9 11-a
Low Fregue ncl Choracterlstlcs
IVc E = Sv; 111 = 1 ma; f = 270 cps)
Forward Current Transfer Ratio hr• 50
Output Admittance h ob .2 µ.mhos
55 ohms
I
Input tm.s,edance h,o
Reverse oltage Transfer Ratio h,b 2 X l0- •
Hith Fregue ncl Characte rl,tlcs
t Vc11 = 5v; h; = 1 ma ; f = 455 KC )
Base Spreadinit Resistance r'• 250 ohms
2.4 11-µ.(
I
Output Capacity Cob
F orward Current Transfer Ratio hr• 30
Output Admittance ho• 140 µ.mhos
Input lm~ance h,. 700 ohms
Reverse oltaite Transfer Ratio h,• 10 X IO-•
Noise Figure ( Bw = 1 cycle)
I
( f= l KC; Vea= 1.5v; It: = -0.5 ma) db
( Common Emitter) NF 12
Powt'r Gain ( Typical IF Test Circuit) c. 27 28
39
db
db
Available Power Cain G.
Cutoff Frequency fhfb 9 me
•Derate 1.1 mwr c increase in ambient tem~raturc.
• •These limits are design limits within which 8% of production normally falls.
I
2 N 17 Q
The 2 170 is a rate grown NPN germanium transistor in-
tended for use in high frequency circuits by amateurs,
hobbyists, and experimenters. The 2Nl70 can be used in
I
Outline Drawing No. 3 any of the many published circuits where a low voltage,
high frequency transistor is necessary such as for re-
generative receivers, high frequency oscillators, etc. If you desire to use the 2N 170
, P I transistor in a circuit showing a P P type transistor, it is only necessary to
change the connections to the power supply.
I
SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS: 125•c 1
Voltage
Coll,-ctor to Emitter ( Rs&
Current
= !OK) 9 volts I
Coll,>ctor 20 ma
Pow• r
Temporaturo
Op~rating and Storage
Pc
- 551085
25 mw
I
218
I
I TR A NSI S T O ~ F I C A TI ONJI
I TYPICAL ELECTRICAL CHA RACTERISTICS : c2s•c 1

High Freq uency Characteristics
( I£ =1 ma; Ve■ = 5v; f = 455 KC except as noted )
Input Impednnce (Common Emitter)
Output lmpednnce (Common Emitter )
z,
Zo
800
15
ohms
Kohms
Collector to Base Capacitance ( f =
1 me) c .. 2.4 µ.p.E
I Frequency Cutoff (Ven =

5v)
Powe r Caln ( Common Emltter)
Low Frequency Characteristics
<I s = 1 mo; Ve s = Sv; f = 270 cps )
Input Impedance
r.,.
c. 4
22
55
me
db
ohms
I Volta1te F eedback Ratio

Current Caln
Output Admittance
Common Emitter Base Current Gain
Cutoff Characte ristics
4
.95
.5
20
X 10-<
X 10➔ µ.mhos
=
I
Collector Cutoff Current ( V ca Sv) lco 3 µ.a max
•De ra.te 1 mw/•C increase in ambient temperature.
The 2Nl86A, 2Nl87A, and 2Nl88A are medium
I power PNP transistors intended for use as audio

output amplillers in radio receivers and quality
sound systems. By unique process controls the
current gain is maintained at an essentiaUy con-
2N186A. 2N187A
2N188A
I stant value for collector currents from 1 ma to

200 ma. This linearity of c urrent gain provides
low distortion in both Class A and Class B circuits, and permits the use of any two
transistors from a particular type without matching in Class B Circuits. These types
may be substituted for Types 2Nl86, 2Nl87, 2N188 respectively.
I ABSOLUTE MAXIMUM RATINGS : c25•c )
SPECIFICATIONS
Voltage
I Collector to Base ( emitte r o_pen)

Collector to Emitter (R8K ;:a 10 K)
Emitte r to Base ( collector open)
Current
Collector
Veno
V r cR
VEBo
-25
- 25
-5
- 200
volt•
volts
volts
ma
I
Power
Collector Dissipation• Po 200 mw
Temperatu re
Operating T• - 55 to 75 ·c
Storage T gro - 5Sto85 ·c
TYPICAL ELECTRICAL CHARACTERISTICS: (25•c 1
I Closs 8 Audio AmpUfler Operation

( Values for two transistors. Note that match ing
is not require d ta hold dis tortion to less than
5% for any two transistors from a type I
2 N1 86A. 2N187A 2N188A.
Maximum Closs B Ratings (Common Emitter)
I Colle<:tor Supply Voltn~e

Powe r Output ( Distortion less than 5 % )
Design Ce nte r Characteristics
Input Impedance ( large signal base to base)
Vee
Po
-12
750
- 12
750
- 12
750
vo)u
mw
CO. I" = 100 ma ) h1o 1200 2000 2600 ohm•
I Base Current Cain

( VrE =- Iv; le = -20 ma)
Base Curr~nt Gain
( Ve£= - lv; le= - 100 ma )
Collector Cnpncity
hvE
h...-,
19-31
24
25-42
36
34-65
54
( Vr a = - 5v; I&= - 1 ma; r = 1 me ) Co• 40 40 40 µ.µ E
I Frequency CutolJ(V<·B= -5v; hc= - 1 ma)

Class 8 Circuit Performance ( Common Emitter)
Collector Voltage
Minimum P ower Gnin
f•••
Vrr -12
.8 1.0
- 12
1.2
-12
me
volts
at 100 mw power output C. 24 26 28 min db
I Closs A Audio Amplifier Ope ration ( Common Emitter )

( Vee= 12v; 111 =10 ma i
Power Gain ~t SO mw power output
Cuto ff Characteristics
Co 34 36 38 db
Maximum Collector Cutoff Current

=
I ( V,·ao -2Sv)
Maximum Emitter,CutolJ Cunent
( VKBO : -5v)
lco
lco
- 16
-10
- 16
- 10
•Derato 4.0 mw/•C increase in ambient t emperature above 2s•c.
- 16
-10
muµ.a
maxµa
TRANSISTOR S PECIFIC ATI O N S I
The 2Nl89, 2Nl90, 2Nl 91, and 2Nl92 are alloy
2N189, 2N190.
2N191, 2N192
junction PNP transistors intended for service in
transistorized audio ampUGe.rs. By control of
transistor characteristics during manufacture, a
I
specific power gain is provided for each type.
Special processing techniques and the use of
hermetic seals provides stability of these char-
acteristics throughout Ufe.
I
ABSOLUTE MAXIMUM RATINGS : c25•c 1
Volto1•
Collector to Emitter ( Ru ~ 10 K)
SPECIFICATIONS
Ven -25 volts

I
Current
Collector
Power
Collector D issipation ( 25"C) •
Te mperoture
Pc
-50 ma
75 mw
I
-55 to 60 ·c
I
Operating T,
Storage T l'to -55 to 85 •c
TYPICAL ELECTRICAL CHARACTERISTICS: f25"Cl
Audio Driver CloH A Of!rotlon 2N189 2 N190 2N191 2N192
I VoluH for one transistor drlvln9 a transformer
coupled output Jto9e l
Moxlmum Closs A Rotln1s (Common Emitter)
Collector Supply Voltage
Desl1n Center Characteristics
Vee - 12 - 12 -12 - 12 volts I
Current Cain (Ve11 = - lv; Io= -20 ma) hn 25-42 34-65 50-125 70-176
Collector Ccr.acir'vcB=~v; b = -1 mn) c ••
Frequency uto ( CB= -5v; ho = - 1 ma) f.,.
Noise Fl~re ( Vee = -5v; Ii,= -1 ma;
f= l C; BW = l cycle)
Audio Circuit Perfo rmonce (Common Emitte r)
NF
40
.8
15
40
1.0
15
40
1.2
15
40
1.5
15
µµ£
me
db
I
- 12
I
Collector Supply Voltage Vee -12 - 12 - 12 volts
Emitter Current b - 1 - 1 - 1 - 1 mn
Minimum Power Cain at 1 mw power output c. 37 39 41 43 min db
Small Sl1nal Choracterlstics
(Ve= - Sv; l g= - 1 m a; f
Input Impedance
= 1 KC l
h1• 29 29 29 29 ohms
Insut Imre:ance base to emitter
Vo tage eedback Ratio
Forward Current Trarufer Ratio
Current Amp\i6cation
Output Admittance
hi.
h,•
hu
ho
hob
1000
32
1.0
4
1400
42
4
1800
-.97 -.977 -.985 -.989

.8
4
67
.6
2200
90
4
.5
ohm~
Xl0-<
itmhos
I
Maximum Collector Cutoff CurTent
(VCB : -25v ) l co - 16 -16
•Derate 2.0 mwr c increase in ambient temperature above 25"C.
- 16 -16 ma.xµo. I
2 N 241 A
The 2N241A is a medium power PNP transistor intended
for use as an audio output amplifier in radio receivers and
I
quality sound systems. By unique process controls the cur-
Outline Drawing No. 1 rent gain is maintained at an essentially constant value for
collector currents from 1 ma to 200 ma. This linearity of
current gain insures low distortion in both Class A and Class B circuits, and permits the
use of any two transistors from a particular type without matching in Class B circuits.
I
ABSOLUTE MAXIMUM RATINGS : ( 2s · c 1
SPECIFICATIONS I
Voltage
Collector to Base ( emitter o~n)
Collector to Emitter ( RB& ~ 10 K )
Emitter to Base ( collector op en)
Curre nt
Collector
Vceo
Vc11R
Vv.uo
le
-25
- 25
-5
-200
volts
volts
volt,
ma
I
I
Power
Collector Dissipation Pc 200• mw
Te mperoture
Operating T, - 55 to75 ·c
Storage TSTO ~5 to85 ·c
I
I TRANSISTOR SPEC I FICATIONS
I
TYPICAL ELECTRICAL CHARACTERISTICS: 12S' C)
Closs B Audio Amplifier Operation
CValues far two transistors. Note that matching
Is not required to hold distortion to less thon
S % for ony two transistors from o type )
I Maximum Class B Ratings (Common Emitter )

Collector Suppl)'. Volta11e
Power O utput ( Distortion less tha n 5%)
Design Center Chorocterlstlcs
Input Impedance large signal base to base
Vee
Po
-12
750
volts
mw
I (Li.ho= 100 ma)

Forward Current Cain (Vcv = -lvf· le = 20 ma)
Current Gain (Yr&= -lv; k = - 00 ma)
=
Frequency Cutoff (Vet:= - 5v; ,: 1 ma)
h1 ,
hFE
hn
Collector Capacity (Vea= -5vf· Jg= l ma; f = 1 me) Coo
f•r•
4000
50 to 125
73
40
1.3
ohms
µ.,d
me
Closs B Circuit Performance (Common Emitter )
I Collector Voltage
Minimum Power Cain at 100 mw power output
Closs A Audio Amplifier Ope ration (Common Emitte r!
=
IVco - 12v- h, =
10 mo )
Vee
G.
-12
31
volts
min dh
C,
I
P9wcr Cain a t 50 mw power output 40 db
Maximum Collector Cutoff Current (V<·ao = -25v) ko -16 max µa
Maximum Emitter Cutoff Current (V,:no = -5v) l,:o -10 maxµ:a
• Derate 4 mw/°C increase in ambient temperature within range 25°C to 75' C.
I The 2N265 is an ,11loy junction PNP transistor intended

for driver service in transistorized audio amplifiers. By 2N265
c-ontrol of transistor characteristics during manufacture, a
I specific power gain is provided for e;ieh type. Special
processing techniques and the use of hermetic seals pro-
vides stability of these characteristics throughout life.
I ABSOLUTE MAXIMUM RATINGS : ( 2S' Cl

Voltage
Collector to Emitter ( Rnt: ~ 10 K)
SPECIFICATIONS
Vct1t -25 volts
I Current
Collector
Powe r
Collector Dissipation ( 25'C) •
le
Pc
-50
75
ma
mw
Temperature
OperaHng T, ·c
I Storng~
ELECTRICAL CHARACTERISTICS: ( 2S ) • •
Audio Driver Closs A Oporotlon
0
T&TO
-55 to 60
-55 to 85 ·c
l Values for one transistor driving a trons forme r
I coupled output stag• )

Maximum Closs A Ratings (Common Emitter )
Design Center Characteristics
Vee -12 volts
I
llnput Impedance base to emitted ( h: = - 1 ma) h10 4000 ohms
Current Cain (Ve&= -Iv; k = - 20 ma ) hPr. 99-176
Collector C'!J)acity ( Vco = -5v; I,: = - 1 ma) c •• 40 µ.µ.f
Frequency Cutoff (Ve»= - 5v; h : = - 1 ma) fhn 1.5 me
Noise Figure (Ven= - 5v; I& = - 1 ma;
f = l KC; .8W = 1 cycle) NF 8 db
I Audio Circuit Performance (Common Emitte r)

Emitter Current
Minimum Power Cain at l mw power output
Vee
le
C,
-12
l
45
volts
ma
min db
Small Signal Characteris tics ( Common Boso>
I I Ve= - Sv; h: = - 1 mo; f = l KC )

Input Impedance
Voltage F,•edback Ratio
Forward Current Transfer Rotio
Output Admittance
h10
h,b
hr.
h oo
29
4
115
.5
ohms
X 10...
itmhos
I Cutoff Characte ristics

Maximum Collector Cutoff Current (Veno= -25v) !co
• Derate 2.0 mw/•C increase in ambient tempC'rntW"e nbove 25•c.
• •Values nre typicnl unless indicated ns minimum or maximum.
-16 mu.ua
221
2N292 , 2N293
Types 2N292 and 2N293 are rate grown NPN
germanium transistors intended for amplifier ap-
plications in radio receivers. Special manufactur-
ing techniques provide a low value and a narrow
I
spread in collector capacity so that neutralization
in many circuits is not required. The type 2N293 is int.ended for receiver circuits
where high gain is needed. In IF amplifier service the range in power gain is controlled
to 2.5 db.
I
Volto9e
ABSOLUTE MAXIMUM RATINGS : (25"C l
Collector to Emitter ( R,:a = l0K ) Vee"

2N292
15
2N293
15 volts
I
Collector to Base ( emitter open) Veao 15 15 volts
Curre nt
Collector
Powe r
Collector Dissipation •
lo
Po
20
65
20
65
ma
mw
I
Tempe roture
Operating and Storal[e
ELECTRICAL CHARACTERISTICS: (25°Cl . .
IF Aml!lifle r Ser,lce
T,, Ts'r'O -.55 to 85 -.55 to 85 ·c
I
Maximum Rot1n11
De1l1n Ce nter Characteristics
lnput Impedance ( Is= 1 ma; Yes= 5v;.f = 455 KC)
Vee
z,
12
500
12
350
volts
ohms
I
Ourvut Impedance
=
{ l!l = l ma; Vos= 5v; f
Vo tage Feedback Ratio
~h, = 1 ma; Ven= 5v; f
Co lector to Base Capacitance
=
455 KC)
l mo)
(b, = 1 ma; Vea= 5v; f = 1 me)
z.
hr•
c••
15
10
2.4
15
5
2.4
Kohms
X 104
µ.µ1
I
Frequency Cutoff ( I■ = 1 ma; Vca = 5v) fUb 5 8 mo
Base Current Gain (Ves = lv; lo= 1 ma)
Minimum Base CurTent Gain
Maximum Base Current Gain
IF Aml!llfle r Performance
hn
hr■
hn
25
8
51
25
8
51 I
Collector Supply Voltage Veo 5 5 volts
Collector Current
ln&,'lt Fr~ency
M mum ower Gain in Tryical IF Test Circuit
Powtt Gain Range of VariatJon In Typical lF Circuit
lo
f
c.
G.
455
l
25.5
2.5
1
455
28
2.5
ma
KC
dltmin
db
I
i
Collector Cutoff Current Vea = 5v)
Collector Cutoff Current Vea = 15v)
lco
lco
•Derate 1.1 mw/"C increase in ambient temperature over 25"C.
. .All values arc typical unless indicated as a min. or max.
.5
5
.5
5
p.a
µ,a mas
I
2N319. 2N320,
The 2N319, 2N320, and 2N321 are miniaturized
versions of the 2Nl86A series of G-E transistors.
I
2N321
. .
Outline Drawmg No. 2
Like the prototype versions, the 2N319, 2N320,
and 2N321 are medium power PNP transistors
intended for use as audio output amplifiers in
radio receivers and guality sound systems. By
I
unique process controls the current gain is main-
tained at an essentially constant value for collector currents from 1 ma to 200 ma.
This linearity of current gain provides low distortion in both Class A and Class B cir-
cuits, and permits the use of any two transistors from a particular type without match-
ing in Class B Circuits.
I
ABSOLUTE M.AXIMUM RATINGS: ( 25"Cl
Voltage
SPECIFICATIONS
I
Collector to Emitter ( Ru ;:a 10 K) Vcsa -20 volts
Collector to Base
Emitter to Base
Curre nt
Collector
Veao
V-.eo
Io
-30
-3
-200
volts
volts
ma
I
222
I
I Power
TR A N SIST OR S P EC IFICATIO NS
I
Collector Dissipation• Po 225 mw
Tempe rature
Operating T, - 65 to 85 •c
Sto rage T eTO - 65 to 100 ·c
TYPICAL ELECTRICAL CHARACTERISTICS: ( 25"CI
I D.C. Characteristics
CUrTent Cain { le = -20 ma;
Vo•=-lv)
Current Cain ( le = - 100 ma;
Ves=-l v)
hn
hr&
2H319
25--42
31
2H320
34-65
45
2H321
53-121
70
I
Collector to Emitter Voltage {Rn= l 0K;
l e= .6 ma) Ven -20 -20 -20 volts
Collector Cutoff Current ~Vea -25v ) l co - 8 -8 - 8
Maximum Collector Cuto Current
(Vea = -25v) !co -16 -16 - 16 ""
,..
Emitter Cutoff Current ( VEo = -3v) h:o - 2 -2 -2 p.a
I Small Slanal Characteristics (Cammon Basel

(Ven= - Sv; he= 1 ma; f = 270 cps )
Frequency Cutoff
Collector Capacity ( f = lmc)
Noise Figure
r.,.
c ••
NF
2.0
25
6
2.5
25
6
3.1
25
6
me
~er
Input Impedance h1• 30 30 30 ohms
I The rmal Characteristics

Thermal Resi.stance
Without Heat Sink <Junction to Air)
With CIJp On Heat ink (Junction to Case)
.27
.2
.27
.2
.27
.2
"C/mw
"C/ mw
Perfo rmance Data ( Common Emitter)
I Class A Power Gain (Vco=-9v)

Power Output
Clnu B Power Gain {Vee= - 9v)
Power Output
G.
Po
Po
c.
33
50
26
100
35
so
28
100
•Dernte 3.7 mw/"C increase in ambient temperature above 25°C.
38
50
31
100
db
mw
db
mw
I The 2N322, 2N323, 2N324 are alloy junction

PNP transistors intended for service in audio 2N322 , 2N323.
amplifiers. They are miniaturized versions of the 2N324
I 2Nl90 series of G.E. transistors. By control of
transistor characteristics during manufacture, a
specillc power gain is provided for each type.
Special processing techniques and the use of
. .
Outhne Drawing No. 2
I hermetic seals provides stability of these characteristics throughout life.
ABSOLUTE MAXIMUM RATINGS: (25°C )

SPECIFICATIONS
I
Voltoge
Collector to Emitter { Ras ~ 10 K) Ve&" - 16 volts
Collector to Base Voao - 16 volts
Curre nt
Collector Jc -100 ma
Power
I Collector Di.ssipatl.o n
Tempe roture
Operating
Storage
Po 140
-65to60
-65to85
mw
·c
·c
TYPICAL ELECTRICAL CHARACTERISTICS: (25°C I
I D.C. Choracterlstlcs
(Ve,;= - Iv; le= -20 ma)
Colicetor to Emitter Voltage
2N322
34-65
2N323
53-121
2N324
72-198
(R£B = l0K· Io= -.6 ma) Ven -16 - 16 - 16 volt•
I Collector Cutoff Current (Vea= - 16v)

Max. Collector Cutoff Current (Yes = - 16v)
Small Slgnol Characterl&tlcs
Frequency Cutoff
l oo
!co
- 10
- 16
2.0
- 10
- 16
2 .5
- 10
- 16
3.0
p.a
p.a
me
I
(Ven= -5v; 111 = - 1 ma)
Noise Figure (Vee= -5v; l>< = l ma)
=
f•r•
Collector Capacity {Vee= -5v; ls = 1 ma)Co•
NF
=
Input Imr:>edanoo (Vcso -5v; h, 1 ma) h ie
25
2200
6
25
6
2600
25
6
3300
~er
ohm•
Current Cain ( Yc■ =-Sv; h: = l ma) hte 45 68 85
Thermal Characte ristic s
Thrrrnal Resistance Junction to Air 4 4 4 mw/"C
I Performance Data Common Emitte r

Power Gain Driver (Vec=9v)
Power Output
G.
Po
42
1
43
1
44
1
dh
mw
223
TRANSISTOR SPECIFICATIO NS
I
2 N3 3 2
The General Electric Type 2N332 is a silicon NPN transistor
intended for amplifier applications in the audio and radio
frequency range and for general purpose switching circuits.
I
They are grown iunction devices with a diffused base and
Outline Drawlns No. 4
are manufactured in the Fixed-Bed Mounting design for
extremely high mechanical reliability under severe conditions of shock vibration
centrifugal force, and temperature. These transistors are hermetically sea1;.;! in weld;(
I
cases. The case dimensions and lead con6guration conform to JEDEC standards and
are suitable for iosertJon in printed boards by automatic assembl)' equipment. All tran-
sistors are cycle-aged at a temperature of 2oo•c for a minimum of 160 hours to enhance
their electrical stability.
SPECIFICATIONS
1
ABSOLUTE MAXIMUM RATINGS : f15"C I
Voltoge
CoUector" to Base ~milter ()pen
Emitter to Ba.ie ( llector Open
i Vc110
Vno
-45
l
volts
volt
I
Curre nt
Collector
Power
! t
le
p~
25
150
ma
mw
I
Collector Dissipation 25"C
Collector Dissipation 1oo• mw
I
Pc 100
Collector Dissipation 15o•cl Pc 50 mw
Tempuotule
Storage Tno -65 to200
-65 to 175
·c
·c
Opcratin1 T£
' IUCTRICAL CHAUCTIRIST ICS: 115"C I

I Ullless otherwlM opecltled Ve a = 5v;
h: = - 1 m•; f = 1 Itel
I
$moll Sl1nol Cho rocterbtlc1
Cunent Transfer Ratio
Input l m.y:;:ance
Reverse oltaRe Transfer Ratio
Output Admhtance
hte
h o•
h,•
h ••
M i n.
9
30
.25
0.0
Hom.
15
43
1.5
.25
Mox .
22
80
s.o
1.2
ohms
X 10_.
,1<mhos
I
I
Power Caln
(VcE = 20vfu!," = -2 mak( = l kc;
Ro = lK o s; RL = 20 ohms) c. 35
20
db
db
Noise Flsure NF
H!JII Fre!!!!l!!l'. ~rederlrtfc1
'i\~.act~
r'
= "".Jg =-J.-na)
Coll~r ~ 8~ Cai}ljdly
·
( o,C::: 5\l.; K = -•l~naa; f ::: 1 fbc )
b
Power aln Comm<>« mltte'(
fu•
c ••
c.
10
7
14
me
/1,/1,£
db
I
(Vl:a = 2 v ; IB = ...:.2 Dia; = S me)
D-C Chorocte rlst lu
Common Emitter Current Caln
(Vcs = 5v• l e= l ma)
Collector Brea'!.down Voltage
hn I◄
I
Vr•o 45 volts
cof.~g, c !t~ltC~:;.e~l O; T. = zs·c)
( V,·" = 30v; Is = 0; T• = 25"Ct
!Vf-11 = 5v; l g= O; T• = 150" )
Co lector Saturation Rcsi.stance
(la= I ma; le= 5 ma)
lcao
l c ao
Rl!C
.002
90
2
50
200
,,,.
,..
ohms
I
Swltchlhl Chorocte ristics
( r,., = O.S ma; 1,., = -0.5 m11; I
k =S.0ma)
~~r:~"'
Stora11e Time
Fall Time
l•
t,
t.
tr
.7
,65
.4
.13 --
.-see
I
2N332
Outline Drawing No. ,4
Certified to meet MIL-T-19500 / 37A
I
224
I
I The General Electric Type 2N333 is a silicon NPN transistor
TRAN ■ l ■TOR SPECIF'ICA!.!2 .!:!.!
I intended for amplifier applications in the audio and radio

They are grown iunction devices with a diffused base and
2N333
Outllne Drawlns No. 4
extremely high mechanical reliability under severe conditions of shoclc vibration

I centrifugal force, and temperature. These transistors are hermetically seal;! in weld~
cases. The case dimensions and lead configuration conform to JEDEC standards and
are suituble for insertion in printed boards by automatic assembfy equipment. All tran-
sistors are cycle-aged at a temperature of 2oo•c for a minimum of 160 hours to enhance
I their electrical stability.
SPECIFICATIONS
I ABSOLUTE MAXIMUM RATINGS: 125'C I

Volto90
Collector to Base ( Emitter ()pen) Vr ao 45 volts
Emitter to Base ( ColJK"tor Open ) VcRo 1
I
volt
Current
CollK"tor le 25 ma
I
Powe r
Collector Dissipation
Collector Dissipation
Collector Dfulpation
!
25'C)
lOO'C
150'C~
Pc
Po
150
100
mw
mw
Pc 50 mw
I
Temporoture
Stonge -65 to200 ·c
()penoting -65 to 175 ·c
I ELECTRICAL CHARACTERIST ICS: (25' C I

( Unleu otherwise sp ecifie d Vea = Sv;
l a = - 1 mo; f = 1 kcl
Smoll Signet Chorocterbtlcs Min. Hom. Mox.
I Current Tran1fer Ratio

Input lmocdance
Reverse Volta11e Tnnsfer Ratio
Output Admittance
PowttCaln
hr.
hi•
h,•
he•
18
30
. 25
0.0
30
,3
2.0
.2
""
80
10.0
1.2
ohms
X 10...
,iunhos
(Vea= 20v· la= -2 ma· r = l kc;
I Ro = I K ohms; Ri. = 20k ohms)

Noise Figure
Hlph Frequency Choracterlstlcs

c.
NF
39
15
db
db
Frequency Cutoff
=
I (Vn 5v; I ■ = - 1 ma)
Collector to Base Capadty
(VCB = 5v: I ■ = -1 ma ; f
Power Caln (Common Emitter)
=
1 me)
(Vea= l!Ov; I•= -2 ma; ( = 5 me)
r...
c ••
c.
12
7
14
me
1'/U
db
I D-C Chorocte rlstlcs

Common Emitter Current Caln
(Vea= 5v; lo= l ma )
CollK"tor Breakdown Volta11e
hn 31
Cle1<0 = 50 ,,.a· IE = 0; T• = 2S"C)
I Collector Cutoff Cun..nt

(Vee = 30v; le = 0; TA = 25'C)
(Vea= 5v; h: = 0; TA = 150'C)
(la= 1 ma; l e= 5 ma)
Veao
leao
lcao
Rae
45
.002
80
2
50
200
volts
,..,,..
ohms
I Switching Characteristics
=
( lft 1 = 0.5 ma; lo2 --0.5 ma;
le = 5.0 ma)
Delay Time t, .65
I Rise Time
Storai1e Time
Fall Time
Ir
t,
tr
.55
.75
.u
225
TRANSI STOR SPECIFICATIO NS I
USN 2N333
Outline Drawing No, 4
Per ~IIL-T-19500/37A
I
2 N3 3 4
The General Electric Type 2N334 is a silicon NPN transistor
I
Outline Orn" ing No. 4 They arc grown iunction devices with a diHused base and
are manufactured in the Fixed-Bed ~lounting design for
I
centrifugal force, and temperature. These transistors are hermetically seal;;i in welded
cases. The case dimensions and lead configuration conform to JEOEC standards and
ore suitable for insertion in printed boards by automatic asscmbfy equipment. All tran-
sistors are cycle-aged at a temperature of 200°C for a minimum of 160 hours to enhance
I

Voltoge
SPECIFICATIONS
,2s·c > I
Collector to Base ~miller ()pc,n ~ v.-..o .cs VC'JltS
Emitter to Bue ( llector ()pc-n
Current
Collector
V£aO
le
l
25
volt
ma
I
Power
Collector Olnlpation (25•Ct
l
Collector Dinfpation I oo• )
Collector Dusfpation l50•C)
p ('
Pc
Pc
150
JOO
50
mw
mw
mw I
Temperature
Storage
Operatin11
lUCTRICAL CHARACTERISTICS : 125' C I

Tno
TA
- 65 to 200
-65 to 175
•c
·c
I
(Unleu othe rwise spe cified V"" = 5v;
le= - 1 mo ; f = 1 kcl
Small Slanol Chorocterlstlc1
Curttnt Transfer Ratio
Input Jm~anct'
hr.
h1•
Min.
18
30
Nam.
39
43
Mox.
90
80 ohms
I
.5 2.S 10.0 X 10"'
Rev,erse olta11e Transfer Ratio
Output Admittance
Power Caln
(Ver.= 20v· lE = -2 mo· f = l kc;
Rn = I K otms; R,. = 20k ohms)
Noise Figure
hr•
ho•
c.
NF
0.0 .18
40
15
1.2 .,.mhos
db
db
I
Hl11h Fre911e nc1: Chorocte rlst lcs
F r~uency Cutoff
j ca = 5v; J,: = - 1 ma)
Co lector to Base Capacity
fuh 8.0 13 me
I
(Ven= 5v; h: = - 1 mR; £ = l me ) Cob 7 /1,/1,£
b
Power Cnfn Common Emitte'(
(Ve,.= 2 v; l e = -2 ma; = 5 me)
D- C Characteristics
Common Emlttc,r Currc,nt C,1ln
c. 13 db
I
38
( Vee= 5v; Ir= I mn)
Collector Br<'nkdown Vnlta11c
Cofl~~grCit~G~.1:;e~t O; TA = S•C)
( V,-,. = 30v; I,;= O; TA= 25•c6
( VcB = 5,·. I E= 0, TA = 150• )
2
hn
V('JtO
Jrao
kBO
45
.002 2
50
volts
/I.A
/I.A
I
Collector Saturation Rt'sistanct'
(I•= I ma, le= S ma)
Switchin11 Characte ris tics
( lo, = O•."S mo; l11, = -0.5 mo;
Rae 75 200 ohms
I
I
k =5.0 mn)
Delay Time t• .65 /1,SCC
Ri.e Time t, .55 /I-See
Stora11e Time, t, .80 ,u.cc
Fall Time Ir .I S jilCC
226
I
I T R A N SI S TOR SPECIFICA'!.!_OJ:!.!
I Per MIL-T-19500/37A USN 2N334

I The General Electric Type 2N335 is a silicon NPN transistor

2N335
They are grown iunction devices with a diffused base and Outline Drawing No. •I
I are manufactured in the Fixed-Bed Mounting design for

extremely high mechanical reliability under severe conditions of shock vibration,
centrifugal force, and temperature. These transistors are hermetically seal~ in welded
I are suitable for insertion in printed boards by automatic assembfy equipment. All tran-
sistors are cycle-aged at a temperature of 200°C for a minimum of 160 hours to enhance
I ABSOLUTE MAXIMUM RATINGS : c2s•c 1

Vo ltog•
SPECIFICATIONS
t
Collector to Base Emitter Open) Vrno 45 volts
I Emitter to Bnse ( ollector Open)

Curre nt
Collector
VEnO
le 25
l volt
ma
Power
I Collector Dissipation {25'Ct

Collector Dissipation loo•
Collector Dissipation 15o•c l
Te mpe rature
Pr
Pt·
Pc
150
100
50
mw
mw
mw
I Storal(t>
Operating
ELECTRICAL CHARACTERISTICS: 125 ' C >

T31'G
T•
-65 to 200
- 65 to 175
•c
·c
( Unless otherwise spe cified V t•H = Sv;
I h : = - 1 mo; f = I kc )
Small Sl11nal Characte ristics
Current Transfer Ratio
Input lm~edance
hr,
hi•
Min.
37
30
Nom.
60
Max.
90
80 ohms
•3
.s
I
Reverse nltnge Transfer Ratio h,• 3.0 10.0 X 10...
Output Admittance hob o.o .15 1.2 µmhos
Power Cain
(Vn: =
20v; h : =
-2 ma· f 1 kc;
Ru = 1K ohms; RL = 20k ohms )
= c. ◄2 db
Noise Figure NF 12 db
I Hl11h Fre gue ncl Characte ristics

Frwency Cutoff
( ,·n = Sv; IE = - 1 ma)
Collector to Base Capacity
r.,. 14 me
(Ven= 5v; le = - l ma; f = l me) c •• 7
I
/J>IJ..f
&
Power Cain Common Emitter;
(Vee= 2 v; IE :: -2 ma; = 5 me ) C, 13 db
Commo n Emitter Current Cain
(Ve,:= Sv; l e= 1 ma )
I
hFR 56
Collector Breakdown Volta11e
( lc•o = SO ira· h;:: O; TA = 25' C) Veno 45 volts
Collector Cuto Current
) Vrn = 30v; IE = O; TA = 25•c .002
Vee= 5v; le = O; TA = 150' ) 6 l c 110
lcso so
2 µ.a
µa
I
( IK = 1 mn; lo = S ma) Rsc 70 200 ohms
Switchin11 Characte ristics
( Is, = 0.5 ma ; le, = - 0.5 ma;
l e= 5.0 ma)
I Delny Time
Rise Time
Stora,11e Time
Fall ime
td
t,
t,
Ir
.6
.s
.9
.15
µ.sec
µsec
µse<-
µsec
227
T RANSISTOR SPECIFICATIONS I
USN 2N3 35
Per MIL-T-19500/37A
I
2 N336 The General Electric Type 2N336 is a silicon NPN transistor
I
They are grown iunction devices with a dilfused base and
I
centrifugal force, and temperature. These transistors are hermetically seal~ in welded
cases. The case dimensions and lead configuration conform to l EDEC standards and
are suitable for insertion in printed boards by automatic assemb )' equipment. All tran-
sistors are cycle-aged at a temperature of 200°C for a minimum of160 hours to enhance
I

SPECIFICAT IONS
12s·c1
I
Voltoga
t Veno 45 volts
I
Collector to Base Emitter Open~
Emitter to Base ( ollector Open Vuo 1 volt
Current
Collector lo 25 ma
Power
!
Collector Dissipation 25•c
Collector Dissipation 100• ~
Collector Dissipation 15o•c
t Pc
Pc
Pc
150
100
50
mw
mw
mw I
Te mpe rature
Storage
Operating
ELECTRICAL CHARACTERI STICS : 1zs·c 1

TsTO
T•
- 65 to 200
- 65 to 175
•c
•c
I
( Unless othe rwise specified Yes= Sv;
IE = - 1 ma; f = I kc )
Small Sl1 na l Choroct erlst lcs
Current Transfer Ratio hr•
h1•
Min.
76
30
Hom.
120
43
Ma•.
333
80 ohms
I
Input lm,,f.edance
I
Reverse oltage Transfer Ratio hr• .5 4.0 10.0 X 10"'
Output Admittance hOb 0.0 .13 1.2 .,.mhos
Power Gain
(Ve"= 20v; Jg = - 2 ma· r = 1 kc;
Ro= lK ohms; RL = 20k ohms ) G. 43 db
Nolse Figure NF 10 db
Hl1h Fregue nc~ Chara cte ristics
Frr\)'ency Cutoff
( ca= 5v; ho= - 1 ma )
Collector to Base Capacity
,.,. 15 me
I
(Ven= 5v; Is= - 1 ma; r = 1 me)
""'
c •• 7
Power Gain & Common Emitter(
(Vcn=2v;IB=-2ma; =5mc)
D- C Choractarlstlcs
Common Emitter Current Gain
G. 12 db
I
I
(Vcs = 5v; l e= 1 ma) hn 100
Collector Breakdown Voltage
25 Vcao 45 volts
eoL~gr c:Jt~ti'~..1ie~t O; T .. = •c >
~Ven = 30v; Jg = O; T .. = 25•cd
Vea = Sv; ls = O; T._ = 150• )
Ieao
lcao
.002 2
50
....
J,1a
I
Collector Saturation Resi.,tance
( b = l ma; le = 5 ma) Rsc 70 200 ohms
Swltchln1 Choracte rlst lcs
( 1111 = 0.5 ma; la, = --0.5 ma;
I
Io= 5.0 ma )
Dela)' Time t• .5 J,ISec
ruse Time tr .4 J,ISec
Stora-lie Time t. 1.4 J,1Sec
Fall ime tr .2 J,ISec
I
I T RANSISTOR S P EC IFICAT ION&
The General Electric Types 2N332A, 2N333A,

I 2N334A, 2N335A, 2N336A, are silicon NPN
transistors intended for amplifier applications
in the audio and radio frequency range and
2 N 332A - 2 N 336A
for general purpose switching circuits. They
I are grown junction devices with a diffused base and are manufactured in the Fixed-
Bed Mountinf design for extremely hifch mechanical reliability under severe condi-
tions of shoe , vibration, centrifugal orce, and temperature. These transistors are
hermetically sealed in welded cases. The case dimensions and lead configuration
I conform to JEDEC standards and are suitable for insertion in printed boards by
automatic assembly equipment.
SPEC IFICATIOMS
I ABSOLUTE MAXIMUM RATINGS : (zs•c,

Volta90
Collecto r to Base
Collecto r to Emitter
Vcao
Vea:o
45 volts
45 volts
I
Emitter lo Base V11110 4 volts
Currant
Collector Io 25 ma
Powe r
Collector Dissipation RMS i
Po @ 25•c Free Air ~ 500 mw
I Temperature
Storage
Operating Junction
Po @ 15o•c F ree Air
Tno
T,
83 mw
- 65 to 200 •c
-65 to 175 ·c
I 2N332A, 2N333A
ELECTRICAL CHARACTERISTICS : ( 2 5' C)
I D-C Chorocte rtstles

CoUector to Base Volta~e
(Io = 50 t':;• Is = 0 Vceo
Min.
45
ZNUZA
Typ. Mox. Min.
45
ZN3 UA
Typ. Max.
volts
Collector to mitter Voltage
I ( 111 = 0, Io = 1 ma)
Emitter to Base Voltage
( Is = 100 .U, l e = 0)
Forward CWTent T rarufer Ratio
p ow cunent )
Veso
Vno
45
4
45
4
volts
volts
lo= l ma, Ve■ = 5v ) h.,. 16 27
I Saturation Voltage
( la = 1 ma, lo = 5 ma)
CoUector Current
Ve,.<UT> .5 1.0 ..C5 1.0 volts
( Ve11 = 30v; Is = 0 ;
I TA = 25. C)
Collector Current
( high lem0vralure )
(Ve11 = 3 v· Jg = 0 ;
T,. = 150'C)
Ic110
Ic110
l
1
500
20
1
1
500 mi,a
20 ....
Collecto r Emitter Current
I (Veg = 30v· 111 = 0;

TA = 150•C)
Low Fregue ncl Chorc d erlstlct
CVe11 = S v; h : = - 1 mo;
101,0 60 60 µa
f = 1000 cps )
I Forward Current Transfer Ratio

Input Impedance
Output Admittance
Input Impedance
hr.
hto
h oe
h,.
ho•
9
270
0.0
30
16
750
3.5
.7
40
22
1760
20
80
18
540
0.0
30
30
1300
5.0
1.0
40
44
3520 ohms
25 im,hos
X 10...
80 ohms
Output Admittance
I Rt>vcrst> Volta11e Transfer Ratio

Noise Figure ( Bw = 1 cycle)
h o"
h,b
NF
Hl1h Freguencl Chorocte rlst lc1 !Co mmon Bose )
IVcR = Sv; h ::;: - 1 mo )
0.0
.25
.25
1.2
16
1.2
30
5
o .o
.25
.2
1.2
13
1.2 im,hos
10 X 10-<
30 d b
I
Output Capacity ( f = l me ) c ••
Cutoff F requency
Power Cain ( Commo n Emitter )
r.,. 2.5
7
10
15
2.5 u
7 15 µpl
me
( Ve~ = 20 v; I E= - 2 ma;
f = 5 me) c. 11 11 db
continiu?d nen pa11e
I 2N334A. 2N335A I
ELECTRICAL CHARACTERISTICS CZS' C)
I
2 N334A 2 N33SA
D-C Choroctulstlcs
Collector to Base Voltage
(le = 50JLa, l e = 0)
( IR = 0, le = I ma)
Vcso
VCEO
Min.
45
45
Typ. Mox. Min.
45
45
Typ. Mox.
volts
volts
I
Emitter to Bas" Voltage
( I& = 100 JLa, le = 0)
~ low current )
le = 1 ma. Ve&= 5v)
Saturation Vollal(e
V,:no
hFE
4
36
4
45
volts
I
.42 1.0 .4 1.0 volts
I
( 18 = 1 ma, le = 5 ma ) V c.:<••T>

Collector Current
(Yes= 30v; I& = O;
1 500 m1ta
I
Ti. = 25' C ) Iceo 500
Collector Current
( high temgerature)
(Vcs=3 v;h: = 0;
Ti. = lSO'C) JcBO 1 20 1 20 JL&
Collector Emitter Current
(Ve&= 30v· Ia= O;
TA = 150' C)
Low Freguenci Chorocterlstlcs

k&o 60 60 /LB
I
I VcB = Sv; I&= - 1 mo;
f ;= 1000 cps>
Input Impedance
Output Admittance
hr,
hr,
h o,
h,.
18
540
0.0
38
1700
6.0
1.3
90
7200
30
37
1110
o.o
52
2000
7.0
1.5
40
90
7200 ohms
30 JJ,mbos
X 10-<
80 ohms
I
Input Impedance h ,. 30 40 80 30
o.o o.o
I
Output Admittance h .. .18 1.2 .15 1.2 JLmhos
Reverse Voltare Transfer Ratio h,• .so 1.2 10 .so 1.2 10 X 10-<
Noise Figure Bw = l cycle) NF 12 30 11 30 db
Low Fraguencl Chorocterlstlcs ! Common Bose )

(Ye s = Sv; le= - 1 mo l
Output Capacity ( I = 1 me)
Cutoff Frequency
b
Power Cain Common Emitter)
(Ve&= 2 v; I& = - 2 ma;
c ••
f•r• 8.0
7
12
IS
2.5
7
13
15 JJ,p.l
mo I
f = 5 me ) C, 12 12 db
2N336A
I
ELECTRICAL CHARACTERISTICS 125 ' C l
D- C Chorocte ristlcs
Collecto r tn Base Voltage
Min.
2N336A
Typ. Mox .
I
I
(le= 50 ~a. Jc= 0) Vr ao 45 volts
Collector to milter Voltage
( Is = 0, le= 1 ma) V('Co 45 volts
(lc= 100 /1,R, le= 0 ) Veno 4 volts
Forward Curre nt Transfer Ratio
( low current)
(le= 1 ma. Vee= Sv)
Saturation Volta~e
( '8 = 1 ma, le = 5 ma)
hvi:
Vf'F.(SAT)
75
.4 1.0 volts I
I
Cutoff Chorocteristics
Collector Current
(V~• = 30v; h : = O;
Ti. = 25' C) lrao 1 500 mJJ,a
Collector Current
( high temge rature)
( Ve a = 3 v· l e= O;
TA = ISO'C)
Collector Emitter Curre nt
( Ve,: = 30v; le = O;
lceo 1 20 JJ,a ·1
Ti. = 150'C ) keo 60 //,a
230
I
I Low Freguencl Choracte rlstlcs

( VcB = Sv; IE= - 1 ma;
f = 1000 cps >
Forward Cu_rrcnt Transfer Ratio
Input Impedance
hr,
h1e
76
2280
95 333
3700 15,000 ohm•
Output Admittance o.o 8.0 35 itmhos
I
ho•
Volta11e Feedback Ratio hu 2.3 X 10-<
Input Impedance h1b 30 40 80 ohms
Output Admiltance h ob 0.0 .13 1.2 itmhos
Reverse Voltare Transfer Ratio h,b .50 1.2 10 X 10-•
Noise Figure Bw = 1 cycle) NP 11 30 db
I Hlllh Fregue ncl Characte ristics (Common Base l

( VcH = Sv; I~= - 1 ma >
O utput Capacity ( ( = 1 me) Cob 7 15 Jl.lil
Cutoff Frequency r. .. 2.5 15 me
I Power Cain ~Common Emitter)

(Ve& = 2 v; h, = - 2 ma;
f = 5 me) c. 12 db
I The General Electric Type 2N335B is a silicon high

voltage P transistor intended for amplifier applica-
tions in the audio and radio frequency range and for
general purpose switching circuits. They are grown junc-
2N33 5B
Outline D,awin1t No. 4
I tion devices with a diffused base and are manufactured

in the Fixed-Bed Mounting design for extremely high mechanical reliability under
severe conditions of shock, vibration, centrifugal force, and temperature. These tran-
sistors are hermetically sealed in welded cases. The case dimensions and lead configura-
tion conform to JEDEC standards and are suitable for insertion in printed boards by
I automatic assembly equipment. All transistors are cycle-aged at a temperature of
200°C for a minimum of 160 hours to e nhance their electrical stability.
I ABSOLUTE MAXIMUM RATINGS : 12s•c 1

Voltage
SPECIFICATIONS
Collector to Base Ve no 60 volts
I Collector to Emitter
Emitlt'r to Base
Current
V c &o
VERO
60
4
volts
volts
Collector lo 25 ma
I Power
Collector Dissipation RMS Pc @ 25°C ( Free Air)
Pc @ l 50•C ( Free Air)
500
83
mw
mw
I T,tmperoture
Storage
Operating Junction
T sTG
T,
- 65 to 200
- 65 to 175
•c
·c
I ELECTRICAL CHARACTERISTICS: 12s•c 1

D-C Characteristics
( le = 50 µa, It> = 0) V t·110
Min.
60
Typ, Mox.
volts
I
Coll('Ctor to Emitter Voltage
(ls ::0.Ic = lma ) VrEO 60 volts
( h : = 100 µn, le= 0 ) VJ:no 4 volts
F orward Current Trans fer Ratio
( low current) (Jc= 5 ma, V,•,: = 10v ) h.-c 28 45 90
Saturation Voltngc ( In = 1 ma. le= 5 ma ) volts
I
Vct_;UUT> .4 1.0
Input Impedance ( In = 1 mn, le = 0 ) VHn l volts

Coll('Cto r Current
I (Vc-e = 30v, h : ::0, T• = 2S•C)

Coll~ctor Current ( high tcmpe ratun, )
( Vt·• = 30v, h: = 0. TA = lS0•C)
Coll~ctor Emitter Curn·nt
l t')UI
60
500
20
mita
JJ.R
( Vt 8 = 30v, In = o. TA = 1so•c ) ln:o

""
0
continued ncrt page

TRANSISTOR SPECIFI CATIONS I
Low Freg11enc)'. Chorocteristlcs
IVea= Sv; Is= - 1 mo; f = 1000 cps )
Input Impedance
Output Admittance
bto
h ,.
ho•
37
1110
o.o
52
2000
7.0
90
7200
30
ohm.1
lilllhOS
I
Input Impedance
Output Admittance
Reverse Voltare Transfer Rat.i o
Noise Figure B w = l cycle)
hu
hlb
hob
h,b
NF
30
o.o
.50
1.5
40
.15
1.2
11
80
1.2
10
30
X 104
ohms
.,.mhos
X 10_.
db
I
Hl1h Freg11e ncr: Chorocteristlcs ( Common BaH I
IVcB =
Sv; ho = - 1 ma )
Output Capacity ( f = l me)
Cutoff Frequency
c ••
f ..b 2.5 13
7 15 p.µJ
me
I
Power Caln &Common Emitter)
( Y es = 2 v, ls = -2 ma, f = 5 me ) c. 12 db
I
2N337, 2N338
The General Electric Types 2N337 and 2N338 are
high-frequency silicon NPN transistors intended
for amplifier applications in the audio and radio
I
Outline Drawing No. 4 frequency range and for high-speed switching cir-
cuits. They are grown junction devices with a
diffused base and are manufactured in the Fixed-Bed Mounting design for extremely
high mechanical reliability under severe conditions of shock, vibration, centrifugal
I
force, and temperature. For electrical reliability and parameter stability, all transistors
are subjected to a minimum 160 hour 200°C cycled aging o_peration included in the
manufacturing process. These transistors are hermetically sealed in welded cases. The
case dimensions and lead configuration conform to JEDEC standards and are suitable
for insertion in printed boards by automatic assembly equipment.
I
SPECIFICATIONS
I
ABSOLUTE MAXIMUM RATINGS : 12s •c 1
Voltoge
Collector to Base Vc eo 45 volts
l volt
I
Emitter to Base VKBO
C11rre nt
Collector le 20 ma
I
Power
Tempe ,at11re
Po 125 mw
I
-65 to 200 •c
Storage
Operating
ELECTRICAL CHARACTERISTICS: 12s•c >

- 65 to 150 •c
I
I Unless otherwise specified;
Ve a = 20v; IE= - 1 ma;
f = 1 kc )
Small-Sl1nol Choracterlstlcs Min.

tl-037
Typ. Max. Min.

2H338
Typ. Mox.
I
CurTent Transfer Ratio
Input lm~,eclance
Reverse oltage Transfer Ratio
Output Admittance
ht.
h1•
h,b
h o•
19
30
55
47 80
180 2000
,l l
39
30
99
47
200
.l
80 ohms
2000 X 10""
l i,mbo
I
Hl1h-Freg11encr: Characteristics
Al~ba Cutoff Frequene(f
Co lector Capaeit.ince f = l me)
Common Emitter CurTent Cain
(f = 2.5 me)
fhrb
c ••
hr•
10
14
30
1.4
24
3
20
20
45
1.4
26
3
me
,,.,,.r I
I
I TRAN SISTOR S P ECIFICAT I ONS
D-C Chorocterl1tlc1
I Common Emitter Cunent Ca.i n

(Vo■ = 5v; Io= 10 ma)
Coll<ector Breakdown Voltage
(Icao = 50/oa; Is= 0)
Emitter Break own Voltage
hn
Vcao
20
45
35 55 45
45
75 150
volts
I (lno = -50Jca; Io= 0)

Coll<!ctor Satura on Resistance
ix• = 1 ma; l o= 10 mal
IR = .5 ma; le = 10 ma
Cu toff Chorocte rlstlcs
v,,ao
Rse
Rae
1
75 150
1
75
ohms
150 ohms
volt
I Coll<ector Current
\Vos= 20v; Ill= O; T._=25°C) Ioao
Co l<ector Cunent
(Vca=20v; l11=0;T,.=150°C) Icao
.002
100
l .002 1
100 µa
µa
Swltchln1 Chorocte rlst lcs
I Rise Time
Storafe Time
Fall ime
t,
t,
It
.02
.02
.04
•De rate I mw/"C increase in ambient temperature over 25°C
.06
.02
.14
µsecs
µsecs
µsecs
I Per MIL-S-19500/ 69B U SN 2 N 337 -2N338
I Outline Drawing No. 4
The General Electric 2N377 is a germanium NPN alloy
I transistor. It is designed for computer switching and general

purpose usages where tight control of current gain is im-
portant.
2N37 7
Outline Drawin11 No. 2
I ABSOLUTE MAXIMUM RATINGS : (2 5°C)

Volto9e
SPECIFICATIONS
Coll<ector to Base Ve ao 25 volts

= 5K)
I Coll<ector to Emitter
Emitter to Base
Power
Dissipation•
Ve n (R
Vno
PT
20
15
150
volts
volts
mw
I Te mpe rature
Storage
ELECTRICAL CHARACTERISTICS: c2s•c1

Tno -5510+100 ·c
D-C Characte ristics Min. Typ. Mox.
I Forward Cunent Transfer Ratio

(low cunent) '>/e = 30 ma; Vcs = lv) hrl'l
Forward Current ram fer Ratio ( bi~h
current) (le= 200 ma; Vc11 = . 5v)
Base Input Volta~e
h.-,,
20
20
60
I
(la= 10 ma; o = 200 ma) Va■ 1.5 volts
Colll!Ctor Current f"

Cutoff Choroc te rlstlcs
= O; Vea = lv )
h: = 0 · Vea= 20v)
Emitter Cunent ~ c = 0; Vn = lvl
l co
l co
fgo
5
20
µa
µa
5 µa
I le = 0; VBB = 15v
Coll<ector to Emitter Current
(Vc11 = 20v; RBK = SK; Vu = - Sv)
Hl1h Freque ncy Chara cteristics (Common Base )
l &o
k11x
10
50
µa
µa
( Vea= 6 v; I&= 1.0 mo )
I Alpha Cutoff Frequency

Collector Capacity ( f = l me)
Switching Charocte rlstlcs
Cle = 200 ma, l at = 10 mo; l a:= 10
c ••
r.,.
m11 )
6
12 20
mo
pf
z.s
I Ris.e Time
Storage Time
Fall Time
t,
t,
tr
•Derate 2.5 mw/'C rise above 25°C ambient temperature.
0.7
1.0
)UCO
iueo
iuec
233
2N388
The General Electric 2N388 is a germanium NPN alloy
transistor designed for low power, medium speed switching
service where high gain and control of switching parameters
I
is important.
SPECIFICATIONS
I
ABSOLUTE MAXIMUM RATINGS: ( 25 °C )
Voltoge
Collector to Base Veeo 25 volts
I
Collector to Emitter Vc►:R (R = l 0K) 20 volts
Emitter to Base
Curre nt
V,:no 15 volts
I
Collector lo 200 ma
Power
Total Transistor Dissipation• PT 150 mw
I
Temperature
Storage
Operating Junction
Ts-ro
T,
- 65 to + 100
+100
·c
·c
I
12s·c >
Min. Typ. Max.
I
( l e= 30 ma; Vcz = 0.5v)
(le= 200 mn, Ve£= 0.75v)
Base Input Voltage
h.-.,
hr"
60
30
180
I
(le= 4 ma, lo= 100 ma) VB£ 0.8 volts
Base Input Voltage
(111 = 10 ma, l e= 200 ma) VsJO 0.8 1.5 volts I
Collector Current ( ls = 0, VCB = 25v)
Collector Current(!,: = 0. Vcs = lv)
Emitter Current (le= 0, Vee = 15v)
Emitter Current ( l e = 0, V EB = l v)
lco
lco
h,o
Teo
10
5
10
5
JU\
JU\
114
,ta
I
Collector to Emitter Current
(Vez = 20v, Re&= l0K )
Hlth Fre quencl Characte ristics (Common Basel

Jc&R 50 ,ta
I
(Vee= 6v, h: = 1 ma l
Alpha Cutoff, F requency
Collector Capacity ( f = 2 me)
*-••
Cob
5
12.0 20
me
pf I
Switchln11 Characteristics
( le= 200 ma, l e, = 10 ma, l ei = 10 ma l
Rise Time
Storage Time
t,
t.
.50
.40
1.0
.70
,tSec
jtSCO
I
Fall Time It .20 .70 ,tSCC
•Derate 2 mw/'C rise above 25°C ambient temperature.
I
USN 2N388
Per ~IIL-T-19500/ 65
I
234
I
I The General Electric Type 2N394 is a germanium PNP

alloy junction high frequency switching transistor intended
for general purpose applications where economy is of prime
2N394
Outline D rawing No. 2
importance. As a special control in manufacture, all 2N394
I transistors are subjected to a high pressure detergent test

to enhance reliable hermetic seals and are also aged at a temperature of 100°C for
96 hours minimum.
I SPECIFICATIONS
I ABSOLUTE MAXIMUM RATINGS: C25' C>

Voltage
Collector to Base Vc&o - 30 volts
Collector to Emitter Vcxo - 10 volts
I Emitter to Base
Current
Veno - 20 volts
Collector le i -200 ma
I Power
Power Dissipation• PT 150 mw
Peak Power Dissipation••
I ( 50 µsec. Max 20% duty cycle)
Temperature
P• 500 mw
Storage T sTG - 65 to 100 ·c

I Operatins JuncHon
ELECTRICAL CHARACTERISTICS: ( 25' C I

T, 85 ·c
I D-C Cha racteristics

0-C Base Current Gain
(VcE = - Jv; le = - 10 ma) hr»
Min.
20
Typ.
70
Max.
( Vc,:=-lv; lc = -l00ma ) hr& 10 40
( In = - J.0 ma; l e= -10 ma )
Base Input Voltage
( h = - 1.0 ma; Jo= -10 ma)
Vcg<UT>
Vu
-.04
- .27
-.15
- .35
volts
volts
I
(le= - 100 µa) V~RO -30 volts
( lo = - 100 µa) Vceo -20 volts
I (Rnc = l0K ohms; le = - 600 µa)

( le= -600 µa)
Vi· t;K
V,·Eo
- 15
- 10
- 26 volts
I Cutoff Characteristics
Collector Current ( VCR= - I0v)
Emitter Cur.cnt (V&R = -Sv)
Jc·no
IEso
VaT - 10
-2.5
-2.0
-25
-6
-6
µ.a
µ.a
volts
I Hiljh Fregue ncl Characte ristics

( Vea= - 5v; l e= 1 ma )
Alpha-Cutoff Frequency
(Common Base )
r.,. 4 9 me
Collector Capacitance ( r = l me) c •• 12 20 µµ.I
I Base Spreading Resistnnce r'•

•Dcrnte 2.5 mw/'C £or temperatures over 25' C .
.. Oernte 8.33 mw/'C for temperatures above 25' C.
150 ohms
T RAN SISTOR S P ECIFICATIO N S
I
2N395
The General Electric type 2N395 is a PNP alloy junction
industrial, and data processing applications where high reli-
I
ability and extreme stability of characteristics are of prime
importance.
I
ABSOLUTE MAXIMUM RATINGS : (l 5°CI
Volto9e
SPECIFICATIONS
I
CoUector to Emitte r ( R
Collector to Base
Emitter to Base
~ 10 K ) Vc11a
Veno
V,:ao
- 15
-30
- 20
volts
volts
volts I
Curre nt
Collector le -200 ma I
Power
Dissipation
l!eak Powe r Dissipation•
( 50 µsec. max. 20 % duty cycle) Pc
200
500
mw
mw
I
Temperotures
Storage T■TO - 65 to 100 ·c
I
T, +s5 ·c
I
Operating Junction
ELECTRICAL CHARACTERISTICS: ll5°C I

D-C Chorocterlstlcs
D-C Base Current Cain
( Ve.,= - lv; Io= - 10 ma )
(Ves = -0.35v; le= -200 ma )
br11
hrE
Min.
20
10
Typ. Max.
150
I
Saturation Voltage
(la= -5 ma; le = -50 ma ) Ves<UT) -0.l - 0.2 volts
I
Cutoff Choracteristlcs
Vea= -15v)
Emitter Cutoff Cunent ( Vsa = - l0v )
Jcao
lno
Vu - 15
- 2.5
- 2.0
-30
- 6
- 6
/LAmps
/Lamps
volts
I
High Fre que ncy Charocte ristlcs ( Common base I
( Vea= - 5v; Is= 1 ma )
I
4.5
I
Alpha Cutoff Frequency f•r• 3 me
Collector Capacity ( f = l me) Cob 12 20 /L/Lf
Voltage Feedback Ratio ( f = l me ) h,, 9 X 10-a
Rase Spreading Resistance r'• 130 200 ohms
Swltchin9 Cha rocte rist lcs

l ie= - 10 ma; la,= Is, = 1.0 mo l
Delay Time t• .21
I
,55
Rise Time
Storage Time
Fall Time
t,
t.
tr
.50
.40
• Oerate 8.33 mw/"C increase in ambient temperatu, e over 25"C.
I
I The General Electric type 2N396 is a PNP alloy junction

industrial, and data processing applications where high reli-
2N396
I importance.
I A_BSOLUTE MAXIMUM RATINGS : (2.S•C )

SPECIFICATIONS
I
Voltage
Collector to Emitter ( R ~ 10 K ) Vc11a - 20 volts
Collector to Base Vcao -30 volts
Emitter to Base V"110 - 20 volts
I Current
Collector le - 200 ma
I Powe r
Dissipation
Peak Power Dissipation•
200
500
mw
mw
( 50 Jl,Sec. max. 20 % duty cycle)
I Te mperatures
Storaee TsTO - 65 to 100
I Ope.ratine Junction
ELECTRICAL CHARACTERISTICS: US'C I

T, +85
I D· C Characte ristics
D-C Base Current Cain
(Ve"= -lv; le = -10 ma) hn
Min,
30
Typ. Max.
150
(Ve11 =-0.35v; Jo = -200 ma) hr,; 15
(IB = - 3.3 ma; l e= -50 ma) Vcs CUT> - 0.08 - 0.2 volts
I Collector Cutoff Current

(Vee =-20v)
Emitter Cutoff Current (Vn = - l0v )
lrBO
Iv.so
- 2.5
- 2.0
-6
-6
µamps
µamps
Reach-through Voltage VRT - 20 - 35 volts
I Hl1h Fregenci: Characteristics (Common base)

(Vea = - Sv; ho = 1 ma )
fh,.
I
Alpha Cutoff Frequency 5 8 me
Collector Capacity ( f = 1 me) c •• 12 20 µµf
Voltage Feedback Ratio (f = l me) h,o 10 X 10-a
Base Spreading Resistance r'• 140 200 ohms
I Switchln1 Cha,acte ristlcs

( le= - 10 ma; l a,= l et= 1.0 ma )
Delay Time Id .19 /1,SCC
Rise Time
I
t, .40 /1,SCC
Storage Time t, .60 µsec
Fall Time t, .31 .t<See
• Derate 8.33 mw;♦C increase in ambient temperature over 25' C.
TRANSISTOR S PECIFICATION S I
2N396A
The General E lectric Type 2 396A transistor is a PNP
alloy medium frequency germanium triode intended
primarily for industrial switching applications.
I
ABSOLUTE MAXIMUM RATINGS: (25°C )
SPECIFICATIONS
I
I
Voltoge
Collector to Emitter Vc&O - 20 volts
Collector to Base Vceo -30 volts
Emitter to Base Vt:eo -20 volts
Curre nt
Collector
Power
le -200 ma
I
Dissipation•
Peak Dbsipation• •
Tempe roture
200
500
mw
mw
I
Storage Ts-ro -65 to 100 ·c
ELECTRICAL CHARACTERISTICS: 125' C)
D-C Chorocterlstlcs Min. Ma•.
I
D-C Forward Current Transfer Ratio
(VcE
(Vc1>
=
=
- lv; I c =
-10 ma)
-.35v; Jc= -200 ma)
Low Temperature D-C Forward Current
Transfer Ratio
hFP:
hFtl
30
15
150
I
(TA= -55'C; Vee= - Iv; lo= -10 ma )
Saturation Voltage Collector-Emitter
(le= -50 ma; Ts= 3.3 ma)
Collector to Base (le= - 100 µa)
hrfl
Vcg<UT>
Vcso
20
-30
-.20 volts
volts
I
Emitter to Bast: (Te= - 100 µa) V&BO -20 volts
Collector to Emmer ( lo = -600 µn)
Cutoff Chorocteris tlcs

Collector Cutoff Current ( V cs = -20v)
Vcso
lcso
-20
-6
volts
µa
I
High Temperature Collector Cutoff Current
(TA = +7l'C; Vc;s = -20v)
(VeE = +2.0v; VcE =
-20v; R = l 0 K )
Iceo - 120
-6
/.t&
µa
I
Emitter Cutoff Current (VEe = -l0v) - 6
I
ltB
Reach-through Voltage -20 volts
High Freque ncy Chorocteristics (Com mon Bose )

( Vee= - 5v; h, = 1 ma l
Open Circuit Output, Capacitance ( f = l me)
Switching Choracteristlcs
fblb
Cob
5
20
mes
pf
I
<le= - 10 mo; l e,= l e,= 1.0 m o)
Delay Time
Rise Time
Storage Time
Fall Time
Id
t,
t,
tr
0.10
0.20
0.25
0.20
0.20
0.65
0.80
0.40
1-1See
/.!Sec
/.!Sec
1-1sec
I
•Derate 3.33 lll\V ;•c for incrcnse in nmhient temperature tthove 2s•c.
..Dernte 8.33 mw/'C for increase in ambient temperature above 25'C.
I
USN 2N396A
Outline Drawin g No. 2
Per ~IIL-S-19500/64A
I
The General Electric type 2N397 is a PNP alloy junction

2N397
I high frequency switching transistor intended for military,
industrial, and data processing appllcations where high reli-
importance.
I
SPECIFICATIONS
I ABSOLUTE MAXIMUM RATINGS : 125"C I

Voltoge
Collector to Emitter ( R ;:i l 0 K) Ven - 15 volt.s
I Collector to Base
Emitter to Base
Vcao
VERO
-30
- 20
volt.s
volt.s
I Curre nt
Collector le -200 ma
I
Power
Dusipation 200 mw
Peak Power Dwipatlon•
( 50 µsec. max. 20 % duty cycle) P• 500 mw
I Temperatures
Storage TsTO - 65 to 100 ·c
Operatin" Junction T, + s5 •c
I ELECTRICAL CHARACTERISTICS: 125' C)
I D- C Chorocterlstlcs Min. Typ. Mox.

D-C Base Current Gain
(Veg= -lv; l o= - 10 ma) hn 40 150
(Vcs = -0.35v; le= -200 ma) hPII 20
Saturation Voltage
I (Ia= -2.5 ma; le = -50 ma)
Vcs <UT> -0.07 -0.2 volts
I Collector Cutoff Current

(Vee = -15v)
=
Emitter Cutoff (V&e -l0v)
Icno
I,;eo
VRT - 15
- 2.5
- 2.0
-20
-6
-6
µamps
µamps
volt.s
I Hl1h Fre9encl Chorocteristlcs ICommon bosel

IVcB = - 5v; h : = 1 mo )
Alpha Cutoff Frequency fu• 10 12 me
I Collector Capacity ( f = 1 me )
Voltage Feedback Ratio (f = 1 me)
Base Spreading Resistance
c ••
h,•
r'•
12
11
160
20 µµf
X 10~
ohms
I Swltchln9 Chorocte ristics

lie= - 10 mo; le, = l ea= 1.0 mo l
Delay Time Id .17 µsec
Rue Time t, .3 µsec
I Storage Time
Fall Time
•Dcrate 8.33 mw/ °C increase in
t,
tr
.7
.28
ambient temperature over 25"C.
µsec
µsec
239
TRANSI STOR SPECIFICATIONS
The General Electric Type 2N404 is a germanium PNP

I
2N404
Outline Drawinii No. 2
alloy junction high frequency switching transistor, intended
for military, industrial and data processing applications
where high reliability and extreme stability of characteristics
are of prime importance.
I
SPECIFICATIONS
12s•c 1
I
Vo ltoge
Collector to Base
Emitter to Base
Current
Vn,o
V~BO
V~•o
-24 volts
-25 volts
-12 volts I
I
P~wu
Dissipation• PT 120 mw
Te mpe roture
Storage
ELECTRICAL CHARACTERISTICS: 12s•c1

TaTo -65 to 85 •c
I
D-C Cho roctu lst iu Min. Typ. Max.
Collector to Base Voltnge po = -20 ,.a)
Emitter to Base Voltage ( ., = -20 11a)
Saturation Voltage
ila = -.4 ma; Io= -12 ma;
Ia = -1 ma; l o = -24 ma
Vcao
Vno
Vc11<UT>
V c ■<UT>
-25
-12
- 45
- 40
-.l
-.14
volts
volts
-.1 5 volts
-.20 volts
I
Base Input Voltage
pa= -.4 ma; Io= -12 mal
=
la = -1 ma; Io -24 ma
Cutoff Chara cte ristics
Vs£
Vu
-.24
-.32
-.35 volts
-.40 volts
I
Collector Current
)Vcs = -12 volts; Jg= 0)
Vcs = -12 volts; h, = 0; T.o = S0•C)
Emitter Current
(VltB = -2.5 volts; l o= 0)
l c BO
l cso
llooo
VaT -24
-2
-1
- 40
-S ,.a
- 90 jl&
-2.S I'&
volts
I
Hi&h -Freguenci Chorocterlst lu
Alpha-Cutoff Fr~uency
( Vo•= -6 VO ts; lg= 1 ma )
Collector Capacitance
for•
c ••
4 8
12 20 i<id
me I
(Vcs = -6 volts; h, = 1 ma)
Stored Base Charge
(la= l ma; le= -10 ma) Qo
•Derate 2.86 mwrC increase in ambient temperature above 25•c.
1400 µj<couiombs
I
2N404 Certified to meet MIL-T-19500/ 20
I
I
This is a P P Germanium Alloy Triode transistor intended
2N413
for general use as a medium ~peed switch or amplifier.
I
Voltage
SPECIFICATIONS
12s•c1
V~AO -30 volts
I
Collector to Base
Emitter to Base
(Veti = +0.1 volts)
Vt:HO
Vt•t;o
Vct:X
-20
- 18
-25
volts
volts
I
240
I
I CurNnt
TRANS I STOR SPECIFICATIO NS
I ColJN:tor
Peale CollN:tor
Power
Total Tntnslrtor Dissipation•
lo
1,
-200
-400
150
ma
ma
mw
I Temperotu,.
Storage
ELECTRICAL SPECIFICATION S: (2S°C I

Tno -65to+85 ·c
I D- C Choroctulstlcs
CollN:tor to Base Voltaae (lo= -100 ,u.)
Emltter to Base Voltage (la= -100 ,u)
CollN:tor to Emitter Voltaae
( Jo= -600 14a)
Vcao
Vno
Min.
--30
-20
Typ. Mox.
volts
volts
Vczo - 18 volts
,,,..
I CollN:tor Cutoff Current (Vee = -12v)
Emitter CutofJ Current (Vu= -12v)
A -C Chorocterlstlcs
(Vee = - 6v, l a = 1 mo, f = 1 kc
lcao
lRBO
-5
-5 ,...
unlen otherwlM not..i >
I Common Emitter Current Caln

Output Capacity ( f = 1 me)
Voltage Feedback Ratio (f = l me)
Base Sprudlna Resistance
ht.
c ••
h,•
.-.
30
12
.6
100
pf
X 10-'
ohms
Input Resistance
,.,.
hi• 28 ohms
I
Alpha Cutoff FttqUC"Ocy 6 mes
• o.,rate 2.5 mw/°C for increase In ambient temperature nbove 25"C.
I This is a PNP Germanium Alloy T riode transistor intended

for general use as a medium ~peed switch or amplifier. 2N414
I ABSOLUTE MAXIMUM RATINGS : 12s•c >

SPECIFICATIONS
I Volto9e
CollN:tor to Base
Emitter to Base
ColJN:tor to Emitter
CoUN:tor to Emitter (Vu= +o.lv)
Vceo
V£Bo
Vcao
Vccx
-30
-20
-15
-20
volts
volts
volts
I Current
CollN:tor
Peak Collector
Power
Ir
I,
-200
-◄00
ma
ma
I
Total Transbtor Dissipation• 150 mw
Temperoture
Storage T,TO -65 to85 ·c
I ELECTRICAL CHARACTERISTICS: 12S"C l

D-C Chorocterlstlcs
ColJN:tor to Base Voltaae ( l o= 100,.a)
Emitter to Base Voltage ( la = -100 .,.. )
VC110
Vr.ao
Min.
-30
-20
Typ. Mox.
volts
volts
CollN:tor to Emitter Voltage
I (lo= -600 11,a)

Collector Cutoff Current (Vea= -12v)
Emitter Cutoff Current (Va11 = -12v)
A-C Choroctulltlcs
Vc,:o
l<·AO
IEBO
-15
-5
-5
volts
pa
,..
=
I ( Vea= - 6v, le= 1 mo, f
unless othe rwise noted )
Common £miller Current Cain
Output Capacity (f = 1 me)
1 kc
Voltage Feedback Ratio ( f = l me)

hr,
c ••
h,b
60
12 pf
Bue Sprcadln& Resistance .-. .8
120
X 10..
ohms
I Input Reslstan~
Alpha Cutoff Fttquency ,.,.
h1•
•Ot-rate 2.5 mw/"C for increase in ambient t~mperalures above

28
7
2s•c.
ohm•
mes
241
TRANSISTO R SPECIFICAT IONS I
The General Electric Type 2N448 transistor is a rate-grown
2N44 8
Outline Orawin1 No. 3
NPN germanium device intended for IF amplifier applica-
tions in radio receivers. Special manufactur ing techniques
provide a low value and a narrow spread in collector ca-
I
In IF amplifier service, the
pacity so that neutralization in many circuits is not required.
range in power gain is controlled to 2.5 db. I
AISOLUT( MAXIMUM RATINGS : 12s•c 1

I
Volta9e
Collector to Emitter ( Rn = lOJC)
Collector to Base ( f'mitter open)
Ven
Vcao
15
15
volts
volts
I
Current
Collector lo - 20 ma I
Powe,
Collector Otuipation a t 25°C• Pc 65 mw I
T e mperature
()peratJn1 and Stora1e T£. Tno - 55 1085 ·c
I
ELECTRICAL CHARACTERISTICS:••
IF A"'pllfler Service I
Moxl"'u"' Rotlngs
Collector Supply Volta1e Vee 12 volts
I
Design Cente r Chorocterl1tlc 1
Input Impedance ( I■ = l ma; Vo■ = 5v; f = 455 KC)
Output Impedance (la = l ma; Vea = 5v; f = 455 KC)
Voltage Feedbaclc Ratio
z,
Z.
h,•
500
15
10
ohmJ
K ohm•
X 10· 1
I
( le = l ma; Vea = 5v; f = l me)
Collector to Base Capacitance
(la= I ma; Vea = 5v; f = 1 me)
Fn,qu-,ncy Cutoff ( l a= 1 ma; Ve■ = Sv)
a..., Curttnl Cain (le= l ma; Vea= lv )
C••
fu•
hrs
2.4
5
25
µµ E
me I
I
Minimum Base Current Caln hr■ 8
Maximum Base Current Caln hn 51
If A"'pllfler Perfo,..,once
Collf'Ctor Current
Input Freqw,ncy
~finimum Pow~r Cain in Typical IF Test Circuit
Vee
lo
f
C.
455
23
5
l
volts
ma
KC
db min
I
2.5 db
I
Power Cain Range o f Variation 1.n Typical Ii" Circuit C.
Cutoff Cherocterlstlc s
Collector Cutoff Currrnt (Vee= 5v) Jco .5 ,..
Collector Cutoft' Curttnt ( Vee = 15v) l co
•Deratc l.l mw/"C lncre..., in ambient tem~rature over 25•C.
••All values~ typical unless indicated as a min. or mu.
5 p. mu
I
242
I
The General Electric Type 2N449 transistor is a rate-grown

I NPN germanium device, intended for use as an IF amplifier
in broadcast radio receivers. The collector capacity is con-
trolled to a uniformly low value so that neutralization in
2N449
I rnost circuits is not required. Power gain at 455KC in a

typical receiver circuit is restricted to a 2.Sdb spread. The uniformity provided by the
controls of collector capacity and power gain allows easy and economical incorporation
of this type into receiver circuits. Type 2N449 has special high beta characteristics
I required in the final stage of reflex IF circuits where large audio gain is desired.
I ABSOLUTE MAXIMUM RATINGS : (2S' C l

Voltage
I Collector to Emitter ( Rn = l0K )

C11rrent
Ven
Vceo
15
15
volts
volts
I Collector
Power
le - 20 ma
Pc 65 mw
I
Collector Oiuipation at 25'C•
T empe rature
Operating and Storage T .. , Taro -55 to 85 ·c
I ELECTRICAL CHARACTERISTICS:•• ( 2S' C l

Re flex IF Amplifier Service
I Maximum Ratings
Collector Supply Voltage Vee 9 volts
I Design Cente r Characte ristics

( 111
f
= 1 ma; Vc11 = 5v;
=455 KC except a s noted l
I Input Impedance Z, 700 ohm.s
Output Impedance Zo 7 Kohms
Voltage Feedback Ratio (Vea= 5v; £ 1 me) = hr• 10 X 10·•
Collector to Base Capacitance ( Vca = Sv; £ = 1 me) Coo 2.4 µµl
Frequency Cutoff (Vee= 5v) fu• 8 me
I Base Current Cain ( l e= 1 ma; Ve£= lv )

Minimum Base Current Cain
hn
hrc
72
32
Reflex IF Amplifie r Pe rformance
I Collector Supply Voltage

Collector Current
Input Frequency
Minimum Power Cnin in Typical IF Circuit
Vee
lo
£
C,
455
5
2
24.5
volts
ma
KC
db
I Power Cnin Range of Variation in Typical IF Circuit
Cutoff Cha racteristics

C, 2.5 db
Collector Cutoff Current (Vea= Sv) l co .5

""
I Collector Cutoff Current ( Vca 15v)
•Oerate 1.1 mw
=
re
l co
increase in ambient temperature.
••All values are typical unless indicated as a min. or mwc.
5 µa max
TRANSISTOR SPEC I FI CATIONS I
The General Electric Type 2N450 is a germanium PNP
2N450
Outline Drawin; No. 7
alloy junction high frequency switching transistor intended
for military, industrial and data processing applications
where high reliability at the maximum ratings is of prime
I
importance. As a special control in manufacture, all 2N450
transistors are subjected to a high pressure detergent test to enhance reliable hermetic
seals and are also aged at a temperature of 100°C for 96 hours minimum.
I
SPECIFICATIONS I
Voltot•
Collector t o Base
Collector 10 Emitter
c2s•c1
Vcao
Vcso
-20
-10
volts
volts
I
Emitter to Base
Curr• nt
V""o - 12 volts
I
Collector
Pea.k Collector Current ( 50 ,.sec 20% Duty Cycle)
lo
1.
-125
-350
ma
ma
I
Pow• r
Dis,ipatioo
Peak Power Di••ipalion (50 /1,SeC 20% Duty Cycle)
PT
Po
150
350
mw•
mw•• I
T•Mperotur•
Storage
Operat!o; Junction
Tua
Tl
-65 1085
85
•c
•c I
D-C Chcuacte rlstlcs
12s•c1 I
Min. Typ. Mox.
D -C Base Current Caln
(Vcs = -lv; Io= -10 ma)
(Vcs = -lv; l e= -100 ma)
(Vzc = - lv; 111 = -10 ma)
hr"
hrs
hnCINV>
30
15
110
17
I
Saturation Voltage
( Ia = -.5 ma; lo= -10 ma)
Bue Input Voltage
(b = -.5 ma; l e= -10 ma)
Collector to Ba,e Volla;e ( le = -100 µa)
Vcs•UT1
Vu<UT>
Vcao -20
- .04
-.23
-.2
-.35
volts
volt•
volts
volu
I
Emitter to Base Volta;e (le= -100 µa) V&nO -10
Collector to Emitler Volta;c
(le= -600 µa)
( ls = O; Ven= -12v)
Vcso
lco
-12
-6
volts
1<,a
I
Emitler Cutoff Current
,.,.
(le= O; Vu= -6v)
h:o
VRT - 12
-6
volts
I
Hl1h Fregue nci: Choroct•rlstlcs ( Common Bose l
(Vea= - Sv; h: = 1 mo >
Alpha-Cutoff Frequency
Alpha-Cutoff Frequency Inverse
fhCb
flitb0.S'\')
5 10
4
12 20
me
me
µµE
I
Collector Capacitance (f = 1 me) Cob
Bue SpreadJng R"•utance ( f = 1 me) r'b
•Derate 2.5 mw!°C increase in ambient temperature above 25•c .
..D erate 5.9 mw!°C increase in ambient temp.,rnture above 25•C.
100 200 ohms
I
I
I T R A N SISTOR 8 P E ~ I ON 8
The General Electric Silicon Unijunction Tran-

I sistor is a hermetically sealed three terminal device
having a stable "N" type negative resistance
charactistic over a wide temperatu.re range. A
high peak current rating makes this device useful
2N489 -2N494
OuUlne Orawfnc No. s
I in medium power switching and oscillator applications, where it can serve the purpose
of two conventional silicon transistors. These transistors are hermetically sealed in a
welded case. The case dimensions and lead configuration are suitable for insertion in
printed boards by automatic assembly equi_pment. The Silicon Unijunction Transistor
consists of an "N" type silicon bar mounted between two ohmic base contacts with
I "P" type emitter near base-two. The device operates by conductivity modulation ofa
the silicon between the emitter and base-one when the emitter is forward biased. In
the cutoff, or standby condition, the emitter and interbase power supplies establish
potentials between the base contacts, and at the emitter, such that the emitter is back
I biased. If the emitter potential is increased sufficiently to overcoine this bias, holes
( minority carriers) are injected into the silicon bar. These holes arc swept towards
base-one by the internal field in the bar. The increased charge concentration, due to
these holes, decreases the resistance and hence decreases the internal voltage drop
from the emitter to base-one. The emitter current then increases regeneratively until
I it is limited by the emitter power supply. The effect of this conductivity modulation
is also noticed as an effective modulation of the interbase current.
SPECIFICATIONS
ABSOLUTE MAXI MUM RATINGS : 12s·c1
Volto1•
Emitter Reverse
lnterbase
T,
v...
=1SO'C 60
See Fla. l
volt.I
I Current
RMS Emltt~r
Peak Emitter•
Power
T, = 1so·c 70
z
ma
amps
AV Olulpatlon
◄50 mw••
I AV Dissipation - Stabilized•••
T• mpero tvre
Op,-ratin&
Storage
600
-65 to 150
-65 to 175
mw••
•c
·c
•Capacitor dlschar!(e - 10 p./d or ltss.
I ..Oerate 3.9 mw/"C Increase in ambient temp('rature.

• • •Tot•I power dissipation must be limited by ertc-mal circuit.
Types 2N489-2N4 94 are specified primarily in tlircc
rnngcs of stand-06 and two ranges of iriterbase resistance.
I Each range of stand-off ratio has limits of ± 10% from

the center value and each range of interbase resistance
ha.t limiu of ±20% from the center value.
I 2N489. 2N490
MAJOR ELECTJUCAL CHARACTERISTICS : Min.

2 H489
HeM. Mox. Min.
2 H490
HoM, M••·
I
lnterbase Resistance at ZS'C
Junction Temperature ◄.7
Intrinsic Stand-off Ratio
Modulated Interbase Curr<'nt
,,
Ra•o
.S l
5.6
.56
6.8
.62
6.2
.51
7.5
.56
9.1 ldlohms
.62
( l e= 50 ma; VH = lOv;
T• = 25•CJ . .,,1100, 6.8 12 22 6.8 12 22 ma
I i
Emill<'r Reverse Current
Bl open circuit)
Va,■ = 60v; T, = 25•CJ
(Va1 r: = 10v; T, = 150•C)
Igo
lco
.03
l.8
12
zo
.03
1.8
12
20 ,,,.
fU,
MIHOR ELECTRICAL CHARACTERISTICS: ( Typlcol Voh1esl
I Emitter Saturation Volt•,,.

( Is = 50 ma; VBa
TA = 2S'C)
=
Peak Point Emitter Current
Jiv.. = 25v; TA = 2S'C)
0v;
VllUU,T)
Ir
2.3 3.1 3.8
12
2.◄ 3.3 4.2 volt.I
V ey Voltage v. ◄
1.9 ◄ 12
I
I.I 3.◄ 1.0 1.9 3.5 e!11.1
Valley Current h IZ 19 35 II 19 31 ma
Mu!mum Frequency of Oscillation
( le1 = ◄.S ma; Relaxation
Oscillator) f11u 0.9 0.7 me
amlinued n('J<I pa,ie
TRAN SISTOR~ FICATIONS I
I 2N491 . 2 N492 I
MAJOR ELECTRICAL CHARACTERIST ICS:
lnterbas<' Rrsista_nce at 25°C
M in.
2H491
Hom. Max. Min.
2H492
Hom. Max. I
Junction Tempeniture Ru0 4.7 S.6 6.8 6.2 7.S 9.1 kilobms
Modulated lnterbase Current
( 111 = SO ma· Vss = lOv·
T• = 2s•c'i
Emitter Reverse Current
'
"
IB,«wool
.56
6.8
.62
12
.68
22
.56
6.8
.62
12
.68
22 ma
I
i ,,..
Bl open circuit)
Va_. :: 60v; T,:: 25°C )
(V,._11:: 10v; T, = 150°C)
l so
h:o
MIHOR ELECTRICAL CHARACTERISTICS: CTypical Va luos I
.03
1.8
12
20
.03
1.8
12
20 µ
I
Emitter Soh1rntlon Volta~c
(la= SO ma; Vna = Ov;
T .. = 2s·c>
Peale Point Emitter Cumont
(Vu= 2Sv; T,. = 2S°C )
Valley Volta11e
VsCIATl
IP
Vv
2.5
1.2
13
3.4
4
2.2
20
4.3
12
3.9
37
2.7
1.2
12
3.6
"
2.2
20
.c.s volts
12
3.9
38
,,..
volts
ma
I
Valley Current Ir
Maximum Frequency of OJCillation
(Io, = 4.5 ma; Relaxation
Oscillator) fwu 0.8 0.7 me I
2N493, 2 N494
MAJOR ELECTRICAL CHARACTERISTICS: Min.

2H493
Mom. Max. Min.
2N49 4
Nom. Max.
I
Interbate Rc,sCmnce at 2s•c
Junction Tcmpeniture
Modulated lnterbtUe Current
( l 11 = SO ma; Vu = 10v;
Ru0
18 1 cwoo1
"
.C.7
.62
S.6
.68
6.8
.75
22
6.2
.62
6.8
7.5
.68
12
9.1 lcilobms
.75
22 ma
I
T• = 2s•c> 6.8 12
i Bl open circuit)
Vy :: 60v; T,:: 2S°C )
(Va.-= 10v; T, = lS0°C)
h,o
1110
.03
1.8
12
20
.03
1.8
12
20 ,u.
,,.. I
MINOR ELECTRICAL CHARACTERIST ICS : ( Typ ical Values )
Emitter Saturation Volta~e
( la = SO ma; Vas = Ov;
T• = 25°C)
Peale Point Emitter Cumont
V,:CUT) 2.8 3.8 4.6 3.0 3.9 .C.8 volts
,,..
I
f Vu = 2Sv; T• = 25°C) IP
1.4
4
2.S
12
4.4 1.4 2.5
4 12
<1 .3 volto
I
Va ley Volta1te VY
Valley Current h 14 24 40 12 21 35 ma
Maximum Frequency of Oscillation
( Is1 = 4.S mo; Relaxation me
O,cillator) fuu 0.7 0.65
2 l
ll<T£RB45E R£$1$TANC£ 125°t)· lt11, -MILOHW$
4 5
• 7
RIIS £WITTER POWER Ot$$1PilTIOH < _,_

• t 10 12
I
0-C
I
50°C
60'C
70'C
80'C
90"C
MAXIMUM
AMBIEl<T TEMPERATURE I
IOO'C
ll0'C
I
l40"C
80
MAlllMUM
10 60 50
AU.OWAa.£ l'IT£R8ASE V0l.TAG£-(VNJ...,-110I.T$
FIGUR E
40 30 20100
I
246
I
I TRANSISTOR ~ IFICATIONS
I Per MIL-T-19500/75 USAF 2N489 - 2N494

I The General Electric 2 '497 and 2N498 are silicon

2N497, 2N498
·p double diffused transistors designed for
I Military and Industrial service for medium power

audio to medium frequency applications. The low
saturation voltage and low input impedance make
Outline Drawinic No. 8
I these devices especially suited for either high level linear ampli6er or switching appli-
cations. Typical applications include servo d rive r and output stages, pulse amplifiers,
solenoid drivers, D.C. to A.C. converters, etc.
I SPECIFICATIONS
I ABSOLUTE MAXIMUM RATINGS :

Voltoge
CoUector to Base
us•c >
Vcso
2 N497
60
2N498
100 volts
Collector to Emitter VcEO 60 100 volts
I Emitter to Base VKRO 8 8 volts
Power
I Transistor Dissipation
(Free Air @ 25•C) •
Transi,tor Dissipation
(Cue Tempe rature@ 25•C)..
PT
PT
.8
4
.8
4
watt
watt
I Temperature
Storage TRTO -65 to 200 - 65 to 200 ·c
Operating Junction T, -65 10200 - 65 to 200 ·c
I ELECTRICAL CHARACTERISTICS: <2s•c 1 unless otherwise specifie d
I D-C Chorocterlstlcs
Collector to Ba<c Voltaicc
(Jc= 100 µa, 1& = 0) Vcao 60
2N497
Min. Mox.
100
2N498
Min. Mox.
volts
I Collector to Emitter Voltage

Ck=: 250 µa)
(ls= 250 µa. l e= 0)
Vc&O
Vo:no
60
8
100
8
volts
volts
Forward Current TransFer Ratio
I (k =: 200 ma. Ve&= 10v)

Base Input Resistance
(In= 8 ma, Ve&= 10v)
Saturation Resistance
hF&
hie
12 36
500
12 36
500 o hms
I (le= 40 ma. Jc= 200 ma )
Cutoff Chorocteristics
rcHCttAT) 25 25 ohms
I Collector Cun cnt ( Is= 0, Vea = 30v) l co 10
ODerate 4.57 mw/°Cincrea<e in ambient te mperature above 2s•c.

OODerate 22.8 mw re increase in case tempera ture above 25°C.
10 Jt&
247
I!!tNSISTOR SPECIFICATIONS I
2N497A, 2N498A
The General Electric 2N497A and 2N498A
are Silicon NPN double diffused transistors de-
signed for Military and Industrial service for
medium power audio to medium frequency
I
applications. The low saturation voltage and
low input impedance make these devices especially suited for either high level linear
amplifier or switching applications. Typical applications include servo driver and out-
I
put stages, pulse amplifiers, solenoid drivers, D.C. to A.C. converters, etc.
I
SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS : (lS' C >

Voltoge lN497A lN498A
I
Coll.-ctor to Base
Emitter to Base
Vc110
Vcco
V11so
60
60
8
100
100
8
volts
volts
volts I
Power
Transistor Dissipation
(Free Air@ 25'C) •
T ransistor Dissipation
PT 1 watt
I
( Case T emperature @ 25'C) ••PT
T emperature
5 5 watt
I
- 65 to 200 -65 to 200 ·c
I
Storage TsTo
Operating Junction T, -65 to 200 -65 to 200 ·c
ELECTRICAL CHARACTERISTICS: ( lS' C > unless otherwise spe cified
D- C Chorocterlstlcs
lN497A
Min, Mox.
lN498A
Min. Mox. I
(le= 100 jta, hi= 0)
(Jc= 250 µ.a)
VcBO
VcEo
60
60
100
100
volts
volts
volts
I
(Io= 16 ma) VcEO 60
(le= 10 ma)
( ls = 250 i,a, Io = 0)
Vcso
V•so 8
100
8
volts
volts
I
(le= 200 ma, Vcs = 10v)
(le= 8 ma, Vea,= 10v)
hn
hie
12 36
200
12 36
200 ohms
I
(Ia = 40 ma, l e= 200 ma) r cit(fl,T>
Cutoff Chorocterlstics
10 10 ohms
I
Collector Current
( I E= 0, Vea= 30v)
Collector Current
( High Temperature)
Ico 10 10 ,ua
I
(Is= 0, Vc11 = 30v,
TA = l50'C) !co 250
•Derate 5,72 mw/'C increase in ambient temperature above 25'C .
..Derate 28.6 mw/'C increase in case temperature above 25'C.
250 ,ua
I
248
I
I TRANSI STOR SPECIFICATION S
I T he 2N508 is an alloy junction PNP transistor intended

for dr iver service in audio amplifiers. It is a miniaturized
version of the 2N265 G.E. transistor. By control of transistor
c haracteristics during manufacture, a specific power gain
2N508
Outline Dnowing No. 2
I is provided for each type. Special processing techniques

and the use of hermetic seals provides stability of these characteristics throughout life.
I SPECIFICATIONS
I ABSOLUTE MAXIMUM RATINGS: ( 25• C )
Volto1•
;:a l0K )
I
Collector to Emitter ( RBE VcER -16 volts
Collector to Base Vc■o -16 volts
Current
I Collector - 100 ma
I
Power
Collector Dissipation Pc l◄O mw
I
T emperoture
Operating T.i -65 to 60 ·c
Storag<! TaTO - 65 to 85 ·c
I TYPICAL ELECTRICAL CHARACTERISTICS : c2s·c>
I
D- C Chorocterlstlcs
F\,rward Current Transfer Rntio
(k = -20 ma; Ve& =-lv) hr& 99-198
Collector to Emitter Voltage ( R1,; = l0K; le = -.6 ma) Ven -16 volts
I Collector Cutoff Current {Vc1 = -16v)

Maximum Collector Cutoff Current (Vea = -16v)
lco
lco
-10
-16
ia
µa
I ,...
Smoll Sl11nol Chorocteristlcs
Frequency Cutoff (Vea= -Sv; h = 1 ma) 3.5 me
Collector Capacity (Ve1 =-Sv; h: = 1 ma) Co 24 µµ£
Noise Figure {Vcs = -Sv; le= l ma) NF 6 db
I Input Impedance ( VcE = -Sv; IE = l ma)

Current Cain (Vee= -5v; h: = l ma)
hte
hu
3
11!!.
Kohms
I Thermol Chorocterlstlcs
Thermal ResiJtance Junction to Air 4.0
I Pe rformonce Doto Common Emitter

Power Cain Driver (Vee= -9v)
Power Output
c.
Po
45
1
db
mw
249
TRA N SISTOR S P ECIFI C ATIO NS I
2N524, 2N525
The General Electric types 2N524 and 2 525
are germanium PNP alloy junction transistors par-
ticularly recommended for low to medium power
amplifier and switching application in the fre-
I
quency range from audio to 100 KC. This series
of transistors is intended for military, industrial and data processing applications where
high reliability and extreme stability of characteristics are of prime importance. The
2N524 and 2N525 are equivalent to the 2N44 and 2N43 respectively and may be
directly substituted in most applications.
I
ABSOLUTE MAXIMUM RATINGS : l 2S"C)
SPECIFICATIONS I
Voltage
Collector to Bast'
Collector to Emitte r
(Re£ = 10K)
Emitter to Base
V C KO - 45
-30
- 15
volts
volts
volts
I
Current
Collector
Power
- 500 ma I
Total Transistor Dissipntjon• 225 mw
T emperature
Storage
Operating
Ta-ro
T,
- 65 to 100
85
'C
'C
I
ELECTRICAL CHARACTERISTICS: (2S' C>
Small Sl9no l Charac te rist ics
( Unless othe rwise spe cified Ve = - Sv
common base; IK = - 1 ma; f = I KC I
2 HS24 2 HS 2S
I
Outfut Admi1tance
( nyut AC Open Circuited )
Input mpedancc
( Output AC Short
Circuited )
hob
h1•
Min.
.10
26
Hom.
.65
31
Mox.
1.3
36
Min.
.l
26
Hom.
.6
31
Max.
1.2
35
1tmhos
ohms
I
(Input AC Open Circuited)
( Common Emitter; Output
AC Short Circuited )
Frequency Cutoff
hr•
hr.
fhrb
1
16
.8
4.0
30
2.0
10
41
5.0
1
30
1
5.0
44
2.5
11
64
5.5
X 10...
me
I
=
Output CaCacity ( f
Noise Figure f
BW = 1 cycle)
1 me;
lnput A oricn circuited )
=1 kc;
c ••
NF
18
l
25
6
40
15
18
1
25
6
40
15
llllf
db I
D-C Characte ristics
1
Forward Current Gain
Common Emitte r, l e/la )
Yes = - lv; lc=-20ma )
Vcs = -lv; le = -lO0ma ) hn
Co lector Saturation Voltage
h.-s 19
13
35
31
42 34
30
52
45
65 I
{ Vc r.<UT> - 45 - 70 - 110 - 50 - 75 - 110 volts
I
(le = -20 ma;
Is as indicated ) @ lB= - 2.0 - 2.0 - 2.0 - 1.33 - 1.33 - 1.33 ma
Base Input Voltai:e,
Common Emitter
1 Vn,: - .220 -.255 - .320 -.200 - .243 - .300
cof1~~;c:1~v~ ~u~r;;;;~O ma
l (•o - 5 - 10 -5 - 10
I
(Vcao = -30v ) jl&
Emitt~r Cutoff Current
(V,:eo = - 15v) IEo - 4 -10 -4 - 10 jl8
Collector to Emitte r Voltage
( RH = 10K ohms;
le = - .6 ma) V ,~Klt - 30 -30 volu
-30 volts
I
Reach-through Voltage VKT -30
Therm al Resistance ( k >

Junction Temperature Rise/
Total Transistor Dissipation:
Free Air .27 .27 'C/mw
lnlloite Heat Sink
f
Cit~' ~at Sink in
.11
.20
•Dernte 3.7 mw /°C increase in ambie nt tempe rature above 2s•c .
.11
.20
·c/ mw
•C/mw I
www.SteamPoweredRadio.Com 250 (_
I T R AN SIST OR S PECI FI CAT IONS
I The General Electric types 2 526 and 2N527

are germanium PNP alloy junction transistors
particularly recommended for low to medium
power amplifier and switching application in the
2N526, 2N5 27
frequency range from audio to 100 KC. This series
I of transistors is intended for military, industrial and data processing applications where
high reliability and extreme stability of characteristics are of prime importance.
SPECIFICATIOHS
I ABSOLUTE MAXIMUM RATINGS : ( 25' C)

Voltoge
Collector to Base V CRO -45 volts
I (RBE = 10 K)
Emitter to Base
Current
Collector
-30
- 15
-500
volts
volts
ma
I Power
Total Transi!tor Dissipation•
Temperatu,e
Stom11c Tno
225
- 65 to 100
mw
·c
Opt'rntinl( T, 85 ·c
I ELECTRICAL CHARACTERISTICS: ( 25'C l
Small Sl11nol Chorocte ristlcs
( Unleu otherwise specified Ve= - 5v
common boH; I &= - 1 mo; f = I KC )
I Out~ut Admittance
( n~ut AC Open Circuited)
Input mpedance
h ob
Min.
2HS26
Hom.
.l .42
Mox.
1.0
Min.
.l
2N527
Hom.
.37
Mox.
.9 µ.mhos
33 26 29 31 ohms
I
( Output AC Short Circuited) h1• 26 30
Reverse Volta11e Transfer llatio
( Input AC Open Circuited) h,b 6.5 12 8.0 14 X 10-•
(Common Emiltt>r; Output
AC Short Circuited) hr. 44 64 88 60 81 120
1.3 3.0 6.5 1.5 3.3 7 me
I
Frequency Cutoff fhr•
Output Ca~acity ( f = 1 me;
Input A ofien circuited) Cob 18 25 40 18 25 4 0 p.µ.£
Noise FIJcme r = l kc;
BW = l cycle) NF 6 15 6 15 db
D-C Characte ristics
I Forward Current Cain
l
Common Emitter, le/lo)
V,•c = - lv; lc =-20mn) h,r,:
Vc,:=-lv; l c = -l 00mn) h,r&
Collector Snturntion Voltage
53
47
73
66
90 72
65
91
86
121
- 55 -80 -ll0 -60 -90 -110 volts
I
(le= -20 ma; { V c,:<8AT>
In as indicated)
Base Input Voltage,
=
@ 18 - 1.0 -1.0 -1.0 -.67 - .67 -.67 ma
Common Emitter
(Ve£ = -l v· le= -20 ma) VoE -.190 -.230 -.280 - .180 -.216 -.260
= -5 -10 - 5 -10 µ.a
I (V1·Ro -30v)
Emitter Cutoff Current
(VEeo=-15v)
Colicctor to Emitter Voltage
(Rue= l0K ohms;
k = -.6 ma)
lco
lso
-30
-4 -10
-30
-4 -10 /1,ll
volts
-'l0 -30 volts
I
Thermal Resistance I k )
J unction Temperature Rise/
Total Transistor Dissipation:
Free Air .27 .27 'C/mw
I ln6nite Heat Sink .1 1 .JI 'C/mw

Clip-on Heat Sink in Free Air .20 .20 'C/mw
•Derate 3.7 mw/'C increase in ambient temperature above 25'C.
I Per ~IIL-S-19500/ 60B USN 2N52 6

251
TRANSIST O R S PECI FI CAT ION S I
2N634
Outline Drawing No, 2
The General Electric type 2N634 is an NPN germanium
alloy triode transistor designed for high speed switching
applications. I
ABSOLUTE MAXIMUM RATINGS : ( 25' Cl
Voltoge
Collector to Base
SPECIFICATIONS
Vc-ao 20 vollll
I
Emitter to Base V,:ao 15 vollll
Collcctor to Emitter
Curre nt
Collector
Base
Vc,;o
le
la
20
300
50
300
volts
ma
ma
ma
I
Emitter ho
Temperat ure
Storage
Operating Junction
Power
Ti-ro
TA
-65 to 85
85
•c
•c I
Dissipation P-r 150 mw
EllCTRICAL CHARACTERISTICS: C2S' Cl
Collcctor Voltage
(le= 15 ,ump; le = 0)
Emitrer Voltage
V<·ao
Min.
20
Hom. Ma x.
vollll
I
( le = 10 tamp; le = 0) V&Bo 15 vollll
Collector to mittcr Voltaf"
(le= 600 µamp; R = 0 X )
(Vea= 5v· le = 0)
Vc&a
lrao
VRT
20
20
5
vollll
µamps
volts
I
O-C Curr<,nt Gain
( l e= 200 ma; Ve,:= 0.75v)
Alpha Cutoff Frequen'.I
(Vea= 5v; h: = - ma)
Thermal Characte rl•tlc
hn
r.,.
15
5 8 me I
Derate 2.5 mw/'C increase in ambient temperature over 25'C.
2N634A
The General Electric Type 2N634A is an NPN alloy
transistor designed for low power medium speed switch-
I
ing service where control of switching parameters is
Outline Drawing No. 2 important.
SPECIFICATIONS
I
A BSOLUTE MAXIMUM RATINGS: l2S' Cl
Valtoge
Collector to Base
Emitter to Base
Vcao
Vr&a (R
V&BO
= l0X)
25
20
25
vollll
vollll
volts
I
Curre nt
Collector
Emitter
Power
Dissipation• PT
300
300
150
ma
ma
mw
I
Temperature
Storage
Operating Junction
ELECTRICAL CHARACTERISTICS: l25' Cl except a s note d
D-C Cha ra cte rist ics Min. Typ.
-65 to 100
85
Mox.
·c
·c
I
Forward Current Trnnsfer Ratio
(le= 10 ma, Vee= lv )
( l e= 10 ma, Ve&= lv, T• = -55'C)
(le= 200 ma, Vc11 = .35v )
Base Input Voltage
hv11 40
25
20
.20
55
42
.25
120
.35 vollll
I
(le= 10 ma, la= .5 ma) VBD
(le= 200 ma, Ia = 10 ma)
Saturation Voltage ( Jc= 10 ma, Ia= .25) VcciUT>
Collector Current (Ven= 25v, l e= 0) Jcao
.10
1.5
0.2
6
volts
volts
IL&
I
(Ven= 25v. l& = 0, T• = 71 'C) 80 l{Q
Emitter Current (Vt:s = 25v, l e= 0)
(lcER = 100 µa, Ra,:::: l0K )
I EBO
Ven 20
•Oerate 2.5 mw/'C rise above 25'C ambient temperature.
6 /LIi
vollll I
I
I TRANSISTOR SPECI F I CATIONS
I The General Electric type 2N635 is an NPN germanium

alloy_ tri?de transistor designed for high speed switching
applications.
2N635
SPECIFICATIONS
I ABSOLUTE MAXIMUM RATINGS : 12s•c 1
Volto9e
Collector to Base
Emitter to Bue
Vcso
Vgao
20
15
volll
Collector to Emitter volts
I
Vc,:o 20 volts
Curre n t
Collector le 300 ma
Base Ia 50 ma
Emitter Jg 300 ma
I Tefflperoture
Storage
Operatin11 Junction
Power
Dissipation
T1-ro
T1.
PT
-65 to85
85
150
·c
·c
mw
I ELECTRICAL CHARACTERISTICS: 125' C )

Collector Volta11e
( l e= 15 µamp; b = 0)
Emitter Volla1e
(Is= 10 /,8mp; Jc= 0)
Vcao
Vuo
Min.
. 20
15
Noffl. Mox.
volts
volts
Collector to milter Voltar
I (le= 600 µac?u;

R= 0 X)
Collector Cutoff urrent
(Vea = 5v· Is = 0 )
Reaeh-througb Voltage
D-C Current Gain
V esa
Icao
V11T
20
20
5
volts
µamps
volts
(Io= 200 ma; Ve&= 0.75v)
I
bu 25
Alpha Cutoff F requen~
( Vea= 5v; I■ = - ma) F•r• 10 12 me
Therfflol Chorocterlstlc
Derate 2.5 mw/'C increue In ambient temperature over 2s•c.
I The General Electric Type 2N635A is an NPN alloy

2N635A
I important.
ABSOLUTE MAXIMUM RATINGS : ( 25' C)

SPECIFICATIONS
I Volto1e
Collector to Bue
Emitter to Base
Current
Veao
Ven (R
Vzao
= lOX) 25
20
25
volts
volts
volt•
I Collector
Emitter
Power
Dissipation•
le
fg
300
300
150
ma
ma
mw
Te,..peroture
I Storage
Operating Junction
ELECTRICAL CHARACTERISTICS: 12s· c 1
D-C Choroctulstlcs
Tno
Ts
-65"to 100
85
·c
·c
Min. Typ. Mox.
I Forward Current Transfer Ratio

(le= 10 ma, VCJO = lv )
(le= 10 ma, VeE = I v, T1. = -55'C)
(le= 200 ma, Vee= .35v)
Base Input Volta11e
hn 80
40
40
100
70
240
(le= 10 ma, la= .5 ma) Vai, .20 .24
I
.32 volts
(le= 200 ma, la = 10 ma) 1.5 volts
Saturation Voltage (le= 10 ma, Ia = .17) Vc,:<UT> .085 0.2 volts
Cutoff Chorocteristlcs
Collector Current (Vea= 25v, h ; = 0) lcao
(Vee= 25v, le = 0, TA= 7l'C)
6
,,.
µa
I
80
Emitter Current (VH =25v, le= 0 )
h:ao 6 /<8
( lcu = 100 µa, Ra,: = l0X) Vcu 20 volt,
•Deratc 2.5 mw /'C rise above 2s•c ambient temperature.
The Gene.r al Electric trI)e 2N636 is an NPN germanium
2N636 alloy_ tri~de transistor designed for high speed switching
applications.
SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS : (25"C I
Voltag•
Collector to Base Vceo 20 volts
Emitter to Base V,:eo 15 volts
Collector to Emitter VC'EO 15 volts
C11rr• nt
Collector lo 300 ma
Base la 50 ma
Emitter ls 300 ma
Temperat11r•
Storage
Operating Junction
Power
T,TO
TA
-65 to 85
85
·c
•c _I
Dl.uipation PT 150 mw
ELECTRICAL CHARACTERISTICS: ( 25"C l
Collector Voltage
(le= 15 p.amp; Jg= 0)
Emitter Voltage
Veao
Min.
20
Nom. Max.
volts _I
jl" = 10 t'nmp; le= 0) Vgao 15 volts
Co lector to miller Voltar
fIc = 600 µamp; R = 0 K)
Co lector Cutoff Current
(Vea= 5v· Jg = 0)
Vega
l cao
15
15
5
volts
jiamps
volts
]
Reach-througi. Voltage VRT
D-C Current Cain
35
(le= 200 ma; Vea= 0.75v)
Alpha Cntoff Frequen7
(Vea= 5v; ho = - ma)
Th.,mal Charact• rlstlc
hr■
,.,. 15 17 me ]
De rate 2.5 mw/"C increase in ambient temperature over 25"C .
2N636A
The General Electric Type 2N636A is an PN alloy
J
Outline Drawing No. 2 important.
SPECI Fl CATIONS J
ABSOLUTE MAXIMUM RATINGS : (25°CI
Voltag•
Collector to Base
Emitter to Base
Vno
Vr ,:a ( R
Vv.eo
= 10K)
25
15
25
volts
volts
volts
J
Curre nt
300 ma
Collector
Emitter
Power
Dissipation•
Io
le
PT
300
150
ma
mw
J
T•mp•rot11r•
Storage
Operating Junction
ELECTRICAL CHARACTERISTICS: (25°C I except
T • TO
T,
OS not•d
-65 to 100
85
·c
•c
J
D-C Choracte rlstlcs Min. Typ. Mox.
(le= 10 ma, Vcs = lv)
(le= 10 ma, Vea= Iv~ TA = -55°0)
(le= 200 ma, Vc11 = .-15v)
hn 100
50
50
190
125
300
J
Base lnput Volta!(e
(le= 10 ma, le = .5 ma) Ves .20 .23 .30 volts
(le= 200 ma, la = 10 ma)
Saturation Voltage ( le = 10 ma, Ia = .13)
Cutoff Charoctulstlcs
.075
1.5
0.15
volts
volts
J
Collector Current ( VcK = 25v, IE =
( V<·n = 25v, II, = 0, T• = 7l"C)
0) kBO 6
80
p.n
µa
Emitter Current ( V11B = 25v, l e = 0)
( lcu = 100 11-a, Re£ = l0K)
1&80
Ver.R 15
• Derate 2.5 mw/°C rise nbove 25"C ambient temperature.
6 ,un
volts J
I TRAN SISTOR SPECIFICATIONS
T he General Electric 2N656, and 2N657 are sili-
I con NPN double diffused transistors designed for

Military and Industrial service for medium power
audio to medium frequency applications. The low
2N656, 2N657
saturation voltage and low in{>ut impedance make
I these devices especially suited for either high level linear amplifier or switching appli-
cations. Typical applications include servo driver and output stages, pulse amplifiers,
solenoid drivers, D.C. to A.C. converters, etc.

SPECIFICATIONS
12s·c1 2 N656 2 N657
Voltage
I Collt'ctor to BR•e
Emitter to Base
Power
Tran,istor Dwipatfon
VrBo
Vc&O
Vuo
60
60
8
100
100
8
volts
volts
volt.s
(Free Air @ 2S' C)•

I Transistor Dissipation
(Case Temp.-rature@ 2S'C) ..
Temperotu,.
Storage
PT
PT
Tno - 65 to 200
.8
4
-65 to 200
.8
4
watt
watt
•c
Operating Junction T, - 65 to 200 -65 to 200 •c
I ELECTRICAL CHARACTERISTICS: c2s•c 1 11nle11 othe,..1.. s pecified
2 N656 2N657
D- C Chorocte rlstlu Min. Mox. Min . Mox.
I Collector to Base Voltage

(lo= 100 /J.R, ho= 0 )
CoU.-ctor to Emitter Voltage
(Io= 250 /J.Ai
Emitter to Base oltage
VcBo
Vc&o
60
60
100
100
volts
volts
(l e= 250 /J.8, Ic = 0 ) Vno 8 8 volts
I Forward Current Trans£er Ratio

( lo= 200 ma, Ve~ = 10v)
(In = 8 ma, Vci, = 10v )
hpg
h111
30 90
500
30 90
500 ohms
(le= 40 ma, le= 200 ma) r
I
II.AT) 25 25 ohms
('g
=
Collector Current ( lg 0, Vea = 30v) lco 10 10 /J.8
ODernte 4.57 mw/'C increase in ambient temperature above 25°C.
OODerate 22.8 mw /'C Increase in case temperature above 25'C.
I The General Electric 2N656A and 2N657 A
are silicon NPN double diffused transistors de- 2N656A, 2N657A
I signed for Military and Industrial Service for
medium power audio to medium frequency
applications. The low saturation voltage and
low input impedance make these devices especially suited for either hi_gh level linear
I iimpli6er o r switching applications. Typical applications include servo d river and out-
put stages, pulse amplifiers, solenoid drivers, D .C. to A.C. converters, etc.
SPECIFICATIONS
I ABSOLUTE MAXIMUM RATINGS: C2S' C>
Volto11•
Collt'ctor to Base Vc&o
2N656A
60
2H657A
100 volts
Collector to Emltt~r Vc&o 60 100 volts
I Emitter to Base
Power
Transistor Dlssipatlon
( Free Air @ 25°C )• PT
V&BO 8
1
8
1
volts
watt
Transistor Dissipation
I (Case Temperature@25°C)••PT
Tempe rot ur•
StorAge
Operating Junction
T1TO
T,
~s to 200
5
- 65 to 200
- 65 to 200
-65 to 200
s watt
·c
·c
continued nert page
255
T RANSISTOR ~ IFl C ATIONS I
ELECTRICAL CHARACTERISTICS: 12s •c , unleu otlMrwl,e opeclfled
D- C Chorocte rl,tlc1
(le= 100/!. le = 0 ) Vcao
2 N656A
Min,
60
Mox.
100
2 N657A
Min. Mox.
volb
I
Colleetor to mitter Voltage
I
(le= 250 Ila) Vcr.o 60 100 ~'Olb
Colleetor to Emitter Voltaite
(le= 16 mal Vcr.o 60 volts
Colleetor to Em tier Voltage volt,
( l e= 10 ma) Vt"EO 100
( lr. =250µ, l c=0)
(k = 200 ma. Vee= l0v )
Vzao
hrc
h,r.
8
30 90
200
8
30 90
200
volb
ohms
I
Sa1<Jr! t1 o: i:is~~~= lOv )
( le = 40 ma. le= 200 ma) r('E CIII AT)
Cutoff Cho ro cte ristlcs
Collector Cul'Tent
( le= 0. V<·• = 30v) ko
10
10
10
10
ohms
jl.a
I
I
Collector Current
lHigh Temperature)
I R = 0, Vc B = 30v.
T• = 1so•c> l co 250 250 Jt&
•O.,rate 5.72 mw/"C increase ln ambient trmperature above 25•c.

.. O.,.rate 28.6 mw/"C incn,ase In case temperature above 25•C.
The General Electric Type 2Nl057 is a germanium PNP

I
2N105 7 alloy junction switching transistor intended for low to
Outlln<! Drawing No. 1
medium power switching applications at low frequen-
cies. A llennetic enclosure is provided by the use of
glass-to-metal seals and welded seams.
I
ABSOLUTE MAXIMUM RATINGS : 1u •c ,
Volto1•
SPECIFICATIO NS
-45 volts
I
Collector to Bas., Vcao
j -30 volts
Colle<:tor to Emitter Ru ;:ii 10 X)
CollN:tor to EmHter Vn = 2v)
Emitter to Base
Current
Ven
Vcsx
Vno
-45
-5
-300
volts
volts
ma
I
Colleetor le
Power
T otal Transbtor Dissipation•
Te mperoture,
P-r
T,ro
2 40
-65 to 100
mw
•c
I
Storage •c
T, 85
()p<!ratin11 J unction
ELECTRICAL CHARACTERISTICS : 12s •c ,
D-C Chorocte rlotlc s Min.
Design
Ce nter Mox.
I
Collector to Emitter Breakdown Voltage
(Rec= 10 '\j
le= -600 "amp)
Reach-throu1h oltage
Forward Cur..-nt Transfer Ratio (low current)
(le= -20 ma· Vco: = -Iv)
Forward Current Transfer Ratio (high current)
Vcr.R
Vn
hrc
-30
-45
34 58 90
volts
volb
I
(le= - 100 ma; Ver.= -lv) hn 30 52
Base lnr,ut Voltage
lfor ow current condition{
le = -20 ma; V..-11 = - v)
Satwalion Voltage (low levelb
( la = -1.33 ma; Jc= -2 ma)
V11c
VcactSAT> -60
-230
-80
-280
-130
mv
mv
I
Cutoff Cho roc te ristics
f
Collector Current le = 0\,Vea = - 45v)
Emitter Currt·nt ( e = 0; EB = -Sv)
l<-o
lt:o
- 16
- IO
,.amps
µamps I
Hl11h freguencI Chorocte rlstlu ( Common BoH I
CVc11 = S w; Is= 1 mo ; f = 1 mc l
Output Capacity
Cutofl' Fn-qucncy
c ••
r.,.
20
.5
40
•Oerate 4 mw/"C increase In ambient tcmpernturc above 2-~•C.

60
3.0
,.,J
me I
256
I
The General Electric Types 2Nl086, 2Nl086A,

I and 2Nl087 are NPN rate grown germanium
transistors intended · for mixer/oscillator or
autodyne converters in radio broadcast receiv-
2N1086, 2N1086A.
2N1087
I ers. Special manufacturing techniques provide

a low value and a narrow spread in collector
capacity. Minimum conversion gain and narrow conversion gain spreads are guaranteed.
I CONVERTER TRANSISTOR SPECIFICATIONS

c2s·c >
Voltoge
Collector to Emitter (R111: = l0K )
Collector to Base ( emitter open )
Vcsa
2N1086 2N1086A
9 9
2N1087
9 volts
Veao 9 9 9 volts
I Current
Collector lo - 20 - 20 - 20 ma
I Power
Collector Dissipation at 25•c• Po 65 65 65 mw
I Te mperature
Operating and Storage Te - 55 to 85 - 55 to 85 - 55 to 85
I tLECTltlCAL CHARACTERISTICS:••
Con verter Service
I Maximum ltotlnp1
Collector Supply Voltage Veo 9 9 9 volts
Design Canter Chorocta rl1tlcs
I lnput Impedance
(1111 = l ma; Ve■ = 5v; f = 455 KC )
Output Impedance
( I 11 = 1 ma; Vc11 = 5v; f = 455 KC)
z,
Zo
350 350 350 ohms
15 15 15 Kohms
I Voltage Feedback Ratio

( lz = 1 ma; Vc11 = 5v; f = 1 me )
( l• = l ma; Vea = 5v; f = lmc )
h,b
Co•
5
2.i 2.4
5 5
2.4
X 10-a
,,.,,.f
Frequency Cutoff ( 111 = l ma; Vee= 5v ) f••• 8 8 8 me
I Base Current Gain (Io= l ma; V ea= lv)

Minimum Base Current Gain
Muimum Base Current Gain
bra!
hrt:
hrs
40
17
195
40
17
195
40
17
195
I Converter Performance ( 1600 kcls)

Convenion Gain in Typical Converter
Test Circuit
Conversion Gain Range of Variadon
CG. 24 24 26 db
I in Typical Converter Circuit
4 2 2 db
Collector Cutoff Cunent ( Vce = 5 v) l oo 3 3 3 1/.&fflU:.
I Collector Cutoff Current ( V ea = 5v) Ico .5

•Derate 1.1 mwl°C increase in ambient temperature over 25•C .
. .AU values are typical unless indicated as a min. or max.
.5 .5 ,,..
257
TRAN 918TOR Sl"ECIFI CATIONS I
The General Electric Types 2N 1097 and
2N1097 , 2N1098
2Nl098 are alloy junction PNP transistors in-
tended for low power output and audio driver
service in entertainment equipment. These
I
types are similar to the General E lectric Types
2N322 and 2N323 except for hn limits.
SPECIFICATIONS
I
ABSOLUTE MAX IMUM RATINGS: C2S' Cl
Volto ge
Collector to Emitter ( Rn ;a 10 X) Vcaa
Vcao
-16
- 16
volt,
volts
I
Collector to Base
Current
Collector
Te ..,perot11re
Io - 100 ma
I
Taff -65 to85 ·c
I
Stora1e 85 ·c
()peratln1 Junction T,
Power
P•• 140 mw
Transistor Dissipation•
ELECTRI CAL CHARACTERISTICS : C2S' Cl

D-C Characterist ics
Collector CunentJVea = - 16v)
Forward Cunent ransfer Ratio
leao
2 H10 97
- 16
2 H1 09S
-16 po.max.
I
hn 34.90 25-90
(le= - 20 ma; Ve■ = -lv)
Low Freg11eng Chorocte rlstlcs
(Vo= - Sv; Is = - 1 fflo; f = 1 KC)
Output Ccf.,acity ryplcal) c ••
h,.
25
55
25
45
,,,,., I
Forward urrent ransrer Ratio (Typical)
•Denate 2.3 mw/'C Increase in ambient temperature over 25"C.
The 2Nlll5 transistor is a germanium PNP switching

I
2N11 15 type intended for highly reliable service in missile and
Outline Orawin1 No. 7

other military equipment. I
SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS: US'Cl
Volt ag e
- 20 volts
I
Collector to Base Vcao
volts
I
V ~KO -15
Collector to Emitter - 10 volts
Emitter to Base Vzao
Curre nt
Collector le - 125 ma
Is 125 ma
Emitter
Peale Collector•
Peak Base •
Power
I,
i•
- 500
- 500
500
ma
ma
mw
I
Peak Collector Dissipation 150 mw
Total Trans!Jtor Dissipation
Te fflperot11re
Storage TaTO -651085 ·c I
ELECTRICAL CHARACTERISTICS: US'Cl
DC Chorocte rlstlu
Base Input Voltage ( for low current condition)
( Ia = -0.25 ma; l e =-10 ma ) Vu
Min. Mo~.
-0.4 volts
I
Base lnput Volta1e ( for hlg!> current condition )
I
( la = -1.7 ma; le= -60 ma ) Vas -0.5 volts
Saturation Voltage ( low level) -0.15 volts
(la= -0.25 ma; Jc= -10 ma) Ve,:<UT>
Saturation Voltage ( high current) -0.35 volts
( la = -1.7 ma; le = -60 ma) Vca<UT>
258
I
I TRANSISTOR SPEC IFICATIONS
I Cutoff Chorocterlstlcs
Emitter Current Vse =--10)
Collector to Emitter Current
(Ve■ =-20; Ru= l0K; Vs= 3)
ho
l esx -6
µa
µa
High Freque ncy Chorocterlstlcs (Common Bose )
I ( Vea= - 5v; I E= I mo )
Collector Capacity ( f = l me)
f.,.
c ••
5.0
20
mes
µµf
Switching Characte ristics
I Storage Time
n,ermol Characteristics
Deratc 2.5 mw• JC for temperatures above 25•c
t, 3.0 µsec
I • Duration of intermittent current peaks is limited by the thermal transient response of

of the transistor.
2 N 1121
I The General Electric Type 2Nll21 transistor is a rate-
grown NPN germanium device, intended for use as IF
amplifiers in broadcast radio receivers. The collector ca-
pacity is controlled to a uniformly low value so that
neutralization in most circuits is not required. Power
I gain at 455KC in a typical receiver circuit is restricted to a 2.Sdb spread. The uni-
formity provided by the controls of collector capacity and power gain allows easy and
economical incorporation of this type into receiver circuits. Type 2Nll21 has special
high beta characteristics required in the final stage of reflex IF circuits where large
audio gain is desired.
I IF T RANSISTOR SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS: (25' C>
I Voltage
Collector to Emitter ( Rs11 = l0K)
Curre nt
VCIOR
Vc ao
15
15
volts
volts
I
Collector le -20 ma
Power
Collector Dissipation at 25•c• Pc 65 mw
Temperature
Operating and Storage
I
-55 to 85
ELECTRICAL CHARACTERISTICS:•• 125•c 1

Reflex IF Amplifier Service
I Maximum Rotlngs
Design Ce nte r Chorocterl1tics
Vee 9 volts
(l g= I mo; VcE = 5v; f = 455 KC except as note d )
I Input Impedance
Output Jmpcdancc
Voltage Feedback Ratio (Vea= Sv; f = 1 me)
Collector to Base Capacitance (Ves = Sv; f = 1 me)
Frequency Cutoff (Vee = 5v)
z,
Zo
hn
c ••
f hrh
700
7
10
2.4
8
ohms
Kohms
X 10...
µµl
me
I Base Current Gain (le= l ma; Veg= lv)

Minimum Base Current Gain
Refle x IF Amplifier Performance
hrK
hn
V ee
72
32
5 volts
Collector Currcnt le 2 ma
I Input Frequency
Minimum Power Gain in Typical IF Circuit
Powe r Gain Range of Variation in Typical I F Circuit
Cutoff Chorocte ristlcs
f
G,
G.
455
29.5
2.5
KC
db
db
I Collector Cutoff Current (Ven= Sv)

Collector Cutoff Current (Vee= 15v)
l co
Ico
• D erate 1.1 mw/"C increase in ambient temperature.
••All values are typical unless indicated as a min. or max.
.s
5
µa
,.,amu
TRAN818TOR 8PECIFICATIO NS
I
2 N 1144, 2 N 1145
Outline 0nw1.,. No. 1
The General Electric Types 2N1144 and
2N 1145 are alloy junction PNP transistors in•
tended for low power output and audio driver
service in entertainment equipment. These
I
types are similar to General Electric Types
2Nl097 and 2Nl098 except for package configuration.
SPECIFICATIO NS
I
ABSOLUTE MAXIMUM RATINGS: 12s•c 1
Volto10
Collector to Emitter ( Rn = l0K)
Collector to Base
Ve■a
Vno
- 25
- 25
volu
volu
I
Current
Collector
Temperature
Storage
~ratin1 Junction
lo
T aTO
T,
- 100
-6S to85
85
ma
·c
·c
I
Power
Transistor DISJ(patloo•
EUCTRICAL CHARACTERISTICS: 11s·c t
PT
l NI 144
140
lN114S
mw
I
D-C Cltaractorbtlcs
Collector Current 4_v
e11 = - 25v )
Forwa.rd Cum,nt ransfer Ratlo
( le = 20 ma; Ve■ = l v )
Low Freg11enc2: Choracterlttlca
ln o
hr■
- 16
34.90
- 16
25-90
,.,.mu:.
I
- !;Ii
I ■ = I mo; f = 1 KC t
I
(Ve=
Ouq,ut cc!., 1y ~Typleal~atlo ( Typical ) c.~
h,.
40
55
40
42
t'JU
Forward urrent ransfer
•Oerate 2.3 mw/"C increase In ambient tc-m~rature ove r 2.s•c.
2N119 8
The General Electric Type 2N 1198 is an NPN germa-
nium hi_gh frequency, high meed switching transistor
intended for industrial ancl military applications where
I
Outline Drawing No. 3 reliability is of prime importance. In order to achieve
the high degree of reliability necessary in industrial and
military applications, the 2N1198 is designed to pass 500G 1 millisecond drop shock,
10,000G centrifuge, lOC variable frequency vibration, as well as temperature cycling,
I
moisture resistance and operating and stora&!l lifo tests as outlined in MIL-T-19500A.
The 2N1198 has the same low collector cutoff curre nt and reliability as the 2Nl67 and
is identical to the 2Nl67 on all parameters except voltage. I
SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS : us•c t
Voltage
Collector to Base 25
25
volu
volu
I
Emitt<er to Base
Cunent
Collector
Emitter
lo
Is
5
75
- 75
volts
ma
ma
I
Power
Collector Dlulpatlon ( 25•C ) •
Total Tran11Jtor D[nipatlon (2S•C J ..
Temporoturo
Storage
Pc
PT
T aTO
65
75
85
mw
mw
•c
I
EUCTRICAL CHARACTERISTICS: us•c t
O-C Characterb tlca
Collector to Emitter Breakdown Voltage
( Base 01)('n, k = .3 ma ) BVcso
Min.
25
Design
Center Mox.
volt,
I
( le= 8 maf· Ve• = lv )
Base Input Vo tege
( la =.<17 ma; l e
Saturation Voltage
=
8 ma )
( l11 = .8 ma ; Tc = 8 ma )
hr■
v ••
V c g <UTI
17
.3 . . .
30
.41
.35
90
.6•••volu I
I
I Cutoff Chorocterlstlcs
Collector Cum,nt ( IN = O;_Yca = 15v)
Emitter Cum,nt (le= O; vu= 5v)
Hl9h Frequency Chorocte rlltlcs !Common l•HI
Ico
h:o
.6
.35
1.5
5
I I Yea= 5Yi,.1 ■ = 1 mo)

Alpha Cutoff uequency
Collector Capacity ( f = 1 mo)
Lo w F'!9uency Chorocterbtlcs (Common losel
f•r•
C.•
hr•
5.0 9.0
2.5
7.3
6
me
/i/U
X 10-a
(Yea = 5v; l a = 1 mo; f =

I Fnrwa_td CUl"ent Transfer Ratio
Output Admittance
Input lmot'<lance
Reverse \}oltage Transfer Ratio
270 ''" '
hr•
h o•
h1•
hr•
.952
.l •••
25• ..
.985
.2
55
1.5
Swltchlnp Chorocterlstlcs
I I le = 8 me; l a, = .8 mo; las

Tum-on Time
Stora11e Time
Fall Time
= .8 mo I
t.
to
tr
.4
.7
.2
I • Derate 1.1 mwl°C lnc:rease In ambient temperatutt.

••Derate 1.25 mw/"C Increase tn ambient tem_J>erature.
•••These limits are desip limits within which 98% of production normally falls.
I The General Elect ric Type 2Nl217 is an NPN isolated

case germanium high frequency, hilth speed, low level
switching transistor intended for inaustrial and military
applications where reliability is of prime importance.
2N1217
Outline Drawln11 No. 3
The 2 1217 features extremely low collector cutoff
I current, high D.C. Beta at very low collector current, and low colle<:tor cnpncity. All
transistors are baked 100 hours at 85•C to stabilize characteristics.
SPECIFICATIONS
I AISOLUTE MAXIMUM RATINGS: C25°CI

Yolto1•
C,,llc,ctor to Base
Collc,ctor to Emitter
Vrao
V~&O
20
20
volts
,·oltJ
Emiller to Base Vt!RO 5 voltt
I Cunent
Collector
Power
Total Tn1n1lstor Dissipation•
lo
p,.
25
75
ma
mw
I Tempuoture
Stora11c
Lead ( ½o" +
Tno
~z" from case for 10 sccondJ) T L
ELECTRICAL CHARACTERISTICS: t 2S•C1 unleH otherwise specified
8.5
230
•c
•c
I
D-C Choroctul1tics Min. Typ. Max.
Collc,ctor to Emitter Vohaae ( lo = 300 .11a) V~co 20 volt1
Collf'Ctor Cunent ( h: = 0, Vea = 15v) Icoo .6 1.5 ,u,do
Emitter Cunent ( le = 0, V~B = 5v ) luo .4 1.5 ,u,de
Collf'Ctor Cunent
( h, = O. Ve • = ISv, T .. = 70'C) Jc-MO 11 29 .11•de
I F orward Current Trnnsfrr Ratio

(k = .5 ma. VrK = Iv )
Forward Current Transfer Ratlo
(le= 2 ma, V,·K = Iv)
Forward Current Tmnsfer Ratio
hre
hn
.co
◄0 60
100
100
(It-= 2 ma V,·K = lv, T.l = -55'C) hr■ 20
I Bue Input Volta11e

( 1,. = .2 mo, le = 2 ma)
Satumtlon Volta11e
( la = .2 mn. Ir= 2 ma)
VRP:
Vcg<H1'I
.26
.10
volts
volll
Hl1 h Fre!llency Choroctulstlca ICofflfflOn Basel
I IV,"= 5v I&= 1 mol

Al~ha Cutoff Frequency
Co lector CRpacity ( f = I me )
f• r•
c ••
6.0 9.0
2.5 6
me
""r
-
Swltchlnp Chorocterlstlc■
th- = 2 mo, b, = la, = .1 ma l
I Rise Time
Stnml(e Time
Fall Time
t,
t,
tr
·"
.9
.3
•Ol'rate 1.25 mw/°C lncr..ue In ambient temperature above 25°C.
.6
1.6
.4
Jl$eC
UNI
TRANSIST OR SPECIF I CAT IONS
I
2N 1276, 2N 1277
The General Electric Types 2Nl276 and
2 1277, are silicon NPN transistors intended
for amplifier applications in the audio and
radio frequency range and for general purpose
I
switching circuits. They are grown junction
devices with a diffused base and are manufactured in the Fixed-Bed Mounting design
shock, vibration,
for exteremely high mechanical reliability under severe conditions of sealed
centrifugal force, and temperatu re. These transistors are hermetically in welded
I
cases. The case dimension s and lead configuration conform to JEDEC standards and
are suitable for insertion in printed boards by automatic
SPECIFICATIONS
assembly equipmen t.
I
ABSOLUTE MAXIMUM RATINGS : c2s·c 1
Volto1•
Collector to BI\Se
Voao
Vcco
40 volts
30 volts
1 volt
I
Emitter to Base Vuo
Current
Collector lo 25 ma
I
Powe ,
Collector Dissipation RMS• Po 150 mw
I
Temperoture
Stonase
()pcnatlng Junction
T 1TG
T,
- 65 to200 •c
1so •c
I
ELECTRICAL CHARACTERISTICS: c2s• c 1
D-C Chorocterlt tlca

( l o = SO /Ul, la = 0) Vcao
Min.
40
2H1276
Typ. Mox. Min.
40
2M1277
Typ. Mox.
volts
I
(la = 0, le = 1 ma)
Emitter to Base Volla11e
( I■ = 100 .,.a, le = 0 )
Vcso
Vuo
30
1.0 4.0
30
1.0 4.0
volts
volts I
pow C\lfff!Dt ) 10 20
l e= 10 ma, Vea = 5v )
Satunatlon Voltase ( low levf!I)
( l a = 2.2 ma, Io= 5 ma)
h•■
VegCUTl .49 1.0 ,53 J.0 volts
I
Cutoff Chorocterh tlc,
Collector Current
(h = ~Ven= 30v)
Collector urrf!nt
?lgh tem,rcrature b
lco .001 1 .001 1 ,.,.
I
l a = 0, ca = 3 v,
lco l so 1 so ....
T .. = 1so•c>
Low Freguenci Chorocterlst lu (C.o mmon BoH l

CVca = Sv, l a= - 1 mo, f = 1000 cps I 22 18 33 44
I
Fo rward Current Transfer Ratio hro 9 14
I
ho• .37 1 .30 1 ,unhos
Output Admittance 44 80 30 44 80 ohms
Input Im.qedana, hob 30
h,• 2.4 10 2.6 10 X 10 ...
Revf!rse oltage Transfer Ratio
Noise Figwe Bw = 1 cycle),
( Common ase or Common 22 18 db
Emitter ) NF
Power Cain
(Ve11 = 5v, lo= +l ma,
( = 1000 cp1) c. 37 39 db I
Hl9h Frequenci Chorocterl1tlc1 CCofflfflOfl 801e l
CYcR = 20v, l a= - 1 ma, f = 1 Me l
Output Capacity
Cutoff Frequf!ncy
Co•
,.,. 15
ambient
2.0
30
tempenature
5.0
above
15
25°C.
2.0
30
5.0 .,.JJ,{
me I
• Dt,rate J.2 mw/"C increase in
I
I The General Electric Types 2N 1278 and
TRANSISTOR SPECIFICATI O NS
I 2Nl279 are silicon NPN transistors intended for

amplifier applications in the audio and radio fre-
quency range and for general purpose switch-
ing circuits. They are grown junction devices
2N 1278, 2N1279
I with a diffused base and are manufactured in the Fixed-Bed Mounting design for
extremely high mechanical reliability under severe conditions of shock, vibration,
centrifugal force, and temperature. These transistors are hermetically sealed in welded
are suitable for insertion in printed boards by automatic assembly equipment.
I ABSOLUTE MAXIMUM RATINGS : t2s•c 1

SPECIFICATIONS
I Yoltoge
Collector to Base
Emitter to Base
Veso
Veso
V,:oo
40 volts
30 volts
1 volt
I Current
Collector
Power
le 25 ma
I Collector Dis.! ipation RMS•
Te mperature
Storage
Pc
Tno
150 mw
-65 to 200 •c
Operating Junction T, 150 'C
I ELECTRICAL CHARACTERISTICS 12s·c 1

2M1278 2M1279
I D-C Chorocterl1tlcs
(le= 50 Jt•• Jc = 0 )
Co llector to Emitter Voltage
( le = 0, l e= l ma)
Veeo
Vc,:o
Min.
40
30
Typ. Mox. Min.
40
30
Typ. Mox.
volts
volts
I
(IE = 100 µa, le = 0) VEBO 1.0 4.0 1.0 4.0 volts
( low current )
(Ic = IO ma, Vee= Sv) brio 33 80
Saturation Voltage (low level)
I ( la = 2.2 ma, le= 5 ma)

Collector Current
Ve 11<UT> .56 1.0 .47 1.0 volts
(h: = 0, Ves = 30v )
I
Ieo .001 1 .001 1 µa
Collecto r Current
( high temperature )
(I,: = 0, Vcs = 30v,
TA = 15o•c i rco 1 so 1 50 118
I Low Fre quency Chorocterlstlcs (Common Bose )

(Vee = 5v, Is = - 1 mo, f = 1000 cps )
Forward Curre nt Transfe r Ratio
Output Admittance
hr.
hn
37 66
.18
90
1
76 101
.14
333
1 iunhos
Input Impedance h1• 30 44 80 30 44 80 ohms
I Re verse Voltate Transfer Ratio

Noise Figure Bw
Power Gain
= 1 cycle),
( Common nse or Common
Emitter)
hr•
NF
2.3
15
10 2.0
15
10 X 10-•
db
( Vee= Sv, l e= +1 ma,
I f = 1000 cps) G,
High Frequency Chorocterlstlcs ( Common Bose I

44 45 db
( Yes = 20v, I& = - 1 m o, f =1 me)
I Output Capacity
Cutoff Frequency
Co•
!••• 15
2.0
30
s.o
15
• Derate 1.2 mw /'C increase in ambie nt temperature above 25' C.
2.0
34
s.o 11µ.f
me
263
TRANSISTO R SPECIFICAT IONS I
The General Electric type 2Nl288 is a germanium
2 N 12 8 8
meltback NPN transistor designed for high speed com-
puter switching. All units are aged 150 hours at a
temperature of lOO•C min. to stabilize characteristics.
I
The 2Nl288 is designed to meet the requirements 0£
MIL-T-195 00A. The case dimensions conform to the T0-39 outline and the units are
I
SPECIFICATIOMS
I
ABSOLUTE MAXIMUM RATINGS : us·c1 I
Volto9e
CollE'Ctor t• Emitter
Emitter tn Bn~e
CollN:ior to Base
V<'n ( R:l0K)
Vuo
Vceo
10
5
15
volts
volt,
volts I
Current
Colle<:lor lo 50 ma
I
Power
Dissipntlon• PT 75 mw
I
Temperature
Storage TITO -65 to +85 ·c
I
Operating Junction Temperature Ts -55 to +85 ·c
Min. Typ. Max.

I
RHch-throu!l h Voltage
Colltttor to Emitter Volla1te
=!OK, le= .6 ma )
Vn
Vc aa
10
10
volts
volts
I
(Re11
(le= 10 ma, Vc11 = I v)
Forward Current Tran,fer Ratio
(le= 25 ma, Vc11 = lv )
hr■
hr■
50
30
150
100
300
I
Base to Emitter Voltage
( le = 10 ma, h = .5 ma)
(le= 10 ma, h• = .5 ma )
Colltttor Cutoff Frequency
v ••
VC'aCUT>
.25
.2
0.5
0.3
volts
volts
I
r...
I
(le= 5 ma. Ve= Iv) 40 60
CoJIN:'lor Capacitance
( 111 = 5 ma, Ve= Iv, f = 2 me) c.~ 6 10
"'"''
CollE'Ctor Cutoff Current
(Vea= Sv, l a= 0) l oo 2 5 ,..
Emitter Cutoff Current (Vu= 5v, le= 0) Jao
Switching Speeds
(le= 10 ma, h, = lei= 1 ma)
Rise Time It 60
3 10
100
JLa
m,.sec
I
300
••
I
Storage Time 200 ~
tr 60 100 mj&SCC
Fall Tuue
•Deratc 1.2 mwrC Increase In ambient temperature above 25•C.
264
I
I TRANSI S T O R SPEC IFICA TIONS
The General Electric type 2Nl289 is a germanium
I meltback NPN transistor designed for high speed com-

puter switching. All units are aged 150 hours at a
temperature of 100°C min. to stabilize characteristics.
2 N 12 8 9
I The 2Nl289 is designed to meet the requirements of

MIL-S-19500B. The case dimensions conform to the TO-5 outline and the units arc
I ABSOLUTE MAXIMUM RATINGS : c2s•c 1

SPECIFICATIONS
I Voltage
Emitter to Base
Collector to Bue
V CEll
V1100
15
15
volts
volts
V CBO 20 volts
I Current
Collector le 50 ma
I Power
Dissipation• Pr 75 mw
Temperature
I Storage
Operating Junction
T•ro
T1
- 65 to +100
- 55 to + 85
I ELECTRICAL CHARACTERISTICS 125•c 1 unless otherwise specified

D- C Characteristics
Rench-through Voltage Var
Min.
15
Typ. Max.
volts
Collector to Emitter Voltaiie
I (Reg = 10K, le = 600 14a)

Emitter to Base Voltage (Is = 100 µ)
( lc= l0ma,Vc r; = lv )
Vc Ell
VEuo
hFG
15
15
50 150 300
volts
volts
I Forward Current Tran, fer Ratio

( Ir = IO ma, Ve,o = l v, T• = -5s•C)
Forward Current Transfe r Ratio
( k = 25 ma, Ve r; = lv)
h,c
hn
30
40
80
130
Base to Emitter Voltage
I (le= 10 ma, Io = .5 ma )
Collector Saturation Voltaite
(le= IO ma, IB = .5 ma)
Vee
Vc,o<UTI
.2S
.2
0.4
0.3
volts
volts
I ( Vt·R = l5v,ls = 0)
Emitter Cutoff Current ( VBB = Sv, le = 0)
(VcB = 15v, h; = 0, TA= 70• C)
lco
I F-0
lco
2
2
40
s
s
70
I High Fre quency Characteristics

( IB = 5 ma, Ve= lv) r..,. 40 60 mo
I (lg = 5 ma. Ve= lv, £ = 2 ma)

Switchinit Speeds
( le = 10 ma, ls1 = 1st
Rise Time
=
l ma)
c ••
Ir 60
6 10
100 mjlSeo
I Storai:e Time
Fall Time
• Oeratc
I,
tr
200
60
1.2 mw/"C increase in ambient temperature above 2s•c.
300
100
ml'SCC
mjl.Seo
265
TRANSISTOR SPECIFI CATIONS I
The General Electric Type 2Nl304 is an P alloy
2N130 4
Outline Drawln& No. 2
ing service when control of switching parameters is
important.
I
SPECIFICATIOHS I
AISOLUTE MAXIMUM RATINGS : l lS"C l
Voltot•
Collector to Base
Vceo
Ven ( R = l OK)
25
20
volts
volts
I
Emitter to Base V11eo 25 volts
Cunont
Collector le 300 ma
I
Power
Total Transluor Dissipation•
C25"C Case Temperature) PT 300 mw
I
To111peroture
Storage T1TO -65 to+lOO ·c I
ELECTRICAL CHARACTERIST ICS: 125"C l
D-C Choroctorltt lcs
Forward Cu1Tcnt Transfer Ratio
Min. Typ, Mox. I
h~., 40 70 200
(le= 10 ma; Ve■ = lv)
(le= 200 ma; Ve■ = .35v)
Base Input Voltage
(le= 10 ma, Ia = .5 ma) VB■
15
.20 .25 .35 volts

I
Total Base Revuse CUrTent
(Vea = 20v; V■a = 10v) IBX
Saturation Voltage (le= 10 ma; IB = .25) Vca«UT>
Reach-throu&h Voltage VaT 20
3
.10
8
0.2
/ill
volts
volts I
Cutoff Chorocterlrtlcs
Collector Current (Vea= 25v; I■ = 0)
Emitter Current (VEB = 25v; l o= 0)
I CBO
hso
1.5
1.2
6
6
,..
/i8 I
• Derate 5.0 mw/ °C rise in case temperature above 25"C ambient.
The powu rating In fnee air at 25"C is 150 mw.
I
The General Electric Type 2N 1306 is an NPN alloy
2N130 6
important.
I
ABSOLUTE MAXIMUM RATINGS : ClS"C l
SPECIFICATIO NS I
Voltot•
Collector to Bose
Vc ao
Ven (R = lOK)
25
20
25
volts
volts
volts
I
Emitter to Bosa Vno
Current
Colltttor 300 ma
I
266
I
I Power
I Total T ransistor Dis.1ipation•

(25•c Ca.ie Temperature)
Temperature
P-r 300 mw
Storage TSTo - 65 to + lOO ·c
I ELECTRICAL CHARACTERISTICS : ( 2S' C )

D-C Chorocteristlcs
Min. Typ. Mox.
I ( l e= 10 ma; Vo■ = I v)
(Io= 200 ma; Vc11
Base Input Voltage
=
(le= 10 ma; le= .5 ma )
.35v)
hr■
Vea
60
20
.20
100
.24
300
.32 volts
T otal Ba.ie Reverse Current
I ( Vea = 20v; VBB = 10v)
hx
Saturation Voltage ( Io = 10 ma; Is = .17) Ves<UT>
V11-r 15
3
.085
8
0.2
,,..
volts
volts
I
Cutoff Choroctulstlcs
Collector Current ( Vee = 25v; Jg = 0) Icao 1.5 6 ,,..
E mitter Current ( Vu = 25v; le= 0) bno 1.2 6 /1,&
•Derate 5.0 mw/"C rise in case temperature above 25'C ambient.
I The p0wer rating in free air at 25'C Is 150 mw.
The General Electric Type 2N 1308 is an NPN alloy

2N1308
I transistor designed for low power medium speed switch-
important.
I ABSOLUTE MAXIMUM RATINGS ; ( 2S' C )

Voltoge
Collector to Base
SPECIFICATIONS
Vceo 25 volts
= l 0K)
I Collector to Emitter
Emitter to Base
Current
Ven (R
Vzeo
20
25
volts
volts
Collector Io 300 ma
I Powe r
Total Transistor Dissipation•
( 25'C Case T emperature) 300 mw
I Temperoture
Sto rage
ELECTRICAL CHARACTERISTICS : C2S"C I

Ts-ro -65 10 +100 ·c
I D-C Cho rocte rlstlcs

(le= 10 ma; Vc11 = lv)
(le= 200 ma; Vcz = .35v)
hr"
Min.
80
20
Typ.
150
Mox.
I Base Input Voltage

(Io= 10 ma; Is = .5 ma)
Total Base Reverse Current
( Vee= 20v; VBB = 10v)
Vn1<
lex
.20 .23
3
.30
8
volts
/1,&
Saturation Voltage ( Jc = 10 ma; la = .13) Vcs<UT> .075 0.15 volts
I Reach-through Voltage
Collector Current (Vee= 25v; hi= 0)
VRT
Iceo
15
1.5 6
volts
1,18
I Emitter Current ( V~B = 25v; le = 0) h :eo 1.2

• Derate 5.0 mw /'C rise in case temperature above 25'C ambient.
The power rating in free air at 25'C u 150 mw.
6 1-1a
267
TRANSI STO R SPECIFI CATIONS I
The General Electric Type 2Nl413 is a PNP alloy in-
2N141 3
tended for those industrial audio amplifiers and low
frequency switching applications where cost is of prime
importance. All units are hermetically scaled and are
I
subjected to 100 hours of high temperature bake as well
as a detergent pressure test, thus assuring reliable performance under adverse environ-
mental conditions. Efficient thermal characteristics arc assured by welding the tran-
I
sistor base to the case.
SPECIFICATIONS I
ABSOLUTE MAXIMUM RATINGS: us•c )
Voltage
Coll.-ctor lo Ba,e
C'.ollector to Emitter
Vno
Vrr.• ( Rn :i 10K )
-35
-25
volts
volts
I
V~~o - 10 volts
J::mitt<>r to Bas<'
Curre nt
Collector 1.. -!.?00 ma
I
Power
Collector DuslpnUon• Pc 200 mw I
I
Ta mperohlr•
Stora~e Tno -65 to +85 •c
Operating T, +85 •c
ELECTRICAL CHARACTERIST ICS: 12s•c >

Small Signal Characteristics
CUnless othe rwl•• specified Vr =- Sv common base;
M in. Typ. Max. I
h i= - 1 ma; f = 1000 cps )
Output Admlttnnce
( Input AC Open Circulttd)
Input Admlttan~
h o•
h1•
.1
26
.65
29
1.3
36
1,1mhos
ohms
I
(Output AC Short Circuittd)
Re,~rse Voltage Trans.fer Rnllo
( Input AC ()pc,n Circulttd)
F orward Current Transfer Rntlo
(Common Emitter; Out1mt AC
h,• 1 4.8 10 X 10-'
I
ht• 20 30 41
I
Short Circuited)
fu• 0.8 3.2 me
Fl"t'(JucnC)• Cutoff
Output Cnpaclty
( f = I me; Input AC Open Circuited) c.. 26 40 /1,/,lf
Noise Fi1turc ( f = l kc; Ow = l cycle) NF 6 db
D•C Choroctorlstlcs
t·orward Current Cain ( Common Emitter)
25 36 42
I
(V<•& - - lv; k = - 20 ma) hr■
(Vn: = - I v; le= - 100 ma)
Coll..etnr Saturalion Voltn11c
( le = - 20 ma; Is M indlc.,tcd)
hv11
V('t,:C~AT)
fl, I■ =
23
-70
-2.0
mv
ma
I
Bas,, Input Voltage. Common Emitte r
(\'<"£=-Iv; le = -20 ma)
Coll..etor Cutoff Cu1Tcnt (Vc·oo= -30v)
Emiltcr Cutoff Current ( V ~no = - l 0v)
Vftll
ll'o
h :o
-.255
-8
-5
- 12
- 10
volts
"a
J,IB
I
Collt-ctor to Emitter Voltn1te
( ReR = l 0 K ohms; l e - -.6 ma)
Reach-lh rou11h Voltage
V c•s•
VaT
- 25
-25
•Dcrntc 3.33 mw/"C increase In ambient tempt'rnture above 25°C.
voltJ
volts
I
268
I
I tended for those industrial audio amplifiers and low

importance. AU units are hermetically sealed and are
2N1414
I subjected to 100 hours of high temperature bake as well

as a detergent pressure test, thus assuring reliable performance under adverse environ-
mental conditions. Efficient thermal characteristics are assured by welding the tran-
I ABSOLUTE MAXIMUM RATINGS : (25. C )

SPECIFICATIONS
I Voltoge
Collecto, to Base
Collecto, to Emitter
Emitte, to Bose
Vc ao
Vc-n (Res :;i l0K)
V,:ao
-35
-25
-10
volts
volts
volts
I Curre nt
I Powe r
Temperature
Pc 200 mw
I Storage
Operating
T~TO
T,
-65 to +85
+85
·c
·c
I ELECTRICAL CHARACTERISTICS:
$moll Signal Cho rocterlstlcs
< 2s•c1
( Unless otherwise specified V e = - Sv common base;

Min . Typ. Max.
lg = - 1 ma ; f = 1000 cps)
I Output Admittance
( Input AC Open Circuited)
Input Admittance
( Output AC Short Circuited)
hn
ht• 26
.1 .62
29
1.2
35
µmhos
ohms
I Reverse Voltage Transfer Ratio

( Input AC Open Circuited)
Forward CUJTent Transfer Ratio
( Common Emitter; Output AC Short
h,b 1 5.2 11 Xl0_.
Circuited) ht. 30 44 64
I Frequency Cutoff
Octput Capacity ( f= l me;
Input AC Open Circuited)
Noise Figure ( f= l kc; Bw =
1 cycle)
fotb
Co•
NF
l.0 3.6
26
6
40
me
,.,.,
db
I D-C Chorocte rlstics

Forwrud CUJTent Gain (Common Emitter)
(Vee = -lv; le = - 20 ma) hPl!I 34 52 65
I (Vea,= - lv; l e= -100 ma)

(Jc = - 20 mn; le as indicated)
hr»
Vee<UT)
@la =
30
-75
-l.33
mv
ma
Base Input Voltage, Common Emitter
I (Ves = - lv; le = - 20 ma)

Collector Cutoff Current ( Vceo = -30v)
Emitter Cutoff Current ( V,;110 = - l0v)
Vnl!I
!co
h:o
-.243
-8
- 5
-12
- 10
volt,
,..
/,14
= =
I ( R~R 10K ohms; le
- .6 ma) Ve£&
VKT
-25
-25
•Derate 3.33 mw/"C increase in ambient temperature above 25•c.
volt,
volt,
269
TRAN SISTOR S PECIFICAT~ I
2N141 5
Outline 0...wlng No. 2
tended for those industrial audio amplifiers and low
importance. All units are hermetically sealed and are
I
as a detergent pressure test,
subjected to 100 hours of high temperature bake as well
thus assuring reUable performance under adverse environ-
mental conditions. Efficient thermal characteristics are assured by welding the tran-
I
SPECIFICATIONS
us·c ,
I
Voltoge
Collector to Base
Vc110
Vess (R111: S l0X)
-35
-25
volts
volts
I
Emitter to Base Vuo -10 volts
Current
I
Pow••
Collector Dissipation• Po 200 mw I
I
Te mperature
Storage Taro -65 to +85 ·c
Operating T, +85 •c
Smoll Slg no l Chorocte rbtlc1
( Unlen otherwb• 1p•clfled Ve =
,u •c,
- SY common base;
Min. Typ. Mox. I
= =1000 cpsl
I
111 - 1 mo; f
Output Admittance
( Input AC Open Circuited) ho• .1 .ss 1.0 ,unbos
Input Admittance
( Output AC Short Circuited) b 11, 26 29 33 ohm,
( Input AC ()pen Circuited)
(Common Emitter; Output AC
h,• 1 5.7 12 X 10◄
I
bto 44 64 88
I
Short Circuited )
Frequency Cutoff f•r• 1.3 4 .0 me
Output Capacity
=
( £ 1 me; Input AC Open Circuited) Co• 26 "0 ,.,,.£
Noise Figure (f = 1 kc; Bw = 1 cycle) NF 6 db
D-C Chorocteristlu
Forward Cwn,nt Cain (Common Emitter)
hr■ 53 73 90
I
(Vea= - l v; l e= -20 ma)
(Vc11 = - lv; l o= - 100 ma)
Collector SnturoUon Voltage
( le = -20 ma; la as indicated)
hr■
Vcc<HT>
@Ia=
47
-80
-1.0
mv
ma
I
I
Base Input Voltagt!, Common Emitter
(Vcs = - l v; le= -20 ma) Va■ -.230
- 12 ,,..volts
Collector Cutoff Current ( Vcao = -30v)
Emitter Cutoff Current (Vno = - l0v )
lco
h o
-8
-5 - 10 ,,..
(Ru= l0K ohms; lo= -.6 ma.)
Rt!ach-throu1th Voltage
Vc■a
VaT
-ZS
-ZS
•Dt,rate 3.33 mw/"C incrl'ase in amblt!nt trmpcrature aboVI' 2s•c.
volts
volts
I
270
I
I TRANSISTOR SPEC IFICATIONS
The General Electric Type 2Nl510 is a germanium NPN
I rate grown transistor intended for industrial, military and

data processing applications where operation at high volt-
ages and low currents is required. A low value of collector
2N1510
leakage current at high voltages plus very stable voltage

I with life make this transistor especially sui ted for use in neon indicator and direct indi-
cating counter circuits where high ambient temperatures are encountered and reliability
is of prime importance.
I SPECIFICATIONS
I ABSOLUTE MAXIMUM RATINGS : (25°Cl
Voltoge
I Collector to Emitter ( R = lOK)

Collector to Base
Emitter to Base
V c1:a
VC110
Vseo
70
75
8
volts
volts
volts
I Curre nt
Collector Io 20 ma
I Power
Dissipation• Pc 75 mw
I Te mpe rature
Storage TaTO -55 to +85 ·c
I Operating Junction
Lead Temperature X,H ±¼,n
from Case for 10 Seconds
T1 +85
230
·c
•c
I ELECTRICAL CHARACTERISTICS: (25"Cl
I 0 -C Chorocte rlstlcs
Base Current Cain (Io= l ma. Yes= lv)
Base Current Cain ( le = 4 ma, Yes = l v)
Saturation Volt.a ge
htrll
h i,11
Min.
8
4
Typ.
30
Mox.
90
I (le = 1.0 ma, l o= 4 ma)

Base Input Voltage
( Ia = 1.0 ma, le = 4 ma )
Reach-through Voltage (VEB = lv )
Vcg<S.&T>
v ..,,
VRT 75
.26
.38
volts
volts
volts
I Cutoff Characteristics
I (Vea= 70v, Vas = -5v)

Collector Cutoff Current (Vee = 75v)
Emitter Cutoff Current ( V t:B = 8v)
ku
Icno
l&BO
.5
.6
5
5
10
l&B
jl.8
jt&
I (R = l0K, le = 300 µa) Ves& 70

volts
271
TRANSISTOR SPECI FICATIONS I
The Ceneral Electric Type 2Nl614 is a germanium
2N161 4
Outline Drawlog No. l
PNP Alloy Junction Triode Switching Transistor. It is
intended for military, industrial and data processing
systems where high voltage, reliability, and excellent
I
Applications include neon
counter circuits.
stability of characteristics are of prime importance.
indicator circuits, relay driver circuits and direct indicating I
Voltoge
SPECIFICATIONS
us·c , I
Collc,c,tor to Base Vrno -65 volts
CollKtor to Emitter
Emitter to Base
Vr11a ( R = l OK)
Vn,r ( VH = 2v)
Vuo
-40
-60
-12
volts
volts
volts
I
I
Current
Collector le -300 ma
Power
Dissipation RMS
2◄0 mw
T otal Transistor Dissipation•
Temperature
Stor&J!e
()pc,rating Junc:tJon
P<r
T•To
T,
- 65 to 100
85
·c
•c
I
ELECTRICAL CHARACTERIST ICS:
0 -C Characteristics
Coll""1-0r to Emitter Yoltnge
12s•c ,
Min, Typ. Max. I
I
( RnK = !OK, le= -600 i<a) VeEll -40 volts
( Vu = +2v In series with
Rn= lK. le= -50 ,.a) Vc-1tx -60 volts
Reach-throu11h Voltage Vn -60 volts
Forward Cu=t T rnns£er Ratio
( low current)
(le= -20 ma; Vea= - lv)
F orward Current Transfer Ratio
(hlpi cu=t)
hrn 18 ◄3
I
(le= -100 ma; Yes= -lv)
Base Input Voltage
( £or low eurTent condition)
(le= -20 mn; Yes= -lv)
hr■
v...
13 25
- 240 -300 mv
I
Saturation Voltage
( IB = -2 ma, le= -20 ma)
Cutoff Choracterlstics
Collector Cu1Tent (h: = O; Veno= -65v)
Vc,.<UT>
lro
-90 - 130
-25
mv
,..
I
- 16
Emitter CurTent ( l e= O; V~no = - 12v)
( Ve= - SY; la= - 1 ma; f = 1 Ile )

1 110
Low Fre9uenci Characteristics I Common Bose or Common Emitter )
25
""
I
Forward Cum,nt Transfer Ratio ht•
Output Admittance
Input Impedance
Reverse Voltage Transfrr Ratio
Noise Figure (8w = l eye), ( f = 1 Ile )
h ..
h1•
h,•
NF
0.1
27
1.0
0 .9
31
4.0
1.5
38
13
20
1tmh01
ohms
X 10""'
db
I
Hllh Fre9uencl Choracterlstlcs ( Common Base l
( Ve■ = - SY; I s= - 1 ma; f = 1 me )
Output Cnpnclty c.. 20 40 60 JJ,Jl,l
I
,...
Cutoff Frequency
(Vea= -5v; Is ::: -1 ma;
r = 1000 cps) 0.5
•Derate 4 mw/°C increase In ambient t~mpemture above 25°C.
l.O 3.0 me
I
272
I
I TRA N S ISTO R S P ECI FICA TIO N&
The General Electric Silicon Unijunction

I Transistor is a three terminal device having a
stable "N" type negative resistance charac-
teristic over a wide temperature range. A
2N1671 , 2N1671A.
2N1671B
I stable peak point voltage, a low peak point

current, and a high pulse current rating
make this device useful in oscillators, timing
circuits, trigger circuits and pulse generators where it can serve the purpose of two
I conventional silicon or germanium transistors.
The 2Nl671 is intended for general purpose industrial applications where circuit
economy is of primary importance. The 2Nl671A is intended for industrial use in
I firing circuits for Silicon Controlled Rectifiers and other applications where a guar-
anteed minimum pulse amplitude is required. The 2Nl671B is intended for applica-
tions where a low emitter leakage current and a low peak point emitter current ( trigger
current) are required.
I These transistors feature Ffa:ed-Bed Construction and are hermetically sealed in a
welded case. All leads are electrically isolated from the case.
I ABSOLUTE MAXIMUM RATINGS : (2S' C l

SPECIFICATIONS
Y oltoge
I Emitter Rcvene
InterbMe
30
35
volts
volts
I Current
RMS Emitter
Peak Emitter•
50
2
ma
amps
I Power
RMS Dissipation.. 450 mw
I
Tem pe roturo
Ouerating Range - 65 to +140 •c
Storage Range -65 to +ISO ·c
• Capacitor discharge-l0µfd or leu, 30 volts or less- Total interbase power dissipation
I must be limited by external circuitry•

..Dcrate 3.9 mw /'C increase in ambient temperature.
(Thermal resistance to case = 0.16'C/ mw.)
I 2N1671
ELECTRICAL CHARACTERISTICS: (2S' C l
I Pora met er
Intrinsic Standoff Ratio ( Vee
Jntcrbasc Resistance (Vee =
= 10v)
3v, hi = 0)
11
Reeo
Not e
1
2
Min.
0.47
4.7
Max,
0.62
9.1 kilobnu
Emitter Saturation Voltage
I (Ves =10v, ltt = 50 ma)

Modulated Ioterbase Current
(VBB = I0v, hi = 50 ma)
VgCSAT>
J ~(MOD) 6.8
5
22
volts
ma
=
I (VlllE : 30v, hn
Valley Point Current

0)
Peak Point Emitter Current (Ve11 = 25v)
(Ven = 20v, Re2 = lO0!l)

1110
Ir
Jv 8
12
25
µA
/J,B
ma
continued next paga
273
TRANSISTOR S PECIFICATIO NS I
2N1671A
ILECTRIC:AL C:HARAC:TERISTIC:S : c2s·c:1

I
Paromet• r
Intrinsic Standoff Ratlo ( Vu = 10v)
Jnterbase Resistance (VRB = =
3v, 111 0)
71
Ruo
Note
2
1
Min.
0.47
4.7
Mox.
0.62
9.1 ldloh ms
I
= =
( V1111 10v, J■ 50 ma)
Modulated lnterbase Cu.rnnt
( VBB = 10v, I■ = 50 ma)
VgtUT>
Ja,(WOD) 6.8
5
22
volts
ma I
= = l&o 12 µa
I
(VBtR 30v, 181 0)
Peak Point Emitter Current (Vn = 25v) Iv 25 /LB
( Vu = 20v, Ra.= 100{)) Iv 8 ma
Base-One Peak Pulse Voltage Vo111 3 3.0 volts
2N1671B
I
ELECTRICAL CHARACTERIST ICS : (2S C: >
0
Note Min. Mox.

I
Pororn eter
Intrinsic Standoff Ratlo ( V1111 = IOv )
lnterbase Resistance ( Vn = 3v, h: = 0)
(Vsa = lOv, 1£ = 50 ma)
11
Rno
Vs<~•T>
l
2
0.47
4.7
0.62
9.1
5
lcilobms
volts
I
Modulated lntcrbase Current
=
( V1111 10v, lg = 50 ma)
Emitter Reverse Curttnt
(Va.■ = 30v, Ia,= 0)
IB,<wOD>
l £0
6.8 22
0.2
ma
,,.
,..
I
Peale Point Emitter Current ( Vn = 25v) Ir 6
(VBB = 20v, Ra,= 1000)
Base-One Peale Pulse Voltage
Iv
Vo111 3
8
3.0
ma
volts I
NOTES :
I
1. The intrinsic standoff ration, 'I, is essentially constant with temperature and inter-
base voltage. 'I is defined by the equation:
200
I
V,-= 71V11R + T,-
\Vhere V,,=Peak point emitter voltage
Vu=interbase voltage v,
I
T,= Junction Temperature ( Degrees Kelvin ) ~ - - --(l>----o+20 V
2. The interbnse rcsbti,nce is nearly ohmic and increases

with temperature in a well defined manner. The tem-
I
perature c.-ocfficient at 25"C is approximately 0.8%/"C.
3. The base-one peak pulse voltage is measured in the

circuit below. This specification on the 2N 167 lA is
I
used to ensure a minimum pulse amplitude for appli-
cation;, in SCR firing c ircuits and other type;, of pulse
cirn1its.
I
274
I
I
I TUNNEL DIODES
I The 1N2939 is a germanium tunnel diode which makes

use of the quantum mechanical tunneling phenomenon
thereby attaining a unique negative conductance char-
1N2939
acteristic and very high frequency performance. The
I 1N2939 is designed for low level switching and small
signal applications with frequency capabilities up to 2.2 Kmc. It features a closely
controlled peak point current, good temperature stability and extreme resistance to
I nuclear radiation.
I
I
I L; - - __________...
_ ~ -- -
-'---+-_,__ _..__ _.._.,_ ..__ .....,_ _ v
I TYPICAL STATIC
CHARACTERISTIC CURVE
SPECIFICATIONS
I ABSOLUTE MAXIMUM RATINGS : ( 25°C)
Voltoge
Forward Volta11e•
I Reverse Voltage•
Power
Ois.dpat.ion•• Pc 50 mw
I Temperature
Storage
Operat.i ng Junction
T8TO
T,
-55 to +100
-55 to +100
·c
·c
I ELECTRICAL CHARACTERISTICS: (2S'C > ( 1(1" Leads )
Peak Point Current 1.

Min.
0.9
Typ.
1.0
Max.
1.1 ma
Valley Point Current r. 0.10 0.14 ma
I Peak Point Voltage

Valley Point Voltage
Forward Peak Point Current Voltage
Peak Point Current to Valley
v.
v.
v,.
55
350
500
mv
mv
mv
r.,r.
I
Point Current Ratio 10
Negative Conductance - 11 6.6x 10· • mho
Total Capacity C 5.0 15 1<µfd
Series foductance L.••• 6X 10-• henry
Series Resbtance R, 1.5 ohm
I •Limited by dissipation .
..Dcrnte .66 mw/"C increase in ambient temperature above 25•c.
•••Inductance will vnry (2 to 12) X 10-• henry depending on lead length.
275
TR A N SIST O R S PECIF IC ATI O NS I
1N2940
The 1N2940 is a germanium tunnel diode which makes
I
1N2940 is designed for low level switching and small
signal applications with frequency capabilities up to 2.2 Kmc. It featUies a closely
controlled peak Point cunent, good temperature stability and extreme resistance to
I
nuclear radiation.
I
,,
I
I
'
'
I
I
I
I
l,..
1
I
'
--t-----------
- l-....__.___,1-_--+--+--+---..-- v I
TYPICAL STATIC
CHARACTERISTIC CURVE I
SPECIFICATIONS
c25•c>
I
Voltage
Forward Vohnge•
Reverse Voltage•
Power
I
50 mw
I
Dissipation•• Pc
Temperature
Storage - 55 to +100 •c
Operating Junction - 55 to + 100 •c
Peak Point Current

c25•c • CY•" Leads)
,. Min.
0.9
Typ.
1.0
Mox.
1.1 ma
I
Valley Point Cunent I. 0.22 ma
Peak Point Voltage
Valley Point Voltage
Forward Peak Point Current Voltage
v.
v.
v,.
55
350
500
mv
mv
mv
I
Point Current Ratio
Negative Conductance
Total Capacity
Series Inductance
1,11.
-it
C
L .. •••
8
6,6X 10-a
5,0
6X 10-•
15
mho
µ,,Cd
henry
I
Series Resistance R, 1.5 ohm
• Limited by dissipation .
..Oeratc .66 mw/"C increase in ambient temperature above 25' C .
... Inductance will vary (2 to 1 2) X 10 ... henry depending on lead length.
I
276
I
I TRAN818TOR SP£Cll"ICATIO N8
I The 1N2941 is a germanium tunnel diode which makes

1N 2941
Outline Drawln,: No. 9
I 1N2941 is designed for low level switching and small

signal applications. I t features a closely controlled peak point current, good tempera-
t ure stability and ei1:treme resistance to nuclear radiation.
I
I
I
I
I --,t-_..,__.__ _,___-+-+--+ ----,..---v
v,
I TYPICAi. ST.IITIC
Cll.1111.IICTHlmC CUIIV£

Volto90
SPECIFICATIONS
us·c,
Forwvd Volta,:e•
I Revene Voltaae•
Power
Dissipation••
I Tofflporoturo
Stortge
Pc
TaTO
so
-55 to + 100
rnw
·c
Operating Junction
I •c
T, -55 10 +100
ELECTRICAL CHARACTEIUSTICS: 12s•c1 I Ya* Loods l
Peak Point Current
Valley Point C'11'1tnt
,. Min.
4-.2
Typ.
4-.7
Mo1t.
5.2 rna
I
I, 0.6 1.0 -4 rna
Peak Point Voltage v. 55 rnv
Valley Point Voltage v. 350 rnv
Forward Peak Point C\ll'ltnt Voltaae v,. 500 rnv
Peak Point C'11'1tnt to Valley
I Po.i nt C\ll'ltnt Ratio

Total Capacity
S.,rles I oductance
1,/ 1,
- It
C
L.•••
8
30X 10--
25
sx 10◄
60
mbo
J£iud
beruy
Serles Resirtance R,
I • Limited by dissipation .
..~rnte .66 anw/"C Increase in arnbient temperature above 25•c .
0.5
.. •Inductance will vary (2 to 12) X 10-4 henry depending on lead length.

ohm
TRANSISTOR SPECIFICATIO NS
I
1N296 9
The 1N2969 is a germanium tunnel diode which makes
I
1N2969 is designed for low level switching and small
signal applications with frequency capabilities up to 2.5 Kmc. It features a closely
controlled peak point current, good temperature stability and extreme resistance to
I
,
nuclear radJation.
I
I
I
I
- 1 -......_...--+---+ -+--+---+- --•
I
TYPICAL STATIC
C14AIIACTUISTIC CUIIVf
I
SPECIFICATIONS
u s•c ,
I
Voltoge
Forward Voltage•
Reverse Voltage•
I
Power
Dissipation..
Temperature
Storage
Po 50
-5S to + 100
-55 to +100
mw
•c
•c
I
Operating Junctlon
ELECTRICAL CHARACTERISTICS: u s•c1 (Y,HLeod1l

Min.
2.0
Typ.
2.2
Mox.
2., ma
I
Peak Point Current
I
Valley Point Current .285 .480 ma
Peak Point Voltage 55 mv
Valley Point Voltage 350 mv
Forward Peak Point Curttnt Voltaa:e 500 mv
,.,,.
Point Curttot Ratio
Totnl Capacity
- 11
C
L.,•••
8
16 X 10--
8
6X 10,,.
30
mho
µi,fd
henry
I
Serles Inductance
Serles Rcslstanoe
• Limited by dissipation .
R.
.. Oernte .66 mwr C increase In ambienl temperature above 25•C .

1.0
..•Inductance wlll vary (2 to 12) X 10◄ henry dependin11 on lead length.

ohm
I
I
REGISTERED JE0EC TRANSISTOR TYPES JUNE 1. 1960
---------------- For explanation of abbreviations, see page 299
MAXIMUM RATINGS ELECTRICAL PA RAMETERS
JEDEC Dw9. Po ftlw BVcr; MIN. MIN. MIN. MAX. c,_. Dw1.
Ho. Type Mfr. UH Ho. @ 2s•c BVca• IO fflO T,•c h r.-hu • @ le Mo h r• ftlC G. db lco(,uo l @ Ve a GE No.
2N22 Pl WE Sw 120 -100 -20 55 1.9a
2N23 Pl WE Sw 80 - so - 40 55 1.9a
2N24 Pl WE AF 120 - 30 - 25 50 2.2a
2N25 Pt WE AF 200 - so - 30 60 2.Sa
2N26 Pt WE Sw 90 - 30 - 40 55
2N27 NPN WE Oboole le A so 35• 100 85 100 l
2N28 NP N WE AF A so 30• 100 85 100 .5
2N29 NP N WE AF A 50 35• 30 85 100 l 15 30
2N30 Pt GF. Oboolele 100 30 7 40 2.2a 2T 17T Old G U
2N31 Pl GE Oboolele 100 30 7 40 2.2a 2T 150 25 Old GU A
2N32 Pl RCA Oboolele so - 40 - 8 40 2.2a 2 .7 21T
2N32A Pt. RCA Oboolele so -40 -8 40 2.2a 2 .7 21T
2N33 Pt RCA Oboolele 30 - 8.S -7 40
2N34 PNP RCA Oboolele so - 2S - 8 so 40 .6 40T 2Nl 90 l
2N34A PNP RCA Oboolete so - 2S - 8 so 40 .6 40T 2Nl90 l
~ 2N35 NPN RCA IF 25
CD so 8 so 40 .8 40T 2N169 3
2N36 P NP C BS AF B so - 20 - 8 so 45T 40T 2Nl 91 l
2N37 PNP CBS AF B so - 20 - 8 50 30T 36T 2N190 I
2N38 P NP C BS AF B so -20 - 8 50 1ST 32T 2N l 89 1
2N38A P NP CBS AF B so - 20 -8 so 18T 34 - 12 -3 2Nl 89 1
2N41 P NP RCA AF C 50 - 25 - 15 50 40T 40T - 10 - 12 2N l 90 1
2N43 P NP GE AF 1 240 - 30 - 300 100 30 l .5 - 16 - 45 2N43 l
2N43A P NP GE AF I 240 - 30 - 300 100 30 1 .15 - 16 - 45 2N43A 1
2N44 PNP GE AF I 240 - 30 - 300 100 25T l .s - 16 - 45 2N44 l
2N45 P NP GE Oboolele 155 - 25 - 10 100 25T .s 34 - 16 - 45 2N44 I
2N46 P NP RCA AF C so - 25 - IS so 40T 4T - 10 - 12 2N320 4
2N47 P NP Phil AF D so - 35• -20 65 .975a -s - 12 2N320 4
2N48 P NP Phil AF D so - 35• - 20 65 .970.. -s - 12 2N321 16V 4
2N49 P NP Ph.ii AF D so - 35• - 20 65 .975 - 5 - 12 2N320 4
2NS0 Pl Cle Sw so - 15 - 1 so 2a 3T
2N51 Pt Cle Sw 100 - SO - 8 so 2.2a - 350 - 7
2N52 Pt Cle RF 120 -50 - 8 so
2NS3 Pl Cle o.c -SO - 8
2N54 P NP w AF 200 - 45 - 10 60 .95a 40T 2N1098 16V 2
2NSS P NP w AF 200 - 45 - 10 60 .92a 39T 2N1097 16V 2
2NS6 PNP w AF 200 - 45 - 10 60 .90a 38T 2N320 4
2NS9 PN P w AF Ou t C 180 -25• - 200 85 90T• - 100 35T - 15 - 20 2N321 4
2N59A PN P w AF Ou t C 180 - 40• -200 85 90T• - 100 3ST - 15 - 20 2N321 4
2N59B P NP w AF Out C 180 - so• -200 85 90T• - 100 35T - 15 - 20
MAXIMUM RATINGS ELECTRICAL PARAMETERS
Dwg, Pe mw BVeE MIN, MIN. MIN. MAX. Closest Dwg.

JEDEC T,•c t ,u, me G. db ICO(/La ) @ Vea GE Ho.
Ho. Type Mfr. u,. No, @ 2s·c BVea• le ma h r.-hrg• @ le ma
2N59C PNP w AFOuL C 180 -60• - 200 85 90T• - 100 35T - 15 -20
180 - 25• - 200 85 65T• -100 35T - 15 -20 2N32I 4
2N60 PNP w AFOuL C -20 2N32 I 4
2N60A PNP w AFOuL C 180 - 40• - 200 85 6ST• - 100 35T - 15
PNP w AFOuL C 180 -so• -200 85 6ST• - 100 35T - 15 -20
2N60B 6ST• 100 35T - 15 -20
2N60C PNP w AFOuL C 180 -60* -200 85
C 180 - 2s• - 200 85 45T• 100 35T -15 -20 2N320 4
2N61 PNP w AFOuL
C 180 - 40• - 200 85 45T• 100 35T - 15 -20 2N320 4
2N61A PNP w AF OuL - 15 -20
2N61R PNP w AFOuL C 180 -so• - 200 85 45T• 100 35T
2N61C PNP w AFOuL C 180 - 60* -200 85 4ST• 100 35T - 15 -20
2N62 PNP Phil Oboole t.e 0 50 - 35• -ZO .975aT
Ray AF A 100 -22 - 10 85 22T I 39T -6 -6 2Nl07 I
2N63 PNP 41T -6 -6 2N322 4
2N64 PNP Ray AF A 100 - 15 - 10 85 45T l
A~' A 100 -12 - 10 85 90T l 92T - 6 -6 2N323 4
2N65 PNP .2 -300 - 40
2N66 PNP W'l Oboolete lW - 40 .SA 80
A 2W -2s• -I.SA 70 23T
2N67 PNP Syl Pwr
2N68 PNP Pwr A 2W -2s• - I.SA 23 - 150 ma
2N71 PNP ~t Pwr lW -50 -250 60 .25 20
2N72 PL RCA Ob10lete 50 - 40 -20 55 2.5
~ 200 -so 2N1614 l
0
2N73 PNP w Sw 2Nl614 l
2N74 P NP w Sw 200 -50 l
Sw 200 -20 2N16l4
2N75 PNP w
50 -20• - 10 60 .90a 1.0 34 - 10 - 20 2N322 4
2N76 PNP GE OblOlete 44T - 10 - 12 2NJ24 4
2N77 P NP RCA AF C -2s• - 15 85 55 .70
RF/ IF 3 65 15 20 85 45• l 5 27 3 15 2N78 3
2N78 N PN G F.
20 20 85 45• l 5 29 3 15 2N78A 3
2N78A NPN GE RP/ IF 3 65 2N32I 4
2N79 PNP RC A AF C 35 -30 - so 46 .7 44
B so - 25 -8 100 SOT -30 - 10 2N508 2
2N80 P NP CBS AF .
Ob..,lete so - 20 - 15 100 20 I - 16 -30 2N l 098 2
2N81 PNP GE - 16 - 30 2NI098 2
2N82 P NP CBS AF 35 aL 71° C -20 - 15 100 20 1
30 20 5 75 40T .5 3T 25T 3 10 2N634 2
2N<H NPN Syl RF A
RF A 30 20 5 75 40T ,5 6T 25T 3 10 2N634 2
2N94A NPN Syl 23T
2N95 NPN Syl Pwr A 2.SW 2s• 1.5 70 40 .4T
2N96 PNP RCA Ob10lete 50 -30 -20 55 35 .s
A 50 30 10 75 .85a .5 38T 10 4 .5 2Nl69 15V 3
2N97 NPN GP IF 5 30 2Nl69A 25V 3
2N97A. NPN GP It' A 50 40 10 85 .85a .5 38T
50 40 10 75 .95a .8 47T 10 4 .5 2N l 69A 25V 3
2N98 NPN GP IF A
IF A 50 40 10 85 .96a .8 47T 10 4.S 2N169A 25V 3
2N98A NPN GP 47T 10 4 .5 2N169A 25V 3
2N99 N PN GP IF A 50 40 10 75 .95a 2.0
A 25 25 5 50 .99« 2.5 53T 10 4.5 2N170 6V 3
2NIOO NPN GP IF
2NI0I PNP Sri Pwr A IW - 25• - 1.5 70 23T
2N102 NPN Syl Pwr A lW 25• 1.5 70 23T
50 35 10 75 .60a .75T 33T 50 35 2N170 6V 3
2Nl03 N PN GP IF A
- :
------------- --
JEDEC
No. Type Mfr. Use
Dwg.
No.
Pc mw
@ 2 s •c
BVc &
BVcn • lc ma T, •c
MIN. MIN.
h 1o-h r,:• @ le mo hr• mc
MIN.
G. db
MAX.
lco( IUI I @ Vc 8
Closn t
GE
Dwg.
No.
2N!0l PNP RCA AF A 150 -30 -so 85 44 .7 33T - 10 - 12 2Nl4l5 2

2NI05 PNP RCA AF C 35 - 25 - 15 85 55 .1 ,75 42 - 5 - 12 2N321 4
2Nl06 PNP Ray AF A JOO - 6 - 10 85 25 .8 28 -12 - 6 2Nl097 2
2 N107 PNP G~ AF I 50 - 6 - 10 60 20 .6 - 10 - 12 2NI07 I
2N108 l'NP CBS AFOuL B 50 - 20 - 15 2N322 4
2N109 PNP RCA AF A 150 -25 -70 85 75• 30T 2N320 4
2NIIO Pt WE Sw A 200 - so• - so 85 32 1.5
2Nlll PNP Ray IF A 150 - 15 200 85 15 3T 33T - 5 - 12 2N394 2
2NI !IA PNP Ray IF A 150 - 15 - 200 85 15 JT 33T -s - 12 2N394 2
2Nll2 PNP Ray IF A 150 - 15 - 200 85 15 ST 35T - 5 - 12 2N391 2
2N I 12A PNP Ray IF A 150 - 15 - 200 85 15 ST 35T - 5 - 12 2N394 2
2Nll3 PNP Ray RF A 100 - 6 -s 85 45T I0T 33T 2N394 2
2Nl14 PNP Ray R~• Sw A 100 - 6 - 5 85 65T 20T 2N394 2
2Nll7 NPN Tl Si ( -903) A 150 ao• 25 150 .90a l l 10 30 2N332 4
2Nll8 NPN Tl Si C-904) A 150 30• 25 150 .9S.. l 2 10 30 2N333 4
2Nll9 NPN Tl Si A~' A ISO Jo• 25 150 .914a I 2 10 30 2N335 4
2Nl20 NPN Tl Si AF A 150 45• 25 175 .987« l 7T 2 30
to 2Nl22 NPN Tl Pwr 8.75W 140A 150 3 100 10 ms so
00 2N123
... PNP GE Sw 1 150 -15 -125 85 30• - 10 5 - 6 - 20 2Nl23 1
2N124 NPN Tl Sw A 50 10• 8 75 12• 5 3 2 5 2N293 3
2Nl25 NPN Tl Sw A so 10• 8 75 24• 5 5 2 5 2Nl67 3
2N126 NPN Tl Sw A so 10• 8 75 48• 5 5 2 5 2Nl67 3
2Nl27 NPN Tl Sw A 50 10• 8 75 100• 5 5 2 5 2N167 3
2Nl28 PNP Phil SB Oac: 0 30 - 4.5 - 5 85 .95 .5 45 fmu - 3 - 5
2N129 l'NP Phil SB RF 0 30 - 4.5 - 5 85 .92 .5 30 fmu - 3 -5
2N130 PNP Ray AF B 85 -22 - 10 85 22T 39T 2Nl413 2
2N!30A PNP Ray AF B 100 - 40 - 100 85 14 1 .7T 40T - 15 - 20 2Nl413 2
2Nl31 PNP Ray AF B 85 - 15 - 10 85 45T •IIT 2Nl413 2
2Nl31A PNP Ray AF B 100 - 30 - 100 85 27 I .BT 42T - 15 -20 2Nl413 2
2N132 PNP Ray AF B 85 - 12 - 10 85 90T 42T 2N32l 4
2N132A PNP Ray AF A 100 - 20 - 100 85 56 I IT 44T - 15 -20 2N321 4
2Nl33 PNP Ray AF B 85 - 15 - 10 85 25 36T - 12 - 15 2Nl4l4 3
2Nl33A PNP Ray AF B 100 - 20 - 100 85 SOT I .BT 38T -IS - 20 2N l414 3
2Nl3S PNP GE Obl!olete 1 100 - 12 - 50 85 20T 4.ST 29T 2N394 2
2Nl36 P NP GE Oboolete 1 100 - 12 - so 85 40T 6.5T 31T 2N394 2
2Nl37 PNP GE Obl!olete 1 100 - 6 -so 85 60T I0T 33T 2N394 2
2Nl38 PN P Ra:r AF Out B so - 12 - 20 50 140T JOT 2NS08 2
2Nl38A P NP Ray AF Out B 150 - 30 - J OO 85 29T
2Nl388 PNP Ray AF Oat B 100 - 30 -100 85 29T
2N139 PNP RCA If A 80 - 16 -15 85 48 1 6.8 30 -6 -12 2N394 2
2Nl4-0 PNP RCA Osc A 35 - 16 - 15 85 45 .4 7 27 - 6 - 12 2N394 2
2Nl41 PNP Sy! Pwr 4W - 30 -.SA 65 .97S..T 50 .4T 18T - 100 - 20
Pc mw IVcs MIN. MIN. MIM. MAX. CIOHtt Dw9.

JEDEC Dwg. G, db lcol.-o l @ Vc,, GE Mo.
Ty,- Mfr. u.. Mo. @ l 5'C IVc•• le fflO T,'C I h i.-h ra:' @ le ma ,-.,. me
Ho.
4W 30 .8A 65 .97S..T - so .4T 26T - 100 20
2Nl<l2 N l'N Syl l'wr SO .4T 26T - 100 -20
l'NP Syl l'wr 4W - 30 -.8A 6S .975aT
2N143 .8A 65 .975!!.._ 50 .4T !!6T 100 20 I
2NIH N l'N Syl l'wr 4W :10
20 5 75 30 30 3 9 2N29J 3
2NUS N l'N Tl It" A 65 33 3 9
NPN Tl If' A 6S 20 5 75 33
2Nl46 5 75 J6 J6 3 9
2Nl47 l\PN Tl It" A 65 20
75 :12 3 12 2Nl69 3
2Nl48 NPN Tl ·--- 1 ►' A 65 16 S 3
:12 5 7S 32 J 12 2111169
2Nl48A Nl'N Tl I f' A 65 3 12 2N169 J
A 65 16 5 75 35
2Nl49 Nl'N Tl IP 35 3 12 2N169 3
2Nl49A Nl'N -r ,---1 ►' A 6_5_ _ _ :12_ _ _5 75
75 38 3 12 2Nl69 3
2NISO NPN Tl I ►' A 65 16 S 12 2N169 3
65 J!! 5 75 J8 J
2NISOA NPN Tl It' A
8.SW - -:10* -:IA 85 . IST 30 I mo -30
2N ISS l'N I' CKS l'wr .SA . IST Jl I ma - :10
P NP CnS l'wr 8.5W - :10• - 3A 85 H•
2N IS6 20• .SA .I I ma -60
2NIS7 P NP C HS l'wr 8.5W - 60• -3A 85
~ 9 0 - - - - - = : 1A 85 20• .SA- - .1 I ma - 90
2Nl57A l'NP C l~ ' wr .SA . IST 37 I ma - 60
l'NP C IIS l'wr II.SW - 60• -3A 85 21•
2NISI - JA 85 21* .SA .15 I ma - 80
2N IS8A P NP CnS P-..r I .SW - 80• ,.
--- 150 --- ----
.9o - 1 4T 3-ff --
5 40
-- 2N3:12 4
~ 2Nl60 Nl'N
----- -- - - - 1;1' Si IP A ISO 40• 25 2N332 4
t-:> 150 ,10• 25 150 .9o - 1 4T MT S 40
2Nl60A NPN (:t' Si l f' A S 40 2NJ1!1 4
A ISO 10• 25 150 .9S.. - I ST J7T
2Nl61 Nl'N (.I' Si R P 4
10* 25 ISO .9S.. - I ST 37T 5 40 2N3.1l
2N l 61A Nrrr-f.P Si Rt• A 150 S IO 2N1lS 4
A 150 'IO• 25 ISO 9S.. - I 8 38T
2Nl62 NPN GP Si RP - I I JIIT 5 40 2N3.15 4
Nl'N (';p Si Rt· A ISO 10• 2S ISO 95cr
2Nl62A - ,- - - 40T
6'1' - - S 40- 2N335 ,1
NPN GI' Si II ►----- A- - I ~ 4~ 5 ~ .97S..
2Nl63 - I 6T 40T 5 40 2N:IJ5 4
N PN (; I' Si Rt" A 150 111• 25 ISO .97S.. :I
2Nl6JA !!O 50 3:!T l ST 24T S 5 2Nl70
2N166 NPN C-:F: Obool~tr C 25 6
85 17• 8 5 --- 1.5 15 2N167 3
!!N167 Nl'N c;t: Sw 3 6-5- - ~1~ 5 3
3ll 75 85 17" 8 S 1.S 15 2Nl117A
2Nl67A NPN <:t: Sw 3 6.<; 2N29J 3
55 15 20 75 20T I 6T !!8 5 15
~611 NPN GI•: IP l
85 :?3* I S 28 5 IS 2Nl086 3
2Nl611A N PN Gt-: O'-let-, 3 65 IS :?O 2Nl69 3
65 15 20 85 :11• I 8T 27 S IS
2Nl6'1 NPN C-:E l~' 3 l BT :?7 S 15 2Nl69A 3
(:t: AP .1 65 15 20 85 Ji•
2N169A Nl'N
- --- - - --- --- --- SO .9S..T I IT 2:!T 5 5 2N170 3
---
21'170 NPl\
----
Gt: IP J !!S 6 !!O 2N293 3
16 S 75 :?2 3 9
2N17!! 1\l'l\ Tl IP A 65 40T -.5 ma - 40
l'wr IOW - 60 -1:IA 95 SST• IA .6T
2N l 73 PNP Dir -60
40W - so---=-i"iA 95 40T* IA .:!T :l9'r - t o ma
2Nl74 P NP Ol_c _ _ _Pwr - 8 ma -80
l'wr 85W -80 - l SA 95 40• 1.2A .I
2Nl74A P NP Ole 85 65 .5 2 43T - 12 -25
2N175 PNI' HCA AF A 20 - )() - 2
- ~ - 12 ~ 80 --- --
25T -
2N176 I~ \1otoc- l'wr
,.,._, 3W - 12 -600 80 29T
2N l 711 -PN P \fol«
- ZO -60 88 3:!T
~ PN I' \1o1A>< l'wr
---------------- JEDEC
Type Mfr. Use
Dwg.
No. @
MAXIMUM RATINGS
Po mw BVcr.
BVca• le ma T,'C
M I N.
ELECTRICAL PARAMETERS
h re•h n " @ lo ma
MIN.
f u• me
MIN.
G, db
MAX.
lco(µ.a l @ Vea
Closest
GE
Dwg.
No.
Ho. 2s•c I
2N180 PNP C BS AF Oul B 150 - 30 -25 75 60T .7 37T 2N32l 4
2N181 P NP CBS AF Oul II 250 -30 -38 75 60T .7 34T 2N321 4
2N l 82 NPN CllS Sw ll 100 25* 10 85 2ST• 2.5 3T 10 2N634 2
2N 183 Nl'N C IIS Sw ll 100 25* 10 85 SOT• 5 3T 10 2N634 2
2NIRi NPN C BS Sw R 100 25* 10 85 lOOT• 10 3T 10 2N635 2
2Nl85 l'N I' Tl AF Oul A 150 -20 - 150 75 35 - 100 26 15 -20 2N320 4
2N186 l'N I' G~: Ohsolelc I 100 -25 200 85 24T• - 100 .BT 28 - 16 -25 2Nl86A I
2N186A l'NI' GE ,H 'Oul I 200 -25 200 85 24T* - 100 .ST 28 - 16 -25 2N l86A I
2N187 l'N I' G~: Ohsolelc I 100 -25 200 85 361'* - 100 IT 30 - 16 -25 2N187A I
2Nl87A l'N I' GF. AF Oul I 200 -25 200 85 361'* - 100 IT 30 - 16 -25 2N187A l
2Nl88 l'N I' (,E Ohsolelc I 100 - 25 - 200 85 54T* 100 1.21' 32 - 16 -25 2N188A 1
2N188A l'NI' GF. AF Oul I 200 - 25 - 200 8S 54T• 100 1.21' 32 - 16 -25 2N l 88A I
2N189 l'NI' G~; A~' I 75 -25 -50 85 241'* I .8T 37 - 16 -25 2N l89 I
2N190 l'NP G~~ AF I 75 -25 - 50 85 36T• I I.OT 39 - 16 -25 2Nl90 I
2N19I l'N P G~; AF I 75 -25 -50 85 51T* I 1.2T 41 - 16 -25 2N19 I I
2Nl92 l'NI' <:E At ' I 75 -25 -50 85 75T• l I.ST 43 - 16 - 25 2Nl92 I
2N193 NPN Syl 0.., A 50 15 75 3.8 l 2 40 15 2NI086 3
t<> 2Nl94 Nl'N $yl 0.C A 50 15 75 4 .8 l 2 1ST 40 15 2NI086 :I
~ - 2Nl'HA Nl'N Syl 0.., A 50 20 100 75 5 l 2 20 50 18 2N1087 3
2N206 PN I' HC A At ' A 75 - :'10 -50 85 47T .8 2Nl4 l4 2
2N207 l'NI' Phil A~· 0 50 -12 -20 65 35 l 2T - 15 - 12 2NM IS 2
2 N 2 ~1'Nl'l'hil _ _ _
At' 0 50 - 12 -20 65 35 I 2T - 15 - 12 2Nl415 2
2N207H l'N I' Phil AF O 50 - 12 -20 65 35 1 2T - 15 - 12 2N1415 2
2N21 I NPN Syl 0.0 A 50 10 50 75 3.8 I 2 20 10 2N293 3
2N212 NPN Syl O.C, A 50 10 50 75 7 I 4 221' 20 10 2N293 3
2N213 Nl'N Syl AF A 50 25 100 75 70 I 39 200 40 2N169A :I
2N2 l 3A Nl'N Syl Af' A 150 25 100 85 100 I 10 Kc 38 50 20 Noor,
2N214 Nl'N Syl A~' Oul A 125_ _ _25 75 75 50 35 .6 26 200 40 None
2N215 l'NP HC A AF A 150 - 30 -50 85 44 .7 33T - to - 12 2N14l5 2
2N216 Nl'N Syl H' A 50 IS 50 75 3,5 I 2 26T 40 15 2N2<>2 3
2N217 PNI' HC A AF A 150 -25 -70 85 75* 30T 2N321 4
2N218 l'N I' RC A IF A 80 - 16 - 15 85 ,IB I 6.8 30 - 6 - 12 2N3'>4 2
2N219 l'N I' RC A 0,.., A 80 - 16 - 15 RS 75 .4 10 32 -6 - 12 2N394 2
2N220 l'NI' HCA Af' A 50 - 10 -2 85 65 .8 43 2N32:I 4
2N223 l'N I' l'hil AF O 100 - 18 - 150 6.S :19 - 2 .6T - 20 -9 2N:123 4
2N224 l'N I' Phil AFOul O 250 -25* 150 75 60• - 100 .ST - 25 - 12 2N321 4
2N225 l'N I' Phil AFOul O 250 -25* 150 75 60* - 100 .ST -25 - 12 2N321 4
2N226 PNI' Phil AF Oul O 250 - 30* 150 75 35• - 100 .4T - 25 -30 2N321 4
2N227 PN I' Phil AF Oul O 250 -30* 150 75 35* - 100 .4T - 2S -30 2N 32 I • 4
2N228 Nl'N Syl AF Oul Ii. 50 25 50 75 50 35 .6 23 200 40 2Nl69 ·3
2N229 NPN Syl U ' A 50 12 40 75 .9a l .55 200 S 2Nl69 3
2N23I P NP Phil S il RF O 9 - 4.5 -:I 55 19 -.5 20 fo• -3 -5
M.A XIMUM RATINGS ELECTRICAL PARAMETERS
JEDEC l>wg. Pc mw BVc• MIN. MIN. MIN. MAX. Closest Dwg.

Ho. Type Mf r. u.. Ho. @ 2s•c BVca• l o mo T,•c h r.-hre• @ lo mo hr• me Ge db lco(jtO) @ V ea GE Ho.
2N232 PNP Phil SB J\F D 9 -4.S -3 55 9 -.s 30 foe -6 -s

2N233 NPN Syl IF A so 10 50 75 3.0 1 100 10 2N448 3
2N233A NPN Syl IF A 50 10 so 75 3.5 1 150 15 2N448 3
2N234 PNP Bendix Pwr 25W -30 -3A 90 8 Kc 25 - 1 ma T -25
2N234A PNP Bendix Pwr 25W -30 -3A 90 8 Kc 25 - l maT -25
2N235 PNP Bendix Pwr 25W - 40 -3A 90 7 Kc 30
2N235A PNP Bendix Pwr 25W -40 -3A 90 7 Kc 30
2N235B PNP Bendix Pwr 40 3.0A 85 300 3
2N236 PNP Bendix Pwr 25W - 40 -3A 95 6 Kc 30 - l ma -25
2N236A PNP Bendix Pwr 25W - 40 -3A 95 6 Kc 30 -1 ma -25
2N236B PNP Bendix Pwr 40 3.0A 95 300 2
2N238 PNP Tl AF A so -20 75 37 -20 -20 2N323 4
2N240 PNP Phil SBSw D 10 -6 - 15 16 -.5 30 foe -3 -5
2N241 PNP GE Ob8olete l 100 -25 200 85 73T• 100 1.3T 35T - 16 -25 2N241A l
2N24IA PNP GE: AF Oul I 200 -25 200 85 73T• 100 1.3T 35T - 16 -25 2N24IA 1
2N242 PNP Pwr 20W -45 -2A 85 5 Kc 30 -5 ma -45
2N243 NPN i,1 Si AF A 750 60• 60 150 .9 -5 30 l 30
2N2« NPN Tl Si AF A 750 60• 60 150 .961 -5 30 1 30
2N247 PNP RCA Dri(l RF A 80 -12 - 10 85 60 30 37 -20 -12
~ 2N248 PNP Tl RF A 30 -25 -5 85 20T• .5 SOT -10 - 12
2N249 PNP Tl AF C 350 -25 -200 85 30 - 100 - 25 -25
2N250 PNP Tl Pwr 12W -30 -2A 80 30• -.SA - 1 ma -30
2N25l PNP Tl Pwr 12W - 60 -2A 80 30• -.SA 30 -2 ma -60
2N252 PNP Tl IF A 30 - 16 -5 55 28 -10 - 12
2N253 NPN Tl IF A 65 12 s 75 32 3 9 2N293 3
2N254 NPN Tl IF A 65 20 5 75 3 9 2N293 3
2N255 P NP CBS Pwr I.SW - ts• -3 85 .2T 19
2N25SA PNP CBS Pwr 20W 15 4A 85 2s• 450 S ma IS
2N256 PNP CBS Pwr I.SW -30• -3 85 .2T 22
2N256A PNP CBS Pwr 20W 25 4A 85 2s• 450 5 ma -25
2N257 PNP Cle Pwr 2W -40• 85 SST ,SA 7 Kc 30 -2 ma -40
2N260 PNP Cle Si AF n 200 - 10• -so 150 16T 1 I.BT 38T .OOIT -6 2N332 4
2N260A PNP Cle Si AF B 200 -Jo• - so 150 16T 1 1.8T 38T .OO IT - 6 2N332 4
2N261 PNP Cle Si A•' 8 200 -75• -so 150 l OT 1 1.BT 36T .OOIT -6 2N332 4
2N262 PNP Cle Si AF 8 200 - 10• -50 150 20T l 6T 40T .OOIT -6 2N333 4
2N262A PNP Cle Si AF n 200 - Jo• -50 150 20T l 6T 40T .OOIT -6 2N333 4
2N265 PNP GE AF I 75 -25 -SO 85 llOT• l l.ST 45 - 16 - 25 2N265. 2N508 1-2

2N267 PNP RCA Orirl RF A 80 - 12 - 10 85 60 30 37 -20 -12
2N268 PNP Cle Pwr 2W -80• 85 6 Kc 28 -2 ma -80
2N268A PNP Cle Pwr 2W -60 90 20• 2A -2 ma -80
2N269 J>NP RCA Sw C 120 -24 -100 85 35 4 -5 - 12 2N46-1 2
2N270 PNP RCA Af Oul A ISO -25 -75 85 70 150 35 - 10 -25 2N321 4
MAX IMUM RATINGS ELECTRICAL PARAMETERS
---------------
J EDEC
Ho. Type Mfr. Use
Dw9 .
Ho.
Pc mw
@ 2s·c
BVc11
BVca• l c ma T, •c
MIN.
h h-hr■• @
MIN.
lo ma h r• mc
MIN.
G. db
MAX.
lcol µ.a l @ Vea
Closest
GE
Dw9.
Ho.
2N271 PNP Ray RF A 150 - 10 -200 85 45T I I OT 29T -5 - 12

2N271A l'Nl' Ray H' A 150 - 10 -200 85 45T I JOT 39T -s - 12
2NZ72 PNP Ray A~' A 150 -24 - 100 85 60 IT 12T -6T -20 2N324 4
21\2n P NI' Ray RF A ISO -30 - 100 85 10 50 29 -6T -20 2N1098 2
2N274 PNP RCA OrirL R~' D 80 - 12 - 10 85 60T I JOT 45T -20 - 12
2N277 l'N P Dloo Pwr SSW - 40 12A 95 85T 1.2A .ST 34T -.5 ma T -30
21\278 l'NI' Oloo Pwr SSW -50 12A 95 85T 1.2A .ST 34T -.5 nu, T -20
2N285 P N I' llendix Pwr 25W - 40 3A 95 6 Kc 38 - l ma -25
2N285A l'N P llendix Pwr 25W -40 3A 95 6 Kc 38 - 1 ma -25
2N290- -l'NI' Dloo Pwr SSW -70 - 12A 95 72T• 1.2A .4T 37T - 1 mo T -60
2N2'11 l'N P Tl AF" A 180 -25 -200 85 30• 100 31 -25 -25 2N320 4
2N292 Nl'N m: IF" 3 65 15 -20 85 8 I ST 25.5 5 IS 2N292 3
2 1 \ 2 ~ 1'N ca: It" 3 65 15 -20 85 8 I BT 28 5 IS 2N293 3
21\297 l'NP Cle Pwr 35W -50 -SA 'IS 40• .5 5 Kc 3 ma -60
2N297A l'NI' Cle Pwr ~5\V -50 -SA 95 40• .5 5 Kc 3 ma -60
21\299 l'NI' Phil SIi R~- E 20 - 4.5 -5 85 90 fo, 20 -3 -5
2N300 l'NP Phil SIi IH' E 20 - 4 .5 -5 85 II .5 85 fo, -3 -5
2N301 l'NP HCA P wr IIW - 20 -I.SA 91 70T• IA 3JT -3 ma -30
~ 21\301 A l'NI' RC A Pwr IIW - 30 - I.SA 91 70T* IA 33T -3 ma -30
21\302 l'N I' Boy Obsolete A 150 - 10 -200 85 ,.ST 1 - IT - .12 2N l 86A I
21\303 PNP Ray Ob..,lele A 150 - 10 - 200 85 75T 14 - IT -.12 2Nl86A I
21\306 Nl'N Syl ~-
...l,wr A so 15 75 25 I .6 34 so 20 2N292 3
2N307 P NP Syl lOW - 35 - IA 75 20 200 3 Kc 15 ma -35
2N307 A l'N I' Syl Pwr 17\V - 35 - 2A 75 20 200 3.5 Kc 22 7 ma -35
2 N ~ • l \ 1-• - -T l It' A 30 - 20 -s 55 39 - 10 -9
2N309 PNI' Tl IP A 30 - 20 - 5 55 41 - 10 -9
2N310 PNP Tl It" A 30 - 30 - 5 55 28T 37T -10 -9
!!N311 l'NI' M oler Sw C. 75 - 15 85 25 -60 - 15 !?N12:1 7
2N312 NPN Moler Sw C 75 15 85 25 60 15 2Nl67 3
2N313 Nl'N <,~; Obsolele 6!; 15 !!O 85 25 5 36 mu u., 2N292 3
2N314 Nl'N c. t: Obsolete 65 15 20 8.~ 25 8 39mu 11.., 2N293 3
2N315 PNP GT Sw C 100 - 15 -200 85 15 100 ST -:? - 5 2N396 2
2N316 PNI' GT Sw C 100 - 10 -200 85 20 200 12T -2 -5 2N397 2
2N317 PNP GT Sw C 100 - 6 -200 85 20 400 20T -2 -5
2N318 l'NP GT l'hole A so - 12 -20 .75T
2N319 PNP Gt; At' 4 :?2S - 20 -200 85 34T* -20 2T - 16 -25 2N319 4
2N320 PNI' GE A~· 4 225 -20 -200 85 SOT• -20 2.ST - ({> -25 2N320 4
2N321 PNP GE At· 4 225 -20 -200 85 SOT• -20 3.0T - 16 -25 2N321 4
2N322 PNP GE A~" 4 140 - 16 - 100 60 45T -20 2T - 16 - 16 2N322 4
2N323 PNI' GE AF 4 140 - 16 - 100 60 68T -20 2.ST - 16 - 16 2N:123 4
2N324 PNP GE AF 4 140 - 16 - 100 60 85T -20 3.0T - 16 - 16 2N324 4
2N325 PNP Syl Pwr 12W -35 -2A 85 30* -500 .15 -500 -30
Dwg. Pc 111w BVcs MIN. MIN. MIN. MAX. Closest Dwg.

JEDEC GE Ho.
Ho. Type Mfr. u.. Ho. @ l S' C BVcB' le 1110 T,•c hr.•hn ' @ le ffla ,.,.""' G. db lccCµ.a > @ Vea
2N326 NPN Syl Pwr 7W 35 2A 85 30• 500 .15 500 30

2N327 PNP Ray Si AF 335 -so• - 100 160 9 1 .3T 30 - .1 -30
2N327A P NP Ray Si AF ~ :ISO - so• - 100 160 9• .I .2T - .l -30
2N328 PNP Ray Si A~' C 335 -:is• - 100 160 18 1 .35T 32 -.l -30
2N328A PNP Ray Si AF C 350 -so• - 100 160 18• I .3T -.I -30
2N329 PNP Ray Si A~· C 335 - 30• -100 160 36 1 .6T 34 -.I - 30
2N329A PNP Ray Si AF C 350 -so• - 100 160 36* I .ST -. I -:10
2N330 P NP Ray Si AF C 335 -45• -50 160 9 I .5 30 -.1 -30
2N330A P NP Ray Si AF C 350 - so• - 100 160 25T l .5 34T -.1 -:10
RCA AF C 200 - :io• - 200 85 SOT 44T - 16 -30 2Nl415 2
2N331 PN P 2N:1:12
2N332 NPN Tl-GE Si AF 4 150 45* 25 200 9 I I0T 14T 2 30
Si A~• 4 500 45 25 175 9 2.5 II .500 :10 2N:1:12A 4
•
2N332A NPN GF:
2N333 NPN Tl-OE Si AF 4 150 45• 25 200 18 l 12• 14T 2 30 2N3.13 4
NPN GF: Si A t' 4 500 45 25 175 18 2.5 II .500 :10 2N:1:1:1A 4
2N333A
2N3J.4 NP N TI-GF. Si AF 4 I SO 45• 25 200 18 I 8 J:IT 2 :10 2N:1:14
2N334A N l'N GE S i A~· 4 500 45 25 175 18 8.0 12 .500 30 2N:l:14A
•
4
T l -GE S i A~' 4 150 45• 25 200 :17 I 14• 13T 2 :10 2N335 4
2N335 NPN
2N33SA NPN m: S i A~' 4 500 4.5 25 175 37 !?.5 12 .500 30 2N:135A
2N3358 NPN GE Si A•· 4 500 60 25 175 37 2.5 12T .500 :10 2N335II "4
~ 2N336 NPN Tl•GE S i AF 150 45• 25 200 76 l 15• 12T 2 30 2N336 4
2N336A Nl'N m: Si AF "4 500 45 25 175 76 2.5 12 .500 30 2N3:l6A 4
2N337 NPJ~ Tl-GE Si AF 4 125 4.5• 20 200 19 l 10 l 20 2N:l:l7 4
2N338 NPN T l -GE Si AF 4 125 45• 20 200 39 I 20 1 20 2N338
2N339 NPN Tl Si AF C IW 55• 60 ISO .9a -s 30 1 30 "
2N340 NPN Tl Si A•• C lW 85• 60 150 .9.. - s 30 l 30
2N341 NPN Tl Si A~' C lW 12s• 60 ISO .9a -5 30 I 30
2N342 NPN Tl Si AF C lW 60* 60 ISO .9a -5 30 I 30
2N343 NPN Tl Si A•' C IW 60• 60 ISO .966<> -5 30 I 30 2N33511 4
2N344 PNP P hil RF D 40 -5 - 5 85 II 30 fo, -3 -s
2N34S PNP Phil RF D 40 -5 - 5 85 25 30 f .. - 3 -5
2N346 PNP Phil RF D 40 - s -5 85 10 60 f• • - 3 -5
2N3S0 PNP Mot.or P wr I0W - 40• - 3A 90 20• - 700 S Kc 30 - 3 ma -30
2N3S I PNP Mot.or P wr l0W - 40• - :IA 90 2s• - 700 5 Kc 32 - 3 ma -30
2N352 PNP Phil Pwr 25W - 40 - 2A 100 30 - IA 10 Kc 30 -5 ma - 1 !8s0 c
2N353 PN P Prul Pwr 30W - 40 -2A 100 40 - IA 7 Kc 30 -5 ma - 1 8S°C
2N354 PN P Phil Si AF 0 150 - 25• - 50 140 9 \ 8 f .. .l - 10
2N35S PNP Phil Si AF 0 150 -10• - so 140 9 l 8 fo, -.I - 10
2N356 NPN GT Sw C 120 18 100 85 20 100 3T s 5 2N634 2
2N357 NPN GT Sw C 120 15 100 85 20 200 6T s s 2N634 2
2N358 NPN GT Sw C 120 12 100 85 20 300 9T 5 s 2N635 2
2N364 NPN Tl AF A ISO Jo• so 85 9 - 1 1 10 30
2N365 NPN Tl AF A ISO JO• so 85 19 - 1 I 10 30
---------------
JEDEC
No. Type Mfr. Use
Dwg.
No.
Pc 111w
@ zs•c
BVc111
BV ce• l c ma T,•c
MIN.
hto•hr■• @
MIN.
le ma h ro, mc
MIN.
G. db
MAX.
l oo(jLa ) @ V ea
CloJest
GE
Dw1.
No.
2N366 NPN Tl AF A 150 30• 50 85 49 -1 1 10 30

2N367 PNP Tl AF A 100 -Jo• -50 75 9 I .3 -30 -30 2N1413 2
2N368 PNP Tl AF' A 150 -3o• -50 75 19 1 .4 -20 -30 2N l 4 13 2
2N369 PNP Tl AF A ISO -30• - 50 75 49 1 .5 -20 -30 2Nl415 2
2N370 PNP RCA O rirt RF A 80 - 24• -20 85 60T l 30T 31M - 10 - 12
2N37l PNP RCA Orirt RF A 80 - 24• - 20 85 .984T 1 30T 17.6M - 10 -12
2N372 P NP RCA Oriri RF A 80 - 24• - 20 85 60T 1 30T 12.SM -10 -12
2N373 P NP RCA <he A 80 - 24• - 10 85 60T I 30T 40T - 16 - 12
2N374 P NP R CA Orifl 0sc A 80 - 24• -10 85 60T 1 JOT 40T -16 - 12
2N375 PNP Moler Pwr 45W - 60 -3A 95 3S IA 7 Kc -3 ma - 60
2N376 PNP Moler P wr l0W - 40• - 3A 90 60T IA 5 Kc 35T
2N377 NPN Syl-(a•: Sw 2 150 20 200 100 20• 30 6T 5 I 2N377 2
2N377A NPN Sw F. ISO 40 200 100 20• 200 6T 40 40
2N378 PNP ~ 1,wr sow - 40 - SA 100 1s• 2A 5 Kc - 500 - 25
2N379 PNI' TS Jlwr sow - 80 - SA 100 20• 2A 5 Kc - 500 -25
2N380 PNP TS Pwr sow - 60 - SA 100 30• 2A 7 Kc - 500 - 25
2N381 PNP TS AF Oul C 200 - 25 - 200 85 SOT 20 1.2T 3 1T - !OT - 25 2N320 4
2N382 PNP TS A~' Onl C 200 - 25 - 200 85 75T 20 I.ST 33T - !OT - 25 2N321 4
, 2N38.1 P N I' TS Af"Oul C 200 - 2fi - 200 85 l OOT 20 1.8T 35T -I0T - 25 2N321 4
~ 2N384 P N I' RCA OrihO.., C 120 - 30 - 10 85 60T 1.5 IOOT 15 - 16 -12
NPN Syl Sw C 150 25 200 100 JO• 30 4 35 25 2N631 2
2N385
2N386 l'NP Phil Pwr 12.5W - 60 - 3A 100 20 - 2.SA 7 Kc - 5 ma -60
2N387 PNI' Phil Pwr 12.SW - 80 - 3A 100 20 - 2.SA 6 Kc - 5 ma - 80
NPN Syl-Gf: Sw 2 150 20 200 100 60• 30 5 10 25 2N388 2
2N388
2N388A NPN Sw P. 150 40 200 100 30• 200 5 40 40
2N389 NPN
i,1 Si Pwr 85W 60 200 12 IA 10 ma 60 @ 100°C
2N392 P N I' Ole Pwr 70W - 60• - SA 95 60 3A 6 Kc - 8 ma -60
2N393 l'N I' Phil Sw 50 -6 - 50 85 20• - 50 40 f .. - 5 -5
Gf: Sw 2 150 - 10 - 200 85 20• - 10 4 - 6 - 10 2N39l 2
2N:19-i PNP 2
2N395 l'N P G f: Sw 2 200 - 15 - 200 JOO 20• - 10 3 -6 -15 2N395
P N I' G f; Sw 2 200 - 20 - 200 100 :io• - 10 5 -6 - 20 2N396 2
2N396 2N396A 2
2N396A l'N I' Gf~ Sw 2 200 20 200 100 30• 10 5 -6 - 20
GF. Sw 2 200 - 15 -200 100 40• - 10 10 - 6 - 15 2N397 2
2N397 l'N I'
Sw C 50 - 105 - 110 85 20• -5 ma - 14 -2.5 2N16l4 I
2N398 l'NP R CA
2N399 PNP Bendix P•,.r 25W -40 - :IA 90 8 Kc 33T - l ma - 25
2N400 PNP Bendix l'wr 25W -40 :I.0A 95 I 40 2 mo - 25
2N40 1 PNP Bendi• Pwr 25W -40 - :IA 90 8 Kc 30T - I ma -25
PNP w AF C 180 - 20 - 150 85 .96crT I .6T 37T -15 -20 2N320 4
2N402 2NJ19 4
2N403 P NP w AF C 180 - 20 -200 85 .97aT I .85T :12 - IS -20
2N404 P N I' R C A-GE Sw 2 120 -24 - 100 85 4 -5 -12 2N404
l'NP RC A AF A 150 - 18 -35 85 :IST• l .65T 43T - 14 - 12 2N32Z 4
2N405 4
:ZN406 PNP RCA AF C 150 - 18 - 35 85 JST• l .6ST 43T - 14 - 12 2N322
MAX IMUM RATINGS ELECTRICAL PA RAMETERS
JEDEC Dwg. Pc mw BVes MIN. M IN. MIN. MAX. Closest Dwg.

No. Type Mfr. u.. No. @ 2 5' C BVe a" le mo T,'C h r.-hrc' @ lo mo bu. me G, db 100 (1<0 > @ Yeo GE No.
2N407 P NP RCA Af' A 150 - 18 - 70 85 6ST• - 50 33T - 14 - 12 2N323 4

2N408 P NP RCA AF C 150 - 18 - 70 85 6ST• - so 33T - 14 - 12 2N323 4
2N409 P NP RCA If' A 80 - 13 - 15 85 .9S..T I 6.7T 38T - 10 - 13 2N394 2
2N410 PNP RCA IF C 80 - 13 - 15 85 .98aT I 6.7T 38T - 10 -13 2N39-i 2
2N4ll P NP RCA 09c A 80 - 13 - 15 85 75T .6 32T -10 - 13 2N39-1 2
2N412 PNP RCA 09c C 80 - 13 - 15 85 75T .6 32T - 10 - 13 2N394 2
2N413 PNP GE I FSw 2 150 - 18 - 200 30 6T -5 - 12 2N413 2
2N413A P NP Ray IF C 150 - 15 -200 85 30T l 2.ST 33T -5 - 12 2N394 2
2N414 PNP Gf! IF S w 2 150 - 15 - 200 60 7T -5 - 12 2N414 2
2N414A PNP Ray IF C 150 - 15 - 200 85 60T I 7T 35T - 5 - 12 2N391 2
2N415 PNP Ray Osc C 150 - 10 -200 85 BOT I !OT 30T - 5 - 12 2N:\9•1 2
2N415A PNP Ray IF C 150 - 10 - 200 85 BOT l lOT 39T -s - 12 2N394 2
2N4 l6 P NP Ray R~• C I SO - 12 - 200 85 BOT I JOT 20T - 5 - 12 2 N:\9-i 2
2N417 P NP Ray RF C 150 - 10 -200 85 140T I 20T 27T - 5 - 12 2N:194 2
Pwr 25W 80 SA 100 40• 4A 400 Kc 15 ma -60
2N418 l'NI' Rendix
2N420 PNP llendiz Pwr 25W 45 SA 100 40• 4A 400 Kc 10 m 10 ma - 25
2N420A PNP Ilendix Pwr 25\V 70 SA 100 40• 4A 400 Kc 15 ma - 60
2N422 PNP Ray AF C 150 - 20 - 100 85 SOT I .BT 38T - 15 - 20 2N:\20 4
2N42S PNP Ray Sw C 150 -20 - 400 85 20• l 2.5 -25 - 30 2N394 2
i 2N426 PNP Ray Sw C 150 - 18 -400 85 30• I 3 - 25 - 30 2N395 2
2N427 PNP Ray Sw C 150 - 15 - 400 85 40* 1 5 - 25 - 30 2N396 2
2N428 PNP Ray Sw C ISO - 12 - 400 85 60• I 10 - 25 - 30 2 N397 2
2N438 N PN C BS Sw C 100 25 85 20• so 2.5 10 25 2N6:14 2
2N438A NPN CBS Sw C 150 25 85 20• 50 2.5 10 25 2N631 2
2N439 NPN C BS Sw C 100 20 85 30 50 5 10 25 2N6."\4 2
2N439A NPN CBS Sw C 150 20 85 30* 50 5 10 25 2N6."\4 2
2N440 NPN CBS Sw C 100 15 85 40* 50 JO 10 25 2N635 2
2N440A NPN CBS Sw C 150 15 85 40• 50 10 10 25 2N635 2
2N444 NPN GT Sw C 120 15 85 1ST .ST 2T 10
2N445 NPN GT Sw C 100 12 85 35T 2T 2T 10
2N446 NPN GT Sw C 100 10 85 60T ST 2T 10 2N634 2
2N447 NPN GT Sw C 100 6 85 125T 9T 2T 10 2N635 2
2N448 N PN GE IF 3 65 15 20 85 8• I ST 23 s IS 2N<148 3
2N449 N PN GE IF 3 65 15 20 85 34• I BT 24.S 5 15 2N449 3
2N450 PNP GE Sw 7 150 - 12 - 125 85 30* - 10 5 - 6 - 12 2N450 7
2N456 P NP Tl PwT 50 - 40 SA 95 IJOT* IA - 2 ma - 40
2N457 PNP Tl l'WT so - 60 SA 95 130T• IA - 2 ma - 60
2N458 PNP Tl Pwr 50 - 80 SA 95 ! JOT• IA - 2 ma -80
2N459 PNP TS Pw-r 50 - 60 SA 100 20• 2A 5 Kc 100 ma - 60
2N460 PNP TS AF C 200 - 45• - 400 100 .94a 1 1.2T 34T - 15 - 45 2N524 2
2N461 PNP TS AF C 200 -45* - 400 100 .97a I 1.2T 37T - 15 - 45
2N462 P NP Phil Sw F 150 - 40• - 200 75 20• -200 .5 - 35 - 35 2N 1614 1
__,_
---------------
JEDEC
Mo. Type Mfr. Use
Dw9.
Mo. @
Pc mw
2s•c
BVcs
BVca• lo ma T,•C
MIM. MIM.
hr.-hu• @ le ma f-..n me
MIM.
G e db
MAX.
lco(µa l @ Vea
Closest
GE
Dw9.
Ma .
2N463 PNP WE Pwr 37.5W -60 SA 100 20• -2A 4 me -300 - 40
2N464 PNP Ray AF C 150 - 40 -100 85 14 I .7T 40T -15 -20 2N l 614 I
2N465 PNP Ray AF C ISO -30 - 100 85 27 I .ST 42T - 15 -20 2Nl414 2
2N166 PNP Ray AF C 150 -20 -JOO 85 56 I IT 44T - 15 -20 2N321 4
2N467 PNP Ray AF C 150 -IS -100 85 112 I 1.2T 45T - 15 -20 2N508 2
2N469 PNP GT Photo C 50 75 10 1 IT -50 -6
2N48 1 PNP Ray o.., C ISO - 12 -20 85 SOT I 3T - JO -12 2N395 2
2N482 PNP Ray IF C 150 -12 -20 85 SOT 1 3.ST -JO -12 2N39S 2
2N483 PNP Ray IF C 150 - 12 - 20 85 60T I 5.5T - 10 -12 2N394 2
2N484 P NP Ray IF C 150 - 12 -20 85 90T I IOT -10 - 12 2N394 2
2N485 P NP Ray IF C 150 - 12 - 10 85 SOT l 7.ST - 10 -12 2N394 2
2N486 P NP Ray IF C 150 - 12 -10 85 IOOT I 12T - 10 - 12 2N394 2
2N489 GE Si Uni 5 SEE G- E TRA NSISTO R SPECIFICATION SECTION 2N489 5
2N•l90 (;E Si Uni 5 SEE G-E TRANSIST OR SPECIFIC ATION SECTION 2N490 5
2N491 GE Si Uni 5 SEE G-E TRANSIST OR SPECIFICATION S EC TION 2N49 1 5
2N 192 GE Si Uni 5 SEE c;. E T RANSISTOR S P~~C IFI CATION SECTION 2N492 5
2N493 GE Si Uni 5 S EE G- E TRANSISTOR S PEC IFICATION SECTION 2N492 5
2N494 GE Si Uni 5 SEE C-E TRANS ISTOR SPECI FICATION SflCTION 2N494 5
$ 2N495 PNP Phil Si RF C I SO - 25 - 50 140 9 I 8 f •• - .I - 10
2N496 P NP l'hil SiSw C 150 -10 - so 140 9 1 8 fo. - .I - 10
2N497 NPN T l-GE Si AF 8 4W 60 500 200 12• 200 10 30 2N497 8
2N497A NPN GE Si AP 8 SW 60 500 200 12• 200 10 30 2N497A 8
2N498 NPN Tl-GE Si AF 8 4W 100 500 200 12• 200 10 30 2N498 8
2N498A NP N GE Si AF 8 SW JOO 500 200 12• 200 10 30 2N498A 8
2N499 P NP Phil MADT C 30; •s•c - 18 -50 85 6 2 10 100 - 30
2N500 P NP Phil MADT C 50 45•c - 15 85 100 -20
2N501 P NP Phil MADT C 2s 45•c -is• - 50 85 20• - 10 100 - IS
2N501A l'NP Phil MA DT C 2s3 45•c - IS• - 50 100 20• -10 8 25 - 15
2NS02 PNP Phil MADT C 2s 4 1•c -20 85 9 2 200 8 - 100 - 20
2NS02A P NP Phil MADT C 25 @45°C -30• 100 9 2 100 -30
2NS03 PNP Phil MADT C 2s@ 4 1•c - 20 -so 85 9 2 100 11 - 100 -20
2N506 PNP Syl AP A so - 40• - 100 85 25 - 10 .6 - 15 -30 2N320 4
2N507 NPN Syl AF A 50 40 100 85 25 10 .6 15 30
2N508 P NP GE A F Out 2 140 - 16 - 100 85 125T• - 20 3.ST -16 - 16 2NS08 2
2N509 P NP WE RF C 225 -30• -40 100 .96.> 10 750T -5 -20
2NSM P NP Tl Pwr sow - 40 - 25A 95 12• -25 -2.0 -20
2N514A P NP Tl Pwr sow - 60 - 25A 95 12• - 25 2.0 -30
2N5148 P NP Tl Pwr 80W -80 -25A 95 12• -25 7.0T -2.0 - 40
2N515 NPN Syl IP A so 18 10 75 4 I 2 23 so 18
2N5l6 N PN Syl lF A 50 18 10 75 4 I 2 25 so 18
2N517 NPN IF A 50 18 10 75 4 I 2 27 so 18
2NS19 PNP ~+ Sw C 100 - 15 85 15 l .5 -2 -s 2N394 2
Dwg. Pc mw BVc• MIN. MIN . MIN. MAX. Closest Dwg.

JEDEC T,'C hre•hn • @ lo ma h tb fflC G, db lcoCµa l @ V c11 GE No.
No. Type Mfr. u.. No. @ 2s·c BV c11• le mo
Sw C 100 -12 85 20 1 3 -2 -5 2N394 2

2NS20 PNP GT -2 -5 2N397 2
2NS21 P NP GT Sw C 100 - 10 8S 35 I 8
2NS22 P NP GT Sw C JOO -8 85 60 I 15 -2 -5
PNP GT Sw C 100 -6 85 80 I 21 -2 -5
2NS23 - 1 .8 - 10 -30 2NS24 2
2NS24 PNP GE AF 2 225 -30 -SOO 100 16
AF 2 225 -30 -S00 100 30 - 1 I -JO -30 2NS25 2
2NS25 PNP GE
AF 2 225 - 30 -500 100 « - 1 l.3 - 10 -30 2NS26 2
2NS26 PNP GE - 10 -30 2NS27 2
2N527 PNP GE AF 2 22S -30 -SOO 100 60 - 1 1.5
2N528 PNP WE Pwr 2.SW - 40 100 20• -0.5 - IS - 30
2N529 PNP- GT AF C 100 15 85 15 1 2.5T s 5
NPN
2N530 PNP- GT AF C 100 15 85 20 I 3T 5 5
NPN
2NS31 P NP- GT AF C 100 15 8S 25 l 3.ST 5 5
NPN
2NS32 PNP- GT AF C 100 IS 8S 30 l 4T 5 5
NPN
lg PNP- GT AF C JOO 15 8S 35 1 4.ST 5 5
2N533
NPN
PNP Phil AF 0 2s@ so•c - 50 -25 65 35 - 1 - 15 -so 2N1057 I
2N534 - 10 - 12 2N1415 2
2N535 PNP Phil AF 0 50 -20 -20 85 35 - 1 2T
AF 0 so -20 -20 8S 35 - I 2T - 10 - 12 2N1415 2
2N535A PNP Phil
AF 0 50 -20 -20 BS 3S - 1 2T - 10 - 12 2N508 2
2N535R P NP Phil - 12 2NS08 2
2N536 P NP Phil Sw 0 so -20 -30 85 100• -30 I -10
2NS38 PNP M-H P wr JOW @ 70°C -so• 9S 40 2A 8 Kc T -20 ma -80
2NS38A P NP M-H Pwr 10w ; 1o•c -so• 95 40 2A 8 KcT -20 ma -80
2NS39 PNP M-H Pwr 10w 1o•c -so• 9S 27 2A 7 Kc T - 20 ma -80
2NS39A PNP M-H Pwr 10w 10°c -80 95 27 2A 7 KcT - 20 ma -80
2NS40 PNP M-H Pwr 10w 110°c -80 9S 18 2A 6 KcT -20 -80
2NS40A PNP M-H Pwr lOW 70°C -80 95 18 2A 6 Kc T -20 -80
2NS44 P NP RCA RF A 80 - 24• - JO 85 60T l 30T 30.4 - 16 - 12
2NS53 PNP Del P wr 12w 11°c -so• -4A 95 40 -.SA 20 Kc -2 ma -60
2N554 P NP Motor Pwr 10w
§ so•c - 40• -3A 90 30T• -.SA 8 KcT 20 -SOT -2
2N5SS PNP Motor Pwr 10w so•c -30 -3A 90 20 -.SA 5 Kc MT - 7 ma - 30
2NSS6 NPN Syl Sw C 100 2s• 200 BS 3S• I
2N557 NPN Syl Sw C 100 20• 200 85 20• I
2NS58 NPN Syl Sw C 100 JS• 200 75 60• l
2N559 PNP WE Sw C 150 - IS -50 JOO 25• 10 -50 -s@ 65°C
2NS60 NPN WE I F Sw C .50 20• - 100 .10 -20
2NS61 P NP RCA Pwr sow -50 -SA 100 65T IA .5 24.6 -500 -30
---------------
JEDEC
Ho. Type Mfr. Use
l>w9.
Ho. @
Pc m w
2s·c
BVcs
BVc a• l e ma T, "C
MIN. MIN.
hto-h ra• @ le ma fi.r• me
MIN.
G, db
MAX.
lcoCJI.G) @ Ve a
Closest
GE
l>w9.
Ho.
2N563 PNP GT AF A ISO -25 - 300 85 10• I .8T - 5 - 10 2N44 l

2N564 PNP GT AF C 120 - 25 - 300 85 10• I .8T - 5 - 10 2N524 2
2N565 PNP GT AF A 150 - 25 - 300 85 JO• l IT - 5 -10 2N43 I
2N566 PNP GT AF C 120 - 25 -300 85 30• I IT - 5 - 10 2N525 2
2N567 PNI' GT AF A 150 - 25 - 300 85 so• I I.ST - 5 - 10 2N4~ I
2N568 PNP GT AF C 120 - 25 - 300 85 so• I I.ST - 5 - 10 2N526 2
2N569 l'NP GT AF A 150 - 20 - 300 85 10• I 2T - 5 - 10 2N241A I
2N5i 0 P NP GT AF C 120 - 20 - 300 85 10• 1 2T -5 - 10 2N527 I
2N571 PNP GT AF A 150 - 10 - 300 85 100• I 3T - 5 - LO 2N508 2
2N572 PNP GT AF C 120 - LO -300 85 100• l 3T -5 - 10 2N508 2
2N574 PNP M- H Pwr 2s w 2 1s•c -60• -1 5A 95 10• - lOA 6 KcT - 7 ma - 60
2N574A PNP M-H Pwr 2sw 15•c - so• - 15A 95 10• -JOA 6 Kc T - 20 ma -80
2N575 PNP M -H l'wr 25W @ 75°C -60• - 15A 95 19• - IOA 5 Kc T -7 ma -60
2N575A PNP M -H Pwr 25w @1s•c - so• - I SA 95 19• -IOA 5 KcT - 20 ma - 80
2N576 NPN Syl Sw C 200 20 400 100 SOT• 30 ST 20 20
2NS76A NPN Syl Sw C 200 20 400 100 20• 400 ST 40 40
2N578 PNP RCA Sw C 120 - 14 - 400 85 10• I 3 -5 - 12 2N394 2
to 2N579 PNP RCA Sw C 120 - 14 - 400 85 20• l 5 -5 - 12 2N396 2
(0 2N580 PNP RCA Sw 120 - 14 - 400 85 Jo• I 10 -5 - 12 2N397 2
... C
2N581 PNP RCA Sw C 80 - 15 - 100 85 20• -
20 4 - 6 - 6 2N394 2
2N582 PNP RCA Sw C 120 - 14 - 100 85 40• -
20 14 -5 - 12
2N583 PNP RCA Sw C 150 - 15 - 200 85 20• -
20 4 - 6 - 6 2N394 2
2N584 PNP RCA Sw C 120 - 14 - 100 85 40* -
20 14 - 5 - 12
2N585 NPN RCA Sw C 120 24 200 85 20• 20 3 8 12 2N634 2
2N586 PNP RCA Sw A 250 - 45• - 250 85 3ST• - 250 - 16 - 45
2NS87 NPN Sw C 150 20 200 20• 200 so 40
2N588 l>NP st•
p ii MAOT C Jo @ 45•c - 15 - 50 85 15 - 15
2N59I PNP RCA AF C 50 - 32 - 20 100 70T 2 .7T 41T - 6.5 -10 2N324 4
2N592 PNP GT Sw C 125 - 20 85 20• l .4T - 5 - 5 2Nl414 2
2N593 PNP GT Sw C 125 - 30 85 30• .5 .6T - 5 - 5 2N1414 2
2N594 NPN GT Sw C 100 20 85 20• I 1.5 5 5
2N595 NPN GT Sw C 100 15 85 35• I 3 5 5
2N596 NPN GT Sw C 100 10 85 so• I 5 5 5 2N6M 2
2N597 PNP Phil Sw C 250 - 40 - 400 JOO 40• - 100 3 - 25 - 45
2N598 PNP Phil Sw C 250 - 20 - 400 100 so• - 100 5 - 25 - 30
2N599 PNP Phil Sw C 250 - 20 - 400 100 100• - 100 12 25 -30
2N600 PNP Phil Sw C 750 - 20 - 400 100 so• - 100 5 - 25 - 30
2N601 PNP Phil Sw C 0.75 - 20 - 400 100 2.5 3 12 25 - 30
2N602 P NP GT Drift Sw C 120 -20 85 20• .5 - 8 - 10 2N395 2
2N603 PN P G'r DrirtSw C 120 - 20 85 30• .5 - 8 - 10 2N396 2
2N604 PNP GT DrirtSw C 120 - 20 85 40• .5 - 8 - 10 2N397 2
2N605 PNP GT Drirt RF C 120 - 15 85 40T -1 20 - 10 - 12 2N394 2
MAXIMUM llATIHGS ELECTRICAL PARAMETERS
JEOEC Dwg. Pc mw BVc■ MIH. MIH. MIH. MAX. Closest Dwg.

Ho. Type Mfr. Use Ho. @ 2s•c BVca• le mo T,•c h ro-hrz• @ lo mo h rb mc G.db lc.:>ll'O l @ Ven GE Ho.
2N606 PNP GT Drift RF C 120 - 15 85 60T - 1 25 -10 -12 2N395 2

2N607 P NP GT Drift RF C 120 -15 85 80T - 1 30 -10 -12 2N396 2
2N608 PNP GT Drift RF C 120 - 15 85 120T - 1 35 - 10 -12 2N396 2
2N609 P NP w AF Out C 180 -20 -200 85 90T• 100 30T -2!; -20 2N321 4
2N610 PNP w AF Out C 180 - 20 -200 85 65T• 100 28T -25 - 20 2111320 4
2N611 PN P w AF Out C 180 -20 - 200 85 4ST • 100 26T - 25 - 20 2N320 4
2111612 P NP w AF C 180 - 20 -150 85 .96aT I .6T 37 - 25 - 20 2N319 4
2N613 P NP w AF Out C 180 - 20 - 200 85 .97aT 1 .SST 32 - 25 - 20 2N320 4
2N614 P NP w IF C 125 - 15 - 150 85 4 .5T .5 3T 26T -6 -20 2N395 2
2N615 PNP w IF C 125 - 15 - 150 85 7.5T .5 ST 34T -6 - 20 2N395 2
2N616 P NP w IF C 125 - 12 - 150 85 25T .5 9T 20T - 6 - ts 2N394 2
2N617 PNP w Oto C 125 -12 - 150 85 15T .5 7.5T 30T 6 -15 2N394 2
2N618 PNP Mot.or Pwr 45\V - so• - JA 90 60* - IA 5 Kc - 3 ma - 60
2N622 NPN Ray Si AF C 400 50* 50 160 25T• .5 .3 34T .l 30
2N624 PNP Syl RF C 100 -20 - 10 100 20 2 12.5 20T -30 -30
2N625 NPN Syl Sw C 2.5W 30 100 30• 50 100 - 40
2N631 PNP Ray AF Out C 170 -20 - 50 85 150T 10 1.2T 35T - 25 - 20 2N508 2
2N632 PNP Ray AF Out C 150 -24 - 50 85 lOOT 10 IT 25T -25 -20 2N324 4
to 4
2N633 PNP AF Out C 150 - 30 -50 85 60T 10 .BT 25T - 25 - 20 2N323
~ 2N634 NPN ~u Sw 2 150 20 300 85 1s• 200 5 5 5 2N634 2
2N634A NPN GE Sw 2 150 20 300 85 40* 10 5 6 25 2N634A 2
2N635 NPN GE Sw 2 150 20 300 85 25* 200 10 5 5 2N635 2
2N635A NPN GE Sw 2 150 20 300 85 80* 10 JO 6 25 2N635A 2
2N636 NPN C.E Sw 2 150 20 300 85 35• 200 15 5 5 2N636 2
2N636A NPN GE Sw 2 150 15 300 85 100• 10 15 6 25 2N636A 2
2111637 PIIIP Bendix Pwr 25\V - 40 - SA 100 30* - 3A I ma - 25
2111637A PNP Bendix Pwr 25W - 70 - SA 100 30* - JA 5 ma - 60
2N637B PNP Ueodix Pwr 25\V -80 - SA 100 30• - 3A S ma -60
2N638 PNP Bendix Pwr 25W - 40 - SA 100 20• - JA l ma -25
2N638A PNP Bendix Pwr 25W -70 - SA 100 20• - 3A 5 ma - 60
2N6388 PIIIP Bendix Pwr 25W -80 - SA 100 20• - 3A 5 ma -60
2N639 PNP Bendix Pwr 25W -40 - SA 100 IS• - 3A I ma -25
2N639A PNP Bendix Pwr 25W -70 - SA 100 IS• - 3A 5 ma -60
2N639B PNP Bendix Pwr 25W -80 -SA 100 IS• - 3A 5 ma -60
2N640 PNP RCA Drift RF A 80 -34• - 10 8-5 .984aT - 1 42T 28T -s - 12
2N641 PNP RCA Drirt I F A 80 - 34• - 10 85 .981aT - 1 42T 28T -7 - 12
2N642 PNP RCA Drift Oto A 80 -34• -10 85 .984aT - 1 42T 28T -7 - 12
2N643 PNP RCA Drift Sw C 120 - 29 - 100 85 20• -5 20 - 10 - 7
2N644 PIIIP RCA Drift Sw C 120 - 29 - 100 85 20• - s 40 - 10 - 7
2N645 PNP RCA Drift Sw C 120 -29 -100 85 20• - 5 60 - 10 - 7
2N647 NPN RCA AF C 100 25 so 85 70T• -so 54T 14 25
2N649 NPN RCA AF C 100 18 50 85 65T• - so 54T 14 12
M AXIMUM RAT I NGS ELECTRI C.A L P ARAMETERS
JEDEC
No .
---------------
Type Mfr. Use
Dwg.
No.
Po mw
@ 2s· c
BVcg
BVoa• le mo T , •c
M IN .
h 1.-h u• @ le m o
MIN.
f lltb
me
MIN.
G. db
MAX.
lco(p.o ) @ Vea
Closest
GE
Dwg.
No.
2!\656 Nl'N c:1;;..n Si A~' 8 4W 60 500 200 30• 200 10 30 2N656 8

21\656A N PN rn-: Si AF' 8 SW 60 500 200 30• 200 10 30 2N656A 8
2N657 NPN r. ~:.TI Si AF 8 4W JOO 500 200 30• 200 10 30 2N657 8
21\657 A Nl'N 1;i,; Si AF 8 SW 100 500 200 30• 200 10 30 2N657A 8
2N658 PNI' Ray Sw C 175 - 16 - IA 85 2s• -1 2.5 -6 - 12 2N394 2
21\659 l'NP Ray Sw C 175 - 14 - IA 85 40• - I 5.0 -25 -25 2N396 2
2N660 l'N I' Ray Sw C 175 - II - IA 85 60• - I 10 -25 -25 2N397 2
21\661 PNI' Roy Sw C 175 -9 - IA 85 so• - I 15 -25 -25
21\662 l'NP nay Sw C 175 -11 - lA 85 30• - 1 4 -25 -25 2N396 2
2N665 l'!\l'- - Dlc Pwr 35W -80• SA ( l g) 95 40• -.SA 20 Kc -2 ma -30@11•c
2N679 NPN Syl Sw C 150 20 85 20• 30 2 25 25
2~696 NPI\ F-C Sw C 2W 40 20• 150 1.0 30
··2('~ l\l'N F- C Sw C 2W 40 40• 150 J.O 30
2N NI'!\ F-C RF' Sw C 120• 175 35 I 2.0 60
2 Nf0·2 i\ f'i\ Tl Sw C 600 25 50 175 20* 10 o.s 10
i\ l'~ "l_ _ _ g-;;- --
2,.0:1 C 600 25 50 175 10• 10 0.5 10
2 '\ 70:i I\ Pl\ Tl Sw C 300 - 15* -so 100 2s• -10 300T -:1 -5
2'\70(, NPN ~•-c Sw C 0.6W 20 300 15• 10 0.5 15
~ !?•'\707 l\l'N- ~ Osc C IW 28 9* 10 3.5 15
21\ 71() l'I' I' Tl Sw C 300 - JS• -so 100 25• JO 300T -3 -5
2 , JOJO N l'N RCA AF C 20 10 2 85 35T -.3 2T 10 10
-2'\ 1015 Nl'N w P·wr 150 § 4s•c 30 75A ISO 10• 2A 20T Kc 20 ma 30
21\JOISA N l'N w , ,wr 1so 4s•c 60 75A 150 10• 2A 20T Kc 20 ma 60
2!\JOJ511 'll'N _ w \_\'
__ l'WT 150 45•c 100 7.SA 150 10• 2A 20T Kc 20 mo 100
2, 101s cr,, P!\ Pwr 150 @45°C 150 7.5A 150 10• 2A 20T Kc 20 ma 150
2'\ 10150 N l'N w Pwr 150@ ,1s•c 200 7.5A 150 10• 2A 20T Kc 20 ma 200
2!\1015~; NPN W l'wr 150 @ 4s•c 250 7.SA 150 10• ZA 20T Kc 20 ma 250
2NIOl 5f' I\ l'l\ w- - - -.,wr 150 @ 4s•c 300 7.SA 150 10• 2A 20T Kc 20 ma 300
2Nl016 l\l'N w Pwr 150 a 45°C 30 7.SA 150 10• 5A 20T Kc 20 ma 30
2Nl016A N l'N w l'wr 150 45•c 60 7.5A 150 10• SA 20T Kc 20 mo 60
21\ 101611 'I l'l\ w 1•wr 150 I 45•c 100 7.SA 150 10• SA 20T Kc 20 ma 100
2NIOl6C N I''\ w l'wr 150 45•c 150 7.SA 150 10• 5A 20T Kc 20 n1a 150
2NIOl60 NP"\ w Pwr 150 @ 4s•c 200 7.5A 150 10• SA 20T Kc 20 ma 200
2i\ IOl6F: i\ l'N w i>wr 150 @ 45°C 250 7.SA 150 10• SA 20T Kc 20 ma 250
2NIOl6F' NP1' w Pwr 1so @ 4s 0 c 300 7.SA 150 10• SA 201' Kc 20 ma 300
2NIOli Pi\P Ray Sw C 150 - 10 - 400 85 70* I 15 -25 -30
2NI021 PNI' Tl f>wr sow - 100 -5 95 70T• - IA -2 ma - 100
2NI022 PNP Tl Pwr sow - 120 -5 95 70T• -IA -2 ma - 120
2i\ 1038 l'I\P Tl Pwr 20W -40 -3A 95 35• - IA - 125 .5
21\ 10-19 l'NI' Tl r•wr 20\Y -60 -3A 95 35• - IA - 125 .5
2NIOIO l'NI' Tl Pwr 20\Y -80 -3A 95 35• - IA -125 .5
2i\ IMI l'NI' Tl Pwr 20W 100 3A 95 35• IA - 125 .5
MAXIMUM RATINGS ELECTRICAL PAR.AMETERS
Po mw BVcs MIN. MIN. MIN. MAX. Closfft Dw9.

JEDEC Dw9. GE No.
No. @ 2s· c BVca• lo mo T, •c h r.-hrs" @ le .,o h r• me G. db lcoli,.o ) fib Vea
No. Type Mfr. u..
Tl - 8 - 3A 6S 10• - 0.SA - l ma - 10
2N I0-16 PN P r..-r IS 30
N PN Tl 40w so• 500 200 12 • 500
2 1' 10'7 .... 3l SW25•c 12• 500 IS 30
40W 25•c 120• 500 200
2 N 10 18 N PN Tl
.l>wr
l•wr so• 500 200 3o• 500 1, 30
2NIOl9 NPN 1"1 40w 32s•c 15 30
2 NIOSO NPN Tl Pwr 40W 2s•c 120• 500 200 30• 500
- 50 - 300 100 18• - 20 .s -25 - 70 2N16l 1 I
2NI056 PNP G ~: Obeoleie I 240
- 300 100 34• - 20 .5 -16 - 45 211< 1057 I
~57 PN P GE Sw 1 240 - 45
Ooc A so 20 50 75 10 I 4 22.5 so 18
2N l058 NPN Syl 2S so 40
l\PN Syl AF Out A 180 15 100 75 so• 35 10 Kc
21' 1059
Si Pwr C SW 30 .SA 175 1s • 200 .75 500 60
2N1067 NPN I\C A 500 60
NPN f\C A Si Pwr C IOW 30 I.SA 175 15• 750 .75
2 N I068 10• .5 l ma 60
2N1069 NPN I\C A Si Pwr SOW 45 4A 175 I.SA
SOW 45 4A 175 10• I.SA .s I ma 60
2N l 070 NP/\ RCA Si Pwr 24T 3 5 2N l086 3
9 20 85 17• I 8T
2N l 086 l\ PN GE Owe 3 65 21' 1086A 3
3 65 9 20 85 11• I 8T 24T 3 s
2N l 086A l\PN GE Ooc -- 3-
65 9 20 85 17• I 8T 26T 3 s 2N 1087
21' 1087 l\ PN Gt: Ooc 3 2N6.H 2
Sw C 120 15 400 85 so• 20 5 8 12
2N l 090 N PN RCA 12 2N6.1S 2
N PN f\C A Sw C 120 12 400 85 40• 20 10 8
2N I09 I
Si AF C 2W 30 500 175 IS• 200 .75 --- 500 60
2Nl 092 N PN I\C A - 16 -16 2 M 097 !?
'.f 21\ 1097 P NP GE Af" Out :? 140 - 16 - 100 85 SST I
140 - 16 - 100 85 1ST I - 16 - 16 2 1' 1098 !?
2N I098 P NP GE AF Out 2
f>wy 30\V ao• 95 ~ S~ e 8 ma - 80
2'1099 PN P Ole 8 ma - 100
:?I\ 1100 P NP Die p,.,, 30\V 100• 9~ 25• SA 10 Kc
N PN Syl Af Out A 180 15 100 iS 2s• 35 10 K c so 20
2MI OI -
At' Out A 180 25 100 75 2s• 35 10 Kc 50 40
2 1'<1102 N PN ~ I - 10 - 12
2N ll07 PNP lo If' Rf A 30 16• 5 85 33 - 0.5 40
1o n· l\f' A 30 16• 5 85 30 - 0.5 35 - 10 - 12
2NII 08 PNP Tl
p;., p Tl lo IF Rt• ... 30 16• 5 85 IS - 0.5 35 - 10 - 12
~ 109 35 - 10 - 12
:?1' 1110 P.-. 1• Tl lo IF R F A 30 16• s 85 26 - 0 .5
PNP Tl lo IF RF ... 30 20• s 85 ~:? - 0 ,5 35 - 10 - 12
:?"\ I 11 1 - c-
7 ISO - 20 - 12S 85 3;) -60 5 - 6 - 20 2N1115 i
:?I\ 1115 PN P C. E Sw - 20 21', l ll SA 7
2 NIIISA PN P GE Sw 7 150 - 35 - 125 85 35 - 60 5 - 6
PN P Phil Ooc C ISO - 25 - so 140 9 1.0 - 25
2N ll 18 --
P NP Phil IF R~• C ISO - 25 - 50 140 IS I 0. 1 - 10
21\ ll18A 0.1 - 10
21' 1119 P NP Phil Sw C ISO - 10 - so 140 6• - IS
:?:\JI ZI NP~ C.E IF 3 65 15 20 85 34• I 8 Kc 5 15
2 "\ II :?:? PNI' Phil Sw D - 25 @45°C - 10 - 50 85 35 1.0 5 -5
l>N P D - 25 ~ 45•c - ao 8.5 35 1.0 5 - 5
2 1' 11 22A Phil Sw -25 - 45
2 1\ 11 23 PN P Phil Sw C 750 - 10 - 100 100 40• - 100 3
PNP Tl RF --- C 750 100 100 12 - 10 750T - 5 - 15
21' 11 4 1 - 5 - 15
2 1' 111:? PNP Tl RF C 75() 100 100 10 - 10 600T
2 "il I 11 PNP Tl RF C 750 100 100 8 - 10 480T -s - 15
---------------- J EDEC
Ho. Type Mfr. Use
Dwg .
Ho.
Po mw
@ 2s·c
BVce
BVcs' l e mo T, •c
MIN.
hto-hrs" @ le mo
MIN.
f••• me
MIN.
G. db
MAX.
l colµo l @ Vea
Closost
GE
Dwg.
Ho.
2N I 141 PNP GE AF Oui I 140 -16 - 100 85 SST 1 - 16 - 16 2Nll44 1
2N 1145 P NP GE AF Oul I 140 -16 - 100 85 45T I -16 - 16 2Nll45 I
21\ 1149 NPN Tl Si AF A 150 45• 25 175 0.9 - 1 ,ff 35T 2 30
21\ I 150 NPN Tl Si AF A ISO •s• 25 175 - 0.948 - I ST 39T 2 30
2Nll51 NPN Tl Si M' A 150 45• 25 175 - 0.948 - 1 8T 39T 2 30
21\ 1152 I\PN Tl Si AF A ISO 45• 25 175 - 0.9735 - 1 6T 12T 2 30
21'1153 !l,PN Tl Si AF A ISO 45• 25 175 - 0.987 _, 7T 42.5T 2 30
2N l 154 NPN Tl Si AF A 750 so• 60 150 - 0.9 - 5 30 5 50
21\ ll55 NPN Tl Si AF A 750 so• 50 150 - 0.9 - 5 30 6 80
2Nll56 11,PN Tl Si AF A 750 120• 40 I SO - 0.9 - 5 30 8 120
2NIIS7 PNP M-H J>wr -60• 95 38• - JOA - 7.0 ma - 60
2;'\1157A PNP !11-11 Pwr - so• 95 38* - JOA - 20 ma - 80
-2:-.1159 PNP Die Pwr 20W 1 11•C so• -65 - 65 30• 3A I0T Kc 8 ma - 80
21\ 1160 PNP Die Pw,- 20w 11•c so• -65 20• SA ! OT Kc 8 ma - 80
2N 1168 PNP Ole Pwr 45\V - so• SA ( h :) 95 II0T IA 10 Kc T 37T - 8 ma - 50
2:-.1111 PNP Roy Sw C - 12 400 85 30• I 10 5 -12 2N397 2
2i\ 1172 PNP Die Pwr 40• - 65 30 100 34T 0.2 ma - 40
N> 21\ 1177 P NP RCA Ori(i R~" It' 80 - Jo• - 10 71 100 140 - 12 - 12
~ 2'\1178 P NP RCA Oriti RF IF 80 - 30• -10 71 40 140 - 12 - 12
2i\ 1179 PNP RCA Ori(l RF IF 80 - 30• - 10 71 80 140 - 12 - 12
:?!l,1180 PNP RCA Ori(t RF IF 80 - so• - 10 71 80 100 - 12 - 12
2l'l 183 P NP RCA Pwr C IW - 20 - 3.0 100 20• - 400 500 Kc -250 - 250 - 45
21\ I 18.1A P1'P RCA Pwr C lW -30 - 3 .0 100 20• - 400 500 Kc - 250 -80
2N I 18:IR PNP R CA Pwr C IW - 40 - 3.0 100 20• - 400 500 Kc - 250 - 80
Zr\118-1 PN P R CA Jlwr C IW - 20 -3.0 100 40• - 400 500 Kc - 250 - 45
!!i\ I 184A PNP R CA Pwr C IW - 30 - 3.0 100 40• - 400 500 Kc - 250 - 80
2i\ 1184R P NP RCA Pwr C IW - 40 - 3 .0 100 40• - 400 500 Kc - 250 - RO
21' 1198 NPN GE Sw 3 65 25 75 85 11• 8 5 1.5 15 2Nll98 3
!!N1199 NPN PhiJ Sw C 100 20 100 150 12• 20 0.7 - 10
21\ 1202 P NP M- 11 Pwr - 60 95 40• 0.5A - 2.0 ma -80
21\ 1203 PNP M-11 Pwr - 70 95 25* - 2A - 2.0 ma - 120
21\ 1213 J>NP R CA Sw C 75 -25 - 100 71 -s - 12
2N1214 P NP RCA Sw C 75 - 25 -100 71 - 5 - 12
2N 12 15 P N I' RCA Sw C 75 - 25 - 100 71
-.._
- 5 - 12
21'1216 P NP RCA Sw C 75 - 25 - 100 71 -s - 12
2N l 217 NPN GE 3 75 20 25 '\0• .5 6.0 29 15 2N l2l7 3
2!\ l 22<J PNP RCA RF I F C 120 -40 - 10 100 20 - 1.5 30 15 -12 - 12
2N l 225 P NP RCA RF H' C 120 - 40 - 10 100 20 - 1.5 100 15 - 12 - 12
2N l 226 PN P RCA Rf It' C 120 - 60 - 10 100 20 - 1.5 30 15 - 12 - 12
21\1228 P NP llu11hea Sw C 400 - 15 160 14 1.2T - 0. l - 12
2N l 229 PNP Hu~hea Sw C •oo - 15 160 28 1.2T -0.1 - 12
2N 1230 P NP llu,ihea Sw C 400 -35 160 14 1.2T -0.1 - 30
JEDEC Dwg. Pc mw BVc,i MIN. MIN. MIN. MAX. Closest Dwg.

Type Mfr. Use No. @ 2S' C BVc s' l c mo T, ' C h r,-h v11' @ le ma f htb me G, db lco lµa ) @ Vc11 GE Na.
No.
2N 1231 P NP Hughes Sw C 400 - 35 160 28 1.2T - 0.1 - 30

2N1232 P NP Hughes Sw C 400 - 60 160 14 I.OT - 0.1 - 50
2N1233 PNP Hughes Sw C 400 -60 160 28 I.OT - 0.1 - 50
2Nl234 P NP H ughes Sw C 400 - 110 160 14 8T - 0.1 - 90
2Nl 238 P NP H ughes Sw lW free air - 15 160 14 1.2T -0.1 - 12
2Nl239 P NP Hughe,, Sw IW free air - 15 160 28 1.2T -0.1 - 12
2Nl240 PNP H ughes Sw lW free nir - 35 160 14 1.2T -0.I - 30
2N1241 P NP llughes Sw IW free air - 35 160 28 1.21' - 0. I - 30
2N l 242 PNP llu~hes Sw I W free nir - 60 160 M I.OT - 0.1 -50
2Nt2.13 PNP H ughes Sw l W free air - 60 160 28 I.OT - 0. I -50
2Nl2-H PNP Hughes Sw lW free air - 110 160 14 .81' - 0. 1 - 90
2Nl251 NPN Syl Sw A 150 15 100 85 70 7.5 so 20
2Nl252 NPN F-C Sw C 2W 20 175 15• ISO 10 20
2Nl253 NPN •·-c Sw C 2W 20 175 40• ISO 10 20
2N1261 PNP M-11 Pwr - 45 95 20•
21\ 1262 PNP M-11 Pwr - 45 95 30• - 2.0 - 60
2Nl263 PNP M-H Pwr - 45 95 45• - 20 - 60
21\ 1264 PNP Syl DrifL IF' R •• so - 20• 50 75 15 1.5 50 - 20
t,O A 50 - to• 100 85 25 l 600 100 2NI097 2
21\ 1265 P NI' Sy l AF 2
2Nl266 PNP Syl A 80 - 10• 85 10 1 100 - 10 2NI098
~ ••· R•· 15 37T I 30 2Nl276 4
2Nl276 NPN (:E Si AP 4 150 30 25 ISO JOT 10
21\ 1277 NPN GE Si AF' 4 150 30 25 150 20T 10 15 39T I 30 2N1277 4
21\ 1278 NPN GR Si AF 4 150 30 25 150 33T 10 15 44T I 30 2N1278 4
21\ 1279 NPN GE Si AF 4 150 30 25 150 BOT 10 15 45T I 30 2N1279 4
21\ 1280 P NP ITC Sw C 200 16 400 85 ,10 - 20 5 -10 - 10 2N1% 2
2N1281 P NP ITC Sw C 200 12 400 85 60 -20 7 - 10 - 10 2N396 2
2Nt282 PNP ITC Sw C 200 6 400 85 70 - 20 10 - 10 - 10 2N397 2
21\ 1281 Pl\l' ITC Sw C 150 15 400 85 30 - 10 5 - 6 -20 2N396 2
21\ 1288 NPN GE Sw 10 75 5 50 85 so• 10 40 5 5 2N l 288 10
2N1289 NPN GE Sw 10 75 15 50 85 so• 10 40 s 15 2Nl289 10
2N1291 P NP CBS Pwr 20W 30 3 85 40• 0.5 5 - 2
2N1293 P NP ens Pwr 20W 60 3 85 40• 0.5 5 - 2
2Nl295 NPN CBS Pwr 20W 80 3 8~ 40* 0. 5 5 - 2
- 3 85 40• 0.5 5 - 2
21\ 1297 P NI' CHS Pwr 20W 100
2!\ 1299 l\ P N Syl Sw E 150 20 200 100 35• 50 4 .0 JOO 40 2N37i 2
2Nl300 PNP RCA Sw C 150 - 12 - 100 85 so - 10 - 3
PNP RCA Sw C
-
150 -12 - 100 85 50 - 10 - 3
-
2N1301
2N 1301 N PN GE-Tl Sw 2 300 20 300 100 40• 10 5 6 25
2', 1306 NPN Gt::-TI Sw 2 300 15 300 100 60• 10 10 6 25
21\ 1308 N l'N GE-Tl Sw 2 300 15 300 100 so• 10 15 6 25
2Nl3l0 NPN GT Ncoo lndicotor 120 90 20* 5 I.ST 7 5
2!\ 13 1:1 PNP T-S Sw C 180 -15 ,ioo 100 40• 6 2.5 - 0.5 2N396 2
-
MAXIMUM RATINGS ELECTRICA L PA RAMETERS
---------------
JEDEC
Mo. Type Mfr. Use
Dwg.
Mo.
Pc m w
@ 2s·c
BVo,:
BV cB• le mo T,•c
MIN.
hto• hr,:• @ le ma
M IN .
h tb IIIC
MIN.
Ge db
MAX.
l co(JLO) @l VcB
Closest
GE
Dwg.
Mo.
2N l 3 16 P NP ITC Sw C 200 15 400 85 so• 10 - 5 -12 2N397 2

2N13 l 7 PN P ITC Sw C 200 12 400 85 45• 10 -6 -12 2N397 2
2Nl318 P NP ITC Sw C 200 6 400 85 40• 10 -7 - 10 2N397 2
2N l 3-l 3 P NP ITC Sw C 150 16 400 85 IS• -50 4 -6 - 15 2N395 2
2Nl 344 PNP ITC Sw C 150 JO 400 85 60* -20 7 10 -15 2N397 2
2Nl345 P NP ITC Sw C 150 8 400 85 30• - 400 10 -6 - 12 2N397 2
2Nl346 P NP ITC Sw C 150 10 400 85 40• - 14 10 - 5 - 5 2N397 2
2Nl347 PNP ITC Sw C 150 12 200 85 30• 10 5 - 6 - 12 2N396 2
2N l 352 PNP ITC AF C 150 20 200 85 40• 2.ST - 5 - 30 2N526 2
2N1353 P NP ITC Sw 200 10 200 85 25• 10 1.5 6 10 2N39-I 2
2N l 35-I P NP ITC Sw 200 15 200 85 25• 10 :1 6 15 2N395 2
2N l 355 P NP ITC Sw 200 20 200 85 30• 10 5 6 20 2N396 2
2Nl357 PNP ITC Sw 200 15 200 85 40• 10 10 6 15 2N397 2
2Nl358 PNP Die Pwr so• 95 40• 1.2 100
2Nl411 PNP Phil Sw 25 @ 45•c - 5 - 50 85
n 20• - 50 s - 5
2N14l 3 PNP GF! AFSw 2 200 - 25 - 200 85 25• - 20 0.8 - 12 - 30 2Nl <ll3 2
2N l 4 l 4 P NP GF! AFSw 2 200 - 25 - 200 85 34* - 20 1.0 - 12 - 30 2N l414 2
I:,:)
2N l4 15 P NP GE AF Sw 2 200 - 25 -200 85 53• -20 1.3 - 12 - 30 2Nl415 2
2Nl427 l'N P Phil Sw D 2s @ 45•c - 6 -50 85 20• - SO 5 - 6
~ 21\ 1428 PNP Phil Sw C 100 - 6 - 50 140 12• - 5 0.1 - 6
2N1429 PNP Phil Sw C 100 - 6 -SO 140 12• - 5 0. 1 -6
2NM3I NPN Syl AF A 180 IS 100 75 75• 35 50 20
21\ 1432 PNP Syl AF 100 -45 10 100 30 2 15 - 45
2N I 13:1 PNP CflS Pwr - so 3 .5 95 20• 2 s 0. 1 - 2
2Nl434 PNP CBS Pwr - 50 3.5 95 4S• 2 5 0.1 - 2
2Nl435 PNP ens Pwr - so 3.5 95 30• 2 5 0.1 - 2
2Nl436 PNP Phil Sw C so - 15• - so 100 20• -10
21\1446 PNP IT C AF 200 25 400 85 16* 20 .8 IO 30 2N524 2
21\ 1<147 PNP ITC Af"
cC 200 25 400 85 35• 20 1.5 10 30 2N525 2
21\ 14-18 PNP ITC A~' C 200 25 400 85 so• 20 2 10 30 2N526 2
!!Nl449 PNP ITC AF C 200 25 400 85 10• 20 2.5 10 30 2NS27 2
2Nl450 PNP GT 120 :io• 100 85 20• 10 10 7
2Nl472 I\PN Phil Sw C 100 25 100 150 20 10 0.5 10
2Nl473 NPN Sw F. 20 400 75 25• 400 4 100 40
2NM78 PNP ir.t. Sw C 250 - :io• - 400 100 40* - 100 3 5 1.5 2N396 2
2Nl479 NPN RCA Pwr 4\V 60• 1.5 175 JS• 200 1.5 60 JO 30 2N l97A 8
2N1480 NPN RCA Pwr 4\V 100• 1.5 175 JS• 200 1.5 100 10 30 2N497A 8
2Nl481 NPN RCA p,~r ,1\V 60• 1.5 175 35• 200 1.5 60 10 30 !!N656A 8
21' 1482 NPN R CA Pwr 4\V 100• 1.5 175 35• 200 1.5 100 10 :io 2N656A 8
21\t,l83 NPN RCA Pwr 15\V 60• 3 175 15• 750 1.25 15 30
21'141U NPN RC A Pwr 15\V 100• 3 175 1s• 750 1.25 15 30
2N l 485 NPN RCA Pwr 15\V 60• 3 175 35• 750 1.25 15 30
M.A XIMUM RATINGS ELECTRICAL PARAMETERS
Dwg. Pc mw BVcs MIN. MIN. MIN. MAX. Closnt Dwg.

JEDEC 100<1<0 ) @ Voe GE No.
No. Type Mfr. Use No. @2s· c BVca• lo ma T, •c hr,•h•s• @ le ma t.,. mc G. db
2Nl486 NPN RCA J>wr 15W 100• 3 175 35• 750 1.25 15 30
NPN RCA Pwr 60W 60* 6 175 10• 1.5 I 25 30
2N1487 I 25 30
2Nl488 NPN RCA Pwr 60W 100• 6 175 10• 1.5
2NL489 NPN RCA Pwr 60W 60• 6 175 2s• 1.5 I 25 30
2Nl490 NPN RCA Pwr 60W 100• 6 175 2s• 1.5 1 25 30
P NP Phil MADT C 25 - 2s• -50 85 20• - 10 5 - 5
2Nl499
2Nl500 PNP Phil MADT C so - I S• - 50 100 20• - so 5 - 5
2Nl501 PNP M-H Pwr -60• 95 25* -2A -2 -60
M-H Pwr - 40• 95 25• -2A - 2 -40
2Nl502 PNP
2Nl507 NPN Tl 0.6W 60* 500 175 100• 150 I 30
3 75 10 20 85 s• I 5 75 2Nl510 3
2Nl510 NPN GE Neoo l odicator 5 12
2N1605 NPN Syl Sw C 150 24 100 100 40• 20 4
I 240 - 65• -300 85 18* -20 0.5 -25 - 65 2Nl614 I
2Nl614 PNP GF. Sw 2Nl671 5
2N1671 PN GE Si Uni 5 SEE G-E TRA NSISTOR SPF.CIF'ICATION SECTION 5
Si Uni 5 SEE C'rE TRA NSISTOR SPECI FICATION SECTION 2N1671A
2Nl671A PN GF.
Si Uni 5 SEE G- E TRANSISTOR SPECI FICATION SECTION 2N16718 5
2i'ol6718 PN GF.
3N21 Pt Sw 100 -60 50 2.5
RF 1s• 85 .92« 15 10 5
3N22 NPN ~~k
~ Obsolete 30 5 so 14 10 4.5
00 3N23 NPN GP 12 10 4.5
3N23A NPl\ GP Obool.elAI 30 5 35
NP N GP ObsolelAI 30 5 20 II 10 4.5
3N23B
ObsolelAI 30 5 10 9 10 4.5
3N23C NPN GP 40T 10
3N29 NPN GE OboolelAI 50 6 20 85 IOOT
3N30 NPN GE Oboolete 50 6 20 85 lOOT 80T IOT
3N31 NPN GE Oboolete 50 6 20 85 IOOT 80T IOT
Tl Si RF 125 30 20 150 10 -.I l OOT .4 20
3N3-1 NPN !SOT .4 20
3N35 NPN Tl Si RF 125 30 20 150 10 - 1.3
6 30 6 20 85 50 10 7 3N36 6
3N36 NPN GE RF 10 7 3N3i 6
3N37 NPN GE RF 6 30 6 20 85 90
Pwr l\V - 60• 100 2s• - SA 16.ST Kc -0.2 -2
3N45 Pl\P M-H - 0.2 -2
3N46 PNP 1\1-11 Pwr lW -80* 100 20• - SA 12T Kc
TUNNEL DIODES IN2939

9 SE•: G-F. TRANSISTOR SPECl.'ICATION SECTION 9
1N2939 IN2940 9
IN2940 9 SEE G-E TRANSISTOR SPEC IFI CAT ION SECTION 1N29,1 1
SEE G-E TRA!';SISTOR SPEC IFI CATION ~ECTION 9
IN2941 9 IN2969 9
IN2969 9 SEF. G-E TRA NSISTO R SPECI FICATION SF.CTION
ABBREVIATIO N S
--·-------------
TYPES AND USES:
Si-Silicon High Temperature Transistors
MANUFACTURERS:
Bendix-Bendix Aviation Corp.
T-T11pical Values
M-H-Minneapolis-Honeywell Regulator Co.
(all others germanium) CBS-CBS-Hytron Motor-Motorola, Inc.
Pt-Point contact types Cle-Clevite Transistor Products Phil-Philco
AF-Audio Frequency Amplifler and
General Purpose Die-Delco Radio Div., General Motors Corp. Ray-Raytheon Manufacturing Company
AF Out-High current AF Output F-C-Fairchild Semiconductor Corp. RCA-RC~
Pwr-Power output 1 watt or more CE-General Electric Corp. Syl-Sylvania Electric Products Co.
RF-Radio Frequency Amplifler
Osc-High gain High frequency RF oscillator CT-General Transistor Corp. TI-Texas Instruments, Inc.
IF-Intermediate Frequency Amplifler GP-Germanium Products Corp. TS-Tung-Sol.
lo IF- Low IF ( 262 Kc ) Amplifier
Sw-High current High frequency switch Hughes-Hughes Semiconductors W-Westinghouse Electric Corp.
AF Sw- Low frequency switch ITC-Industro Transistor Corp. WE-Western Electric Company
i
NOTE: Closest GE types are given only as a general guide and are based Since manufacturing techniques are not identical, the General
on available published electrical specffications. However, General Electric Company makes no claim, nor does it warrant, that its
Electric Company makes no representation as to the accuracy and transistors are exact equivalents or replacements for the types
completeness of such information. referred to.
I
OUTLINE DRAWINGS
I
0 J 1.50
.m
I
.,II:: 1---..--------,-+--
.106
~
-:oei'
137
I
.34501A
. 322
460
MAX
DIA I
l l
.020 MAX
(GLASS EXTENSION)
I
I
I
DIMENSIONS WITHIN
JEDEC OUTLINE
T0-5
.370MAX
.360 MIN
1 - -,335 MAX
,_ . 325MIN
I
NOR 11 This zone is controlled IOI aulo•
mahc handling. The variation m actual
diameter within this zone shall not meed
.010. IOO MrN .260MAX
(NOTE I) 215MIN
I
~~ I
IIOTI 2, Measured from max. diameter of
the actual device.
NOR 2, The specilled lead diameter ap.
phes m the zone between .050 and 150 I SMIN
from the base seat. Between 150 and .5
maiimum of .021 diameter 1s helcl. Outside
of these zones the lead diameter 1s not
cootrotled. Leads may be 1nse~ed. wrthout
damage, m .031 holes while transistor
3 LEADS
.011!:ii~
I
enters .371 hole concentric with lud hole -::r:;::~:,,.....j_--,. (NOTE 3)
circle.
APPROX WEIGHT: .05 OZ
ALL DIMENSIONS IN INCHES
THIS LEAD
GROUNDED
TO HOUSING
I
.040 MAX
.029MIN
(NOTE 2)
45•
I
.031 ± ,003 - - - -- - ~
I
I
I
I TRANSISTO R SPECIFICATIONS
I
I .3 75MAX. . 235MAX.
I i.s·
I nn
EM ITTER - u u.. WE L
EAO O A
--i l,,-.0481 " ' -COLLECTOR

f-.192-l
..+.002·
I .• .017 -:OOI"
I
I
I
0
.370 MAX
DIMENSIONS WITHIN .360MIN
I JEDEC OUTLINE
T0-5
.335 MAX
.325 MIN
I IOn 1, This zone is controlled for auto-

matic handling. The variation in actual
diameter within this zone shall not exceed
.150MIN .260 MAX
(NOTE 1l.250MI N
.010.
I Nn 2: Measured from max. diameter of

I
rn\ 3
the actual device. 1.5 MI N
10n 3: The specihed lead diameter ap- 0 D 1
I plies in the zone between .050 and .250
from the base seal. Between .250 and 1.5
maximum ot .021 diametei is held. Outside
ot these zones the lead diameter is not
k-200! .010- l
I ::::~:::::::::- I ' 017
LE ADS
+ .002
- .001
( NOTE 3)
I
controlled. Leads may be inserted, without
damage, in .031 holes while transisto1
ente1s .371 hole concentric with lead hole
circle.
~ -
I .029(NOTE2) -
45•
I .03I
!003
I
T R A N SISTOR SPECIFI C ATIONS I
0 I
.370 MAX
DIMENSIONS WITHIN .360 MIN
JEDEC OUTLINE ....TO-33 .335 MAX
.325 MI N
1tn h This zone is controlled for auto-

mat1C handlin&. The variation in actual
diameter within this zont shall not exceed
,010.
J!50MIN .260MAX
(NOTEI) .250MIN
I
I~
Nn 2, Measured from mai. diameter of
the actual device.
N n , , The specified lead diameter ap-
plies in the zone bet-n .0SO and .2SO l.5 MIN
I
lrom the base seal Between .2SO and LS
0 0 1
muimum of .021 diameter i1 held. Outside
of these zones the lead diameter ,s not
controlled.
D
l-,200 t .010 - i
I
I
81 90
I
EMITTER... E}
BASE TW0.. 82 .0 17
(NOTE 3 )
LEAD 2
BASE ONE .. 81 TINNED LEADS
!::88f
.029 (NOTE2)
I
I
!~ 33!5MAX DIMENSIONS WITH IN I
0 1
.260 MAX .150 MIN
.250 MIN ( NOTE! )
t
.32!5 MIN JEDEC OUTLINE
TO- 12
I
L Nn h This zone is controlled for auto-
4 LEADS ~
.!5rlo O
370MAX
~
matic handlin&, The variation in actual
diameter wfthin this zone shall not exceed
.010.
Nn 2, Measured from mu. diameter of
I
+002 .360M IN
.0 17 - ·.OOI DIA
(NOTE 3)
.0 29M IN
1
the actual device.
Nn • • The specified lead diameter ap,
plies in the zone between .050 and .2SO
from the base seal Between .2SO and .5
I
go• (NOTE
I
maximum of .021 diameter is held. Outside
of these zones the lead diameter is not
45° t aintrolled.
I
.03
I
--1.200!.0IO ~
I
I
302
I
I ORIENTATION
.135
MAX.
0
I
RANDOM
I ~ 0 1•
.322 ~-
=
EMITTER
I .020
(GLASS EXTENSlOH)
I
MAX.:-j J....
11
.055
-:04i"'
I *CUT TO 0.200" FOR USE

l£AOS TINNED DIA, .018
MOUNTING POSITION · ANY
WEIGHT: .05 OZ.
IN SOCkETS.
I / BASE CONNECTED TO TRANSISTOR SHELL.

DIMENSIONS IN INCHES.
I .225MAX
I
.195 M IN
DIMENSIONS WITHIN .195MAX--I
I
JEOEC OUTLINE
TO·l8
11 Minimum IJb thickness .005.
C .l60MIN
I
11ft
.210MAX
11ft 2, Leid diameter is not controlled .170MIN
in the aru I / 16' from base sul
11ft a, Calculated by muS11ring ttanae
I diameter. ill(ludin& tab and exduding tab, .020MAX

and S11btractin& the lar&er diameter from ( NOTE I)
the smaller diameter.
e=:;::;:=::::;;::::::;:::;~-_ L_~---
I ALL OIMENSIOHS IN I NCHES .500MIN
3 LEADS
I .011~gg~
(NOTE2)
I 45•!5
I .050MAX
,030MIN
.048 MAX
/ '\
'I, 'v
' 'I,
o+
I .025 MI N
( NOTE 3)
303
I
.225 MAX
0 DI MENSIONS WITHIN
JEOEC OUTLINE
T0-I8
.I95M IN
.1!15 MAX - - !
c · •60M IN
1
I
Nn I I Minimum tab thickntss .005.
Nn 21 Lead diameter is not controlled
in the area I JI 6. horn base seal.
.2I0 MAX
.I70 M IN I
Nn 11 Calculated by measuring llange
diameter, including tab and excluding tab,
and subtracting the larger diameter from
the smaller diameter.
c::::;:;=::::;:;:=;:;~-_ J_~
- --
.020 MAX
( NOTE I)
I
ALL DIMENSIONS IN INCHES .500 MI N
3 LEADS
I
.011~ggf
( NOTE2) I
4 5•!5•
I
.050 MAX
.030MI N
.048 MAX
,- ,\ o+
'),'I,,.;
.
I
.025 MI N
( NOTE 3)
I
.335MAX
,315MIN JEDEC OUTLINE
I
.260MA1t ,I00 MI N
.240MIN (NOTEI)
1 T0- 39
I
L Nn h This zone is controlled fo< auto-
matic handlin1- The variatio41 1n actual
diameter within this zone $hall not exceed
.010.
I
Nn 21 Measured from mu. diameter ol
the actual dmce.
Nn 11 The specilied le,ct diameter ap-
plies in the zor.e between .050 and 150
lrom the base seal Bet-,, 150 and .5
I
muimum of .021 diameter 1s held. Outside
ol these zones lhe lead diameter is not
controlled. I
I
I
-,j.200!.0IO : -
I
I
I
I TRANSISTOR SPEC I FICATIONS
I
I
I
I • E
I eC
•a
ec
I t
COLORED DOT
ON SIDE
I INDICATES
COLLECTOR
I
I 0
I
I
I
I t
I BLACK
LINE
I
21. RECTIF IER SPECIF ICATIO NS I II
L - - - -- - - - - - - . J.
NOTES ON RECTI FIER SPECIFIC ATION SHEET
The performanc e of a rectifier is judged primarily on four key measuremen ts, or
and 55°C, and a re b ased on a 60 cycles per second (A-C) input with the rectifierI
parametcrs. They are always given for specific ambient conditions, such as still air
feeding a resistive or inducthc load (sec ® below). A capacitive load will increase
the Peak Reverse Voltage duty on the rectifier cell and
will therefore necessitate a slightly lower set of ratings
than shown here. These key parameters are:
<D Maxim um Pe ak Re verse Volta ge ( mually refcrrc.-d
n VV t::;:: I
~ H AI
to as PRV), the peak a-c voltage which the unit will

withstand in the reverse direction; (2) Max imum A llow-
a ble D- C Output Curre nt, which va ries with ambient
I
60 CPS (CYn lS PER SlC.01111)
A·C INPUT
temperature ; (J) Maximum A llowa ble One -cycle Surge Curre nt, representin g the
encountered when the equipment is turned on; ® Maximum Full-food Fo rward Volt-
age Drop, measured with maximum d-c output Rowing :md maximum l'HV applit.-d.
I
maximum instantaneo us curre nt which the rec.-tificr can with1,tand for one l·yde, u~m11ly
This is a measure of the rectifier's efficiency.
EXAMPLE:
I
These alloy junction silicon rectifiers are designed
for gen<:ral purpose applications requiring maxi-
1N169 2 , 1N1693
1N1 694 , 1N1 695 I
mum e<.-onomy. These rectifiers are hem1etieally
scaled and will perform reliably within the oper-
ating specification s.
RATINGS A N D SPECIF ICATIONS
@i--- - -- - - - - - ---{ 160 CPS, Resistive or Inductive )
1N1692 1N1693 1 N1694
I I N 169 5
(i),{ Max. Allowable Penk lnv,•rsc Voltage 100 200 300 400 volu
Max. Allowahle RMS Voltage
Max. Allowable Continuous Reverse-
DC Voltage
'"" f Max. Allowable DC Output tOO•C Amhl,·nt
70
100
250
140
200
250
210
300
250
I 280 ,·ohs
400 volty
250 ma
16/'l J\lu. Allowable DC Output so•c Ambl~n t 600 600 600 ma
I
600
<J>.< Mat. Allowable One Cycle Surge Currt'nt 20 20 20 20 ampi
@-C Max. Full Load Forward VollAJl<' Drop .60 .60 .60 .60 ,olts
( Full cycle avemg" at 1oo•c)
Max. Leaka11e Current at Rat('d PIV
0.5
I
( Full cycle overage a t 1oo•c) 0.5 0.5 0.5 '""
Pt,ak Recurrent Forward Current 2.0 2.0 2.0 2.0 '""I"
Max. ()peralfng Temperature + 115•c - - ---'•
I
The other ratings or speciRcations arc additional yardsticks or performanc e whid1
are more or less critical depending on the opernting t.'Onditions to be experienced .
For in~tnnce, the l 1692 Series for whit:h ~pccific11tion s arc shown, bcinl( silit.-on rt•<.'li-
I
Rers, a re able to show a higher range of Ambient 01)crating Tcml)erutures with higher
output than a gem1nnimn unit would, and arc preferred on this basis for many appli-
cations. Maximum Leakage Current refers to the rever~e current which will flow whe n
voltage is applied, and he re, too, can be ,l critical measure of pe rform.mcc for speciRc
applications such as magnetic amplifiers.
I
Sometimes there is confusion as to whether a unit is a Diode or a Rectifier. Actually
the word Diode means "two" and both rectifie rs nncl diodes have two elemenb.
I
However, rectiRers nrc capable of handling much larger currents than diodes. The te m1
d iode is used to describe units t~ed in high frequcnl·y, low l'11rrcnt. ~ign,1I .1pplic,llinn,
such as in high frequency circuits of tclcvhion rccciH•rs.
306
---------------
...
CONDENSED RECTIFIER SPECIFICATIONS
SILICON CONTROLLED RECTIFI ERS

The following condensed specifications covering the General Electric series of Silicon
Controlled RectiJiers summarize the most important parameters. For complete detailed
specifications of a particular type, please contact the Semiconductor Products Depart-
ment, Advertising and Sales Promotion, General Electric Company, Charles Building,
Liverpool, New York.
For application information covering the General Electric Series of Silicon Controlled
Rectifiers, please see Chapter 18.
~ L O W C U RRENT S I LICO N C O NTROLL E D REC T I F I E RS

The Cl O Silicon Low Current Controlled Rectifier is a three junction semiconductor
device for use in low power switching and control applications requiring blocking up to
400 volts and RMS load currents up to 7 amperes. Series and parallel circuits may be used
for higher power applications.
lll
F{
j
Max. Peak Max. Gate Max. Rated 0-C
Outline 1 Cycle Current Current @ 115° C ::!!
Drwg. Min. Surge to Fire Stud Temp.@ 110° C I~
No. G-ETypeNo. Vao PRV Current (150° C J.T.) Cond. Angle Ill
,'11
1 Cl0U 25 25 60A 6.0ma 7A
1 Cl0F 50 50 60A 6.0ma 7A
"'~
1 Cl0A 100 100 60A 6.0ma 7A ::!!
1 ClOC 150 150 60A 6.0ma 7A 0
1 Cl0B 200 200 60A 6.0ma 7A
l Cl0H 250 250 60A 6.0ma 7A ~
1 ClOC 300 300 60A 6.0ma 7A 0
1 Cl0D 400 400 60A 6.0ma 7A z
•
MEDIUM CURRENT SILICON CONTROLLED RECTIFIERS :II
Ill
0
The C35 Silicon Controlled Rectifier is a three junction semiconductor device for use in :!
power control and power switching applications requiring blocking voltages up to 500 :!!
volts and load currents up to 25 amperes. Series and parallel circuits may be used for !:I
higher power applications. "O
•
:!l
:!!
Max. Peak Max. Rated D-C 0
Outline JEDEC or 1 Cycle Max. Gate Current @ 57° C ►
Current to Fire Stud Temp.@ 180°C :!
Drwg. G-EType Min. Surge 0
No. No. Vr,o PRY Current (125°C J .T.) Cond. Angle z
2 2N68l 25 25 150A 25ma 25A
•
(C35U)
2 2N682 so so lSOA 25ma 25A
(C35F)
2 2N683 100 100 150A 25ma 25A
(C3SA)
~ 2 2N684 150 150 150 A 25ma 25A
(C35C)
2 2N68S 200 200 150A 25ma 25A
(C35B)
2 2N686 250 250 150A 25ma 25A
(C3SH)
'
2 2N687 300 300 l SOA 25ma 25A
(C35C)
2 2N688 400 400 150A 25ma 25A
(C3SD)
2 2NMl9 500 500 150A 25ma 25A
(C35E)
----------------
MEDIUM CURRENT SILICON CONTROLLED RECTIFIERS
The C36 Silicon Controlled Rectifier is a three junction semiconductor device for use
in power control and power switching appHcations requiring blocking voltages up to
400 volts and RMS load currents up to 16 amperes. Series and parallel circuits may be
used for higher power applications.
~ Max. Peak Max.Gate Max. Rated D-C
Outline 1 Cycle Cur,ent Current @ 2S°C
Drwg. G-E Type Min. Surge to Fire Stud Temp.@ 110°c
No. No. Vr,-0 PRY Current (100°C J .T'.) Cond. Angle
2 C36U 25 25 125A SO ma 16A
2 C36F 50 50 125A SO ma 16A
2 C36A 100 100 125A SO ma 16A
2 C36C :II
150 150 125A SO ma 16A
2 C36B 200 200 125A SO ma 16A ~
2 C36H 250 250 125A SO ma 16A :!
2 C36C 300 300 125A SO ma 16A
:!!
Ill
2 C36D 400 400 125 A SO ma 16A :II
UI
Ill
"
0
"
z
Ii
UI
,,
MEDIUM CURRENT SILICON CONTROLL ED RECTIFIERS r;
The C40• series of Silicon Controlled Rectlfiers are specially selected to meet inverter ::!
~
circuit applications, as well as other circuitry that requires a maximum limit on tum-off ;
time. Each of these types is tested to insure that the tum-off time is less than 12 micro-
seconds, under the speciJled test conditions. Tum-off time is defined as the time interval •,
Ill
required for the silicon controlled rectifier to regain its forward bloclcing state after !:!
forward current conduction. This time is measured from the point where the forward ~
n
current reaches zero to the tlme of reapplication of forward voltage.
The 12 microsecond tum-off time applies to the types listed for the following operating
conditlons: Ii
Max. late
Mu. Fwcl. Cur. Min. Rate of Ii.. -
Olltfine '"" lev. Re-applied
G.E Type Min. lmmed. Before Current of Ri..
t,)
Drwg.
PRV Turn-off Min. Max. Rev. Current for Voha11•
... No. No. Veo
0
25 l OA SA 20A SA/µ 20V/ µ
2 C40U 25
50 lOA SA 20A SA/µ 21JV/ ,u
2 C40F 50
100 10 A SA 20A SA/ p 20V/ ,u
2 CfOA 100
150 l OA SA 20A S A/ p 20V/ µ
2 C40C 150
200 10A SA 20A SA/p..s 20V/ µ
2 CfOB 200
250 10 A SA 20A SA/I" 20 V I JJt
2 CfOH 250
300 lOA SA 20A SA/,u 20V/ p..s
2 C40C 300
• All other ratings and characteristics (with the above additions) apply as described on
the type C35 Silcon Controlled Rectifier Specification Sheet.
- - - - - - - - - -·- -·- - - -
HIGH CURRENT SILICON CONTROLLED RECTIFIERS
The C60 Silicon Controlled Rectifier is a three junction semiconductor device for use in
power control and power switching applications requiring blocking voltage up to 300
volts and RMS load currents up to 110 amperes. Series and parallel circuits may be used
for higher power applications.
An outstanding feature of the C60 is the all hard solder construction aHording a high
degree of freedom from thermal fatigue.
(;)
....
....
Max. Peak Max. Gate Max. Rated 0-C
Outline 1 Cycle Current Current @ 85°C
Drwg. Min. Surge to Fire Stud Temp.@ 180°C
No. G-ETyfM No. Y eo PRY Current (150°C J.T.) Cond. Angle
3 C60U 25 25 1000A 30ma HOA ;ii,
3 C60F 50 50 1000A 30ma HOA Pl
3 C60A 100 100 1000A 30ma llOA ::!
3 C60C 150 150 1000A 30ma llOA ~
3 C60B 200 200 1000A 30ma HOA
3 C60H 250 250 1000A 30ma UOA
"':II
a,
3 C60C 300 300 1000A 30ma HOA 11
Pl
...
0
~
0
z
a,
HIGH CURRENT SILICON CONTROLLED RECTI FIERS 21
The C50 Silicon Controlled Rectifier is a three junction semiconductor device for use :!l
:!
in power control and power switching applications requiring blocking voltages up to ~
l'I
400 volts and RMS load currents up to 110 amperes. Series and parallel circuits may be 21
used for higher power applications. Ul
"'II
An outstanding feature of the C50 is the all hard solder construction aHording a high :!l
degree of freedom from thermal fatigue. ~
n
►
-i
Max. Gate Max. Rated 0-C 0

Max. Peak z
1 Cycle Current Current @ 59°C Ul
Outline
Min. Surge to Fire Stud Temp.@ 180°C
Drwg.·
Vao PRV Current (12s•c J.T.) Cond. Angle
No. G-E Type No.
40ma H OA
3 csou 25 25 1000A
50 50 1000A 40ma UOA
3 CSOF
100 100 1000A 40ma UOA
3 CSOA
c., 150 150 1000A 40ma llOA
3 CSOG
.... 200 200 1000A 40ma llOA
to 3 C50B
250 250 1000A 40ma llOA
3 C50H
300 300 1000A 40ma llOA
3 csoc
350 350 1000A 40ma llOA
3 CSOJ
400 400 1000A 40ma 110A
3 CSOD
I OUTLINE DRAWINGS (SI__LICON CONTR OLL E D REC TIFIERS)
MOUNfOfO IU f OUTLl!rllt Oft,t,Willllt
DICNMINS W IOCS>
I
I
@ tc>•H att•H HU NUT
N)Pl.AUO
@ ITU\. LOCKWAltCII
,.,,.1.auo
© TUt....AL. ..Q4S THtea
COP,-flt, TWII P\.ATIO
@) Tl.f'Lotl ......U
.OH WM..L TMIICk
I (j,)
.UOO D
.OtO THICIC
1111CA WAl..:1t1 CI I
. 006 ~''"
I
I 0 C10 SILICON CONTlOLLID HCTlfll l
I C31 MICA WASHER IN MOUNTING KIT

ADOS 4'C/ WATT THERMAL RESISTANCE
JUNCTION TO HEAT SINK
I (4)NET WEIGHT • 33 OZ
114-28 8RASS KEP NU T i j

320 MAX
CAOMIUM PLATEO
I @
TERMINAL 040 THK
COPPER, TIN PLATEO
';f[}c:'AL~A\~R A
-
©
Ol2 SHOULOER THK @
I @) MICA WASHER
00~ THK .
MOUNTING KIT
ALSO AVAILABLE
AT WANGLE
OUTLINE DRAWING
I US, C36, C40 SILICON CONTlOLLID llCTlflllS
I
I ... I
I
.
THOO<
J!!.
I
I
, ., .OU
iiiii
·- ----+----~~ -ll!..
1-- - - - - - -tt;!- - - - - -~ "'
I NO~~i • IO . ..... NICll<L--,,lAflO NIH ANO
ONt: 1111..tCON MIONU tl'11tllrfl LOC.:•attelll
IUl',-Ltl:O WITH UCH UNIT
I
A""°X W[ltMT(llltCLU01MI KAltOWAJttl •JOt
cso, C60 SILICON CONROLLID ,acrmus
313
ll
CONV ENTIONAL RECTIFIERS
~
j
:!!
"'ll
'11
•
~
"II
L OW CURRENT GERM ANIU M RECTI FIER CELLS
0
>
-4
The following General Electric germanium junction rectifiers have become industry 0
standa.r ds of quality. They have demonstrated life for over 25,000 hours with no z
signific.a nt change in characteristi cs. The General Electric-developed top hat pack-
•
age and associated, hermetic seal coupled with a closely controlled manufacturi ng
process, guarantees continued product excellence. These germanium rectifiers offer
extremely low forward resistance that is difficult to match with any other type
rectifier.
Co)
....,..
Mox. Mox. Mox.
JEDEC Storag e
Peak Mox. Full Load o , .r.
or G-1 Temp.
1 Cycle Mox. liege. Current Voltage Drop Te mp.
Drwg. Ty,. •c •c
No. No. PRV Mox. l oo at T°C Su111e (Full Cycle A vg .} (Full Cycle Avg.)
.6 ma .18 volta 9s• c 1os• c

1 1N9S aoo 76 ma 165°C Amb. 26A u •c 1os• c
l USNlNH aoo 76 ma 65°C Amb. 25A .ema .18 volta
Min Forward/Rev~, .. Rali<>-700 u •c 85•C 95•c
1 1Nll6 100 76 ma 55•c Amb. 25A 3 S5•C 9s•c
1 USAF-1Nat5 100 75 ma 55•c Amb. 25A Min Forward/RevHM Ratio-700 u •c
25 A .a ma@ 160 V.D.C..48 volta n •c 86°C
1 IN868 200 100 ma 365°C Amb. 95• c 105°C
I 1N92 200 100 ma 65°C Amb. 25 A .95 ma .19 volta
1.15 ma .22 volta es• c 1os•c
1 IN91 100 150 ma @ 55°C Amb. 25 A
n•c 1os• c
2 !NIH 100 760 ma O 55• c Amb. 25A
95°C 1os•c
a 1N158 400 1000 ma @ 55°C A.m b. 25 A
95•c 1os• c
2 1Nl62 200 1000 ma @ 56°C Amb. 25 A
25 A 95• c 106°C
2 lNUI 100 1200 ma O 65°C Amb.
LOW CURRENT SILICON RECTIFIER CELLS ( LEAD MOUNTED)
----------------~ These low current silicon rectifier cells utilize the same top hat stable characteristics over a wide temperature range for the
package so well established by the above germanium cells; it is most exacting Military requirements, low cost units for the
a hermetically sealed package with years of field experience in- highly competitive manufacturer and a good selection of Mili-
dicating product excellence. A wide variety of top quality silicon tary approved units. Military approved units are available in
low current cells are indicated below. There are low leakage those units asterisked ( •) .
cells for magnetic amplifiers, high temperature rectifiers with
JEDEC Max. Max. Max.

or G-E Peak Max. Full Load Oper. Storage
Drwg. Type 1 Cycle Max. Liege. Current Voltage Drop Temp. Temp.
No. No. PRY Max. loo at T°C Surge (Full Cycle Avg.) (Full Cycle Avg.) •c •c
1 1N440 100 16 A uo•c 176°C
l lNHl 200 300 ma 60°C Amb. 15 A .814&
.7614& 26'C
26'C t.5 V 26°C 160°C 175°C
1 1N442
(,)
.... 1
1
lN4'3
1NH4
300
400
600
300 ma
300 ma
50'C Amb.
50'C Amb.
"'-l""C•••
300 ma 60°C Amb.
16A
16 A
16A
I
1.0 14&
1.5 p,a
1.26 p.
26"C
26' C
25' C
1.6 V
1.6 V
'" l""C 25'C
25'C
160'C
160'C
175' C
176"C
1.6 V 26'C 150'C 176'C
ti\ 1 1N446 600 800 ma 60'C Amb. 16 A 2.0 pa@ 26'C 1.5 V 26'C 160' C 176' C
1 1N699 60 600ma 26' CAmb lOA 160' C 175°C
1 1N699A 60 600ma 25'C Amb. lOA 1.0 pa ""C
25"C 1.6 V 200 ma 160' C 175°C
1 lN600 100 600ma 26°C Amb. 10 A 1.0 p,a 25'C 1.6 V 200 ma
1
l 1N600A
1N601
100
150
600ma 25'C Amb.
600 ma, 25°CAmb.
lOA
lOA
.,~I
1.0 pa
1.0 µa
25°C
25°C
1.6 V
1.6 V
. l~-- 200 ma
200 ma
150'C
150°C
150'C
175°C
176"C
175'C
1 1N601A 160 600ma 25°CAmb. lOA 1.0 µ,a 26°C 1.6 V 200 ma 150°C 175°C
1 1N602 200 600ma 25°C Amb. lOA 1.0 µ,a 25°C 1.6 V 200 ma 150°C 176°C
1 1N602A 200 600ma ~ 25"C Amb. JOA 1.0 µ,a 26"C 1.6 V 200 ma 150°C 175"C
1 1N603 800 600ma ~ 25' C Amb. lOA 1.0 µa 25'C 1.6 V @200 ma 160°C 176'C
1 1N603A 300 600ma b25'CAmb. lOA 1.0 µa , 25"C 1.6V 200ma 160°C
l 1N604 ,oo 600 ma, 25°C Amb. 176'C I§
lOA 1.6 14& 25'C 1.6V 200 ma 160'C 175'C
l 1N60,A ,oo 600ma, 25°C Amb. 10A 1.6 j4& 25'C 1.6V 200 ma 160'C
1 1N605 600 175'C :!!
600ma 26'C Amb. lOA 2.0 µa 25°C 1.5V 200 ma 160'C 175° C I'll
1 1N605A 500 600m.a 26' C Amb. lOA 2.0 14& 25' C 1.5V 200 ma 150' C 175'C ~
1 1N606 600 600ma 25' CAmb. lOA 2.6 p,a 25'C 1.6 V 200 ma 160'C 175'C (II
1 1N606A 600 600ma 25°C Amb. lOA 2.5 pa 26'C 1.5 V 200 ma 160'C 176°C "II
l 1N560 800 600ma so•c Amb. 15 A .3ma 150°C 0.6 V 150°C 160°C 115• c I'll
l IN561 1000 600ma ao•c Amb. 15A .3ma, 150' C 0.6 V 160°C 150°C £!
1 1N1692 175°C
100 600ma 60'C Amb. 20A .6 ma 100°c 0.6V lOO' C us•c 175°C 11
l 1Nl693 200 600ma ~ 50°CAmb. 20A .6ma 100°c 0.6 V 1oo•c 115°C
1 1Nl69' 800 176°C 10
600ma ~50•c Amb. 20A .6ma 1oo•c 0.6 V 1oo•c 116°C 115•c
l 1N1695 600ma 50°C Amb. 20A .5ma 100°c 0.6V 1oo•c 115' C 176"C ...►
1 1Nl696 1>00 600ma 60"C Amb. 20A .5ma lOO' C 0.6V lOO'C 115°C 175°C 0
1 1Nl697 600 600ma 60° C Amb. 20A .6ma 1oo• c 0.6V lOO"C
·~ 116'C 175' C z
(II
176° C
:u
1 1N444 B 500 650 ma vi: 50° C A mb. 16 A 1.75 m a @ 26°C 1.s v $ 25•c 1so• c
1 1N445B 600 650 ma (,iJ s o• c Am b. 16 A 2.0 ma @ 25°C 1.5 v 25• c 15o• c 11s• c l!l-4
1 1N440B 100 750 m a ~ 50°C Amb. 15 A 0.3 ma @ 25°C 1.5 v @ 25• c 15o• c 11s• c 'Tl
1 1N 44IB 200 750 ma iiJ 50°C A mb. 15 A 0.75 ma ~~ 25°C 1.5 v ; . 2s• c 1so•c 115• c
1 I N442B 300 750 ma • 50°C Amb. 15 A 1.0 ma (fi) 25°C 1.5 v Iii! 25• c 15o• c 175°C "':u
1 I N443B 400 750 ma Ii• 60°C Amb. 15 A 1.5 ma (,/) 25°C 1.5 v ~I! 2s• c 15o• c 175°C U)
1 lN llOO 100 750 ma (,t 50°C Amb. 15 A .3 ma (fiJ 150°C 1.6 V @ 25"C 165°C 11s• c "O
1 1N l101 200 750 ma Iii 50°C A mb. 16 A .3 ma r, 150°C 1.5 v ,. 2s•c 165°C 175• c
1 1 N ll02 300 750 m a ~ 50°C Amb. 15 A .3 ma , 160°C 1.6 V If• 25°C 165°C 175• c "'0
1 1Nll03 400 760 ma If• 50°C Amb. 15 A .3 ma fl! 150°C 1.5 v liv 25• c 166°C 175°C 'Tl
1 1Nl487 100 750 m a 2 25°C Amb. 15 A .4 ma If• 125°C .55 v Ii• 12s• c u o• c 150°C
1 1Nl488 200 750 ma 25°C A mb. 16 A .3 ma ~ 126°C .55 v @ 12s• c 140°C 160°c .o
1 1N1489 300 750 m a @ 25°C Amb. 15 A .3 ma . 125°C .56 V lit 125' C 140°C 15o• c 1;
1 I N1490 400 760 ma @ 25°C Amb. 15 A .3 ma If• 125°C .55 v lfii 125• c u o• c 160°c
1 1Nl491 500 760 ma ~ 25°C Amb. 15 A .3 ma (,i) 125°C .55 V (ti; 125' C 125°C 160°C
1 1N1492 600 750 ma 25°C Amb. 15 A .3 ma (,, 125°C .55 v @ 125• c 120' C 1so• c I~
1 1N 536 60 750 ma (fl) 50°C Amb. 16 A .4 m a (jiJ 150' C .6 V @ 150°C 165°C 175° C
1 1N637 100 760 ma (ft 60°C Amb. 15 A .4 m a (jiJ l 50°C .6 V (fiJ 150°C 165°C 175°C
1 1N 538° 200 760 m a i 50°C Am b. 15 A .3 ma @ 150°C .5 V @ 160° C 165°C 176°C
1 1N 539 300 750 ma 50°C Amb. 16 A .3 m a <ft 150°C .5 V (@ 150°C 165°C 176° C
1 1N 540• 400 750 m a ~ 50°C A mb. 15 A .3 ma <fv 150°C .5 V fl) 150° C 165°C 11s• c
1 1Nl095 500 750 m a 50°C Amb . 15 A .3 ma (fl) 150°C .5 v @ 15o• c 1so• c 115• c
1 1N1096 600 750 ma (fJ; 50°C A mb. 16 A .3 ma /fl, 150°C .5 v @ 15o• c 150°c 11s• c
1 1N 647 ° 600 750 ma (ff, 50°C Amb. 15 A .3 ma @ 160°C .5 V (,'iJ 160°C 165°C 176° C
(,>
....
Q
~
SUBMINIATURE SILICON RECTIFIERS
- - - - - - - - - - - - - - - --
These double diffused junction subminiature glass rectifiers are designed for
maximum thermal conductance over a wide temperature range. Their rugged
design is well suited to meet stringent military requirements. They are hermeti-
cally sealed for maximum reliability.
Mox. Peak Mox. Full Mox. Mox.

Drwg. JEDEC Max. loc 1 Cycle load Operating Storage
No. No. PRV @ T0 c Surge Voltage Drop Temp. Temp .
8 1N676 100 ... , 8 A 1 V 400 ma
§ I25•c 115•c 115•c
200 .200 A 25•c
8 1N678 SA 1 v 400 ma ~ 25°C 115•c 115• c
8
8
8
1N681
1N683
1N686
300
400
500
,.,...
.200 A
.200 A
.200 A
z5•c
z5•c
26°C
3 A
8 A
3 A
l
l
1
V 400 ma 25°C
V @ 400 ma qi 25°C
v 'oo ma @I 2s•c
f
175°C
115• c
115•c
115•c
115•c
115•c
Cw 8 1N687 600 .200 A 26°C 3 A 1 V 400 ma @ 25 °C 11s•c 175•c
....
-l
8 1N677 100 .400 A 25°C 5 A 1v @ 400 ma @ 25°C 115•c 175• c
8 1N679 200 .400 A 25°C 5 A l v @ 400 ma ' 25•c 115•c 115•c
8
8
1N645
1N646
226
300
.400 A
.400 A
I 25°C
25°C
10
10
A
A
1 V
1 V
@ 400 ma 25°C
@ 400 ma @ 25°C
115• c
115•c
2oo•c
2oo•c
8 1N682 300 .4oo A 2s•c 5 A l V @ 400 ma @ 25°C 176°C 11s•c
8 1N684 400 .400A $ 25°C 5 A 1v @ 400 ma ~ 25°C 175°C 115•c
8 1N647 400 .400 A 25•c 10 A 1V @ 400 ma 26°C 115• c 2oo•c
8 1N6◄8 500 .400 A @ 25°C 10 A 1V @ 400 ma @ 25°C 115•c 2oo• c
8 1N686 500 .400 A 25°C 5 A 1V @ 400 ma @ 25°C 175•c 11s•c
8 1N689 600 .4oo A
I 2s• c 5 A l v ® 400 ma ® 25°C 176°C 115•c :u
8 1N649 600 .400 A 25°C 10 A 1 V @ 400 ma @ 25°C 11s•c 200°c "'0::!
"II
"':u
(II
"Cl
~
"II
n
>
::!
0
z(II
JI
LOW CURRENT SILICON RECTIFIE R CELLS ( STUD MOUNTED )
"'n
mounted rectifiers listed above. It ::!
mounted on a Kt hex with ~
These low current r ectifiers are essentially t he same group of rectifiers as the leadfactor)
uses basically the same package (with its inherent dependabil ity and experience
a 10-32 stud for mounting conve.n ience. The stud mounted unit offers the advantage of utilizing a heatsink for better "'JI
resulting higher current ratings. Military approved units are available in those units asterisked ( •). Ill
heat transfer and "D
Mox. Mox. Mox.

JEDEC
!!:!!
Peak Mox. F111l load Oper. Storage n
orG-1
1 Cyde Mox. lkge. C11rrent Vo ltage Drop Temp. Temp. ►
Drwg. Type •c -4
No. No. PRV Mo x. loo at T° C 5"rge (Full Cycle Avg.) (Full Cycle Avg .) •c
i5
15o•c 16o•c z
1N26&• 670 I A for 3 nu Ill
160• C Cau 10 A . I ma 160•C 2V 400 ma no• c no•c
lNHO 100 200 ma no•c 11o•c
100 200 ma 160•C C.... 10 A . I ma uo•c 2V 400 ma
1Nl'9 160• C 2V 400 ma no• c 11o•c
200 200 ma 15o• c c ..e 10 A .I ma
''
1NIS7 "'-r•c.... 16o• c 2V 400 ma 11o•c n o•c
4
'' 1N3'8
IN336
200
300
200 ma
200 ma
16o•c C..e
160·c c ..e
10 A
IOA
.6 ma
"-r·c
.2 ma 1110• c
t60• c
,vr-
2V
2V
400 ma
400 ma
11o•c
no• c
11o•c
11o•c
lN8'4 800 200 ma 160• c c ... 10 A .6 ma
400 t60• c C.... 10 A .2 ma 160•c 2V 400ma no• c 11o•c
!NIU 200 ma 11o•c 11o• c
.5 ma t6o•c 2V ◄OOma
'' , oo 200 ma 160• C Cau 10 A
1N842
c.) 2V 1800 ma 11o•c 11o•c
1 16o• c c ... 16 A . 1 ma1 t6o• c
''
.... 1Nl39 100 ,ooma 11o•c 11o• c
00 100 400 ma 1 16o• c c ... 16 A .6 ma t6o•c 2V 1 800 ma
1N8'8 .I ma 16o•c 2V I 800 ma 11o•c 11o•c
1N836 200 400 ma 160• 0 c ... 16 A 11o•c 11o•c
.6ma 16o•c 2V o 800 ma
'' 16 A
1N8'6 200 400ma 16o• c Case no•c 11o• c
' 800 400ma 1 160•C C..e 16 A .!ma 16o•c 2V 800ma
lNSH .6mal 150• c 2V 800ma 110• 0 110•0
1N8'8 100 400ma 1 160•0 Cue 16 A 110•0 11o•c
,oo , ooma 150•0 Cau 16A .2 ma 16o•c 2V 800ma
1N882 .6 ma 16o•c 2V 800 ma no•c 11o•c
16A
''' 400ma
1Nl41 ,oo 160•0 C..e ao•c 175• 0
800 ,ooma 15o•c c ..e 16A .S ma 160°C .66 V 160°0
lNHl .3 ma 160°C .65 V 160°0 160°C 176• C
16A
''
1NH2 1000 400 ma 160°00au
'A for I IDll 15o•c 175°C
''
lNHO 100 1.6 25• 0 16o• c 1n•c
lN661 200 600 ma 100°0 Amb. , A for 8 nu 1.0,.. 25•c ,.ovV 11,•o
100• 0 Amb. 4 A for 3 nu 15,.. 2,•c 1.6 V 25•0 160°C
1N662 800 600 ma 176°C
''' 1N658
1N66◄
400
500
"'-1•oo•c..,,
600 ma
600 ma
1oo•c Amb.
100°C Amb.
4 A for 8 ms
4 A for 8 ms
2.6,,,.
8.6 p.a
u •o
·~1 ..-c Iu•c
211• 0
1.6 V
1.5 V
26°C
25°0
160°0
160°0 116•c
116• 0
4 A for 8 ms 6.0 fl,& 25• 0 1.6 V 25•0 15o•c
'' lN666 600 600 ma 1oo•c Amb.
' 1.6 V 600 ma 160°0 160°C
1N26◄• 190 400 ma 3 186°0 Oau 1.6 A foT a ms . I ma 3186°0 g 160°C 150•0
180 400 ma IU• C Oau 1.6 A for a ms .16 ma 186"0 1.6 V 600 ma
1N266•
111o•c 11o•c
'' 2 A .1 aee
1N607 50 l A V 200 ma 25•c uo•c 110•0
1N607A 50 IA "'" c Amb.
1oo• CAm• 2 A .1 aee .001 ma 25•c 1.6
,.ov
.026 ma 26• C 1.6 V 200 ma 25• c ao•c no•c
1oo• cAmb. 2A.laee
'' IN608
INl08A
100
100
IA
IA
I tOO• CAmb. 2A.laee
.. _I . .c I'"-...c
.001 ma u •c 1.6 V 200 ma 26°C 160•c 110•0
no•c
2A.laee .025 ma u •c 1.6 V 200 ma 25•c 160•c
lNsot 160 IA 1oo• c Amb. 160•c no•c
.001 ma 25•0 1.6 v 200 ma 26•c
'' too•OAmb. 2 A .laee
'' lNSOtA 150 IA
_,
JEDEC Max. Max. Max.
---------------
Drwg.
No.
or G-E
Type
No. PRV Max. loo at T° C
Peak
1 Cycle
Surge
Max. Lkg e. Current
(Full Cycle Avg.)
Max. Full Lo ad
Voltage Drop
(Full Cycle Avg .)
Oper.
Temp.
oc
Sto rage
Temp.
oc
1N610 200 IA 100°c Amb. 2 A .1 sec 15o• c 110°c
1N610A 200 IA 100°c Amb. 2 A . I sec .001 25°C 1.6 v 25°C 15o•c 110° c
i' IN611
1N611A
300
800
IA
I A
1oo• cAmb.
1oo• c Amb.
2 A .1 sec
2 A .1 sec
~ma
.025 -,
ma
.001 ma
,..c
25°C
2s• c
1.5V 200 m•
ma .. -c
200 ma 25°C 15o•c 110° c
1.5V 200 ma 25°C 15o• c 110°c
'''
''
. l.
IN612
1N612A
1N6!3
JN613A
,oo
,oo
600
500
IA
IA
lA
IA
100°C Amb.
100°C Amb.
l "'"CAm,.
100°c Amb.
2 A .1 sec
2 A .1 aec
2 A .1 sec
2 A .I sec
.025 ma
.0015 ma
.025 ma
.002 ma
25°C
25°C
25°C
25°C
1.5 V
1.5 V
1.5 V
1.5 v
200 ma 25°C
200 ma 25°C
200 ma 25°C
200 ma 25°C
15o•c
15o• c
15o• c
no• c
110°c
110°c
15o• c no• c
'' 1N6U 600 lA 100°c Amb. 2 A .1 sec .025 ma 25°C t.5 v 200 ma 25°C 15o• c no• c
1N6UA 600 IA 100°c Amb. 2A .1 sec .0025 ma 25° C 1.5 V 200 ma 25 °C 15o• c 11o• c
'' IN1115 100 1.5 A 15 A .65 VI 160°C 110°c 115• c
1Nlll6 200 1.5 A "CCu,
"85°C Case 15 A .8 ma 160°C .65 v 15o• c 110° c 115• c
1Nlll7 800 1.6A 85°C Case 16A
''' 1Nlll8
1Nll19
,oo
500
1.6 A
1.6A
I 85°C Case
85°C Case
15 A
15 A
. . I. ..,
.3 ma
.3 ma
.a ma
150°C
150°C
150°C
.66 V 150°C
.65 V @ 150°C
110°c
110°c
175• c
115• c
.65 v 15o•c
I 155• c 175• c
1Nll20 600 1.5 A 85°C Case 16 A .3 ma 160° C .65 v 15o• c 155• c 175• c
''
' 1N258' 95 IA ~ 1as• c case 4 A for 3 ms .1 ma @ 135°C 1.5 V @ I Amp 15o• c 15o• c
(.)
,_. '
CD
LOW CURRENT SILICON RECTIFIERS (INSULATED STUD)
These units are the same as the 1N1115-1Nll20 series listed above except the stud is insulated from the lJ
junction. This offers an easy solution to the customer who desires insulated mounting. "'n
::!
JEDEC Max. ~
Max.
or G-E Peak Max. Full Load Oper. Sto rage ,ll
"'
Drwg. Type 1 Cycle Max. Lkge. Current Voltage Drop Temp. Temp. ,en
-0
No. Na. PRV Max. loo al T°C Surge (Full Cycle Avg .) (Full Cycle Avg .) oc oc l!l
5 1N2851 500 '~
15A 15o• c 115°c
5 1N2852 600 1.5 A 50°C Case 15 A .3 ma 150°C .65 v 15o• c 150°c 175• c n
5 1N28'7 100
5 1N2848 200
u•1..-ceu.
1.5 A
1.5 A
75°C Case
75°C Case
15A
15 A
., ma
..l ...c
.3 ma
160°C
150°C
.65 V
. .l . .,
.65 v
150°C
15o• c
1Gs0 c
165°C
115• c
11s• c
,►
...
5 1N2849 800 1.5 A 75°C Case 15 A .3 ma 150°C .65 v 15o• c 165°C 11s· c 0
6 1N2850 ,oo 1.5 A 75°C Case 15A .3 ma 1so• c .66 v 1so• c 165° C 115• c ,z
icn
:II
MEDIUM CURRENT SILICON RECTIFIER CELLS
"'0j
"1
These stud mounted alloy junction silicon rectifiers are designed for all rectifier applications in the 5 to 30 ampere range. A high j;j
:II
junction temperature rating and an extremely low forward voltage drop and thermal impedance permit high current op-
eration with minimum space requirements. These rectifiers may be mounted directly to a chassis or a fin or may be elec- ,.a,
trically insulated from the heatsink by using the mica washer insulating kit which is provided with each unit. Versatility is ~
further increased by the availabilty of a negative polarity unit (stud is anode), described by the suffix "R" appearing ~
after the type number. The use of positive and negative polarity units facilitates the construction of bridge cir cuits and 0
permits the use of either a positive or negative heatsink in half-wave and center-tap applications. ►
-I
General Electric research, advance development and product design have resulted in a highly efficient rectifying junction. 0
This feature plus ·a mechanical design employing high temperature hard solders and welds for all internal and external z
a,
joints and seals, which eliminates common sources of thermal fatigue failure, has produced a silicon rectifier with outstand-
ing reliability under all operating conditions. Military approved units are available in those units asterisked (*).
I
JEOEC MalC. loo Ma•. Ma•. Ma•.
or G-E at 150° C Peak Max. lkge. Current Max. Full load Oper. Storage
(.)
0rwg. Type Re petitive Transienl Stud- l Cycle (Full Cycle Average Voltage Drop Temp. Temp.
~ No. No. PRV PRV Single Phase Surge at Full load) (Full Cycle Avg.) •c •c
9 lNlSOA 60 100 GA 160 A .6 v ® 15o•c Stud 2oo•c 2oo•c
m& '
33 m& uo•c Stud
150°C Stud .6 V @ 160°C Stud 2oo•c 2oo• c
9 1Nl341RA 50 100 6A 150 A
9 1Nl342A 100 200 6A 150 A 2.5 ma ~ 15o•c Stud .6 v @ 15o•c Stud 2oo•c 2oo• c
9 1Nl8'2RA 100 200 6A 150 A 2.5 ma 15o•c Stud .6 V (it 15o• c Stud 200°c 2oo• c
9 1Nl343A 150 soo 6A 150 A 2.25 ma @ 150"C Stud .6 v fii! 1so• c stud 200°c 200°c
9 1NlS48RA 160 300 6A 150 A 2.25 ma ~ 160°C Stud .6 V Qi 160°C Stud 200°c 200°c
9 1Nl344A 200 350 6A 150 A 2.0 ma 15o•c Stud .6 V (i 150°C Stud 200°c 2oo•c
9 1Nl844RA 200 350 6A 150 A 2.0 ma @ 150°C Stud .6 V @ 160°C Stud 200°c 2oo•c
9 1Nl346A 300 460 6A 150 A 1.75 ma @ 15o•c Stud .6 V @ 160°C Stud 200°c 200°c
9 1Nl345RA 300 450 6A 150 A 1.75 ma~ !50°C Stud .6 V ~ 160°C Stud 200°c 2oo•c
9 1Nl846A 400 600 6A 150 A 1.5 ma uo•c Stud .6 V @ 150°C Stud 200°c 200°c
9 1Nl346RA 400 600 6A 150 A 1.5 ma ~ uo•c Stud .6 V @ 150°C Stud 200°c 200°c
9 1Nl347A 500 700 6A 160 A 1.25 ma (it 150°C Stud .6 V ~ 160°C Stud 200°c 200°c
9 1Nl347RA 500 700 6A 150 A .t.25 ma@ uo•c Stud .6 V@ 150°C Stud 2oo•c 200°c
9 1Nl348A 600 800 6A 150 A 1.0 ma ~ 150°C Stud .6 V w 150°C Stud 2oo• c 2oo•c
9 1NlS48RA 600 800 6A 150A 1.0 ma fr 160°C Stud .6 V @ 15o•c Stud 200°c 200°c
6 1N248 50 10 A 200 A 5 ma @ 160°C Stud 175° C 175°C

6 1N248R 50 10 A 200 A 5 ma @ uo•c Stud 175°C 175°C
6 1N249 100 10 A 200 A 5 ma @ 150°C Stud 176°C 175°C
1N249R 100 10 A 200A 5 ma@ 150°C Stud 175°C 11s•c
6 175°C 175°C
6 1N250 200 l0A 200A 5 ma @ 1so•c Stud
1N250R 200 l0A 200 A 5 ma@ 150°C Stud 175°C ns•c
6
JEDEC Max. loo Max. Max. Max.
. - - - - - - .. - - - - - - - -
or G-E at 150°C Peak Max. liege. Current Max. Full load Oper. Storage
Drwg. Type Repetitive Traniient Stud - 1 Cycle (Full Cycle Averag e Voltage Drop Temp. Temp.
No. No. PRV PRV Single PhaH Surge at Full load) (Full Cycle Avg.) oc oc
9 1Nl199A 50 100 12 A 240A 3.0 ma ~ 150°C Stud .55 V ~ 160°C Stud 200°c 200° c
9 1Nll99RA 50 100 12A 240A 3.0 ma @ 15o•c Stud .55 V 150°C Stud 2oo• c 200°c
9 1Nl200A 100 200 12 A 240 A 2.5 ma@ 15o•c Stud .65 V @ 150°C Stud 200°c 2oo•c
9 1N1200RA 100 200 12 A 240 A 2.5 ma I@ 150°C Stud .55 V ~ 150°C Stud 200°c 200°c
9 1Nl201A 150 800 12 A 240A 2.25 ma liil 150°C Stud .55 v ~ 15o•c Stud 2oo• c 200•0
9 1Nl201RA 160 800 12 A 240 A 2.26 ma @ 160°C Stud .55 v @ 15o•c Stud 200°c 2oo• c
9 1Nl202A 200 360 12 A 240 A 2.0 ma (Ii. 150°C Stud .65 V @ 160°C Stud 200°c 200°c
9 1N1202RA 200 360 12 A 240 A 2.0 ma @ 160°C Stud .56 v <it 1so•c Stud 2oo• c 2oo•c
9 1N1203A 300 450 12 A 240A I.76 ma @ 160°C Stud .65 V @ 150°C Stud 200°c 200°c
9 1N1208RA 300 450 12 A 240 A 1.75 ma (ii! 15o• c Stud .55 V @ 160°C Stud 200°c 200°c
9 1Nl204A 400 600 12 A 240A 1.5 ma @ 160°C Stud .55 v @ 15o•c Stud 200°c 200°c
9 1N120◄RA 400 600 12 A 240 A 1.6 ma ~ 15o• c Stud .66 v @ 15o•c Stud 200°0 2oo• c
9 1Nl205A 500 700 12 A 240 A 1.26 ma@ 150°C Stud .65 V @ 160°C Stud 200°c 200°c
9 1N1206RA 600 700 12 A 240 A 1.26 ma 0 160°C Stud .65 V @ 160°C Stud 2oo• c 200°c
9 1Nl206A 600 800 12 A 240A 1.0 ma Cit uo•c Stud .56 V fit 150°C Stud 2oo• c 2oo•c
9 1Nl206RA 600 800 12 A 240A 1.0 ma @ 160°C Stud .55 V I@ 150°C Stud 2oo•c 200°c
6 1N248A 50 20 A 350 A 5 ma@ 1so•c Stud 175°C 175°C
6 1N2◄8RA 50 20 A 350 A 6 ma @. 160°0 Stud 175° C 176°C
C,)
N 6 1N249A 100 20 A 360A 5 ma @ 15o•c Stud 176°0 11s•c
.... 6 1N2◄9RA 100 20A 850 A 6 ma @ 150°0 Stud 11s•c 176°C
6 1N260A 200 20 A 350 A 5 ma @ 160°C Stud 175°C 11s•c
6 1N250RA 200 20 A 350A 6 ma @ 160°C Stud nr;•c 175°C
6 1N2164 50 100 25 A@ u5• c 800 A 5 ma @ 145°C Stud 0.60 V @ 146°C Stud 2oo• c 2oo•c
6 1N215'R
6 1N2166 100 200 26 A@l45°C 800A 4.5 ma @ 1'6°C Stud 0.60 v @ U6°C Stud 2oo• c 2oo• c
6 1N2166R
lJ
6 1N2166 200 360 25 A @ 1'6°C 800A 4.0 ma @ 1'6°C Stud 0.60 V@ 145°C Stud 200°c 2oo•c
6 1N2166R "'0
6 1N2157 300 460 26 A@ U5°C 300A 8.5 ma @ 145°C Stud 0.60 V@ 146°0 Stud 200°0 2oo•c
:!
6 1N2167R :!!
6 1N2158 400 600 25 A@ 1'5°C 800A 3.0 ma @ U5°C Stud 0.60 V (ill 1'5°C Stud 200°c 200°c
"'lJ
6 1N2168R u,
'II
6 1N 2159 500 700 25 A @ u s•c 800 A 2.6 ma @ u 6°C Stud 0.60 V@ 1'6°C Stud 200°c 200°c
6 1N2169R l!l
6 1N2160 600 800 25 A@ u5•c 300 A 2.0 ma @ 1'5°C Stud 0.60 v@ U5"C Stud 2oo•c 200°c :!!
6 1N2160R 0
0 ►
-4
6 1N2185A 400 25A 260A 10 ma@ 176°C Stud 160°0 11s•c
6 0 1N249B
uo 20A 360 A 6 ma 160°0 Stud
3 176°0 176°C
6 0 1N260B
220 20A 850 A 5 ma 160°0 Stud 115• 0 176°0 I~
,a,
,0
HIGH CURRENT SILICON RECTIFIER CELLS
~
j
,i
T he 4JA60 is a large area junction silicon rectifier designed availability of a negative polarity (stud is anode) unit, the Ill
,0
for power supply applications requiring d-c outputs as high as 4JA61. The use of positive and negative polarity units facili-
VI
86 amperes per rectifying element at rms input voltage up to tates the construction of bridge circuits and permits the use of ,,
Ill
280 volts. A combination of extremely low forward voltage 0
either a positive or negative heatsink in half-wave and center-
'I
drop, minimum thermal impedance (0.8°C/watt-junction to tap applications. Stacked fin assemblies are also available. n
stud), and a tapered pipe thread heatsink connection con- 1►
Outstanding features of the 4J A60 series are the hard solder
tributes to high allowable current ratings with very little
and weld construction which offers a high degree of freedom
external cooling required. In many applications, a single three-
from thermal fatigue and a high, but conservative surge cur- Ii
to six-inch copper or aluminum fin will provide ample free
convection cooling. Versatility is further increased by the rent rating.
JEDEC Max. l oo Max. Max. Forward Volt. Max. Max.
or G-E at 160°C Peak Max. Peak lkge. Drap @ 50 Amps Oper. Storage
C,)
I':) Drwg. Type Repetitive Transient Stud- l Cycle Current @ Max. PRV 200° C Junc1ion Temp. Temp.
I':) oc oc
No. No. PRY PRY Single Phase Surge 200° c Junction (Full Cycle Avg.)
7 4JA60F 50 100 50 A 900 A 70 ma @ 2oo• c Jct. 0.60 v @ 200°c Jct. 200°c 200°c
7 ◄JA61F
7 4JA60A 100 200 50 A 900 A 60 ma @ 2oo• c Jct. o.60 v @ 200°c Jct. 200°c 200°c
7 4JA61A
7 4JA60G 150 250 50 A 900 A 50 ma@ 200°C Jct. o.so v@ 200°c Jct. 200°c 200°c
7 4JA61G
7 dJA608 200 300 50 A 900 A ◄5 ma@ 200°c Jct. 0.60 v @ 200°c J ct. 2oo• c 200°c
7 4JA618
7 ◄JA60H 250 350 50 A 900 A ◄Oma @ 200°C Jct. o.60 v @ 200°c Jct. 200° c 2oo• c
7 4JA61H
7 4JA60C 300 400 50 A 900 A 35 ma @ 200°c Jct. 0.60 v @ 200°c Jct. 200°c 200°c
7 4JA61C
7 ◄JA60J 350 460 50A 900 A 82 ma @ 200°c Jct. 0.60 v @ 200°c Jct. 200°c 2oo• c
7 ◄JA61J
7 4JA60D 400 500 50 A 900 A 28 ma @ 200°c Jct. o.60 v @ 2oo•c Jct. 200°c 200°c
7 ◄JA61D
HIGH CURRENT SILICON RECTIFIER CELLS
-- - - ·- -·------ ----
The 4JA62 is a large area junction silicon rectifier designed ability of a negative polarity (stud is anode) unit, the 4JA63.
for power supply applications requiring d-c outputs a s high The use of positive and negative polarity units facilitates the
as 85 amperes per rectifying element at rms input voltage up construction of bridge circuits and permits the use of either a
to 280 volts. A combination of extremely low forward voltage positive or negative heatsink in half-wave and center-tap ap-
drop, minimum thermal impedance (0.8°C/ watt-junction to
plications. Stacked fin assemblies are also available.
stud), and a tapered pipe thread heatsink connection con-
tributes to high allowable current ratings w ith very little ex- Outstanding feature.s of the 4JA60 series are the hard solder
ternal cooling required. In many applications, a single three- to and weld construction which offers a high degree of freedom
six-inch copper or aluminum fin will provide ample free con- from thermal fatigue, and a high, but conservative surge cur-
vection cooHng. Versatility is further increased by the avail- rent rating.
JEDEC Max. l oo Max. Max. Forward Volt. Max. Max.
C,.)
or G-E at 110°c Peak Max. Peak lkge. Dro p @ 50 Amps Ope r. Storage
Drwg. Type Re petitive Transient Stud 1 Cyde Current @ Max. PRV 150°C Junction Temp. Temp.
~ No. •c •c
Na. PRV PRV Single Phase Surge 150°C Junction (Full Cycle Avg.)
7 UA62F 50 100 60A 900 A 70 ma @ 160°C J ct. o.60 v @ 15o• c J ct. 150°0 200°c
7 4JA63F
7 4JA62A 100 200 50A 900A 60 ma @ 160°0 Jct. 0.60 V @ 150°0 Jct. 150°0 200°c
7 4JA63A
7 4JA62G 160 260 50 A 900A 50 ma@ 150°C Jct. 0.60 V @ 160°0 J ct. 160°0 200• 0 :a
7 4JA68G
~
7 4JA62B 200 800 60 A 900 A 46 ma @ 150°0 Jct. o.60 v @ 15o• c Jct. 160°0 200°0 ::!
7 4JA68B :!!
Ill
7 4JA62H 250 850 60 A 900A , o ma@ 15o•c Jct. 0.60 V @ 150°0 Jct. uo•o 200°0 :a
7 4JA63H Ill
,,
7 4JA62O 300 400 50A 900 A 35 ma @ 160°C Jct. 0.60 V @ 160°0 Jct. 160°C 200°c
7 4JA68C ~
'I
7 4JA62J 350 460 50A 900A 32 ma @ 160°0 Jct. 0.60 V @ 160°0 Jct. 160°C 200°c 0
7 4JA63J
,►
...
7 4JA62D ,oo 500 50A 900 A 28 ma @ 160°0 Jct. 0 .60 V @ 160°C Jct. 15o• c 200° c
7 4JA63D ''zo
1111
RECTIFIER SPECIFI CATIONS
RECTIFIER STACKS
G-E Type PIV (Up to) Max. I uc at t ° C (Up to)
4JA211
4JA411
630 V
3360 V
6 A @ 55°C Amb.
18 A @ 25°C Amb.
I
I
4JA421 2000 V .75 A @ 25°C Amb.
4JA422 10,000 V .50 A @ 25°C Amb.
4JA3011 680 V 48 A @ 55°C Amb.
4JA3611
4JA6011
4JA6211
1800 V
840 V
840 V
67.6 A @ 55°C Amb.
573 A @ 35°C Amb.
430 A @ 35°C Amb.
I
OUTLINE DRAWI NGS
I
I◄
I
I
.06801A.
I
I
.63$ MAX. - --
COMPLIES WITH EIA REGISTERED OUTLINE 00-3

APPROX. WCIGHT • .05 OZ.
• L065 ..N.
I
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.312!.005
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2.500
MAX.
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l.5&t 1.562
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324
I
I OUTLINE DRAWINGS (CONTINUED )
RECTIFIER SPECIFICATION S
I
I
I ASSEMBLY KIT ounlNE
0
DRAWING
I
I (DI0-32 8RASS
NI PL HEX ..,T
(l) LOCK WASHER (EXTI
NOTE 15 IN LBS MAXIMUM STANOARD TERMINAL
~ABLE TOl!QU£~ .070 NOM.IIIA.
STEEL NI PL NO I0-32 •
I
i
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(3) TE- AL" 010 THK
COPPER TIN PL
@ MICA WASHER
1
005 Ttt<
~ TEFLON WASHER
I 032 WALL THK

~ MICA WASHER
005 THK
COMPLIES WITH [ IA
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DO- ~
APPROX WT• .136 DZ.
I
I
I◄ 0
I NOTE:
15 IN LBS MAX
ALLOWABLE TOROUE
ON STIJO
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INSULATOR
I 10 - 32
NF- 2A
I
I ·
062 ~.01°
- 005
.437 :t .015
I ie-- - - - .890 MAX - - -~
325
RECTIFIER SPECIFICATIONS
ASSEMBLY KIT OUnlNE DRAWING

•I
NOTE• MICA WASHER IN MOUNTING
KIT MAV A00 UP TO 4•C/WATT
THERMAL RESISTANCE JUNCTIOH
TO STUD
DIRECTIOH OF EASY CONVENTIONAL
CURRENT Fl.OW-IN21~•1N2160
OlRECTIOH OF [..SY CONVENTIONAL

CUARENT FLOW-IN21~R-IN2160A
I
1/4-28 NF-2A .420
Teo
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1/4 ·28 BRASS KEPNUT
1150
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<D CADMIUM PLATED MAX700
®
@
TERMINAL .040 THK
COPPER, TIN PLATED
TEFLON WASHER
.O~ WALL THI<.
MIN - I
1.000
MAX
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© MICA WASHER .005 THI<. EIA REGISTERED OUT LINE DO-5
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18 THA(ADS PER I NCH.
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R ECTI FI ER SPEC IFICATI O NS
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DENOTE CATHODE ENO
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I NOHS: ( II l/JtlT WtMIHT - .la OZ
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a.o-c,•n
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TaANSJOIMUS
I
The audio transformers used in these diagrams were
wound on laminations of l % " by l % " and a ½" stack
size, and having an electrical efficiency of about 80%.
I
Smaller or less efficient transformers will degrade the
electrical fidelity of the circuits. I
OSCILLATOI COIL
E~ Stanwyck Coil Comp~y #1265

I
VAIIAILI CONDINSU
I
Radio Condenser Company Model 242
I
If you are unable to obtai~ these components from either
your local or a national electronic parts distributor, we
suggest you contact:
I
General Electric Co.
Semiconductor Products D~pt.
I
Box 1122
Syracuse, N. Y.
I
I
I
I
I
I
I
-
SEMICONDUCTOR PRODUCTS DEPARTMENT
GENERAL. ELECTRIC
t CG-'17 11 / 60 PRJNTEO IN U SA

GE Transistor Manual Circa 1960 1 PDF

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I Semiconductor Products Department

I 2. TRANSISTOR CONSTRUCTION TECHNIQUES . .

LARGE SIGNAL CHARACTERISTICS .............

I Collector and Emitter Junctions Re ve rse Biased . . . . . . . . . . . . . . .

I Base Input Charac teristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

I Two Stage R-C C oupled Amplifie r . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

7 . .. HI-Fl " CIRCUITS .. ................................

I 8. RADIO RECEIVER CIRCUITS . . . . . . . .

I Autom atic Volume Control Circ uits . . . . . . . . . . . . . . .

I C o n t inued - f o llowin g page

10. SWITCH I NG CHARACTERISTICS . . . . . . .

LOGIC ................................................. 125

13. UNIJUNCTION TRANSISTOR CIRCUITS .........

TUNNEL DIODE AMPLIFIERS .................... 154

TEST CIRCUITS ...................................... 177

I Base Spreading Resistance And Collector Capacity r b' and C ob . . . . . .

I 18. SILICON CONTROLLED RECTIFIER ............. 194

I 19. POWER SUPPLIES ................... . ..............

I E xplan atio n of P ar am eter Symbols . . . . . . . . . . . . . . . . . . . . . . .•. . . . . .

Inte rch a ngeability Informa tion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 279

I 21. RECTIFIER SPECIFICATIONS .....................

I 22. NOTES ON CIRCUIT DIAGRAMS ................. 328

I 23. READING LIST ...................................... 329

tains acceptor atoms is called a p-type semiconductor since conduction occurs by

I virtue of free holes in the crystal (positive charge).

I acceptor elements, form p-type

donor elements, form n-type

I and can give up or donate an

I MATEIUALS USED I N THE CONSTRUCTION OF TRANSISTORS

I To summarize, conduction in a semiconductor takes place by means of free holes

I An NP transistor is formed by a thin p-region between two n-regions as indicated

moderate input impedance (1.3 K)

I TRANS/STOit CIIICUIT CONflGUIIATIONS

The knowledge of m any sciences is r e quired to build transistors. Physicists u se the

@ BAR OF H I GH PURITY © MOLTEN ZONE

I produce the chemical compounds germanium and silicon te trachloride or dioxide.

I a bar. A cross-sectional view of a simplified zone refining furnace is shown in Figure

I A junction may be defined as the s urface separating two parts of a semiconductor

GRAP HITE CRUCIBLE

I IN ITIA L INTERMEDIATE FINISHED

COTS APPLI EO HEAT MELTS COTS

I COMPLETED GROWTH JUNCTIONS

I l_,..,RITY CONTACT AND GROWN JUNCTION TfOINIQUfS

I concentration of donors or acceptors is left at the alloy-semiconductor material bound-

I the G-E 2N338.

I Generally uniformity in transistor characteristics is attributed to processes capable

I BASE Unavailable Commercially) STRUCTURES TRANSISTOR

I YES NPN - MULTIPLE 2N167

I YES PNP NPN INDIVIDUAL --

I YES PNP NPN MULTIPLE 2N335

I YES PNP (NPN) INDIVIDUAL --

I JUNCTION PROCESSES AND CHARACTERISTICS FIGURE 2.4

I techniques, transistors are capable of operation in excess of 30,000 hours at maximum

SLIT IN DISK CUT TO ± 0 .001" TOLERANCE

I @ BASE LEAD ATTACHED TO GOLD STRIP

I FIXED SEO MOUNTING

I When operating transistors under dissipation, it is preferable to turn the transistors

I With some transistors, a drift in I co at room temperature is believed to correlate

I One example is a phonograph preamplifier where the output of a phonograph pickup

I (COMMON 8AA CON,,GUaA noN)

I FIGURES 3.4 AND 3 . 5

hte " 21., /J 44 - hfb