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D
ZAV KabyLake-U/R series UMA Platform Block Diagram D

DDR4 1866/2133/2400 MT/s DDI HDMI


Power solution
DDR
HDMI/DVI level shifter P16
PTN3366BS (Reserve) P16
Batery Charger +1.2VSUS +VCORE/VCCSA/VCCGT
DDR4-Memory Down DDR4-SoDIMM Kaby Lake ULT 15W BQ24780RUYR P23 RT8231BGQW P26 ISL95829HRTZ-T P27

CH. B P12 CH. A P11 eDP LCD Panel


MCP 1356pins 2 Lane for 4k2k
+3V/+5V +5V_S5/+3V_S5/+5V/+3V +VCCCORE
SATA eDP P15 TPS51225RUKR P24 AOZ1331DI P24 AOZ5049QI P28
Port 0 Port 1 Port 2
Re-Driver SATA - ODD +1V_S5 +2.5V_SUS +VCCGT +VCCSA
SATA - HDD VCP601R (Reserve)
SATA/PCIe-SSD G5335QT2U P25 G5719CTB1U P26 AOZ5049QI P29 AOZ5049QI-5 P29
C
P18 P18 P18 P19 EMMC
eMMC C

Port 9~12 P21


PCI-e
+12V_Panel +1.8V_S5/+1.5V Thermal protection
Port 6 TPS61087 P31 G5719CTB1U P30 TMP708AIDBVR P30
Port 5 USB 3.0
Port 3 Port 2 Port 1 Battery
P6
LAN / Card reader M/B Type-C
RTL8411B-CG
POA Wifi / BT (Reserve)
M/B USB 3.0
25MHz Integrated PCH
P14 P18 P19 P13 P21
32.768kHz
BOM option
Port 8 Port 5 Port 2 Port 1 U@ : CPU Type
RJ45 SD USB 2.0 U22@ : Kabylake U-U22
P14 P14
Port 7 Port 6 U42@ : Kabylake R-U42
Port 4 Port 3 24MHz 24MHz TPC@ : Type-C function
B
CCD Touch Screen D/B USB 2.0 D/B USB 2.0 U42 Reserve TSI@ : Touch screen I2C B

P15 P15 P21 P21 TPM@ : Trusted Platform Module


POA@ : Finger Print on touch pad
LPC Interface KBL@ : Keyboard back light
DMIC LED D/B Head Phone GS@ : G-Sensor function
P17 P20 P17 SSD@ : Solid State Disk
Daughter Board
TPM FAN P20 ODD@ : Optical Disc Drive
PCB 8L STACK UP NPCT650ABAYX EMC@ : eMMC function
P18 RAM@ : On Board Memory
LAYER 1 : TOP Audio Codec HDA
Embedded Controller Keyboard BLP20
LAYER 2 : SGND Speaker ALC255-CG
I2C Touch Pad P20
LAYER 3 : IN1 P17 P17
IT8987E/CX Keyboard
LAYER 4 : SVCC P20
A A
LAYER 5 : IN2
LAYER 6 : IN3 SPI SPI ROM P22 Hall Sensor P15
P7 Quanta Computer Inc.
LAYER 7 : SGND
PROJECT : ZAV
LAYER 8 : BOT Size Document Number Rev

Vinafix
1A
Block Diagram
Date: Wednesday, March 15, 2017 Sheet 1 of 34
5 4 3 2 1
5 4 3 2 1

KabyLake ULT (DISPLAY,eDP) 02


U1A KBL_U/R
D D
16 INT_HDMITX2N E55 C47 EDP_TXN0 EDP_TXN0 15
F55 DDI1_TXN[0] EDP_TXN[0] C46 EDP_TXP0
16 INT_HDMITX2P
E58 DDI1_TXP[0] EDP_TXP[0] D46 EDP_TXN1
EDP_TXP0 15 eDP Panel

HDMI
16 INT_HDMITX1N DDI1_TXN[1] EDP_TXN[1] EDP_TXN1 15
16 INT_HDMITX1P F58 C45 EDP_TXP1 EDP_TXP1 15
F53 DDI1_TXP[1] EDP_TXP[1] A45 EDP_TXN2
16 INT_HDMITX0N DDI1_TXN[2] EDP_TXN[2] EDP_TXN2 15
16 INT_HDMITX0P G53 B45 EDP_TXP2 EDP_TXP2 15
F56 DDI1_TXP[2] EDP_TXP[2] A47 EDP_TXN3
16 INT_HDMICLK-
G56 DDI1_TXN[3] EDP_TXN[3] B47 EDP_TXP3
EDP_TXN3 15 Reserve 2 Lane for 4K x 2K
16 INT_HDMICLK+ DDI1_TXP[3] EDP_TXP[3] EDP_TXP3 15
C50 E45 EDP_AUXN
DDI2_TXN[0] DDI EDP EDP_AUXN EDP_AUXN 15
D50 F45 EDP_AUXP

CRT
DDI2_TXP[0] EDP_AUXP EDP_AUXP 15
C52
D52 DDI2_TXN[1] B52 DP_UTIL R3 *0_5%_4 PCH_BRIGHT
A50 DDI2_TXP[1] EDP_DISP_UTIL R4 *0_5%_4 +3V_S5
B50 DDI2_TXN[2] G50
D51 DDI2_TXP[2] DDI1_AUXN F50 CRT_DATA R5 *2.2K_5%_4
C51 DDI2_TXN[3] DDI1_AUXP E48 CRT_CLK R7 *2.2K_5%_4
DDI2_TXP[3] DDI2_AUXN F48
DDI2_AUXP G46
DISPLAY SIDEBANDS RSVD_G46 F46
HDMI_DDCCLK_SW L13 RSVD_F46 +3V_S5
16 HDMI_DDCCLK_SW GPP_E18/DDPB_CTRLCLK +3V_S5
16 HDMI_DDCDATA_SW HDMI_DDCDATA_SW L12 +3V_S5 L9 INT_HDMI_HPD INT_HDMI_HPD 16 Type C change
GPP_E19/DDPB_CTRLDATA +3V_S5 GPP_E13/DDPB_HPD0 L7 CRT_HPD
N7
+3V_S5 GPP_E14/DDPC_HPD1 L6
CRT_CLK PCH_TypeC_UPFb#
CRT_DATA N8 GPP_E20/DDPC_CTRLCLK +3V_S5 +3V_S5 GPP_E15/DDPD_HPD2 N9 SIO_EXT_SCI#
PCH_TypeC_UPFb# 13
PCH_TypeC_UPFb# R648 20K_1%_4
GPP_E21/DDPC_CTRLDATA +3V_S5 +3V_S5 GPP_E16/DDPE_HPD3 SIO_EXT_SCI# 22
L10 EDP_HPD EDP_HPD 15
N11 +3V_S5 GPP_E17/EDP_HPD +3V
N12 GPP_E22 +3V_S5 R12 PCH_BLON
GPP_E23 +3V_S5 eDP_BKLTEN PCH_BLON 15
R11 PCH_BRIGHT PCH_BRIGHT 15
R11 24.9_1%_4 EDP_RCOMP E52 eDP_BKLTCTL U13 EDP_VDD_EN
+VCCIO eDP_RCOMP eDP_VDDEN EDP_VDD_EN 15
SIO_EXT_SCI# R10 10K_5%_4
eDP_RCOMP U@BGA1356P
Trace length < 100 1 OF 20
mils CRT_HPD R12 *100K_5%_4
C C
Trace width = 20 mils EDP_HPD R13 100K_5%_4
Trace spacing = 25
+1V_VCCST
mils

R14 1K_5%_4 CPU_THRMTRIP# H_PECI (50ohm) 100k pull-down on PCH side


Route on microstrip only
R15 49.9_1%_4 CATERR#
Spacing >18 mils U1D KBL_U/R
Trace Length: 0.4~6.125 iches
Stuff only for Debug
TP2 CATERR# D63
Ramp will not stuff 22 H_PECI
H_PECI A54 CATERR#
H_PROCHOT# R16 499_1%_4 H_PROCHOT#_R C65 PECI
22,23,27 H_PROCHOT# PROCHOT# JTAG
THRMTRIP# R17 100_1%_4 CPU_THRMTRIP# C63
Avoid 125Mhz A65 THERMTRIP# B61 XDP_TCK0
SKTOCC# PROC_TCK D60 XDP_TDI_CPU
CPU MISC PROC_TDI
TP3 XDP_BPM#0 C55 A61 XDP_TDO_CPU
+VCCIO TP4 XDP_BPM#1 D55 BPM#[0] PROC_TDO C60 XDP_TMS_CPU
BPM#[0:7] BPM#[1] PROC_TMS
TP5 XDP_BPM#2 B54 B59 XDP_TRST#
Trace Length 1~6 inches
TP6 XDP_BPM#3 C56 BPM#[2] PROC_TRST# MP remove(Intel)
R18 1K_5%_4 H_PROCHOT#
Length match < 300 mils BPM#[3] B56 XDP_TCK1 PCH JTAG
A6 PCH_JTAG_TCK D59 XDP_TDI_CPU
GPP_E3/CPU_GP0 +3V_S5 PCH_JTAG_TDI JTAG_TCK,JTAG_TMS +1V_VCCST
A7 +3V_S5 A56 XDP_TDO_CPU
DGPU_PW_CTRL# BA5 GPP_E7/CPU_GP1 PCH_JTAG_TDO C59 XDP_TMS_CPU
Trace Length < 9000mils
4 DGPU_PW_CTRL# GPP_B3/CPU_GP2 +3V_S5 PCH_JTAG_TMS
AY5 +3V_S5 C61 XDP_TRST#
GPP_B4/CPU_GP3 PCH_TRST# A59 XDP_TCK0
JTAGX TCK,TMS
SM_RCOMP[0:2] R19 49.9_1%_4 AT16 Trace Length < 9000mils
R20 49.9_1%_4 AU16 PROC_POPIRCOMP XDP_TDO_CPU R21 51_5%_4
Trace length < 500 mils PCH_OPIRCOMP
R22 49.9_1%_4 H66 XDP_TMS_CPU R23 *51_5%_4
Trace width = 12~15 mils R24 49.9_1%_4 H65 OPCE_RCOMP XDP_TDI_CPU R25 *51_5%_4
Trace spacing = 20 mils OPC_RCOMP
If use Intel DCI USB 3.0 fixture need to short
1. XDP_TDO <--> XDP_TDO_CPU
U@BGA1356P 2. XDP_TDI <--> XDP_TDI_CPU
B 4 OF 20 3. XDP_TMS <--> XDP_TMS_CPU B

H_PWRGOOD (50ohm) XDP_TCK0 R26 51_5%_4


Trace Length: 1~11.25 inches XDP_TCK1 R27 *51_5%_4
XDP_TRST# R28 *51_5%_4

,XDP_TCK1,XDP_TMS
don't need pull up or pull down

XDP_TCK0 R558 Stuff

+1V_VCCST

CPU thermal trip


3

IMVP_PWRGD_3V 2 Q1
U2 FDV301N_G
+1V_VCCST +3V
1

1 NC VCC 5

C1 R29 +1V_VCCST
2 A 10K_5%_4 R30
27 IMVP_PWRGD *0.1u/16V_4
A 1K_5%_4 A

3 GND Y 4 R31
IMVP_PWRGD_3V 8
*1K_5%_4
2

*74AUP1G07GW THRMTRIP# 1 3
SYS_SHDN# 22,24,30
R32 *0_5%_4 Q2
METR3904-G
Quanta Computer Inc.
PROJECT : ZAV
Size Document Number Rev
1A
Kabylake DISPLAY/eDP
Date: Wednesday, March 15, 2017 Sheet 2 of 34
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5 4 3 2 1

Change Data and DQS to interleave.


03
KabyLake ULT (DDR4) KabyLake ULT (DDR4)
U1B KBL_U/R
U1C KBL_U/R
D AU53 D
11 M_A_DQ[63:0] DDR0_CKN[0] M_A_CLK0# 11 12 M_B_DQ[63:0]
M_A_DQ0 AL71 AT53 M_A_CLK0 11
M_A_DQ1 AL68 DDR0_DQ[0] DDR0_CKP[0] AU55 M_B_DQ0 AF65 AN45
DDR0_DQ[1] DDR0_CKN[1] M_A_CLK1# 11 DDR1_DQ[0]/DDR0_DQ[16] DDR1_CKN[0] M_B_CLK0# 12
M_A_DQ2 AN68 AT55 M_A_CLK1 11 M_B_DQ1 AF64 AN46
M_A_DQ3 AN69 DDR0_DQ[2] DDR0_CKP[1] M_B_DQ2 AK65 DDR1_DQ[1]/DDR0_DQ[17] DDR1_CKN[1] AP45
DDR0_DQ[3] DDR1_DQ[2]/DDR0_DQ[18] DDR1_CKP[0] M_B_CLK0 12
M_A_DQ4 AL70 BA56 M_A_CKE0 11 M_B_DQ3 AK64 AP46
M_A_DQ5 AL69 DDR0_DQ[4] DDR0_CKE[0] BB56 M_B_DQ4 AF66 DDR1_DQ[3]/DDR0_DQ[19] DDR1_CKP[1]
DDR0_DQ[5] DDR0_CKE[1] M_A_CKE1 11 DDR1_DQ[4]/DDR0_DQ[20]
M_A_DQ6 AN70 AW56 M_B_DQ5 AF67 AN56 M_B_CKE0 12
M_A_DQ7 AN71 DDR0_DQ[6] DDR0_CKE[2] AY56 M_B_DQ6 AK67 DDR1_DQ[5]/DDR0_DQ[21] DDR1_CKE[0] AP55
M_A_DQ8 AR70 DDR0_DQ[7] DDR0_CKE[3] M_B_DQ7 AK66 DDR1_DQ[6]/DDR0_DQ[22] DDR1_CKE[1] AN55
M_A_DQ9 AR68 DDR0_DQ[8] AU45 M_B_DQ8 AF70 DDR1_DQ[7]/DDR0_DQ[23] DDR1_CKE[2] AP53
DDR0_DQ[9] DDR0_CS#[0] M_A_CS#0 11 DDR1_DQ[8]/DDR0_DQ[24] DDR1_CKE[3]
M_A_DQ10 AU71 AU43 M_A_CS#1 11 M_B_DQ9 AF68
M_A_DQ11 AU68 DDR0_DQ[10] DDR0_CS#[1] AT45 M_B_DQ10 AH71 DDR1_DQ[9]/DDR0_DQ[25] BB42
DDR0_DQ[11] DDR0_ODT[0] M_A_ODT0_DIMM 11 DDR1_DQ[10]/DDR0_DQ[26] DDR1_CS#[0] M_B_CS#0 12
M_A_DQ12 AR71 AT43 M_A_ODT1_DIMM 11 M_B_DQ11 AH68 AY42
M_A_DQ13 AR69 DDR0_DQ[12] DDR0_ODT[1] M_B_DQ12 AF71 DDR1_DQ[11]/DDR0_DQ[27] DDR1_CS#[1] BA42
DDR0_DQ[13] DDR1_DQ[12]/DDR0_DQ[28] DDR1_ODT[0] M_B_ODT0_MD 12
M_A_DQ14 AU70 BA51 M_A_A5 M_B_DQ13 AF69 AW42
M_A_DQ15 AU69 DDR0_DQ[14] DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5] BB54 M_A_A9 M_B_DQ14 AH70 DDR1_DQ[13]/DDR0_DQ[29] DDR1_ODT[1]
M_A_DQ16 BB65 DDR0_DQ[15] DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9] BA52 M_A_A6 M_B_DQ15 AH69 DDR1_DQ[14]/DDR0_DQ[30] AY48 M_B_A5
M_A_DQ17 AW65 DDR0_DQ[16]/DDR0_DQ[32] DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6] AY52 M_A_A8 M_B_DQ16 AT66 DDR1_DQ[15]/DDR0_DQ[31] DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5] AP50 M_B_A9
M_A_DQ18 AW63 DDR0_DQ[17]/DDR0_DQ[33] DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8] AW52M_A_A7 M_B_DQ17 AU66 DDR1_DQ[16]/DDR0_DQ[48] DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9] BA48 M_B_A6
M_A_DQ19 AY63 DDR0_DQ[18]/DDR0_DQ[34] DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7] AY55 M_B_DQ18 AP65 DDR1_DQ[17]/DDR0_DQ[49] DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6] BB48 M_B_A8
DDR0_DQ[19]/DDR0_DQ[35] DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0] M_A_BG#0 11 DDR1_DQ[18]/DDR0_DQ[50] DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8]
M_A_DQ20 BA65 AW54M_A_A12 M_B_DQ19 AN65 AP48 M_B_A7
M_A_DQ21 AY65 DDR0_DQ[20]/DDR0_DQ[36] DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12] BA54 M_A_A11 M_B_DQ20 AN66 DDR1_DQ[19]/DDR0_DQ[51] DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7] AP52
DDR0_DQ[21]/DDR0_DQ[37] DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11] DDR1_DQ[20]/DDR0_DQ[52] DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0] M_B_BG#0 12
M_A_DQ22 BA63 BA55 M_A_ACT# M_A_ACT# 11 M_B_DQ21 AP66 AN50 M_B_A12
M_A_DQ23 BB63 DDR0_DQ[22]/DDR0_DQ[38] DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT# AY54 M_B_DQ22 AT65 DDR1_DQ[21]/DDR0_DQ[53] DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12] AN48 M_B_A11
DDR0_DQ[23]/DDR0_DQ[39] DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1] M_A_BG#1 11 DDR1_DQ[22]/DDR0_DQ[54] DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11]
M_A_DQ24 BA61 M_B_DQ23 AU65 AN53 M_B_ACT# M_B_ACT# 12
M_A_DQ25 AW61 DDR0_DQ[24]/DDR0_DQ[40] AU46 M_A_A13 M_B_DQ24 AT61 DDR1_DQ[23]/DDR0_DQ[55] DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT# AN52
DDR0_DQ[25]/DDR0_DQ[41] DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13] DDR1_DQ[24]/DDR0_DQ[56] DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1] M_B_BG#1 12
M_A_DQ26 BB59 AU48 M_A_CAS# 11 M_B_DQ25 AU61
M_A_DQ27 AW59 DDR0_DQ[26]/DDR0_DQ[42] DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15] AT46 M_B_DQ26 AP60 DDR1_DQ[25]/DDR0_DQ[57] BA43 M_B_A13
DDR0_DQ[27]/DDR0_DQ[43] DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14] M_A_WE# 11 DDR1_DQ[26]/DDR0_DQ[58] DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13]
M_A_DQ28 BB61 AU50 M_A_RAS# 11 M_B_DQ27 AN60 AY43 M_B_A15 12
M_A_DQ29 AY61 DDR0_DQ[28]/DDR0_DQ[44] DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16] AU52 M_B_DQ28 AN61 DDR1_DQ[27]/DDR0_DQ[59] DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15] AY44
DDR0_DQ[29]/DDR0_DQ[45] DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0] M_A_BA#0 11 DDR1_DQ[28]/DDR0_DQ[60] DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14] M_B_A14 12
M_A_DQ30 BA59 AY51 M_A_A2 M_B_DQ29 AP61 AW44 M_B_A16 12
C M_A_DQ31 AY59 DDR0_DQ[30]/DDR0_DQ[46] DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2] AT48 M_B_DQ30 AT60 DDR1_DQ[29]/DDR0_DQ[61] DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16] BB44 C
DDR0_DQ[31]/DDR0_DQ[47] DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1] M_A_BA#1 11 DDR1_DQ[30]/DDR0_DQ[62] DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0] M_B_BS#0 12
M_A_DQ32 AY39 AT50 M_A_A10 M_B_DQ31 AU60 AY47 M_B_A2
M_A_DQ33 AW39 DDR0_DQ[32]/DDR1_DQ[0] DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10] BB50 M_A_A1 M_B_DQ32 AU40 DDR1_DQ[31]/DDR0_DQ[63] DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2] BA44
DDR0_DQ[33]/DDR1_DQ[1] DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1] DDR1_DQ[32]/DDR1_DQ[16] DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1] M_B_BS#1 12
M_A_DQ34 AY37 AY50 M_A_A0 M_B_DQ33 AT40 AW46M_B_A10
M_A_DQ35 AW37 DDR0_DQ[34]/DDR1_DQ[2] DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0] BA50 M_A_A3 M_B_DQ34 AT37 DDR1_DQ[33]/DDR1_DQ[17] DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10] AY46 M_B_A1
M_A_DQ36 BB39 DDR0_DQ[35]/DDR1_DQ[3] DDR0_MA[3] BB52 M_A_A4 M_B_DQ35 AU37 DDR1_DQ[34]/DDR1_DQ[18] DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1] BA46 M_B_A0
M_A_DQ37 BA39 DDR0_DQ[36]/DDR1_DQ[4] DDR0_MA[4] M_B_DQ36 AR40 DDR1_DQ[35]/DDR1_DQ[19] DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0] BB46 M_B_A3
M_A_DQ38 BA37 DDR0_DQ[37]/DDR1_DQ[5] AM70 M_A_DQS#0 M_B_DQ37 AP40 DDR1_DQ[36]/DDR1_DQ[20] DDR1_MA[3] BA47 M_B_A4
M_A_DQ39 BB37 DDR0_DQ[38]/DDR1_DQ[6] DDR0_DQSN[0] AM69 M_A_DQS0 M_B_DQ38 AP37 DDR1_DQ[37]/DDR1_DQ[21] DDR1_MA[4]
M_A_DQ40 AY35 DDR0_DQ[39]/DDR1_DQ[7] DDR0_DQSP[0] AT69 M_A_DQS#1 M_B_DQ39 AR37 DDR1_DQ[38]/DDR1_DQ[22] AH66 M_B_DQS#0
M_A_DQ41 AW35 DDR0_DQ[40]/DDR1_DQ[8] DDR0_DQSN[1] AT70 M_A_DQS1 M_B_DQ40 AT33 DDR1_DQ[39]/DDR1_DQ[23] DDR1_DQSN[0]/DDR0_DQSN[2] AH65 M_B_DQS0
M_A_DQ42 AY33 DDR0_DQ[41]/DDR1_DQ[9] DDR0_DQSP[1] BA64 M_A_DQS#2 M_B_DQ41 AU33 DDR1_DQ[40]/DDR1_DQ[24] DDR1_DQSP[0]/DDR0_DQSP[2] AG69 M_B_DQS#1
M_A_DQ43 AW33 DDR0_DQ[42]/DDR1_DQ[10] DDR0_DQSN[2]/DDR0_DQSN[4] AY64 M_A_DQS2 M_B_DQ42 AU30 DDR1_DQ[41]/DDR1_DQ[25] DDR1_DQSN[1]/DDR0_DQSN[3] AG70 M_B_DQS1
M_A_DQ44 BB35 DDR0_DQ[43]/DDR1_DQ[11] DDR0_DQSP[2]/DDR0_DQSP[4] AY60 M_A_DQS#3 M_B_DQ43 AT30 DDR1_DQ[42]/DDR1_DQ[26] DDR1_DQSP[1]/DDR0_DQSP[3] AR66 M_B_DQS#2
M_A_DQ45 BA35 DDR0_DQ[44]/DDR1_DQ[12] DDR0_DQSN[3]/DDR0_DQSN[5] BA60 M_A_DQS3 M_B_DQ44 AR33 DDR1_DQ[43]/DDR1_DQ[27] DDR1_DQSN[2]/DDR0_DQSN[6] AR65 M_B_DQS2
M_A_DQ46 BA33 DDR0_DQ[45]/DDR1_DQ[13] DDR0_DQSP[3]/DDR0_DQSP[5] BA38 M_A_DQS#4 M_B_DQ45 AP33 DDR1_DQ[44]/DDR1_DQ[28] DDR1_DQSP[2]/DDR0_DQSP[6] AR61 M_B_DQS#3
M_A_DQ47 BB33 DDR0_DQ[46]/DDR1_DQ[14] DDR0_DQSN[4]/DDR1_DQSN[0] AY38 M_A_DQS4 M_B_DQ46 AR30 DDR1_DQ[45]/DDR1_DQ[29] DDR1_DQSN[3]/DDR0_DQSN[7] AR60 M_B_DQS3
M_A_DQ48 AY31 DDR0_DQ[47]/DDR1_DQ[15] DDR0_DQSP[4]/DDR1_DQSP[0] AY34 M_A_DQS#5 M_B_DQ47 AP30 DDR1_DQ[46]/DDR1_DQ[30] DDR1_DQSP[3]/DDR0_DQSP[7] AT38 M_B_DQS#4
M_A_DQ49 AW31 DDR0_DQ[48]/DDR1_DQ[32] DDR0_DQSN[5]/DDR1_DQSN[1] BA34 M_A_DQS5 M_B_DQ48 AU27 DDR1_DQ[47]/DDR1_DQ[31] DDR1_DQSN[4]/DDR1_DQSN[2] AR38 M_B_DQS4
M_A_DQ50 AY29 DDR0_DQ[49]/DDR1_DQ[33] DDR0_DQSP[5]/DDR1_DQSP[1] BA30 M_A_DQS#6 M_B_DQ49 AT27 DDR1_DQ[48] DDR1_DQSP[4]/DDR1_DQSP[2] AT32 M_B_DQS#5
M_A_DQ51 AW29 DDR0_DQ[50]/DDR1_DQ[34] DDR0_DQSN[6]/DDR1_DQSN[4] AY30 M_A_DQS6 M_B_DQ50 AT25 DDR1_DQ[49] DDR1_DQSN[5]/DDR1_DQSN[3] AR32 M_B_DQS5
M_A_DQ52 BB31 DDR0_DQ[51]/DDR1_DQ[35] DDR0_DQSP[6]/DDR1_DQSP[4] AY26 M_A_DQS#7 M_B_DQ51 AU25 DDR1_DQ[50] DDR1_DQSP[5]/DDR1_DQSP[3] AR25 M_B_DQS#6
M_A_DQ53 BA31 DDR0_DQ[52]/DDR1_DQ[36] DDR0_DQSN[7]/DDR1_DQSN[5] BA26 M_A_DQS7 M_B_DQ52 AP27 DDR1_DQ[51] DDR1_DQSN[6] AR27 M_B_DQS6
M_A_DQ54 BA29 DDR0_DQ[53]/DDR1_DQ[37] DDR0_DQSP[7]/DDR1_DQSP[5] M_B_DQ53 AN27 DDR1_DQ[52] DDR1_DQSP[6] AR22 M_B_DQS#7
M_A_DQ55 BB29 DDR0_DQ[54]/DDR1_DQ[38] AW50 M_A_ALERT# M_B_DQ54 AN25 DDR1_DQ[53] DDR1_DQSN[7] AR21 M_B_DQS7
DDR0_DQ[55]/DDR1_DQ[39] DDR0_ALERT# M_A_ALERT# 11 DDR1_DQ[54] DDR1_DQSP[7]
M_A_DQ56 AY27 AT52 M_A_PARITY M_A_PARITY 11 M_B_DQ55 AP25
M_A_DQ57 AW27 DDR0_DQ[56]/DDR1_DQ[40] DDR0_PAR M_B_DQ56 AT22 DDR1_DQ[55] AN43 M_B_ALERT#
DDR0_DQ[57]/DDR1_DQ[41] DDR1_DQ[56] DDR1_ALERT# M_B_ALERT# 12
M_A_DQ58 AY25 AY67 +VREF_CA_CPU 11 M_B_DQ57 AU22 AP43 M_B_PARITY M_B_PARITY 12
M_A_DQ59 AW25 DDR0_DQ[58]/DDR1_DQ[42] DDR_VREF_CA AY68 +VREFDQ_SA_M3 TP7 M_B_DQ58 AU21 DDR1_DQ[57] DDR1_PAR AT13 CPU_DRAMRST#
M_A_DQ60 BB27 DDR0_DQ[59]/DDR1_DQ[43] DDR0_VREF_DQ BA67 M_B_DQ59 AT21 DDR1_DQ[58] DRAM_RESET# AR18 SM_RCOMP_0
DDR0_DQ[60]/DDR1_DQ[44] DDR1_VREF_DQ +VREFDQ_SB_M3 12 DDR1_DQ[59] DDR_RCOMP[0]
M_A_DQ61 BA27 M_B_DQ60 AN22 AT18 SM_RCOMP_1
M_A_DQ62 BA25 DDR0_DQ[61]/DDR1_DQ[45] AW67 DDR_VTT_CTRL +1.2VSUS M_B_DQ61 AP22 DDR1_DQ[60] DDR_RCOMP[1] AU18 SM_RCOMP_2
B M_A_DQ63 BB25 DDR0_DQ[62]/DDR1_DQ[46] DDR_VTT_CNTL +3V_S5 M_B_DQ62 AP21 DDR1_DQ[61] DDR_RCOMP[2] B
DDR0_DQ[63]/DDR1_DQ[47] M_B_DQ63 AN21 DDR1_DQ[62]
DDR1_DQ[63]

U@BGA1356P C2 M_B_A[13:0]
2 OF 20 U@BGA1356P M_B_A[13:0] 12
0.1u/16V_4 R33
3 OF 20
2

*100K_5%_4 M_B_DQS#[7:0]
M_B_DQS#[7:0] 12
M_B_DQS[7:0]
M_B_DQS[7:0] 12
R34 *10K_5%_4 1 3 DDR_VTTT_PG_CTRL 26
M_A_ALERT# R35 *0_5%_4
Q3 M_B_ALERT# R36 *0_5%_4
*DDTC144EUA-7-F

M_A_A[13:0]
M_A_A[13:0] 11
REV:E connect to GND
M_A_DQS#[7:0] Stuff Q54 for both UMA and GPU in DDR_VTT_CNTL
M_A_DQS#[7:0] 11 DRAM COMP
M_A_DQS[7:0]
M_A_DQS[7:0] 11

DRAMRST SM_RCOMP_0 R37 200_1%_4

+1.2VSUS SM_RCOMP_1 R38 80.6_1%_4

SM_RCOMP_2 R39 100_1%_4

R40
470_5%_4
A A

CPU DRAM
CPU_DRAMRST# R41 *Short_0402 DDR_DRAMRST# 11,12

C3 R2

*0.1u/16V_4 *10_5%_4 Quanta Computer Inc.


Reserved for ESD
PROJECT : ZAV
Size Document Number Rev
1A
Kabylake MEMORY
Date: Wednesday, March 15, 2017 Sheet 3 of 34
5 4 3 2 1
5 4 3 2 1

H_PECI (50ohm)
KabyLake ULT (SIDEBAND ) GPIO 04
If route on microstrip, KBY_U/R
U1F
Spacing need >18 mils
Trace Length: 2~15 iches LPSS ISH

H_PWRGOOD (50ohm) TP88 VGPU_EN AN8 +3V_S5 +3V_S5


Trace Length: 1~11.25 inches TP89 DGPU_HOLD_RST# AP7 GPP_B15/GSPI0_CS#
+3V_S5 +3V_S5 GPP_D9
P2 RAM_ID0 RAM ID
GPP_B16/GSPI0_CLK P3 RAM_ID1
TP90 DGPU_PWR_EN AP8 +3V_S5 +3V_S5 GPP_D10
GPP_B17/GSPI0_MISO P4 RAM_ID2
GSPI0_MOSI AR7 +3V_S5 +3V_S5 GPP_D11 R42 RAMID0_L@10K_5%_4 RAM_ID0 R43 RAMID0_H@10K_5%_4
D GPP_B18/GSPI0_MOSI P1 RAM_ID3 D
+3V_S5 GPP_D12 R44 RAMID1_L@10K_5%_4 RAM_ID1 R45 RAMID1_H@10K_5%_4
TP91 DGPU_PWROK AM5 +3V_S5 R46 RAMID2_L@10K_5%_4 RAM_ID2 R47 RAMID2_H@10K_5%_4
GPP_B19/GSPI1_CS# M4
TP92 GC6_FB_EN AN7 +3V_S5 +3V_S5 GPP_D5/ISH_I2C0_SDA R48 RAMID3_L@10K_5%_4 RAM_ID3 R49 RAMID3_H@10K_5%_4
GPP_B20/GSPI1_CLK N3
TP93 DGPU_EVENT# AP5 +3V_S5 +3V_S5 GPP_D6/ISH_I2C0_SCL
+3V_S5 GSPI1_MOSI AN5 GPP_B21/GSPI1_MISO
GPP_B22/GSPI1_MOSI
+3V_S5 N1
+3V_S5 GPP_D7/ISH_I2C1_SDA N2
AB1 +3V_S5 +3V_S5 GPP_D8/ISH_I2C1_SCL
R50 2.2K_5%_4 I2C0_SDA
20 ACCEL_INTA
ODD_PRSNT# AB2 GPP_C8/UART0_RXD ID3 ID2 ID1 ID0 Vendor Quanta PN
Touch PAD 18 ODD_PRSNT# GPP_C9/UART0_TXD
+3V_S5 AD11
R51 2.2K_5%_4 I2C0_SCL TPD_INT# W4 +3V_S5 +1.8V_S5 GPP_F10/I2C5_SDA/ISH_I2C2_SDA
R52 *2.2K_5%_4 I2C1_SDA
20,22 TPD_INT#
AB3 GPP_C10/UART0_RTS# AD12 0 0 0 0 Hynix 8Gb AKD5QGSTW05
15 TP_INT_PCH GPP_C11/UART0_CTS#
+3V_S5 +1.8V_S5 GPP_F11/I2C5_SCL/ISH_I2C2_SCL
R53 *2.2K_5%_4 I2C1_SCL Touch Screen 0 0 0 1 Samsung 8Gb AKD5QZ0T504
UART2_RXD AD1 +3V_S5
GPP_C20/UART2_RXD U1
UART2_TXD AD2 +3V_S5 +3V_S5 GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C4B_SDA 0 0 1 0 Micron 8Gb AKD5QGSTL18
GPP_C21/UART2_TXD U2
PU 2.2K for touch pad I2C bus(400 KHz) UART2 for RMT UART2_RTS# AD3 +3V_S5 +3V_S5 GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C4B_SCL
GPP_C22/UART2_RTS# U3
UART2_CTS# AD4 +3V_S5 +3V_S5 GPP_D15/ISH_UART0_RTS# 1 1 1 1 With out on board memory
GPP_C23/UART2_CTS# U4
+3V_S5 GPP_D16/ISH_UART0_CTS#/SML0BALERT#
GPU Control PU/PD I2C0_SDA U7
AC1
20 I2C0_SDA GPP_C16/I2C0_SDA
+3V_S5 +3V_S5 GPP_C12/UART1_RXD/ISH_UART1_RXD AC2
Touch PAD I2C0_SCL U6 +3V_S5 +3V_S5 GPP_C13/UART1_TXD/ISH_UART1_TXD
20 I2C0_SCL GPP_C17/I2C0_SCL AC3
+3V_S5 GPP_C14/UART1_RTS#/ISH_UART1_RTS# AB4
I2C1_SDA U8 +3V_S5 +3V_S5 GPP_C15/UART1_CTS#/ISH_UART1_CTS#
15 I2C1_SDA GPP_C18/I2C1_SDA
Touch Screen I2C1_SCL U9 +3V_S5
15 I2C1_SCL GPP_C19/I2C1_SCL
+3V_S5 GPP_A18/ISH_GP0
AY8 UART
BA8 +3V_S5
AH9 +1.8V_S5 +3V_S5 GPP_A19/ISH_GP1
GPP_F4/I2C2_SDA BB7
AH10 +1.8V_S5 +3V_S5 GPP_A20/ISH_GP2
GPP_F5/I2C2_SCL BA7
+3V_S5 GPP_A21/ISH_GP3 AY7
AH11 +1.8V_S5 +3V_S5 GPP_A22/ISH_GP4
GPP_F6/I2C3_SDA AW7
AH12 +1.8V_S5 +3V_S5 GPP_A23/ISH_GP5 TP8 UART2_RXD R58 *49.9K_1%_4
+3V GPP_F7/I2C3_SCL AP13
+3V_S5
Sx_EXIT_HOLDOFF#/GPP_A12/BM_BUSY#/ISH_GP6 TP9 UART2_TXD R61 *49.9K_1%_4
AF11 +1.8V_S5 TP10 UART2_RTS# R62 *49.9K_1%_4
AF12 GPP_F8/I2C4_SDA TP11 UART2_CTS# R63 *49.9K_1%_4
GPP_F9/I2C4_SCL +1.8V_S5
R64 *10K_5%_4 DGPU_HOLD_RST#

U@BGA1356P
6 OF 20
DGPU_PW_CTRL#
UMA Only
C
high Board ID C
GPU power is control by PCH U1G KBY_U/R +3V_S5
low GPIO (Discrete, SG or Optimize)
HDA C4 *10p/50V_4 AUDIO R72 EMC_N@10K_5%_4 Board_ID0 R65 EMC@10K_5%_4
R73 10K_5%_4 Board_ID1 R66 *10K_5%_4
+3V R74 33_5%_4 HDA_SYNC_R BA22 R75 GS_N@10K_5%_4 Board_ID2 R67 GS@10K_5%_4
17 PCH_AZ_CODEC_SYNC HDA_SYNC/I2S0_SFRM
R68 33_5%_4 HDA_BCLK_R AY22 R76 TPM_N@10K_5%_4 Board_ID3 R69 TPM@10K_5%_4
2 DGPU_PW_CTRL# 17 PCH_AZ_CODEC_BITCLK HDA_BLK/I2S0_SCLK
17 PCH_AZ_CODEC_SDOUT R70 33_5%_4 HDA_SDO_R BB22 SDIO/SDXC R59 *10K_5%_4 Board_ID4 R77 10K_5%_4
BA21 HDA_SDO/I2S0_TXD R78 TPC_N@10K_5%_4 Board_ID5 R79 TPC@10K_5%_4
17 PCH_AZ_CODEC_SDIN0 HDA_SDI0/I2S0_RXD
R80 *EV@100K_5%_4 DGPU_PW_CTRL# R71 1K_5%_4 AY21 +3V_S5 AB11 Board_ID0 R81 10K_5%_4 Board_ID6 R82 *10K_5%_4
DGPU_PWROK R83 *10K_5%_4 R84 33_5%_4 HDA_RST#_R AW22 HDA_SDI1/I2S1_RXD SD GPI GPP_G0/SD_CMD AB13 Board_ID1 R85 10K_5%_4 Board_ID7 R86 *10K_5%_4
17 PCH_AZ_CODEC_RST# HDA_RST#/I2S1_SCLK
+3V_S5 SD GPI GPP_G1/SD_DATA0
J5 +3V_S5 AB12 Board_ID2
AY20 GPP_D23/I2S_MCLK +3V_S5 SD GPI GPP_G2/SD_DATA1 W12 Board_ID3
DGPU_PWROK PD on GPU side I2S1_SFRM
+3V_S5 SD GPI GPP_G3/SD_DATA2
C5 C810 AW20 +3V_S5 W11 Board_ID4
I2S1_TXD SD GPI GPP_G4/SD_DATA3 W10 Board_ID5
*10p/50V_4 *10p/50V_4 +3V_S5 SD GPI GPP_G5/SD_CD#
AK7 +1.8V_S5 +3V_S5 W8 Board_ID6 Low High
AK6 GPP_F1/I2S2_SFRM SD GPI GPP_G6/SD_CLK W7 Board_ID7
GPP_F0/I2S2_SCLK +1.8V_S5 +3V_S5 SD GPI GPP_G7/SD_WP
DGPU_PW_CTRL# VGA H/W Setup AK9 +1.8V_S5
Signal Menu AK10 GPP_F2/I2S2_TXD BA9
GPP_F3/I2S2_RXD +1.8V_S5 +3V_S5 GPP_A17/SD_PWR_EN#/ISH_GP7 BOARD_ID0 Non eMMC eMMC
BB9
UMA Only 1 UMA Hidden UMA boot +3V_S5 GPP_A16/SD_1P8_SEL
TP12 DMIC_CLK0_R H5 AB7 R87 200_1%_4
D7 GPP_D19/DMIC_CLK0 +3V_S5 SD_RCOMP BOARD_ID1 Reserved (Default) Reserve
SG/Optimise 0 GPU Hidden GPU boot GPP_D20/DMIC_DATA0 +3V_S5
D8 AF13
Strapping C8 GPP_D17/DMIC_CLK1 +3V_S5 +1.8V_S5 GPP_F23 BOARD_ID2 Non G-sensor G-sensor
SPKR R88 *20K_1%_4 GPP_D18/DMIC_DATA1 +3V_S5
17 SPKR SPKR AW5 BOARD_ID3 Non TPM TPM
545659-103 GPP_B14/SPKR +3V_S5

Skylake-U Strapping Table BOARD_ID4 Non Touch panel Touch panel


U@BGA1356P
7 OF 20
BOARD_ID5 Non Type-C Type-C
Pin Name Strap description Sampled Configuration note
0 = *Disable Top Swap (iPD 20K) R89 *1K_5%_4 SPKR
BOARD_ID6 Reserved (Default) Reserve
B GPP_B14 (SPKR) Top-Block Swap override PCH_PWROK +3V B
1 = Enable Top Swap Mode
BOARD_ID7 Reserved (Default) Reserve
0 = *Disable No Reboot (iPD 20K) GSPI0_MOSI
GPP_B18 No reboot PCH_PWROK +3V R90 *1K_5%_4
(GSPI0_MOSI) 1 = Enable No Reboot Mode
0 = *Disable Intel ME Cryp to TLS(iPD 20K) R91 *10K_5%_4
GPP_C2 TLS Confidentiality RSMRST# +3V_S5 SMBALERT# 7
(SMBALERT#) 1 = Enable Intel ME Cryp to TLS
0 = *SPI (iPD 20K) R92 *1K_5%_4 GSPI1_MOSI
GPP_B22 Boot BIOS Strap Bit (BBS) PCH_PWROK +3V
(GSPI1_MOSI) 1 = LPC
0 = *LPC is selected for EC (iPD 20K)
GPP_C5 eSPI or LPC RSMRST# +3V_S5 R93 *1K_5%_4 SML0ALERT# 7
(SML0ALERT#) 1 = eSPI selected for EC

SPI0_MOSI Reserved RSMRST# (iPU 15 ~ 40K)

+3V_S5
SPI0_MISO Reserved RSMRST# (iPU 15 ~ 40K) Touchpad INT

GPP_B23 TPD_INT# R94 10K_5%_4


(SML1ALERT# Reserved RSMRST# (iPD 20K)
/PCHHOT#)

SPI0_IO2 Reserved RSMRST# (iPU 15 ~ 40K)

A SPI0_IO3 Reserved RSMRST# (iPU 15 ~ 40K) A

0 = *Enable security in the Flash


HDA_SDO / Flash Descriptor Security
Description (iPD 20K) change location to near CPU to prevent impact HDA_SDO signal
I2S_TXD0 Override / Intel ME Debug Mode PCH_PWROK
1 = Disable Flash Descriptor Security (Override) HDA_SDO_R R95 1K_5%_4
ME_WR# 22

GPP_E19 0 = *Port B is not detected (iPD 20K)


Display Port B Detected PCH_PWROK
(DDPB_CTRLDATA)
1 =Port B is detected Quanta Computer Inc.
0 = *Port C is not detected (iPD 20K) PROJECT : ZAV
GPP_E21 Size Document Number Rev
(DDPC_CTRLDATA) Display Port C Detected PCH_PWROK 1 =Port C is detected
1A
Kabylake HDA/GPIO/ID
Date: Wednesday, March 15, 2017 Sheet 4 of 34
5 4 3 2 1
5 4 3 2 1

+VCCCORE
U1L KBY_U/R +VCCCORE

Backside cap
05
CPU POWER 1 OF 4

A30
A34 VCORE_A30 VCORE_G32
G32
G33
Primary side cap
A39 VCORE_A34 S0 VCC VCORE_G33 G35
C6 C9 C10 C11 C12 C13 C7 C14 C15 C8 A44 VCORE_A39 0.55V~1.5V VCORE_G35 G37 C16 C17 C18 C19 C20 C21
22u/6.3V_6 AK33 VCORE_A44 VCORE_G37 G38
1u/6.3V_4 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6
VCORE_AK33 2+2 peak 24A VCORE_G38
47u/6.3V_8 47u/6.3V_8 47u/6.3V_8 47u/6.3V_8 47u/6.3V_8 47u/6.3V_8
AK35 2+2 TPY 17A G40
AK37 VCORE_AK35 VCORE_G40 G42
Backside cap AK38
AK40
VCORE_AK37
VCORE_AK38 2+3e peak 24A
VCORE_G42
VCORE_J30
J30
J33
Primary side cap
VCORE_AK40 2+3e TPY 17A VCORE_J33
AL33 J37
AL37 VCORE_AL33 VCORE_J37 J40 C26 C28 C29 C30 C31 C32 C36 C37
C818 C819 C817 C820 C821 C822 C815 C816 AL40 VCORE_AL37 VCORE_J40 K33
*22u/6.3V_6 *22u/6.3V_6 *22u/6.3V_6 *22u/6.3V_6 *22u/6.3V_6 *22u/6.3V_6 22u/6.3V_6 *22u/6.3V_6
11/23 Reserved AM32 VCORE_AL40 VCORE_K33 K35
10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4

AM33 VCORE_AM32 VCORE_K35 K37


AM35 VCORE_AM33 VCORE_K37 K38
D
Backside cap AM37
AM38
VCORE_AM35
VCORE_AM37
VCORE_K38
VCORE_K40
K40
K42 R96
+VCCCORE
100_1%_4 100 ohm Near CPU D
G30 VCORE_AM38 VCORE_K42 K43
VCORE_G30 VCORE_K43 VCORE_SENSE 27
+1V_VCCST
C22 C23 C24 C25 C27 C33 C34 C35 C38 TP14 K32
RSVD_K32 VCC_SENSE
E32
VCORESS_SENSE 27
SVID
1u/6.3V_4 1u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 E33 R97 100_1%_4
TP15 AK32 VSS_SENSE
RSVD_AK32 Must close to CPU
B63 H_CPU_SVIDART#
Backside cap AB62
P62 VCCOPC_AB62S0 1.0V 3A
VIDALERT#
VIDSCK
A63
D64
H_CPU_SVIDCLK
H_CPU_SVIDDAT
R98
100_1%_4
C47
1000p/50V_4
V62 VCCOPC_P62 VIDSOUT
VCCOPC_V62 G20
VCCSTG_G20 +VCCSTG
C39 C40 C41 C42 C43 C44 C45 C46 H63
VCC_OPC_1P8_H63 H_CPU_SVIDDAT
22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 1u/6.3V_4 10u/6.3V_4 1u/6.3V_4 10u/6.3V_4
G61
Sx C55
H_CPU_SVIDDAT 27
VCC_OPC_1P8_G61 1.8V 50mA
1u/6.3V_4 Place PU resistor
Backside cap Remove (2016/11/07) AC63
AE63 VCCOPC_SENSE close to CPU +1V_VCCST
VSSOPC_SENSE GT3 CPU
AE62
C48 C49 C50 C51 C52 C53 C54 AG62 VCCEOPIO_AE62 R106
S0 1.0V
VCCEOPIO_AG62 3A Place PU resistor
10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 1u/6.3V_4 10u/6.3V_4 1u/6.3V_4 close to CPU 54.9_1%_4
AL63
AJ62 VCCEOPIO_SENSE
Backside cap VSSEOPIO_SENSE H_CPU_SVIDART# R107 220_1%_4 VR_SVID_ALERT#_VCORE 27

U@BGA1356P
12 OF 20
C56 C57 C58 C59 C60 C61 C62 H_CPU_SVIDCLK H_CPU_SVIDCLK 27
U1M KBY_U/R +VCCGT
1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4
CPU POWER 2 OF 4
N70
+VCCGT_+VCORE A48 VCCGT_N70 N71 Close CPU
Under CPU A53 VCCGT/VCORE_A48 co-lay VCCGT_N71 R63
+VCCGT A58 VCCGT/VCORE_A53 KBY-R/U VCCGT_R63 R64
A62 VCCGT_A58 VCCGT_R64 R65
A66 VCCGT_A62 VCCGT_R65 R66
AA63 VCCGT_A66 VCCGT_R66 R67 C65 C66 C67 C68 C77 C78
AA64 VCCGT_AA63 VCCGT_R67 R68 47u/6.3V_8 47u/6.3V_8 47u/6.3V_8 47u/6.3V_8 47u/6.3V_8 47u/6.3V_8
AA66 VCCGT_AA64 VCCGT_R68 R69
C69 C79 C70 C71 C73 AA67 VCCGT_AA66 VCCGT_R69 R70
10u/6.3V_6 10u/6.3V_4 10u/6.3V_6 10u/6.3V_4 10u/6.3V_6 AA69 VCCGT_AA67 VCCGT_R70 R71
AA70 VCCGT_AA69 VCCGT_R71 T62
AA71 VCCGT_AA70 VCCGT_T62 U65 C75 C80 C76 C81 C82 C83 C84 C85
C
AC64 VCCGT_AA71 VCCGT_U65 U68 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 C
AC65 VCCGT_AC64
VCCGT_AC65
57A VCCGT_U68
VCCGT_U71
U71
AC66 W63
AC67 VCCGT_AC66 VCCGT_W63 W64
AC68 VCCGT_AC67 VCCGT_W64 W65
C86 C87 C88 C89 C90 AC69 VCCGT_AC68 VCCGT_W65 W66 C91 C92 C93 C94
10u/6.3V_4 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_4 AC70 VCCGT_AC69 VCCGT_W66 W67 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6
AC71 VCCGT_AC70 VCCGT_W67 W68
Backside cap J43
J45
VCCGT_AC71
VCCGT/VCORE_J43
VCCGT_W68
VCCGT_W69
W69
W70
J46 VCCGT/VCORE_J45 VCCGT_W70 W71
+VCCGT_+VCORE J48 VCCGT/VCORE_J46 VCCGT_W71 Y62
+VCCGT J50 VCCGT/VCORE_J48 co-layVCCGT_Y62
J52
J53
VCCGT/VCORE_J50 KBY-U/R
VCCGT/VCORE_J52 AK42 +VCCGTX_+VCORE
Primary side cap
J55 VCCGT_J53 VccGTx/VCORE_AK42 AK43
VCCGT_J55 VccGTx/VCORE_AK43
J56 AK45
For 2+3e CPU Remove (2016/11/07) J58 VCCGT_J56 VccGTx/VCORE_AK45
AK46
VCCGT_J58 VccGTx/VCORE_AK46
J60 AK48 C103 C104
+VCCGT +VCCGT_+VCORE K48 VCCGT_J60 VccGTx/VCORE_AK48
AK50 U42@22u/6.3V_6 U42@22u/6.3V_6 Remove (2016/11/07)
VCCGT/VCORE_K48 VccGTx/VCORE_AK50
K50 AK52 AK52 TP16
R108 *U22@0_5%_4 K52 VCCGT/VCORE_K50 VccGTx/RSVD AK53
K53 VCCGT/RSVD VCCGTX_AK53 AK55

R109 U42@0.0002_5%_8 +VCCGT


K55
K56
VCCGT_K53 co-lay VCCGTX_AK55
VCCGT_K55 KBY-U/R VCCGTX_AK56
AK56
AK58
Backside cap
+VCCCORE K58 VCCGT_K56 VCCGTX_AK58 AK60 +VCCGTX_+VCORE
K60 VCCGT_K58 VCCGTX_AK60 AK70
+VCCGT_+VCORE L62 VCCGT_K60 VCCGTX_AK70 AL43
VCCGT_L62 VccGTx/VCORE_AL43
For U42 上上 L63
L64 VCCGT_L63
VCCGT_L64
7A
VccGTx/VCORE_AL46
VccGTx/VCORE_AL50
AL46
AL50
C120
U42@22u/6.3V_6 Remove (2016/11/07)
R110 *U42@0.0002_5%_8 C121 C122 C123 C124 C125 C126 L65 AL53
1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 L66 VCCGT_L65 co-lay VCCGTX_AL53 AL56
L67 VCCGT_L66 KBY-U/R VCCGTX_AL56 AL60
L68 VCCGT_L67 VCCGTX_AL60 AM48 +VCCGTX_+VCORE
VCCGT_L68 VccGTx/VCORE_AM48
L69
L70 VCCGT_L69 VccGTx/VCORE_AM50
AM50
AM52 C127 C128
1.U22--->R117 不上上
VCCGT_L70 VccGTx/VCORE_AM52
R115 U22@0.0002_5%_8
L71
M62 VCCGT_L71 co-lay VCCGTX_AM53
AM53
AM56
U42@22u/6.3V_6 U42@22u/6.3V_6 R117 U42@0.0002_5%_8
2.U42--->R117 上上
+VCCGT C129 C130 C131 C132 C133 C134 N63 VCCGT_M62 VCCGTX_AM56 AM58
1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 N64 VCCGT_N63 KBY-U/R VCCGTX_AM58 AU58 +VCCGTX_+VCORE
VCCGT_N64 VCCGTX_AU58 +VCCCORE
+VCCGT_+VCORE N66 AU63
VCCGT_N66 VCCGTX_AU63
For U22 上上 N67
N69 VCCGT_N67
VCCGT_N69
VCCGTX_BB57
VCCGTX_BB66
BB57
BB66 R118 *U42@0.0002_5%_8
B
R116 *U22@0.0002_5%_8 +VCCGT R119 100_1%_4
J70 AK62 1.U22---C103/C104/C120/C127/C128 不上上 B
27 VCCGT_SENSE VCCGT_SENSE VCCGTx_SENSE
27 VSSGT_SENSE
J69
VSSGT_SENSE VSSGTx_SENSE
AL61
2.U42---C103/C104/C120/C127/C128 上上
100 ohm Near CPU R120 100_1%_4
U@BGA1356P
13 OF 20

+1.2VSUS U1N KBY_U/R


+VCCIO
S0
Backside cap AU23
S3
CPU POWER 3 OF 4
0.85V/0.95V AK28 Backside cap Imax 3(A)
AU28 VDDQ_AU23 DDR4 VCCIO_AK28 AK30
VDDQ_AU28 1.2V 3.0A
VCCIO_AK30
AU35 AL30
AU42 VDDQ_AU35 VCCIO_AL30 AL42
C135 C138 C136 C137 C139 C140 BB23 VDDQ_AU42 2A VCCIO_AL42 AM28 C141 C142 C143 C144 C145 C146
BB32 VDDQ_BB23 VCCIO_AM28 AM30 10u/6.3V_4 10u/6.3V_4
10u/6.3V_4 10u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4
Backside cap BB41
BB47
VDDQ_BB32
VDDQ_BB41
VCCIO_AM30
VCCIO_AM42
AM42

For 2+3e CPU Primary side cap


BB51 VDDQ_BB47
VDDQ_BB51 S0 1.15V
VCCSA_AK23
AK23
AK25
Primary side cap
2+2 peak 5A
VCCSA_AK25
2+2 TPY 4A VCCSA_G23 G23
AM40 2+3e peak 5.1A G25
VDDQC VCCSA_G25 G27 C147 C148 C149 C150
2+3e TPY 5AVCCSA_G27
A18 G28 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4
VCCST S3 1.0V 120mA VCCSA_G28

Vinafix
C151 C152 C153 C154 J22
A22 VCCSA_J22 J23 +VCCSA
Remove (2016/11/07) 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4
VCCSTG_A22 1.0V 40mA VCCSA_J23 J27

+VDDQC
AL23 S0
VCCPLL_OC
VCCSA_J27
VCCSA_K23
K23
K25
Backside cap
K20 S0 1.0V 260mA VCCSA_K25 K27
Backside cap +1.2VSUS R121 *Short_0402 K21 VccPLL_K20
VccPLL_K21
VCCSA_K27
VCCSA_K28
K28
K30
C155
10u/6.3V_4
C156
10u/6.3V_4
C157
10u/6.3V_4
C158
10u/6.3V_4
C159
10u/6.3V_4
C160
10u/6.3V_4
C161
10u/6.3V_4
For 2+3e CPU Backside cap C162 C163
+1V_VCCST S3 1.0V 120mA VCCSA_K30
AM23 TP17
VCCIO_SENSE AM22 TP18
1u/6.3V_4 10u/6.3V_4
VSSIO_SENSE
H21
Backside cap
Remove (2016/11/07) +1V_SUS R122 *Short_0603 C164 +VCCSTG VSSSA_SENSE H20
VCCSA_SENSE R123 100_1%_4 C165 C166 C167 C168 C169 C170 C171
1u/6.3V_4
1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4
Primary side cap VSASS_SENSE 27
U@BGA1356P
14 OF 20 VSA_SENSE 27
A R124 *Short_0603 C172 A
+VCCIO

Backside cap 1u/6.3V_4


R125 100_1%_4
+VCCSA Primary side cap
+VCCPLL
C173 C174 C175 C176 C177 C178
+1V_SUS R126 *Short_0603 100 ohm near CPU 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4

C179
Primary side cap 1u/6.3V_4

Quanta Computer Inc.


PROJECT : ZAV
Size Document Number Rev
1A
Kabylake POWER/U42
Date: Wednesday, March 15, 2017 Sheet 5 of 34
5 4 3 2 1
5 4 3 2 1

KabyLake ULT (GPU, SATA , ODD, CLK ,USB2&3)

U1H KBY_U/R
06
SSIC / USB3
PCIE/USB3/SATA
H8
USB3_1_RXN G8
USB3_RXN1
USB3_RXP1
21
21
PCH PU/PD +3V_S5
H13 USB3_1_RXP C13
G13 PCIE1_RXN/USB3_5_RXN USB3_1_TXN D13
USB3_TXN1 21 MB/UB3
PCIE1_RXP/USB3_5_RXP USB3_1_TXP USB3_TXP1 21
B17
D
A17 PCIE1_TXN/USB3_5_TXN J6 USB_OC0# R127 10K_5%_4
D
PCIE1_TXP/USB3_5_TXP USB3_2_RXN/SSIC_RXN USB3_RXN2 13
H6 USB_OC1# R128 10K_5%_4
USB3_2_RXP/SSIC_RXP USB3_RXP2 13
G11 B13 USB3_TXN2 13 USB_OC2# R129 10K_5%_4
F11 PCIE2_RXN/USB3_6_RXN USB3_2_TXN/SSIC_TXN A13
PCIE2_RXP/USB3_6_RXP USB3_2_TXP/SSIC_TXP USB3_TXP2 13
D16
GPU C16 PCIE2_TXN/USB3_6_TXN J10
USB3_RXN3 13
Type - C
PCIE2_TXP/USB3_6_TXP USB3_3_RXN H10
USB3_3_RXP USB3_RXP3 13
H16 B15 USB3_TXN3 13
G16 PCIE3_RXN USB3_3_TXN A15 +3V
PCIE3_RXP USB3_3_TXP USB3_TXP3 13
D17
C17 PCIE3_TXN E10
PCIE3_TXP USB3_4_RXN F10
G15 USB3_4_RXP C15 DEVSLP0 R130 *10K_5%_4
F15 PCIE4_RXN USB3_4_TXN D15 DEVSLP1 R131 *10K_5%_4
B19 PCIE4_RXP USB3_4_TXP DEVSLP2 R132 *10K_5%_4
A19 PCIE4_TXN AB9 PIRQA# R133 10K_5%_4
PCIE4_TXP USB2N_1 USB2N1 21
AB10 MB/UB3
USB2P_1 USB2P1 21
14 PCIE5_RXN_LAN F16
E16 PCIE5_RXN AD6 SATAGP0 R134 *10K_5%_4
14 PCIE5_RXP_LAN PCIE5_RXP USB2N_2 USB2N2 13
LAN 14 PCIE5_TXN_LAN C180 0.1u/16V_4 PCIE5_TXN C19 AD7 USB2P2 13 TYPE-C SATAGP1 R748 *10K_5%_4
C181 0.1u/16V_4 PCIE5_TXP D19 PCIE5_TXN USB2P_2
14 PCIE5_TXP_LAN PCIE5_TXP AH3
USB2N_3 USB2N3 21
19 PCIE6_RXN_WLAN G18 AJ3 USB2P3 21 DB/UB2
F18 PCIE6_RXN USB2P_3
19 PCIE6_RXP_WLAN PCIE6_RXP
WIFI 19 PCIE6_TXN_WLAN C182 0.1u/16V_4 PCIE6_TXN D20 AD9 USB2N4 21
C184 0.1u/16V_4 PCIE6_TXP C20 PCIE6_TXN USB2N_4 AD10
19 PCIE6_TXP_WLAN PCIE6_TXP USB2P_4 USB2P4 21 DB/UB2
F20 AJ1 USB2N5 19
18 SATA_RXN0 E20 PCIE7_RXN/SATA0_RXN USB2N_5 AJ2
18 SATA_RXP0
B21 PCIE7_RXP/SATA0_RXP USB2P_5 USB2P5 19 BT
HDD 18 SATA_TXN0
A21 PCIE7_TXN/SATA0_TXN
USB2
AF6
18 SATA_TXP0 PCIE7_TXP/SATA0_TXP USB2N_6 AF7 USB2N6 15
G21 USB2P_6 USB2P6 15 Touch Screen
18 SATA_RXN1 F21 PCIE8_RXN/SATA1A_RXN AH1
18 SATA_RXP1 PCIE8_RXP/SATA1A_RXP USB2N_7 USB2N7 15
ODD D21 AH2 USB2P7 15 CCD
18 SATA_TXN1 PCIE8_TXN/SATA1A_TXN USB2P_7
C21
18 SATA_TXP1 PCIE8_TXP/SATA1A_TXP AF8
USB2N_8 USB2N8 18
C PCIE9_RXN E22 AF9 USB2P8 18 POA C
19 PCIE9_RXN E23 PCIE9_RXN USB2P_8
PCIE9_RXP
19 PCIE9_RXP PCIE9_RXP
PCIE9_TXN B23 AG1
19 PCIE9_TXN PCIE9_TXN USB2N_9
PCIE9_TXP A23 AG2
19 PCIE9_TXP PCIE9_TXP USB2P_9 Skylake-U userd 24 MHz (50 Ohm ESR) XTAL
PCIE10_RXN F25 AH7
19 PCIE10_RXN E25 PCIE10_RXN USB2N_10 AH8
PCIE10_RXP USBCOMP
19 PCIE10_RXP PCIE10_RXP USB2P_10
PCIE10_TXN D23 C183 U22@33p/50V_4
19 PCIE10_TXN
PCIE10_TXP C23 PCIE10_TXN AB6 USBCOMP R135 113_1%_4
Impedance = 50 ohm
19 PCIE10_TXP PCIE10_TXP USB2_COMP Trace length < 500 mils

R139
AG3 USB2_ID R136 1K_5%_4
USB2_ID

3
4
R137 100_1%_4 PCIE_RCOMPN F5 AG4 R138 1K_5%_4 Trace spacing = 15 mils
PCIE_RCOMPP E5 PCIE_RCOMPN USB2_VBUSSENSE Y1
PCIE_RCOMPP +3V_S5 A9 USB_OC0#
SSD XDP_PRDY# D56 GPP_E9/USB2_OC0# C9 USB_OC1#
USB_OC0# 21 MB/UB3 U22@24MHZ/20ppm
TP19 +3V_S5 USB_OC1# 21 DB/UB2
PROC_PRDY# GPP_E10/USB2_OC1#

U22@1M_5%_4
TP20 XDP_PREQ# D61 +3V_S5 D9 USB_OC2# Type-C
USB_OC2# 13

1
2
PIRQA# BB11 PROC_PREQ# GPP_E11/USB2_OC2# B9 EMMC_RST XTAL24_IN
GPP_A7/PIRQA#
+3V_S5 +3V_S5 GPP_E12/USB2_OC3# EMMC_RST 21 eMMC XTAL24_OUT C185 U22@33p/50V_4

0.1u/16V_4

0.1u/16V_4

0.1u/16V_4

0.1u/16V_4
PCIE11_RXN E28 +3V_S5 J1 DEVSLP0 DEVSLP0 18
19 PCIE11_RXN PCIE11_RXN/SATA1B_RXN GPP_E4/DEVSLP0
PCIE11_RXP E27 J2 DEVSLP1
19 PCIE11_RXP
PCIE11_TXN D24 PCIE11_RXP/SATA1B_RXP +3V_S5 GPP_E5/DEVSLP1 J3 DEVSLP2
19 PCIE11_TXN PCIE11_TXN/SATA1B_TXN +3V_S5 GPP_E6/DEVSLP2 DEVSLP2 19
PCIE11_TXP C24
19 PCIE11_TXP E30 PCIE11_TXP/SATA1B_TXP H2
PCIE12_RXN SATAGP0 Near CPU
19 PCIE12_RXN
F30 PCIE12_RXN/SATA2_RXN +3V_S5 GPP_E0/SATAXPCIE0/SATAGP0 H3

C831

C830

C829

C828
PCIE12_RXP SATAGP1
19 PCIE12_RXP PCIE12_RXP/SATA2_RXP +3V_S5 GPP_E1/SATAXPCIE1/SATAGP1
PCIE12_TXN A25 G4 R140 *Short_0402
19 PCIE12_TXN B25 PCIE12_TXN/SATA2_TXN +3V_S5 GPP_E2/SATAXPCIE2/SATAGP2 NGFF3_DET 19
PCIE12_TXP
19 PCIE12_TXP PCIE12_TXP/SATA2_TXP H1
+3V_S5 GPP_E8/SATALED#

RTC Clock 32.768KHz (CPU)


U@BGA1356P
8 OF 20
C186 10p/50V_4 RTC_X1

1
Trace length < 1000 mils R141
Y2 10M_5%_4
32.768KHZ/20ppm
U1J KBY_U/R
B B
C187 10p/50V_4 RTC_X2

2
CLOCK SIGNALS

D42
SSD VGA

C42 CLKOUT_PCIE_N0
TP85 CLK_PCIE_REQ0# AR10 CLKOUT_PCIE_P0
GPP_B5/SRCCLKREQ0# +3V_S5
19 CLK_PCIE_NGFF1_N B42 RTC Circuitry (RTC)
CLKOUT_PCIE_N1
M.2

A42 F43 CLK_PCIE_XDPN TP22


19 CLK_PCIE_NGFF1_P CLKOUT_PCIE_P1 CLKOUT_ITPXDP_N
19 PCIE_CLKREQ_NGFF1# R143 *Short_0402 CLK_PCIE_REQ1# AT7 E43 CLK_PCIE_XDPP TP23
GPP_B6/SRCCLKREQ1# +3V_S5 CLKOUT_ITPXDP_P
D41 BA17 SUSCLK
CLKOUT_PCIE_N2 +3V_S5 GPD8/SUSCLK SUSCLK 19 +3VPCU
C41
TP24 CLK_PCIE_REQ2# AT8 CLKOUT_PCIE_P2 E37 XTAL24_IN
GPP_B7/SRCCLKREQ2# +3V_S5 colay XTAL24_IN/NC E35 XTAL24_OUT
D40
C40 CLKOUT_PCIE_N3 KBY-U/RXTAL24_OUT/NC E42 XCLK_BIASREF R144 2.7K_1%_4
On SKL voltage at VCCRTC does not exceed 3.2V
CLKOUT_PCIE_P3 XCLK_BIASREF +1V_S5
TP25 CLK_PCIE_REQ3# AT10 R145
GPP_B8/SRCCLKREQ3# +3V_S5 AM18 RTC_X1
RTCX1 1.5K_1%_4
+3V_RTC
+3V_RTC
B40 AM20 RTC_X2
LAN

14 CLK_PCIE_LANN
A40 CLKOUT_PCIE_N4 RTCX2 D1 Trace width = 30 mils
14 CLK_PCIE_LANP CLKOUT_PCIE_P4
R146 *Short_0402 CLK_PCIE_REQ4# AU8 AN18 SRTC_RST# +3V_RTC_2 2 R147
14 CLK_PCIE_LAN_REQ# GPP_B9/SRCCLKREQ4# +3V_S5 SRTCRST# AM16 RTC_RST# 3 RTC_RST#
E40 RTCRST# R148 1K_5%_4 +3V_RTC_1 1
WLAN

19 CLK_PCIE_WLANN CLKOUT_PCIE_N5 VCCRTC_2

1
19 CLK_PCIE_WLANP E38 20K_1%_4
R149 *Short_0402 CLK_PCIE_REQ5# AU7 CLKOUT_PCIE_P5 R150 +3V_RTC_[0:2]
19 PCIE_CLKREQ_WLAN# GPP_B10/SRCCLKREQ5# +3V_S5 1V power plane 45.3K_1%_4 Trace width = 20 mils
BAT54CW C188 J1
*JUMP
0.71 checklist p14 1u/6.3V_4

2
1
R151
SRTC_RST#

+
U@BGA1356P 3 4
10 OF 20
20K_1%_4
53014-00201-V09

-
CN19 C189 C190

2
+3V add for EC reset RTC 1u/6.3V_4 1u/6.3V_4

A SRTC_RST# RTC_RST# A

CLK_PCIE_REQ0# R152 10K_5%_4


CLK_PCIE_REQ1# R153 10K_5%_4
CLK_PCIE_REQ2# R154 *10K_5%_4
3

CLK_PCIE_REQ3# R155 *10K_5%_4


CLK_PCIE_REQ4# R156 10K_5%_4 2 Q4 CLR_CMOS 2 Q5
22 CLR_CMOS
CLK_PCIE_REQ5# R157 10K_5%_4 *2N7002K 2N7002K
1

R158
100K_5%_4 Quanta Computer Inc.
PROJECT : ZAV
Size Document Number Rev
1A
Kabylake PCIe/USB/CLK/SAT
Date: Wednesday, March 15, 2017 Sheet 6 of 34
5 4 3 2 1
5 4 3 2 1

U1E
SPI - FLASH
KBY_U/R

SMBUS, SMLINK Strapping


07
PCH_SPI_CLK AV2 +3V_S5 R7 PCH_MBCLK0_R
PCH_SPI_SO AW3 SPI0_CLK GPP_C0/SMBCLK R8 PCH_MBDAT0_R
D
PCH_SPI_SI AV3 SPI0_MISO +3V_S5 GPP_C1/SMBDATA R10 SMBALERT# D
SPI0_MOSI +3V_S5 GPP_C2/SMBALERT# SMBALERT# 4
PCH_SPI_IO2 AW2
PCH_SPI_IO3 AU4 SPI0_IO2 +3V_S5 R9 VGA_MBCLK
PCH_SPI_CS0# AU3 SPI0_IO3 +3V_S5 GPP_C3/SML0CLK W2 VGA_MBDATA +3V_S5
AU2 SPI0_CS0# +3V_S5 GPP_C4/SML0DATA W1 SML0ALERT#
SPI0_CS1# GPP_C5/SML0ALERT# SML0ALERT# 4
AU1 +3V_S5
SPI0_CS2# W3 SMB_ME1_CLK CLKRUN# R159 8.2K_1%_4
+3V_S5 GPP_C6/SML1CLK V3 SMB_ME1_DAT IRQ_SERIRQ R160 10K_5%_4
SPI - TOUCH +3V_S5 GPP_C7/SML1DATA AM7 SMB1ALERT# EC_RCIN# R161 10K_5%_4
M2 +3V_S5 +3V_S5 GPP_B23/SML1ALERT#/PCHHOT# TP94
M3 GPP_D1/SPI1_CLK +3V_S5
J4 GPP_D2/SPI1_MISO +3V_S5
V1 GPP_D3/SPI1_MOSI
GPP_D21/SPI1_IO2
+3V_S5 ckl v0.71 p.24
V2 +3V_S5
M1 GPP_D22/SPI1_IO3 AY13 R162 *Short_0402 +3V_S5
LPC
GPP_D0/SPI1_CS# +3V_S5 +3V_S5 GPP_A1/LAD0/ESPI_IO0 BA13 R163 *Short_0402
LPC_LAD0 18,19,22
+3V_S5 GPP_A2/LAD1/ESPI_IO1 BB13 R164 *Short_0402
LPC_LAD1 18,19,22 SMBus
C LINK +3V_S5 GPP_A3/LAD2/ESPI_IO2 LPC_LAD2 18,19,22
AY12 R165 *Short_0402
G3 +3V_S5 GPP_A4/LAD3/ESPI_IO3 BA12 LPC_LAD3 18,19,22
LPC_LFRAME# 18,19,22 PCH_MBCLK0_R R166 2.2K_5%_4
G2 CL_CLK GPP_A5/LFRAME#/ESPI_CS#
+3V_S5GPP_A14/SUS_STAT#/ESPI_RESET# BA11 R167 *0_5%_4 PCH_MBDAT0_R R168 2.2K_5%_4
For M.2 wifi module must CL_DATA
G1 +3V_S5 C191 *0.1u/16V_4 TP26 VGA_MBDATA R169 2.2K_5%_4
CL_RST# VGA_MBCLK R170 2.2K_5%_4
AW9 R171 22_5%_4 CLK_PCI_EC 22
R172 *Short_0402 EC_RCIN# AW13 +3V_S5 GPP_A9/CLKOUT_LPC0/ESPI_CLK AY9 R173 22_5%_4
22 SIO_RCIN# GPP_A0/RCIN# +3V_S5 +3V_S5 GPP_A10/CLKOUT_LPC1 PCLK_TPM 18 +3V_S5
AW11 R174 22_5%_4 CLK_PCI_LPC 19
IRQ_SERIRQ AY11 +3V_S5 GPP_A8/CLKRUN# CLKRUN#
18,22 IRQ_SERIRQ GPP_A6/SERIRQ +3V_S5 CLKRUN# 18,22
C812 C811 SMB1ALERT# R175 *150K_5%_4
U@BGA1356P *10p/50V_4 *10p/50V_4
C C
5 OF 20

Termination Resistor Requirement for PCH PCHHOT# Pin


Reserve PU 150K resister
PCH SPI ROM(8M)
15ohm CS01502JB12 R176 *0_5%_6
+3V_LDO_EC
33ohm CS03302JB29 R177 *Short_0603 +3V
+3V_S5 +3V_PCH_ME +3V_PCH_ME
Change to 2.2k
U3
C192 0.1u/16V_4
1A-13 PCH_SPI_CS0# 1 8
PCH_SPI_CLK_EC CS VCC
22 PCH_SPI_CLK_EC
22 PCH_SPI_SI_EC
PCH_SPI_SI_EC
PCH_SPI_SO_EC
PCH_SPI_SO
PCH_SPI_SO_EC
R178
R181
15_5%_4
15_5%_4
SPI_SO_8M 2
IO1/DO IO3/HOLD
7 SPI_HOLD_IO3_ME R182 1K_5%_4 SMBus(PCH) R179
2.2K_5%_4
R180
2.2K_5%_4
22 PCH_SPI_SO_EC S5 S0

5
3 6 SPI_CLK_8M R183 15_5%_4 PCH_SPI_CLK
IO2/WP CLK
5 SPI_SI_8M R184 15_5%_4 PCH_SPI_SI PCH_MBDAT0_R 3 4 CLK_SDATA 11,20
4 IO0/DI Q6A
GND
2N7002KDW
C193

2
W25Q64FVSSIQ
*22p/50V_4
PCH_SPI_CLK_EC R185 15_5%_4
PCH_SPI_SI_EC R186 15_5%_4 PCH_MBCLK0_R 6 1
CLK_SCLK 11,20
Q6B
R187 1K_5%_4 SPI_WP_IO2_ME
SP@ socket P/N: DFHS08FS023 only for A-TEST +3V_PCH_ME 2N7002KDW
B B

SPI ROM Vender Size Quanta P/N Vender P/N PCH_SPI_IO2 R188 15_5%_4 SPI_WP_IO2_ME PCH_XDP_WLAN/S5 DDR_TP/S0
3.3K is original and for no
WND 8M AKE3EFP0N07 W25Q64FVSSIQ support fast read function
Skylake PCH_SPI_IO3 SPI_HOLD_IO3_ME
reserve for SPI fast read
GGD AKE2EZN0Q00 GD25B64CSIGR R189 15_5%_4
3.3V 8M
SMBus(EC)
WND 16M AKE3DZN0N01 W25Q128FVSIQ
Kabylake
3.3V GGD 16M AKE3DF00Q00 GD25B128CSIGR PCH_SPI_CS0# 2ND_MBCLK
22 SPI_CS0#_UR_ME R190 *Short_0402 22 2ND_MBCLK R191 *Short_0402 SMB_ME1_CLK
22 2ND_MBDATA 2ND_MBDATA R192 *Short_0402 SMB_ME1_DAT

only 0ohm option


+3V_PCH_ME
EC/S5
R193 10K_5%_4 SPI_CS0#_UR_ME

A A

Quanta Computer Inc.


PROJECT : ZAV
Size Document Number Rev
1A
Kabylake SPI
Date: Wednesday, March 15, 2017 Sheet 7 of 34
5 4 3 2 1
5 4 3 2 1

22 RSMRST# R194
PCI_PLTRST#

SYS_RESET#

*Short_0402 PCH_RSMRST#
U1K KBY_U/R

SYSTEM POWER MANAGEMENT


AT11 SUS0# SUS0# 25
08
R195 10K_5%_4 +3V_S5 GPP_B12/SLP_S0# AP15 SUSB#
GPD4/SLP_S3# SUSB# 22,25
+VCCIO AN10 +3V_S5 BA16 SUSC# +3V
B5 GPP_B13/PLTRST# +3V_S5 +3V_S5 GPD5/SLP_S4# AY16 PCH_SLP_S5#
SUSC# 22
Reserve PU 10K SYS_RESET# GPD10/SLP_S5#
AY17 +3V_S5 TP27 SYS_RESET# R196 10K_5%_4
VCCST_PWRGD RSMRST# AN15 PCH_SLP_SUS# TP28
R197 *10K_5%_4 PROC_PWRGD PROC_PWRGD A68
I SLP_SUS# AW15 PCH_SLP_LAN# TP29
Near CPU
C827 0.1u/16V_4 B65 PROCPWRGD I SLP_LAN# BB17 PCH_SLP_WLAN# TP30
EC_PWROK R198 *Short_0402 VCCST_PWRGD +3V_S5 GPD9/SLP_WLAN# AN16 PCH_SLP_A# TP31
D
SYS_PWROK_R B6 +3V_S5 GPD6/SLP_A# D

R199 *0_5%_4 EC_PWROK_R BA20 SYS_PWROK BA15 PCH_PWRBTN# R200 *Short_0402 +3V_S5
PCH_PWROK +3V_S5 GPD3/PWRBTN# DNBSWON# 22
DPWROK_R BB20 AY15 PCH_ACPRESENT R201 *Short_0402 SB_ACDC 22
DSW_PWROK +3V_S5 GPD1/ACPRESENT AU13 PCH_BATLOW# PCH_ACPRESENT R202 8.2K_1%_4
R203 *0_5%_4 PCH_SUSPWRDNACK_C AR13 +3V_S5 GPD0/BATLOW# TP33 TP32 PCH_BATLOW# R204 8.2K_1%_4
22 PCH_SUSPWRDNACK GPP_A13/SUSWARN#/SUSPWRDNACK +3V_S5
EC only PD, so PD 10K SUSACK#_R AP11
TP34 GPP_A15/SUSACK# +3V_S5 AU11 PCIE_LAN_WAKE# R206 10K_5%_4
PCIE_LAN_WAKE# BB15 +3V_S5 GPP_A11/PME# AP16 INTRUDER# R205 1M_5%_4
14,19 PCIE_LAN_WAKE# WAKE# INTRUDER# +3V_RTC
PCH_SUSPWRDNACK_C AM15 MPHY_EXT_PWR R207 *1K_5%_4
TP35 AW17 GPD2/LAN_WAKE# +3V_S5 AM10 MPHY_EXT_PWR
AT15 GPD11/LANPHYPC +3V_S5 +3V_S5 GPP_B11/EXT_PWR_GATE# AM11 PCH_VRALERT# TP36 PCH_VRALERT# R208 10K_5%_4
GPD7/RSVD +3V_S5 GPP_B2/VRALERT#
+3V_S5
R209
10K_5%_4 12/25 Change R206 pull-up to +3V_S5
U@BGA1356P
11 OF 20
PCH_RSMRST# R210 10K_5%_4
PCH_PWROK R211 10K_5%_4
U1I KBY_U/R
SYS_PWROK_R R212 10K_5%_4

CSI-2

A36 C37
B36 CSI2_DN0 CSI2_CLKN0 D37
CSI2_DP0 CSI2_CLKP0 REV:E tPLT15(max 200us)
C38 C32
D38 CSI2_DN1 CSI2_CLKN1 D32
->SLP_S4# assertion to
C36 CSI2_DP1 CSI2_CLKP1 C29 VDDQ(+1.35VSUS) ramp
D36 CSI2_DN2 CSI2_CLKN2 D29 down start(SUSON) +3V_S5
A38 CSI2_DP2 CSI2_CLKP2 B26
B38 CSI2_DN3 CSI2_CLKN3 A26
CSI2_DP3 CSI2_CLKP3 C194 *0.1u/16V_4
12/28 Delete U12/C361 & Add R695
C31 E13 R213 100_1%_4 3/21 Add U12/C361 & Delete R695
CSI2_DN4 CSI2_COMP

5
D31 B7
C33 CSI2_DP4 +3V_S5 GPP_D4/FLASHTRIG TP37 1 SUSC#
D33 CSI2_DN5 SUSON_R 4
A31 CSI2_DP5 EMMC 25,26 SUSON_R 2 SUSON
CSI2_DN6 SUSON 22
B31 AP2
CSI2_DP6 +1.8V_S5 GPP_F13/EMMC_DATA0 EMMC_DATA_0 21
C A33 AP1 EMMC_DATA_1 21 U4 C

3
B33 CSI2_DN7 +1.8V_S5 GPP_F14/EMMC_DATA1 AP3 *MC74VHC1G08DFT2G
CSI2_DP7 +1.8V_S5 GPP_F15/EMMC_DATA2 EMMC_DATA_2 21
AN3 EMMC_DATA_3 21
A29 +1.8V_S5 GPP_F16/EMMC_DATA3 AN1
CSI2_DN8 +1.8V_S5 GPP_F17/EMMC_DATA4 EMMC_DATA_4 21
B29 AN2 R637 *Short_0402
CSI2_DP8 +1.8V_S5 GPP_F18/EMMC_DATA5 EMMC_DATA_5 21
C28 AM4 EMMC_DATA_6 21
D28 CSI2_DN9 +1.8V_S5 GPP_F19/EMMC_DATA6 AM1
CSI2_DP9 +1.8V_S5 GPP_F20/EMMC_DATA7 EMMC_DATA_7 21
A27
B27 CSI2_DN10 AM2
C27 CSI2_DP10 +1.8V_S5 GPP_F21/EMMC_RCLK AM3 EMMC_RCLK 21
CSI2_DN11 +1.8V_S5 GPP_F22/EMMC_CLK EMMC_CLK 21
D27 AP4
CSI2_DP11 +1.8V_S5 GPP_F12/EMMC_CMD EMMC_CMD 21
AT1 R215 200_1%_4
EMMC_RCOMP
12/28 Delete U14/R245/C372 & Change "MAINON_R" to "MAINON"
U@BGA1356P +3V_S5
9 OF 20
REV:E tPLT17(max
200us) ->SLP_S3# C195 *0.1u/16V_4
assertion to IMVP
VR_ON(VRON) deassertion

5
1 SUSB#
4 12/28 Change from "SUSB#" to "MAINON"
27 VRON_R 2 VRON VRON 22
1/28 Change from "MAINON" to "SUSB#"
U5

3
*MC74VHC1G08DFT2G

R638 *Short_0402

B B

Power Sequence
Non Deep Sx
22 PCH_PWROK R217 *Short_0402 EC_PWROK_R

B2A
S0->S5 & S0->S3
For platforms not supporting Deep Power of sequence 1us
Sx, connect directly to RSMRST# No Deep Sx SUSB# -> VCCST_PWRGD
VCCST PWRGD CRB is via +1.05V PG +3V_S5
DPWROK_R R218 *Short_0402 PCH_RSMRST#

+3V_S5 U6 C196 0.1u/16V_4


+1V_VCCST
Remove
5 VCC NC 1

5
R219 C197 1 SUSB#
1K_5%_4 0.1u/16V_4 A 2 VCCST_PWRGD_EN_L 4
Close to CPU 2VCCST_PWRGD_EN

VCCST_PWRGD VCCST_PWRGD_R 4 Y GND 3 U7

3
R220 60.4_1%_4 C198 C199 MC74VHC1G08DFT2G
*1000p/50V_4 *1000p/50V_4
C200 74AUP1G07GW
1000p/50V_4
+3V
SYSPWOK Shortpad change
R221 *0_5%_4
PLTRST# Buffer to 60.4 ohm. 11/6
C201 0.1u/16V_4 Stuff 1000P/50V
R222 *0_5%_4 PCH_PWROK
5

R223 *0_5%_4 IMVP_PWRGD_3V 2 VCCST_PWRGD_EN R224 *Short_0402 HWPG HWPG 22 Reserve 1000P/50V
1
4
Rev:D change netmane for HWPG
PLTRST# 14,18,19,21,22 1A-6 2013/10/21 Del APWORK.
A PCI_PLTRST# 2 A
EC_PWROK EC_PWROK 22
U8 R225 R1 C824
3

MC74VHC1G08DFT2G 100K_5%_4
*10_5%_4 0.1u/16V_4
Reserved for ESD

R226
*10K_5%_4

Quanta Computer Inc.


PROJECT : ZAV
Size Document Number Rev
1A
Kabylake PM/eMMC
Date: Wednesday, March 15, 2017 Sheet 8 of 34
5 4 3 2 1
5 4 3 2 1

KBY_U/R
VCCPRIM_1P0 & VCCPRIM_CORE Short GPIO Group Power Plane 09
U1S
KBY_U/R
U1O C208 *1u/6.3V_4
RESERVED SIGNALS-1 C202 1u/6.3V_4
CPU POWER 4 OF 4
C203 1u/6.3V_4
E68 BB68 AB19 C209 *1u/6.3V_4
CFG[0] RSVD_TP_BB68 +1V_S5 VCCPRIM_1P0_AB19
D B67 BB69 AB20 AK15 +VCCPGPPA R227 *Short_0603 D
CFG[1] RSVD_TP_BB69 VCCPRIM_1P0_AB20 VCCPGPPA +3V_S5
D65 C204 1u/6.3V_4 P18 2.899A AG15 +VCCPGPPB R230 *Short_0603
CFG[2] VCCPRIM_1P0_P18 VCCPGPPB +3V_S5
D67 AK13 Y16 +VCCPGPPC R231 *Short_0603
CFG[3] RSVD_TP_AK13 VCCPGPPC +3V_S5
CFG4 E70 AK12 TP38 AF18 Y15 +VCCPGPPD R243 *Short_0603
CFG[4] RSVD_TP_AK12 +1V_S5 VCCPRIM_CORE_AF18 VCCPGPPD +3V_S5
C68 Rev:F reserve TP C205 1u/6.3V_4 AF19 T16 +VCCPGPPE R232 *Short_0603
CFG[5] VCCPRIM_CORE_AF19 VCCPGPPE +3V_S5
D68 BB2 C834 22u/6.3V_6 V20 2.57A AF16 +VCCPGPPF R233 *Short_0603
CFG[6] RSVD_BB2 VCCPRIM_CORE_V20 VCCPGPPF +1.8V_S5
C67 BA3 C206 22u/6.3V_6 V21 AD15 +VCCPGPPG R229 *Short_0603
CFG[7] RSVD_BA3 VCCPRIM_CORE_V21 VCCPGPPG +3V_S5
F71 C210 1u/6.3V_4
G69 CFG[8] C207 1u/6.3V_4 +VCCDSW_1P0AL1 V19 +VCCPRIM_3P3 C211 *1u/6.3V_4
F70 CFG[9] AU5 DCPDSW _1p0 VCCPRIM_3P3_V19 C837 0.1u/16V_4
G68 CFG[10] TP5 AT5 K17 T1
CFG[11] TP6 +1V_S5 VCCMPHYAON_1P0_K17 VCCPRIM_1P0_T1 +1V_S5
H70 C212 1u/6.3V_4 C213 1u/6.3V_4 L1 C214 1u/6.3V_4
G71 CFG[12] VCCMPHYAON_1P0_L1 AA1 +VCCATS_1P8 R234 *Short_0603
CFG[13] VCCATS_1p8 +1.8V_S5
H69 D5 N15 R235 *Short_0603
CFG[14] RSVD_D5 +1V_S5 VCCMPHYGT_1P0_N15 +3V_S5
G70 D4 C215 1u/6.3V_4 N16 AK17 +VCCPRTCPRIM_3P3 C216 0.1u/16V_4
CFG[15] RSVD_D4 B2 N17 VCCMPHYGT_1P0_N16 VCCRTCPRIM_3p3 C217 1u/6.3V_4
RSVD_B2 VCCMPHYGT_1P0_N17 1.714A
E63 C2 C218 47u/6.3V_8 P15 AK19 +VCCPRTC R236 *Short_0603
CFG[16] RSVD_C2 VCCMPHYGT_1P0_P15 VCCRTC_AK19 +3V_RTC
F63 P16 BB14 C219 1u/6.3V_4
CFG[17] B3 VCCMPHYGT_1P0_P16 VCCRTC_BB14 C220 0.1u/16V_4
E66 RSVD_B3 A3 K15 BB10 DCPRTC C221 0.1u/16V_4
F66 CFG[18] RSVD_A3 C222 1u/6.3V_4 L15 VCCAMPHYPLL_1P0_K15 DCPRTC
CFG[19] AW 1 VCCAMPHYPLL_1P0_L15 A14
RSVD_AW 1 VCCCLK1 +1V_S5
R237 49.9_1%_4 CFG_RCOMP E60 V15 0.03A
CFG_RCOMP +1V_S5 VCCAPLL_1P0
E1 C832 0.1u/16V_4 K19
R639 1.5K_1%_4 E8 RSVD_E1 E2 AB17 VCCCLK2 C223 *1u/6.3V_4
+1V_S5 ITP_PMODE RSVD_E2 +1V_S5 VCCPRIM_1P0_AB17
C224 *1u/6.3V_4 Y18 L21
AY2 BA4 C833 0.1u/16V_4 VCCPRIM_1P0_Y18 VCCCLK3
AY1 RSVD_AY2 RSVD_BA4 BB4 R239 *0_5%_6 AD17 N20
RSVD_AY1 RSVD_BB4 +3VPCU VCCDSW _3P3_AD17 VCCCLK4
R640 *Short_0603 AD18 0.09A
+3V_S5 VCCDSW _3P3_AD18
D1 A4 *0.1u/16V_4 C225 AJ17 L19
C D3 RSVD_D1 RSVD_A4 C4 R641 *Short_0603 VCCDSW _3P3_AJ17 VCCCLK5 C
RSVD_D3 RSVD_C4 +3V
R642 *0_5%_6 +VCCHDA AJ19 A10
+1.5V VCCHDA VCCCLK6
K46 BB5 1u/6.3V_4 C226 C227 1u/6.3V_4
K45 RSVD_K46 TP4 AJ16 AN11 V0P85A_VID0
RSVD_K45 A69 R643 *Short_0603 +VCCPSPI VCCSPI GPP_B0/CORE_VID0 AN13 TP39
RSVD_A69 +3V_S5 GPP_B1/CORE_VID1
AL25 B69 AF20
AL27 RSVD_AL25 RSVD_B69 AF21 VCCSRAM_1P0_AF20
RSVD_AL27 +1V_S5 VCCSRAM_1P0_AF21
AY3 R244 *Short_0402 T19
C71 RSVD_AY3 C228 1u/6.3V_4 T20 VCCSRAM_1P0_T19
B70 RSVD_C71 D71 VCCSRAM_1P0_T20
RSVD_B70 RSVD_D71 C70 R245 *Short_0603 +VCCPRIM_3P3 AJ21
RSVD_C70 +3V_S5 VCCPRIM_3P3_AJ21
F60 C229 1u/6.3V_4
RSVD_F60 C54 AK20
RSVD_C54 +1V_S5 VCCPRIM_1P0_AK20
A52 D54
RSVD_A52 RSVD_D54 N18
BA70 AY4 +1V_S5 VCCAPLLEBB_1P0
C230 1u/6.3V_4
BA68 RSVD_TP_BA70 TP1 BB3
RSVD_TP_BA68 TP2 C836 0.1u/16V_4
J71 AY71 R246 *Short_0402 U@BGA1356P
RSVD_J71 VSS_AY71 15 OF 20
J68 AR56
RSVD_J68 ZVM#
R779 U42@0_5%_4 F65 AW 71
R780 U42@0_5%_4 G65 VSS_F65 RSVD_TP_AW 71 AW 70
VSS_G65 RSVD_TP_AW 70 For 2+3e CPU No Stuff
F61 AP56 TP40
E61 RSVD_F61 MSM# C64 R248 100K_5%_4 Remove (2016/11/07)
RSVD_E61 PROC_SELECT#

+1V_VCCST
B U@BGA1356P B
19 OF 20

Pin Name Strap description Configuration Note


1 = *Normal Operation; No stall (iPU 3K)
CFG[0] Stall reset sequence after PCU PLL lock until de-asserted
0 = Stall

CFG[1] Reserved Configuration lane

1 = *Normal Operation(iPU 3K)


CFG[2] PCI Express* Static x16 Lane Numbering Reversal H & S processor used only
0 = Lan number reversed

CFG[3] Reserved Configuration lane

1 = Disabled (iPU 3K) CFG4


CFG[4] eDP enable R249 1K_5%_4
0 = *Enabled

00 = 1x8, 2x4 PCI Express*


01 = reserved
CFG[6:5] PCI Express* Bifunction H & S processor used only
A 10 = 2x8 PCI Express* A

11 = 1x16 PCI Express*


1 = *PEG Train immediatedly follow
CFG[7] PEG Training RESET# de-assertion (iPU 3K)
H & S processor used only
0 = PEG wait for BIOS for training
Quanta Computer Inc.
CFG[19:8] Reserved Configuration lane PROJECT : ZAV
Size Document Number Rev
1A
Kabylake POWER
Date: Wednesday, March 15, 2017 Sheet 9 of 34
5 4 3 2 1
5 4 3 2 1

KabyLake ULT (GND) 10


U1P KBY_U/R U1Q KBY_U/R U1R KBY_U/R U1T KBY_U/R
D D
GND 1 OF 3 GND 2 OF 3 GND 3 OF 3 SPARE

A5 AL65 AT63 BA49 F8 L18 AW69 F6


A67 VSS_A5 VSS_AL65 AL66 AT68 VSS_AT63 VSS_BA49 BA53 G10 VSS_F8 VSS_L18 L2 AW68 RSVD_AW69 RSVD_F6 E3 XTAL24_IN_E3
A70 VSS_A67 VSS_AL66 AM13 AT71 VSS_AT68 VSS_BA53 BA57 G22 VSS_G10 VSS_L2 L20 AU56 RSVD_AW68 RSVD/XTAL24_IN C11
AA2 VSS_A70 VSS_AM13 AM21 AU10 VSS_AT71 VSS_BA57 BA6 G43 VSS_G22 VSS_L20 L4 AW48 RSVD_AU56 RSVD_C11 B11
AA4 VSS_AA2 VSS_AM21 AM25 AU15 VSS_AU10 VSS_BA6 BA62 G45 VSS_G43 VSS_L4 L8 XTAL24_OUT_C7 C7 RSVD_AW48 RSVD_B11 A11
AA65 VSS_AA4 VSS_AM25 AM27 AU20 VSS_AU15 VSS_BA62 BA66 G48 VSS_G45 VSS_L8 N10 R250 *0_5%_4 U12 RSVD/XTAL24_OUT RSVD_A11 D12
VSS_AA65 VSS_AM27 VSS_AU20 VSS_BA66 VSS_G48 VSS_N10 +1.8V_S5 RSVD_U12 RSVD_D12
AA68 AM43 AU32 BA71 G5 N13 U11 colay C12
AB15 VSS_AA68 VSS_AM43 AM45 AU38 VSS_AU32 VSS_BA71 BB18 G52 VSS_G5 VSS_N13 N19 H11 RSVD_U11 RSVD_C12 F52
AB16 VSS_AB15 VSS_AM45 AM46 AV1 VSS_AU38 VSS_BB18 BB26 G55 VSS_G52 VSS_N19 N21 RSVD_H11 KBY-U/R RSVD_F52
AB18 VSS_AB16 VSS_AM46 AM55 AV68 VSS_AV1 VSS_BB26 BB30 G58 VSS_G55 VSS_N21 N6 C231
AB21 VSS_AB18 VSS_AM55 AM60 AV69 VSS_AV68 VSS_BB30 BB34 G6 VSS_G58 VSS_N6 N65
AB8 VSS_AB21 VSS_AM60 AM61 AV70 VSS_AV69 VSS_BB34 BB38 G60 VSS_G6 VSS_N65 N68 *1u/6.3V_4
AD13 VSS_AB8 VSS_AM61 AM68 AV71 VSS_AV70 VSS_BB38 BB43 G63 VSS_G60 VSS_N68 P17 U@BGA1356P
AD16 VSS_AD13 VSS_AM68 AM71 AW10 VSS_AV71 VSS_BB43 BB55 G66 VSS_G63 VSS_P17 P19 20 OF 20
AD19 VSS_AD16 VSS_AM71 AM8 AW12 VSS_AW10 VSS_BB55 BB6 H15 VSS_G66 VSS_P19 P20
AD20 VSS_AD19 VSS_AM8 AN20 AW14 VSS_AW12 VSS_BB6 BB60 H18 VSS_H15 VSS_P20 P21
AD21 VSS_AD20 VSS_AN20 AN23 AW16 VSS_AW14 VSS_BB60 BB64 H71 VSS_H18 VSS_P21 R13
AD62 VSS_AD21 VSS_AN23 AN28 AW18 VSS_AW16 VSS_BB64 BB67 J11 VSS_H71 VSS_R13 R6
AD8 VSS_AD62 VSS_AN28 AN30 AW21 VSS_AW18 VSS_BB67 BB70 J13 VSS_J11 VSS_R6 T15
AE64 VSS_AD8 VSS_AN30 AN32 AW23 VSS_AW21 VSS_BB70 C1 J25 VSS_J13 VSS_T15 T17
AE65 VSS_AE64 VSS_AN32 AN33 AW26 VSS_AW23 VSS_C1 C25 J28 VSS_J25 VSS_T17 T18
Reserve 1uF no stuff in CPU U11,U12 ball
C
AE66 VSS_AE65 VSS_AN33 AN35 AW28 VSS_AW26 VSS_C25 C5 J32 VSS_J28 VSS_T18 T2 support Cannonlake-U PCH C

AE67 VSS_AE66 VSS_AN35 AN37 AW30 VSS_AW28 VSS_C5 D10 J35 VSS_J32 VSS_T2 T21
AE68 VSS_AE67 VSS_AN37 AN38 AW32 VSS_AW30 VSS_D10 D11 J38 VSS_J35 VSS_T21 T4
AE69 VSS_AE68 VSS_AN38 AN40 AW34 VSS_AW32 VSS_D11 D14 J42 VSS_J38 VSS_T4 U10
AF1 VSS_AE69 VSS_AN40 AN42 AW36 VSS_AW34 VSS_D14 D18 J8 VSS_J42 VSS_U10 U63
AF10 VSS_AF1 VSS_AN42 AN58 AW38 VSS_AW36 VSS_D18 D22 K16 VSS_J8 VSS_U63 U64
AF15 VSS_AF10 VSS_AN58 AN63 AW41 VSS_AW38 VSS_D22 D25 K18 VSS_K16 VSS_U64 U66
AF17 VSS_AF15 VSS_AN63 AP10 AW43 VSS_AW41 VSS_D25 D26 K22 VSS_K18 VSS_U66 U67
AF2 VSS_AF17 VSS_AP10 AP18 AW45 VSS_AW43 VSS_D26 D30 K61 VSS_K22 VSS_U67 U69
AF4 VSS_AF2 VSS_AP18 AP20 AW47 VSS_AW45 VSS_D30 D34 K63 VSS_K61 VSS_U69 U70
AF63 VSS_AF4 VSS_AP20 AP23 AW49 VSS_AW47 VSS_D34 D39 K64 VSS_K63 VSS_U70 V16
AG16 VSS_AF63 VSS_AP23 AP28 AW51 VSS_AW49 VSS_D39 D44 K65 VSS_K64 VSS_V16 V17
AG17 VSS_AG16 VSS_AP28 AP32 AW53 VSS_AW51 VSS_D44 D45 K66 VSS_K65 VSS_V17 V18
AG18 VSS_AG17 VSS_AP32 AP35 AW55 VSS_AW53 VSS_D45 D47 K67 VSS_K66 VSS_V18 W13
AG19 VSS_AG18 VSS_AP35 AP38 AW57 VSS_AW55 VSS_D47 D48 K68 VSS_K67 VSS_W13 W6
AG20 VSS_AG19 VSS_AP38 AP42 AW6 VSS_AW57 VSS_D48 D53 K70 VSS_K68 VSS_W6 W9
AG21 VSS_AG20 VSS_AP42 AP58 AW60 VSS_AW6 VSS_D53 D58 K71 VSS_K70 VSS_W9 Y17
AG71 VSS_AG21 VSS_AP58 AP63 AW62 VSS_AW60 VSS_D58 D6 L11 VSS_K71 VSS_Y17 Y19
AH13 VSS_AG71 VSS_AP63 AP68 AW64 VSS_AW62 VSS_D6 D62 L16 VSS_L11 VSS_Y19 Y20
AH6 VSS_AH13 VSS_AP68 AP70 AW66 VSS_AW64 VSS_D62 D66 L17 VSS_L16 VSS_Y20 Y21
AH63 VSS_AH6 VSS_AP70 AR11 AW8 VSS_AW66 VSS_D66 D69 VSS_L17 VSS_Y21
AH64 VSS_AH63 VSS_AR11 AR15 AY66 VSS_AW8 VSS_D69 E11
AH67 VSS_AH64 VSS_AR15 AR16 B10 VSS_AY66 VSS_E11 E15
AJ15 VSS_AH67 VSS_AR16 AR20 B14 VSS_B10 VSS_E15 E18
B B
AJ18 VSS_AJ15 VSS_AR20 AR23 B18 VSS_B14 VSS_E18 E21 U@BGA1356P
AJ20 VSS_AJ18 VSS_AR23 AR28 B22 VSS_B18 VSS_E21 E46 18 OF 20
AJ4 VSS_AJ20 VSS_AR28 AR35 B30 VSS_B22 VSS_E46 E50
AK11 VSS_AJ4 VSS_AR35 AR42 B34 VSS_B30 VSS_E50 E53
AK16 VSS_AK11 VSS_AR42 AR43 B39 VSS_B34 VSS_E53 E56
AK18
AK21
VSS_AK16
VSS_AK18
VSS_AR43
VSS_AR45
AR45
AR46
B44
B48
VSS_B39
VSS_B44
VSS_E56
VSS_E6
E6
E65
For KBL R U42
AK22
AK27
VSS_AK21
VSS_AK22
VSS_AR46
VSS_AR48
AR48
AR5
B53
B58
VSS_B48
VSS_B53
VSS_E65
VSS_E71
E71
F1
(i)Non-stuff on KBL-U
AK63 VSS_AK27 VSS_AR5 AR50 B62 VSS_B58 VSS_F1 F13
AK68 VSS_AK63 VSS_AR50 AR52 B66 VSS_B62 VSS_F13 F2 XTAL24_IN_E3_R C232 U42@27p/50V_4
AK69 VSS_AK68 VSS_AR52 AR53 B71 VSS_B66 VSS_F2 F22
AK8 VSS_AK69 VSS_AR53 AR55 BA1 VSS_B71 VSS_F22 F23 XTAL24_IN_E3 R251 U42@0_5%_4
VSS_AK8 VSS_AR55 VSS_BA1 VSS_F23

3
4
AL2 AR58 BA10 F27
AL28 VSS_AL2 VSS_AR58 AR63 BA14 VSS_BA10 VSS_F27 F28 R252 Y3
AL32 VSS_AL28 VSS_AR63 AR8 BA18 VSS_BA14 VSS_F28 F32
VSS_AL32 VSS_AR8 VSS_BA18 VSS_F32 U42@24MHZ/20ppm
AL35 AT2 BA2 F33 U42@1M_5%_4
AL38 VSS_AL35 VSS_AT2 AT20 BA23 VSS_BA2 VSS_F33 F35

1
2
AL4 VSS_AL38 VSS_AT20 AT23 BA28 VSS_BA23 VSS_F35 F37 XTAL24_OUT_C7
R253 U42@0_5%_4
AL45 VSS_AL4 VSS_AT23 AT28 BA32 VSS_BA28 VSS_F37 F38 XTAL24_OUT_C7_R C233 U42@27p/50V_4
AL48 VSS_AL45 VSS_AT28 AT35 BA36 VSS_BA32 VSS_F38 F4
AL52 VSS_AL48 VSS_AT35 AT4 F68 VSS_BA36 VSS_F4 F40
AL55 VSS_AL52 VSS_AT4 AT42 BA45 VSS_F68 VSS_F40 F42
A AL58 VSS_AL55 VSS_AT42 AT56 VSS_BA45 VSS_F42 BA41 A
AL64 VSS_AL58 VSS_AT56 AT58 VSS_BA41
VSS_AL64 VSS_AT58

Quanta Computer Inc.


U@BGA1356P U@BGA1356P
16 OF 20 17 OF 20 PROJECT : ZAV
Size Document Number Rev
1A
Kabylake GND/U42
Date: Wednesday, March 15, 2017 Sheet 10 of 34
5 4 3 2 1
5 4 3 2 1

3 M_A_A[13:0]
M_A_A0 144
P/N and F/P
JDIM1A
8 M_A_DQ1
M_A_DQ[63:0] 3
111
JDIM1B
C234 2.2u/6.3V_6
11
M_A_A1 133 A0 DQ0 7 M_A_DQ4 112 VDD1 C235 0.1u/25V_4
M_A_A2 132 A1 DQ1 20 M_A_DQ6 117 VDD2
M_A_A3 131 A2 DQ2 21 M_A_DQ2 +1.2VSUS 118 VDD3 255 R254 *0_5%_4
128 A3 DQ3 4 0-7 123 VDD4 VDDSPD +2.5V
M_A_A4 M_A_DQ5
M_A_A5 126 A4 DQ4 3 M_A_DQ0 124 VDD5 R255 *Short_0402
127 A5 DQ5 16 129 VDD6 257 +3V
M_A_A6 M_A_DQ3
122 A6 DQ6 17 130 VDD7 VPP1 259 +2.5V_SUS
M_A_A7 M_A_DQ7
M_A_A8 125 A7 DQ7 28 M_A_DQ8 135 VDD8 VPP2 0.5A 12/4 Change for +3.3V to +3V
M_A_A9 121 A8 DQ8 29 M_A_DQ12 136 VDD9
M_A_A10 146 A9 DQ9 41 M_A_DQ15
2250mA 141 VDD10 258
120 A10/AP DQ10 42 8-15 142 VDD11 VTT +VDDQ_VTT
D M_A_A11 M_A_DQ14 D
M_A_A12 119 A11 DQ11 24 M_A_DQ13 147 VDD12 600mA
M_A_A13 158 A12 DQ12 25 M_A_DQ9 148 VDD13
151 A13 DQ13 38 M_A_DQ10 153 VDD14 164 VREF_CA_DIMM0
3 M_A_WE# 156 A14/WE# DQ14 37 154 VDD15 VREFCA
M_A_DQ11
3 M_A_CAS# 152 A15/CAS# DQ15 50 159 VDD16
M_A_DQ21
3 M_A_RAS# A16/RAS# DQ16 49 160 VDD17
M_A_DQ20
TP42 162 DQ17 62 M_A_DQ19 163 VDD18
TP41 165 CS2#/C0 DQ18 63 M_A_DQ22 16-23 VDD19
CS3#/C1 DQ19 46 M_A_DQ17
DQ20 45 M_A_DQ16 1 2

DDR4 SODIMM 260 PIN


114 DQ21 58 M_A_DQ23 5 VSS1 VSS48 6
3 M_A_ACT# 143 ACT# DQ22 59 9 VSS2 VSS49 10
M_A_DQ18
3 M_A_PARITY 116 PARITY DQ23 70 15 VSS3 VSS50 14
M_A_DQ24
3 M_A_ALERT# 134 ALERT# DQ24 71 19 VSS4 VSS51 18
M_A_EVENT# M_A_DQ28
108 EVENT# DQ25 83 M_A_DQ30 23 VSS5 VSS52 22
3,12 DDR_DRAMRST# RESET# DQ26 84 24-31 27 VSS6 VSS53 26
M_A_DQ26
C236 *0.1u/16V_4 DQ27 66 M_A_DQ25 31 VSS7 VSS54 30

DDR4 SODIMM 260 PIN


+1.2VSUS DQ28 67 M_A_DQ29 35 VSS8 VSS55 36
DQ29 79 M_A_DQ31 39 VSS9 VSS56 40
DQ30 80 M_A_DQ27 43 VSS10 VSS57 44
DQ31 174 M_A_DQ32 47 VSS11 VSS58 48
DQ32 173 M_A_DQ36 51 VSS12 VSS59 52
R256 DQ33 187 M_A_DQ34 57 VSS13 VSS60 56
DQ34 186 M_A_DQ39 61 VSS14 VSS61 60
240_1%_4 DQ35 32-39 VSS15 VSS62
170 M_A_DQ37 65 64
DQ36 169 M_A_DQ33 69 VSS16 VSS63 68

(260P)
M_A_EVENT# DQ37 183 M_A_DQ35 73 VSS17 VSS64 72
DQ38 182 M_A_DQ38 77 VSS18 VSS65 78
DQ39 195 M_A_DQ45 81 VSS19 VSS66 82
150 DQ40 194 M_A_DQ41 85 VSS20 VSS67 86
3 M_A_BA#0 145 BA0 DQ41 207 89 VSS21 VSS68 90
M_A_DQ43
3 M_A_BA#1 115 BA1 DQ42 208 93 VSS22 VSS69 94
M_A_DQ46
3 M_A_BG#0 BG0 DQ43 40-47 VSS23 VSS70

(260P)
113 191 M_A_DQ44 99 98
3 M_A_BG#1 BG1 DQ44 190 103 VSS24 VSS71 102
M_A_DQ40
149 DQ45 203 M_A_DQ42 107 VSS25 VSS72 106
3 M_A_CS#0 157 CS0# DQ46 204 167 VSS26 VSS73 168
M_A_DQ47
3 M_A_CS#1 109 CS1# DQ47 216 171 VSS27 VSS74 172
C M_A_DQ49 C
+3V 3 M_A_CKE0 110 CKE0 DQ48 215 175 VSS28 VSS75 176
M_A_DQ53
3 M_A_CKE1 CKE1 DQ49 228 181 VSS29 VSS76 180
M_A_DQ54
137 DQ50 229 M_A_DQ50 48-55 185 VSS30 VSS77 184
3 M_A_CLK0 139 CK0 DQ51 211 189 VSS31 VSS78 188
M_A_DQ52
3 M_A_CLK0# 138 CK0# DQ52 212 193 VSS32 VSS79 192
M_A_DQ48
3 M_A_CLK1 140 CK1 DQ53 224 +1.2VSUS 197 VSS33 VSS80 196
M_A_DQ51
3 M_A_CLK1# CK1# DQ54 225 201 VSS34 VSS81 202
M_A_DQ55
R257 R258 R259 155 DQ55 237 205 VSS35 VSS82 206
M_A_DQ56
*10K_5%_4 *10K_5%_4 *10K_5%_4 3 M_A_ODT0_DIMM 161 ODT0 DQ56 236 209 VSS36 VSS83 210
M_A_DQ58
3 M_A_ODT1_DIMM ODT1 DQ57 249 213 VSS37 VSS84 214
M_A_DQ57 R260
CHA_SA0 CHA_SA1 CHA_SA2 253 DQ58 250 M_A_DQ61 240_1%_4 217 VSS38 VSS85 218
7,20 CLK_SCLK 254 SCL DQ59 232 56-63 223 VSS39 VSS86 222
M_A_DQ62
7,20 CLK_SDATA SDA DQ60 233 227 VSS40 VSS87 226
M_A_DQ59
CHA_SA0 256 DQ61 245 M_A_DQ63 M_A_DQS8 231 VSS41 VSS88 230
R261 R262 R263 260 SA0 DQ62 246 235 VSS42 VSS89 234
CHA_SA1 M_A_DQ60
10K_5%_4 10K_5%_4 10K_5%_4 +1.2VSUS 166 SA1 DQ63 +1.2VSUS 239 VSS43 VSS90 238
CHA_SA2
SA2 13 M_A_DQS[7:0] 3 243 VSS44 VSS91 244
M_A_DQS0
R264 240_1%_4 M_A_CB0 92 DQS0 34 M_A_DQS1 247 VSS45 VSS92 248
R265 240_1%_4 M_A_CB1 91 CB0 DQS1 55 M_A_DQS2 251 VSS46 VSS93 252
R266 240_1%_4 M_A_CB2 101 CB1 DQS2 76 M_A_DQS3 R268 VSS47 VSS94
R267 240_1%_4 M_A_CB3 105 CB2 DQS3 179 M_A_DQS4 240_1%_4
R269 240_1%_4 M_A_CB4 88 CB3 DQS4 200 M_A_DQS5
CB4 DQS5 263
R270 240_1%_4 M_A_CB5 87 221 M_A_DQS6 263 261
R271 240_1%_4 M_A_CB6 100 CB5 DQS6 242 M_A_DQS7 M_A_DQS#8 264 GND#1 262
R272 240_1%_4 M_A_CB7 104 CB6 DQS7 97 M_A_DQS8 GND#2
CB7 DQS8 264
12 11 M_A_DQS#[7:0] 3
M_A_DQS#0
33 DM0 DQS#0 32 M_A_DQS#1 D4AS0-26001-1P52
+1.2VSUS 54 DM1 DQS#1 53 M_A_DQS#2
75 DM2 DQS#2 74 M_A_DQS#3
178 DM3 DQS#3 177 M_A_DQS#4
DM4 DQS#4 12/21 Change JDIM2 footprint to "ddr4-d4as0-26001-1p52-std-smt " for SMT requset
199 198 M_A_DQS#5
220 DM5 DQS#5 219 M_A_DQS#6
241 DM6 DQS#6 240 M_A_DQS#7
96 DM7 DQS#7 95 M_A_DQS#8 +1.2VSUS
DBI8# DQS#8 VREF DQ0 M1 Solution
B D4AS0-26001-1P52 B

R273
1K_1%_4

+VREF_CA_CPU R274 2_1%_6 VREF_CA_DIMM0 R275 *0_5%_4 +VDDQ

C237 R276
0.022u/25V_4 1K_1%_4

R277 24.9_1%_4

Place these Caps near So-Dimm1.


1uF/10uF 4pcs on each side of connector
+1.2VSUS +VDDQ_VTT VREF_CA_DIMM0

C238 1u/6.3V_4 C239 0.1u/16V_4


C240 1u/6.3V_4
C241 1u/6.3V_4 C242 2.2u/6.3V_6
C243 1u/6.3V_4
C244 1u/6.3V_4
C245 1u/6.3V_4
C246 1u/6.3V_4 +2.5V_SUS
C247 1u/6.3V_4
C248 1u/6.3V_4 C249 0.1u/16V_4
C250 10u/6.3V_6
C251 1u/6.3V_4 C252 2.2u/6.3V_6
+3V
A C253 1u/6.3V_4 A
C254 0.1u/16V_4
C255 1u/6.3V_4
C256 2.2u/6.3V_6
C257 10u/6.3V_6
C258 10u/6.3V_6
12,26 +VDDQ
12,26 +2.5V_SUS C259 10u/6.3V_6
3,5,12,26 +1.2VSUS C260 10u/6.3V_6
12,26 +VDDQ_VTT
3 +VREF_CA_CPU C261 10u/6.3V_6
2,4,6,7,8,9,14,15,16,17,18,19,20,21,22,24,25,26,27,30 +3V C262 10u/6.3V_6 Quanta Computer Inc.
C263 10u/6.3V_6
C264 10u/6.3V_6 PROJECT : ZAV
Size Document Number Rev
1A
DDR4 DIMM-STD 4H (CH. A)
Date: Wednesday, March 15, 2017 Sheet 11 of 34
5 4 3 2 1
5 4 3 2 1

DB1 change
+SMDDR_VREF_DQ1_M1
M1
U12
BYTE6_48-55
BYTE7_56-63
G2 M_B_DQ52
M_B_DQ52 3
DB1 change
+SMDDR_VREF_DQ1_M1 M1
U9
BYTE4_32-39
BYTE5_40-47
G2 M_B_DQ33
M_B_DQ33 3 +2.5V_SUS
DB1 change
+SMDDR_VREF_DQ1_M1 M1
U10
BYTE2_16-23
BYTE3_24-31
G2 M_B_DQ21
M_B_DQ21 3
DB1 change
+SMDDR_VREF_DQ1_M1 M1
U11
BYTE1_8-15
BYTE0_0-7
G2 M_B_DQ13
M_B_DQ13 3
12
B1 VREFCA DQL0 F7 M_B_DQ54 B1 VREFCA DQL0 F7 M_B_DQ34 B1 VREFCA DQL0 F7 M_B_DQ19 B1 VREFCA DQL0 F7 M_B_DQ14
+2.5V_SUS VPP#B1 DQL1 M_B_DQ54 3 +2.5V_SUS VPP#B1 DQL1 M_B_DQ34 3 VPP#B1 DQL1 M_B_DQ19 3 +2.5V_SUS VPP#B1 DQL1 M_B_DQ14 3
R9 H3 M_B_DQ48 R9 H3 M_B_DQ32 R9 H3 M_B_DQ23 R9 H3 M_B_DQ8
VPP#R9 DQL2 M_B_DQ48 3 VPP#R9 DQL2 M_B_DQ32 3 VPP#R9 DQL2 M_B_DQ23 3 VPP#R9 DQL2 M_B_DQ8 3
H7 M_B_DQ50 H7 M_B_DQ39 H7 M_B_DQ22 H7 M_B_DQ11
DQL3 M_B_DQ50 3 DQL3 M_B_DQ39 3 DQL3 M_B_DQ22 3 DQL3 M_B_DQ11 3
C265 H2 M_B_DQ53 C266 H2 M_B_DQ37 C267 H2 M_B_DQ20 C268 H2 M_B_DQ9
DQL4 M_B_DQ53 3 DQL4 M_B_DQ37 3 DQL4 M_B_DQ20 3 DQL4 M_B_DQ9 3
H8 M_B_DQ55 H8 M_B_DQ35 H8 M_B_DQ18 H8 M_B_DQ15
3 M_B_A[16:0] DQL5 M_B_DQ55 3 DQL5 M_B_DQ35 3 DQL5 M_B_DQ18 3 DQL5 M_B_DQ15 3
68p/50V_4 M_B_A0 P3 J3 M_B_DQ49 68p/50V_4 M_B_A0 P3 J3 M_B_DQ36 68p/50V_4 M_B_A0 P3 J3 M_B_DQ17 68p/50V_4 M_B_A0 P3 J3 M_B_DQ12
A0 DQL6 M_B_DQ49 3 A0 DQL6 M_B_DQ36 3 A0 DQL6 M_B_DQ17 3 A0 DQL6 M_B_DQ12 3
M_B_A1 P7 J7 M_B_DQ51 M_B_A1 P7 J7 M_B_DQ38 M_B_A1 P7 J7 M_B_DQ16 M_B_A1 P7 J7 M_B_DQ10
A1 DQL7 M_B_DQ51 3 A1 DQL7 M_B_DQ38 3 A1 DQL7 M_B_DQ16 3 A1 DQL7 M_B_DQ10 3
M_B_A2 R3 M_B_A2 R3 M_B_A2 R3 M_B_A2 R3
M_B_A3 N7 A2 SI1, 0427 RF M_B_A3 N7 A2 M_B_A3 N7 A2 SI1, 0427 RF M_B_A3 N7 A2
SI1, 0427 RF M_B_A4 N3 A3 A3 M_B_DQ61
M_B_DQ61 3
M_B_A4 N3 A3 A3 M_B_DQ45 SI1, 0427 RF
M_B_DQ45 3
M_B_A4 N3 A3 A3 M_B_DQ28
M_B_DQ28 3
M_B_A4 N3 A3 A3 M_B_DQ1
M_B_DQ1 3
D
M_B_A5 P8 A4 DQU0 B8 M_B_DQ58 M_B_A5 P8 A4 DQU0 B8 M_B_DQ43 M_B_A5 P8 A4 DQU0 B8 M_B_DQ31 M_B_A5 P8 A4 DQU0 B8 M_B_DQ2 D
A5 DQU1 M_B_DQ58 3 A5 DQU1 M_B_DQ43 3 A5 DQU1 M_B_DQ31 3 A5 DQU1 M_B_DQ2 3
M_B_A6 P2 C3 M_B_DQ57 M_B_A6 P2 C3 M_B_DQ41 M_B_A6 P2 C3 M_B_DQ24 M_B_A6 P2 C3 M_B_DQ4
A6 DQU2 M_B_DQ57 3 A6 DQU2 M_B_DQ41 3 A6 DQU2 M_B_DQ24 3 A6 DQU2 M_B_DQ4 3
M_B_A7 R8 C7 M_B_DQ59 M_B_A7 R8 C7 M_B_DQ46 M_B_A7 R8 C7 M_B_DQ26 M_B_A7 R8 C7 M_B_DQ6
A7 DQU3 M_B_DQ59 3 A7 DQU3 M_B_DQ46 3 A7 DQU3 M_B_DQ26 3 A7 DQU3 M_B_DQ6 3
M_B_A8 R2 C2 M_B_DQ60 M_B_A8 R2 C2 M_B_DQ44 M_B_A8 R2 C2 M_B_DQ29 M_B_A8 R2 C2 M_B_DQ0
A8 DQU4 M_B_DQ60 3 A8 DQU4 M_B_DQ44 3 A8 DQU4 M_B_DQ29 3 A8 DQU4 M_B_DQ0 3
M_B_A9 R7 C8 M_B_DQ62 M_B_A9 R7 C8 M_B_DQ42 M_B_A9 R7 C8 M_B_DQ30 M_B_A9 R7 C8 M_B_DQ7
A9 DQU5 M_B_DQ62 3 A9 DQU5 M_B_DQ42 3 A9 DQU5 M_B_DQ30 3 A9 DQU5 M_B_DQ7 3
M_B_A10 M3 D3 M_B_DQ56 M_B_A10 M3 D3 M_B_DQ40 M_B_A10 M3 D3 M_B_DQ25 M_B_A10 M3 D3 M_B_DQ5
A10/AP DQU6 M_B_DQ56 3 A10/AP DQU6 M_B_DQ40 3 A10/AP DQU6 M_B_DQ25 3 A10/AP DQU6 M_B_DQ5 3
M_B_A11 T2 D7 M_B_DQ63 M_B_A11 T2 D7 M_B_DQ47 M_B_A11 T2 D7 M_B_DQ27 M_B_A11 T2 D7 M_B_DQ3
A11 DQU7 M_B_DQ63 3 A11 DQU7 M_B_DQ47 3 A11 DQU7 M_B_DQ27 3 A11 DQU7 M_B_DQ3 3
M_B_A12 M7 M_B_A12 M7 M_B_A12 M7 M_B_A12 M7
M_B_A13 T8 A12/BC +1.2VSUS M_B_A13 T8 A12/BC +1.2VSUS M_B_A13 T8 A12/BC +1.2VSUS M_B_A13 T8 A12/BC +1.2VSUS
M_B_A14 L2 A13 M_B_A14 L2 A13 M_B_A14 L2 A13 M_B_A14 L2 A13
M_B_A15 M8 WE_n/A14 B3 M_B_A15 M8 WE_n/A14 B3 M_B_A15 M8 WE_n/A14 B3 M_B_A15 M8 WE_n/A14 B3
M_B_A16 L8 CAS_n/A15 VDD#B3 B9 M_B_A16 L8 CAS_n/A15 VDD#B3 B9 M_B_A16 L8 CAS_n/A15 VDD#B3 B9 M_B_A16 L8 CAS_n/A15 VDD#B3 B9
RAS_n/A16 VDD#B9 D1 RAS_n/A16 VDD#B9 D1 RAS_n/A16 VDD#B9 D1 RAS_n/A16 VDD#B9 D1
VDD#D1 G7 VDD#D1 G7 VDD#D1 G7 VDD#D1 G7
VDD#G7 J1 VDD#G7 J1 VDD#G7 J1 VDD#G7 J1
N2 VDD#J1 J9 M_B_BS#0 N2 VDD#J1 J9 M_B_BS#0 N2 VDD#J1 J9 M_B_BS#0 N2 VDD#J1 J9
3 M_B_BS#0 BA0 VDD#J9 BA0 VDD#J9 BA0 VDD#J9 BA0 VDD#J9
N8 L1 M_B_BS#1 N8 L1 M_B_BS#1 N8 L1 M_B_BS#1 N8 L1
3 M_B_BS#1 BA1 VDD#L1 BA1 VDD#L1 BA1 VDD#L1 BA1 VDD#L1
M2 L9 M_B_BG#0 M2 L9 M_B_BG#0 M2 L9 M_B_BG#0 M2 L9
3 M_B_BG#0 BG0 VDD#L9 BG0 VDD#L9 BG0 VDD#L9 BG0 VDD#L9
R1 R1 R1 R1
VDD#R1 T9 VDD#R1 T9 VDD#R1 T9 VDD#R1 T9
VDD#T9 VDD#T9 VDD#T9 VDD#T9
K7 A1 M_B_CLK0 K7 A1 M_B_CLK0 K7 A1 M_B_CLK0 K7 A1
3 M_B_CLK0 CK_t VDDQ#A1 CK_t VDDQ#A1 CK_t VDDQ#A1 CK_t VDDQ#A1
K8 A9 M_B_CLK0# K8 A9 M_B_CLK0# K8 A9 M_B_CLK0# K8 A9
3 M_B_CLK0# CK_c VDDQ#A9 CK_c VDDQ#A9 CK_c VDDQ#A9 CK_c VDDQ#A9
K2 C1 M_B_CKE0 K2 C1 M_B_CKE0 K2 C1 M_B_CKE0 K2 C1
3 M_B_CKE0 CKE VDDQ#C1 CKE VDDQ#C1 CKE VDDQ#C1 CKE VDDQ#C1
D9 D9 D9 D9
VDDQ#D9 F2 VDDQ#D9 F2 VDDQ#D9 F2 VDDQ#D9 F2
K3 VDDQ#F2 F8 M_B_ODT0_MD K3 VDDQ#F2 F8 M_B_ODT0_MD K3 VDDQ#F2 F8 M_B_ODT0_MD K3 VDDQ#F2 F8
3 M_B_ODT0_MD ODT VDDQ#F8 ODT VDDQ#F8 ODT VDDQ#F8 ODT VDDQ#F8
L7 G1 M_B_CS#0 L7 G1 M_B_CS#0 L7 G1 M_B_CS#0 L7 G1
3 M_B_CS#0 CS VDDQ#G1 CS VDDQ#G1 CS VDDQ#G1 CS VDDQ#G1
G9 G9 G9 G9
M_B_DQS6 G3 VDDQ#G9 J2 M_B_DQS4 G3 VDDQ#G9 J2 M_B_DQS2 G3 VDDQ#G9 J2 M_B_DQS1 G3 VDDQ#G9 J2
3 M_B_DQS6 M_B_DQS7 B7 DQSL_t VDDQ#J2 J8 3 M_B_DQS4 M_B_DQS5 B7 DQSL_t VDDQ#J2 J8 3 M_B_DQS2 M_B_DQS3 B7 DQSL_t VDDQ#J2 J8 3 M_B_DQS1 M_B_DQS0 B7 DQSL_t VDDQ#J2 J8
3 M_B_DQS7 DQSU_t VDDQ#J8 3 M_B_DQS5 DQSU_t VDDQ#J8 3 M_B_DQS3 DQSU_t VDDQ#J8 3 M_B_DQS0 DQSU_t VDDQ#J8
M_B_DQS#6 F3 B2 DB1 Option for 16Gbx16 die M_B_DQS#4 F3 B2 DB1 Option for 16Gbx16 die M_B_DQS#2 F3 B2 DB1 Option for 16Gbx16 die M_B_DQS#1 F3 B2 DB1 Option for 16Gbx16 die
3 M_B_DQS#6 M_B_DQS#7 A7 DQSL_c VSS#B2 E1 3 M_B_DQS#4 M_B_DQS#5 A7 DQSL_c VSS#B2 E1 3 M_B_DQS#2 M_B_DQS#3 A7 DQSL_c VSS#B2 E1 3 M_B_DQS#1 M_B_DQS#0 A7 DQSL_c VSS#B2 E1
3 M_B_DQS#7 DQSU_c VSS#E1 E9 3 M_B_DQS#5 DQSU_c VSS#E1 E9 3 M_B_DQS#3 DQSU_c VSS#E1 E9 3 M_B_DQS#0 DQSU_c VSS#E1 E9
R278 *Short_0402 R279 *Short_0402 R280 *Short_0402 R281 *Short_0402
VSS#E9 G8 VSS#E9 G8 VSS#E9 G8 VSS#E9 G8
VSS#G8 K1 VSS#G8 K1 VSS#G8 K1 VSS#G8 K1
C
VSS#K1 K9 VSS#K1 K9 VSS#K1 K9 VSS#K1 K9 C
E7 VSS#K9 M9 M_B_BG#1_1 R282 *0_5%_4 E7 VSS#K9 M9 M_B_BG#1_2 R283 *0_5%_4 M_B_BG#1 E7 VSS#K9 M9 M_B_BG#1_3 R284 *0_5%_4 M_B_BG#1 E7 VSS#K9 M9 M_B_BG#1_4 R285 *0_5%_4 M_B_BG#1
DML_n/DBIL_n VSS#M9 M_B_BG#1 3 DML_n/DBIL_n VSS#M9 DML_n/DBIL_n VSS#M9 DML_n/DBIL_n VSS#M9
E2 N1 E2 N1 E2 N1 E2 N1
+1.2VSUS DMU_n/DBIU_n VSS#N1 +1.2VSUS DMU_n/DBIU_n VSS#N1 +1.2VSUS DMU_n/DBIU_n VSS#N1 +1.2VSUS DMU_n/DBIU_n VSS#N1
T1 T1 T1 T1
VSS#T1 SI1C, 0615 VSS#T1 SI1C, 0615 VSS#T1 SI1C, 0615 VSS#T1 SI1C, 0615

DDR_DRAMRST# P1 A2 DDR_DRAMRST# P1 A2 DDR_DRAMRST# P1 A2 DDR_DRAMRST# P1 A2


3,11 DDR_DRAMRST# RESET_n VSSQ#A2 RESET_n VSSQ#A2 RESET_n VSSQ#A2 RESET_n VSSQ#A2
R286 240_1%_4 M_B1_ZQ0 F9 A8 R287 240_1%_4 M_B2_ZQ0 F9 A8 R288 240_1%_4 M_B3_ZQ0 F9 A8 R289 240_1%_4 M_B4_ZQ0 F9 A8
N9 ZQ VSSQ#A8 C9 N9 ZQ VSSQ#A8 C9 N9 ZQ VSSQ#A8 C9 N9 ZQ VSSQ#A8 C9
TEN VSSQ#C9 D2 TEN VSSQ#C9 D2 TEN VSSQ#C9 D2 TEN VSSQ#C9 D2
VSSQ#D2 D8 VSSQ#D2 D8 VSSQ#D2 D8 VSSQ#D2 D8
M_B_ALERT# P9 VSSQ#D8 E3 M_B_ALERT# P9 VSSQ#D8 E3 M_B_ALERT# P9 VSSQ#D8 E3 M_B_ALERT# P9 VSSQ#D8 E3
3 M_B_ALERT# ALERT_n VSSQ#E3 ALERT_n VSSQ#E3 ALERT_n VSSQ#E3 ALERT_n VSSQ#E3
M_B_ACT# L3 E8 M_B_ACT# L3 E8 M_B_ACT# L3 E8 M_B_ACT# L3 E8
3 M_B_ACT# ACT_n VSSQ#E8 ACT_n VSSQ#E8 ACT_n VSSQ#E8 ACT_n VSSQ#E8
M_B_PARITY T3 F1 M_B_PARITY T3 F1 M_B_PARITY T3 F1 M_B_PARITY T3 F1
3 M_B_PARITY PAR VSSQ#F1 PAR VSSQ#F1 PAR VSSQ#F1 PAR VSSQ#F1
H1 H1 H1 H1
VSSQ#H1 H9 VSSQ#H1 H9 VSSQ#H1 H9 VSSQ#H1 H9
T7 VSSQ#H9 T7 VSSQ#H9 T7 VSSQ#H9 T7 VSSQ#H9
NC NC NC NC
96-BALL 96-BALL 96-BALL 96-BALL
DDR4 DDR4 DDR4 DDR4
RAM@DDR4_96P RAM@DDR4_96P RAM@DDR4_96P RAM@DDR4_96P
Hynix AKD5JGETW00--H5TC4G63AFR-PBA

Place these Caps near Channel B


Vendor P/N Vendor P/N 1uF/10uF 4pcs on each side of connector
M_B_BG#1_1 R290 *Short_0402
M_B_BG#1_2 R291 *Short_0402
MIC 16G AKD5EG0TL00 MT40A1G16HBA-083E:A M_B_BG#1_3 R292 *Short_0402 +1.2VSUS +1.2VSUS
M_B_BG#1_4 R293 *Short_0402 VREF DQ1 M1 Solution
C269 1u/6.3V_4 +VDDQ_VTT
Elpida
DB1 Option for 16Gbx16 die C270 1u/6.3V_4 C271 1u/6.3V_4 R294
B
SAMSUNG
Close DDR ball C273 1u/6.3V_4
C272
C274
1u/6.3V_4
1u/6.3V_4 1.8K_1%_4
B

C275 1u/6.3V_4
C276 1u/6.3V_4 C277 1u/6.3V_4 +VREFDQ_SB_M3 R295 2.7_5%_6 +SMDDR_VREF_DQ1_M1R649 *0_5%_4
3 +VREFDQ_SB_M3 +VDDQ
C278 1u/6.3V_4
C279 1u/6.3V_4 C280 1u/6.3V_4
+VDDQ_VTT Memory 8G & Memory 16G TABLE C281 1u/6.3V_4 R296
DB1 12/11, close memory C282 1u/6.3V_4
+VDDQ_VTT M_B_CLK0 R297 36_1%_4 Memory 8G Memory 16G C283 1.8K_1%_4
C284 1u/6.3V_4 C285 10u/6.3V_4 0.022u/25V_4
M_B_CLK0# R298 36_1%_4 R278 0Ω CS00002JB38 240Ω CS12402FB03 C286 10u/6.3V_4 R301 24.9_1%_4
C288 1u/6.3V_4
M_B_BS#0 R299 36_1%_4 +1.2VSUS R279 0Ω CS00002JB38 240Ω CS12402FB03
M_B_BS#1 R300 36_1%_4 C289 1u/6.3V_4 DB1 Intel
M_B_BG#0 R302 36_1%_4 M_B_ALERT# R313 51_1%_4 R280 0Ω CS00002JB38 240Ω CS12402FB03
M_B_CKE0 R303 36_1%_4 C290 1u/6.3V_4
M_B_CS#0 R304 36_1%_4 R281 0Ω CS00002JB38 240Ω CS12402FB03
M_B_A0 R305 36_1%_4 C291 1u/6.3V_4
M_B_A1 R306 36_1%_4 M_B_CLK0 R282 UNINSTAL INSTAL
M_B_A2 R307 36_1%_4 C292 10u/6.3V_4
M_B_A3 R308 36_1%_4 R283 UNINSTAL INSTAL C293 10u/6.3V_4 +SMDDR_VREF_DQ1_M1
M_B_A4 R309 36_1%_4 C294 10u/6.3V_4 SI1B, 0603
M_B_A5 R310 36_1%_4 C813 R284 UNINSTAL INSTAL C295 10u/6.3V_4 C296 0.1u/16V_4
M_B_A6 R311 36_1%_4 C297 10u/6.3V_4
M_B_A7 R312 36_1%_4 DB1 1/18, close cpu 3300p/50V_4
R285 UNINSTAL INSTAL C298 2.2u/6.3V_4
M_B_A8 R314 36_1%_4 M_B_CLK0# C299 1u/6.3V_4
M_B_A9 R315 36_1%_4 R290 INSTAL UNINSTAL C300 1u/6.3V_4 C301 0.047u/25V_4
M_B_A10 R316 36_1%_4 C302 1u/6.3V_4
M_B_A11 R317 36_1%_4 R291 INSTAL UNINSTAL C303 1u/6.3V_4 C304 0.047u/25V_4
M_B_A12 R318 36_1%_4 C306 1u/6.3V_4
M_B_A13 R319 36_1%_4 C305 0.01u/50V_4 R292 INSTAL UNINSTAL C308 0.047u/25V_4
+1.2VSUS
M_B_A14 R320 36_1%_4 C307 0.01u/50V_4
M_B_A15 R321 36_1%_4 C309 0.01u/50V_4 R293 INSTAL UNINSTAL C311 0.047u/25V_4
M_B_A16 R322 36_1%_4 C310 0.01u/50V_4 SI1, 0421 add
M_B_ODT0_MD R323 36_1%_4 C312 0.01u/50V_4
M_B_ACT# R324 36_1%_4 DB1 Intel
M_B_PARITY R325 36_1%_4
M_B_BG#1 R326 36_1%_4
A A
+2.5V_SUS C313 1u/6.3V_4
C314 1u/6.3V_4
C315 1u/6.3V_4 +SMDDR_VREF_DQ1_M1 +1.2VSUS
C316 1u/6.3V_4 SI1, 0417 RF SI1, 0417 RF
+VDDQ_VTT 11,26 C317 1u/6.3V_4
+1.2VSUS 3,5,11,26 C318 1u/6.3V_4
+2.5V_SUS 11,26 C325 1u/6.3V_4
C319 1u/6.3V_4 C320 C321 C322 C323 C324 C326 C327
C328 10u/6.3V_4 3.3p/50V_4 68p/50V_4 2200p/50V_4 68p/50V_4 2200p/50V_4 0.1u/16V_4 3.3p/50V_4
C329 10u/6.3V_4
C330 68p/50V_4
DB1 RF DB1 RF Quanta Computer Inc.
DB1 12/11, close memory PROJECT :ZAV
Size Document Number Rev
DDR4 Memory Down (CH. B) 1A

Date: Wednesday, March 15, 2017 Sheet 12 of 34


5 4 3 2 1
5 4 3 2 1

Type-C

2,3,4,6,7,8,9,14,18,19,20,22,24,26,30
21,24,26,27,28,29,31
+3V_S5
+5V_S5
Correct pull up to +3V_S5 and un-stuff pull up 1/27

+3V_S5
13
25810_FAULT# R327 TPC@100K_1%_4
Vendor suggest input cap 120u 25810_LD_DET# R328 TPC@100K_1%_4
+5V_S5 25810_UFP# R329 *TPC@100K_1%_4
D D
+TPC_VBUS_C 25810_POL# R330 TPC@100K_1%_4
U13
C331 TPC@150u/6.3V_3528H1.9 25810_AUO# R334 TPC@100K_1%_4
25810_DBG# R332 TPC@100K_1%_4
+
C332 TPC@10u/6.3V_6 2 15 C334 TPC@10u/6.3V_6 TYPEC_CHG R333 TPC@100K_1%_4
C333 TPC@10u/6.3V_6 3 IN1#1 OUT#2 14 TYPEC_CHG_HI R335 TPC@100K_1%_4
4 IN1#2 OUT#1
5 IN2 11 25810_CC1
AUX CC1 13 25810_CC2
EC_TypeC_EN_R 6 CC2 EC_TypeC_EN_R R336 TPC@10K_5%_4
22 EC_TypeC_EN_R EN 1 25810_FAULT#
TYPEC_CHG 7 FAULT 20 25810_LD_DET#
R338 *Short_0402 TYPEC_CHG_HI 8 CHG LD_DET 19 25810_UFP#
22 EC_TypeC_CHG_HI CHG_HI UFP 18 25810_POL#
25810_REF 10 POL 17 25810_AUO#
REF AUDIO 16 25810_DBG#
25810_REF_RTN 9 REF_RTN DEBUG
R339 TPC@100K_1%_4 12 21
GND#1 PwPd
25810_UFP# R341 *Short_0402
PCH_TypeC_UPFb# 2
TPC@TPS25810RVCR 25810_FAULT# R343 *Short_0402
USB_OC2# 6

+TPC_VBUS

+TPC_VBUS C338 TPC@0.1u/25V_4

C339 TPC@0.1u/25V_4

1
C EC1 C
TPC@AZ5725-01F.R7G

2
Q7
+TPC_VBUS_C TPC@AON7401 +TPC_VBUS

3
D

5 2
1 +TPC_VBUS_C +TPC_VBUS
+5V_S5
G

R352
TPC@10K_5%_4
4

25810_UFP#_G2
R350 C343
R351 TPC@100K_1%_4 C347 C349
TPC@10K_5%_4 TPC@0.1u/25V_4 C346 TPC@100p/50V_4 C348 TPC@100p/50V_4
TPC@1000p/50V_4 TPC@1000p/50V_4
25810_UFP#_G1
Q8
3 1 EMI
TPC@2N7002K
2

25810_UFP#
3 1

Q9
2

TPC@2N7002K

CN21 TPC@AUSB0181-P101A
B B

A2 USB3_TXP2_C
C341 TPC@0.47u/25V_6 +TPC_VBUS A4 SSTXp1 A3 USB3_TXN2_C
C344 TPC@0.47u/25V_6 +TPC_VBUS B4 VBUS#1 SSTXn1 B11 USB3_RXP2_C
C345 TPC@0.47u/25V_6 +TPC_VBUS A9 VBUS#3 SSRXp1 B10 USB3_RXN2_C
C342 TPC@0.47u/25V_6 +TPC_VBUS B9 VBUS#2 SSRXn1
USB2P2 R331 *Short_0402 USB2P2_C VBUS#4
6 USB2P2
6 USB2N2 USB2N2 R337 *Short_0402 USB2N2_C B2 USB3_TXP3_C
SSTXp2 B3 USB3_TXN3_C
USB3_RXN2 R684 *Short_0402 USB3_RXN2_C SSTXn2 A11 USB3_RXN3_C
6 USB3_RXN2 SSRXp2
6 USB3_RXP2 USB3_RXP2 R685 *Short_0402 USB3_RXP2_C A10 USB3_RXP3_C
A1 SSRXn2
USB3_TXN2 R686 *Short_0402 USB3_TXN2_R C767 TPC@0.1u/25V_4 USB3_TXN2_C A12 GND#1
6 USB3_TXN2 GND#2
USB3_TXP2 R687 *Short_0402 USB3_TXP2_R C768 TPC@0.1u/25V_4 USB3_TXP2_C B1
6 USB3_TXP2 GND#3
B12 A6 USB2P2_C
USB3_RXN3 R688 *Short_0402 USB3_RXN3_C 1 GND#4 Dp1 A7 USB2N2_C
6 USB3_RXN3 GND#5 Dn1
6 USB3_RXP3 USB3_RXP3 R689 *Short_0402 USB3_RXP3_C 2 B6 USB2P2_C
3 GND#6 Dp2 B7 USB2N2_C
USB3_TXN3 R690 *Short_0402 USB3_TXN3_R C769 TPC@0.1u/25V_4 USB3_TXN3_C 4 GND#7 Dn2
6 USB3_TXN3 GND#8
6 USB3_TXP3 USB3_TXP3 R691 *Short_0402 USB3_TXP3_R C770 TPC@0.1u/25V_4 USB3_TXP3_C 5
6 NC#1 A5 25810_CC1
NC#2 CC1 B5 25810_CC2
CC2

A8 TPC_SBU1 TP44
SBU1 B8 TPC_SBU2
SBU2 TP43

Type-C ESD
A A
U15
U16
USB3_TXP2_C 1 9 USB3_TXN2_C
USB3_RXN2_C 2 LINE-1 LINE-2 8 USB3_RXP2_C USB2P2_C 1 6 USB2N2_C
LINE-3 LINE-4 2 1 6 5
GND VDD +5V_S5
3 25810_CC1 3 4 25810_CC2
GND 3 4
USB3_TXN3_C 4 7 USB3_TXP3_C TPC@TVL ST23 04 AD0
USB3_RXN3_C 5 LINE-6 LINE-5 6 USB3_RXP3_C
LINE-8 LINE-7 Quanta Computer Inc.
TPC@AZ1045-08F.R7G
PROJECT : ZAV
Size Document Number Rev
1A
Type C - TPS25810RVCR
Date: Wednesday, March 15, 2017 Sheet 13 of 34
5 4 3 2 1
5 4 3 2 1

+3V 2,4,6,7,8,9,11,15,16,17,18,19,20,21,22,24,25,26,27,30
LAN & Card reader Combo (LAN)
Card Reader (CRD)
14
+3VPCU 6,9,15,17,18,20,21,22,23,24
+3V_S5 2,3,4,6,7,8,9,13,18,19,20,22,24,26,30

SP1 R365 *Short_0402 SP1=SD_D1


SP2 R366 *Short_0402 SP2=SD_D0=MS_D1
SP3 R367 *Short_0402 SP3=SD_CLK=MS_D0
SP4 R364 *Short_0402 SP4=SD_CMD=MS_D2

SP5 R368 *Short_0402 SP5=SD_D3=MS_D3


SP6 R369 *Short_0402 SP6=SD_D2=MS_CLK

2nd source:BG625000081 SP7 R371 *Short_0402 SP7=SD_WP=MS_BS

C361 12p/50V_4 LAN_XTALI SP8 R373 *Short_0402 SP8=SD_CD#

2
1
D Y4 SP8 D
25MHZ/30ppm
C362 *10p/50V_4
Share Pin

4
3
C363 12p/50V_4 LAN_XTAL2 TP45
SP1 SD_D1
PCIE_LAN_WAKE#_R SP2 SD_D0 MS_D1
SP3 SD_CLK MS_D0
SP4 SD_CMD MS_D2
VDD10 TP46 SP5 SD_D3 MS_D3
TP47 TP48 SP6 SD_D2 MS_CLK
TP49 SP7 SD_WP MS_BS
R372 2.49K_1%_4 RSET SP8 SD_CD#
10 mils C364 *10p/50V_4 SP9 MS_INS# CN2

14

13

15
156-1001902602
LANVCC

GND#2
U17

Hole#2

Hole#1
48
47
46
45
44
43
42
41
40
39
38
37
RTL8411B-CG SP1=SD_D1 C368 10p/50V_4

LED1/GPO
RSET

LED_CR
AVDD33

AVDD10
CKXTAL2
CKXTAL1
MS_CD#
SD_CD#
LED0

LED3
LANWAKEB
49 SP2=SD_D0=MS_D1 C369 10p/50V_4
E_PAD
SP4=SD_CMD=MS_D2 C372 10p/50V_4
SP5=SD_D3=MS_D3 1
+3V SP5=SD_D3=MS_D3 C373 10p/50V_4 CD/DAT3
SP4=SD_CMD=MS_D2 2
VDDREG SP6=SD_D2=MS_CLK C374 10p/50V_4 CMD
MDI_0+ 1 36 REGOUT
3
MDI_0- 2 MDIP0 REGOUT 35 R374 *Short_0805 R376 VSS
MDIN0 VDDREG LANVCC
VDD10 3 34 ENSWREG R375 *Short_0402 1K_5%_4 +3V3_SD_SW +3V3_SD_SW 4
MDI_1+ 4 AVDD10#1 ENSWREG_H 33 VDD
MDIP1 DVDD10 VDD10
MDI_1- 5 32 R377 *Short_0402 LANVCC SP3=SD_CLK=MS_D0 R370 *Short_0402 SD_CLK_R 5
MDI_2+ 6 MDIN1 DVDD33 31 ISOLATEB CLK
MDI_2- 7 MDIP2 ISOLATEB 30 PERST# 6
VDD10
MDI_3+
8
9
MDIN2
AVDD10#2
PERSTB
CLKREQB
29
28
PCIE_REQ_LAN#_R
SP7 R378 EMI SP2=SD_D0=MS_D1 7
VSS#2
TAI - SOL
MDI_3- 10 MDIP3 SD_WP/MS_BS 27 VDD33/18 15K_5%_4 DAT0
11 MDIN3 VDD33/18 26 PCIE5_RXN_LAN_C C370 0.1u/16V_4 SP1=SD_D1 8
LANVCC AVDD33#1 HSON PCIE5_RXN_LAN 6 SP3=SD_CLK=MS_D0
+3V 12 25 PCIE5_RXP_LAN_C C371 0.1u/16V_4 DAT1
DVDD33_CR HSOP PCIE5_RXP_LAN 6
SP6=SD_D2=MS_CLK 9
DAT2
SD_CMD/MS_D2
SD_CLK/MS_D0

SD_D2/MS_CLK

SP8=SD_CD# 10
SD_D0/MS_D1

SD_D3/MS_D3

C367
CD
REFCLK_N
CARD_3V3

REFCLK_P

C 10p/50V_4 SP7=SD_WP=MS_BS 11 C
EVDD10

R379 *0_5%_4 WP
SD_D1

IOAC_RST# 19,22
HSIN
HSIP

R380 *Short_0402 PLTRST# 8,18,19,21,22


+3V3_SD_SW
13
14
15
16
17
18
19
20
21
22
23
24

GND#1
12
C365 C366
SP1 4.7u/6.3V_6 0.1u/16V_4
SP2
CLK_PCIE_LANN 6
SP3
CLK_PCIE_LANP 6
SP4
PCIE5_TXN_LAN 6
SP5
PCIE5_TXP_LAN 6
SP6

EVDD10

Leakage circuit (MPC) Tramsformer

LANVCC
40 mils (Iout=1A)

B C375 C376 C377 Layout:All termination B


+3V +3V 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 signal should have 30
mil trace
+3V For RTL8411B
R381 R382 U18 NS892407_1000
CLK_PCIE_REQ4# have PU 10k. Place 0.1uF,CAP close to each VDD33 pin -- 11,32,48 1 24 LAN_MCT0
*10K_1%_4 10K_1%_4 MDI_3+ 2 TCT1 MCT1 23 LAN_MX3+
2

MAIN POWER(3V_S0) TD1+ MX1+ 22


MDI_3- 3 LAN_MX3-
PCIE_REQ_LAN#_R TD1- MX1-
S0 6 CLK_PCIE_LAN_REQ# 1 3
4 21 LAN_MCT1
Q10 2N7002K MDI_2+ 5 TCT2 MCT2 20 LAN_MX2+
MDI_2- 6 TD2+ MX2+ 19 LAN_MX2-
R383 *0_5%_4
RTL8411B (LDO mode) close to each VDD10 pin-- 3, 8, 33, 46 close to each VDD10 pin -- 20 TD2- MX2-
REGOUT (reserve) 7 18 LAN_MCT2
TCT3 MCT3 17 10

9
LANVCC VDD10 MDI_1+ 8 LAN_MX1+
MDI_1- 9 TD3+ MX3+ 16 LAN_MX1-
FAE suggest to 40 mils (Iout=1A) 40 mils (Iout=1A) TD3- MX3-
R384 *Short_0805
change to 1K 10 15 LAN_MCT3
MDI_0+ 11 TCT4 MCT4 14 LAN_MX0+ LAN_MX0+ 1

GND
TD4+ MX4+

75_1%_8

75_1%_8

75_1%_8

75_1%_8
R385 C378 C379 C380 C381 C382 C383 C384 MDI_0- 12 13 LAN_MX0- LAN_MX0- 2
TD4- MX4- LAN_MX1+ 3
*1K_5%_4 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 1u/6.3V_4 0.1u/16V_4
LAN_MX2+ 4

25
LAN_MX2- 5
2

EC_PCU LANVCC
C385 LAN_MX1- 6
R390 *Short_0402 1 3 PCIE_LAN_WAKE#_R 0.01u/50V_4 LAN_MX3+ 7
8,19 PCIE_LAN_WAKE#
LAN_MX3- 8 CN3

R386

R387

R388

R389
R391 *0_5%_4 *2N7002K Q11
22 IOAC_LAN_WAKE#
2RJ1622-000111F

11

12
R392 *Short_0402

TERM9
LANVCC VDD10 EVDD10 VDDREG
+3V_S5
30 mils 40 mils 4/20 REV:D add TP85 ~TP100 for AZ chip ICT/ATE Capacitor test
R394 2.2_5%_8
10 mils
R396 *Short_0603 C389
VDD33/18 1000p/3KV_1808
C387 C388 C390 C391
10u/6.3V_6 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4
C392 C393 C397 C395
A A
C396 C394 1u/6.3V_4 0.1u/16V_4 4.7u/6.3V_6 0.1u/16V_4
*4.7u/6.3V_6 0.1u/16V_4

Place close to pin 27


Close to Pin20 Place connect to Pin35

Quanta Computer Inc.


PROJECT : ZAV
Size Document Number Rev
1A
LAN/CRD - RTL8411B
Date: Wednesday, March 15, 2017 Sheet 14 of 34
5 4 3 2 1
5 4 3 2 1

eDP/CCD LCD Power


+VIN TP_PWR
2/16 Change from "CCD Power" to "+3V" for layout

+3V
+3V
15
U20
C411 C412 C413 C414 C415 C417 LCDVCC
D C416 D
4.7u/25V_8 1000p/50V_4 0.1u/16V_4 1000p/50V_4 0.1u/16V_4 1000p/50V_4
1u/6.3V_4 5 1 LCDVCC
IN#2 OUT
4 2 C418 C419 C420 C421 C422
IN#1 GND
R404 *Short_0402 EDP_VDD_EN_R 3 *0.1u/16V_4 *2.2u/50V_8 0.1u/16V_4 0.01u/50V_4 22u/6.3V_8
2 EDP_VDD_EN EN

C835 100p/50V_4
G5245AT11U
+3V R406 VL_P19@0_5%_8 C823 0.1u/25V_4 R405

42
+VIN
CN4 100K_5%_4
R407 *100K_5%_4 EDP_AUX_C R412 *100K_5%_4 R723 VL_P12@0_5%_8 V_BLIGHT 51540-04001-V01 1st : AL005245000---GMT
+12V_Panel 40
R409 *100K_5%_4 EDP_AUX#_C R413 *100K_5%_4
C423 *1u/6.3V_4 39
38 2nd : AL007553000---UPI
R750 *0_5%_6
C424 *1u/6.3V_4 37
For 4k2k reserved 36
R411 *Short_0603 LCDVCC_R 35
LCDVCC 34
+3V R769 *Short_0603 CCD+DMIC_PWR
R771 0_5%_4 DUALDMIC_PWR 33
CCD DMIC POWER +3V
R770 *0_5%_4 colay R770 R771 32

TP POWER
+1.8V
+5V
+3V
R414
R415
*Short_0603
*0_5%_4
TP_PWR 31
30
29
Touch screen level shift +3V

TS_EN R427 *Short_0402 TS_EN_R


22 TS_EN
PCH_BRIGHT 28 I2C(reserve)
C 2 PCH_BRIGHT 27 C
C426 180p/50V_4 BL_ON
R416 33_5%_4 EDP_HPD_R 26 R417 *TSI@0_5%_4 S0
2 EDP_HPD 25 R419
R418
EDP_AUXP C425 0.1u/16V_4 EDP_AUX_C 24 S5 Q13A *TSI@10K_5%_4 *TSI@10K_5%_4
2 EDP_AUXP 23
TS_EN R431 *0_5%_4 TP_INT EDP_AUXN C427 0.1u/16V_4 EDP_AUX#_C *TSI@DMN601DWK-7
2 EDP_AUXN 22
EDP_TXP0 C430 0.1u/16V_4 EDP_TXP0_C 21 3 4 I2C1_SDA_C TPD->100kHz,TS=400Khz
2 EDP_TXP0 20 4 I2C1_SDA
1C1-2 2014/03/11 Add R698 for TS_EN short TP_INT, eDP FHD EDP_TXN0 C431 0.1u/16V_4 EDP_TXN0_C Intel design guide suggestion
for issue debug. 2 EDP_TXN0 19
18 MCP PIN 10u.
2 EDP_TXP1 EDP_TXP1 C428 0.1u/16V_4 EDP_TXP1_C Per inch 3u TS=3x5inch

5
EDP_TXN1 C429 0.1u/16V_4 EDP_TXN1_C 17
+3V 2 EDP_TXN1 16 +3V 400kHz10~100u =2.4~0.4k.
EDP_TXP2 C432 EDP_TXP2_C 15 6 1 I2C1_SCL_C
100Khz 10~100u=9k~1k.
0.1u/16V_4 4 I2C1_SCL
2 EDP_TXP2 14
eDP UHD EDP_TXN2 C433 0.1u/16V_4 EDP_TXN2_C
2 EDP_TXN2 13
EDP_TXP3 C434 0.1u/16V_4 EDP_TXP3_C 12 Q13B
2 EDP_TXP3

2
R436 EDP_TXN3 C435 0.1u/16V_4 EDP_TXN3_C 11
Touch Panel interrupt 2 EDP_TXN3 10 *TSI@DMN601DWK-7
*TSI@10K_5%_4
USB2P7 R421 *Short_0402 USB2P7_C 9 R426 *TSI@0_5%_4
2

6 USB2P7 8
CCD USB 6 USB2N7 USB2N7 R423 *Short_0402 USB2N7_C
3 1 TP_INT 7
4 TP_INT_PCH 6
USB2P6 R424 *Short_0402 USB2P6_C
6 USB2P6 5
Q16 Touch Screen USB USB2N6 R425 *Short_0402 USB2N6_C
S5 *TSI@2N7002K S0 6 USB2N6 4 +3VPCU
I2C1_SDA_C R422 *TSI@0_5%_4 3
17 DMIC_DAT_L 2
B R438 *TSI@0_5%_4 Touch Screen I2C I2C1_SCL_C R420 *TSI@0_5%_4 B
17 DMIC_CLK_L 1
LCD back light

41
R429
*100K_5%_4
+3V

LID# LID# 22

1
R430 R432
Hall Sensor (HSR) 10K_5%_4 10K_5%_4 D3 LID591#,EC
1N4148WS
intrnal PU

BL# BL_ON

2
3

3
+3VPCU R781 2.2_5%_6 R437 *100K_5%_4
R433 *Short_0402 PCH_BLON_C 5 2 2
2 PCH_BLON EC_FPBACK# 22
LID#
22 PCH_BLON_R R434 *Short_0402 Q14A Q14B Q15
D4 R435 2N7002KDW 2N7002KDW DDTC144EUA-7-F

1
2

1
1 2 100K_5%_4

OUTPUT
S VCC

2
*VPORT 0603 220K-V05
D5

GND
C437

N
*VPORT 0603 220K-V05
A 4.7u/6.3V_6 MR1 A

1
3 APX8132AI-TRG

Quanta Computer Inc.


31 +12V_Panel
2,4,6,7,8,9,11,14,16,17,18,19,20,21,22,24,25,26,27,30 +3V PROJECT : ZAV
16,17,18,20,24,30 +5V
6,9,17,18,20,21,22,23,24 +3VPCU Size Document Number Rev
1A
23,24,25,26,27,28,29,30,31 +VIN eDP/CCD/HS/TS
Date: Wednesday, March 15, 2017 Sheet 15 of 34
5 4 3 2 1
5 4 3 2 1

HDMI
16

*0.1u/16V_4
+3V
Power trace tracking

C438
2,4,6,7,8,9,11,14,15,17,18,19,20,21,22,24,25,26,27,30 +3V
15,17,18,20,24,30 +5V

HDMI_DDCDATA_MB
HDMI_DDCCLK_MB
C439 +3V

HDMI_MB_HPD
D D
*0.1u/16V_4 HDMI_EQ0 R439 *10K_5%_4
+3V
R441 *L@0_5%_4

+3V
HDMI_EQ1 R440 *H@10K_5%_4
U21

24
23
22
21
20
19
18
17
*PTN3366BS R442 *0_5%_4

From PCH

HPD_SINK
SDA_SINK
SCL_SINK
DDC_EN

OE_N
NC#3
NC#2

VDD#2
INT_HDMITX0P C440 *0.1u/16V_4 INT_HDMITX0P_IN 25 16 INT_HDMITX0P_OUT R696 *0_5%_4 INT_HDMITX0P_C
2 INT_HDMITX0P IN_D1- OUT_D1-
INT_HDMITX0N C441 *0.1u/16V_4 INT_HDMITX0N_IN 26 15 INT_HDMITX0N_OUT R697 *0_5%_4 INT_HDMITX0N_C
2 INT_HDMITX0N IN_D1+ OUT_D1+
INT_HDMITX1P C442 *0.1u/16V_4 INT_HDMITX1P_IN 27 14 INT_HDMITX1P_OUT R698 *0_5%_4 INT_HDMITX1P_C
2 INT_HDMITX1P IN_D2- OUT_D2-
INT_HDMITX1N C443 *0.1u/16V_4 INT_HDMITX1N_IN 28 13 INT_HDMITX1N_OUT R699 *0_5%_4 INT_HDMITX1N_C
2 INT_HDMITX1N IN_D2+ OUT_D2+
INT_HDMITX2P C444 *0.1u/16V_4 INT_HDMITX2P_IN 29 12 INT_HDMITX2P_OUT R700 *0_5%_4 INT_HDMITX2P_C
2 INT_HDMITX2P IN_D3- OUT_D3-
INT_HDMITX2N C445 *0.1u/16V_4 INT_HDMITX2N_IN 30 11 INT_HDMITX2N_OUT R701 *0_5%_4 INT_HDMITX2N_C
2 INT_HDMITX2N IN_D3+ OUT_D3+
INT_HDMICLK+ C446 *0.1u/16V_4 INT_HDMICLK+_IN 31 10 INT_HDMICLK+_OUT R702 *0_5%_4 INT_HDMICLK+_C
2 INT_HDMICLK+ IN_D4- OUT_D4-
INT_HDMICLK- C447 *0.1u/16V_4 INT_HDMICLK-_IN 32 9 INT_HDMICLK-_OUT R703 *0_5%_4 INT_HDMICLK-_C

HPD_SOURCE
SDA_SOURCE
SCL_SOURCE
2 INT_HDMICLK- IN_D4+ OUT_D4+
33 37
GND#1 GND#5 36 +3V

VDD#1
GND#4

REXT
35

NC#1
EQ1

EQ0
GND#3 34
GND#2

1
2
3
4
5
6
7
8
+3V C448 C449 C450 C451 C452 C453 C454
0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 *0.1u/16V_4

*12.4K_1%_4
HDMI_MB_HPD_R
DDCDATA_RIN
DDCCLK_RIN
co-layout HDMI_EQ1
co-layout

HDMI_EQ0
C C

C455
*0.1u/16V_4
R444

INT_HDMITX0P R714 *Short_0402 INT_HDMITX0P_NOR C771 0.1u/16V_4 INT_HDMITX0P_C


INT_HDMITX0N R715 *Short_0402 INT_HDMITX0N_NOR C772 0.1u/16V_4 INT_HDMITX0N_C
INT_HDMITX1P
INT_HDMITX1N
R716
R717
*Short_0402
*Short_0402
INT_HDMITX1P_NOR
INT_HDMITX1N_NOR
C773
C774
0.1u/16V_4
0.1u/16V_4
INT_HDMITX1P_C
INT_HDMITX1N_C
EMI
INT_HDMITX2P R718 *Short_0402 INT_HDMITX2P_NOR C775 0.1u/16V_4 INT_HDMITX2P_C
INT_HDMITX2N R719 *Short_0402 INT_HDMITX2N_NOR C776 0.1u/16V_4 INT_HDMITX2N_C
INT_HDMICLK+ R720 *Short_0402 INT_HDMICLK+_NOR C777 0.1u/16V_4 INT_HDMICLK+_C
INT_HDMICLK- R721 *Short_0402 INT_HDMICLK-_NOR C778 0.1u/16V_4 INT_HDMICLK-_C

R706

R707

R708

R709

R710

R711

R712

R713
INT_HDMITX1P_C

R452 *100_1%_4

470_1%_4

470_1%_4

470_1%_4

470_1%_4

470_1%_4

470_1%_4

470_1%_4

470_1%_4
INT_HDMITX1N_C

INT_HDMITX0P_C

R453 *100_1%_4

INT_HDMITX0N_C

3
2
B +3V B
Q35
DMN601K-7

1
+3V +3V

20

22
HDMI-detect HDMI connector
INT_HDMITX2P_C 1 D2+
R443 2 D2_shield
1M_5%_4 INT_HDMITX2N_C 3
D2-
INT_HDMITX1P_C 4
2

D1+
Q17 5
D1_shield
R778 *Short_0402 HDMI_MB_HPD_R 1 3 HDMI_MB_HPD INT_HDMITX1N_C 6
2 INT_HDMI_HPD D1-
INT_HDMITX0P_C 7 D0+
2N7002K U35 8
+3V D0_shield
INT_HDMITX0P_C 1 10 INT_HDMITX0P_C INT_HDMITX0N_C 9
Line-1 NC#4 INT_HDMICLK+_C 10
D0-
CLK+
INT_HDMITX0N_C 2 9 INT_HDMITX0N_C 11 CLK_shield
Line-2 NC#3
5

Q41A INT_HDMICLK-_C 12 CLK-


3 13
R775 *Short_0402 DDCCLK_RIN 4 3 HDMI_DDCCLK_MB GND#1 14 CEC
2 HDMI_DDCCLK_SW +5V NC
INT_HDMITX1P_C 4 7 INT_HDMITX1P_C HDMI_DDCCLK_MB 15
Line-3 NC#2 Q18 DDC CLK
HDMI_DDCDATA_MB 16
DDC DATA
+3V INT_HDMITX1N_C 5 6 INT_HDMITX1N_C 17
Line-4 NC#1 1 HDMI_5V 18
GND

*AZ1045-04F.R7G VOUT HDMI_MB_HPD 19


+5V
2

2
HP DET
Q41B 3
VIN C456 D8

2
R777 *Short_0402 DDCDATA_RIN 1 6 HDMI_DDCDATA_MB 2 *220p/50V_4 *AZ5725-01F.R7G
2 HDMI_DDCDATA_SW

21

23
U36 GND D9 R450
A A

1
SSM6N43FU INT_HDMITX2P_C 1 10 INT_HDMITX2P_C CN17
Line-1 NC#4 *AZ5725-01F.R7G 20K_5%_4 HMRBL-AK120C

1
INT_HDMITX2N_C 2 9 INT_HDMITX2N_C AP2331SA-7
R446 2.2K_5%_4 DDCCLK_RIN Line-2 NC#3
+3V
3
GND#1
R447 2.2K_5%_4 DDCDATA_RIN INT_HDMICLK+_C 4 7 INT_HDMICLK+_C
Line-3 NC#2
INT_HDMICLK-_C 5 6 INT_HDMICLK-_C

HDMI_5V
D6
2
RB500V-40
1 R448 2.2K_5%_4 HDMI_DDCCLK_MB
Line-4 NC#1
*AZ1045-04F.R7G
Quanta Computer Inc.
PROJECT : ZAV
D7 RB500V-40 Size Document Number Rev
2 1 R449 2.2K_5%_4 HDMI_DDCDATA_MB 1A
HDMI - PTN3366BS
Date: Wednesday, March 15, 2017 Sheet 16 of 34
5 4 3 2 1
5 4 3 2 1

Codec(ADO) Hole
HP-R2

HP-L2

LINE1-VREFO-L
17
LINE1-VREFO-R

MIC2-VREFO
Close to codec
CODEC_VREF C458 2.2u/6.3V_4 ADOGND
INT_AMIC-VREFO C459 10u/6.3V_4
D ADOGND +5VA D

C460

C461

C462
Change to 1U from Realtek's suggestion
R459 100K_5%_4

1u/6.3V_4

1u/6.3V_4
10u/6.3V_4
HOLE2 HOLE3 HOLE4 HOLE5 HOLE6 HOLE7
*HG-C354D126P2 *HG-ZAV-1 *HG-TC315BC236D95P2*h-tbc315ic205d165p2 *H-C315D165P2 *HG-EJ-KBL-1
C463 C464 7 6 7 6 7 6 7 6
0.1u/16V_4 10u/6.3V_4 8 5 8 5 8 5 8 5
9 4 9 4 9 4 9 4
+AZA_VDD
Place next to pin 26

1
2
3

1
2
3

1
2
3

1
2
3
U22

36

35

34

33

32

31

30

29

28

27

26

25
+1.5VA ALC255-CG
ADOGND

CPVEE

HP-OUT-L

LINE1-VREFO-L

MIC2-VREFO

LDO1-CAP

AVDD1

AVSS1
CPVDD

CBN

HP-OUT-R

LINE1-VREFO-R

VREF
C465 C466
10u/6.3V_4 0.1u/16V_4
HOLE8 HOLE9 HOLE10 HOLE11 HOLE12 HOLE13 HOLE14
ADOGND 37 24 *H-C256IC146D146P2 *H-C256IC146D146P2 *H-C256IC146D146P2 *H-C256IC146D146P2 *O-EJ-KBL-1 *HG-C354D220P2 H-C236D126P2
CBP LINE2-L 7 6
38 23 8 5
ADOGND AVSS2 LINE2-R 9 4
Place next to pin 40 C467 10u/6.3V_4 39 22 LINE1-L Close to codec
LDO2-CAP LINE1-L

1
2
3

1
Analog 40 21 LINE1-R
AVDD2 LINE1-R
Digital L2 1 2 +5V_PVDD 41 20 R460 *Short_0603
+5V PVDD1 VD33 STB +3VPCU
PBY160808T-600Y-N analog digital
L_SPK+ 42 19 C471 10u/6.3V_4
SPK-L+ MIC-CAP ADOGND
C472 C473 L_SPK- 43 18 SLEEVE trace width of SLEEVE & RING2 HOLE15 HOLE16 HOLE17 HOLE18 HOLE19 HOLE20 HOLE21 HOLE22 HOLE23
10u/6.3V_4 SPK-L- MIC2-R/SLEEVE *H-C122D122N *HG-C354D220P2 *SPAD-C236NP *SPAD-C236NP *SPAD-C236NP *SPAD-C315NP *H-TBC236IC115D95P2 *spad-c177np *spad-c177np
0.1u/16V_4 are required at least 40mil and
R_SPK- 44 17 RING2 7 6
SPK-R- MIC2-L/RING2 its length should be asshort as possible 8 5
R_SPK+ 45 16 9 4
Low is power down SPK-R+ MONO-OUT
amplifier output 46 15

1
2
3

1
PVDD2 SPDIFO/FRONT JD/GPIO3
Close to codec
GPIO0/DMIC-DATA

PD# 47 14
GPIO1/DMIC-CLK
Placement near Audio Codec
C
PDB MIC2/LIN2 JD C
C476 C477 TP53 48 13 SENSEA R463 200K_1%_4 HP_JD#
SPDIF-OUT SDATA-OUT HP/LINE1 JD

LDO3-CAP
10u/6.3V_4

SDATA-IN
0.1u/16V_4

DVDD-IO

PCBEEP
RESETB
DC DET

R464 100K_5%_4 +3V


DVDD

SYNC
49 BCLK
DGND
Analog
Digital
1

10

11

12
DMIC_DAT

DMIC_CLK

C478
DC-DET

Change 47K to 22K for PCBEEP


1.6Vrms
+3V R465 *Short_0603 +AZA_VDD D11 1N4148WS
10u/6.3V_4

PCBEEP C479 0.1u/16V_4 BEEP_1 R466 22K_5%_4 1 2


SPKR 4
R467

C480 C481 C482 R468 1 2


PCBEEP_EC 22
0.1u/16V_4 10u/6.3V_4 100p/50V_4 10K_5%_4
D12 1N4148WS
*Short_0402

Change to 10K from Realtek's suggestion


+3V +1.5V

15 DMIC_DAT_L
DMIC_DAT_L R470 *Short_0402 PCH_AZ_CODEC_RST# 4
CPU 3.3V
Universal Audio Jack HEADPHONE/MIC/LINE combo (ADO)
R469 *Short_0402
Tied at one point only under DMIC_CLK_L R471 22_5%_4
the codec or near the codec
15 DMIC_CLK_L PCH_AZ_CODEC_SYNC 4 SLEEVE/RING2 trace > 40mils
DVDD_IO R472 *0_5%_4
R473 *Short_0402 C483 HP/LINE trace > 10mils
R475
R476
*0_5%_4
*0_5%_4
Close to codec 33p/50V_4
ACZ_SDIN R474 33_5%_4
L/R spacing > 10mils
PCH_AZ_CODEC_SDIN0 4
R477 *0_5%_4 C484 C485 MIC2-VREFO R478 2.2K_5%_4
R479 *0_5%_4 PCH_AZ_CODEC_BITCLK 4 0.1u/16V_4 10u/6.3V_4 R420& R422 change to 62 ohm -> 3/11
R480 *Short_0402 R481 2.2K_5%_4
C487 *1000p/50V_4 C486 *22p/50V_4
SLEEVE
SLEEVE 21
C488 *0.1u/16V_4 PCH_AZ_CODEC_SDOUT 4 Place next to pin 9
RING2
B RING2 21 B

ADOGND HP-L2 R482 62_1%_4 HP-L3


HP-L3 21
Cap need near AVDD1 and HP-R2 R483 62_1%_4 HP-R3
HP-R3 21
AVDD2
power source input HP_JD#
HP_JD# 21
R484 R485
LINE1-L C489 4.7u/6.3V_6 *10K_5%_4 *10K_5%_4 C490 C491 C492 C493
100p/50V_4 100p/50V_4 100p/50V_4 100p/50V_4
LINE1-VREFO-L R486 4.7K_5%_4

LINE1-VREFO-R R487 4.7K_5%_4

LINE1-R C494 4.7u/6.3V_6 ADOGND

Codec PWR 5V(ADO) Mute(ADO)


+AZA_VDD +1.5V

R488
1K_5%_4
2

D13
DIGITAL ANALOG
PD# 2 1 3 1 PCH_AZ_CODEC_RST#

+5V +5VA Q21

1 2
R489
*10K_5%_4
C495
*1u/10V_4
*RB500V-40

D14
*PJA138K
Codec PWR 1.5V(ADO)
L3
HCB2012KF-220T60 2 1
AMP_MUTE# 22
C496 C497 C498 C499
*0.1u/16V_4 *10u/6.3V_6 *10u/6.3V_6 *0.1u/16V_4 RB500V-40 +1.5VA

DIGITAL ANALOG
A A
ADOGND
Internal Speaker 4 ohm : 40mil for each signal +1.5V
L4
1
HCB1608KF-121T30
2

40mil for each signal


CN6 C500
5

50278-00401-001 1u/6.3V_4
R_SPK+ R490 *Short_0603 R_SPK+_1
R_SPK- R491 *Short_0603 R_SPK-_1 1
L_SPK- R492 *Short_0603 L_SPK-_1 2
L_SPK+ R493 *Short_0603 L_SPK+_1 3
4
Quanta Computer Inc.
6

C501 C502 C503 C504


1000p/50V_4 1000p/50V_4 1000p/50V_4 1000p/50V_4
PROJECT : ZAV
Size Document Number Rev
1A
3/24 Stuff for EMI Audio Codec/HP/SPK/Hole
Date: Wednesday, March 15, 2017 Sheet 17 of 34
5 4 3 2 1
5 4 3 2 1

SATA HDD SATA HDD Re-driver SATA ODD (ODD@)


23 25

21
20120921 change Cn10 Pin define following Z09.
EQ2
H - 14dB
X - 0dB
L - 7dB +601_VCC
18
EQ1
DEVSLP0_R R496 *0_5%_4 H - 14dB R494 4.7K_5%_4 EQ2 R495 *4.7K_5%_4
1 DEVSLP0 6 X - 0dB R497 *4.7K_5%_4 EQ1 R498 *4.7K_5%_4

20
2 120mil +5V_HDD R501 *Short_0805 +5V
L - 7dB
R499 4.7K_5%_4 DEW1 R500 *4.7K_5%_4
3 ODD@132F18-100000-A2-R
D 4 C505 DEW1 CN1 D
5 C506 C507 C508 C509 H - Long Duration R502 *4.7K_5%_4 DE1 R503 *4.7K_5%_4 18
6 X - NC (Long) EC_ODD_EJ# 22
*100u/6.3V_12 10u/6.3V_6 *0.1u/16V_4 *0.1u/16V_4 0.01u/50V_4 R504 *4.7K_5%_4 DE2 R505 *4.7K_5%_4 17
7 L - Short Duration
R506 4.7K_5%_4 DEW2 R507 *4.7K_5%_4 16 R735 ODD@10K_5%_4
8 +3V
15 +5VODD R733 *Short_0805 +5V
9 DE1 14
10 R763 GS_N@0_5%_4 H - -2dB R508 *4.7K_5%_4 EN R509 4.7K_5%_4 13 C721 C726 C733 C730 C737 C740
11 X - -4dB 12
12 R510 *Short_0402
L - 0dB 11 ODD@0.01u/50V_4
ODD@0.01u/50V_4
*ODD@0.1u/16V_4
*ODD@0.1u/16V_4
ODD@10u/6.3V_6*ODD@100u/6.3V_12
13 ACCEL_INT2 20
10
14 SATA_RXP0_CN Reserve 0 ohm to GND in ACCEL_INT2 pin DE2 9 C803 *ODD@15p/50V_4
15 Stuff 0 ohm to GND in non G sensor SKU H - -2dB 8 ODD_PRSNT# 4
SATA_RXN0_CN Connect to G-sensor INT2 ODD_PRSNT#_C R734 *ODD@33_5%_4
16 No stuff 0 ohm(keep NC) in G sensor SKU X - -4dB 7 R216 *ODD@10K_5%_4 C804 *ODD@180p/50V_4
17 L - 0dB +3V
SATA_TXN0_CN 6 SATA_RXP1_C C743 ODD@0.01u/50V_4
18 5 SATA_RXP1 6
SATA_TXP0_CN SATA_RXN1_C C744 ODD@0.01u/50V_4
19 SATA_RXN1 6
DEW2 SW7 - EN 4

DEW1
20 H - Long Duration H - Enabled

EQ2

EQ1
3 SATA_TXN1_C C749 ODD@0.01u/50V_4 SATA_TXN1 6
X - NC (Long) L - Standby Mode 2 SATA_TXP1_C C751 ODD@0.01u/50V_4 SATA_TXP1 6
26 24
22

L - Short Duration 1
+601_VCC
GS12201-1011-7H
CN7

20
19
18
17
16
Co-Layout Co-Layout

19
VCC#2
EQ2
GND#3
EQ1
DEW1
21
R519 *0_5%_4 SATA_TXP0_C C806 *0.01u/50V_4 SATA_TXP0_CN SATA_TXP0_IN 1 PPAD
6 SATA_TXP0 RX1P
R520 *0_5%_4 SATA_TXN0_C C807 *0.01u/50V_4 SATA_TXN0_CN SATA_TXN0_IN 2 15 SATA_TXP_OUT
6 SATA_TXN0 RX1N TX1P
R521 *0_5%_4 SATA_RXN0_C C808 *0.01u/50V_4 SATA_RXN0_CN 3 14 SATA_TXN_OUT
6 SATA_RXN0 GND#1 TX1N
R522 *0_5%_4 SATA_RXP0_C C809 *0.01u/50V_4 SATA_RXP0_CN SATA_RXN0_IN 4 13
6 SATA_RXP0 TX2N GND#2
C SATA_RXP0_IN 5 12 SATA_RXN_OUT C
SATA_TXP0 C510 0.01u/50V_4 SATA_TXP0_IN SATA_TXP_OUT C514 0.01u/50V_4 TX2P RX2N 11 SATA_RXP_OUT
SATA_TXN0 C511 0.01u/50V_4 SATA_TXN0_IN SATA_TXN_OUT C515 0.01u/50V_4 DEW2 6 RX2P
SATA_RXN0 C512 0.01u/50V_4 SATA_RXN0_IN SATA_RXN_OUT C516 0.01u/50V_4 EN 7 DEW2 22
Re-Driver EN GND#4
+3V +601_VCC SATA_RXP0 C513 0.01u/50V_4 SATA_RXP0_IN SATA_RXP_OUT C517 0.01u/50V_4 DE2 8 23
DE1 9 DE2 GND#5 24
10 DE1 GND#6 25
+601_VCC VCC#1 GND#7
R523 *Short_0402 26
GND#8
Near to U24 pin-10 and pin-20 as close as possible
C518 C519 C520 C521 C522 C814

10u/6.3V_6 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 0.1u/16V_4 0.1u/16V_4 U24


SN75LVCP601RTJR

TPM NPCT650 (TPM@) SP@ BOM周周上NPCT650 POA (POA@) Change Power to +3VPCU 4/26
A,B,C P/N:AL009655K01(SLB9655TT1.2- FW4.31) POA_PWR
POA_PWR
RAMP P/N: AL000650K01 (NPCT650AAAWX) +3VPCU
+3V3_TPM +3V3_TPM_VSB +3V_S5
SEL OE# Y+ Y-
+3V_S5 C765 *POA@2.2u/16V_6
X H Hi-Z Hi-Z Spec define: High Active +3V_LDO_EC R663 *Short_0402
+5VPCU
AL000650K01 :NPCT650AAAWX R524 *Short_0603 L L M+ M- but USBON# is Low Active R664 *POA@0_5%_4
C523 TPM@10u/6.3V_6 R525 *Short_0603
C524 TPM@0.1u/16V_4 H L D+ D- R665 *POA@0_5%_4

1
C525 TPM@0.1u/16V_4 C526 TPM@10u/6.3V_6 R667
B B
C527 TPM@0.1u/16V_4 C528 TPM@0.1u/16V_4 Q34 *POA@0_5%_4
TPMM 1.2 AL009655K01 R666 POA@10K_5%_4 2 POA@DMP2130L-7
22 POA_FP_PWREN#
TPMM 2.0 AL000650K01
22
14
8

U25 POA_PWR_C

3
20mil 20mil
VSB
VHIO#2
VHIO#1
VDD1

C766 POA_PWR_R R668 *Short_0402

*POA@0.01u/50V_4
7,19,22 LPC_LAD3 LPC_LAD3 15 4 TPM_PP TP54
LAD3 PP C761 C762
7,19,22 LPC_LAD2 LPC_LAD2 18 3 GPX TP55
LPC_LAD1 21 LAD2/SPI_IRQ GPX/GPIO2 30 TP56 POA@4.7u/6.3V_4 POA@0.01u/50V_4
7,19,22 LPC_LAD1 LAD1/MOSI GPIO1/SCL
LPC_LAD0 24
Co-Layout

10
7,19,22 LPC_LAD0 LAD0/MISO
7,19,22 LPC_LFRAME# LPC_LFRAME# 20 29 TP57
IRQ_SERIRQ 27 LFRAME/SCS SDA/GPIO0 6 TPM_BADD
7,22 IRQ_SERIRQ SERIRQ GPIO3/BADD 8
7 PCLK_TPM PCLK_TPM 19 5 R526 *TPM@10K_5%_4 6 USB2P8 R669 *POA@0_5%_4 USB2P8_U USB2P8_R R673 *POA@0_5%_4 USB2P8_CN USB2P8_CN
LCLK/SCLK TEST R670 *POA@0_5%_4 USB2N8_U USB2N8_R R674 *POA@0_5%_4 USB2N8_CN USB2N8_CN 7
6 USB2N8 6
CLKRUN# R527 *Short_0402 TPM_CLKRUN# 13 2
7,22 CLKRUN# CLKRUN/GPIO04/SINT NC1 5
8,14,19,21,22 PLTRST# PLTRST# R528 *Short_0402 TPM_LRESET# 17 7 R671 *Short_0402 USB2P8_C R675 *Short_0402 R677 *Short_0402
LRESET/SPI_RST/SRESET NC2 22 POA_EN# 4
LPCPD 28 10 R672 *Short_0402 USB2N8_C R676 *Short_0402 R678 *Short_0402
LPCPD NC3 22 POA_PWR_INT# 3
11 R679 *Short_0402
NC4 22 POA_AUTH_ERR 2
26 12 R680 *Short_0402
NC7 Reserved U34 22 POA_POWERREQ 1
31 25 BADD SELECTION
NC8 NC6
GND1
GND2
GND3
GND4

3/4 EMI request add 33p near TPM IC


EPAD

0 EEh - EFh CN20

9
1 7Eh - 7Fh +3VPCU USB2P8_U 1 4 TP74 POA@196241-08021-3
C529 Y+ M-
USB2N8_U 2 5 TP75
CLKRUN# TPM@NPCT650ABAYX 3 Y- M+ 6 USB2N8_R
33

9
16
23
32

'1' - pin is left open. R681 *POA@0_5%_4 R682 *POA@10_5%_4 9 GND D- 7 USB2P8_R
+3V3_TPM '0' - pin is pulled down. 10 VDD D+ 8 R683 *POA@0_5%_4
22,24,26,30 MAINON SEL OE

1
TPM@33p/50V_4
A A
LPCPD R529 *TPM@4.7K_5%_4 C763 C764 EC2 EC3
*POA@AZ5725-01F.R7G *POA@AZ5725-01F.R7G
*POA@0.01u/50V_4 *POA@0.1u/16V_4 *POA@PI3USB103ZLEX

2
Change P/N 12/14

Quanta Computer Inc.


PROJECT : ZAV
Size Document Number Rev
1A
HDD/ODD/TPM/POA
Date: Wednesday, March 15, 2017 Sheet 18 of 34
5 4 3 2 1
5 4 3 2 1

NGFF_M.2 WiFi & BT (NGF)


19
+3VPCU 6,9,15,17,18,20,21,22,23,24
+1.5V 9,17,30
+3V 2,4,6,7,8,9,11,14,15,16,17,18,20,21,22,24,25,26,27,30

76

78
CN8 +WL_VDD +WL_VDD
APCI0076-P001A

76

78
1 2
USB2P5 3 1 2 4 C530 10u/6.3V_6
6 USB2P5 5 3 4 6
USB2N5 C531 0.1u/16V_4
6 USB2N5 7 5 6 8 C532 0.1u/16V_4
9 7 8 10 C533 0.1u/16V_4
11 9 10 12 C534 0.1u/16V_4
13 11 12 14
15 13 14 16
17 15 16 18
19 17 18 20
21 19 20 22
D 21 22 D
23
23

32
33 32 34
PCIE6_TXP_WLAN35 33 34 36
6 PCIE6_TXP_WLAN 37 35 36 38
PCIE6_TXN_WLAN
6 PCIE6_TXN_WLAN 39 37 38 40
PCIE6_RXP_WLAN 41 39 40 42 WIFI_SUSCLK
6 PCIE6_RXP_WLAN 41 42
PCIE6_RXN_WLAN 43 44 IOAC No Stuff
6 PCIE6_RXN_WLAN 45 43 44 46 C535 180p/50V_4
CLK_PCIE_WLANP 47 45 46 48
6 CLK_PCIE_WLANP 47 48
CLK_PCIE_WLANN 49 50 R536 *0_5%_4
6 CLK_PCIE_WLANN 49 50 IOAC_RST# 14,22
51 52 WLAN_RST# R537 *Short_0402 PLTRST#
51 52 PLTRST# 8,14,18,21,22
WLAN_CLKREQ# 53 54 BT_EN
53 54 BT_EN 22
WLAN_WAKE_R# 55 56 RF_EN
55 56 RF_EN 22
57 58
59 57 58 60
61 59 60 62
63 61 62 64 LPC_LAD0_C R538 *Short_0402 LPC_LAD0
65 63 64 66 LPC_LAD0 7,18,22
LPC_LAD1_C R539 *Short_0402 LPC_LAD1
For Debud Card use 67 65 66 68 LPC_LAD2_C R540 *Short_0402 LPC_LAD2
LPC_LAD1 7,18,22
69 67 68 70 LPC_LAD2 7,18,22
LPC_LAD3_C R541 *Short_0402 LPC_LAD3
69 70 LPC_LAD3 7,18,22
7 CLK_PCI_LPC CLK_PCI_LPC R542 *0_5%_4 CLK_PCI_LPC_C 71 72
LPC_LFRAME# R543 *0_5%_4 LPC_LFRAME#_C 73 71 72 74
7,18,22 LPC_LFRAME# 73 74 +WL_VDD Rev:D change to shortpad
75
75
77

79
77

79
Leakage circuit (MPC)
+3V +WL_VDD +3V +WL_VDD

Low Mini card +3V power enable


R530 R531
High Mini card +3V power disable APU Internal PU 4.7K_5%_4 4.7K_5%_4 R532

5
C APU External nu-PU Q22A IOAC C
2N7002KDW
*10K_5%_4
S0
WLAN_CLKREQ# 4 3
S0 PCIE_CLKREQ_WLAN# 6

2
Reserve only for Intel module no need to stuff by default 11/24 IOAC Q22B
2N7002KDW EC_PCU
WLAN_WAKE_R# 1 6
S0 IOAC_WLAN_WAKE# 22

R535
R533 *0_5%_4
R534 *0_5%_4
U26 +3V_S5 PCIE_LAN_WAKE# 8,14
+WL_VDD
*0_5%_4
+3V_S5 R548 *10K_5%_4 1 NC VCC 5 S0
WIFI card reset (non-IOAC)
R549 WIFI card reset (IOAC)
SUSCLK 2 A C542 *10K_5%_4 Debug card reset
6 SUSCLK
*0.1u/16V_4 Stuff
+WL_VDD +3V
3 GND Y 4 WIFI_SUSCLK
R545 *Short_0805

*74AUP1G07GW C537 C538 C539 C540


*10u/6.3V_6 *0.1u/16V_4 *0.1u/16V_4 *0.1u/16V_4

+3V3_SATA_N1 +3V
NGFF_M.2 SSD (NGF) R552 *Short_0805 C545 SSD@10u/6.3V_6
C546 SSD@0.1u/16V_4
C547 SSD@10u/6.3V_6
C548 SSD@0.1u/16V_4
C549 SSD@0.1u/16V_4
C550 SSD@0.1u/16V_4
B C551 SSD@0.1u/16V_4 B

+3V3_SATA_N1
CN9
76

78

1 2
PCIE9_RXN R558 *Short_0402 PCIE9_RXN_N 3 4
6 PCIE9_RXN 5 6 +3V3_SATA_N1
PCIE9_RXP R557 *Short_0402 PCIE9_RXP_N
6 PCIE9_RXP 7 8 TP58
PCIE9_TXN C554 SSD@0.1u/16V_4 PCIE9_TXN_N 9 10
6 PCIE9_TXN 11 12
PCIE9_TXP C555 SSD@0.1u/16V_4 PCIE9_TXP_N
6 PCIE9_TXP 13 14
PCIE10_RXN R553 *Short_0402 PCIE10_RXN_N 15 16
6 PCIE10_RXN 17 18
PCIE10_RXP R554 *Short_0402 PCIE10_RXP_N
6 PCIE10_RXP 19 20
PCIE10_TXN C552 SSD@0.1u/16V_4 PCIE10_TXN_N 21 22
6 PCIE10_TXN 23 24
PCIE10_TXP C553 SSD@0.1u/16V_4 PCIE10_TXP_N
6 PCIE10_TXP 25 26
PCIE11_RXN R646 *Short_0402 PCIE11_RXN_N 27 28
6 PCIE11_RXN 29 30
PCIE11_RXP R647 *Short_0402 PCIE11_RXP_N
6 PCIE11_RXP 31 32
PCIE11_TXN C759 SSD@0.1u/16V_4 PCIE11_TXN_N 33 34 R555 *Short_0402 DEVSLP2
6 PCIE11_TXN 35 36 DEVSLP2 6
PCIE11_TXP C760 SSD@0.1u/16V_4 PCIE11_TXP_N DEVSLP_N1 R556 *SSD@10K_5%_4
6 PCIE11_TXP 37 38
PCIE12_RXP R645 *Short_0402 PCIE12_RXP_N 39 40
SSD Pinedefine Rx+ Rx- 6 PCIE12_RXP PCIE12_RXN R644 *Short_0402 PCIE12_RXN_N 41 42
6 PCIE12_RXN 43 44
PCIE12_TXN C757 SSD@0.1u/16V_4 PCIE12_TXN_N 45 46
6 PCIE12_TXN 47 48
PCIE12_TXP C758 SSD@0.1u/16V_4 PCIE12_TXP_N NGFF1_RST# R559 *Short_0402 PLTRST#
6 PCIE12_TXP 49 50 PCIE_CLKREQ_NGFF1# PCIE_CLKREQ_NGFF1# 6
CLK_PCIE_NGFF1_N 51 52
6 CLK_PCIE_NGFF1_N 53 54
6 CLK_PCIE_NGFF1_P CLK_PCIE_NGFF1_P TP59
55 56 TP60
+3V3_SATA_N1 57 58

NGFF3_DET R560 *SSD@10K_5%_4 +3V3_SATA_N1


6 NGFF3_DET
R561 SSD@1M_5%_4

NGFF3_PEDET 67 68
69 70
A A
71 72
3

2 R562 73 74
75
77

79

Q25 *SSD@0_5%_4 SSD@NGFF_SSD


SSD@2N7002K
1

Quanta Computer Inc.


PROJECT : ZAV
Size Document Number Rev
1A
NGFF WiFi BT/SSD
Date: Wednesday, March 15, 2017 Sheet 19 of 34
5 4 3 2 1
5 4 3 2 1

KEYBOARD TOUCHPAD BOARD CONN (TPD I2C/PS2 co-lay) 1C-2 2014/01/13 Change TP power rail from +3V_S51C-4 2014/01/15 reserve TP power rail +3V_S5.

20
to +3V_SUS.

29
<EMI> (TPD) R563 *Short_0603 1C1-1 2014/02/17 Add Q47 for PTP
power EN and soft up R694\C713.
MX0 MX4 C779 *220p/50V_4 TPD->100kHz,TS=400Khz R564 *Short_0402 and C712\C686.
1 MX0 22 +3V_S5
MX1 MX5 C780 *220p/50V_4 Intel design guide suggestion +3V_S5 1 3
2 MX1 22
MX2 MX6 C781 *220p/50V_4 MCP PIN 10u.
3 MX2 22
MX3 MX7 C782 *220p/50V_4 Per inch 3u TS=3x5inch C558 Q26 *DMP2130L-7
4 MX3 22
MX4 MY3 C783 *220p/50V_4 0.1u/16V_4 C556 C557
MX4 22 400kHz10~100u =2.4~0.4k.

2
5 MX5 MY2 C784 *220p/50V_4 R565 R566
MX5 22 100Khz 10~100u=9k~1k. 0.22u/25V_6 0.1u/16V_4
6 MX6 MY1 C785 *220p/50V_4 10K_5%_4 10K_5%_4

9
7 MX6 22
MX7 MY0 C786 *220p/50V_4 R567 *0_5%_4 C559 *1000p/50V_4 50mil
8 MX7 22 22 PTP_PWR_EN#
MY17 MY7 C787 *220p/50V_4 +TPVDD
D 9 MY17 22 1 D
MY16 MY6 C788 *220p/50V_4 R568 *Short_0402 TPCLK_R
10 MY16 22 22 TPCLK 2
MY15 MY5 C789 *220p/50V_4 R569 *Short_0402 TPDATA_R
11 MY15 22 22 TPDATA 3
MY14 MY4 C790 *220p/50V_4
12 MY14 22 4
MY13 MY11 C791 *220p/50V_4 I2C_TP_SDA_R
13 MY13 22 5
MY12 MY10 C792 *220p/50V_4 R570 *Short_0402 +TPVDD I2C_TP_SCL_R
14 MY12 22 6
MY11 MY9 C793 *220p/50V_4 TPD_INT#
15 MY11 22 7
MY10 MY8 C794 *220p/50V_4 4 3 *2.2K_5%_4 R571 C560 C561 TPD_EN CN11
16 MY10 22 8
MY9 MX0 C795 *220p/50V_4 *0.1u/16V_4 *0.1u/16V_4 51653-0080N-001
17 MY8
MY9 22
MX1 C796 *220p/50V_4 S5 Q27A S5 *2.2K_5%_4 R572

10
18 MY8 22
MY7 MX2 C797 *220p/50V_4 *TDI@DMN601DWK-7
MY7 22

5
19 MY6 MX3 C798 *220p/50V_4 I2C_TP_SDA_R
20 MY5
MY6 22
MY15 C799 *220p/50V_4
4 I2C0_SDA I2C PU at CPU side
21 MY5 22 22 TPD_EN
MY4 MY14 C800 *220p/50V_4 4 I2C0_SCL 1 6 I2C_TP_SCL_R
22 MY4 22
MY3 MY13 C801 *220p/50V_4
23 MY3 22
MY2
MY2 22
MY12 C802 *220p/50V_4 Q27B
4,22 TPD_INT#
1A-5 2013/10/18 Change CN21 Pin8 for
24 MY1 *TDI@DMN601DWK-7
MY1 22 I2C/PS2 TPD idendify.

2
25 MY0
26 MY0 22
2013/10/29 Change CN21 power rail to S5
27 R573 *Short_0402
28
change Q42 direction and net name,
R574 33_5%_4
NBSWON# 22 +3V_S5 1A-12 reseve PS2 PU to +3V.
30

+3VPCU
CN10 D15
*VPORT 0603 220K-V05 C562
196153-28021-35 180p/50V_4 RP1 CPU FAN (THM)
2

10 1 MX3
Prevent ESD/EOS MX4 9 2 MX1
Layout near MX6 8 3 MX2
MX5 7 4 MX0
device 6 5
C MX7 C
+3V +5V +3V +5V
10K_4_10P8R

R576 R731 R732 R575


KB_BL LED (KBL@) 1K_5%_4 10K_5%_4 10K_5%_4
*Short_0805

CN12

5
+5V +5V 50278-00401-001
22 FAN1_RPM

2
+5V_FAN
1
C564 *KBL@2.2u/6.3V_6 1 3 FAN_PWM_C 2
R577 22 FAN_PWM 3
KBL@10K_5%_4 Q40 4
30mil
1

METR3904-G

6
Q29
2 KBL@DMP2130L-7
6
3

CN13
20mil 20mil
3

KBL@50591-00401-001
2 +5V_KB 4
22 KB_BL_LED
3
Q30 2
KBL@LTC044EUBFS8TL C568 C569 1
1

KBL@4.7u/6.3V_6 KBL@0.01u/50V_4
5

B B

POWER LED(UIF)
G-sensor (GS@)
+3V R581 *Short_0603 +G_SEN_PW
U28
C570 C571 1 2
GS@0.1u/16V_4 14 Vdd_IO NC#1 3
GS@10u/6.3V_6
VDD NC#2

10
For EJ15 change to D/B
GS@RB500V-40 1 2 D18 ACCEL_INTA_R 11 RES 15
to CPU 4 ACCEL_INTA INT1 ADC2
to SATA HDD GS@RB500V-40 1 2 D19 ACCEL_INT2_R 9
18 ACCEL_INT2 INT2
R587 *Short_0402 7
CLK_SDATA R589 *Short_0402 G_MBDATA_R 6 SDO/SA0 5
7,11 CLK_SDATA SDA/SDI/SDO GND#1
7,11 CLK_SCLK CLK_SCLK R590 *Short_0402 G_MBCLK_R 4 12
A
SCL/SPC GND#2 13 A
ACCEL_INTA +G_SEN_PW 8 ADC3 16
+G_SEN_PW CS ADC1
G_MBDATA_R C573 GS@33p/50V_4

G_MBCLK_R C575 GS@33p/50V_4 GS@LIS3DHTR


C574
GS@22p/50V_4
R595 *GS@4.7K_5%_4 G_MBDATA_R
Quanta Computer Inc.
+G_SEN_PW
R596 *GS@4.7K_5%_4 G_MBCLK_R
PROJECT : ZAV
Size Document Number Rev
KB/BL/TP/FAN/G-sensor 1A

Date: Wednesday, March 15, 2017 Sheet 20 of 34


5 4 3 2 1
5 4 3 2 1

USB3.0 (MB/UB3)
+5V_S5
6 USB3_RXN1
R765 *Short_0402
C576 *1.6p/50V_4

USB3_RXN1_C
USBPWR0
USBPWR0

USB3_TXP1_C 1
U29
USB3_ESD_AZ1065-06F.R7G
21

11

12
6 USB_OC0# I/O-1 10 USB3_TXN1_C
R764 *Short_0402 USB3_RXP1_C CN14
6 USB3_RXP1 2 I/O-6
C578 U30 USB2N1 C577 *1.6p/50V_4 5 Shield Shield VDD 9
G524B2T11U TP61 TP62 StdA_SSRX- GND#1
1u/6.3V_4 4 C579 3
5 3 USB2P1 D22 2 1
*AZ5725-01F.R7G 6 GND
0.1u/16V_4 NC#1 8
IN OCB TP66 *PAD StdA_SSRX+ NC#2
R704 15_5%_4 USB2P1_C 3 USB2N1 4
USBPWR0 6 USB2P1 7 D+ I/O-2 7
TP64 *PAD USB3_RXN1 TP65 USB2P1
R705 15_5%_4 USB2N1_C 2 GND_Drain
USB3_RXP1 5 I/O-5
Close USB3.0

GND#2
4 1 6 USB2N1 D- I/O-3
USBON# TP67 *PAD USB3_RXP1 TP68 *PAD D23 2 1
*AZ5725-01F.R7G 8 6 USB3_RXN1
22 USBON# EN GND OUT 1 StdA_SSTX- I/O-4
D D
VBUS
2 TP69 *PAD USB3_TXN1_C TP70 *PAD R767 *Short_0402 C583 0.1u/16V_4 USB3_TXN1_C 9
6 USB3_TXN1 StdA_SSTX+

11
Shield Shield
Enable: Low Active /2.5A C580 C581 C582 TP71 *PAD USB3_TXP1_C TP72 *PAD R766 *Short_0402 C584 0.1u/16V_4 USB3_TXP1_C
6 USB3_TXP1
470p/50V_4 0.1u/16V_4 100u/6.3V_12 53930-00902-V01
BCD:AL002822000

10

13
*PAD *PAD
GMT:AL000524007 C585 C586
*1.6p/50V_4 *1.6p/50V_4 USB protection diodes for ESD.
12/18 Add for ESD
as close as possible to USB connector pins.

USB2.0 (DB/UB2) eMMC


+5V_S5 +1.8V

6 USB_OC1#

EMC@20K_5%_4

EMC@20K_5%_4
EMC@20K_5%_4
EMC@20K_5%_4
EMC@20K_5%_4
EMC@20K_5%_4
EMC@20K_5%_4
EMC@20K_5%_4
EMC@20K_5%_4
EMC@20K_5%_4
EMC@20K_5%_4
*EMC@20K_5%_4
Pull-up requires on Data and Command lines.
U31 On Clock a pull-down is recommended instead
C587
G524B2T11U of a pull-up resistor.
1u/6.3V_4
5 3
IN OCB
USBPWR1
Close USB2.0
USBON# 4 1
EN GND OUT
+1.8V

R751
R752
R753
R754
R755
R756
R757
R758
R759
R760
R761
R762
2 U33
Enable: Low Active /2.5A C588 C589 C590 R398 *Short_0402 +1.8V_EMMC 20 mils K6 W6 EMMC_CLK_R R399 *Short_0402 EMMC_CLK 8
470p/50V_4 0.1u/16V_4 AA5 VCCQ_1 CLK W5 EMMC_CMD
*100u/6.3V_12
BCD:AL002822000 W4 VCCQ_2 CMD EMMC_CMD 8
GMT:AL000524007 C399 C400 C401 C402 C403 Y4 VCCQ_3 H3 EMMC_DATA_0
C
AA3 VCCQ_4 DAT0 H4 EMMC_DATA_0 8 C
EMC@0.1u/16V_4 EMC@0.1u/16V_4 EMC@1u/6.3V_4 EMC@0.1u/16V_4 EMC@1u/6.3V_4 EMMC_DATA_1
USBPWR1 VCCQ_5 DAT1 H5 EMMC_DATA_1 8
EMMC_DATA_2
+3V T10 DAT2 J2 EMMC_DATA_2 8
EMMC_DATA_3

R400 *Short_0402 +3V_EMMC 20 mils U9


M6
VCC_1
VCC_2 Power Signals DAT3
DAT4
J3
J4
EMMC_DATA_4
EMMC_DATA_5
EMMC_DATA_3
EMMC_DATA_4
8
8
35

N5 VCC_3 DAT5 J5 EMMC_DATA_5 8


EMMC_DATA_6
VCC_4 DAT6 J6 EMMC_DATA_6 8
EMMC_DATA_7
1 K2 DAT7 EMMC_DATA_7 8
C591 C405 C406 C407 C408 C409 +VDDI_EMMC
2 VDDI U5 EMMC_RST# R661 *EMC@0_5%_4
3 47u/6.3V_8 EMC@0.1u/16V_4 EMC@0.1u/16V_4 EMC@1u/6.3V_4 EMC@1u/6.3V_4 EMC@0.1u/16V_4 RESET EMMC_RST 6
4 R10 AA6
5 C410 U8 VSS_1 VSSQ_1 Y5 2 1
6
7
8
+3VPCU
PWRLED# 22
EMC@0.1u/16V_4
M7
P5
VSS_2
VSS_3
VSS_4
GND VSSQ_2
VSSQ_3
VSSQ_4
K4
AA4
Y2
D2 EMC@RB500V-40 PLTRST# 8,14,18,19,22

9 SUSLED# 22 VSSQ_5
10 BATLED0# 22 Power LED
11 BATLED1# 22 L4 R1
12 A4 NC#L4 NC_70 R2
13 Vendor P/N NC_1 NC_71
A6 R3
14 USB2P3 6 A9 NC_2 NC_72 R5
DB/UB2 EMMC_RCLK_R R657 *Short_0402 EMMC_RCLK EMMC_RCLK 8
15 USB2N3 6 A11 NC_3 NC_73 R12
SAMSUNG 64G AKE3UZFT502 R651 *EMC@20K_5%_4 +1.8V
16 B2 NC_4 NC_74 R13 R768 EMC@20K_5%_4
17 B13 NC_5 NC_75 R14
18 USB2P4 6 D1 NC_6 NC_76 T1
19 USB2N4 6 DB/UB2 Samsung 32G NC_7 NC_77
D14 T2
20 H1 NC_8 NC_78 T3
21 H2 NC_9 NC_79 T5 R658 *EMC@0_5%_4
22 HP_JD# 17 HYNIX 64G AKE3TZ-TW00 NC_10 NC_80
R659 *EMC@0_5%_4 H6 T12
23 H7 NC_11 NC_81 T13
24 H8 NC_12 NC_82 T14
25 SLEEVE 17 HYNIX 32G AKE3SZ-TW09 NC_13 NC_83
H9 U1
26 H10 NC_14 NC_84 U2
27 H11 NC_15 NC_85 U3
28 RING2 17 Phone Jack Sandisk 32G NC_16 NC_86
H12
29 H13 NC_17 U6
30 H14 NC_18 NC_87 U7
B B
31 HP-L3 17 J1 NC_19 NC_88 U10
32 J7 NC_20 RFU#7 U12
33 HP-R3 17 J8 NC_21 NC_90 U13
34 J9 NC_22 NC_91 U14
CN18 51619-03401-001 J10 NC_23 NC_92 V1
36

J11 NC_24 NC_93 V2


J12 NC_25 NC_94 V3
J13 NC_26 NC_95 V12
J14 NC_27 NC_96 V13
K1 NC_28 NC_97 V14
K3 NC_29 NC_98 W1
ADOGND K5
K7
K8
NC_30
NC_31
NC_32
NC NC_99
NC_100
NC_101
W2
W3
W7
K9 NC_33 NC_102 W8
K10 NC_34 NC_103 W9
K11 NC_35 NC_104 W10
K12 NC_36 NC_105 W11
K13 NC_37 NC_106 W12
K14 NC_38 NC_107 W13
L1 NC_39 NC_108 W14
L2 NC_40 NC_109 Y1
L3 NC_41 NC_110 Y3
+1.8V 15,30 L12 NC_42 NC_111 Y6
+5V_S5 13,24,26,27,28,29,31 L13 NC_43 NC_112 Y7
L14 NC_44 NC_113 Y8
M1 NC_45 NC_114 Y9
M2 NC_46 NC_115 Y10
M3 NC_47 NC_116 Y11
M5 NC_48 NC_117 Y12
M8 NC_49 NC_118 Y13
M9 RFU#3 NC_119 Y14
M10 RFU#4 NC_120 AA1
M12 RFU#2 NC_121 AA2
M13 NC_53 NC_122 AA7
M14 NC_54 NC_123 AA8
A
N1 NC_55 NC_124 AA9 A
N2 NC_56 NC_125 AA10
N3 NC_57 RFU#1 AA11
N10 NC_58 NC_127 AA12
N12 RFU#5 NC_128 AA13
N13 NC_60 NC_129 AA14
N14 NC_61 NC_130 AE1
P1 NC_62 NC_131 AE14
P2 NC_63 NC_132 AG2
P3 NC_64 NC_133 AG13
P10
P12
NC_65
RFU#6
NC_134
NC_135
AH4
AH6
Quanta Computer Inc.
P13 NC_67 NC_136 AH9
P14 NC_68 NC_137 AH11 PROJECT : ZAV
NC_69 NC_138 Size Document Number Rev
1A
EMC_SP@H26M52002EQR
USB Port/eMMC/LED/DB
Date: Wednesday, March 15, 2017 Sheet 21 of 34
5 4 3 2 1
5 4 3 2 1

EC(KBC) R597 *0_5%_4

22
+3V_LDO_EC
1 2 +A3VPCU
L5 BLM15AG121SN1D +3VPCU_ECPLL 1 2 +3VPCU_EC +3V_S5 R598 *Short_0402 VSTBY_FSPI
C593 11/11 FAE L6 BLM15AG121SN1D
0.1u/16V_4 suggestion
pin106 +3V_RTC C592 (For PLL Power)
ECAGND change to 0.1u/16V_4
+3VPCU_EC
12 mils SB_ACDC 8 Prevent ESD/EOS Layout near device
R601 2.2_5%_6 +3VPCU_EC
+3V_LDO_EC POA_EN# 18
R602 33_5%_4
BT_EN 19
C594 C595 C596 C597 C598 C599
+3VPCU_EC and +3V_RTC POA_PWR_INT# 18
0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 C600 +3V_LDO_EC
minimum trace width 12mils. POA_POWERREQ 18
180p/50V_4
EC_TypeC_CHG_HI 13 Prevent ESD/EOS Layout near device
VSTBY_FSPI USBON# 21
R604 33_5%_4 S5_ON R599 10K_5%_4
TPD_EN 20
D +3V R606 *2.2_5%_6 +3V_EC PANEL_LED_EN D
PANEL_LED_EN 31
+3V_S5 USB_CHARGE_ON NBSWON# R600 10K_5%_4
R607 2.2_5%_6 C601 TP78 C602
CLKRUN# 7,18
180p/50V_4
7,18,19 LPC_LAD0
0.1u/16V_4 MAINON R608 100K_5%_4
7,18,19 LPC_LAD1 U32

114
121

106

127
11
26
50
92

74

84
83
82

19
20

99
98
97
96
93
7,18,19 LPC_LAD2

3
IT8987E/CX 12/16 Add D32 for production-line requset SUSON R609 100K_5%_4
7,18,19 LPC_LAD3 10 110 MBCLK

VSTBY#1
VSTBY#2
VSTBY#3
VSTBY#4
VSTBY#5

VSTBY(PLL)

EGCLK/GPE3
EGCS#/GPE2
EGAD/GPE1

L80HLAT/BAO/GPE0
L80LLAT/GPE7

GPH7
ID6/GPH6
ID5/GPH5
ID4/GPH4
ID3/GPH3
CLKRUN#/ID0/GPH0
VCC

VSTBY_FSPI
AVCC
LAD0/GPM0(3) SMCLK0/GPB3 MBCLK 23
C603 180p/50V_4 9 111 MBDATA LID#_C VRON R610 100K_5%_4
LAD1/GPM1(3) SMDAT0/GPB4 MBDATA 23
8 SM BUS 115 2ND_MBCLK 2ND_MBCLK 7
+3V_LDO_EC 7 LAD2/GPM2(3) SMCLK1/GPC1 116 2ND_MBDATA PCH_SPI_SI_EC R611 *10K_5%_4
LAD3/GPM3(3) SMDAT1/GPC2 2ND_MBDATA 7
22 117 EC_PECR_R R612 43_5%_4 H_PECI 2 D24
8,14,18,19,21 PLTRST# 13 LPCRST#/GPD2 PECI/SMCLK2/GPF6(3) 118 LID#_C R613 33_5%_4 TVM0G5R5M220R_22p PCH_SPI_SO_EC R614 *10K_5%_4
7 CLK_PCI_EC 6 LPCCLK/GPM4(3) SMDAT2/PECIRQT#/GPF7(3) LID# 15
7,18,19 LPC_LFRAME# LFRAME#/GPM5(3) C604 180p/50V_4
Near EC PROCHOT_EC 17 Prevent ESD/EOS Layout near EC
LPCPD#/GPE6
1

C826 0.1u/16V_4
R615 D25 TP73 126 PS/2
100K_5%_4 RB500V-40 7,18 IRQ_SERIRQ
5
15
GA20/GPB5(3)
SERIRQ/GPM6(3) PS2CLK0/CEC/TMB0/GPF0
85
86
IOAC_RST# 14,19 TVS PN: SM BUS PU(KBC)
8 PCH_SUSPWRDNACK ECSMI#/GPD4(3) LPC PS2DAT0/TMB1/GPF1 EC_FPBACK# 15 Priority1: CY000220Z00
23 89
2 SIO_EXT_SCI# TPCLK 20 Priority2: CY402220B00
2

WRST# 14 ECSCI#/GPD3 PS2CLK2/GPF4 90


WRST# GPIO PS2DAT2/GPF5 TPDATA 20
4 +3V_LDO_EC
7 SIO_RCIN# KBRST#/GPB6(3)
C605 16
1u/6.3V_4
19 IOAC_WLAN_WAKE# PWUREQ#/BBO/SMCLK2ALT/GPC7(3)
IT8987E/CX PWM0/GPA0
PWM1/GPA1
24
25 PWRLED# 21
BATLED1# 21 Battery module
MBCLK
MBDATA
R616
R617
4.7K_5%_4
4.7K_5%_4

R618 33_5%_4
20 KB_BL_LED
8 DNBSWON#
113
123 CRX0/GPC0
CTX0/TMA0/GPB2(3) CIR
LQFP PWM2/GPA2
PWM3/GPA3
PWM4/GPA4
28
29
30
31
SUSLED#
SUSLED# 21
BATLED0# 21
MAINON 18,24,26,30
+3V_S5
15 TS_EN PWM5/GPA5
Pin 80 EC_APWROK reserve TP TP79
TS_EN_C PWM 2ND_MBCLK R619 2.2K_5%_4
C606 180p/50V_4 EC_TypeC_EN 80 UMA& VGA SKU 2ND_MBDATA R620 2.2K_5%_4
119 DAC4/DCD0#/GPJ4(3) 47
Prevent ESD/EOS Layout near device 8,25 SUSB# DSR0#/GPG6 TACH0A/GPD6(3) FAN1_RPM 20 Need Stuff
33 48
8 EC_PWROK GINT/CTS0#/GPD5 TACH1A/TMA1/GPD7(3) POA_AUTH_ERR 18
88
15 PCH_BLON_R 81 PS2DAT1/RTS0#/GPF3 120
TS_EN_C
DAC5/RIG0#/GPJ5(3) TMRI0/GPC4(3) SUSON 8
87 124 DGPU_OTP#
14 IOAC_LAN_WAKE# PS2CLK1/DTR0#/GPF2 TMRI1/GPC6(3)
C 109 TP80 C
4 ME_WR# TXD/SOUT0/GPB1
108
17 AMP_MUTE# RXD/SIN0/GPB0
TP83 ODD_POWER 71 107 NBSWON#
ADC5/DCD1#/GPI5(3) PWRSW/GPE4 NBSWON# 20
72 UART port 18
23 ACIN ADC6/DSR1#/GPI6(3) RI1#/GPD0(3) SUSC# 8
73 WAKE UP 21 HWPG
23 TEMP_MBAT# 35 ADC7/CTS1#/GPI7(3) RI2#/GPD1 HWPG 8 H_PROCHOT# 2,23,27
TP87 WLANPWR#
34 RTS1#/GPE5
17 PCBEEP_EC 122 PWM7/RIG1#/GPA7 112
26 DDR4_SUSON_2V5 DTR1#/SBUSY/GPG1/ID7 RING#/PWRFAIL#/CK32KOUT/LPCRST#/GPB7 RSMRST# 8

3
Prevent ESD/EOS Layout near device +1V_S5_ON 95 Q31
25 +1V_S5_ON CTX1/SOUT1/GPH2/SMDAT3/ID2 2
R746 33_5%_4 EC_ODD_EJ_R# 94 Prevent ESD/EOS Layout near device PROCHOT_EC
18 EC_ODD_EJ# CRX1/SIN1/SMCLK3/GPH1/ID1
2N7002K
C805 180p/50V_4 105 R622 33_5%_4
7 PCH_SPI_CLK_EC 101 FSCK/GPG7 RF_EN 19
R623

1
7 SPI_CS0#_UR_ME FSCE#/GPG3
102 EXTERNAL SERIAL FLASH ICMNT 100K_5%_4
7 PCH_SPI_SI_EC 103 FMOSI/GPG4 66 ICMNT 23
C608
7 PCH_SPI_SO_EC FMISO/GPG5 ADC0/GPI0(3) 67 C609 10u/6.3V_6 ECAGND 180p/50V_4
56 ADC1/GPI1(3) 68 DGPU_OPP# TP81
20 MY16 57 KSO16/SMOSI/GPC3(3) ADC2/GPI2(3) 69
20 MY17 KSO17/SMISO/GPC5(3) ADC3/GPI3(3) VRON 8
32 70 LANPWR#
20 FAN_PWM PWM6/SSCK/GPA6 ADC4/GPI4(3) TP82
S5_ON 100 A/D D/A
24,30 S5_ON SSCE0#/GPG2
125 SPI ENABLE
20 PTP_PWR_EN# SSCE1#/GPG0 76
TACH2/GPJ0(3) POA_FP_PWREN# 18
CLK_PCI_EC 36 77 SYS_HWPG
20 MY0 KSO0/PD0 GPJ1(3)
37 78
20 MY1 KSO1/PD1 DAC2/TACH0B/GPJ2(3) PCH_PWROK 8
38 79
20 MY2 KSO2/PD2 DAC3/TACH1B/GPJ3(3) CLR_CMOS 6
39 +3V
R624 20 MY3 40 KSO3/PD3
*22_5%_4
20 MY4
20 MY5
41
42
KSO4/PD4
KSO5/PD5
HWPG(KBC)
20 MY6 KSO6/PD6 KBMX DDR=1.5V, D1 DNP and D2 POP
43 R625
20 MY7
44 KSO7/PD7 DDR=1.35V, D1 POP and D2 DNP
20 MY8 KSO8/ACK# 10K_5%_4
45
20 MY9 KSO9/BUSY
C610 46
20 MY10 KSO10/PE
*10p/50V_4 51 2 D26 1 2 RB500V-40 HWPG
20 MY11 KSO11/ERR# GPJ7 SYS_SHDN# 2,24,30 30 HWPG_1.5V
KSI3/SLIN#
KSI1/AFD#

52 128
KSI0/STB#

KSI2/INIT#

CLOCK R626 33_5%_4


20 MY12 53 KSO12/SLCT GPJ6 TPD_INT# 4,20 2 *RB500V-40
D27 1
VCORE

20 MY13 KSO13 30 HWPG_1.8VS5


VSS#1

VSS#2
VSS#3
VSS#4
VSS#5

54
AVSS

Prevent ESD/EOS Layout near device


KSI4
KSI5
KSI6
KSI7

B 20 MY14 KSO14 B
55 C611 D28 1 2 *RB500V-40
20 MY15 KSO15 26 HWPG_VDDR
180p/50V_4 SM BUS ARRANGEMENT TABLE D29 1 2 *RB500V-40
25 HWPG_1VS5
58
59
60
61
62
63
64
65

27
49
91
104

1ECAGND 75

12

SM Bus 1 Battery D30 1 2 *RB500V-40


24 SYS_HWPG
Output for type-c Apling ridge 20 MX0
reset timming"Low " Active 20 MX1 AJ089870F02 IT8987E/CX
C612 SM Bus 2 PCH/VGA
20 MX2
R627
R628
R629
R630

EC_TypeC_EN R662 *Short_0402 0.1u/16V_4 D32 1 2 *RB500V-40


EC_TypeC_EN_R 13 20 MX3 26 HWPG_2.5V
20 MX4
EC_GND

20 MX5 SM Bus 3
*0_5%_4
*0_5%_4
*0_5%_4

L7
20 MX6
*Short_0402

20 MX7 BLM15AG121SN1D
SM Bus 4
2

Reset SW (FSW) R631 *0_5%_4 +3V_RTC


R633 *0_5%_4 +3VPCU
Battery Detect Switch Reserve no stuff
R635
R634 *0_5%_4 +3V_RTC *10K_5%_4
+3V_LDO_EC
Reserve switch for test WRST#
(MP remove) 23 BI
2 4
R636
R632 1 3
10K_5%_4 100K_5%_4 C613
SW1 SW2 *0.1u/16V_4
6

*POWER_SW Vgs = 1.5V


3

NDT016-G1A-KKKT
NBSWON# 2 3 2 BI_GATE
1 4 Q32
PJA138K Vgs = 1.5V
SW3
3

C614
1
6

A A
3
4

0.1u/16V_4 C615 RESET_SW


*0.1u/25V_6 5 5 2

Q33A Q33B
*PJ4N3KDW *PJ4N3KDW
4

6
2
1

Quanta Computer Inc.


PROJECT : ZAV
6,9,15,17,18,20,21,23,24 +3VPCU
Size Document Number Rev
2,4,6,7,8,9,11,14,15,16,17,18,19,20,21,24,25,26,27,30 +3V
1A
2,3,4,6,7,8,9,13,14,18,19,20,24,26,30 +3V_S5 IT8987E/SW
Date: Wednesday, March 15, 2017 Sheet 22 of 34
5 4 3 2 1
5 4 3 2 1

PJ2
VA

2
PD1
SV1040
VA1 PQ1
AON6414AL

3
VA2
PR3
0.01_1%_0612
+VIN
PQ2
AON6414AL

3
23

S
3 5 2 5 2
4 1 1 1
3

P4SMAFJ20A

0.047u/50V_6
2 C1D 0306

G
0.1u/50V_6
1

PD2

PC5

PC2
PC1 24780_ACN

*0.01u/50V_4
4

4
1000p/50V_4 PR2 PC12 PC7

PC17
D CI2504P1H02-RB-NH *Short_0402 0.1u/50V_6 2200p/50V_4 D
24780_ACP

2
PR1
PC14 PC13 *Short_0402
0.1u/50V_6 2200p/50V_4

PR29 PR28
4.02K_1%_4 4.02K_1%_4
PR4
*Short_0603

C1D 0306

24780_ACP

24780_ACN

PR7
PC36 PC25 PC35 10_1%_6
0.1u/50V_6 0.1u/50V_6 0.1u/50V_6

24780_CMSRC

1
PU1
PR16 3 18 24780_BATDRV

ACN
ACP
20_5%_12 CMSRC BATDRV
17 24780_BATSRC +VIN
BATSRC
C 24780_ACDRV 4 REGN6V C
PR31 ACDRV
REGN6V 866K_1%_4 24780_VCC 28
VCC 24 24780_REGN PC9
ACDET=16.4V REGN 2.2u/10V_6
PC16 PC172 PC170
0.47u/25V_6 2200p/50V_4 10u/25V_8
PR39 PR211 PR11
100K_1%_4 137K_1%_4 *Short_0603 C1D 0306 PQ30
24780_ACDET 6 25 24780_BST AON7410
ACDET BTST

5
PR30 *Short_0402 5 PC15 D
22 ACIN ACOK 0.047u/50V_6 G
MBDATA PR19 *Short_0402 11 26 24780_DH 4
PR40 SDA HIDRV S
100K_1%_4 MBCLK PR17 *Short_0402 12 PR209 BAT-V

1
2
3
SCL PL5 0.01_1%_0612
ICMNT PR32 *Short_0402 7 6.8uH_7x7x3
22 ICMNT IADP 27 24780_LX 1 2 BAT-V
TP1 D/C# PR26 *Short_0402 8 PHASE
IDCHG
PMON PR25 *Short_0402 9
PMON

5
27 PMON
100p/50V_4

100p/50V_4
PQ29 PR33
*100p/50V_4
PC18

PC20

PC37
AON7410 D *4.7_5%_6
CS31542FB14 15.4K 1/16W +-1% (0402) For 78W C1D 0306 G
23 24780_DL 4 PR210 PR208
PR23 LODRV S
CS31272FB17 12.7K 1/16W +-1% (0402) For 95W *Short_0402 *Short_0402
SP@15.4K_1%_4 C1D 0309

1
2
3
CS31002FB26 10K 1/16W +-1% (0402) For 116W 24780_BM# 16
+3VPCU TB_STAT
PR9 10K_5%_4 PR5 PC6 PC19 24780_SRP PC165 PC164 PC166
PC167 24780_CMPOUT 14 *Short_0603 0.1u/25V_4 *680p/50V_6 2200p/50V_4 22u/25V_8 22u/25V_8
0.1u/50V_6 PR15 *10K_5%_4 CMPOUT 20 24780_SRP 24780_SRN
B 24780_ILIM 21 SRP B
ILIM PC3
PC168 PR204 24780_CMPIN 13 CMPIN PR6 0.1u/25V_4

PROCHOT
*100p/50V_4 316K_1%_4 *Short_0603

BATPRES
GND#10
GND#11
PJ1 19 24780_SRN

GND#8
GND#9

GND#1
GND#2
GND#3
GND#4
GND#5
GND#6
GND#7
50458-00801-V02_Header SRN
PC4
BAT-V C1D 0306 0.1u/25V_4
BQ24780SRUYR

35
36
37
38
10

15

22
29
30
31
32
33
34
PR206 PR207
10

BI 22
100K_1%_4 100K_5%_4
PR10 *0_5%_4
8
7
6 PR14 100_5%_4 TEMP_MBAT#
5 TEMP_MBAT# 22
4

PR205
*0_5%_4
PC8

*Short_0402
3

PR8
0.01u/50V_4
2 +3VPCU
1 PR18
1M_5%_4
9

TEMP_MBAT#

PR13 PR12
100_5%_4 100_5%_4 C1D 0306
REGN MAX voltage 6.5V
V_ILIM=20*(VSRP-VSRN)=20*Ichg*Rsr
H_PROCHOT#
MBCLK 22
H_PROCHOT# 2,22,27 =0.793V for 3.965A current limit
A A
MBDATA 22 PR22
ILIM=0.793V
*100K_5%_4 Rsr = 0.01ohm
1

C756
PC10 PC11 0.1u/16V_4
*47p/50V_4 *47p/50V_4

Quanta Computer Inc.


2

+VCCIO
PD3 PD4
PDZ5.6B PDZ5.6B PROJECT : ZAV
Size Document Number Rev
1A
Charger (BQ24780S)
Date: Wednesday, March 15, 2017 Sheet 23 of 34
5 4 3 2 1
5 4 3 2 1

+VIN 15,23,25,26,27,28,29,30,31
+5VPCU 18,25
+3VPCU 6,9,15,17,18,20,21,22,23
VL 30

SYS_SHDN# 2,22,30

C1D 0306
PR171
24
*Short_0603

C1D 0306 +3VPCU VL 3V_LDO


PJ3000
22 SYS_HWPG
*short3720 PJ3002
+VIN +VIN

33u/25V_D6.3H4.5
SYS_SHDN# PR186 *short3720

10u/6.3V_6

0.1u/25V_4
D D
10K_1%_4

PC128
+
PC140 PC135 PC136 PC139
10u/25V_8 2200p/50V_4 PR183 2200p/50V_4 10u/25V_8
PR179 PR180 10K_5%_4 PC151

PC141

PC142
*Short_0402 4.7u/6.3V_6

51225_VIN
*Short_0402

+5VPCU C1D 0306


PQ22 +3VPCU
+3VPCU

5
AON7410
+5VPCU PR181 D 3.3 Volt +/- 5%
5 Volt +/- 5% 100K_1%_4

13

12
C1D 0306 G
TDC : 5.95A C1D 0306

3
4
TDC : 8.85A PQ21 S
PEAK : 7.93A

VREG5

VREG3
VIN
2
PJ3001 AON6978 PJ3003
PEAK : 11.8A

1
2
3
*short3720 7 6 SYS_SHDN# OCP : 10A *short3720

D1
D1
D1
PGOOD EN2
OCP : 15A 51225_EN1 20 10 51225_DH2 Width : 240mil
Width : 360mil EN1 DRVH2 PR178 PC149
PL2 G1 1 51225_DH1 16 9 51225_VBST2 PL3
2.2uH_7x7x3 PC148 PR177 DRVH1 VBST2 2.2uH_7x7x3
2 1 51225_SW1 9 S1/D2 51225_VBST1 17 PU9 8 51225_SW2 1_1%_6 0.1u/50V_6 1 2
VBST1 TPS51225RUKR SW2
0.1u/50V_6 1_1%_6 51225_SW1 18 11 51225_DL2
G2 8 SW1 DRVL2

5
51225_DL1 15 4 51225_FB2 PR188
PR184 DRVL1 VFB2 PR168 6.49K_1%_4
D
15.8K_1%_4 PR167 51225_FB1 2 21 G *4.7_5%_6

S2
S2
S2
+ *4.7_5%_6 VFB1 GND#1 4 +
PC127 PC125 14 22 S PC126 PC124

GND#6

GND#5

GND#4

GND#3
5
6
7
VO1 GND#2

VCLK
220u/6.3V_D6.3H4.2 0.1u/50V_6 0.1u/50V_6 220u/6.3V_D6.3H4.2

1
2
3
CS1

CS2
PQ24
PR185 AON7752 PC131 PR189
10K_1%_4 *680p/50V_6 9.31K_1%_4

19

26

25

24

23
PC130
C *680p/50V_6 C

51225_CS1

51225_CS2
PR192

Z8V change PR189 to 9.31K for IR camera


*Short_0603
Rds(on)=14.5m ohm Vo=2(R1/R2+1)
OCP:15A Vo=2(R1/R2+1) C1D 0306 OCP:10A
L(ripple current)
Rds(on)=4.9m ohm L(ripple current)
=(9-5)*5/(2.2u*0.3M*9) PR182 PR190 =(9-3.3)*3.3/(2.2u*0.355M*9)
=3.367A 53.6K_1%_4 102K_1%_4 ~2.676A
Iocp=15-(3.367/2)=13.316A Iocp=10-(2.676/2)=8.662A
Vth=(13.316A*4.9mOhm)+1mV=66.25mV Vth=(8.662A*14.5mOhm)+1mV=126.599mV
R(Ilim)=(66.25mV*8)/10uA R(Ilim)=(126.599mV*8)/10uA
~53K Power auto recovery =101.279K
C1D 0306
3V_LDO PR312
*Short_0603 +3V_LDO_EC
+3VPCU
+3V_LDO_EC
+3V_LDO_EC 7,18,22

PR287
*0_5%_6
+5V_S5 13,21,26,27,28,29,31
+5V 15,16,17,18,20,30
+3V_S5 2,3,4,6,7,8,9,13,14,18,19,20,22,26,30
+3V 2,4,6,7,8,9,11,14,15,16,17,18,19,20,21,22,25,26,27,30

B B

+5VPCU +5VPCU +3VPCU +3VPCU

C1D 0306 C1D 0306 C1D 0306 C1D 0306


PR130 PR129 PR172 PR173
*Short_0805 *Short_0805 *Short_0805 *Short_0805
TDC : 4.88A TDC : 3.98A TDC : 2.07A TDC : 3.73A
PEAK : 6.5A PEAK : 5.3A PEAK : 2.76A PEAK : 4.97A
Width : 200mil Width : 160mil Width : 100mil Width : 160mil
PC103 PC104 PC143 PC144
1u/25V_4 1u/25V_4 1u/25V_4 1u/25V_4
C1D 0306 C1D 0306 C1D 0306 C1D 0306
1

7
+5V_S5 PR128 PR127 +5V +3V_S5 PR169 PR6413 +3V
VIN1#1

VIN1#2

VIN2#1

VIN2#2

VIN1#1

VIN1#2

VIN2#1

VIN2#2
*Short_0805 *Short_0805 *Short_0805 *Short_0805

13 13
PC97 PC99 14 VOUT1#1 8 PC102 PC98 PC133 PC137 14 VOUT1#1 8 PC138 PC134
10u/6.3V_6 0.1u/16V_4 VOUT1#2 OUT2#1 9 0.1u/16V_4 10u/6.3V_6 10u/6.3V_6 0.1u/16V_4 VOUT1#2 OUT2#1 9 0.1u/16V_4 10u/6.3V_6
OUT2#2 OUT2#2
PU5 PU8
4 AOZ1331DI 11 4 AOZ1331DI 11
+5VPCU VBIAS GND#1 +5VPCU VBIAS GND#1
PC108 PC145
PR136 15 C1D 0306 PR175 15 C1D 0306
C1D 0306 *Short_0402 GND#2 PR132 C1D 0306 *Short_0402 GND#2 PR176
0.1u/16V_4 *Short_0402 0.1u/16V_4 *Short_0402
S5_ON 3 5 MAINON S5_ON 3 5 MAINON
22,30 S5_ON ON1 ON2 ON1 ON2
CT1

CT2

CT1

CT2
MAINON 18,22,26,30
PR131 PR174
C1D 0306 *Short_0402 PC106 PC107 C1D 0306 *Short_0402 PC147 PC146
12

10

12

10
*0.1u/16V_4 *0.1u/16V_4 *0.1u/16V_4 *0.1u/16V_4

A A

PC100 PC101 PC129 PC132


1000p/50V_4 1000p/50V_4 1000p/50V_4 1000p/50V_4

Quanta Computer Inc.


PROJECT : ZAV
Size Document Number Rev
1A
SYSTEM 5V/3V (TPS51225R)
Date: Wednesday, March 15, 2017 Sheet 24 of 34
5 4 3 2 1
5 4 3 2 1

Fsw=550KHz PC221
*0.01u/50V_4
C1D 0306 +VIN
+VIN 15,23,24,26,27,28,29,30,31
+1V_S5 6,9
+5VPCU 18,24
+3V 2,4,6,7,8,9,11,14,15,16,17,18,19,20,21,22,24,26,27,30 25
PR268 PJ3004
73.2K_1%_4 *short3720
G5335-TON-1

2200p/50V_4

10u/25V_8
*0.1u/25V_4
6

PC81

PC218

PC217
PU16
D D
7 8

TON
+5VPCU PR104 NC V+#1 9
10_5%_6 V+#2 22 +1V_S5
V+#3
G5335-VCC-1 21
VCC V+#4
24 1.0 Volt +/- 5%
TDC : 7.57A
PC234
+3V 10u/6.3V_6 PEAK : 10A
Width : 320mil
PR277
PR275 20 G5335-BST-1 2.2_5%_6 PC235 +1V_S5
100K_1%_4 C1D 0306 BST 0.1u/25V_4
PR276 25 C1D 0306
*Short_0402 LX#1 10 PL12 PJ3005
1
G5335-PWRGD-1 LX#2 11 0.68uH_7x7x3 *short3720
22 HWPG_1VS5 PGOOD LX#3 16 G5335-LX-1 1 2
+5VPCU PR98 LX#4 17
*0_5%_4 LX#5 18
G5335-PFM-1 3 LX#6

22u/6.3V_6

22u/6.3V_6

22u/6.3V_6

22u/6.3V_6

22u/6.3V_6

0.1u/16V_4
*22u/6.3V_6

*22u/6.3V_6
PFM

PC230

PC222

PC227

PC220

PC224

PC219

PC231

PC233
PR99
G5335-AGND-1 12 *4.7_5%_6
G5335-EN-1 2 PGND#1 13
PR272 EN PGND#2 14
R1
*Short_0402 PGND#3 15 PR269
Pulse-Skipping mode PGND#4 19 4.99K_1%_4 PC225
PGND#5 4 *1000p/50V_4
AGND G5335-AGND-1
PC82
C1D 0306 *680p/50V_6
C PR274 C
*Short_0402
G5335-SS-1 23 5 G5335-FB-1
22 +1V_S5_ON SS FB

C1D 0306 R2
PC228 PC232 G5335QT2U PR270 Vo=0.8*(R1+R2)/R2
*0.047u/16V_4 0.047u/16V_4 20K_1%_4 =1V
G5335-AGND-1 G5335-AGND-1

G5335-AGND-1
C1D 0306
PR273 VFB=0.8V
*Short_0402

G5335-AGND-1

C1D 0301
PR2060
*Short_0402
+1V_SUS 5
+VCCIO 2,5,8,23,27,30 Follow Z8V +VCCIO design 26,30 MAIND +1V_S5

B +VIN B

5
+VIN +VCCIO
PR2058 D
+VIN +1V_SUS +VIN +1V_S5 *1M_5%_6 G
4 PQ35
PR2059 S AON7408
PR2056 PR2057 *0_5%_4

1
2
3
PR79 PR105 PR191 *1M_5%_6 *22_5%_8
1M_5%_6 22_5%_8 1M_5%_6
+3V C1D 0301
3

PQ2010

3
*DDTC144EUA-7-F
2 +VCCIO
SUSD 2 PQ11 PQ2007 PC2064
AO3404 *2N7002K *2200p/50V_4
3

3
2 PC236

1
8 SUS0#
1
3

3
2 PR80 4 2 PR2055 *22u/6.3V_6
8,26 SUSON_R 2 2 2
1M_5%_6 1 *1M_5%_6 PQ2009
8,22 SUSB#
PQ10 PQ25 *2N7002K
+1V_SUS
2N7002K 2N7002K
1

1
PQ7 PC152 PU20
1

1
DDTC144EUA-7-F *2200p/50V_4 *74AHC1G09GW
PC83
22u/6.3V_6 TDC : 0.18A TDC : 2.36A
PEAK : 0.24A PEAK : 3.15A
Width : 20mil Width : 100mil
A A

Z8V add cap

Quanta Computer Inc.


PROJECT : ZAV
Size Document Number Rev
1A
+1V_S5 (G5335QT2U)
Date: Wednesday, March 15, 2017 Sheet 25 of 34
5 4 3 2 1
5 4 3 2 1

+3V
+VIN 15,23,24,25,27,28,29,30,31
+1.2VSUS 3,5,11,12
+VDDQ_VTT 11,12
+5V_S5 13,21,24,27,28,29,31
+3V 2,4,6,7,8,9,11,14,15,16,17,18,19,20,21,22,24,25,27,30
26
PR2016
100K_1%_4 C1D 0306 +VDDQ 11,12
PR2017
*Short_0402
22 HWPG_VDDR

8,25 SUSON_R
D PR2018 D
*Short_0402 PC2021 Ilimit=9A
*0.1u/16V_4
C1D 0306 PR2019 +1.2VSUS
PR2020
*Short_0402
232K_1%_4
+VIN
1.2 Volt +/- 5%
Fsw=500KHz

1P35V_PGOOD
TDC : 5.57A

1P35V_CS
18,22,24,30 MAINON
PEAK : 7.42A

1P35V_S3

1P35V_S5
PR2021 PJ2002
PC2022 499K_1%_4 *short3720 OCP : 9A
*0.1u/16V_4 1P35V_TON +1.2VSUS_VIN
Width : 240mil

10u/25V_8

10u/25V_8
0.1u/25V_4

2200p/50V_4

0.1u/25V_4
PC2023

PC2027

PC2024

PC2028

PC2025
C1D 0306

10

13
7

9
TDC : 0.45A PQ2005 +1.2VSUS

S3

S5

PGOOD

TON
CS

5
PEAK : 0.6A +VDDQ_VTT AON7410
D
Width : 20mil 20
VTT G
17 1P35V_UGATE 4
2 UGATE S PJ2003
PC2026 VTTSNS PR2022 PC2029 *short3720

1
2
3
10u/6.3V_6 18 1P35V_BOOT
TDC : 0.38A 1 BOOT PL2001
PEAK : 0.5A +VDDQ VTTGND 2.2_5%_6 0.1u/50V_6 1uH_7x7x3 C1D 0306
PR2023 PU2001 16 1P35V_PHASE 1 2
Width : 20mil

*330u/2.5V_D6.3H4.2
100_1%_4 RT8231BGQW PHASE
4 15 1P35V_LGATE

0.1u/16V_4

22u/6.3V_8

22u/6.3V_8

22u/6.3V_8

22u/6.3V_8
VTTREF LGATE

PC2031

PC2035

PC2032

PC2036

PC2037

PC2033
PR2025 +
0.033u/16V_4

19 12 1P35V_VDD D *4.7_5%_6
VLDOIN VDD +5V_S5
PC2030

PC2034 PR2026
*10u/6.3V_6

G
4
PC2038

0.1u/16V_4 PR2024 *Short_0402


*Short_0402 S
PC2040
C1D 0306 C1D 0306

1
2
3
PGND

VDDQ
1u/6.3V_4 PC2039
GND

PAD
VID
PQ2006 *680p/50V_6

FB
C +1.2VSUS C
AON7752
C1D 0306
3

11

14

21
PR2027
*0_5%_4 PR2028
1P35V_S3 1P35V_S5 *Short_0402
1P35V_VID

1P35V_FB
Rds(on)=14.5mohm
PR2030 1P35V_VDDQ
1P35V_S3 *Short_0402
3 DDR_VTTT_PG_CTRL +5V_S5 R1
PR2029
*0_5%_4 PR2031 *0_5%_4 PR2032
7.87K_1%_4

VID Ref. Voltage PR2033


R2 10K_1%_4
High 0.675V Vo=Vref * (R1/R2+1)

Low 0.75V
S3 S5 VDDQ VTTREF VTT
OCP=9A
L ripple current S0 1 1 ON ON ON
=(19-1.2)*1.2/(1u*500k*19)
=2.248A S3 (mainon off) 0 1 ON ON OFF
Vtrip=9-(2.248/2)*14.5mohm DDR=1.2V
=114.202mV R1=7.87K/F_4
R2=10K/F_4 S4/S5 0 0 OFF OFF OFF
Rlimit=114.202mV/5uA*10=228.4Kohm

B B

+2.5VSUS Power Rail For DDR4


Z8V:reserve +2.5V for DDR4 VDDSPD
+3V_S5 2,3,4,6,7,8,9,13,14,18,19,20,22,24,30 +2.5V_SUS +2.5V_SUS
+2.5V_SUS 11,12
PR310
*Short_0603
2.5Volt +/- 5%
+3V
+3V_S5
TDC : 0.9A
PEAK : 1.2A
C1D 0306 PC264 Width : 40mil

3
PR311 4.7u/6.3V_6
100K_1%_4
+2.5V_SUS MAIND 2 PQ40
25,30 MAIND
*AO3404
4

PR309 PL15 PJ3007


*Short_0402 2.2uH_2.5x2.0x1.2 *short3720
VIN

1
22 HWPG_2.5V 5 3 G5719LX2.5V1 2
PG LX
PR304 PU19
*0_5%_4 C1D 0306 G5719CTB1U C1D 0306
SUSON_R 1 2 +2.5V
10u/6.3V_6

0.1u/16V_4
*10u/6.3V_6

EN GND
PC260

PC261

PC262

PR303
0.47u/6.3V_4

+2.5V 11,30
VFB
PC263

PR306 *Short_0402
10K_5%_4
C1D 0306
22 DDR4_SUSON_2V5 TDC : 0.15A
6

PR307
PR305
*Short_0402
47.5K_1%_4 PEAK : 0.2A
C1D 0306 Width : 20mil
A R1 A
PR308
R2 15K_1%_4
Vo=(0.6(R1+R2)/R2)
=2.5V

Quanta Computer Inc.


PROJECT : ZAV
Size Document Number Rev
1A
DDR4_+1.2VSUS (RT8231BGQW)
Date: Wednesday, March 15, 2017 Sheet 26 of 34
5 4 3 2 1
5 4 3 2 1

Item
Ra
Location
PR8120 CS00002JB38
U22
0 ohm
U23e
CS00002JB38 0 ohm
U42
Unstuff 27
IMVP8 Vcore Controller Ca

Cb
PC8026

PC8029
Unstuff

Unstuff
Unstuff

Unstuff
CH3224K1B01 0.022U/25V

CH3224K1B01 0.022U/25V
+1V_VCCST
Rb PR8059 CS12672FB02 267 ohm CS12672FB02 267 ohm CS13322FB10 332 ohm
:VCORE
Rail A: Cc PC8034 CH4104K9B03 0.1u/25V CH4104K9B03 0.1u/25V CH4152K9B02 0.15u/10V
PR8003 PR8004 PR8005 PC8001
:VCCGT
Rail B: 100_1%_4 *110_1%_4 45.3_1%_4 1000p/50V_4 Rc PR8070 CS21542FB00 1.54K ohm CS21542FB00 1.54K ohm CS23092FB00 3.09K ohm

Rd PR8071 CS39532FB03 95.3K ohm CS39312FB15 93.1K ohm CS38662FB16 86.6K ohm
:VCCSA
Rail C: H_CPU_SVIDDAT
VR_SVID_ALERT#_VCORE
H_CPU_SVIDCLK Re PR8121 CS00002JB38 0 ohm Unstuff CS00002JB38 0 ohm
D D

Cd PC8028 N/A CH3224K1B01 0.022U/25V N/A

Ce PC8031 N/A CH3224K1B01 0.022U/25V N/A

Rf PR8057 CS12612FB13 261 ohm CS13322FB10 332 ohm CS12612FB13 261 ohm

Cf PC8018 CH4104K9B03 0.1u/25V CH4152K9B02 0.15u/10V CH4104K9B03 0.1u/25V

499_1%_4

PR8019
2K_1%_4
PR8018
+VCCGT
Rg PR8026 CS21912FB13 1.91K ohm CS22552FB01 2.55K ohm CS21912FB13 1.91K ohm

1.91K_1%_4
PR8026
PC8008 PR8121 Rh PR8001 CS39532FB03 95.3K ohm CS38662FB16 86.6K ohm CS39092FB11 90.9K ohm
PR8027 *0.01u/50V_4 *Short_0402 Re

1000p/50V_4

470p/50V_4
10_5%_4

PC8009

PC8010
+5V_S5

Rg
C1D 0306
PR8032
*Short_0402
5 VCCGT_SENSE
PC8011
5 VSSGT_SENSE *0.01u/50V_4 PC8027
0.1u/25V_4
Close to
PR8036 PR8057 VGTU Choke
*Short_0402
ISUMN_B 29
PR8039 261_1%_4
C1D 0306

2
10_5%_4
PC8003 Rf
33p/50V_4 Cf PR8055
PC8015 10K_NTC_4_1%
0.01u/50V_4

1
PC8004 PR8015 PC8016 PR8047

PR8046
11K_1%_4
3300p/50V_4 3.3K_5%_4 PC8018 PC8017
0.1u/25V_4 0.01u/50V_4
2200p/50V_4 1K_1%_4
PR8042
2.61K_1%_4

C1D 0306 ISL95855_ISUMN_B


+VIN PR8009 *Short_0402

ISL95855_COMP_B
ISUMP_B 29

ISL95855_RTN_B
ISL95855_FB_B
+5V_S5 PC8006
0.1u/25V_4
PR8008
0.1u/25V_4

C C
1_1%_6
PC8007

PR8024 C1D 0306


909K_1%_4
PR8053
ISL95855_FCCM_A *Short_0402 FCCM_A 28

10

24
4

7
27 Rail A

COMP_B

FB_B

RTN_B

ISEN2_B

ISEN1_B

ISUMN_B

ISUMP_B

FCCM_A
PR8030 *10K_1%_4 PWM3_A
+3V
ISL95855_VIN 41 26 ISL95855_PWM2_A PR8045 PC8005 PR8017
PR8025 0_5%_4 VIN PWM2_A *Short_0402 PWM2_A 28 2200p/50V_4 1K_1%_4
8 VRON_R 42 25
ISL95855_VCC ISL95855_PWM1_A PR8051
VCC PWM1_A *Short_0402 PWM1_A 28
+3V ISL95855_VR_EN 48 11 ISL95855_FCCM_B PR8044 FCCM_B 29
PR8012 10K_1%_4 VR_ENABLE FCCM_B *Short_0402
2 IMVP_PWRGD
PR8016 0_5%_4
47
ISL95855_VR_READY
VR_READY PWM1_B
12 ISL95855_PWM1_B PR8050
*Short_0402
PWM1_B 29 Rail B Close to
VCCSA Choke
13
+VCCIO
PR8013 *10K_1%_4 C1D 0306 PWM2_B ISUMN_C 29
PR8014 ISL95855_VR_HOT 46 34 ISL95855_FCCM_C PR8038 PR8028
2,22,23 H_PROCHOT#

1
*Short_0402 VR_HOT# FCCM_C *Short_0402 FCCM_C 29 374_1%_4
PR8002 10_1%_4 ISL95855_SDA 43 35 ISL95855_PWM_C PR8035 PR8031
5 H_CPU_SVIDDAT
PR8006 *Short_0402 C1D 0306 ISL95855_ALERT 44
SDA PWM_C *Short_0402 PWM_C 29 Rail C 10K_NTC_4_1%
5 VR_SVID_ALERT#_VCORE ALERT#

0.022u/25V_4
0.1u/25V_4

2
PC8012
PR8007 49.9_1%_4 ISL95855_SCLK 45 PU8000

PC8013
5 H_CPU_SVIDCLK SCLK ISL95829AHRTZ-T PC8014 PR8034
PR8029 *Short_0402 ISL95855_PSYS 1 38 ISL95855_PROG3 PR8021 34K_1%_4 0.047u/16V_4 11K_1%_4
23 PMON PSYS PROG3
37 ISL95855_PROG4 PR8020 182K_1%_4 PR8037
C1D 0306 PROG4 2.61K_1%_4
ISL95855_NTC_A 15 36 ISL95855_PROG5 PR8033 100K_1%_4
NTC_A PROG5
ISL95855_NTC_B 3 33 ISL95855_ISUMN_C
NTC_B ISUMN_C
ISL95855_IMON_A 14 32
ISUMP_C 29
IMON_A ISUMP_C
Close to Close to ISL95855_IMON_B 2
IMON_B 31 ISL95855_RTN_C
Vcore MOS VGTU MOS RTN_C
ISL95855_IMON_C 28
470K_NTC_4_5%

470K_NTC_4_5%
1

IMON_C 30 ISL95855_FB_C
27.4K_1%_4

27.4K_1%_4

ISL95855_PROG1 40 FB_C
PR8066

PR8069

PR8011

PR8000

113K_1%_4
330p/50V_4

330p/50V_4

330p/50V_4
95.3K_1%_4

95.3K_1%_4

PROG1 29 ISL95855_COMP_C
ISL95855_PROG2 39 COMP_C

PR8041
301_1%_4
2.49K_1%_4
PROG2

PR8043

1.74K_1%_4
2

PR8040
2K_1%_4
ISUMN_A

ISUMP_A

ISEN1_A

ISEN2_A

ISEN3_A

Rd Rh ISL95855_COMP_A16

33p/50V_4
RTN_A

COMP_A 49 +VCCSA

PC8021
110K_1%_4

34K_1%_4

17 GND PC8020
PR8071

PC8036

PR8001

PC8002

PR8048

PC8019

4.87K_1%_4

PR8073 PR8010 FB_A *0.01u/50V_4


PR8067

2200p/50V_4

1000p/50V_4
11.3K_1%_4 11.3K_1%_4

PC8023

PC8022
18

20

19

21

22

23

330p/50V_4
PR8054

PR8049
33p/50V_4

PC8024
10_5%_4
PC8000

ISL95855_ISUMN_A
ISL95855_RTN_A
PR8023

PR8022

2200p/50V_4

B B
ISL95855_FB_A

PR8056
PC8039

*Short_0402
C1D 0306 VSA_SENSE 5
PC8025
*0.01u/50V_4 VSASS_SENSE 5
C1D 0306
PR8058
PR8122 +5V_S5 *Short_0402
*Short_0402
PR8120 C1D 0306
*Short_0402 PR8060
Ra 10_5%_4
ISEN2_A 28
PC8030
ISEN1_A 28 0.01u/50V_4

PC8026 *0.022u/25V_4
Ca

PC8029 *0.022u/25V_4 Cb Close to


Vcore Choke
ISUMN_A 28
PR8059 267_1%_4 Rb
1

Cc PR8062
10K_NTC_4_1%
PC8032 PR8061
2200p/50V_4 1K_1%_4
11K_1%_4
0.1u/25V_4

2
0.01u/50V_4

PC8033
PC8034

PR8063
PC8035

0.1u/25V_4

KBL U-Line - 15W/28W PR8064


2.61K_1%_4

U22 U23e U42 ISUMP_A 28

(1+1+1 Phase) (1+2+1 Phase) (2+1+1 Phase) Rc


1.54K_1%_4

PR8065
Vcore Vcore Vcore 499_1%_4
PR8068
2K_1%_4

Icc Max:32A Icc Max:32A Icc Max:64A +VCCCORE


PC8038
Icc TDC:21A Icc TDC:23A Icc TDC:42A *0.01u/50V_4
A A
PR8070

OCP:38.4A OCP:38.4A OCP:76.8A PC8037


1000p/50V_4 PR8072
10_5%_4
VCCGT VCCGT VCCGT PR8074
470p/50V_4

*Short_0402
PC8040

Icc Max:31A Icc Max:64A Icc Max:28A


Icc TDC:18A Icc TDC:45A Icc TDC:12A PC8041 C1D 0306 VCORE_SENSE 5
*0.01u/50V_4
OCP:37A OCP:76.8A OCP:37A VCORESS_SENSE 5
PR8075
*Short_0402
VCCSA VCCSA VCCSA
C1D 0306 PR8076
Icc Max:4.5A Icc Max:5.1A Icc Max:5A 10_5%_4

OCP:10A OCP:10A OCP:10A PC8042


0.01u/50V_4 Quanta Computer Inc.
PROJECT : ZAV
Size Document Number Rev
1A
CPU_CORE (ISL95829AHRTZ-T)
Date: Wednesday, March 15, 2017 Sheet 27 of 34
5 4 3 2 1
5 4 3 2 1

VCORE
+VIN 15,23,24,25,26,27,29,30,31
+VCCCORE 5,27
+5V_S5 13,21,24,26,27,29,31
28
+VIN_VCCCORE PJ8000
0.001_1%_3720

+VIN

33u/25V_D6.3H4.5
U22 U23e U42

2200p/50V_6
10u/25V_8

10u/25V_8

0.1u/50V_6
PC8043

PC8044

PC8045

PC8046

PC8047
D + D

+5V_S5 PR8077 *Short_0402 Vcore Vcore Vcore


4.7u/6.3V_4
Icc Max:32A Icc Max:32A Icc Max:64A
PC8048

PU8001 AOZ5049QI
C1D 0306 6
23 VIN#1 22
24 NC VIN#2 Icc TDC:21A Icc TDC:23A Icc TDC:42A
VCC

Rail A 4 C1D 0306 OCP:38.4A OCP:38.4A OCP:76.8A


GH 3 PR8079
PR8078 *Short_0402 1 BOOT *Short_0603
27 PWM1_A PWM +VCCCORE
27 FCCM_A PR8080 *Short_0402 2 PC8049
FCCM 0.1u/25V_6 PL8000
5 0.15uH_7x7x4
C1D 0306 VSWH#1 13 PHASE_A1 1 2 DCR=0.66mOhm
VSWH#2
PGND#2

PGND#1

330u/2V_7343H1.9
19
GL#1

22u/6.3V_8

22u/6.3V_8
20 PR8081

0.1u/16V_4
GL#2

PC8051

PC8052

PC8053
PC8050
2.2_1%_6 +
21

PC8054
1000p/50V_4

PR8082
3.65K_1%_6
C C
27 ISUMP_A

PR8083
27 ISEN1_A U42@100K_1%_4 PR8085
*100K_1%_4

27 ISUMN_A ISEN2_A 27
PR8084
10_1%_4

VCORE = 2 Phase for U42 , 上上


+VIN_VCCCORE

U42@2200p/50V_6
U42@10u/25V_8

U42@10u/25V_8

U42@0.1u/50V_6
PC8055

PC8056

PC8057

PC8058
+5V_S5 PR8086 *Short_0402
U42@4.7u/6.3V_4

C1D 0306
PC8059

PU8002 U42@AOZ5049QI
6
23 VIN#1 22
B B
24 NC VIN#2
VCC

Rail A 4 C1D 0306


GH 3 PR8087
PR8088 *Short_0402 1 BOOT *Short_0603
27 PWM2_A PWM +VCCCORE
FCCM_A PR8089 *Short_0402 2 PC8060
FCCM U42@0.1u/25V_6 PL8001
5 U42@0.15uH_7x7x4
C1D 0306 VSWH#1 13 PHASE_A2 1 2 DCR=0.66mOhm
VSWH#2
PGND#2

PGND#1

U42@330u/2V_7343H1.9
19
U42@0.1u/16V_4

GL#1
U42@22u/6.3V_8

U42@22u/6.3V_8
20 PR8090
GL#2
PC8062

PC8063

PC8064
PC8061

U42@2.2_1%_6 +
21

PC8065
U42@1000p/50V_4

PR8091
U42@3.65K_1%_6
ISUMP_A

ISEN2_A PR8092
U42@100K_1%_4 PR8094
*U42@100K_1%_4
ISUMN_A ISEN1_A

PR8093
A A
U42@10_1%_4

Quanta Computer Inc.


PROJECT : ZAV
Size Document Number Rev
1A
VCCORE
Date: Wednesday, March 15, 2017 Sheet 28 of 34
5 4 3 2 1
5 4 3 2 1

VCCGT
+VIN 15,23,24,25,26,27,28,30,31
+VCCGT 5,27
+VCCSA 5,27
+5V_S5 13,21,24,26,27,28,31 29
+VIN_VCCGT PJ8001
U22 U23e U42
C1D 0306 0.001_1%_3720
+5V_S5 PR8095
*Short_0402 +VIN
VCCGT VCCGT VCCGT

4.7u/6.3V_4
PU8003 AOZ5049QI

PC8066

10u/25V_8

10u/25V_8

2200p/50V_6
0.1u/50V_6
6

PC8067

PC8068

PC8069

PC8070
23 VIN#1 22
D
24 NC VIN#2 Icc Max:31A Icc Max:64A Icc Max:28A D

VCC

4 C1D 0306
Rail B C1D 0306 GH 3 PR8096 Icc TDC:18A Icc TDC:45A Icc TDC:12A
PR8097 1 BOOT *Short_0603
27 PWM1_B PWM +VCCGT
*Short_0402
PR8098 2 PC8072
27 FCCM_B
*Short_0402 FCCM 0.1u/25V_6 PL8002 OCP:37A OCP:76.8A OCP:37A
5 0.15uH_7x7x4
VSWH#1
VSWH#2
13 PHASE_B 1 2 DCR=0.66mOhm

PGND#2

PGND#1

330u/2V_7343H1.9
19

22u/6.3V_8

22u/6.3V_8
GL#1

0.1u/16V_4

PC8074
20 PR8099 +

PC8075

PC8076
PC8073
GL#2 2.2_1%_6

21

9
PC8077
1000p/50V_4

PR8100
3.65K_1%_6

27 ISUMP_B

27 ISUMN_B
PR8102
10_1%_4

C C

B B

VCCSA +VIN_VCCSA PJ8002


0.001_1%_3720

+VIN
C1D 0306 U22 U23e U42
10u/25V_8

10u/25V_8

2200p/50V_6
0.1u/50V_6

PR8113
PC8090

PC8091

PC8092

PC8093

+5V_S5
*Short_0402
PU8005
4.7u/6.3V_4

AOZ5049QI
PC8089

23 VIN#1
6
22
VCCSA VCCSA VCCSA
24 NC VIN#2
VCC
Icc Max:4.5A Icc Max:5.1A Icc Max:5A
Rail C 4 C1D 0306
C1D 0306 GH 3 PR8114
PR8115 1 BOOT *Short_0603
27 PWM_C
*Short_0402 PWM OCP:10A OCP:10A OCP:10A
PR8116 2 PC8094 +VCCSA
27 FCCM_C FCCM
*Short_0402 0.1u/25V_6 PL8004
5 0.47uH_7x7x3
VSWH#1
VSWH#2
13 PHASE_C 1 2 DCR=4.2mOhm
PGND#2

PGND#1

19
22u/6.3V_8

22u/6.3V_8

GL#1
0.1u/16V_4

PC8096

PC8097

20 PR8117
PC8095

GL#2 2.2_1%_6
21

PC8098
A A
1000p/50V_4

PR8118
3.65K_1%_6

27 ISUMP_C

27 ISUMN_C
PR8119
10_1%_4

Quanta Computer Inc.


PROJECT : ZAV
Size Document Number Rev
1A
VCCGT/VCCSA
Date: Wednesday, March 15, 2017 Sheet 29 of 34
5 4 3 2 1
5 4 3 2 1

30
+3V_S5 2,3,4,6,7,8,9,13,14,18,19,20,22,24,26 VL 24 +VIN 15,23,24,25,26,27,28,29,31
+1.8V_S5 9,10 +5V 15,16,17,18,20,24
+1.8V 15,21,30 +VCCIO 2,5,8,23,25,27
+1.5V 9,17 +2.5V 11,26
D +3V 2,4,6,7,8,9,11,14,15,16,17,18,19,20,21,22,24,25,26,27 +1.8V 15,21,30 D

+1.5V
C1D 0306 +1.8V_S5 PR6415 1.5Volt +/- 5%
PR6421
*Short_0603
1.8Volt +/- 5% *Short_0603
TDC : 0.39A
+3V_S5
+3V_S5
TDC : 0.53A +3V
PEAK : 0.52A
+3V
PEAK : 0.7A C1D 0306 PC242 Width : 20mil
PC6236 Width : 40mil +1.8V_S5 4.7u/6.3V_6
4.7u/6.3V_6 PR6416
PR6422 100K_1%_4 +1.5V
100K_1%_4 +1.8V_S5 C1D 0306 PJ3008
C1D 0306

4
PJ3009 PR284 0.001_1%_3720

3
PR6420 0.001_1%_3720 *Short_0402 PL14

VIN
*Short_0402 PL2009 22 HWPG_1.5V 5 3 G5719LX1.5V1 2

VIN
5 3 G5719LX1.8V1 2 MAIND 2 PQ9 PG LX 2.2uH_2.5x2.0x1.2
22 HWPG_1.8VS5 PG LX 2.2uH_2.5x2.0x1.2 25,26,30 MAIND AO3404 PU3003
C PU3004 G5719CTB1U C
G5719CTB1U 1 2

10u/6.3V_6

0.1u/16V_4
*10u/6.3V_6
1
1 2 18,22,24,26 MAINON EN GND PR6414

PC229
PC6230

PC6231
10u/6.3V_6

0.1u/16V_4
*10u/6.3V_6

VFB
22,24 S5_ON EN GND PR6419 PR6417 *Short_0402

PC6232

PC6234

PC6235
VFB
PR6424 *Short_0402 10K_5%_4 PC6229
10K_5%_4 PC6233
+1.8V
0.47u/6.3V_4 C1D 0306
C1D 0306

6
0.47u/6.3V_4 6
TDC : 0.15A R1
R1
PEAK : 0.2A PR6418
PR6425 Width : 20mil 22.6K_1%_4
30K_1%_4 R2 PR283
R2 PR6423 15K_1%_4
15K_1%_4 Vo=(0.6(R1+R2)/R2) Vo=(0.6(R1+R2)/R2)
=1.8V =1.5V

PR126 Change to
Thermal protection 220 ohm for bo bo
sound issue.
+VIN +3V +5V +VCCIO +2.5V +1.8V +VIN
B (1) Need fine tune B

PR3020
150_5%_4
for thermal protect point
PR116 PR106 PR126 PR111 PR298 PR9227 PR59
VL (2) Note placement position 1M_5%_6 *22_5%_8 *220_5%_8 22_5%_8 *22_5%_8 22_5%_8 1M_5%_6
PC6228
0.1u/16V_4
TEMP=80C
MAINON_ON_G MAIND
PQ16 MAIND 25,26,30
5

DDTC144EUA-7-F
C1D 0306

3
Thermal requset change to 80 degree C
VCC

3
3 SYS_SHDN# PR118
OT SYS_SHDN# 2,22,24 2 2 2 2 2 2
MAINON 2 1M_5%_6
PU3002 PR3022 PC51
PR3021 TMP708AIDBVR *Short_0402 PQ12 PQ19 PQ14 PQ41 PQ9050 PQ6 2200p/50V_4
29.4K_1%_4 *2N7002K *2N7002K 2N7002K *2N7002K 2N7002K 2N7002K

1
1
1 PR120
SET
HYST

*100K_1%_6 Z8V:Stuff
GND

Rset(Kohm)=0.0012T*T-0.9308T+96.147
2

=29.4K ohm HYST=VCC for 10


degree Hys.
HYST=GND for 30
degree Hys.
A A

Quanta Computer Inc.


PROJECT : ZAV
Size Document Number Rev
1A
+1.8V_S5/+1.5V/Thermal Protect
Date: Wednesday, March 15, 2017 Sheet 30 of 34
5 4 3 2 1
5 4 3 2 1

LED Panel (TPS61087)


31
D D

1 2
PL9 *VL@3.3uH_5x5x1.8 +12V_Panel +12V_Panel
12 Volt +/- 5%
+5V_S5
PU8006 40V, 2A PEAK : 0.35A
PR9235 PQ17 *VL@TPS61087DRCR Width : 20mil Panel Spec (TFT-LCD 14'')
*VL@0_5%_8 S
1
*VL@AO3415
3
D
8 6 61087SW 2 1
VLED : 6V~21V (Tpy:12V)
IN SW#1
PD40 *VL@DFLS240-7
Power Consumption : 3W (MAX)
C C
G

2
PC8109 PR49 PC8100 PC8099 PC8103 PR9230 **VL@0_5%_4 61087EN 3 7 R1 PR9231 PC8106 PC8105 PC8107 PC8108
**VL@0.1u/25V_4 *VL@100K_1%_4 EN SW#2
*VL@10u/25V_8 *VL@10u/25V_8 *VL@1u/25V_4 *VL@174K_1%_4 *VL@10u/25V_8 *VL@10u/25V_8 *VL@10u/25V_8 *VL@10u/25V_8

VFB=1.238V
PR9234 61087FREQ 9 FREQ FB
2 61087FB
VGS=-4.5V
*VL@0_5%_4
PR51 PR9228 *VL@0_5%_4 4 1 61087COMP
22 PANEL_LED_EN AGND COMP PR9232
*VL@10K_5%_4 R2 *VL@20K_1%_4

EPAD#1
EPAD#2
EPAD#3
EPAD#4
EPAD#5
EPAD#6
5 10 PR9233
PC8102 PR9229 61087SS
*VL@0.1u/25V_4 PGND SS *VL@100K_5%_4
PR9236 **VL@0_5%_4
3

*VL@0_5%_4

11
12
13
14
15
16
PANEL_LED_EN 2 PQ9051 PC8104
*VL@2N7002K *VL@0.1u/25V_4
PC8101 Vo =1.238*(1+R1/R2)
=12V
1

*VL@820p/50V_4
FREQ: HI = f-->1.2MHz
Low = f--> 650KHz
B B

Power trace tracking

BL Discharge Circuit
15,16,17,18,20,24,30 +5V
15 +12V_Panel
+VIN +12V_Panel

PR9240 PR9238
*VL@1M_5%_6 *VL@22_5%_8

PQ9053
*VL@DDTC144EUA-7-F

3
PR9241

3
*VL@0_5%_4 PR9239
PANEL_LED_EN 2 *VL@1M_5%_62
PQ9052
A A
*VL@2N7002K

1
1
PR9237
**VL@100K_1%_6
Quanta Computer Inc.
PROJECT : ZAV
Size Document Number Rev
LED Panel (TPS61087) 1A

Date: Wednesday, March 15, 2017 Sheet 31 of 34


5 4 3 2 1
5 4 3 2 1

Model Date Change List


ZAV Rev. A 11/07 1. FIRST RELEASED
2. Remove all the GT3e part.
A-stage 3. Change the eDP connector pindefine. (page 15)
4. Add all the function part BOM option.
5. Reserve 0 ohm resistor R704, R705 for USB 2.0 port2. (page 21)
11/08 1. Add colay circuit on HDMI. (page 16)
2. Remove Type-C re-driver circuit. (page 13)
D
11/09 1. Change EC pin97 for VLED enable control pin. (page 15, 22) D

2. Change the FAN block from 3-pin to 4-pin circuit. (page 20)
3. VLED +12V circuit change to power part. (page 31)
11/10 1. Swap FAN connector. (page 20)
2. Add ODD function. (page 18)
3. Remove DC-DET circuit. (page 17)
4. Change ODD power capacitor C740 size from 3528 to 1206. (page 18)
5. Change memory down Rx resistor frome 34.8±1% to 36±1% ohm. (page 12)
6. Change PJ2 part number to DFHD04MR237. (page 23)
7. Follow HSIO change the USB2.0 net name (page 6, 13, 15, 18, 19, 21)
11/14 1. Reserve 0 ohm R750 for 4K2K panel. (page 15)
2. Add R751~R762 20k ohm for pull-up required on Data and Command lines. (page 21)
3. Change FFC connector from 30-pin to 34-pin for the future 17" case. (page 21.)
4. Reserved R764~R767 0 ohm for Tx Rx signle. (page 21)
11/15 1. Add Hole 1~18. (page 17)
2. Modify PJ2 DC-IN connector. (page 23)
3. Reserve C810, C811 and C812 for EMI solution. (page 4, 7)
11/16 1. Swap CN12 "PWM" pin-3 and "GND" pin-4. (page 20)
11/17 1. Add R651, R768 20k ohm for pull-up required on Data and Command lines. (page 21)
2. Change Type-C USB2.0 ESD TVS package from DFN2510 to SOT23-6. (page 13)
3. Add R769 0 ohm for CCD and DMIC power supply. (page 15)
4. Change PJ2 part number and foot print. (page 23)
C C
11/18 1. Modify ODD pindefine and delete SSD_ID pin. (page 6, 18)
2. Add C813 3300pF for DDR4 memory down clock. (page 12)
3. Swap DDR4 memory channel A and B data line for layout house placement. (page 11, 12)
11/22 1. Swap POA connector for placement. (page 18)
2. Charge 0.01uF part numer from CH3103K1B15 to CH31006KB18. (page 12, 18)
3. Charge 0.01uF part numer from CH3104J1B00 to CH31006KB18. (page 12, 18)
11/23 1. Add C814 for HDD redriver IC power supply. (page 18)
2. Change R463 200k resistor error value 5% to 1%. (page 17)
3. Reserve R770, R771 for dual-DMIC power supply 3.3V and 1.8V. (page 15)
4. Reserve C815 ~ C822 22uF_6.3V for +VCCCORE. (page 5)
5. Change C44, C46, C48, C49, C50, C51, C53, C59, C60, C61, C62 from 1uF to 10uF. (page 5)
6. Change R109, R110, R115, R116, R117, R118 from 0_0805 ohm to 0.0002_0805 ohm. (page 5)
11/24 1. Change PC2030 part number from to CH3473K1B00. (page 26)
2. Change PC232, PC8014 part number to CH3473K1B00. (page 25, 27)
3. Change PC8050, PC8073, PC8095, PC8061, PC6228 part number to CH4103K1B08. (page 23~31)
4. Change PC8051, PC8052, PC8074, PC8075, PC8096, PC8097, PC8062, PC8063 part number to CH6221M9A00. (page 23~31)
5. Swap Touch pad connector for placement. (page 20)
6. Swap DDR SODIMM for placement. (page 11)
7. Swap SSD connector. (page 19)
8. Modify HDMI colay circuit for routing guidelines. (page 16)
11/25 1. Reserve R1, R2, C823,C824, C825 for simple ESD solution. (page 3, 8)
2. Update Hole. (page 17)
B
3. Change PC8024 and PC8040 from 30p_25V to 330p_50V. (page 27) B

11/28 1. Change R37 from 120 ohm to 200 ohm for SDP setting. (page 3)
2. Swap HDD connector for match Z8Vs cable. (page 18)
3. Delete PQ28. (page 23)
11/29 1. Keep PR23 value for the project ZAV. (page 23)
11/30 1. Add full description and function code. ( ALL )
2. Change HOLE footprint. (page 17)
3. Swap U12 DQ pin for placement. (page 12)
4. Swap U15 pin-5 and pin-6 for placement. (page 13)
12/01 1. Change all the test point footprint from TP2075 to TP2050. (ALL)

ZAV Rev. B 12/14 1. Change U16 power supply from +TPC_VBUS to +5V_S5. (page 13)
B-stage 12/15 1. Change ODD connector from 14-pin to 18-pin. (page 18)
2. Stuff R152 for future dis. project used. (page 6)
3. Change CN19 RTC connector form cable type to socket type. (page 6)
4. Delete net 3V_LDO. (page 24)
5. Nunstuff PC228. (page 25)
6. Add Power tree. (page 34)
12/19 1. Add R59 for Board_ID4 pull-low resistor. (page 4)
12/20 1. Stuff C236 for ESD injection. (page 11)
2. Add C826,C827,C828,C829,C830,C831,C832,C833 for ESD injection. (page 6,8,9,22)
A 12/21 1. Delete net DMIC_DATA0_R. (page 4) A

2. Change CN21 part number from DFHS09FR365 to DFHS09FR758. (page 21)


12/22 1. Change R411 size from 0805 to 0603. (page 15)
2. Change CN7 part number from DFHS20FS123 to DFHS20FS095. (page 18)
3. Change CN11 part number from DFFC08FR139 to DFFC08FR120. (page 20)

Quanta Computer Inc.


PROJECT MODEL : ZAV APPROVED BY: DATE:
PROJECT : ZAV DOC NO.
Size Document Number Rev
1A
Change List - 1 PART NUMBER: DRAWING BY: REVISON:
Date: Wednesday, March 15, 2017 Sheet 32 of 34

5 4 3 2 1
5 4 3 2 1

Model Date CHANGE LIST


ZAV Rev. B 12/23 1. Change CN7 footprint from gs12201-1011-9h-20p-l-smt to gs12201-1011-9h-20p-l. (page 18)
2. Change CN1 footprint from 51605-01801-001-18p-l to 132f18-100000-a2-r-1p-l. (page 18)
B-stage 3. Change PJ3002 to short pad. (page 24)
12/27 1. Modify HDMI co-layout circuit without PTN3366BS. (page 16)
12/28 1. Change HOLE3 foot print to HG-ZAV-1. (page 17)
2. Change HOLE8, 9, 10, 11 foot print to H-IC146BC264D146PB. (page 17)
D
3. Change C183, C185 capacitor from 10pF to 27pF for frequency tolerance stability. (page 6) D

4. Change C361, C363 capacitor from 10pF to 12pF for frequency tolerance stability. (page 14)
5. Change HOLE6 foot print to h-tbc315ic205d165p2. (page 17)
6. Add HOLE22, 23. (page17)
12/29 1. Change Q26, Q29, Q34 part number from BAM34130001 to BAM21300000 for size and cost problem. (page 18,20)
2. Modify power part block diagram. (page 23~31)
01/03 1. Change PC8012 to 0.022uF as per FAE's suggestion. (page 27)
2. Change PR8028 to 374ohm as per FAE's suggestion. (page 27)
3. Change PC8010, PC8040 to 470pF as per FAE's suggestion. (page 27)
4. Change PR8001, PR8071 to 95.3k ohm as per FAE's suggestion. (page 27)

ZAV Rev. C 01/10 1. Add U35, U36, D8, D9 for HDMI ESD solution. (page 16)
2. Change C206 0805_47uF to 0603_22uF. (page 9)
C-stage 3. Add C834 0603_22uF. (page 9)
01/11 1. Change type-c CN21 footprint to ub31-ausb0181-p101a-24p. (page 13)
2. Remove C825 for ESD solution C3 and R2. (page 3)
01/13 1. Change CN3 foot print to rj45-jm361c-hp34aa03-9h-8p-smt for SMT P/R. (page 14)
01/20 1. Change CN21 symbol to dummy block for layout placement. (page 13)
01/24 1. Change R140,R143,R146,R149,R162,R163,R164,R165,R172,R190,R191,R192,R194,R198,R200,R201,R217,R218,R224,R244,R246,R331,R337,R338,
R341,R343,R364,R365,R366,R367,R368,R369,R370,R371,R373,R375,R380,R390,R392,R399,R404,R41,R421,R423,R424,R425,R427,R433,
R434,R467,R527,R528,R537,R538,R539,R540,R541,R553,R554,R555,R557,R558,R559,R568,R569,R570,R573,R587,R589,R590,R627,R637,
R638,R644,R645,R646,R647,R657,R662,R668,R677,R678,R679,R680,R684,R685,R686,R687,R688,R689,R690,R691,R764,R765,R766,R767,
C R775,R777,R778 from 0 ohm to shortpad. (page 2~22) C

01/25 1. Modify BOARD_ID5 to Type-C function (page 13)


2. Change PR8009 from 100k ohm to 0 ohm. (page 27)
3. Change EMI capacitor C483 from 10p to 33p. (page 17)
4. Stuff R473 for EMI solution. (page 17)
02/02 1. Change R115 from 0.0002 ohm to 0 ohm for the U22 power supply. (page 5)
02/03 1. Change HOLE21 foot print to H-TBC236IC115D95P2. (page 17)
02/06 1. Change HOLE15 foot print to H-C122D122N. (page 17)
2. Change HOLE4 foot print to HG-TC315BC236D95P2. (page 17)
02/07 1. Change HOLE8, 9, 10, 11 foot print to H-C256IC146D146P2 (page 17)
02/10 1. Change C183, C185 from 27pF to 33pF. (page 6)
2. Change C186, C187 from 6.8pF to 10pF. (page 6)
3. Change PR3021 from 24k ohm to 29.4k ohm for thermal requset. (page 30)
02/15 1. Change PU8005 part number to AL005049000. (page 29)
02/16 1. Change all the CH01006JBD1 to CH01006JB08. (page 4, 6, 7, 22)
02/17 1. Stuff PC128 and PC8047 for noise issue. (page 24, 28)
2. Change PC164, PC166 from 10uF to 22uF for noise issue. (page 23)
3. Change R704, R705 from 0 ohm to 15 ohm for ESD solution. (page 21)
ZAV Rev. D 02/20 1. Add C835 100pF for LCD flicker improvement. (page 15)
B
2. Add C836 0.1uF for enhance sensitive net ESD level by Intel suggestion. (page 9) B

RAMP-stage
02/28 1. Un-stuff SW1 power switch. (page 22)
03/03 1. Un-stuff U35, U36 on RAMP build. (page 16)
2. Stuff R494, seting HDD redriver IC EQ2 7dB. (page 18)
3. Add R779, R780 for KabyLake R-U42 uesd. (page 9)
4. Change R115, R116 from 0 ohm to 0.0002 ohm. (page 5)
03/06 1. Stuff C823 for eDP power supply input. (page 15)
2. Add R781 2.2 ohm for LID switch power supply. (page 15)
03/07 1. Change R121,R122,R124,R126,R177,R227,R229,R230,R231,R232,R233,R234,R235,R236,R243,R245,R255,R278,R279,R280,R281,R290,R291,R292,
R293,R374,R377,R384,R396,R398,R400,R411,R414,R460,R465,R469,R470,R473,R480,R490,R491,R492,R493,R501,R510,R523,R524,R525,
R542,R543,R545,R552,R563,R564,R575,R581,R598,R640,R641,R643,R663,R671,R672,R675,R676,R714,R715,R716,R717,R718,R719,
R720,R721,R733,R769 from 0 ohm to shortpad. (page 2~22)
2. Change power part PJ8000,PJ8001,PJ8002,PR8006,PR8009,PR8014,PR8016,PR8025,PR8029,PR8032,PR8035,PR8036,PR8038,PR8044,PR8045,
PR8050,PR8051,PR8053,PR8056,PR8058,PR8074,PR8075,PR8077,PR8078,PR8080,PR8095,PR8097,PR8098,PR8113,PR8115,
PR8116,PR8120,PR8121,PR8122,PR8079,PR8096,PR8114,PR8086,PR8088,PR8089,PR8087 from 0 ohm to shortpad. (page 23~31)
3. Non-stuff R58,R61,R542,R543 for RAMP stage. (page 4, 19)
03/08 1. Non-stuff R108 for KabyLake U-U22 and R-U42. (page 5)
2. Add C837 0.1uF for intel ESD solution. (page 9)
03/13 1. Change DRAM U9,U10,U11,U12 foot print to bga96-micron-mt41j64m16jt-187eg. (page 12)
03/14 1. Swap U29 pin-1 and pin-9 for layout placement. (page 21)
A
2. Remove TP63 for layout placement. (page 21) A
3. Remove R431, R434 EMI circuit for layout placement. (page 16)
4. Non-stuff C236, it can't power on with some 8GB or 16GB memory. (page 11)

Quanta Computer Inc.


PROJECT : ZAV DOC NO. PROJECT MODEL : APPROVED BY: DATE:
Size Document Number Rev
1A
Change List - 2 PART NUMBER: DRAWING BY: REVISON:
Date: Wednesday, March 15, 2017 Sheet 33 of 34

5 4 3 2 1
5 4 3 2 1

34
+5VPCU
S5_ON +5V_S5
VA AOZ1331DI
PU5
BQ24780SRUYR +VIN
D D
PU1 SYS_SHDN#
+5V TPS61087DRCR (Boost)
p24 PANEL_LED_EN PU8006 p31
+12V_Panel
MAINON
BAT-V

VL
p23

TPS51225RUKR
PU9
+3V_S5 G5719CTB1U +2.5V_SUS AO3404
+3VPCU +2.5V
SUSON_R PU19 p26 MAIND PQ40 p26
S5_ON AOZ1331DI
PU8

G5719CTB1U +1.8V_S5 AO3404


MAINON
+3V +1.8V
p24 S5_ON PU3004 p30 MAIND PQ9 p30

G5719CTB1U
3V_LDO MAINON PU3003 p30 +1.5V
p24

C C

G5335QT2U +1V_S5 AO3404


+1V_S5_ON PU16
SUSD PQ11
+1V_SUS
p25

p25

MDV1528QURH
MAIND PQ35
+VCCIO
p25

+1.2VSUS
S3/MAINON RT8231BGQW
S5/SUSON_R PU2001
+VDDQ_VTT

p26 +VDDQ

B B

ISL95829HRTZ-T AOZ5049QI
VRON_R PU8000
PU8001
+VCCCORE
p28
U22->1 phase
p27 U42->2 phase

AOZ5049QI
PU8002
+VCCCORE
p28

AOZ5049QI
PU8003
+VCCGT
p29

A A
AOZ5029QI-5
PU8005
+VCCSA
p29

Quanta Computer Inc.


PROJECT : ZAV
Size Document Number Rev
Power Tree 1A

Date: Wednesday, March 15, 2017 Sheet 34 of 34


5 4 3 2 1

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