LCD TV Service Manual: Konka Group Co, LTD

LCD TV SERVICE MANUAL
Model list
DLC-3211UT
DLC-3711UT
DLC-2611UT
KONKA GROUP CO,LTD.

Digital Flat Display Division
IMPORTANT SERVICE SAFETY INFORMATION
Operating the receiver outside of its cabinet or with its back removed involves a shock hazard.
Those who are thoroughly familiar with precautions necessary when working on high voltage
equipment should only perform work on these models.
Exercise care when servicing this chassis with power applied. if carelessly contacted, can cause
serious shock or result in damage to the chassis. Maintain interconnecting ground lead connections
between chassis, escutcheon, picture tube dag and tuner when operating chassis.
When it is necessary to make measurements or tests with AC power applied to the receiver
chassis, an Isolation Transformer must be used as a safety precaution and to prevent possible damage
to transistors. The Isolation Transformer should be connected between the TV line cord plug and the
AC power outlet.
It is important to maintain specified values of all components and anywhere else in the received
that could cause a rise in operating supply voltages. No changes should be made to the original design
of the receiver.
Components shown in the shaded areas on the schematic diagram and/or identified by in the
replacement parts list should be replaced only with exact factory recommended replacement parts. The
use of unauthorized substitute parts man creates may create shock, fire, or other hazards.
Before returning the receiver to the user, perform the following safety checks:
1. Inspect all lead dress to make certain that leads are not pinched or that hardware is not lodged
between the chassis and other metal parts in the receiver.
2. Replace all protective devices such as non-metallic control knobs, insulating fish papers, cabinet
backs, adjustment and compartment covers of shields, isolation resistor-capacitor networks,
mechanical insulators etc.
3. To be sure that not shock hazard exists, a check for the presence of leakage current should be made
at each exposed metal part having a return path to the chassis (antenna, cabinet metal, screw heads
knobs and/or shafts, escutcheon, etc.) in the following manner.
Plug the AC line cord directly into a 100~240V, AC receptacle. (Do not use an Isolation
Transformer during these checks.) All checks must be repeated with the AC line cord plug connection
reversed. (If necessary, a non-polarized adapter plug must be used only for the purpose of completing
these checks.)
PLEASE READ BEFORE ATTEMPTING SERVICE

1. Use an Isolation Transformer when performing any service on this chassis.
2. Never disconnect any leads while receiver is in operation.
3. Disconnect all power before attempting any repairs.
4. Do not short any position of the circuit while the power is on.
5. For safety reasons, replace components any with identical replacement parts (SEE PARTS LIST).
6. Before alignment, warm up the TV for at least 30 minutes.
7. When removing a PCB or related component, after unfastening or changing a wire, be sure to put
the wire back in its original position.
8. Inferior silicon grease can damage IC's and transistors. When replacing IC's and transistors, use
only specified silicon grease. Remove all old silicon when applying new silicon.
A. SPECIFICATION
Color System : NTSC_M、ATSC/Free QAM

Sound System : BTSC/SAP
Frequency range: Antenna(2~69)、Cable(2~135)
Audio output power 10%THD 10W X 2
Antenna Impedance 75Ω(Unbalance)
Power Consumption 160W(26”) , 180W(32”)，200W(37”)
Power Supply : AC~110-240V, 60Hz
item Port list

1 RF ANTENNA & Cable
3 Composite
4 S_VIDEO
5 Y、Cb/Pb、Cr/Pr
6 VGA
7 HDMI
8 SPDIF(OUT)
9 AC Input
ADJUSTMENT MANUAL
Ⅰ. TEST NOTE
1. Please follow the pointed test steps and choose the right test equipment to
conduct adjustment, otherwise good effect of Unit could not be obtained. The
unit should be warmed up for 30 minutes before adjustment and every
parameter should be adjusted repeatedly till the optimum value obtained, the
pointed voltage value should be ensured during test to get satisfied test result.
2. Test environment
1) Temperature ： 15°C-35°C
2) Relative Humidity: 45-75%
3) Air pressure: 86-106Kpa
3 Test equipments（The following equipment should be calibrated before testing）
1) Computer 1 set
2) Multi-meter (VICTOR VC9801) 1 set
3) Video Signal Generator (Chroma Model 2227/2327) 1 set
4) Color Analyzer (Chroma Model 7120 ) 1 set
5) TV Video Signal Generator (FLUKE PM54200) 1 set
6) ATSC signal Generator (SFU) 1 set
4 Factory mode adjustment
4.1 Enter factory mode adjustment
Using the remote control, press INPUT button once first , then press “2580”
digital keys , and you can see manufacture menu on the LCD panel.
4.2 factory menu operation method
Press the “ . ” key to select the page. Press the “▽△” to select the item you
desired change, and press the “< >” to set the value.
4.3 exit the factory menu
Press “Exit” to exit the factory menu , the value you have changed will be
save automatically.
4.4 White calibration adjustment
1 Receive black or white signal under TV、AV or HDMI mode, adjusting
brightness and contrast to set the brightness to 15 Nit in dark area and 90 Nit in
bright area.
2 Adjust white balance. Press“ . ”button to select the page adjusting White
calibration , Press the “▽△” to select the item you desired change, and press the
“< >” to set the values as follow.
Red Offset 1000
Green Offset 1000
Blue Offset 1000
3 Then adjusting “Red gain、Green gain、Blue gain” to adjust the chromaticity
coordinates of black and white to fit the requirement.
BLOCK DIAGRAM
HDA005A Board Block Diagram
DEVICE I2C SLAVE ADDRESS
HiDTV - LX
CVBS_OUTPUT PC AUDIO
SWITCH
SVP-EX62 7Ch/7Dh
CVBS YPBPR1 AUDIO PC_HDTV AUDIO TVP5147
Sil9011 60h/68h
YPBPR2 AUDIO
PCA9555 4Eh/4Fh
S_Video TEA6415 06h
Y/Pr/Pb1
SWITCH
LVDS OUTPUT
SVP-EX62 THC63LVD103
Y/Pr/Pb2
8051_BUS
PC IN
24-bit
PC
AUDIO 8051 I2C GPIO
1394/656 DOUT
HDMI
(HDCP) Sil9011 CAPD/IDE
HiDTV - LX AnalogRGB
TS1 bus
I2S TS1
Analog TV1
TS2 I2S/SPDIF
HDMI_SPDIF
PCI/FLASH/68K ADC IR MI I2S
SPDIF
68000 bus
SWITCH
SPDIF
HDMI_SPDIF
512Kx8 FLASH DDR
Flash (16MB) (8Mx16, 4 pcs)
FROM TUNER BOARD KEYPAD

RJ45
Ethernet Title
KONKA HIDTV ATSC MAIN
Infrared
Buttons Schematict Name Rev
Block Diagram 7
Size B Sheet 2 of 24 Date: Tuesday, March 21, 2006
AIR
分配器
RF 连接线
TDHU1-054A2
TDHU
32
12 M4 31
GND M3 30
ALPS_RF-SW M2
11 29
GND M1
PSYNC
RESET
10
+3.3V
+2.5V
+1.2V
GND
GND
GND
ERR
SDA
SCL
CLK
+5V
NC
NC
NC
NC
NC
NC
NC
DE
D7
D6
D5
D4
D3
D2
D1
D0
9
+B SW.BNC NC Co.1 Co.2 OOBGND GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
1 2 3 4 5 6 7 8
CABLE
RF_SELECT1
RF_SELECT2
CVBS
TS[0..7]
模拟TV(CVBS) TS流 TO HIDTV

切换开关
Signal flow chart
Analog TV signal flow chart:

HiDTV - LX
SVP-EX62 7Ch/7Dh
CVBS YPBPR1 AUDIO H PC_HDTV AUDIO TVP5147
C
TI Sil9011 60h/68h
YPBPR2 AUDIO W
S PCA9555 4Eh/4Fh
S_Video TEA6415 06h
Y/Pr/Pb1
LVDS OUTPUT
H SVP-EX62 THC63LVD103
C
TI
W
S
Y/Pr/Pb2
8051_BUS
PC IN
t
i
b
PC -
4
AUDIO 2
8051 I2C GPIO
1394/656 DOUT
HDMI
TS1 bus
I2S TS1
TS2 I2S/SPDIF
1 HDMI_SPDIF
V
T PCI/FLASH/68K ADC IR MI
g
ol
I2S
na 68000 bus
A
SPDIF
H FI
HDMI_SPDIF C
TI D
512Kx8 FLASH DDR P
W
S S

5 Ethernet
4
J
Title
R KONKA HIDTV ATSC MAIN

Infrared
Block Diagram 00
Size B Sheet 2 of 24 Date: T hursday, M arch 23, 2006
Other analog signal flow chart:

HiDTV - LX
SVP-EX62 7Ch/7Dh
CVBS YPBPR1 AUDIO H PC_HDTV AUDIO TVP5147
C
TI Sil9011 60h/68h
YPBPR2 AUDIO W
S PCA9555 4Eh/4Fh
S_Video TEA6415 06h
Y/Pr/Pb1
LVDS OUTPUT
H
C SVP-EX62 THC63LVD103
TI
W
S
Y/Pr/Pb2
8051_BUS
PC IN
t
i
b
PC -
4
AUDIO 2
8051 I2C GPIO
1394/656 DOUT
HDMI
TS1 bus
I2S TS1
TS2 I2S/SPDIF
1 HDMI_SPDIF
V
T PCI/FLASH/68K ADC IR MI
g
ol
I2S
na 68000 bus
A
SPDIF
H FI
HDMI_SPDIF C
TI D
512Kx8 FLASH DDR P
W
S S

5 Ethernet Title
4
J
R KONKA HIDTV ATSC MAIN
Infrared
Block Diagram 00
Digital TV signal flow chart:

HiDTV - LX
SVP-EX62 7Ch/7Dh
SWITCH
Sil9011 60h/68h
YPBPR2 AUDIO
PCA9555 4Eh/4Fh
S_Video TEA6415 06h
Y/Pr/Pb1
LVDS OUTPUT
SWITCH
Y/Pr/Pb2
8051_BUS
PC IN
24-bit
PC
AUDIO
8051 I2C GPIO
1394/656 DOUT
HDMI
TS1 bus
I2S TS1
TS2 I2S/SPDIF
HDMI_SPDIF
Analog TV1

68000 bus
SPDIF
SPDIF
SWITCH
HDMI_SPDIF
512Kx8 FLASH DDR

RJ45
Ethernet Title
Infrared
Block Diagram 5
Size B Sheet 2 of 24 Date: Monday, December 05, 2005
HDMI signal flow chart:

HiDTV - LX
SVP-EX62 7Ch/7Dh
SWITCH
Sil9011 60h/68h
YPBPR2 AUDIO
PCA9555 4Eh/4Fh
S_Video TEA6415 06h
Y/Pr/Pb1
LVDS OUTPUT
SWITCH
Y/Pr/Pb2
8051_BUS
PC IN
24-bit
PC
AUDIO
8051 I2C GPIO
1394/656 DOUT
HDMI
TS1 bus
I2S TS1
TS2 I2S/SPDIF
HDMI_SPDIF
Analog TV1

68000 bus
SPDIF
SPDIF
SWITCH
HDMI_SPDIF
512Kx8 FLASH DDR

RJ45
Ethernet Title
Infrared
Block Diagram 5
Size B Sheet 2 of 24 Date: Monday, December 05, 2005
IC BLOCK DIAGRAM
1 U15
(HiDTV)
2 U9 (SVP_EX62)
3 U11(Sil9011)
Trouble Shooting
Key IC list
Item Type Circuit No. Qty.

HiDTV
1 (CPU & MEPG2 U15 1
Decoder)
SVP_EX62
2 U9 1
(Decoder & Scaler)
U16、U17、
HY5DU281622ET
3 U18、U19、 6
(DDR)
U501、U502
Sil9011
4 U11 1
(HDMI Receiver)
28F128J3C-120
5 U20 1
(FLASH)
MSP4450G
8 N9 1
(Sound processor)
9 V103 U30 1
(Change TTL to
LVDS )
10 Tuner N1 1
RF-SW
11 (Antenna & Cable N3 1
SW)
MP1430
12 U1、U3、U4 1
(DC-DC)
PCA9555DB
13 U38 1
(GPIO expender)
Preparing to bring-up the System

Step1:Check if there is any power (12V, 5V, 5VSB, 3.3V, 2.5V, 1.8V,…) shortage
before power up refer to circuit diagram.
Step2:Turn on power supply and measure all power levels: 12V, 5V, 5VSB, 3.3V,
2.5V, and 1.8V refer to circuit diagram.
Step3: Measure all clock signals
14.318 MHz(Y4)
RTC 32.768 KHz crystal is sine wave with 0.5V P-P(Y3).
27 MHz crystal(Y5)
33 MHz_OSC (Y9) is a square wave and is critical for system reliability.
Step4: Measure EX(62)_RST, HiDTV_RST, PCI_RST, WARM_RST, RTC_RST,
and VCCH_RST.
VCCH_RST(IR), WARM_RST, and RTC_RST should be equally delayed
for about 1 second after power up.
EX_RST should have about 230 ms, and HiDTV_RST should have about
240 ms delay after power up.
Step5: Check if Boot ROM CS#, OE# , D0..D7, A0, A1, A2, ….pins toggle or not.
If not, HiDTV to Boot ROM traces maybe open or short. It is most likely
that the HiDTV BGA chip was not mounted correctly.
Step6: Plug in the UART connector, and check if there is any message that shows
up on the terminal screen.
If not, then plug in the PCI Extension card and set up the logic analyzer to
check the boot ROM and the PCI bus activity.
PCI buses such as PCI_CLK, AD31..0, C/BE3..0#. FRAME#, IRDY#,
DEVSEL#, TRDY#, STOP#, SERR#, REQ#, GNT#, RST#, INTA(and
B,C,D for multi-function device)# , and ROM_OE# need to be setup.
Step7: Logic analyzer is a very powerful and required tool to debug
microprocessor based systems.
HP 16500C(100 MHz state, 500 MHz timing) should be good enough to
serve the HiDTV debugging purpose.
Additional laboratory demonstrations will be arranged if necessary.
Step8: Check flash programming reliability.
Check all video inputs and signal quality.
Check DDR memory reliability.
Check power ON/OFF, cold/warm reset stability.
Check the low voltage(1.7 V)/high temperature (40 degree C)
environment test.
Step9: If you can not find out the reason of trouble, we advise you to change the
PCB. There are six PCBs in the system as follow:
Volume Power board
amplifi
er
board
Digital signal board Tuner board
Key
board
IR board
Power board: Supply the power(12V,5V,24V);
Digital signal board: CPU, MEGE2 decoder, analog decoder, scaler ……
Tuner board: TV receiver, demodulator, sound preprocessor……
Key board: User menu interface;
IR board: IR receiver.
You can change anyone of them to deal with the trouble according to your
judgement.
The circuit diagram
LX_VCC_33
LX_UART_TXD R283 100 R285 100
LX_UART_TXD 20
C3001 C3002 C3003
PCI_33
12pF 12pF 12pF LX_UART_RXD R284 100 R286 100
LX_UART_RXD 20
CN3001-1 CN3002A
Y1 L11
COMPONENT 1 AUDIO Y 1_R
2 Y 1 2 1 R3001 4.7K
GND1 SIG1 3.3V_SB
PB
4 3 CbPb1 R11 R3002 4.7K Y 1_L
GND2 SIG2 4 3 CN3003
R3003 R3004 6
1 743209056/52520-011129
PR C3004 C3005 C3006 C3007 R3006 C3008 C3009 C3010
CrPr1 R3005
6 5 R3007 2.2K 2.2K G
GND3 SIG3 47K
ZD3002 ZD3003 220pF 220pF 220pF 220pF 47K 6 12pF 12pF 12pF
ZD3001 BAV99L R3008 BAV99L 75 11 6 1 R3009 0
11 1 VGA_RIN 7
COMPONENT BAV99L L3001 7
75 CBG201209u360B VGA_SDA_IN 12 7 2 R3010 0
12 2 VGA_GIN 7
8
3.3V_SB R3011 3.3V_SB 3.3V_SB VGA_HS
13 8 3 R3012 0
13 3 VGA_PIN9 VGA_BIN 7
9
75 VGA_VS
14 9 4 ZD3004 ZD3005 ZD3006
L3002 14 4 10 BAV99L R3013 BAV99L R3014 BAV99L R3015
CBG201209u360B VGA_SCL_IN 15 10 5
15 5
G 75 75 75
3.3V_SB 3.3V_SB 3.3V_SB
R3016 R3017 7
C3011 C3012 C3013 22 22 1
CN3001-2 12pF 12pF 12pF
8 Y7 Y2 U301
GND1 SIG1 VGAHS 1 2 R3019 22_DNS
CN3002B 3 1A 1Y 4 R3020 22
VGAVS 2A 4 2Y VGA_HSIN 7
PB COMPONENT 2 AUDIO 5 1 6 R3021 22_DNS
10 9 CbPb2 6 5 L22 R3022 4.7K Y 2_L 9 3A C
3Y 8 R3023 22
GND2 SIG2 4A V 4Y VGA_VSIN 7
11 L 10
3.3V_SB 13 5A 4 5Y 12
7
6A 6Y
PR
12 11 CrPr2 R22 R3024 4.7K Y 2_R 14 7
GND3 SIG3 8 7 C3014 C3015 C3016 VCC GND
ZD3007 ZD3008 ZD3009 74LVC14
COMPONENT BAV99L BAV99L BAV99L C3017 C3018 R3025 C3019 C3020 R3026 100pF 47pF 0.1uF 5V_SB
R3027 R3028 R3029 220pF 220pF 47K 220pF 220pF 47K D3001
3.3V_SB 2 VGA_PIN9
3.3V_SB 75 3.3V_SB 75 75 R3030 10K 3
1
R3018
BAV70L
3.3V_SB 3.3V_SB 4.7K
U302
R3031 10K 8 7
ZD3010 ZD3011 VGA_SDA 5 VCC VCLK 3 C3021
VGA_SCL 6 SDA NC2 2 VGA_HS VGA_VS
BAV99L BAV99L AGND 4 SCL NC1 1 0.1uF
GND NC0 ZD3012 ZD3013
CN3004 24LC21 BZV55 BZV55
4 5 I2C Address: 1010 000x
8-pin, 300mil DIP with socket
L3003 L3004
7 C_EX CBG201209u360B CBG201209u360B Y _EX 7
1 CN3005B
C3022 C3023 R3032 R3033 C3024 6 5 SC1_OUT_R

SC1_OUT_R 9
C3025
12pF 12pF 75 SVIDEO 75 12pF
12pF
3 2
8 7 SC1_OUT_L
SC1_OUT_L 9
AGND
3.3V_SB
ZD3014 CN3006
CN3005C BAV99L 5 4 PC_AUDIOL R3034 4.7K PC_L

GND SIG2
CN3005A 3
10 9 CVBSOUT NC
CVBSOUT 9 CVBS in with Audio
2 1 R3036 4.7K 1 2 PC_AUDIOR R3035 4.7K PC_R
Audio1_R 9 GND1 SIG1
L3005 C3026 C3027 R3037
12 11 CVBSIN CBG201209u360B PC VGA&HDMI AUDIO IN R3038
CVBS 7
220pF 220pF 47K
4 3 R3039 4.7K 47K
Audio1_L 9
ZD3015 C3028 C3029 R3040
12pF 12pF 75 C3030 C3031
BAV99L ZD3016 220pF 220pF
BAV99L R3041 R3042
47K 47K
3.3V_SB
AGND AGND
3.3V_SB
3.3V_SB AGND 3.3V_SB
R3043 R3044 4 3 2 1 4 3 2 1
20k 20k RN4 RN2
CBW321611U121B 100Kx4 100Kx4
5V_2
Y1 C3032 22uF/16V Y 11 Y2 C3033 22uF/16V Y 22 L3006
5 6 7 8 5 6 7 8 5V_1
3.3V_SB 3.3V_SB + C3034
R3045 R3046 10uF/16V C3035
10k 10k 0.1uF U303
Y 1_L C649 0.47uF 1 3 Audio2_L L3007
2Y 0 2-COM Audio2_L 9
R3047 R3048 5
20k 20k U304 6 Y 2_L C650 0.47uF 2 2Y 1 16
1 2Y 2 VCC
Y 11 2 4 10 AUDSEL1 CBW321611U121B
AGND AGND Y 22 S1a PC_L C651 2Y 3 A AUDSEL2 AUDSEL1 20
3 C 0.47uF 9
CbPb1 PB11 CbPb2 PB22 S2a C Y _IN B AUDSEL2 20
C3038 22uF/16V C3039 22uF/16V V 4 6 + C3036
3.3V_SB 3.3V_SB PB11 5 Da Y _IN 7 Y 1_R C652 0.47uF 12 INH 8 C3037 0.1uF
PB22 6 S1b 14 1Y 0 GND 7 10uF/16V
R3049 R3050 S2b 7 PB_IN Y 2_R C647 0.47uF 15 1Y 1 GND
10k 10k PR11 11 Db PB_IN 7 11 1Y 2 13 Audio2_R
PR22 S1c PC_R C648 1Y 3 1-COM Audio2_R 9
R3051 R3052 10 0.47uF
20k 20k S2c 9 PR_IN 74LV4052D
14 Dc PR_IN 7
13 S1d
AGND AGND S2d
CrPr1 C3040 22uF/16V PR11 CrPr2 C3041 22uF/16V PR22 HD_SW
R3053 100 1 12
20 HD_SW IN Dd
15 4 3 2 1 4 3 2 1
(I/O_EX) #EN D RN3 RN1
R3054 R3055 N 100Kx4 100Kx4
G
10k 10k
PI5V330 8
5 6 7 8 5 6 7 8 Title
AGND AGND
Schematict Name Rev
VIDEO INPUT 00
Size C Sheet 4 of 24 Date: T hursday, M arch 23, 2006
3.3V_SB
3V3S
R62 R28
C550 + C551 C552 C553 C554 C555 C556 C557 C558 C559 C560 C561 C562
4.7K 4.7K
10uF/16V0.1uF 0.1uF 0.1uF 0.1uF 1000pF 1000pF 1000pF 1000pF 1000pF 1000pF 1000pF 1000pF LX_INT2 R2210 100 3V3S
LX_PG4 R134 100 R945 33 RST# 9,21
RST# R2259 100 R136 33 VS_EX
DDC_SDA1 R2212 33 HS_EX
VR1_8 LX_INT2 6,11
DDC_SCL1 R2213 33 CLK_EX
LX_PG4 11
7 0 6 8 7 8 9 SCL_MST 6,9,11,16,20,21
U11 2 1 9 0 1 9 1 8 7 8 0 2 8 0 9 8 7 0 1 2 2 1 Sii9011
4 4 8 9 9 7 1 3 6 7 9 1 1 6 1 3 6 7 9 1 1 1 1 1 1
C563 + C564 C565 C566 C567 C568 C569 C570 C571 C572 C573 SDA_MST 6,9,11,16,20,21
L A # T T CC CCCCC CDDD DDDD D E CC K 35
10uF/16V 0.1uF 0.1uF 0.1uF 0.1uF 1000pF1000pF1000pF1000pF1000pF1000pF 48 CD T D N CC CCCCC CNNN NNNN N DNN C QO0 34
S S E C I V V V V V V V VGGGGGGGG Y Y D
ANTSTO DD S S S S O QO1 33 VS_EX 6,10,17
E OOOOOOOOOOOOOOOO QO2
RXC- 50 R V H 32
RXC+ 51 RXC- QO3 29 HS_EX 6,10,17
5V_1 RXC+ QO4 28
D12 RX0- 54 QO5 27 CLK_EX 6,10
5V_HDMI RX0+ 55 RX0- QO6 26
RX0+ QO7
2 1
RX1- 58
RX1+ 59 RX1- 23
RX1+ QO8 22
CON5 BAV70L RX2- 62 QO9 21
21 RX2+ 63 RX2- QO10 20
3
23 SHELL2 19 HOTPLUG IN_5V 3V3S RX2+ QO11 17
SHELL4 HP DET 18 5V_HDMI R25 1K FB9 150_Ohm_600mA QO12 16
+5V 17 2 1 49 QO13 15
GND 16 DDC_SDA 53 AVCC QO14 14
DDC DATA 3 AVCC QO15 HDMI_SPDIF 17
15 DDC_SCL Q1 C574 + C575 C576 C577 C578 C579 C580 57
1 DDC CLK 14 1 4.7K R26 61 AVCC
2 NC HDMI_HOTPLUG 20 AVCC
13 10uF/16V 0.1uF 0.1uF 1000pF 1000pF1000pF 1000pF 52 11
w CEC 12 RXC- MMBT3904 56 AGND QO16 10
e CK- 11 3V3S 60 AGND QO17 9
i CK Shield 10 RXC+ 2 64 AGND QO18 8
V CK+
D0-
9 RX0- FB10 150_Ohm_600mA AGND QO19
QO20
5
18 8 1 2 4
19 p D0 Shield 7 RX0+ SiI 9011 QO21 3
o D0+ 6 RX1- C582 C583 + C584 C585 47 128-Pin LQFP QO22 2
T D1-
D1 Shield
5 46 PVCC
PGND
QO23
4 RX1+ 0.1uF VR1_8 10uF/16V 0.1uF 1000pF
B D1+ 3 RX2- DIN[0..23] 6,16
C D2- 2
P 22
SHELL3
D2 Shield
D2+
1 RX2+ 66
DVCC QE0
124 BIN0 RN13 1 8 33x4 DIN8
20 C586 C587 82 123 BIN1 2 7 DIN9
SHELL1 65 DVCC2 QE1 122 BIN2 3 6 DIN10
HDMI_con 1000pF 1000pF 83 DGND QE2 121 BIN3 4 5 DIN11
DGND2 QE3 117 BIN4 RN14 1 8 33x4 DIN12
3V3S FB11 QE4 116 BIN5 2 7 DIN13
150_Ohm_600mA QE5 115 BIN6 3 6 DIN14
1 2 86 QE6 114 BIN7 4 5 DIN15
IN_5V 1 2 87 XTALVCC QE7
VR1_8 REGVCC 111 GIN0 RN15 1 8 33x4 DIN0
C614 + C611 R566 FB12 C588 + C589 C590 C591+ C592 C593 C594 0.1uF QE8 110 GIN1 2 7 DIN1
U7 NC 150_Ohm_600mA 45 QE9 109 GIN2 3 6 DIN2
10uF/16V0.1uF 3V3S 10uF/16V 0.1uF 0.01uF 10uF/16V0.1uF0.01uF VPP QE10 108 GIN3 4 5 DIN3
38 1 QE11 105 GIN4 RN16 1 8 33x4 DIN4
37 NC 5V_SUPPLY 2 CI2CA 38 QE12 104 GIN5 2 7 DIN5
36 TMDS_BYP LV_SUPPLY 3 TP19 67 CI2CA QE13 103 GIN6 3 6 DIN6
C612 Rx2+ 35 GND GND 4 Rx2+ C613 + C610 TP_T_C30 MUTE QE14 102 GIN7 4 5 DIN7
0.1uF 34 TMDS_D2+ TMDS_D2+ 5 HDMI_SPDIF 70 QE15
Rx2- 33 TMDS_GND TMDS_GND 6 Rx2- 10uF/16V0.1uF R2221 33 SPDIF 101 RIN0 RN17 1 8 33x4 DIN16
Rx1+ 32 TMDS_D2- TMDS_D2- 7 Rx1+ 71 QE16 100 RIN1 2 7 DIN17
31 TMDS_D1+ TMDS_D1+ 8 72 SD3 QE17 99 RIN2 3 6 DIN18
Rx1- 30 TMDS_GND TMDS_GND 9 Rx1- 73 SD2 QE18 96 RIN3 4 5 DIN19
Rx0+ 29 TMDS_D1- TMDS_D1- 10 Rx0+ HDMI_SD0 RN18 1 8 33x4 74 SD1 QE19 95 RIN4 RN19 1 8 33x4 DIN20
28 TMDS_D0+ TMDS_D0+ 11 HDMI_WS 2 7 75 SD0 QE20 94 RIN5 2 7 DIN21
Rx0- 27 TMDS_GND TMDS_GND 12 Rx0- HDMI_SCK 3 6 76 WS T QE21 93 RIN6 3 6 DIN22
TMDS_D0- TMDS_D0- SCK U V QE22
RxC+ 26 13 RxC+ HDMI_MCLK 4 5 79 O NI 5 L A 92 RIN7 4 5 DIN23
25 TMDS_CK+ TMDS_CK+ 14 MCLK L L R T QE23
A A CCCC CCDDD DDD S CD
RxC- 24 TMDS_GND TMDS_GND 15 RxC- 3V3S T T W CCCC CCNNN NNN C E S S
TMDS_CK- TMDS_CK- X X P V V V V V VGGGGGG N T CC
23 16 IIC address:
DDC_SCL 22 CE_REMOTE_OUT CE_REMOTE_IN 17 DDC_SCL1
DDC_CLK_OUT DDC_CLK_IN 0x60/0x68 with CI2CA pull down 4 5 4 2 4 6 1 2 5 3 5 7 0 3 6 3 8 0 9
DDC_SDA 21 18 DDC_SDA1 R2225 8 8 4 1 2 3 8 1 2 1 2 3 8 1 2 4 8 4 3
1 1 1 1
HOTPLUG 20 DDC_DAT_OUT DDC_DAT_IN 19 HOTPLUG 0x62/0x6A with CI2CA pull up
HOTPLUG_DET_OUTHOTPLUG_DET_IN 4.7K_DNS C595 18pF RXOR2224 33 XO
CI2CA R2226
CM2021 R2229 R2227 R2228 68 SDA_MST
R2231 Y6 100 VR1_8 4.7K R2230 68 SCL_MST
LAYOUT: Place xtal circuit as compact 1M 28.322MHz

4.7K and close to chip as possible
C596 18pF XI
V
5
_
N
I
AOUTR C361 10uF/16V R473 4.7K

+ Audio3_R 9
R475 V
5
_
5V_1 47K C362 NI
330pF R66 4.7K R70 0 DNS
FB8 C54 C55 +

1 2 R68 R69
AGND AGND 0.1uF 22uF/16V
U10 CS4344 150_Ohm_600mA 4.7K 4.7K U6
HDMI_SD0 1 10 AOUTR AOUTL C363 10uF/16V R476 4.7K 8 1
SDATA AOUTR Audio3_L 9
7 VCC NC0
HDMI_SCK +
2 9 2
HDMI_WS 3 DEM/SCLK VA 8 DDC_SCL R73 47 6 VCLK NC1 3
HDMI_MCLK 4 LRCK AGND 7 AOUTL + TC357 C356 R478 C364 DDC_SDA R74 47 5 SCL NC2 4
5 MCLK AOUTL 6 47K SDA GND
VQ FILT 330pF
10u/16v 0.1uF 24LC21
This EEPROM is for HDMI EDID

+ TC390 C387
AGND AGND
10u/16v 0.1uF + TC388
10u/16v
AGND
Title
Schematict Name Rev
Sil9011 00
Size C Sheet 5 of 24 Date: M onday, April 24, 2006
DQS[0..3] 8
8 MA[0..11]
8 DQM[0..3] RAS#
CAS#
8
8
Test pads for DDR
8 MD[0..31] WE# 8
0 1 3 MCLK0 8 TP2 to TP7 are enlarged solder
0 1 2 3 S S 2 S MCLK0# 8 side via pads for signal probing
0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 1 0 QQSQ
0 1 2 3 4 5 6 7 8 9 1 1 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 2 2 3 3 1 1 9 8 7 6 5 4 3 2 1 0 MMMM DDQD CLKE 8
DDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDD A A A A A A A A A A A A QQQQ D purpose. Keep close to the
MMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMM MMMMMMMMMMMM DDDD BA0 8
BA1 8 controller.
0 9 0 8 0 0 9 0 9 0 0 0 9 0 0 2 2 2 1 0 0 8 7 7 8 8 7 8 8 8 9
8 8 1 9 9 0 0 0 1 5 4 7 6 4 3 3
DIN[0..23] 5,162 1 2 1 8
U9A 1 2 2 1 2 1 2 2 2 1 2 2 1 1 1 1 1 1 9 9 8 8 8 7 7 6 6 5 1 1 1 1 1 1 1 1 1 1 1 1 1 1 6 2 2 1 7 1 5
1 1 1 1 1 1 1
N NMM L K J J HGG F D C C B A B C C B C A C A B C C D B C A K J HHGG F E E DC B L E A A L E A A C B C A A DC A
SDA_EX R95 68
DIN0 Y5 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 1 0 9 8 7 6 5 4 3 2 1 0 0 1 2 3 0 1 2 3 # # # 0 # E 0 1 SCL_EX R96 68 SDA_MST 5,9,11,16,20,21
DIN1 Y6 DPIN0 D D D D D D D D D D 1 1 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 2 2 3 3 1 1 A A A A A A A A A A
A A MMMMMMMMMM MMMM S S S S S S E K 0 K A A SCL_MST 5,9,11,16,20,21
DDDDDDDDDDDDDDDDDDDDDD
DPIN1 M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M QQQQ QQQQ A A C K L B B
DIN2 W6 MM DDDD DDDD R CWM C C B16 C179 C78
DIN3 DPIN2 M CS0# CS0# 8
V6 C16 68pF 68pF
DIN4 DPIN3 CS1# CS1# 8
U6
DIN5 U7 DPIN4 A14
DIN6 V7 DPIN5 MVREF MVREF 8 5V_SB
DIN7 W7 DPIN6 U2 R98 4.7K
DIN8 W3 DPIN7 TESTMODE U3 VD3_3 VD3_3
DIN9 DPIN8 RESET RESET 21
Y3 V1 R99 0
DIN10 Y4 DPIN9 V5SF
DIN11 W4 DPIN10 V2 SDA_EX C79
DIN12 V4 DPIN11 SDA U4 SCL_EX R100 R101
DIN13 U5 DPIN12 SCL 0.1uF MPU has Multiplex I2C Address:7E/7F
DIN14 V5 DPIN13 V3 PWM_EX R102 0
Data/Address
10K 10K_DNS
DIN15
DIN16
DIN17
W5
Y7
Y8
DPIN14
DPIN15
DPIN16
SVP-EX62 [BGA320] PWM
ADDR7
E2
E1
MPUGPIO4 MPUCS0N
DIN18 W8 DPIN17 ADDR6 D1

DIN19
DIN20
DIN21
V8
U8
U9
DPIN18
DPIN19
DPIN20
(1 of 2) ADDR5
ADDR4
ADDR3
D2
D3
D4
MPU has Separared
Address/data
R103
1K_DNS
I2C Address:7C/7D
R104
1K
DIN22 V9 DPIN21 ADDR2 C4
DIN23 W9 DPIN22 ADDR1 C3
DPIN23 ADDR0 8051_D[0..7] 11
Y 10 C2 RN60 1 8 22x4 8051_D7
5,10,17 HS_EX DPIN_H AD7 8051_D6
W10 C1 2 7
5,10,17 VS_EX DPIN_V AD6 8051_D5
Y9 B1 3 6
5,10 CLK_EX DPIN_CLK AD5 8051_D4
V10 A1 4 5
10 DE_EX DPIN_DE AD4 8051_D3
U10 A2 RN61 1 8 22x4 VD3_3
10 FLD_EX DPIN_FLD AD3 8051_D2
B2 2 7 R27 0
AD2 B3 3 6 8051_D1
D AD1 A3 4 5 8051_D0 MPUGPIO1 MPUGPIO0 R105 0 DNS 8051_PS
L AD0 11
F
_ 5 4 3 2 1 0 0 1 2 3 4 E3 R106 0
K O N RD# 8051_RD 11
_ L T T T T T T I O
I O
I O
I O
I 0 E4 R107 0 (HIDTV)
S C R R WR# 8051_WR 11
C _ _ _ 0 1 2 3 4 5 6 7 R
_ R 0 1 2 3 4 5 R
_ 8 9 1 1 1 1 1 1 _
R 6 7 8 9 0 1 2 3
_ 1 1 1 1 2 2 2 2 0 1 2 3 4 5 6 7 8 P P P P P
GGGGG
S
C F1 R108 0 R109
1 2 3 4 5 6 7 8 9 1 1 1 1 1 1 1 1 1 ALE 8051_ALE 11
U O I O
I O
I O
I O
I O
I O
I O
I O
I O
I O
I O
I O
I O
I O
I O
I O
I O
I O
I O
I O
I O
I O
I O
I O
I O
I O
I O
I O
I O
I O
I V V V V V V V V V V V V V V V V V V 1 2 3 UUUUU #
T U
8051_PS=1: Select SVP-EX
P E P P P P P P P P P P P P P P P P P D P P P P P P P P P P D P P S S S S S S S S S S S S S S S S S S CCC P P P P P P 1K
MDD V H D DDDDDDDDDD DDDDD P DDDD DDDDDD P DD RRRRRRRRRRRRRRRRRRNNN MMMMM NI M 8051_PS=0: Do Not Select SVP-EX
1 2 5 1 2 7 7 7 7 6 6 6 6 6 5 7 8 5 5 4 4 4 4 3 3 7 7 3 3 2 2 2 1 1 1 9 0 9 0 9 0 9 0 9 0 9 0 8 8 9 8 0 8 8 8 8 4 4 6 7 8 3 2 MPUCS0N
W Y 1 YW 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
P 4
R W Y T U V W Y Y 3T 2
U V U U VWY YW1 U0V V U VW Y YW V
1 2 1 2 1 2 1 2 1 2 1 2 1 1 1 1 2 1 1 1 1
R R T T U U V V WW Y Y V W P Y P R N P T
B A D E E F F R110 100
W 5 0 1 2 3 4 5 T T 6 7 8 9 0 1 2 3 LX_INT2 5,11
T T 0 1 2 3 4 5 6 7 T T 8 9 1 1 1 1 1 2 2 2 2 SVP-EX62
18 FLDOUT_EX 1 1 1 1 1
R
_ R RR OOOOOOOR R OOOOOOO MPUGPIO4
18 DEOUT_EX _ O
I O
I O
I O
I O
I O
I O
I O
I _ _ OI I I I I I I I _ _ O
I I I I I I I I
18 CLKOUT_EX
O I P P P P P P P PO
I O I P P P P P P P PO
I O I P P P P P P P P
I O R111 0
P P DDDDDDDD P P DDDDDDDD P P DDDDDDDD R112 0
18 VSOUT_EX DD DD DD MPUGPIO1
18 HSOUT_EX MPUGPIO0 AGND
Configuration A: MCU_ADD_CNTRL pulles HIGH

VO_R[0..7] INPUT OUTPUT
VO_G[0..7] 18 18RN5 VO_G[0..7] 18 VO_R[0..7] 18
RN70 33x4 RN71 33x4 33x4_DNS RN6 33x4_DNS MPUGPIO1 MPUGPIO0 MPUCS0N *CS1N MPUGPIO2 MPUGPIO3
DPIO0 5 4 VO_G0 DPIO16 5 4 VO_R0 DPIO2 5 4 VO_G0 DPIO16 4 5 VO_R6
DPIO1 6 3 VO_G1 DPIO18 6 3 VO_R2 DPIO3 6 3 VO_G1 DPIO18 3 6 VO_R0 0 0 0 1 1 1
RN72 33x4 RN73 33x4 RN7 33x4_DNS RN8 33x4_DNS 1 0 1 1 0 1
VO_B[0..7] 18 RN10 33x4 *CS1N is not a input or output pin

RN45 33x4 VO_B[0..7] 18 RN9 33x4_DNS 5 4
DPIO11 5 4 VO_B3 DPIO8 5 4 VO_B6 DPIO_RT1 6 3 VO_R0_0 CS1N=0: SVP-EX CPU acces s enabled
DPIO10 6 3 VO_B2 DPIO9 6 3 VO_B7 DPIO_RT0 7 2 VO_R0_1 VO_R0_0 18
VO_R0_1 18 CS1N=1:SVP-EX CPU acces s dis abled
DPIO8 7 2 VO_B0 DPIO10 7 2 VO_B0 8 1
DPIO9 8 1 VO_B1 DPIO11 8 1 VO_B1
RN12 33x4
RN46 33x4 RN11 33x4_DNS DPIO_RT5 5 4 VO_G0_0 Title
DPIO13 4 5 VO_B5 DPIO13 5 4 VO_B3 DPIO_RT4 6 3 VO_G0_1 VO_G0_0 18
DPIO12 3 6 VO_B4 DPIO12 6 3 VO_B2 DPIO_RT3 7 2 VO_B0_0 VO_G0_1 18 KONKA HIDTV ATSC MAIN
DPIO14 2 7 VO_B6 DPIO14 7 2 VO_B4 DPIO_RT2 8 1 VO_B0_1 VO_B0_0 18
DPIO15 1 8 VO_B7 DPIO15 8 1 VO_B5 VO_B0_1 18 Schematict Name Rev
FOR DS90C385 SVP-EX62_1 00

DNS Size B Sheet 6 of 24 Date: T hursday, M arch 2 3, 2006
VREFN_3
VDDMQ VDDMQ VD3_3 VREFP_3 C80 C81 C82
VDDH_CPU VREFN_2 CVBS1 0.47uF Y _G1 0.47uF Y _G2 0.47uF
CVBS 4 Y _IN 4 VGA_GIN 4
L L VREFP_2
S D VREFN_1
S D C83 R113
V V VREFP_1 20pF R114 R115
VD1_8 U9B 7 7 7 0 1 2 5 6 5 6 7 7 8 8 4 5 0 9 1 2 75_DNS 75_DNS 75_DNS
1 7
1 1 1 9 1 1 1 1 1 1 1 1 1 1 1 1 1 2 1 1 1 6 7 8 3 4 5
1 1 1 5 5 1 2 2 1 2 3
M L K J DDDD E EDDDC B A B A A A UU T T T T T T HG GGHH L L
C5 RR L L HHHHHHHH U U 3 3 2 _ 1 _
2 _ 1 X1 AGND AGND AGND
D5 VDDC M MMMMMMMMMMMMMMM
DDDDDDDDDDDDDDDD SD S D DDDDDDDD P P
_ _ _
14.318MHz
SD S N PN PN P
E14 VDDC D D D D D D D D D D D D D D D D V V V D
V DDDDDDDD
V V V V V V V V
C
_ C
_ F F F F F F P1 C85 C86 C87
VDDC V V V V V V V V V V V V V V V V H H E E E E E E XTLI CVBS2 PB_B1 PB_B2
E13 D D RRRRRR R1 0.47uF 0.47uF 0.47uF
VDDC V V V V V V XTLO ATV_IN 9 PB_IN 4 VGA_BIN 4
E6 D D
E5 VDDC V V C84
F16 VDDC T3 PLF2 20pF R116 R117 R118
G16 VDDC PLF2 R3 MLF1 75_DNS 75_DNS 75_DNS
H16 VDDC MLF1
N16 VDDC
N5 VDDC T4 AGND AGND AGND
VDDC AIN_HS VGA_HSIN 4
P16 U1
VDDC AIN_VS VGA_VSIN 4
P5 C88 C89 C90
R16 VDDC CVBS3 0.47uF PR_R1 0.47uF PR_R2 0.47uF
VDDC PR_R1 Y _EX 4 PR_IN 4 VGA_RIN 4
R5 G3
T5
H13
H8
VDDC
VDDC
VDDC
SVP-EX62 [BGA320] PR_R1
Y _G1
PB_B1
M1
J2
G4
Y _G1
PB_B1
PR_R2
R119
75_DNS
R120
75_DNS
R121
75_DNS
N13 VDDC PR_R2 N2 Y _G2
N8
B17
VDDC
VDDC (2 of 2) Y _G2
PB_B2
J3 PB_B2
K3 EXCVBS_OUTP
AGND AGND AGND
VSS CVBS_OUTP EXCVBS_OUTP 9
B13 K2 C91
VSS CVBS_OUTN EXCVBS_OUTN 9
B11 L4 CVBS1 C_ 0.47uF AIN_N1
VSS CVBS1 C_EX 4
B9 M4 CVBS2 AIN_N2
B7 VSS CVBS2 M3 CVBS3 AIN_N3
B5 VSS CVBS3 J1 C_ R122
D19 VSS C 75_DNS
D13 VSS M2 AIN_N1
D8 VSS AIN_N1 N1 AIN_N2
F19 VSS AIN_N2 N3 AIN_N3 AGND AGND
F17 VSS AIN_N3
H19 VSS
K19 VSS
VSS 2
M19 1 2 3 P
N17 VSS 1 2 3 S
C C C G C C C V
VSS D D D D D D A
2 1 B
_ 2 1 A A A _
A A A DDD _ _ _
S S S S _ _ _ 3 D 3 C92 C93 C94
S S S S S S S S D DDDD D D D
0.1uF_DNS_
1 0.1uF_DNS 2 0.1uF_DNS_
3
S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S V V V V S S S S V V V V D D D D 1
_ 2
_ _ 3
_
S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S A A AD V V V V A A AD V V V V P N P N P N
V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V P P P P A A A A P P P P A A A A F F F F F F
E E E E E E
9 0 1 2 8 9 0 1 2 3 8 9 0 1 2 3 8 9 0 1 2 3 8 9 0 1 2 3 9 0 1 2 2 4 2 4 1 3 5 4 1 2 3 4 1 4 4 4 R R R R R R
H 1 1 1 J J 1 1 1 1 1 1 1 1 L L 1 1 1 1 MM 1 1 1 1 N 1 1 1
J J J J K K K K K K L L L L T R P P L H F K T R P N KH F J C95 V V C96 V V C98 V V
HHH MMMM N N N 2 1 2 C100
S S S S 2 1 0.1uF 0.1uF C97 0.1uF C99
S S S S 1 2 3 D DD D 1 2 3 P 0.1uF
V V V V C C C G D DD DCCC S V
0.1uF 0.1uF
A A ADD D D V V V V DDD A AVSS_ADC1 AVSS_ADC2 AVSS_ADC3
P P P P A B
_ A A A D A A A _
SVP-EX62 _ A
_ A
_ P P P P _ _ _ 3
3
S S S S DDDD
S S S S DDDD
FB14 V V V V V V V V
VL1_8 VA1_8 A A A A A A A A
2 1
VL1_8 VDDMQ
FB3 VD1_8 VA1_8 VDDMQ VD1_8
BLM18PG181SN1 BLM18PG181SN1 C110 C112 C114 C1 C2 C3 C6 C5 C4
C108
R123 22 PAVDD1 VDDL 1 2 AVDD_ADC1 L13 2.2uH_1206 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
C103
C102 + 0.1uF C101 2700pF MLF1 C104 + C105 C106 + C107 + C115
0.1uF
22uF/16V 22uF/16V 0.1uF 22uF/16V 10uF/16V
PAVSS1 VSSL AVSS_ADC1
D
N C109 C111 C113
G
A 0.1uF 0.1uF 0.1uF VD3_3
FB4 VA1_8 VA1_8 VD1_8 C118
BLM18PG181SN1 C127 C129 C131 C133 C17 0.1uF
R2238 22 PAVDD2 PDVDD 1 2 AVDD_ADC2 L14 2.2uH_1206 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
C122 + C120
C121 + 0.1uF C116 2700pF PLF2 C123 + C124 + C126 + C135
0.1uF C125 10uF/16V
22uF/16V 22uF/16V 0.1uF 22uF/16V 10uF/16V
PAVSS2 PDVSS AVSS_ADC2 C117 C119
D
N C128 C130 C132 C134 0.1uF 0.1uF
G
A 0.1uF 0.1uF 0.1uF 0.1uF
FB5 VD3_3 FB6 VA1_8 VA1_8 3.3V
BLM18PG181SN1 BLM18PG181SN1
AVDD3_AVSP2 1 2 PAVDD 1 2 AVDD_ADC3 L15 2.2uH_1206 VDDH_CPU 1 2
Title
C136 + C137 C138 + C139 C140 + C141 C142 + C143 FB7
0.1uF 0.1uF 0.1uF 0.1uF BLM18PG181SN1 KONKA HIDTV ATSC MAIN
22uF/16V 22uF/16V 22uF/16V 22uF/16V
AVSS3_BG PAVSS AVSS_ADC3 Schematict Name Rev
D D
N N
G
A
G
A SVP-EX62_2 00
Size B Sheet 7 of 24 Date: T h ursday, M arch 23 , 20 06
MCLK0
MCLK0 6
R2239
BA1_ 51 C144
6 BA1
BA0_ 0.01uF
6 BA0
WE_
6 WE#
CAS_
6 CAS#
RAS_
6 RAS#
MCLK0#_ R2240
6 MCLK0#
MCLK0_ 51
6 MCLK0
6 MA[0..11] CLKE_
6 CLKE MCLK0#
MCLK0# 6
U501 U502
5 6 3 2 1 6 7 DDR_8Mx16 5 6 3 2 1 6 7 DDR_8Mx16
4 4 2 2 2 2 2 4 4 2 2 2 2 2
DQ0 2 DQ16 2
DQ1 DQ0 MA11 DQ17 DQ0 MA11 DQS[0..3] 6
4 K K S S E 0 1 41 4 K K S S E 0 1 41
DQ2 5 DQ1 C C A A W A A A11 28 MA10 DQ18 5 DQ1 C C A A W A A A11 28 MA10 DDQS0 R2241 15 DQS2
/ RC / B B / RC / B B
DQ3 7 DQ2 / / A10(AP) 40 MA9 DQ19 7 DQ2 / / A10(AP) 40 MA9
DQ4 8 DQ3 A9 39 MA8 DQ20 8 DQ3 A9 39 MA8 DDQS1 R2242 15 DQS3
DQ5 10 DQ4 A8 38 MA7 DQ21 10 DQ4 A8 38 MA7
DQ7 13 DQ6 A6 36 MA5 DQ23 13 DQ6 A6 36 MA5
DQ9 56 DQ8 A4 32 MA3 DQ25 56 DQ8 A4 32 MA3
DQ10 57 DQ9 A3 31 MA2 DQ26 57 DQ9 A3 31 MA2 VDDMQ VDDMQ
DQ11 59 DQ10 A2 30 MA1 DQ27 59 DQ10 A2 30 MA1
DQ12 DQ11 A1 MA0 DQ28 DQ11 A1 MA0 MD[0..31] 6
60 29 60 29 RN62 15x4
DQ13 62 DQ12 A0 44 DQ29 62 DQ12 A0 44 DQ23 5 4 MD0
VDDMQ DQ14 63 DQ13 CKE VDDMQ DQ30 63 DQ13 CKE C524 R511 DQ22 6 3 MD1
DQ15 65 DQ14 47 DQM3 DQ31 65 DQ14 47 DQM1 DQ21 7 2 MD3
DQ15 UDM 20 DQM2 DQ15 UDM 20 DQM0 0.1uF 1K DQ20 8 1 MD2
3
9 VDDQ
LDM
49 MVREF
3
9 VDDQ
LDM
49 MVREF
DM2 RN63 15x4
DQM0
VDDQ VREF VDDQ VREF MVREF 6 DQ19 MD4
VDDM
15
55 VDDQ
VDDQ VSSQ
6 VDDM
15
55 VDDQ
VDDQ VSSQ
6 DDQS2 DQ18
DQ17
5
6
4
3 MD5
MD6
DQS0
61 12 61 12 R512 7 2
VDDQ VSSQ 52 VDDQ VSSQ 52 C525 DQ16 8 1 MD7
1 VSSQ 58 1 VSSQ 58 1K
18 VDD VSSQ 64 18 VDD VSSQ 64 0.1uF RN64 15x4
33 VDD VSSQ 33 VDD VSSQ DQ7 5 4 MD18
VDD 66 VDD 66 DQ6 6 3 MD17
DDQS1 51 VSS 48 DDQS3 51 VSS 48 DQ5 7 2 MD16
DDQS0 16 UDQS VSS 34 DDQS2 16 UDQS VSS 34 DQ4 8 1 MD19
LDQS VSS LDQS VSS
CCCCCCCC S
C/ CCCCCCCC S
C/
DM0 DQ3
RN65 15x4
4 5 MD22
DQM2
NNNNNNNN NNNNNNNN DQ2 MD23
4 7 9 5 2 3 0 3
1 1 1 2 4 4 5 5
4
2
4 7 9 5 2 3 0 3
1 1 1 2 4 4 5 5
4
2
DDQS0 DQ1
DQ0
3
2
6
7 MD20
MD21
DQS2
1 8
6 CS1# RN66 15x4

DQ31 4 5 MD11
6 CS0# DQ30 3 6 MD10
DQ29 2 7 MD9
6 DQM[0..3] DQ28 1 8 MD8
DM3 DQ27
RN67 15x4
5 4 MD12
DQM1
DQ26 MD13
DDQS3 DQ25
DQ24
6
7
3
2 MD14
MD15
DQS1
VDDMQ VDDMQ VDDMQ VDDMQ 8 1
RN68 15x4
DQ15 5 4 MD24
C502 C23 C24 C25 C506 C512 C513 C507 C508 C26 C27 C29 C514 C515 DQ14 6 3 MD25
DQ13 7 2 MD26
0.1uF 0.1uF 0.01uF 0.01uF 4700pF 4.7uF/16V 10uF/16V 0.1uF 0.1uF 0.01uF 0.01uF 4700pF 4.7uF/16V 10uF/16V DQ12 8 1 MD27
DM1 DQ11 5
RN69 15x4
4 MD29
DQM3
DQ10 MD28
DDQS1 DQ9
DQ8
6
7
3
2 MD30
MD31
DQS3
VDDM VDDM VDDM VDDM 8 1
MEMORY DATA BUS SWAPPING

C516 C517 C518 C519 C520 C521 C522 C523
SCHEME FOR OPTIMAL
ROUTING.
0.1uF 0.1uF 0.01uF 10uF/16V 0.1uF 0.1uF 0.01uF 10uF/16V
Title
Schematict Name Rev
SVP-EX62_4Mx32_DDR 00
CON26 CON8
TS1_D0 1 2 TS1_D1 LX_FRD0 1 2 LX_FRD1
10 LX_TS1_D0 LX_TS1_D1 10 10,16,19 LX_FRD0 LX_FRD1 10,16,19
3 4 3 4
7 8 7 8
11 12 11 12
15 16 15 16
TS1_CLK 17 18 I2SDOUT1 LX_FRA1 17 18 LX_FRA2
10 LX_TS1_CLK LX_I2SD1 10 10,16,19 LX_FRA1 LX_FRA2 10,16,19
19 20 19 20
TS1_VLD 21 22 I2SWSOUT LX_FOE# 21 22 LX_FWE#
10 LX_TS1_VAL LX_I2SWS 10
23 24 23 24
TS1_START 25 26 I2SCKOUT LX_INT1 25 26 LX_FRA0
10 LX_TS1_START LX_I2SCK 10 LX_FRA0 10,16,19
27 28 27 28
ATV_IN 29 30 RF_SELECT1 RST# 29 30 LX_GCS11
7 ATV_IN RF_SELECT1 20 5,21 RST#
31 32 31 32
MUTE 33 34 RF_SELECT2 SC1_OUT_L 33 34 SC1_OUT_R
20 MUTE RF_SELECT2 20 4 SC1_OUT_L SC1_OUT_R 4
35 36 35 36
SDA_MST 37 38 AUD_RST Audio1_L 37 38 Audio1_R
5,6,11,16,20,21 SDA_MST AUD_RST 20 4 Audio1_L Audio1_R 4
39 40 Audio2_L 39 40 Audio2_R
4 Audio2_L Audio2_R 4 12V
SCL_MST 41 42 CRY_SW Audio3_L 41 42 Audio3_R
5,6,11,16,20,21 SCL_MST CRY _SW 20 5 Audio3_L Audio3_R 5
43 44 43 44
5V_1 45 46 45 46
47 48 47 48
49 50 49 50
CON50PP
CON50PP
AGND AGND AGND AGND
5V_2
LX_INT1 11
LX_GCS11 11
R583 LX_FWE# 10,16
R584 470
22K 2 LX_FOE# 10,16
VA1_8 1 Q15
3 MMBT3906
C469 LX_TS1_CLK 10
7 EXCVBS_OUTP 1 Q16
MMBT3904 LX_TS1_START 10
3
R585 10uF/16V
C42 10uF/16V C48 R586 LX_TS1_VAL 10
1.2K 2 R587 470 R588 75 CVBSOUT
30pF 75 R589 CVBSOUT 4 LX_TS1_D[0..7] 10
22K
7 EXCVBS_OUTN R590 R591
470 2.2K
C44 0.1uF
1.5K
R592 AGND
AGND
Title
Schematict Name Rev
Tuner Interface 00
LX_VCC_33 LX_VCC_33 RST_HD# 16,21
PCI_PAR 19
0 2 1 8 6 1 4 3 1 2 9 5 0 1 2 9 8
1 3 3 P P 1 P P P P P P 8 8 8 7 7
P P P T T P T T T T T T R130 P P P P P PCI_FRAME# 19
LX_TS1_D[0..7] 9 T T T T R129 T T T T T
R133
PCI_TRDY # 19
LX_TS1_CLK 9 0 0 0 0 0 0 0 0 0 0 0 0 4.7K 4.7K 0 0 0 0 0 0
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
C 2 C PCI_IRDY # 19
1K _ C _ C
_ C _ C _ C
_ C _ C
_ C
_ C
_ C
_ C
_ C
_ C
_ C
_ C
_ C
_ 1 _
LX_TS1_VAL 9 0 1 2 3 4 5 6 7 8 9 0 0 1 P P P P P P P P P P P P P P P P P 1
2 2 2 2 2 2 2 2 2 2 3 1 1 T T T T T T T T T T T T T T T T T P P
P P P P P P P P P P P 1 1 T T PCI_STOP# 19
LX_TS1_START 9 T T T T T T T T T T T P P T R132 R131
T T
R N D PCI_DEVSEL# 19
K A L R 0O O 0 1 S K FI
0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 2 3 4 5 6 7 L T A R C WC K
2 2 2 2 2 2 2 2 2 2 2 2 2 D D D D D D D D C S
_ V
_ E M D D L
_ _ _ _ _ _ _ _ _ _ T T S S
C
_ C
_ C
_ C
_ C
_ C
_ C
_ C
_ C
_ C
_ C
_ C
_ C
_ 1 1 1 1 1 1 1 1 1 1 1 1 1 4 3 2
1
0
1 S S 6 7 8 S
2I 5 3
4 2I 2I P
S C
_
PCI_SERR# 19
P P P P P P P P P P P P P S S S S S S S S S S S S 1
$ 1
$ 1
$ 3
$ 4
$ $ 5
$ 7
$ 8
$ 9
$ $ 6
$ E E 3
$ 3
$ 3
$ _ 3$ $ _ _ _
T T T T T T T T T T T T T T T T T T T T T T T T T $ $ $ $ $ $ $ $ $ $ $ $ T T $ $ $ X $ $ X X X S
_ _ _ _ _ _ _ _ _ _ _ _ $ $ $ $ $ $ $ $ $ $ $ $ _ _ $ $ $ L $ $ L L L 2I
X X X X X X X X X X X X X X
L L L L L L L L L L L L L L
5 5 5 4 4 4 4
5 1 6 6 6
6 1
6 1 7 7 7 7 7 8 8 8 9 8 9
9 1 0 0 0 1 1 1 1
0 2 2 2 2
U15A 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 2
2 2 2 6 5 4 3 2 4 5 6 1 2 0 7
PCI_CLK 17,19
J HGED E F G J F GD E D EGH J J G F J E E D J GF E EGH J K J F G F G A A A B B B B B 2 C
A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A F A
RST_HD# R946 PCI_RST# 19
0 LX_RESET# AG7 0 1 2 3 4 5 6 7 K C S N V 0 1 2 3 4 5 6 7 K CN R 0 1 2 3 4 5 6 7 K CNR N D T T C K 0 12 3 T K
RESET# D D D D D D D D L NH E A DDD DDDDD L N E DDDDD DDD L N E U S N L N NNI N U L
6 6 6 6 6
5 5 5 5 5
6
5
6
5
6
5 C Y 5 4
6 4 9 1 1 1 1 1 1 1 1 C 1 R
Y S E 2 2 2 2 2 2 2 2 C 2 R
Y S E
O
C
O
M OR _ Y C D
I
D
I
DD
I
O C
6/ 6/ 6/ 6/ 6/ 6/ 6/ 6/ 6 S 9 3 S S S S S S S S 1 S T 1 S S S S S S S S 2 S T 2 T D K S TI _ S
5 3 1
V 6/ 1 T T T T T T T T S 1 S T T T T T T T T S 2 S T _ S
_ S
__ S
S _ FI 2I LX_VD[0..23] 16 PCI_INTA# 19
4 4 4 4 4 4 4 4 6/ 6 T S T T S T S S S
_ N K B
_
9 9 9 9 9 9 9 9 5W E E K KK K
TP33 TP_C20 LX_CAPD0 AJ1 3 3 3 3 3 3 3 3 4
9 T T T T K LI N K N NN
D AD8 LX_VD0
1 1 1 1 1
CAP/IDE/656IN_D0 1 1 1 3 6/ R
4 N I N I II NI P VD0 PCI_INTB# 19
TP34 TP_C20 LX_CAPD1 AJ2 1 C 9 I C L I L LL L S AE8 LX_VD1
CAP/IDE/656IN_D1 L A/ C L C CCC VD1
TP35 TP_C20 LX_CAPD2 AH2 N 3 C N A/ C AF8 LX_VD2
LX_CAPD3 CAP/IDE/656IN_D2 Y 1 A/ I N A/
A/ A/ A/
A/ VD2 LX_VD3 PCI_INTC# 19
TP36 TP_C20 AH1 S S I 2 3T T AG8
LX_CAPD4 CAP/IDE/656IN_D3 4 N 1 T TUU VD3 LX_VD4
TP37 TP_C20 AG1 9 I WD T U U AE9
TP38 TP_C20 LX_CAPD5 AG2 CAP/IDE/656IN_D4 3 K _ _ U OOS K
OO VD4 AG9 LX_VD5 PCI_INTD# 19
1 S
LX_CAPD6 CAP/IDE/656IN_D5 _ S
C 2 2I O D
_ D C VD5 LX_VD6
TP39 TP_C20 AG3
CAP/IDE/656IN_D6 S I D
_
_W _ _
S S S S VD6
AH9
TP40 TP_C20 LX_CAPD7 AG4 2I S 2I 2I 2 2I AJ10 LX_VD7
CAP/IDE/656IN_D7 2I I VD7 LX_FOE# 9,16
TP41 TP_C20 LX_CAPD8 AF5 AG10 LX_VD8
LX_CAPD9 CAP/IDE_D8/1394_D0 VD8 LX_VD9 LX_FWE# 9,16
TP42 TP_C20 AF4 AF10
TP43 TP_C20 LX_CAPD10 AF2 CAP/IDE_D9/1394_D1 VD9 AE10 LX_VD10
CAP/IDE_D10/1394_D2 VD10 LX_FRD[0..15] 9,16,19
TP44 TP_C20 LX_CAPD11 AF1 AD10 LX_VD11
TP45 TP_C20 LX_CAPD12 AE2 CAP/IDE_D11/1394_D3 VD11 AD11 LX_VD12
TP46 TP_C20 LX_CAPD13 AE3 CAP/IDE_D12/1394_D4 VD12 AE11 LX_VD13
TP47 TP_C20 LX_CAPD14 AE4 CAP/IDE_D13/1394_D5 VD13 AG11 LX_VD14
CAP/IDE_D14/1394_D6 VD14 LX_FRA[0..25] 9,13,16,19
TP48 TP_C20 LX_CAPD15 AE6 AH11 LX_VD15
HiDTV
CAP/IDE_D15/1394_D7 VD15
TP49 TP_C20 LX_CAPD16 AD6 AJ11 LX_VD16
TP50 TP_C20 LX_CAPD17 AD5 CAP_D16/IDE_CS0/1394_EN VD16 AJ12 LX_VD17
TP51 TP_C20 LX_CAPD18 AD4 CAP_D17/IDE_CS1/1394_RW VD17 AG12 LX_VD18
TP52 TP_C20 LX_CAPD19 AD2 CAP_D18/IDE_ADD0/1394_SYNC VD18 AF12 LX_VD19
TP53 TP_C20 LX_CAPD20 AD1 CAP_D19/IDE_ADD1/1394_CLK VD19 AE12 LX_VD20
TP54 TP_C20 LX_CAPD21 AC2 CAP_D20/IDE_ADD2/1394_AV VD20 AD13 LX_VD21
TP55 TP_C20 LX_CAPD22 AC3 CAP_D21/IDE_DMAACK VD21 AE13 LX_VD22
TP56
TP57
TP_C20
TP_C20
LX_CAPD23
LX_CAPHS
AC4
AJ7
CAP_D22/IDE_IOR
CAP_D23/IDE_IOW
HSYNCMP/IDE_INT
(1/4) VD22
VD23
CLK1
AG13
AJ9
LX_VD23
LX_CLK R948 22 CLK_EX 5,6

LX_I2SD1
LX_I2SCK
9
9
TP58 TP_C20 LX_CAPVS AH7 AD7 LX_HS R949 22
VSYNCMP/IDE_IORDY HS1 HS_EX 5,6,17
TP59 TP_C20 LX_CAPCLK AJ8 AE7 LX_VS R138 22
CLKMP/IDE_DMAREQ (Rev. 22.0_0612, 31x31mm) VS1 AJ13 LX_DE R2190 22
VS_EX
DE_EX
5,6,17
6
LX_I2SWS 9
DE AJ14 LX_FIELD R2191 22
FIELD FLD_EX 6
R947 0 LX_PCMODE AH19
PCMOD LX_FB LX_SPDIF 17
AH13 TP7
RN23 PCI_CLK M1 FB TP_T_C30
4.7Kx4 PCICLK
PCI_REQ#0 PCI_GNT#2 19
8 1 L7
7 2 PCI_REQ#1 L6 REQ0 AG6 HiDTV_ROUT
PCI_REQ#2 REQ1 Pr/Cr/R HiDTV_ROUT 17
6 3 L4
PCI_REQ#3 REQ2 HiDTV_GOUT PCI_REQ#2 19
5 4 P1 AH5
REQ3 Y/G HiDTV_GOUT 17
TP188 TP_C20 $$$33 K3 AJ5 HiDTV_BOUT
PCI_GNT#1 GNT0 # 6 7 8 9 0 1 0 1 2 3 Pb/Cb/B HiDTV_BOUT 17
TP_C30 TP_C20 K4 6 7 8 9 0 1 2 3 4 5 2 2 2 2 3 3 E E E E
PCI_GNT#2 GNT1 # # L 1 1 1 1 2 2 2 2 2 2 _ _ _ _ _ _ B B B B LX_VM
K5 R # P E 0 1 2 3 4 5 6 7 8 9
0
1
1
1
2
1
3
1
4
1
5
1
_ _ _ _ _ _ _ _ _ _ D D D D D D C C C C AH6 TP_C32
TP_C31 TP_C20 PCI_GNT#3 K6 GNT2 # R
R YOS _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ D D D D D D D D D D AI AI AI AI AI AI _ _ _ _ VM TP_T_C30
#
GNT3 T # E A
E D T V D D D D D D D D D D D D D D D D AI AI AI AI AI AI AI AI AI AI I I I I
Y M P
_ S R S E AI AI AI AI AI AI AI AI AI AI AI AI AI AI AI AI C C C C C C C C C C
8 1 PCI_INTA# J3 S D A I _
I _I _I D
_ C
P/
C
P/
C
P/
C
P/
C
P/
C
P/
C
P/
C
P/
C
P/
C
P/
P/ P/ P/ P/ P/ P/ P/ P/ P/ P/ AK3 LX_IRSET R950 392,1%
7 2 PCI_INTB# J4 INTA R
_
I
R
T
R
F
C
P/ C
I C I
C P C
C
P/
C
P/
C
P/
C
P/
C
P/
C
P/
C
P/
C
P/
C
P/
C
P/
C
P/
C
P/
C
P/
C
P/
C
P/
C
P/ 0 1 2 3 4 5 6 7 8 9
0
1
1
1
2
1
3
1
4
1
5
1
6
1
7
1
8
1
9
1 IRSET
_ _ P/ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
6 3 PCI_INTC# J5 INTB C I I # P/ #/ P/ D D D D D D D D D D D D D D D D A A A A A A A A A A A A A A A A A A A A
INTC P/ C C 0 1 # # C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C
5 4 PCI_INTD# K1 8 P/ P/ K K SW S P/ P/ P/ P/ P/ P/ P/ P/ P/ P/ P/ P/ P/ P/ P/ P/ P/ P/ P/ P/ P/ P/ P/ P/ P/ P/ P/ P/ P/ P/ P/ P/ P/ P/ P/ P/ 0 1 2 3 4 5 P 7 AGND
INTD 6 C C A 2 2 2 2 2 2 # # T
K 0 1 A A _ R_ D_ D D D D D D D D D D D D D D D D A A A A A A A A A A A A A A A A A A A A A A A A A A E E O
2
K AGND
RN24 L ZI ZI S S CCC R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R RRRRR O W C L
4.7Kx4 C S S D D P P P F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F V C
HiDTV
LX_VCC_33 2 4 1 6 7 2 6 5 3 4 6 7 6 5 4 2 3 7 6 5 4 2 2 3 6 5 4 2 1 2 3 4 7 6 5 4 2 1 2 3 6 4 2 2 0 1 1 1 1 2 6 7 9 1
K T T UU T T T RRRR P P P P N NMMMM L L Y Y Y Y Y WWW WV V V V V UU WU RN 2 2 2 2 2 2
B BCD F F
A A 1 J
A A G
# # A
E L LX_CLK27 17
# # # # E Title
# Y M R Y P VS 0 1 2 3 4 5 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5
0 1 2 3 4 5 6 7 8 9 1 1 1 1 1 1 #
T
S
R
D
R
T
A
R
F
R
A
P
R
E
S
DO
R T E D
R
D
R
D
R
D
R
D
R
D
R
D
R
D
R
D
R
D
R
D
R
D
R
D
R
D
R
D
R
D
R
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
A
9
A
1
A
1
A
1
A
1
A
1
A
1
A
1
A
1
A
1
A
1
A
2
A
2
A
2
A
2
A
2
A
2
A
#
E E LX_VCOTP 17 KONKA HIDTV ATSC MAIN
_ _ _ _ _ _I S
_ D
_ F F F F F F F F F F F F F F F F
R
F
R
F
R
F
R
F
R
F
R
F
R
F
R
F
R
F
R
F
R
F
R
F
R
F
R
F
R
F
R
F
R
F
R
F
R
F
R
F
R
F
R
F
R
F
R
F
R
F
R
F
O
F
W
F
I I I I I I I I _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
C C C C C CCC X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X Schematict Name Rev
P P P P P P P P L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L
HiDTV-LX (1/4) - BOT/LEFT 00
Size B Sheet 10 of 24 Date: T hursday , M arch 2 3, 20 06
LX_MD[0..63] 14,15 LX_INT1 9 POWER_ON# 24
0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3
0 1 2 3 4 5 6 7 8 9 1 1 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 2 2 3 3 3 3 3 3 3 3 3 3 4 4 4 4 4 4 4 4 4 4 5 5 5 5 5 5 5 5 5 5 6 6 6 6
DDD DDDDD DDD DDDDD DDD DDDDD DDD DDDDD DD DDDDDD DD DDDDDD DD DDDDDD DD DDDDDD LX_DQS[0..7] 14,15 LX_INT2 5,6 PWRBT 21
M
_ M
_ M
_ M
_M_M_M_M_ M
_ M
_ M
_ M
_M_M_M_M_ M
_ M
_ M
_ M
_M_M_M_ M
_ M
_ M
_ M
_ M
_M_M_M_ M
_ M
_ M
_ M
_M_M_M_M_ M
_ M
_ M
_ M
_M_M_M_M_ M
_ M
_ M
_ M
_M_M_M_ M
_ M
_ M
_ M
_ M
_M_M_M_ M
_ M
_
X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X LX_DM[0..7] 14,15 LX_WARMRST# 21
L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L
LX_PG0 20
7 9 5 7 5 6 7 9 0 5 7 8 5 6 7 5 7 8 9 6 5 5 7 8 9
9 8 7 6 7 6 5 2 LX_MA[0..11] 14,15 VCCHRST# 21
2 2 2 2 2 2 2 2 3 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 7 5 7 9 8 7 9 0 8 9 0 5 6 5 7 8 9 5 6 7 5 7 8 5 6 7 9 5 7 5 6 7 LX_PG1 16
A A B B CCCC
U15B A CDDD E E E F F F F GGHHH K K K K J J J H 2 2 2 2 2 2 2 3 2 2 3 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 HiDTV
A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A HHG F F F E D HHH J J K K K K L L L MMMN NNN P P RRR LX_BA[0..1] 14,15 RTCRST# 21
8051_D[0..7] 6
0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3
DDDDDDDD DD 1 1 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 2 2 3 3 3 3 3 3 3 3 3 3 4 4 4 4 4 4 4 4 4 4 5 5 5 5 5 5 5 5 5 5 6 6 6 6 LX_WE# 14,15
8051_D0 MMMMMMMM MMD D D D D D DDDDDDDD DDDDDDDD DDDDDDDD DDDDDDDD DDDDDDD D DDDDDDD D
LX_DQS0 LX_PG3 18
B23 MMMMMM MMMMMMMM MMMMMMMM MMMMMMMM MMMMMMMM MMMMMMMM MMMMMMMM AB29
8051_D1 8051/656AD0 DQS0 LX_DQS1 LX_CAS# 14,15
C23 AD29 LX_PG4 5
8051_D2 D23 8051/656AD1 DQS1 AG29 LX_DQS2
8051_D3 8051/656AD2 DQS2 LX_DQS3 LX_RAS# 14,15
D24 AJ29
8051_D4 C24 8051/656AD3 DQS3 F30 LX_DQS4
8051/656AD4 DQS4 LX_CKE 14,15 SCL_MST 5,6,9,16,20,21
8051_D5 B24 J29 LX_DQS5
8051_D6 A25 8051/656AD5 DQS5 L29 LX_DQS6
8051/656AD6 DQS6 LX_CS# 14,15 LX_UART_RXD 20 SDA_MST 5,6,9,16,20,21
8051_D7 B25 P29 LX_DQS7
8051/656AD7 DQS7
LX_CS1# 14,15 LX_UART_TXD 20 SCL_SLV 20
A23 AB28 LX_DM0
6 8051_RD 8051RD/656HSYNC DQM0
B22 AE29 LX_DM1
6 8051_WR 8051WR/656VSYNC DQM1 LX_MCK0 14 SDA_SLV 20
D22 AG27 LX_DM2
6 8051_ALE 8051ALE/656CLK DQM2
E22 AK30 LX_DM3
6 8051_PS 8051PS DQM3 LX_MCK0# 14
G29 LX_DM4
DQM4 J27 LX_DM5
DQM5 LX_DM6 LX_MCK1 15
M29
LX_UART_TXD B14 DQM6 P28 LX_DM7
TXD DQM7 LX_MCK1# 15 BTN_ADC 21
TP72 TP_C20 $$$27 D14
TP73 TP_C20 $$$31 E14 RTS T28 LX_MA0
LX_FLASH_CE# 16 INFRARED 21
HiDTV
LX_UART_RXD F14 DTR MA0 T27 LX_MA1
TP69 TP_C20 $$$24 F13 RXD MA1 R29 LX_MA2
CTS MA2 LX_ROM_CE# 16
TP76 TP_C20 $$$30 D13 R30 LX_MA3
TP71 TP_C20 $$$25 C13 DSR MA3 T25 LX_MA4
DCD MA4 LX_GCS[3..5] 13
TP70 TP_C20 $$$26 B13 U25 LX_MA5
RI MA5 U26 LX_MA6
MA6 LX_MA7 LX_GCS11 9 LX_GCS2 21
Y27
MA7 Y28 LX_MA8
TP66
TP64
TP62
TP_C20
TP_C20
TP_C20
$$$21
$$$18
$$$17
F12
F11
D11
SCRST0(OD)
SCPFET0(OD)
SCIO0(OD)
(2/4) MA8
MA9
MA10
MA11
Y29
AA25
AA26
LX_MA9
LX_MA10
LX_MA11
TP74 TP_C20 $$$28 C11
TP75 TP_C20 $$$29 B11 SCCLK0(OD) U27 LX_BA0
SCPRES0 (Rev. 22.0_0612, 31x31mm) BA0 T29 LX_BA1
TP61 TP_C20 $$$16 B10 BA1
TP63 TP_C20 $$$19 D10 SCRST1(OD) W30 LX_CAS#
TP65 TP_C20 $$$20 E10 SCPFET1(OD) CAS# W29 LX_RAS#
TP67 TP_C20 $$$23 F10 SCIO1(OD) RAS# Y25 LX_WE#
TP68 TP_C20 $$$22 F9 SCCLK1(OD) WE# V25 LX_CKE R951 0_DNS
SCPRES1 CKE
LX_CK32 W27 LX_CS#
C160 10pF R2255 CS0# W26 LX_CS1#
DNS LX_CPUHALT R954 4.7K
CS1# $$$15 LX_VCC_33
A8 W25 TP60
CK32 CS2# TP_C20
Y3 100K V28 LX_MCK0 R955 0
C161 10pF 32.768KHz MCLK0 V27 LX_MCK0# LX_VCC_25 LX_VCC_25
LX_CK32E B8 MCLK0#
CK32E ) V29 LX_MCK1
D # MCLK1
C162 20pF O D
I U29 LX_MCK1# C948 R952
LX_XTLI ( L MCLK1#
C5 D B ) )
XTLI I ) )
1 E DD C
_ D D 0.1uF 1K
C O
( O
( LX_MVREF LX_CPUSLEEP
Y4 ) I ( O
O ( E T P T T T MVREF
AB23 R151 10K
5V_SB
C164 20pF 14.318MHz ) ) ) ) ) V L A D T L T E S S
LX_XTLO
D D D D D D E CD /I S
C
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A
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A T N E
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D5 O D S 0 1 C949 R953
XTLO 1 2( O
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I 0 0 T H S M H V R
2 0 1 2 3 4 5 6 7 S S S S S S S S S S S S O L A R R C X X S U U R C C C R152 0_DNS
T T G G G G G G GG C CCCCCCCC CCC O C D W W D T R A P P A C T T
N
I NI P P P P P P P P GGGGGGGGGGGG B S S P P A C C M C C W V R R 0.1uF 1K
LX_VCC_33
5 7 5 5 5 5 6 6 6 6 7 7 8 8 8 8 9 9 9 9 6 0 0 7 6 7 7 2 9 7 7 6 7 6 6 9 8
2 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 C 2 2 1 1 B C 1 C D 2 2 2 2 A D F
CC B CD F F ED B D F F ED B B CD F A E
# D B A D B A A #B
R149 4.7K E # P T T T
D
I C E T T L T E S
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R150 4.7K C L L 0 1
H 1 2 3 4 5 6 7 8 9 1 1
_ C E T H S M H V R
1 I S S S S S S S S S S S S S S M M M 0 S R
T 0 1 3 4 V L A AC C CCCCCC L A T D X R U U A C C C
GG GGE CD L C CC O C D B A
_ T A A P P C T T
N F
LX_VCC_33 LX_VCC_33 _I P
_ P
_ P
_ P
_ D
_ S
_ S
_ _ G _ G
_ G _ G
_ G
_ G
_ G
_ G
_ G
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X X X X X X X X X X X X X X X X X X X X X X X W T X N X X X X X X X
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$$$32 L L L L L L L L L L L L L L L L L L L L P B L I L L L L L L L
3 3 3 S
3 4 5 6 7 8 3 3 3 2 N
3 3 1 1 1 1 1 1 1 0 0
3 3 D
_
P P P P P P P
RN1118 7 6 5 R2205 T T T T T T T 0
S K T 6
N 7. 0 0 0 0 0 0 B 5 0
4 3 3 3 3 3 3 7 8 1 3
D
_ 5 5 R R
3 4 C
_ C
_ C
_ C
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_ 1 1 W C
_ 9 0 1
4.7Kx4 0 5 5 R R R164 R165 5 6 6
4.7K
2 1 1 T
_ T
_ T
_ T
_ T
_ T
_ P S# T
_ 1 1 1
T R R 5 NON R R R
N TP_C20 2 P P P P P P T 5 D P Title
1 2 3 4 _I 3V V T T T T T T T
S S 1 _ _ T #
T
X TP77 6 6 L L R 3 R 4.7K #
0 1
GG
3
G
4
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M
_
L
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3E
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S
R
T
S KONKA HIDTV ATSC MAIN
H R
P
_ P
_ P
_ P
_ CD C D O C C
S S S S P C T Schematict Name Rev
X X X X V R
L L L L LX_VCC_33 LX_VCC_33
HiDTV_LX(2/4)-TOP/RIGHT 00
Size B Sheet 11 of 24 Date: T hursday , M arch 2 3, 20 06
5V_1 LX_VCC_18 LX_VCC_25 LX_VCC_33
CA1 8 7 6 5 CA2 8 7 6 5 CA3 8 7 6 5 CA4 8 7 6 5 CA5 8 7 6 5 CA6 8 7 6 5 CA7 8 7 6 5 VCCH_33 21,22

C166 C167 + C168 + C169 + C170 + C171 + C172 + C174 + C175 +
VCCH_18 22
0.1uF 10uF/16V 10uF/16V 10uF/16V 0.1uFx4 0.1uFx4 0.01uFx4 0.01uFx4 10uF/16V 10uF/16V 10uF/16V 0.1uFx4 10uF/16V 10uF/16V 0.1uFx4 0.1uFx4
1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 RTC_VCCH_33 21,22
LX_VCC_18
5V_1
LX_VCC_18 LX_VCC_33 LX_VCC_18
C16 C178 +
R2237 0
LX_VCC_25 11,14,15,22
0.1uF 10uF/16V
0 4 8 3 LX_VCC_33 10,11,13,16,17,19,20,21,22
8 1 1 1 3 0 6 2 2 3 8 9 2 9 2 9 2 3 8 9 8 8 8 9
U15C 2 1 2 1 2 3 1 2 3 2 3 4 3 4 5 3 4 5 6 4 5 6 7 6 7 8 6 7 8 7 8 8 8 8 CCC 2 2 3 2 2 1 1 1 1 1 1 1 1 1 1 1 1 1 1 8 8 A BCC HiDTV
A A A B B B C C C D D D E E E F F F F G G G G H H H J J J K K L R W A A A W R L H H H M M M M N N V V WWWW NU A A A A
FB29 300ohm,700mA 12V
LX_AVDD1 F1 F CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC F F F F F F
LX_VCC_18 AVDD1 S DDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDD DDDDDD
C176 + C177 5 DDDDDD
V DDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDD H19 CON7
V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V LX_VCC_33
10uF/16V 0.1uF G2 VDDF H18 1
AGND AVSS1 VDDF H15 C181 +
C180 1500pF LX_MLF F2 VDDF H14 2
AGND MLF VDDF H11 10uF/16V
HiDTV
LX_VCC_18 VDDF H10 Fan
FB30 300ohm,700mA VDDF A20
LX_AVDD2 G1 VDDF A12
C182 + C183 AVDD2 VDDF A4
VDDF
C7 C8 C9 10uF/16V 0.1uF H2
AGND AVSS2
0.1uF 0.1uF 0.1uF C184 6800pF LX_PLF H1 AC24
AGND LX_VCC_25
FB31 300ohm,700mA
PLF
(3/4) VDDR
VSSR
AB24
C185
0.1uF
LX_AVDD4 D1
C186 + C187 AVDD4
(Rev. 22.0_0612, 31x31mm)
10uF/16V 0.1uF E1 B6
AGND AVSS4 VCCH VCCH_33
F7 C544 C189
C188 1500pF LX_IDECLKLF E2 VCCH
IDECLKLF VDDC: 1.8V, core power C6 0.1uF 0.1uF
AGND VSSH
VDDM: 2.5V, memory I/O power VSSH
E7
FB32 300ohm,700mA
LX_AVDD5 H3 VDDF: 3.3V, bottom I/O power
AVDD5
C190 + C191 VDDZ: 3.3V, left I/O power
D8
VDDG: 3.3V, top I/O power RTCVCCH RTC_VCCH_33
10uF/16V 0.1uF J2 B9 C545 C192
AGND AVSS5 RTCVCCH
C193 1800pF LX_AUDLF H4
VDDR: 2.5V, reference generation power C8 0.1uF 0.1uF
AGND AUDLF RTCVSSH
VCCH: 3.3V, RTCVSSH
E8
FB33 300ohm,700mA RTCVCCH: 3.3V, RTC power

LX_AVDDPCI N6 AVDD1: 1.8V, PLL power FB34 300ohm,700mA
C194 + C195 AVDDPCI B12 LX_AVDDADC
AVDD2: 1.8V, PLL power AVDDADC LX_VCC_33
C196 + C197 + C198
10uF/16V 0.1uF N4 AVDD3: 1.8V, PLL power
AGND AVSSPCI E12 0.1uF 10uF/16V 10uF/16V
AVSSADC AGND
AVDD4: 1.8V, PLL power
FB35 300ohm,700mA
LX_AVDD3 C4 AVDD5: 1.8V, PLL power
VCCH_18 AVDD3
C199 + C200 AVDDPCI: 1.8V, PCI PLL power AVDD33
AJ3
C201 + AK2 FB36 300ohm,700mA
10uF/16V 0.1uF B5 VCCHPLL: 1.8V, PLL power AVDD33 AK6 LX_AVDD33
AGND AVSS3 ADVDD33 LX_VCC_33
10uF/16V AVDDADC: 3.3V, ADC power C203 + C204 + C205
C202 3900pF LX_CLF B4
AGND CLF AVDD33: 3.3V, DAC power AVSS33_1
AJ6 0.1uF 10uF/16V 10uF/16V
AGND
AGND FB37 300ohm,700mA AJ4
LX_VCCHPLL D6 ADVDD33: 3.3V, DAC power AVSS33_2 AK4
C206 + C207 VCCHPLL AVSS33_2 AK1
AVSS33_3
10uF/16V 0.1uF E6
AGND VSSHPLLF F F F F F F F F F F F F F F F F F F F F F F F F F MMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMM
DDDDDDDDDDDDDDDDDDDDDDDDDD DDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDD
DDDDDDDDDDDDDDDDDDDDDDDDDD DDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDD
V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V
0 4 8 4 3 4 3 4 3 4 3 4 3 4 3 2 4 3 2 1 3 2 1 0 5 2 0 0 4 4 4 3 4 3 4 3 2 1 6 5 4 3 2 6 5 4 3 8 7 6 5 4 9 8 7 6 5 0 9 8 7 6 0 9 8 0 9
1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 3 3 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 3 2 2 2 2 3 2 2 3 2
K K K K K J J HHGG F F E E E DDDDCCCCCC G L A UN K J J HHHHGGGGGF F F F E E E E E DDDDDCCCCC B B B A A
A A A A A A A A A A A A A A A A A A A A A A A A A A A A AGND
LX_VCC_33 LX_VCC_25
Title
LX_VCC_25 LX_VCC_25 LX_VCC_33 LX_VCC_33 LX_VCC_33 LX_VCC_33 LX_VCC_33
BGA peripheral KONKA HIDTV ATSC MAIN
de-caps, DNS
C208 C209 C210 C211 C212 C213 C214 Schematict Name Rev
in socket board
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF HiDTV-LX (3/4) - Power 00
Size B Sheet 12 of 24 Date: T h ursday , M arch 23 , 20 06
LX_FRA[0..25] 9,10,16,19
LX_GCS[3..5] 11
5 5 5 7 7 7 3 8 1 0 9 8 7 6 5 4 3 2 1 0 2 0 8 6 4 2 0 2 8 4 0 LX_VCC_33
3 1 9 7 5 3 1
3 3 3 3 3 3 E C A 5 5 5 5 5 5 F B 7 7 7 7 7 8 8 8 8 8 1 1 9 2 2 2 1 1 1 1 1 1 1 1 1 1 9 8 2 2 1 1 1 1 1 9 2 2 1 1 1 1 1 2 1 1 1 DNS
U15D Y V T PMG A A AWU R N L H A A Y V T PM Y V T PMH H HGGGGGGGGGGGGGGG E E E E E E E E C C C C C C C A A A A HiDTV RN27
LX_FRA20 1 8 LX_CFG1 R166 0_DNS R167 3.3K
S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S LX_FRA21 2 7 LX_CFG2
S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S LX_FRA22 3 6 LX_CFG3 R168 0_DNS R169 3.3K
V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V
AB3 LX_FRA23 4 5 LX_CFG4
AD3 VSS W17 R170 0_DNS R171 3.3K
AF3 VSS VSS W16 4.7Kx4
AH3 VSS VSS W15 R172 0_DNS R173 3.3K
L1 VSS VSS W14 RN28
N1 VSS VSS V18 LX_FRA24 1 8 LX_CFG5 R174 0_DNS
R175 3.3K
R1 VSS VSS V17 LX_FRA25 2 7 LX_CFG6
U1 VSS VSS V16 3 6 R176 0 R177 3.3K_DNS
W1 VSS VSS V15 LX_GCS3 4 5 LX_CFG8
AA1 VSS VSS V14
AC1 VSS VSS V13 4.7Kx4
AE1 VSS VSS U19 R178 0 R179 3.3K_DNS
AC11 VSS VSS U18 LX_GCS4 R180 4.7K LX_CFG9
HiDTV
AC13 VSS VSS U17 R181 0 R182 3.3K_DNS
AC16 VSS VSS U16 LX_GCS5 R183 4.7K LX_CFG10
AC17 VSS VSS U15 R184 0 R185 3.3K_DNS
AC19 VSS VSS U14
AD9 VSS VSS U13
AD12 VSS VSS U12
DNS
AD15 VSS VSS T19
AD18 VSS VSS T18
AD20
AF9
AF11
VSS
VSS
VSS
VSS
(4/4) VSS
VSS
VSS
VSS
T17
T16
T15
AF13 T14
AF15 VSS VSS T13
AF17 VSS (Rev. 22.0_0612, 31x31mm) VSS T12 No PIN Configure Pin Description Setting
AF19 VSS VSS R19
AF21 VSS VSS R18
VSS VSS 1 FRA20 PIN_REG_DDR
AH4 R17
AH8 VSS VSS R16
VSS VSS 2 FRA21 PIN_REG_TYPE0
AH10 R15 For UMAC type
AH12 VSS VSS R14
VSS VSS 3 FRA22 PIN_REG_TYPE1 configure
AH14 R13
AH16 VSS VSS R12
VSS VSS 4 FRA23 PIN_REG_TYPE2
AH18 P19
AH20 VSS VSS P18
VSS VSS 5 FRA24 PIN_REG8051EN
AH22 P17
AK8 VSS VSS P16
AK12 VSS VSS P15
VSS VSS 1: 16-bit Data Bus (Flash Bootup)
AK16 P14
AK20 VSS VSS P13 0: 8-bit Data Bus (EEPROM Bootup)
VSS VSS 6 FRA25 ROMSIZ0 Data Bus Width
AK25 P12
VSS VSS
7 GCS2 CONM_SN 1: Slave; 0: Master
S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S
S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S
V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V 8 GCS3 ENDIAN_SEL[0]
MIPS ENDIAN Mode Default: 2'b00
3 3 3 3 3 3 3 3 4 4 4 4 4 4 4 4 4 6 6 6 6 6 6 6 6 6 6 6 8 8 8 8 8 8 8 8 8 8 8 0 0 0 0 0 0 0 4 5 6 7 3 4 5 6 7 8
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 3 3 3 3 3 3 3 1 1 1 1 1 1 1 1 1 1 9 GCS4 ENDIAN_SEL[1]
MN P T U V Y A K L M P R T VWY H K M P T V Y B D F H J L N R UWA C E G J E J N U A E J MMMMN N N N N N
A A A A A A A A A A A A A
10 GCS5 M68K_PCI_SEL M68K/PCI select 1: M68K/Flash; 0: PCI/Flash
Title
Schematict Name Rev
HiDTV-LX (4/4) - GND, Configure 00
Size B Sheet 13 of 24 Date: T h ursday, M arch 2 3, 2006
11,15 LX_WE# 11,15 LX_MD[0..63]
11,15 LX_CAS# 11,15 LX_DQS[0..7]
11,15 LX_RAS# 11,15 LX_DM[0..7]
11,15 LX_CS# 11,15 LX_MA[0..11]

U16 U17
11,15 LX_CKE 11,15 LX_BA[0..1] LX_DDR_DQ4 LX_DDR_DQ16 LX_DDR_DQ28 2 LX_DDR_DQ12
2 65 65
LX_DDR_DQ3 4 DQ0 DQ15 63 LX_DDR_DQ23 LX_DDR_DQ25 4 DQ0 DQ15 63 LX_DDR_DQ13
11 LX_MCK0 LX_DDR_DQ5 DQ1 DQ14 LX_DDR_DQ17 LX_DDR_DQ31 5 DQ1 DQ14 LX_DDR_DQ15
5 62 62
11 LX_MCK0# LX_DDR_DQ2 DQ3 DQ12 LX_DDR_DQ22 LX_DDR_DQ29 8 DQ3 DQ12 LX_DDR_DQ10
8 59 59
11,15 LX_CS1# LX_DDR_DQ1 DQ5 DQ10 LX_DDR_DQ20 LX_DDR_DQ30 11 DQ5 DQ10 LX_DDR_DQ8
11 56 56
LX_DDR_DQ6 13 DQ6 6 DQ9 54 LX_DDR_DQ18 LX_DDR_DQ24 13 DQ6 6 DQ9 54 LX_DDR_DQ14
DQ7 6 DQ8 DQ7 6 DQ8
LX_DM0 20 P 47 LX_DM2 LX_DM3 20 P 47 LX_DM1
LX_DQS0 R186 22 LX_DDR_DQS0 16 LDM O UDM 51 LX_DDR_DQS2 R187 22 LX_DQS2 LX_DQS3 R188 22 LX_DDR_DQS3 16 LDM O UDM 51 LX_DDR_DQS1 R189 22 LX_DQS1
LDQS S HDQS LDQS S HDQS
LX_MA0 29 T 53 LX_MA0 29 T 53
RN29 22x4 LX_MA1 30 A0 NC_53 43 LX_VCC_25 RN30 22x4 LX_MA1 30 A0 NC_53 43 LX_VCC_25
LX_MD1 4 5 LX_DDR_DQ1 LX_MA2 31 A1 NC_43 LX_MD8 1 8 LX_DDR_DQ8 LX_MA2 31 A1 NC_43
LX_MD7 3 6 LX_DDR_DQ7 LX_MA3 32 A2 25 LX_MD11 2 7 LX_DDR_DQ11 LX_MA3 32 A2 25
LX_MD2 2 7 LX_DDR_DQ2 LX_MA4 35 A3 NC_25 17 C216 R190 LX_MD10 3 6 LX_DDR_DQ10 LX_MA4 35 A3 NC_25 17 C217 R191
LX_MD0 1 8 LX_DDR_DQ0 LX_MA5 36 A4 NC_17 14 LX_MD9 4 5 LX_DDR_DQ9 LX_MA5 36 A4 NC_17 14
LX_MA6
LX_MA7
37
38
A5
A6 R NC_14
49 LX_DDR_VREFA
0.1uF 1K LX_MA6
LX_MA7
37
38
A5
A6 R NC_14
49 LX_DDR_VREFB
0.1uF 1K
LX_MD4
RN31 22x4
4 5 LX_DDR_DQ4
LX_MA8
LX_MA9
39
40
A7
A8 D VREF
3 C218
RN32 22x4
LX_MD12 1 8 LX_DDR_DQ12
LX_MA8
LX_MA9
39
40
A7
A8 D VREF
3 C219 R193
LX_MD3
LX_MD5
3
2
6
7
LX_DDR_DQ3
LX_DDR_DQ5
LX_MA10
LX_MA11
28
41
A9
A10_AP D VDDQ
VDDQ
9
15 0.1uF
R192
1K
LX_MD13 2
LX_MD15 3
7
6
LX_DDR_DQ13
LX_DDR_DQ15
LX_MA10
LX_MA11
28
41
A9
A10_AP D VDDQ
VDDQ
9
15 0.1uF 1K
LX_MD6 1 8 LX_DDR_DQ6 LX_CS1#
LX_BA0
42
26
A11
A12
BA0
61 VDDQ
VDDQ
VDDQ
55
61
LX_BA0
42
26
A11
A12
BA0
61 VDDQ
VDDQ
VDDQ
55
61
LX_MD18
RN33 22x4
4 5 LX_DDR_DQ18
LX_BA1
LX_WE#
27
21
BA1 x VDD
1
18 LX_MD24
RN34 22x4
1 8 LX_DDR_DQ24
LX_BA1
LX_WE#
27
21
BA1 x VDD
1
18
LX_MD17
LX_MD23
3
2
6
7
LX_DDR_DQ17
LX_DDR_DQ23
LX_CAS#
LX_RAS#
22
23
WE#
CAS#
RAS#
M61
VDD
VDD
33
LX_VCC_25
LX_MD31
LX_MD25
2
3
7
6
LX_DDR_DQ31
LX_DDR_DQ25
LX_CAS#
LX_RAS#
22
23
WE#
CAS#
RAS#
M61
VDD
VDD
33
LX_VCC_25
LX_MD16 1 8 LX_DDR_DQ16 LX_CS# 24 6 LX_MD28 4 5 LX_DDR_DQ28 LX_CS# 24 6
61/ 61/
CS# VSSQ 12 CS# VSSQ 12
LX_CKE 44 VSSQ 52 LX_CKE 44 VSSQ 52
RN35 22x4 CKE VSSQ 58 RN36 22x4 CKE VSSQ 58
LX_MD19 4 5 LX_DDR_DQ19 LX_MCK0 45 VSSQ 64 LX_MD26 1 8 LX_DDR_DQ26 LX_MCK0 45 VSSQ 64
LX_MD22 3
LX_MD21 2
6
7
LX_DDR_DQ22
LX_DDR_DQ21
LX_MCK0# 46 CK
CK# x VSSQ
VSS
34
LX_MD29 2
LX_MD27 3
7
6
LX_DDR_DQ29
LX_DDR_DQ27
LX_MCK0# 46 CK
CK# x VSSQ
VSS
34
LX_MD20 1 8 LX_DDR_DQ20 19
50 DNU_19
DNU_50
M 8
VSS
VSS
48
66
50 DNU_19
DNU_50
M 8
VSS
VSS
48
66
HY5DU281622ET-5 HY 5DU281622ET-5
LX_VCC_25 LX_VCC_25 LX_VCC_25 LX_VCC_25 LX_VCC_25 LX_VCC_25 LX_VCC_25 LX_VCC_25 LX_VCC_25 LX_VCC_25 LX_VCC_25 LX_VCC_25 LX_VCC_25
LX_MCK0
+ C220 C221 C222 C223 C224 C225 + C226 + C227 C228 C229 C230 C231 C232
R194 10uF/16V 0.1uF 0.1uF 0.01uF 0.01uF 0.01uF 47uF/16V 10uF/16V 0.1uF 0.1uF 0.01uF 0.01uF 0.01uF
47
LX_CK0_TRM LX_VCC_25 LX_VCC_25 LX_VCC_25 LX_VCC_25 LX_VCC_25 LX_VCC_25 LX_VCC_25 LX_VCC_25 LX_VCC_25
R195 C233 + C234 C235 C236 C960 + C237 + C238 C239 C240 C961
47 0.01uF 10uF/16V 0.1uF 0.1uF 0.1uF 47uF/16V 10uF/16V 0.1uF 0.1uF 0.1uF
LX_MCK0#
Title
Schematict Name Rev
HiDTV_LX DDR(1/2) 00
Size B Sheet 14 of 24 Date: T h ursday , March 23 , 2 006
11,14 LX_WE# 11,14 LX_MD[0..63]
11,14 LX_CAS# 11,14 LX_DQS[0..7]
11,14 LX_RAS# 11,14 LX_DM[0..7]
11,14 LX_CS# 11,14 LX_MA[0..11]

U18 U19
11,14 LX_CKE 11,14 LX_BA[0..1] LX_DDR_DQ40 2 LX_DDR_DQ59 LX_DDR_DQ53 2 LX_DDR_DQ32
65 65
11 LX_MCK1 LX_DDR_DQ41 5 DQ1 DQ14 LX_DDR_DQ56 LX_DDR_DQ52 5 DQ1 DQ14 LX_DDR_DQ38
62 62
11 LX_MCK1# LX_DDR_DQ45 8 DQ3 DQ12 LX_DDR_DQ62 LX_DDR_DQ54 8 DQ3 DQ12 LX_DDR_DQ34
59 59
11,14 LX_CS1# LX_DDR_DQ43 11 DQ5 DQ10 LX_DDR_DQ58 LX_DDR_DQ51 11 DQ5 DQ10 LX_DDR_DQ33
56 56
LX_DDR_DQ47 13 DQ6 6 DQ9 54 LX_DDR_DQ57 LX_DDR_DQ49 13 DQ6 6 DQ9 54 LX_DDR_DQ35
DQ7 6 DQ8 DQ7 6 DQ8
LX_DM5 20 P 47 LX_DM7 LX_DM6 20 P 47 LX_DM4
LX_DQS5 R196 22 LX_DDR_DQS5 16 LDM O UDM 51 LX_DDR_DQS7 R197 22 LX_DQS7 LX_DQS6 R198 22 LX_DDR_DQS6 16 LDM O UDM 51 LX_DDR_DQS4 R199 22 LX_DQS4
LDQS S HDQS LDQS S HDQS
LX_MA0 29 T 53 LX_MA0 29 T 53
RN37 22x4 LX_MA1 30 A0 NC_53 43 LX_VCC_25 RN38 22x4 LX_MA1 30 A0 NC_53 43 LX_VCC_25
LX_MD43 4 5 LX_DDR_DQ43 LX_MA2 31 A1 NC_43 LX_MD33 1 8 LX_DDR_DQ33 LX_MA2 31 A1 NC_43
LX_MD44 3 6 LX_DDR_DQ44 LX_MA3 32 A2 25 LX_MD37 2 7 LX_DDR_DQ37 LX_MA3 32 A2 25
LX_MD45 2 7 LX_DDR_DQ45 LX_MA4 35 A3 NC_25 17 C241 R200 LX_MD34 3 6 LX_DDR_DQ34 LX_MA4 35 A3 NC_25 17 C242 R201
LX_MD46 1 8 LX_DDR_DQ46 LX_MA5 36 A4 NC_17 14 LX_MD36 4 5 LX_DDR_DQ36 LX_MA5 36 A4 NC_17 14
LX_MA6
LX_MA7
37
38
A5
A6 R NC_14
49 LX_DDR_VREFC
0.1uF 1K LX_MA6
LX_MA7
37
38
A5
A6 R NC_14
49 LX_DDR_VREFD
0.1uF 1K
RN39 22x4
LX_MA8
LX_MA9
39
40
A7
A8 D VREF
3 C243 R202
RN40 22x4
LX_MA8
LX_MA9
39
40
A7
A8 D VREF
3 C244 R203
LX_MD42 3
LX_MD41 2
6
7
LX_DDR_DQ42
LX_DDR_DQ41
LX_MA10
LX_MA11
28
41
A9
A10_AP D VDDQ
VDDQ
9
15 0.1uF 1K
LX_MD39 2
LX_MD38 3
7
6
LX_DDR_DQ39
LX_DDR_DQ38
LX_MA10
LX_MA11
28
41
A9
A10_AP D VDDQ
VDDQ
9
15 0.1uF 1K
LX_BA0
42
26
A11
A12
BA0
61 VDDQ
VDDQ
VDDQ
55
61
LX_BA0
42
26
A11
A12
BA0
61 VDDQ
VDDQ
VDDQ
55
61
RN41 22x4
LX_BA1
LX_WE#
27
21
BA1 x VDD
1
18
RN42 22x4
LX_BA1
LX_WE#
27
21
BA1 x VDD
1
18
LX_MD56 3
LX_MD60 2
6
7
LX_DDR_DQ56
LX_DDR_DQ60
LX_CAS#
LX_RAS#
22
23
WE#
CAS#
RAS#
M61
VDD
VDD
33
LX_VCC_25
LX_MD52 2
LX_MD50 3
7
6
LX_DDR_DQ52
LX_DDR_DQ50
LX_CAS#
LX_RAS#
22
23
WE#
CAS#
RAS#
M61
VDD
VDD
33
LX_VCC_25
LX_MD59 1 8 LX_DDR_DQ59 LX_CS# 24 6 LX_MD53 4 5 LX_DDR_DQ53 LX_CS# 24 6
61/ 61/
CS# VSSQ 12 CS# VSSQ 12
LX_CKE 44 VSSQ 52 LX_CKE 44 VSSQ 52
RN43 22x4 CKE VSSQ 58 RN44 22x4 CKE VSSQ 58
LX_MD63 4 5 LX_DDR_DQ63 LX_MCK1 45 VSSQ 64 LX_MD55 1 8 LX_DDR_DQ55 LX_MCK1 45 VSSQ 64
LX_MD62 3
LX_MD61 2
6
7
LX_DDR_DQ62
LX_DDR_DQ61
LX_MCK1# 46 CK
CK# x VSSQ
VSS
34
LX_MD54 2
LX_MD48 3
7
6
LX_DDR_DQ54
LX_DDR_DQ48
LX_MCK1# 46 CK
CK# x VSSQ
VSS
34
50 DNU_19
DNU_50
M 8
VSS
VSS
48
66
50 DNU_19
DNU_50
M 8
VSS
VSS
48
66
HY 5DU281622ET-5 HY 5DU281622ET-5
LX_VCC_25 LX_VCC_25 LX_VCC_25 LX_VCC_25 LX_VCC_25 LX_VCC_25 LX_VCC_25 LX_VCC_25 LX_VCC_25 LX_VCC_25 LX_VCC_25 LX_VCC_25 LX_VCC_25
LX_MCK1
+ C245 C246 C247 C248 C249 C250 + C251 + C252 C253 C254 C255 C256 C257
R204 10uF/16V 0.1uF 0.1uF 0.01uF 0.01uF 0.01uF 47uF/16V 10uF/16V 0.1uF 0.1uF 0.01uF 0.01uF 0.01uF
47
LX_MCK1_TRM LX_VCC_25 LX_VCC_25 LX_VCC_25 LX_VCC_25 LX_VCC_25 LX_VCC_25 LX_VCC_25 LX_VCC_25 LX_VCC_25
R205 C258 + C259 C260 C261 C962 + C262 + C263 C264 C265 C963
47 0.01uF 10uF/16V 0.1uF 0.1uF 0.1uF 47uF/16V 10uF/16V 0.1uF 0.1uF 0.1uF
LX_MCK1#
Title
Schematict Name Rev
HiDTV_LX DDR(2/2) 00
Size B Sheet 15 of 24 Date: T h ursday , M arch 2 3, 2 00 6
LX_VCC_33 VCC_FLASH
FB24
U20
32 33 LX_FRD0
150_Ohm_600mA C325 + C326 LX_FRA1 28 A0 DQ0 35 LX_FRD1
LX_FRA2 27 A1 DQ1 38 LX_FRD2
22uF/16V 0.1uF LX_FRA3 26 A2 DQ2 40 LX_FRD3
VCC_FLASH A4 DQ4 RST_HD# 10,21 LX_FRA[0..25] 9,10,13,19
LX_FRA5 24 46 LX_FRD5
C268 A6 DQ6 LX_FOE# 9,10 LX_FRD[0..15] 9,10,19
# LX_FRA7 22 51 LX_FRD7
E LX_FRA8 20 A7 DQ7
C
_ A8 LX_FWE# 9,10 LX_FLASH_CE# 11
LX_FRA9
M
#
E LX_FRA10
19
18 A9 6 DQ8
34
36
LX_FRD8
LX_FRD9
0.1uF
O
R
O
F LX_FRA11 17 A10 5 DQ9 39 LX_FRD10
LX_ROM_CE# 11
_
X
_
X LX_FRA12 13 A11 P DQ10 41 LX_FRD11
LX_FRA18 L L LX_FRA13 12 A12
A13
O DQ11
DQ12
45 LX_FRD12
2 6 2 4
LX_FRA14
LX_FRA15
11
A14 S DQ13
47 LX_FRD13
LX_FRD14
U69 1 3 1 2 2
VCC_FLASH LX_FRA16
10
8 A15 T DQ14
50
52 LX_FRD15
LX_FRA0 12 8 # # LX_FRA17 7 A16 DQ15
1 C D E E
LX_FRA1 11 A0A C N 13 LX_FRD0 LX_FRA18 6 A17
C O
LX_FRA2
LX_FRA3
LX_FRA4
10
9
8
A1
A2
A3
V G
512Kx8
Q0
Q1
Q2
14
15
17
LX_FRD1
LX_FRD2
LX_FRD3 R244
LX_FRA19
LX_FRA20
LX_FRA21
5
4
3
A18
A19
A20
hs VCC_FLASH
LX_FRA5
LX_FRA6
7
6
A4
A5
A6
FLASH
Q3
Q4
Q5
18
19
LX_FRD4
LX_FRD5
4.7K LX_FRA22
LX_FRA23
1
30
A21
A22
A23
al STS
53 LX_FLASH_STS R206 4.7K
LX_FRA7
LX_FRA8
LX_FRA9
5
27
26
A7
A8
PLCC32 Q6
Q7
20
21
LX_FRD6
LX_FRD7
LX_FLASH_CE# 14
F
A9
0 1 2 3 4 5 6 7 E
LX_ROM_CE# R2 0_DNS 2 CE0
6 NC
56
VCC_FLASH
3
1 1 1 1 1 1 1 1
A A A A A A A AW
5 4 8 9 3 2 0 1
W39L040 VCC_FLASH VCC_FLASH R245
LX_FOE#
4.7K 29
54
CE1
CE2 1x VCC
9
37
2 2 2 2 3 3 R246 4.7K OE# VCC
0 1 2 3 4 5 6 7 10 LX_VD[0..23] DIN[0..23] 5,6
1
A
R
F
_
1
A
R
F
_
1 1
A A
RR
F
_ F
_
1
A
R
F
_
1 1 1
A A A
RRR
F
_ F
_ F
_
RST_HD# R207 0
LX_FWE#
LX_FLASH_RESET#
55
16
WE#
RP#
M8 VCCQ
43 VCC_FLASH LX_VD0
LX_VD1
RN112
1
2
33x4
8
7
DIN0
DIN1
X X X X X X X X LX_VD2 3 6 DIN2
L L L L L L L L R208 4.7K LX_FLASH_BYTE# 31 21 LX_VD3 4 5 DIN3
VCC_FLASH BYTE# VSS 42 C270 C271 C272 RN53 33x4
R209 1K LX_FLASH_VPEN 15 VSS 48 LX_VD4 1 8 DIN4
VCC_FLASH VPEN VSS 0.1uF 0.1uF 0.1uF LX_VD5 2 7 DIN5
R210 0_DNS 28F128J3C-120 LX_VD6 3 6 DIN6
LX_VD7 4 5 DIN7
RN54 33x4
LX_VD8 1 8 DIN8
LX_VD9 2 7 DIN9
LX_VD10 3 6 DIN10
LX_VD11 4 5 DIN11
VCC_FLASH RN55 33x4
LX_VD12 1 8 DIN12
LX_VD13 2 7 DIN13
LX_VD14 3 6 DIN14
R2256 LX_VD15 4 5 DIN15
RN56 33x4
10 LX_VD16 1 8 DIN16
LX_VD17 2 7 DIN17
LX_VD18 3 6 DIN18
+ C328 LX_VD19 4 5 DIN19
C327 RN57 33x4
10uF/16V 0.1uF R251 LX_VD20 1 8 DIN20
LX_VD21 2 7 DIN21
10K LX_VD22 3 6 DIN22
LX_VD23 4 5 DIN23
U27 24LC64
1 8 WP: H protect
A0 VCC
2
A1
C WP
7 R254 0 LX_PG1 11
2I
3 M 6 R257 100 SCL_MST 5,6,9,11,20,21
A2 O SCL
4 R 5 R260 100
GND P SDA SDA_MST 5,6,9,11,20,21
E
E C329 C330
I2C address: C0/C1 100pF 100pF
Title
Schematict Name Rev
HiDTV_LX ROM Flash 00
Size B Sheet 16 of 24 Date: T hursday, M arch 2 3, 2 006
LX_VCC_33
1 C331 Y5 C332 2
R261 6.8K X
_ 27.000MHz X
_
3
1 Q6 O 20pF_DNS 20pF_DNSO
10 LX_VCOTP C C
2SC2412K
V
_ U28 V
_
R262
X
L 1
PI6CX100-27 8
X
L
2 X1 X2 LX_VCC_33
R263 1K C333 2 7
NC_2 NC_7 FB25 300ohm,700mA
68K 68pF LX_VCO_VIN 3 6 LX_VCO_VDD
C334 VIN VDD
4 5 C335 + C336 + C337
GND CLKOUT LX_CLK27 10
1uF
PT7V4027WE 0.01uF 10uF/16V 10uF/16V
(The R, C values in the LPF need be fine tuned)

TOSLink Out
SPDIFOUT
CON10
1 RCA-OPTICAL
3
5V_2
R264 0 2
3.3V
5V_2
R265 NC
C338
C339 + C340 0.1uF
22uF/16V 0.1uF
U29
6
1
2 4 SPDIFOUT LX_VCC_33 LX_VCC_33
5 HDMI_SPDIF 1A 1Y
5 C 7
11 2A C 2Y 9 CON11
14 3A V 3Y 12 1 2
4A 4Y R2257 10 HiDTV_ROUT 3 4
3 + C1811 C1812 10 HiDTV_GOUT 5 6
10 LX_SPDIF 1B 10 HiDTV_BOUT
6 4.7K 5,6,10 HS_EX 7 8
10 2B 10uF/16V0.1uF 9 10
3B 5,6,10 VS_EX
13 Y9
4B PCI_OSC_EN
1 4 HEADER_5x2
1 EN VCC R266R267R268
20 SPDIF_SW A/B D
15 2 3
G N GND OUT PCI_CLK 10,19
G R2258 22 75 75 75 For test
33MHz_OSC
8 SN74CBT3257CDBQR to monitor HiDTV output
Title
Schematict Name Rev
VCO, SPDIF 00
Size A Sheet 17 of 24 Date: T hursday, M arch 23, 20 06
DEOUT_EX 6
VSOUT_EX 6 /DISPLAY /HV-ON
HSOUT_EX 6 /DISPLAY/HV-ON
20
R271 0 3V_LVDS3
SCL_MST
3V_LVDS3 SCL_MST 5,6,9,11,16,21
SDA_MST
SDA_MST 5,6,9,11,16,21 VO_R[0..7] 6
6 7 6 7 6 5 4 3 2 1 R272
B
_ G F VO_R0
_ G
_ R
_ / R
_ B
_ B
_ B
_ B
_ B
_ 0
THC63LVD103 O O O O R O OOO OO C342 VO_R1
V V V V V V V V V V 0.1uF VO_R2
C343 VO_R3
0.1uF
U30 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 C344
6 6 6 6 6 5 5 5 5 5 5 5 5 5 5 4
0.1uF VO_R4
VO_B7 1 4 3 2 1 F/ 0 6 5 D 4 3 2 1 C 0 6 48 VO_B0 R273 VO_R5
2 TD5 D D DD R D C C N C C C C C C B TB5 47 2.2K CON30 VO_R6
GND T T T T T T T G T T T T V T T GND
3 46 VO_G5 2 1 VO_R7
6 FLDOUT_EX TD6 TB4 VO_G4
4 45 4 3
6 VO_R0_0 TE0 TB3 VO_G3
5 44 6 5
6 VO_R0_1 TE1 TB2 VO_B[0..7] 6
6 43 8 7
6 VO_G0_0 TE2 RS VO_G2 VO_B0
7 42 10 9
R274
6 VO_G0_1
8
9
VCC
TE3
THC63LVD103 TB1
TB0
41
40
VO_G1
VO_G0
12
14
11
13
VO_B1
VO_B2
6 VO_B0_0 TE4 TA6 VO_B3
4.7K_DNS 10 39 16 15
11 GND GND 38 VO_R5 18 17
3V_LVDS3 6 VO_B0_1 TE5 TA5 VO_R4
12 37 20 19
6 CLKOUT_EX CLK_IN TA4 VO_R3 VO_B4
13 36 22 21
14 /PDWN TA3 35 VO_R2 24 23 /DISPLAY/HV-ON VO_B5
K D DC D
15 PLL_GND
N NC N TA2 34 VO_R1 26 25 VO_B6
0
1 G
PLL_VCC
_ G
_ V
_ G
_ TA1 VO_R0 TXOUT4+ SDA_MST VO_B7
R3056 3V_LVDS1 16 + - 33 28 27
100 TE6 S K K S S S TA0 TXOUT4- 30 29 SCL_MST
D + - + - L L + - DD + - + - D
C345 V E E D DCCCC V V B B A A V TXOUT3+ 32 31
L T T T T T T T T L L T T T T L VO_G[0..7] 6
0.1uF 3V_LVDS2 TXOUT3- 34 33
7
5 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 TXCLK+ 36 35 VO_G0
0 1 1 1 2 2 2 2 2 2 2 2 2 2 3 3 3 PANEL_POWER
3 TXCLK- 38 37 VO_G1
R TXOUT2+ 40 39 VO_G2
3
C346 TXOUT2- 42 41 VO_G3
R3059 10k 1 Q18 0.1uF TXOUT1+ 44 43
20 LVDS_PDOWN TXOUT1-
MMBT3904 + - + - + - + - + - 46 45
4 4 3 3 + - 2 2 1 1 0 0 TXOUT0+ VO_G4
T T T T K K T T T T T T 48 47
UUUU L L UU UUUU TXOUT0- 50 49 VO_G5
OOOOCCOO OOOO VO_G6
2 X X X X X X X X X X X X
T T T T T T T T T T T T CON50PP VO_G7
5V_STB GND GND
CBW321611U121B/NC
3.3V L5
12V
PANEL_POWER
CBW321611U121B CBW321611U121B
R71 100R U43
L57 1 8 L29
CON13 2 S D 7
3 S D
C39 BKLT_ADJ 1 3.3V 3 6
C C74 S D
11 LX_PG3
GPIO_DIM_PWM
R78 NC 1 Q3 N 0.1uF BKLT_EN 2 + C372 + C371 R76 4 5
10uF/16V G D
MMBT3904 + 3 C41 22uF/16V 22uF/16V + C374 + C373
5V_2 0.1uF 47K APEC AP9435M C40 22uF/16V 22uF/16V
D2006-3A 0.1uF
7 0
3.3V R79 NC 2 7 6
R 0 K
3 0 3
R 1
R64 0
R65 10k 1 Q10
MMBT3904
k
0. 3
1
20 DISPEN R3058 10k 1 Q17 2
MMBT3904
R81
2
4.7K 7 R67 100R
R
2
3 C38
0.1uF
20 LCDPANEL_SW R75 2K 1 Q5
MMBT3904
2 Title
Schematict Name Rev
LVDS OUTPUT 00
Size B Sheet 18 of 24 Date: T uesday, April 25, 2006
PCI_33 C292
R29 R30
A A A 0.1uF
m m m
1 0 1 0 1 0 EMI SUPRESSION
0 0 0 C293
6
_ 6
_ 6
_ 51 51 CON12
3 4 5
4 m 4 m 4 m U23 PE68515 1 10
B h B h B h LAN_RXIN+ TX+ GND
F O F O F O 1 7 2
C294 2 _ _ C295 _ C296 LAN_RXIN- 2 RD+ RX+ 5 3 TX-
0 2 0 2 0
5 5 5 3 RD- CT_5 6 4 RX+ 0.1uF
1 1 1 CT_3 RX- NC_4
LAN_TXD- 15 11 5
0.1uF 0.1uF 0.1uF 14 TD- TX- 12 6 NC_5
LAN_TXD+ 16 CT_14 CMT 10 7 RX-
TD+ TX+ 8 NC_7 9 C297 0.1uF
R56 R32 NC_8 GND
C298 RJ45_V
LAN ENABLE = "HI" R33 R34 R35 R57 0.01U/2KV
51 51 0.1uF
5V_1 *For RTL8139DL application, all bead must be rated Connect to
75 75 75 75 Chassis
300mA/100ohm@100MHz Ground
R38 C299 C300 0.01uF
PCI_33
R58 0.1uF
1K 5.6K,1% VDD25 LAN_XOUT
(ISOLATEB) Y2
+ - + - C301 LAN_XIN
D D N
I N
I T
R41 X X X X U N
I 5
R212 B T T R R O X L 2 0.1uF 25MHz PCI_33
_ _ _ _ X
_ _ R D
O N N N N N T D C302 C303
SI A A A A N A C V
15K L L L L A L V The 9346 EEPROM should be
510 L 27pF 27pF
U24 2
functional when powered by VCTRL 1 Q4
5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 RTL8139D MMBT3906
7 7 7 7 7 7 6 6 6 6 6 6 6 6 6 6 5 5 5 5 5 5 5 5 5 3.3V　
DB D + D - D 9 + - D T E 3 D 1 2 D 5 B D L B B B 5 5V_1 PCI_33
DE ND 6 NN K T N X X D 2 E NR TQ N 2
For wake on LAN use 3
D6 X X D _ I I N E A T DMG R215 0 VDD25
TG
V A T T V X XGS RG V T N E UD
A L A C
NRR
T A DP CGR RD R213 5.6K_DNS
76 RWL V Vmm K V 50 AUX R214 5.6K_DNS U25 AT93C46 C305 C306
O A e e L +
LED_RED 77 NC_76 SI d d C AUX 49 EECS 1 8 C304
LED2 o o EECS CS VCC
78 MM 48 EESK 2 7 22uF/16V 0.1uF
79 ModemIDSELB EESK 47 EEDI 3 SK NC_7 6 0.1uF
LED0 80 LED1 EEDI 46 EEDO 4 DI NC_6 5
LAN_INTAB 81 LED0 EEDO 45 LAN_AD0 DO GND
LAN_RSTB 82 INTAB AD0 44 LAN_AD1
LAN_CLK 83 RSTB AD1 43 GND
LAN_GNTB 84 CLK GND 42 LAN_AD2
LAN_REQB 85 GNTB AD2 41 LAN_AD3 PCI_33
LAN_AD31 86 REQB AD3 40
LAN_AD30 AD31 NC_40 LX_FRD[0..15] 9,10,16 LX_FRA[0..25] 9,10,13,16
PCI_33 87 39 RN74 0x4 RN75 0x4
88 AD30 VDD 38 LAN_AD4 LAN_AD0 5 4 LX_FRD0 LAN_AD16 5 4 LX_FRA0
LAN_AD29 89 GND
AD29
RTL8139 AD4
AD5
37 LAN_AD5
LAN_AD6
LAN_AD1
LAN_AD2
6 3 LX_FRD1
LX_FRD2
LAN_AD17
LAN_AD18
6 3 LX_FRA1
LX_FRA2
90 36 7 2 7 2
LAN_AD28 91 VDD AD6 35 LAN_AD3 8 1 LX_FRD3 LAN_AD19 8 1 LX_FRA3
LAN_AD27 92 AD28 BROMOE 34 PCI_33
LAN_AD26 93 AD27 VDD 33 LAN_AD7 RN76 0x4 RN77 0x4
LAN_AD25 94 AD26 AD7 32 LAN_CBE0B LAN_AD4 5 4 LX_FRD4 LAN_AD20 5 4 LX_FRA4
LAN_AD24 95 AD25 CBE0B 31 LAN_AD5 6 3 LX_FRD5 LAN_AD21 6 3 LX_FRA5
VDD25 96 AD24 GND 30 LAN_AD8 LAN_AD6 7 2 LX_FRD6 LAN_AD22 7 2 LX_FRA6
97 VDD25 AD8 29 LAN_AD9 LAN_AD7 8 1 LX_FRD7 LAN_AD23 8 1 LX_FRA7
LAN_CBE3B 98 VDD AD9 28 LAN_AD10
LAN_AD13 99 CBE3B AD10 27 LAN_AD11 RN78 0x4 RN79 0x4
LAN_AD23 100 IDSEL AD11 26 LAN_AD12 LAN_AD8 5 4 LX_FRD8 LAN_AD24 5 4 LX_FRA8
AD23 AD12 LAN_AD9 6 3 LX_FRD9 LAN_AD25 6 3 LX_FRA9
B B LAN_AD10 7 2 LX_FRD10 LAN_AD26 7 2 LX_FRA10
L
B E B E B B B B LAN_AD11 8 1 LX_FRD11 LAN_AD27 8 1 LX_FRA11
2 1 0 9 7 8 7 6 2 MB Y S P RR 1 5 4 3
LAN_RSTB R217 0 2 D 2 2 1 D _ 1 1 1 E A YD V DO RRR E D 1 1 1
LAN_CLK R218 0 PCI_RST# 10 DNDDDDCDDD BRD R E N T E E A B DDDD RN80 0x4 RN81 0x4
LAN_GNTB PCI_CLK 10,17 AGA A A V N A A A C F R I T DGS P S P C V A A A LAN_AD12 LX_FRD12 LAN_AD28 LX_FRA12
R219 0 5 4 5 4
LAN_REQB PCI_GNT#2 10 LAN_AD13 LX_FRD13 LAN_AD29 LX_FRA13
R220 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 3 6 3
LAN_AD13 PCI_REQ#2 LAN_AD14
10 1 1 1 1 1 1 1 1 1 1 2 2 2 2 2 2 LAN_AD14 LX_FRD14 LAN_AD30 LX_FRA14
R221 0_DNS B 7 2 7 2
LAN_FRAMEB R222 0
PCI_FRAME# 10 B E B B B
Y L B B
R
B
1
LAN_AD15 8 1 LX_FRD15 LAN_AD31 8 1 LX_FRA15
LAN_IRDY B R223 0 2 1 0 9 8 7 6 2M Y DE
P
E 5 4 3
PCI_IRDY # 10 2 2 2 1 1 1 1 E A D S O RR B 1 1 1
LAN_TRDY B R224 0 D D DD DDD B R R RV T E A 3 D D D RN82 0x4
LAN_DEVSELBR225 0
PCI_TRDY # 10 A
_ A
_ A
_ A
_ A
_ A
_ A
_ C
_ F
_ _IT
_ E S
_ S _ C
_ P 3
_ _ A
_ A
_ A
_ LAN_CBE0B 4 5 LX_FRA16
LAN_STOPB R226 0
PCI_DEVSEL# 10
PCI_33 NDNN NN NNNNN N ND_ N NNN I N N N LX_VCC_33 PCI_33 LAN_CBE1B 3 6 LX_FRA17
PCI_STOP# 10 AG A A A A A A A A A A N A A A AC A A A
L L L L L L L L L L L L L L L P L L L NC LAN_CBE2B 2 7 LX_FRA18
A
LAN_SERRB R227 0 L LAN_CBE3B 1 8 LX_FRA19
LAN_PAR PCI_SERR# 10
R228 0 L58
PCI_PAR 10
C307 +
C308
R418 0
PCI_INTA# 10 0.1uF
R419 0_DNS 22uF/16V
R420 0_DNS PCI_INTB# 10 Title
LAN_INTAB R216 0_DNS PCI_INTC# 10
PCI_INTD# 10 KONKA HIDTV ATSC MAIN
Schematict Name Rev
LAN 00
Size B Sheet 19 of 24 Date: T hursday, March 23, 2006
5V_1
LX_VCC_33 LX_VCC_33 I/O EXPANSION
C388 +10uF/16V
C391 0.1uF
R319 R320
R310 R311 R312 R313
4.7k 4.7k
U38
4.7K 4.7K 4.7K 4.7K PCA9555DB
CON15 CON16 11 LX_PG0 1 24
1 1 9555_A1 2 INT VDD 23 R317 33 5V_SDA
GND GND 9555_A2 3 A1 SDA 22 R318 33 5V_SCL
SDA_SLV 2 SDA_MST 2 AUDSEL1 4 A2 SCL 21 9555_A0
SDA SDA 4 AUDSEL1 P00 A0
AUD_RST 5 20 DISPEN
9 AUD_RST P01 P17 DISPEN 18
SCL_SLV 3 SCL_MST 3 AUDSEL2 6 19 LED_R
SCL SCL 4 AUDSEL2 P02 P16 LED_R 21
18 LVDS_PDOWN R2251 22 LVDS_ON 7 18 LED_G
RF_SELECT18 P03 P15 LED_G 21
For HiDTV Debug I2C For Other ICs Debug I2C 9 RF_SELECT1 17 /DISPLAY /HV-ON /DISPLAY /HV-ON 18
RF_SELECT29 P04 P14 16 MUTE
9 RF_SELECT2 P05 P13 MUTE 9
LCDPANEL_SW 10 15 CRY _SW
18 LCDPANEL_SW P06 P12 CRY _SW 9
HDMI_HOTPLUG11 14 SPDIF_SW
5 HDMI_HOTPLUG P07 P11 SPDIF_SW 17
12 13 HD_SW
LX_VCC_33 VSS P10 HD_SW 4
5V_1
R314 R327 4.7K 9555_A0

SCL_MST 5,6,9,11,16,21
R315 9555_A1
R371 0R 9555_A2
U37 SDA_MST 5,6,9,11,16,21
4.7K
5V_SDA 4 3 4.7K
D2 G2 SCL_SLV 11
SCL_MST 5 2 SDA_MST Default I2C ADDRESS:
5V_SCL 6 S1 S2 1
D1 G1 0x40/41 SDA_SLV 11
NDC7002N LX_UART_RXD 11
LX_UART_TXD 11
CON44
4 HEADER
5V_1
1
2
3 LX_UART_RXD
4 LX_UART_TXD
Title
Schematict Name Rev
I2C,RS232,GPIO 00
Size A Sheet 20 of 24 Date: T hursday, M arch 23, 20 06
5V_SB
LX_VCC_33 VCCH_33 LX_VCC_33
LX_VCC_33
$$$1 R506
3V reset# for HiDTV R2247 1K R330
Q1013 3 Q103 R331
U39 0 1 1 LX_GCS2 100K 10K
SW1 R328 1 2N7002 2SC2412K
1 3 20K GND 3 R2249 0_DNS Q102
VCC 3
1 RTCRST#
LX_WARMRST LX_WARMRST#
2 4 RST_HD# R329 100 2 C393
2
2SC2412K
2 RTCRST
RESET# R507 + C804 R333 R334
button_4pin + C394 C395 AP1701F 0.1uF R505 2 C397 C399
R332 3K LX_VCC_33 100K 10uF/16V
10uF/16V0.1uF 0.1uF 0_DNS 0.1uF 0_DNS
100K
RESET 6
VD3_3
RST_HD# 10,16
3V3S VD3_3 KEY
Reset avtive R335
3V reset# for other IC U66 U40 5V_1
high for SCL_MST 5,6,9,11,16,20
1 100K 1
GND 3 SVP-EX62 GND 3 Q7
VCC VCC 3 SDA_MST 5,6,9,11,16,20
C607 1
RST# R2253 100 2 RESET R336 100 2 C400 2N7002
5,9 RST# RESET# RESET PWRBT 11
R337
AP1701F 0.1uF AP1702F 0.1uF 2 LX_WARMRST# 11
R2254 N18737049 BTN_ADC
100K 10K R338 1K RTCRST# 11
C401 VCCHRST# 11
CON6 0.1uF BTN_ADC 11
3
GND
2 VCCH_33 LX_GCS2 11
GND
1 P-SW 220 580 100K R347
ADC R345 R346
VCCH_33
5V_SB
R376 RTC_VCCH_33
3
Q11 10K
1 1.5K
LED_G 20
MMBT3904 R378 VCCH_33
47R R348 R349 R350 C402
CON24 R380 2
1 R377 4.7K 4.7K 10K U41 0.1uF
1 5V_SB 10K
2 1 8
2 1.5K VCCH_33 INTB VCC
3 LED_R 20 Y
3 Q12 VCCH_33 E SCL_MST 2 7
3 1 R379 K SCL OSCIN
4 IR SDA_MST 3 6 Y8
4 INFRARED 11 SDA OSCOUT
MMBT3904 R355 0
5 5V_SB 47R R351 R352 R353 4 5 32.768KHz VCCHRST#
5 5V_SB GND INTA
R381 2
100K 2.7K 100K C404 C405
D2006_5A VCCH_RST 2 Q8
R354 510 1 PT7C4372A 10pF 10pF
2SA1037AK
VCCH_33 U42 C403 3
2 VCCHRST# 1 Q9 3 PWRBT real time clock
RESET# + 2SC2412K
3 2.2uF R356 R357
VCC 1 50V 2
GND
AP1701F 10K 510 Title
CIR Block Reset
Schematict Name Rev
When VCCH is On
Button, IR, RESET 00
Size B Sheet 21 of 24 Date: T uesday, July 18 , 200 6
(FOR HIDTV 3.3V RTC) (HiDTV DDR)
5V_SB VCCH_335V_1 D3V3
U34 BAO33 CBW321611U121B CBW321611U121B
L33 NC LX_VCC_25
L21 CBW321611U121B 1 3 L39 U31 BAO25 L42
VIN VOUT L37
1 3
GND CBW321611U121B VIN VOUT
+ C43
C76 + C45 2 C65 0.1uF GND
10uF/16V 0.1uF 100uF/16V
C77 + C52 2 C67 + C47
10uF/16V 0.1uF 100uF/16V 0.1uF
(FOR HIDTV 1.8V)

5V_SB VCCH_18
U21 BAO18 CBW321611U121B
VCCH_33 3.3V_SB RTC_VCC_33 (1A) (FORRTC 1.8V)
L22 CBW321611U121B 1 3 L40
VIN VOUT L55 VCCH_33 RTC_VCCH_33
D7
GND CBW321611U121B 1
3
C365 + 2 C66 + C49 C954 + C955 R360 1K 2
10uF/16V C46 100uF/16V 0.1uF
0.1uF 0.1uF 10uF/16V BAV70L C432
BAT1
CR2032 0.1uF
(FOR 3.3V VGA EX62_CPU HDMI_I2C)
(FLASH HIDTV RESET_HIDTV I2C 27M) 5V_SB

5V_1 LX_VCC_33
U33 BAO33 CBW321611U121B D8 LED
R367 300 2 1
L20 CBW321611U121B 1 3 L41
VIN VOUT 5V_1
GND D10 LED

C50 R370 300 2 1
C75 + 0.1uF 2 C68 + C51
10uF/16V 100uF/16V 0.1uF
D3V3
L32 NC
Title
Schematict Name Rev
Power Supply - 1 00
Size A Sheet 22 of 24 Date: T uesday, July 18, 2006
D3V3
L35 NC
Power for DDR Linear equation:
5V_2 VDDMQ
U32 BAO25 Vout=1.25v*(1+R? /R?)
IO PADS 5V_2 (EX62 RESET_EX62)
L25 1 3 L46 U36 BAO33 (PCI) VD3_3
CBW321611U121B VIN VOUT CBW321611U121B
+ C443 L27 CBW321611U121B 1 3 L47
GND C444 VIN VOUT CBW321611U121B
22uF/16V0.1uF C445 +
C368 + C64 2 C69 + C56 GND C446
10uF/16V 0.1uF 100uF/16V 0.1uF
SVP-EX 22uF/16V 0.1uF
2
C370
10uF/16V
+ C57
0.1uF
C73
100uF/16V
+ C61
0.1uF
3.3V
Power
Linear condition:
3V3S
100ohm < R? <
200ohm VDDM L48
CBW321611U121B
C453 +
L45 D3V3 C454
22uF/16V 0.1uF
CBW321611U121B + C455
C456 L31 NC
22uF/16V0.1uF
Sil9011
Power for DDR 3.3V
Core Logic Power
L38 NC
3V_LVDS3 3.3V
5V_2
U35 BAO33
L26 CBW321611U121B 1 3 L49

VIN VOUT CBW321611U121B
C486 + C487
GND
D3V3 22uF/16V 0.1uF
C369 + C53 2 C72 + C58
Sil9011 10uF/16V 0.1uF 100uF/16V 0.1uF
THC63LVD103
L34 NC 1.8V 3.3V Power
3V_LVDS VA1_8 Power VR1_8 3V_LVDS2
U22 BAO18 CBW321611U121B
L28 1 3 L50
CBW321611U121B VIN VOUT CBW321611U121B
L44 C490 + C491
GND C457 + + C458 C459
22uF/16V 0.1uF
C366 + C62 2 C71 + C59 22uF/16V 22uF/16V0.1uF
10uF/16V 0.1uF 100uF/16V 0.1uF
3V_LVDS1
L51
CBW321611U121B
C492
C493 +
0.1uF
22uF/16V
3V_LVDS
L52
CBW321611U121B
Title
Schematict Name Rev
Power Supply - 2 00
Size B Sheet 23 of 24 Date: T hursday, M arch 2 3, 200 6
12VSC 5V_STB 5V_STB
(4A)
CON39
1 F1 FUSE L16 CBW453215U310B(2A) R988
2 4.7K
3 F2 FUSE
4 L17 CBW453215U310B R989 100R_DNS
5
D3913-05A(FOR LCD) 3
Q66 1 R986 4.7K POWER_ON# 11
NP
2
D5V/D6V/D9V
CON9 L18
1
2
3 CBW453215U310B_DNS D3V3
4 L19
5
6
7 CBW453215U310B_DNS
8
9
10
11
12
13
14 R80 100 /DISPLAY /HV-ON VD1_8
/DISPLAY /HV-ON 20
D5V/D6V/D9V 12V
D2006-14A(FOR PDP) NC L2 NC
U4 R11 5.6K C636 3.3nF

MP1430DN
L36 CBW321611U121B C626 0.1uF 1 6 C631 100pF
BS COMP
L65 NC 2 5
5V_1 IN FB
R16
L1 NC 3 8 4.99k
C620 SW SS R3
5V_2 C639 + 10k
470uF/16V 0.1uF 4 7 C13
D5V/D6V/D9V 12V GND EN R13
L4 NC 0.47uF 0
12V
U1 R12 10K C637 10nF R279 12K R277 10K
MP1430DN L6
L12 CBW321611U121B C618 0.1uF 1 6 C632 NC
BS COMP L60 4.7uH/4A
C621CBW321611U121B
C627
L64 NC 2 5 D3 C640 + +
IN FB FM5822 470uF/16V 0.1uF
R8 10uF/16V
3 8 30k
C625 SW SS R6
C642 + 10k
470uF/16V 0.1uF 4 7 C11
GND EN R1 L8 CBW453215U310B
NC 1.5k
12V
R282 NC R278 NC
L59 15uH/4A L9 CBW453215U310B

C624
C629
D1 C646 + +
FM5822 470uF/16V 0.1uF
10uF/16V
LX_VCC_18
D5V/D6V/D9V 12V
L3 NC
5V_STB 5V_SB 12VSC 12V
U3 R10 5.6K C638 3.3nF

MP1430DN
L11 CBW321611U121B C615 0.1uF 1 6 C633 100pF
BS COMP
L63 NC 2 5
IN FB C503+ C504
R15 C505 C509+ C510 C511
3 8 4.99k 470uF/16V 0.1uF 0.01uF
C619 SW SS R5 470uF/16V 0.1uF 0.01uF
C641 + 10k
470uF/16V 0.1uF 4 7 C12
GND EN R14
0.33uF 0
12V
R280 12K R275 10K
L61 4.7uH/4A L7 CBW453215U310B

C622
C630
D2 C644 + +
FM5822 470uF/16V 0.1uF
10uF/16V
Title
Schematict Name Rev
Power Supply - 3 00
Size C Sheet 24 of 24 Date: M on day , April 2 4, 2 00 6

LCD TV Service Manual: Konka Group Co, LTD

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LCD TV Service Manual: Konka Group Co, LTD

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LCD TV SERVICE MANUAL

KONKA GROUP CO,LTD.

PLEASE READ BEFORE ATTEMPTING SERVICE

Color System : NTSC_M、ATSC/Free QAM

item Port list

FROM TUNER BOARD KEYPAD

模拟TV(CVBS) TS流 TO HIDTV

Analog TV signal flow chart:

FROM TUNER BOARD KEYPAD

R KONKA HIDTV ATSC MAIN

Other analog signal flow chart:

FROM TUNER BOARD KEYPAD

HDA005A Board Block Diagram

PCI/FLASH/68K ADC IR MI I2S

FROM TUNER BOARD KEYPAD

HDMI signal flow chart:

PCI/FLASH/68K ADC IR MI I2S

FROM TUNER BOARD KEYPAD

Item Type Circuit No. Qty.

Preparing to bring-up the System

Digital signal board Tuner board

CN3001-2 12pF 12pF 12pF

C3022 C3023 R3032 R3033 C3024 6 5 SC1_OUT_R

CN3005C BAV99L 5 4 PC_AUDIOL R3034 4.7K PC_L

3.3V_SB AGND 3.3V_SB

LAYOUT: Place xtal circuit as compact 1M 28.322MHz

AOUTR C361 10uF/16V R473 4.7K

FB8 C54 C55 +

This EEPROM is for HDMI EDID

DIN18 W8 DPIN17 ADDR6 D1

Configuration A: MCU_ADD_CNTRL pulles HIGH

VO_B[0..7] 18 RN10 33x4 *CS1N is not a input or output pin

FOR DS90C385 SVP-EX62_1 00

6 CS1# RN66 15x4

MEMORY DATA BUS SWAPPING

AGND AGND AGND AGND

LX_VCC_33 LX_VCC_33 RST_HD# 16,21

LX_CLK R948 22 CLK_EX 5,6

5V_1 LX_VCC_18 LX_VCC_25 LX_VCC_33

CA1 8 7 6 5 CA2 8 7 6 5 CA3 8 7 6 5 CA4 8 7 6 5 CA5 8 7 6 5 CA6 8 7 6 5 CA7 8 7 6 5 VCCH_33 21,22

FB33 300ohm,700mA RTCVCCH: 3.3V, RTC power

11,15 LX_WE# 11,15 LX_MD[0..63]

11,15 LX_CAS# 11,15 LX_DQS[0..7]

11,15 LX_RAS# 11,15 LX_DM[0..7]

11,15 LX_CS# 11,15 LX_MA[0..11]

11,14 LX_CAS# 11,14 LX_DQS[0..7]

11,14 LX_RAS# 11,14 LX_DM[0..7]

11,14 LX_CS# 11,14 LX_MA[0..11]

I2C address: C0/C1 100pF 100pF

(The R, C values in the LPF need be fine tuned)

C339 + C340 0.1uF

5V_STB GND GND

R314 R327 4.7K 9555_A0

LX_VCC_33 VCCH_33 LX_VCC_33

(FOR HIDTV 1.8V)

(FLASH HIDTV RESET_HIDTV I2C 27M) 5V_SB

GND D10 LED

L26 CBW321611U121B 1 3 L49

U4 R11 5.6K C636 3.3nF

L59 15uH/4A L9 CBW453215U310B

U3 R10 5.6K C638 3.3nF

L61 4.7uH/4A L7 CBW453215U310B

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