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Short-Circuit Analysis Models for Unbalanced

Inverter-Based Distributed Generation Sources
and Loads
Insu Kim, Member, IEEE

 sources in MATLAB/SIMULINK. The fault current of IBDG

Abstract—Inverter-based distributed generation (IBDG)
sources are continually being connected to the grid. Such IBDG
sources act as current sources that are unbalanced in either one or
two phases. When connected to the grid, unbalanced IBDG
sources inject the unbalanced current during an electric fault.
Moreover, unbalanced load currents can also change the
short-circuit current. Therefore, short-circuit analyses of power
systems with either clustered or distributed IBDG sources should
not ignore the contribution from unbalanced IBDG sources and
load currents. Thus, the objective of this study is to present a
method that calculates the short-circuit current flowing from
unbalanced IBDG sources. For this purpose, zero- and
negative-sequence networks are referred to the positive-sequence
network and new bus impedance matrices are defined for each
sequence network. This study also proposes a hybrid method that
combines Thevenin’s equivalent circuit and the three-phase bus
impedance matrix for distribution systems with untransposed
lines. The method examines the effect of unbalanced loads on the
short-circuit current. The proposed methods are verified by using
well-known IEEE test feeders.
Index Terms—Bus impedance matrix, inverter-based
distributed generation (IBDG), load current, symmetrical
sequence, short-circuit, and Thevenin’s equivalent circuit.
I. INTRODUCTION
M ODERN distributed generation (DG) sources based on
advanced power electronics had the capability to control
and manage Volt/Var, and these sources are continually being
connected to the grid [1]. As much more DG sources with
unbalanced phases are connected, the grid could become much
more unbalanced. Thus, standards (e.g., those from IEEE,
ANSI, and IEC), practice codes, and low-voltage grid codes
(e.g., VDE-AR-N 4105) have examined various fault scenarios
of inverter-based DG (IBDG) sources. An IBDG source that
acts as either a voltage or current source will have a different
short-circuit current from synchronous machines because
IBDG sources can limit the output current through internal
control logic during a fault [2, 3]. Thus, many studies have
discussed the short-circuit current characteristics of IBDG
sources. For example, the short-circuit current contribution
from IBDG sources is limited when compared to that of
conventional rotating machines [4, 5].
One study treated IBDG sources as voltage sources and
presented a short-circuit model of the grid-connected IBDG
Insu Kim is with Inha University, Incheon, 22212, South Korea (e-mail:
insu@inha.ac.kr).
This work was supported by Inha University Research Grant #57843-1.
sources was less severe when compared to the magnitude of the
fault current of synchronous generators [6, 7]. Another study
analyzed the behavior of a voltage source inverter after a fault
in PSCAD and indicated that the fault current of a low-voltage
network with IBDG sources was not as high as that of a
network with synchronous generators [8, 9]. Another study
modeled a grid-connected PV plant with a capacity of 50 MW
in PSCAD. The fault current from a PV power plant that can
limit the maximum output current was less than double the
rated current [10]. Recently, one study used SIMULINK to
simulate the electromagnetic transient behavior of PV inverters
after a fault for a duration of 150 ms. The transient behavior of
large-scale PV plants was controllable in each fault scenario
[11].
Previous studies have failed to examine the fault current of
IBDG sources acting as a current source. Thus, a recent study
examined the fault current flowing from a type IV wind turbine
with inverters that act as a current source [12]. A method of
calculating fault currents flowing from an IBDG source using
the superposition rule was also presented [13]. However, these
studies did not present the detailed modeling equations to apply
their methods. One study performed simulations of a network
with an IBDG source in SIMULINK and showed that IBDG
sources could be modeled as either constant power or current
sources [14]. Another study treated an IBDG source as a
voltage-dependent current source and verified its fault response
using dynamic simulations in MATLAB and PSS/E [15].
Previous studies have analyzed the fault current of an IBDG
source but did not verify it in laboratory experiments. One
study verified “a rule of thumb” for setting protection relays.
The fault current from IBDG sources was approximately
double the rated current, and the fault current was typically 2 to
4 times the rated current during a shorter period of 0.06 to 0.25
cycles [7]. Another study tested six commercial PV inverters
and indicated that the fault current flowing from them was
about 1.2 times the rated current [16, 17].
In addition to hardware experiments, a study on IBDG
sources recently integrated a generalized delta-shaped
short-circuit model for modern DG sources into the backward
and forward sweep short-circuit current calculation procedure
[18]. Some studies have examined the transient and steady-state
response of IBDG sources using a power systems analysis
computer program (e.g., CYME, DIgSILENT, SIMULINK,

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and PSCAD/EMTDC). However, the manuals of the programs
do not present the detailed modeling methods or equations for
unbalanced IBDG sources that function as internally limited or
unlimited current sources [19, 20]. Thus, one study converted
loads into constant impedance loads, solved non-linear
equations of an unbalanced distribution system with Jacobian
matrices, and calculated the post-fault voltages and currents of
IBDG sources [21].
Previous studies indicated that if single-, two-, or three-phase
small-capacity IBDG sources were distributed in the
low-voltage network, their short-circuit current contribution
was slight to be neglected. So, previous studies did not present
a short-circuit model for grid-connected IBDG sources with
unbalanced phases (e.g., single- or two-phase IBDG sources)
that function as internally limited or unlimited current sources.
Unbalanced IBDG sources inject the unbalanced current during
an electric fault. Moreover, unbalanced load currents can also
change the short-circuit current. Thus, the first objective of this
study is to present a method that accurately calculates the
steady-state short-circuit current of unbalanced IBDG sources.
For this purpose, a method is proposed that refers zero- and
negative-sequence networks to the positive-sequence network
and defines new bus impedance matrices of each sequence
network (ZUP, ZUN, and ZUZ). Using unbalanced current
injection matrices (IUPCI, IUNCI, and IUZCI), the short-circuit
currents are calculated for unbalanced IBDG sources that
function as current sources. Finally, the short-circuit currents
are superimposed on those from an ideal voltage source (or a
slack generator) using the superposition rule.
Meanwhile, past studies have also neglected the load current
because of the following reasons. The contribution from
rotating generators to the short-circuit current was significantly
greater than the contribution from the load current.
Furthermore, loads could not be modeled by “simple”
impedances because of the complexity of the loads used in
electric distribution systems [22]. However, in [23-25], general
loads were modeled by the constant impedance load in
short-circuit analyses. In [26], to calculate the short-circuit
current, the pre-load current was taken into account by using
the active voltage that depends on the pre-loading conditions.
The three-phase short-circuit current contribution from PV
systems and loads was also examined in [27]. In [28], three
different load models (i.e., neglecting, pre-fault currents, and
constant impedances) calculated the short-circuit current of
high-capacity DG systems. Since the previous studies have
focused on AC systems, a short-circuit current limiting
algorithm for low-voltage DC microgrids with DC loads was
presented in [29]. The effect of loads on the zero-sequence
current was examined after occurring an SLG fault [30].
Commercial power system analysis software packages (e.g.,
CYME and DIgSILENT) present various short-circuit current
calculation functions that take the load current into account
[31]. But, the programs simply substitute the pre-fault voltage
caused by loading conditions for Thevenin’s voltage in the
positive-sequence network, which is usually assumed as 1.0
p.u. [19, 20]. That is, the previous short-circuit models have
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2
examined the effect of load currents on the short-circuit current
by using the symmetrical component method or focused on the
balanced loads. Loads in a distribution system are inherently
unbalanced and lines are untransposed. Thus, this study
proposes a hybrid method that combines Thevenin’s equivalent
circuit and the three-phase bus impedance matrix and calculates
the short-circuit current of unbalanced distribution systems
with untransposed lines.
The first proposed method that refers sequence networks to
another network can calculate the short-circuit current of
balanced and transposed systems (e.g., transmission systems),
including unbalanced IBDG sources. Additionally, the
proposed method is applicable to multiple IBDG sources with
unbalanced phases that can or cannot limit the output current.
The second proposed hybrid method examines the short-circuit
current of unbalanced and untransposed systems (e.g.,
distribution systems), including unbalanced loads.
This paper is organized as follows. Section II presents a
conventional short-circuit study that includes only the voltage
source, and Section III proposes a current injection method for
unbalanced IBDG sources. Section IV presents a hybrid
method that combines Thevenin’s equivalent circuit and the
three-phase bus impedance matrix. Section V provides case
studies that verify the proposed methods, and Section VI
summarizes the major conclusions of the study.
II. CONVENTIONAL SHORT-CIRCUIT STUDY
A. Thevenin’s Voltage Source and Norton’s Current Source
The transient and steady-state responses of IBDG sources
during an electric fault depend on the controller and hardware
capabilities. The controllers can be classified by the voltage
control scheme. One controller adjusts the amplitude (Ea) and
the angle (δ) to regulate active and reactive power, as shown in
Fig. 1 (a). Other controllers use a current control scheme with
two or more loops to control the current output and regulate the
power output, as shown in Fig. 1 (b) [32, 33].
In the voltage-source approach in Fig. 1 (a), an IBDG source
functioning as a voltage source is simplified by using
Thevenin’s equivalent circuit. In the current-source approach in
Fig. 1 (b), an IBDG source functioning as a current source (Is) is
connected to the grid through parallel admittance (Ys), which
can be seen as Norton’s equivalent circuit. In current source
inverters, the internally generated reference current (Iref) is
subject to current limiters that limit the current level necessary
for the rated output power at the minimum voltage (e.g., 0.9
p.u.). Thus, the output current during a fault does not exceed the
full load current of about 1.1 p.u. [4, 7], 1 to 2.0 p.u. [34], or 1.2
p.u. [16, 17], which is small compared to conventional rotating
machines. The current limits are also valid for a
voltage-controlled inverter that use the same overload
capability of the power electronics as a current-controlled
inverter.
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Va In the sequence network in Fig. 2, the IBDG sources that act

ZS
Qm Pm as current sources are open. The contributions of the sources are
δ, f Grid
Pref - Ia examined in the next section. The zero-, positive-, and
PI
Ea  negative-sequence voltages of bus j caused by the voltage
Qref - source are determined by:
PI Ea
Vj,012  [0 V f 0]T  Zji,012 Ii,012 , (5)
(a) Voltage control-based scheme
Z ji,012  [Z0 ( j, i) Z1 ( j, i) Z 2 ( j, i)]T , (6)
Va
Pm Qm Im I i,012  [ Ii ,0 Ii ,1 T
Ii ,2 ] , (7)
Grid
I Ia where Vj,012 is a 3×1 vector of the zero-, positive-, and
Power
Iref Current
controller controller
YS = 1/ZS negative-sequence voltages of bus j, Zji,012 is a 3×1 vector of the
elements of row j and column i of the bus impedance matrix of
(b) Current control-based scheme the zero-, positive-, and negative-sequence networks, Ij,012 is a
Fig. 1. IBDG sources as either a voltage or current source [32, 33]. 3×1 vector of the zero-, positive-, and negative-sequence
short-circuit currents, ◦ is the pointwise multiplication operator,
The sequence components of the terminal voltage are and j=1,…,i,…, N. After a fault occurs in bus or line i, the
Ej,012  T1Ej,abc , (1) post-fault phase voltages of bus j are
where Ej,abc is the open-circuit terminal voltage of each phase Vj,abc  TVj,012 , (8)
of generator j, T1  1/ 3  [1 1 1;1   2 ;1  2  ] , α = where
1∠120°, and j = 1 to N. If the terminal voltage of generator j is Vj,abc is the voltages of phases a, b, and c of bus j, and j = 1 to N.
perfectly balanced (i.e., Ej,a = 1∠0°, Ej,b = 1∠-120°, and Ej,c =
1∠120° p.u.), the zero and negative-sequences (Ej,0 and Ej,2) are Ik,1 Zs,k,1 Vk,1 Ii,1 Vj,1 Ij,1
zero according to equation (1). Therefore, Thevenin’s voltage Zi-1,1 Zi+1,1
source (typically with 1.0∠0° p.u.) exists in only the Vs,k,1
Bus k Bus i Bus j
Ys,j,1 Is,j,1
positive-sequence network.
Positive-Sequence Network
B. Short-Circuit Current Caused by a Voltage Source Ik,2 Zs,k,2 Vk,2 Ii,2 Vj,2 Ij,2 If
After a single line-to-ground (SLG) fault occurs on phase a Zi-1,2 Zi+1,2 3

in bus i in the power system network with N buses, the positive-, Bus k Bus i Bus j
Vs,k,2 Is,j,2
Ys,j,2 3Zf
negative-, and zero-sequence networks are connected in series Negative-Sequence Network
through bus i, in Fig. 2. Because of (1), Thevenin’s voltage
Ik,0 Zs,k,0 Vk,0 Ii,0 Vj,0 Ij,0
source is connected to only the positive-sequence network.
Zi-1,0 Zi+1,0
Before connecting Ys,j,1, the bus impedance matrix of the Bus k
Vs,k,0 Bus i Bus j
positive-sequence network in Fig. 2 is: Ys,j,0 Is,j,0
Zero-Sequence Network
 Z s , k ,1 Z s , k ,1 Z s , k ,1 
 
Z +
old   Z s , k ,1 Z s , k ,1  Zi 1,1 Z s , k ,1  Zi 1,1  . (2) Fig. 2. Sequence networks in the case of an SLG fault in bus i.
 Z s , k ,1 Z s , k ,1  Zi 1,1 Z s , k ,1  Zi 1,1  Zi 1,1 
  III. UNBALANCED CURRENT INJECTION METHOD
Using the Kron reduction rule, the final positive-sequence
network that includes Ys,j,1 is: A. Unbalanced Current Sources
Z 
Z  To accurately calculate the fault current contribution from
 Zold 
+ + old , pr old , rq
Zfinal , (3) IBDG sources connected as current sources with unbalanced

Z old , rr  1/ Ys , j ,1 phases, this study applies Norton’s equivalent circuit to the
 unbalanced steady-state short-circuit model of an IBDG source.
where Z old , pr is the element at the pth row and rth column of
A current source is connected to the rest of the system through
the matrix, r = 3, and p = q = 1 to r. After calculating the bus Norton’s equivalent circuit based on the dual properties of
impedance matrix of the negative-, and zero-sequence networks, Thevenin’s equivalent circuit shown in Fig. 1 (b). If the current
the short-circuit current that flows in the faulted bus or line i is source is perfectly balanced between phases (i.e., Ij,a = 1∠0°, Ij,b
calculated by: = 1∠-120°, and Ij,c = 1∠120° p.u.), the zero- and
IiSLG
,1  V f / (Zii ,0  Zii ,1  Zii ,2  3Z f )  IiSLG
,0  IiSLG
,2 . (4) negative-sequence components are zero:
I j,012  T1I j,abc  [0 10 0] . (9)
I iSLG
,1 , I iSLG
,2 , and I iSLG
,0 are the positive-, negative-, and
However, if single- or two-phase IBDG sources are connected
zero-sequence short-circuit currents flowing in the faulted bus
to the grid, (9) is not valid because the zero- and negative
or line i, while Zii,0, Zii,1, and Zii,2 are the diagonal elements of
sequence elements of Ij,012 are now not zero. In other words, the
the zero-, positive-, and negative-sequence impedance matrices
current source should exist in the positive-, negative-, and
at column i and row i, and Zf is the fault impedance.
zero-sequence networks, as shown in Fig. 2.

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B. Current Injection Method for Unbalanced IBDG Sources I UCI0  [0 ... I s , j ,0 ... 0]T
If an SLG fault occurs, the sequence network in Fig. 2 can be
simplified by referencing the fault impedance (3Zf) and the
I UCI1  [0 ... I s , j ,1 ... 0]T , (11)
zero- and negative-sequence networks to the original I UCI2  [0 ... I s , j ,2 ... 0] T

positive-sequence network in Fig. 2. For example, to refer the

where ZU0, ZU1, and ZU2 are the bus impedance matrices of the
negative-sequence network to the positive-sequence network,
zero-, positive-, and negative-sequence networks that refer the
its total equivalent impedance ( Z final ,ii ) can be found in the ith other sequence networks; VUO, VU1, and VU2 are N ×1 vectors
diagonal element of the negative-sequence bus impedance of the zero-, positive-, and negative-sequence voltages of each
matrix determined in the previous section. In the proposed bus; and IUCI0, IUCI1, and IUCI2 are N ×1 vectors of the zero-,
method, the negative-sequence network is referred to the positive-, and negative-sequence currents injected by the
positive-sequence network by adding Z final ,ii to the unbalanced IBDG sources, respectively.
positive-sequence network. Similarly, the zero-sequence If the control loop of an IBDG source limits the output
network is also referred to the positive-sequence network by current magnitude, Is,j in (11) should be the limited magnitude.
Additionally, if several IBDG sources are connected, IUCI in
adding Z 0final ,ii .
(11) should include the output current magnitudes of the
Fig. 3 (a) shows the positive-sequence network referred by additional IBDG sources. If the short-circuit current injected by
3Zf + Z 0final ,ii + Z final ,ii . The Kron reduction rule is used to build an IBDG source should not be limited to the rated current or
the bus impedance matrix of the new positive-, negative-, and slightly higher than the rated current but capacitive to support
+ the faulted voltage, the proposed method can be extended for
zero-sequence networks, as shown in Fig. 3. That is, Zfinal in
such a case as well. Thus, the proposed method is applicable to
(3) is updated to include 3Zf + Z 0final ,ii + Z final ,ii . Zfinal
-
and multiple IBDG sources that have unbalanced phases and can
0
Zfinal are also updated. limit the output current. It can also be extended to balanced
IBDG sources.
The short-circuit currents caused by the IBDG sources acting
Vi,1
Ik,1 Zs,k,1 Vk,1 Bus i Vj,1 Ij,1 as current sources are:
Zi-1,1 Zi+1,1 IiCS   Vi,1 / (3Z f  Z 0final ,ii  Z final ,ii )  Ii ,1 , (12)
Bus k Ii,1 Bus j
Vs,k,1
Ys,j,1 Is,j,1 I iCS   Vi,2 / (3Z f  Z 0final ,ii  Z final ,ii )  I i ,2 , (13)
3Z f  Z 0final ,ii  Z final ,ii
 
I CS 0
i  Vi,0 / (3Z f  Z final ,ii Z final ,ii )  I i ,0 , (14)
(a) Positive-sequence network
CS  CS 
Vi,2 I CS
i ,1 I i I i I i
CS 0
, (15)
Ik,2 Zs,k,2 Vk,2 Bus i Vj,2 Ij,2
where Vi,1 is the positive-sequence voltage of bus i in equation
Zi-1,2 Zi+1,2
Bus k Ii,2 Bus j (10) and Fig. 3 (a). Equations (12) to (14) are different from
Vs,k,2 Is,j,2 equation (4), which is the well-known conventional equation
3Z f  Z 0
 Z final ,ii Ys,j,2
final ,ii
for the SLG short-circuit current.
(b) Negative-sequence network After calculating the positive-, negative-, and zero-sequence
Vi,0 voltages and the short-circuit currents using equations (10) to
Ik,0 Zs,k,0 Vk,0 Bus i Vj,0 Ij,0
(15), the post-fault phase voltages are determined by:
Zi-1,0 Zi+1,0
Bus k Ii,0 Bus j Vj,abc  TVj,012 , (16)
Vs,k,0 Is,j,0
3Z f  Z final ,ii  Z final ,ii Ys,j,0 where Vj,abc is a 3 × 1 vector of the phase voltages of bus j, Vj,012
is a vector of the zero-, positive-, and negative-sequence
(c) Zero-sequence network
Fig. 3. Decomposed sequence networks after an SLG fault in bus i. voltages of bus j, and j=1 to N. In the case of a line-to-line
ground (LLG) fault on phases b and c in bus i, a parallel
Let the new positive-, negative-, and zero-sequence impedance (Z2 || (Z0 + 3Zf)) is added to bus i of the
+
bus-impedance matrices of Fig. 3 ( Zfinal -
, Zfinal 0
, and Zfinal ) be positive-sequence network in Fig. 3 (a). In the case of a
ZU0, ZU1, and ZU2, respectively. Since the voltage sources are line-to-line (LL) fault on phases b and c in bus i, an impedance
shorted in the proposed current injection method that uses the of Z2 + Zf is added to the positive-sequence network. Lastly, in
superposition principle, the voltages induced by the unbalanced the case of a three line-to-ground fault in bus i, a fault
IBDG sources are: impedance of Zf is added to the positive-sequence network, and
equations (10) to (16) are repeated.
VU0  0  ZU0 I UCI0
C. Superposition Rule
VU1  0  ZU1I UCI1 , (10)
In the previous section, the proposed current injection
VU2  0  ZU2 I UCI2 method calculated the short-circuit current with only a current
source and shorting the voltage sources. In a power system
network with N current and voltage sources and M buses, the

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total short-circuit current (If) was determined for N current and  yaa yab yac 
I P Z thf Vs,abc   yba ybc   vs ,a vs ,b vs ,c  ,
voltage sources by the superposition rule. -1 T
ybb (20)
Fig. 4 shows a flowchart of the proposed current injection  
method for unbalanced IBDG sources.  yca ycb ycc 
I P  I f,abc  Z th,f Vj,abc
-1

Start Calculation of If,vs

Build Zbus and calculate If,vs i f , a   v j ,a 
    T . (21)
 i f ,b   Z-1th,f  v j ,b   ia ib ic 
 i f ,c   v j ,c 
Calculation of If,cs
   
Refer 3Zf, Z-,Z0 and calculate If,cs+
Refer 3Zf, Z-,Z+ and calculate If,cs0
Each bus voltage in bus i is also
Refer 3Zf, Z0,Z+ and calculate If,cs- Vi,abc  Zf If,abc  Vj,abc . (22)
Yes Another IBDG?
If an SLG fault occurs in bus i,
v j ,a  0 , (23)
No
End Superposition i f ,b  i f , c  0 . (24)
Add all If,cs+,If,cs0, If,cs-, If,vs Combining the 9 equations, (21) to (24), is
Add all Vcs, Vvs
ia   1 0 0 0 0 0 yaa yab yac   i f ,a 
Fig. 4. Flowchart of the proposed algorithm.
i   0  
1 0 0 0 0 yba ybb ybc   i f ,b 
IV. SHORT-CIRCUIT OF UNBALANCED DISTRIBUTION
 b  
 ic   0 0 1 0 0 0 yca ycb ycc   i f ,c 
SYSTEMS     
A. Unbalanced Distribution Systems  0    z fa 0 0 1 0 0 1 0 0   vi ,a 
0   0  z fb 0 0 1 0 0 1 0   vi ,b  .(25)
Since distribution lines are often untransposed and     
unbalanced, the mutual impedances between the lines are not 0  0 0  z fc 0 0 1 0 0 1   vi ,c 
equal. Thus, the off-diagonal terms of the sequence impedance 0  0 1 0 0 0 0 0 0 0   v j ,a 
of the lines are not zero. The symmetrical component method     
0  0 0 1 0 0 0 0 0 0   v j ,b 
that neglects the off-diagonal terms may not be able to
accurately calculate the short-circuit current of such an
0  0
   0 0 0 0 0 1 0 0   v j ,c 
unbalanced or untransposed system (e.g., distribution systems). The matrix form of (25) is
This study proposes a hybrid method that combines Thevenin’s I  ASLG X . (26)
equivalent circuit and the three-phase bus impedance matrix for The short-circuit current and each voltage can be calculated by
unbalanced and untransposed distribution systems.
X  ASLG
-1
I. (27)
Fig. 5 presents Thevenin’s equivalent three-phase circuit of
an unbalanced distribution system. The source voltages (i.e., The A matrices for LLG, LL, and three-phase faults are
vs,a, vs,b, and vs,c) are balanced in each phase. If a fault occurs in presented in the Appendix.
bus i and Thevenin equivalent impedance Zth is known, the
short-circuit current of the system can be found. Kirchhoff’s Faulted bus i
if,a zf,a j
voltage law form of the Thevenin equivalent circuit is
v+i,a + vj,a
 vs , a  i f ,a   z fa 0 0  i f , a   v j , a  if,b zf,b
        
 vs ,b   Z th i f ,b    0 0   i f ,b    v j ,b  , Zth
z fb (17) + + vj,b
vi,b if,c zf,c
 vs ,c     z fc   i f ,c   v j ,c 
 i f ,c   0 0
+ + + + + vj,c
vi,c
where Zth = Thevenin equivalent 3 by 3 impedance matrix, zfa, vs,a vs,b vs,c
- - - - - - -
zfb, and zfc = fault impedance of each phase, ifa, ifb, and ifc =
short-circuit current of each phase, and i = the faulted bus. Fig. 5. Thevenin equivalent circuit.
The Thevenin equivalent impedance is the impedance looking
from the source to faulted bus i. The matrix form of (17) is If each 3 by 3 line impedance of the unbalanced three-phase
Vs,abc  Zth If,abc  Zf If,abc  Vj,abc system with N buses (after Kron reduction) is available, the 3N
by 3N impedance matrix of the system can be found by the
 ( Z th  Zf )If,abc  Vj,abc . (18) well-known four rules in [35]. Since the fault occurs in bus i,
 Z th,f If,abc  Vj,abc the proposed Thevenin equivalent matrix (Zth) is a submatrix
The short-circuit current matrix (If,abc) is consisting of (i-1)×3+1 to i×3 rows and (i-1)×3+1 to i×3
columns of the 3N by 3N impedance matrix. The line current,
If,abc  Z-1th,f Vs,abc  Z-1th,f Vj,abc . (19)
or I  ia ib ic  , can be calculated by various power-flow
T

The first term is defined as IP,

analysis algorithms.

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B. Loading Condition a slack generator in bus 1, a tap-changing transformer

To determine the effect of unbalanced loads on the connected in a delta-ground wye between buses 1 and 2, and
short-circuit current, this study adds unbalanced loads (i.e., Zl,a, lines in buses 2, 3, and 4. Furthermore, there is a transformer
Zl,b, and Zl,c) to the ground of the Thevenin equivalent circuit in between buses 4 and 5 connected in a ground wye-delta, as well
pf
Fig. 6. The pre-fault load current ( I load ) is as a single-phase IBDG source with a capacity of 100 kVA
connected to phase a-b in bus 5, as shown in Fig. 7.
vspf
pf
I load  , (28)
Z th  Z l Line Unbalanced
Slack Generator Z1 = Z2 = 0.18+j0.39 p.u. Inverter-Based DG
pf
where v = pre-fault source voltages (i.e., vs,a, vs,b, and vs,c)
s 1 2
Z0 = 0.45+j1.14 p.u.
4 5
Zs 3
and Zth = Thevenin equivalent impedance seen by the faulted
bus (i.e., bus i). 230kV (100 MVA)
If the system is loaded, the open-circuit voltage (i.e., Zs1 = Zs2 = Zs0 = j0 p.u.
Step-Down Transformer
voc ,loading ) seen by the faulted bus is changed by 230kV/69kV, Ztr1 = Ztr2 = j0.3 p.u. 69kV/4.16kV a-b
Ztr1 = Ztr2 = Ztr0 = j0.6 p.u. (100 MVA) 100 kVA(4.16 kV)
Ztr0 = j0.5 p.u. (100 MVA)
voc,loading  vspf  Zth I load
pf
. (29) Fig. 7. A power system example with an unbalanced IBDG source.
If the fault impedance (Zf that consists of zf,a, zf,b, and zf,c) is zero This study assumes that an SLG fault occurs in bus 3. As the
or it is significantly less than loads ( Z f Zl ), the fault current first validation of the proposed method, the sequence voltage
(i.e., I f ,loading ) that takes loading conditions into account is induced by Thevenin’s voltage source while opening the IBDG
source is presented. For this purpose, 5 × 5 bus impedance
voc ,loading voc ,loading matrices were built for the positive-, negative-, and
I f ,loading   . (30)
Z th  Z f Z th zero-sequence networks. Fig. 8 presents a sequence network of
However, after the occurrence of the fault, if Zf  0 or the system. For example, the positive-sequence impedance
zf Zl , the actual fault current (If) is matrix of Fig. 8 is
0 0 0 0 0 
vspf v pf v  Zth I load
bf
0 0.3 j 0.3 j 0.3 j 0.3 j 
If   s  oc ,loading  I f ,loading  I load
pf
. (31) 
 
Z th  Z f Z th Z th Z  0 0.3 j 0.180.69 j 0.180.69 j 0.180.69 j  . (32)
 
That is, the loading conditions do not affect the short-circuit 0 0.3 j 0.180.69 j 0.361.08 j 0.361.08 j 
0 0.3 j 0.180.69 j 0.361.08 j 0.361.68 j 
current if the fault impedance is zero or significantly smaller
than loads. In addition to the loading conditions ineffective to
the short-circuit current, the fault current ( I f ,loading ) that takes 1 0.3j p.u. 2 4 0.6j p.u.

loading conditions into account can be estimated smaller than

0.18+0.39j p.u. 3 0.18+0.39j p.u. 5
the actual fault current because it is subtracted by the pre-fault 1 p.u.
pf 0.5774e-3∠-30° p.u.
load current ( I load ). The proposed hybrid method, or equations
(17) to (27), can calculate the short-circuit current of 0.3j p.u. 0.6j p.u.
unbalanced systems (e.g., heavily unbalanced and untransposed
0.18+0.39j p.u. 0.18+0.39j p.u.
distribution systems), including unbalanced loads. 0.5774e-3∠30° p.u. 3Zf

Faulted bus i if,a zf,a j

0.5j p.u. 0.6j p.u.

v+i,a + vj,a
if,b zf,b 0.45+1.14j p.u. 0.45+1.14j p.u.
Zth 0 p.u.
+ + vj,b
vi,b if,c zf,c

+ + + + + vj,c
vi,c Fig. 8. Sequence network representation of the test feeder in p.u.
vs,a vs,b vs,c Zl,a Zl,b Zl,c
- - - voc - - -
The phase shifts in the transformers connected in a delta-wye
are ignored, but the proposed method can be extended to
Fig. 6. Thevenin equivalent circuit with unbalanced loads.
include the standard phase shifts of ANSI C 57.12.70. The
short-circuit current flowing from Thevenin’s voltage source is
V. CASE STUDY
then calculated by (4):
A. Unbalanced IBDG Sources Vf
I iVS,1   0.4348  75.26 p.u. , (33)
1) Five-Bus Example Zii ,1  Zii ,2  Zii ,0  3Z f
To verify the proposed short-circuit method for where i = 3, Zf = 0, Vf =1∠0°,
transmission systems, a relatively small power system with five Zii ,1  0.18  0.69 j , (34)
buses at a base of 100 MVA was modeled. The system includes

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Zii ,2  0.18  0.69 j , (35) network, the fault current flowing from the source in the
Zii ,0  0.2252 + 0.8443j . (36) network is zero:
Vi,0
The sequence voltage induced by the voltage source is I iCS 0   0 p.u. (43)
calculated by (5) to (7). Fig. 9 shows the resulting sequence 3Z f  Z final ,ii  Z final ,ii
voltage induced by the voltage source. The sequence voltages induced by the IBDG sources in the
To calculate the sequence voltage induced by the IBDG positive-, negative-, and zero-sequence networks are
source, the bus impedance matrix is calculated for the superimposed. The total fault current flowing from the IBDG
positive-sequence network referred by the fault impedance sources in the positive-, negative-, and zero-sequence networks
(3Zf) and the zero- and negative-sequence impedances is superimposed as follows:
CS 
( Z 0final ,ii and Z final ,ii in (3)) in Fig. 3 (a), ,1  I i
I iCS  I iCS   I iCS 0  3.1004e-040.12 p.u. (44)
0 0 0 0 0  The total fault current flowing from the voltage and IBDG
 
0 0.01 0.2622 j 0.0002  0.2070 j 0.0002 0.2070 j 0.0002  0.2070 j  sources is:
Z UI  
0 0.0002  0.2070 j 0.1246 + 0.4760j 0.1246 + 0.4760j 0.1246 + 0.4760j 

. (37)
0 0.0002  0.2070 j 0.1246 + 0.4760j 0.3046 + 0.8660j 0.3046 + 0.8660j  I f  3( IiVS,1  IiCS
,1 )  1.3046  75.22 p.u. (45)
 
0 0.0002  0.2070 j 0.1246 + 0.4760j 0.3046 + 0.8660j 0.3046 + 1.4660j  As the second validation of the proposed method, the
When opening the IBDG source in the negative- and positive-sequence post-fault voltage determined by the
zero-sequence networks, the sequence voltage induced by the proposed method was compared to those determined by
IBDG source in the positive-sequence network is: DIgSILENT (the ANSI mode). In TABLE I, the magnitude of
VU1  ZU1IUCI1 the positive-sequence voltage shows good agreement with
T . (38) DIgSILENT. TABLE II compares the short-circuit currents.
 ZU1 0 0 0 0 0.5774e-3 -30
The short-circuit currents of the proposed method and
The fault current flowing from the IBDG source in the DIgSILENT show relative errors of 0.68 percent and 0.70
positive-sequence network is: percent. However, in DIgSILENT, the unbalanced IBDG
Vi,1 source does not change the short-circuit current. That is,
I iCS    1.79e-4-29.88 p.u. , (39)
3Z f  Z final ,ii  Z final ,ii
0 DIgSILENT ignores the fault current contribution from the
unbalanced IBDG sources. Thus, the proposed method can
where i=3, Zf = 0,
more accurately calculate the short-circuit contribution of the
Z 0final ,ii  0.2252 + 0.8443j , (40)
unbalanced IBDG sources than DIgSILENT.

Z final ,ii 2  0.18 + 0.69j , (41)
TABLE I
and Vi,1 is the voltage of bus i in equation (38). COMPARISON OF POSITIVE-SEQUENCE POST-FAULT VOLTAGES
Without IBDG in p.u. With IBDG in p.u.
1 2 4 Proposed method DIgSILENT Proposed method DIgSILENT
0.6900∠-0.05°
B1 1.0000∠0.00° 1.0000∠0.00° 1.0000∠0.00° 1.0000∠0.00°
0.8745∠-2.17° 0.6900∠-0.05° B2 0.8745∠-2.17° 0.8737∠-1.78° 0.8746∠-2.17° 0.8737∠-1.78°
3 5 B3 0.6900∠-0.05° 0.6897∠0.02° 0.6902∠-0.05° 0.6897∠0.02°
1.0∠0°
0.6900∠-0.05°
B4 0.6900∠-0.05° 0.6897∠0.02° 0.6904∠-0.03° 0.6897∠0.02°
B5 0.6900∠-0.05° 0.6897∠0.02° 0.6906∠-0.01° 0.6897∠0.02°
0∠0° 0.3100∠-179.88°
TABLE II
0.1304∠-165.26° 0.3100∠-179.88° COMPARISON OF SHORT-CIRCUIT CURRENTS
0.3100∠-179.88° 3Zf
Without IBDG in p.u. With IBDG in p.u.
Proposed DIgSILENT Proposed DIgSILENT
3I+ 1.3043∠-75.26° 1.2955∠-73.72° 1.3045∠-75.23° 1.2955∠-73.72°
0∠0° 0∠0°
Relative
0.68% - 0.69% -
0.1117∠-164.85° 0.1268∠-165.69°
error
0.3799∠179.81°

2) Heavily Meshed Transmission System Example

To verify the proposed method in a transmission system
Fig. 9. Sequence voltage induced by Thevenin’s voltage source in p.u.
example, the IEEE 30-bus test system in Fig. 10 was modeled.
The detailed data of the system are available in the previous
Similarly, when opening the IBDG source in the positive-
studies [36, 37]. Since the zero-sequence impedance data of the
and zero-sequence networks, the sequence voltage induced by
line are not available, they are set to 2.8 times the
the IBDG source in the negative network is calculated by
corresponding positive-sequence impedance [38]. Since the
repeating equations (37) to (41). The fault current flowing from
proposed method can be extended for a balanced three-phase
the IBDG source in the negative-sequence network is:
system and a high-capacity IBDG source connected in single or
Vi,2
I iCS    1.79e-430.12 p.u. (42) two phases is not feasible, a balanced three-phase IBDG source
3Z f  Z final ,ii  Z final ,ii
0
with a capacity of 1 MVA is connected to bus 7. An SLG fault
Because the IBDG source is not connected to the zero-sequence occurs in bus 5 of the test feeder.

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The 30 × 30 bus impedance matrix of each sequence network be extended to include the current injection in the
is first built. After opening the IBDG source, the short-circuit negative-sequence current injection matrix.
current flowing from Thevenin’s voltage source is calculated The test feeder was also modeled in DIgSILENT with the
by (4): balanced three-phase IBDG source with a capacity of 1 MVA
I iVS,1  V f / ( Zii ,1  Zii ,2  Zii ,0  3Z f )  1.2550  72.77 p.u. ,(46) and an SLG fault in bus 5. The ANSI mode of DIgSILENT
presents a fault current of 3.8616∠-73.24° p.u. A fault current
where i = 5, Zf = 0, Vf =1∠0°, Zii ,1  Zii ,2  0.0471 + 0.1557j ,
magnitude of 3.7662∠-72.71° p.u. was calculated by the
and Zii ,0  0.1418 + 0.4496j . proposed method, which shows a relative error of 2.5 percent
When the voltage source is shorted, the fault current from the compared to that calculated by DIgSILENT, which also
IBDG source in the positive-sequence network is: validates the proposed method.
I iCS   Vi,1 / (3Z f  Z 0final ,ii  Z final ,ii 2 )  0.00141.15 p.u. (47) In the next validation procedure, only an IBDG source with a
capacity of 1 MVA was connected to bus 30, Thevenin’s
The fault currents flowing from the IBDG source in the
voltage source was shorted, and an SLG fault was generated in
negative- and zero-sequence networks are also calculated.
Finally, the total fault current flowing from the voltage and bus 5. Fig. 11 shows the short-circuit voltage of each bus.
IBDG source is superimposed as follows: Because the IBDG source injects current at the last bus (bus
30), the voltage of this bus is the highest (0.0077∠70.08° p.u.).
I f  3( I iVS,1  I iCS
,1 )  3(1.2550  72.77  0.00141.15)
. (48) Expectedly, the voltages of the faulted and slack buses are both
 3.7662  72.71 p.u. zero.
If an SLG fault occurs in bus 5 of the test feeder with a
three-phase IBDG source with a capacity of 1 MVA, the
contributions of the slack generator and the IBDG source are
3.7651∠-72.77° p.u. and 0.0041∠1.15° p.u., respectively. The
fault current contribution of the IBDG source connected to a
heavily-meshed transmission network as a current source is not
severe when compared to the synchronous generators, which is
comparable to the results of the previous studies [4-7]. But the
IBDG source should not be neglected for accurate short-circuit
calculation because the unbalanced IBDG sources are
continuously connected to the grid.

T4
L20

L19
L21

L17
Fig. 11. Short-circuit voltage of phase a (an SLG fault occurs in bus 5,
L18
Thevenin’s voltage is shorted, and a 1-MW IBDG source is only connected to
bus 30).
L10 L13 L14
L16 B. Unbalanced Loads
L15

L12 1) Unbalanced Six-Bus Example

L9 L11
T3
To verify the proposed short-circuit method for unbalanced
L8 L7 distribution systems, a six-bus power system with unbalanced
T1 T2 loads at a base of 2.5 MVA is modeled in Fig. 12. The test
feeder includes a substation with a delta-grounded wye 2.5
L2 L3 L6
Slack MVA transformer. The three unbalanced loads with (a) 1 MVA
L5 IBDG
in phases a-n (at a power factor of 1.0), (b) 0.5 MVA in phases
L1 L4 b-n (at a lagging power factor of 0.9), and (c) 0.5 MVA in
Fig. 10. The IEEE 30-bus test feeder with a three-phase IBDG source [36, 37]. phases b-c (at a lagging power factor of 0.8) are added to the
test feeder. For phase shifts in the delta-wye connected
Although a single-phase IBDG source with a capacity of 1 transformer (with j0.06 p.u.), the phases of the high-voltage
MVA is usually not feasible, it is connected to phase a-n in bus side lead those of the low-voltage side by 30 degrees, which
7 for verification. The fault current is 3.7670∠-72.67° p.u. The complies with the standard of ANSI C 57.12.70.
discrepancy between the single- and three-phase IBDG sources
is caused by the fact that if the source is balanced, its negative-
and zero-sequence components are zero. If grid codes require
negative-sequence current injection during unbalanced faults,
which depends on inverter control strategies, the proposed can

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pf
Substation Distribution lines Load The pre-fault load current ( I load ) of phase a of the faulted bus
Slack P-Q
1 4 P-Q 5 P-Q 6 P-Q (i.e., bus 3) is
2 3 P-Q
,a  0.4075  37.17 p.u.
pf
I loading (56)

69kV/24.9kV 2.5 MVA

The fault current ( I f ,loading ) of phase a that takes the loading
conditions into account is
1 MVA, 24.9 kV, Phase a-n, 1.0 PF
v
I f ,loading ,a  oc,loading  5.0057  90.38 p.u.
0.5 MVA, 24.9 kV, Phase b-n, 0.5 MVA, 24.9 kV, Phases
Lagging 0.9 PF b-c, Lagging 0.8 PF (57)
Z th
Fig. 12. Distribution system with unbalanced loads.
The proposed actual fault current (If) of phase a is
As the first validation, this study generates an SLG fault with v pf
I f ,a  s  5.2559  86.99 p.u.
a fault impedance (Zf) of 0 in bus 3 and ignores the unbalanced Z th . (58)
loads. The following phase impedance of the distribution lines
is perfectly balanced and transposed,  I f ,loading ,a  I pf
load , a  5.2599  86.82 p.u.

 0.01  0.1 j 0.01  0.01 j 0.01  0.01 j 
Z abc  0.01  0.01 j 0.01  0.1 j 0.01  0.01 j  p.u.
 
0.01  0.01 j 0.01  0.01 j 0.01  0.1 j 
The fault current of phase a calculated by using the proposed
hybrid method is
That is, the proposed actual fault current can be approximated
by the pre-fault load current and the fault current that takes the
(49) loading conditions into account. This study models the
unbalanced loads as constant power sink, not impedance.
However, (28) treats loads as impedance, not constant power
load, so the superimposed magnitude (i.e., I f ,loading ,a  I load
pf
,a )

I f ,a  6.2378  86.42 p.u. ,
where
0.0054+j 0.0654 0.0008+j 0.0023 0.0009+j 0.0020
 
Z   0.0008+j 0.0023 0.0053+j 0.0655 0.0008+j 0.0019 p.u.
th
0.0009+j 0.0020 0.0008+j 0.0019 0.0054+j 0.0654
The fault current calculated by using the sequence method is
Vf
I i ,1   2.0793  86.42 p.u. , (52)
Zii ,1  Zii ,2  Zii ,0  3Z f
where
Zii ,1  Zii ,2  j0.15 p.u., Zii ,0  0.03  j 0.18 p.u. .
The line current converted from the sequence fault current, or
(52), is the same as that of the proposed hybrid method.
As the next validation, this study uses the following
unbalanced and untransposed phase impedance matrix of the
distribution lines.
 0.01+j0.13 0.001+j0.02 0.002+j0.03
Z abc  0.001+j 0.02 0.01+j0.15 0.003+j0.04  p.u. (54)
 
 0.002+j0.03 0.003+j0.04 0.01+ j0.20 
(50) shows a percent error of 0.08 to the proposed actual fault
current.
If the system is unbalanced and untransposed (e.g., a
distribution system), the fault current calculated by the
(51)
symmetrical sequence method can show discrepancy to the
actual fault current. The proposed hybrid method does not
ignore the mutual impedance of untransposed lines so that it
can calculate more accurately the fault current.
2) Heavily Unbalanced Large Distribution System
To verify the proposed method for a heavily unbalanced and
(53)
untransposed network, this study models the highly unbalanced
three-phase IEEE 34-bus test feeder in Fig. 13 [39, 40]. It
includes 34 buses, a slack bus connected to a three-phase
transformer connected in a delta-grounded wye, 2 shunt
capacitors, and 19 distributed loads (e.g., wye- or
delta-connected constant power, current, and impedance loads),
6 spot loads, and 2 voltage regulators. This case study uses a
base of 2.5 MVA. The other detailed feeder data are available in
[39, 40].

TABLE III presents the fault current of phase a by using both 820 822 844
846
848

the methods. The sequence method shows a percent error of 812

818 864 842

802 806 808 814 850 824 826 834 860 836 840
13.6 percent to the proposed method. The discrepancy in the 816
858
832
magnitude is caused by that the sequence method assumes 800 Voltage Regulator 1
888
862
890
mutual impedances of zero (i.e., the off-diagonal terms). 810
Voltage Regulator 2 838

Z 012  T 1Z abcT

852

 0.0140+j 0.2200 -0.0178-j 0.0197 0.0168-j 0.0203  828 830 854 856

  . (55)
  0.0168-j 0.0203 0.0080+j 0.1300 -0.0077-j 0.0056 p.u.
Fig. 13. The IEEE 34-bus test feeder [39, 40].
-0.0178-j 0.0197 0.0097-j 0.0044 0.0080+j 0.1300 
This study generates an SLG fault in buses 812, 824-828, and
832. In TABLE IV, the first row shows the actual fault currents
TABLE III. FAULT CURRENT OF PHASE A (SLG FAULT ON BUS 3)
Method Fault current in p.u.
calculated by the proposed method, (31). The second row
If (Proposed hybrid method) 5.2559∠-86.99° presents the pre-fault load currents calculated by the
If (Sequence method) 4.5408∠-87.40° three-phase backward and forward sweep power-flow analysis
method. The third row indicates the fault currents that take

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loading conditions into account, (30). The proposed actual fault symmetrical sequence method shows discrepancy to the actual
current (e.g., 5.6354∠-61.16° p.u.) in the first row is fault current.
approximated by the pre-fault load current (e.g.,
0.3804∠-46.84° p.u.) and the fault current that takes the loading APPENDIX
conditions into account (e.g., 5.3167∠-61.82° p.u.). If an LLG fault occurs in phases b and c of bus i,
The conventional sequence method usually calculates the v j ,b  v j , c  0 , (60)
zero-, positive-, and zero-sequence components from the
three-phase line impedance available in [39, 40]. For example, i f ,a  0 , (61)
the sequence component of the line geometry of configuration  1 0 0 0 0 0 yaa yab yac 
300, which is used in the main feeder (e.g., buses 800 to 814  0 1 0 0 0 0 yba ybb ybc 
and buses 888 to 890), is calculated by  
 0 0 1 0 0 0 yca ycb ycc 
Z 012  A -1 Z abc A  
 1.33681.3343 j 0.2101 0.5779 j 0.2130 0.5015 j    z fa 0 0 1 0 0 1 0 0
 A-1  0.2101 0.5779 j 1.32381.3569 j 0.2066 0.4591 j  A . (59) A LLG  0  z fb 0 0 1 0 0 1 0 . (62)
0.2130  0.5015 j 0.2066  0.4591 j 1.32941.3471 j   
 0 0  z fc 0 0 1 0 0 1 
 1.7498 + 2.3718j 0.0299 + 0.0234j -0.0198 + 0.0185j 

  0.0299 + 0.0234j 1.1201 + 0.8333j
  1 0 0 0 0 0 0 0 0
 
-0.0412 - 0.0597j  in ohm/mi
-0.0198 + 0.0185j -0.0412 - 0.0597j 1.1201 + 0.8333j 

 0 0 0 0 0 0 0 1 0
The conventional sequence method does not take the mutual  0 1 
impedances (i.e., the off-diagonal terms) into account.  0 0 0 0 0 0 0
Therefore, the conventional sequence method for heavily If an LL fault occurs in phases b and c of bus i,
unbalanced and untransposed distribution systems includes v j ,b  v j , c , (63)
intrinsic error. i f ,a  0 , (64)
TABLE IV. FAULT CURRENT OF PHASE A (SLG FAULT) i f ,b  i f , c  0 , (65)
Method Bus 812 824-828 832
If (Proposed method) 5.6354∠-61.16° 3.7622∠-53.36° 2.5271∠-47.24°  1 0 0 0 0 0 yaa yab yac 
pf  0 1 0 0 0 0 yba ybb ybc 
I load , a 0.3804∠-46.84° 0.3057∠-48.70° 0.2778∠-50.07°
 
I f ,loading ,a 5.3167∠-61.82° 3.5096∠-53.30° 2.3019∠-46.25°  0 0 1 0 0 0 yca ycb ycc 
 
I pf
load , a + I f ,loading ,a 5.6850∠-60.83° 3.8145∠-52.93° 2.5791∠-46.66°   z fa 0 0 1 0 0 1 0 0
If (Sequence method) 5.5716∠-61.12° 3.6110∠-53.33° 2.3018∠-47.36° A LL  0  z fb 0 0 1 0 0 1 0 . (66)
 
 0 0  z fc 0 0 1 0 0 1 
VI. CONCLUSION  0 1 1 0 0 0 0 0 0
To calculate the short-circuit current contribution of  
unbalanced IBDG sources, this study initially proposes a  1 0 0 0 0 0 0 0 0
 0 1 
method that refers the zero- and negative-sequence networks to  0 0 0 0 0 0 1
the positive-sequence network. The proposed method uses If a three-phase to ground fault occurs in bus i,
conventional symmetrical sequence components based on v j , a  v j ,b  v j , c  0 , (67)
balanced systems (e.g., the IEEE 30-bus transmission system).
The case study results indicated that the short-circuit current  1 0 0 0 0 0 yaa yab yac 
contribution of the IBDG source with unbalanced phases was  0 1 0 0 0 0 yba ybb ybc 
not severe. However, heavily unbalanced IBDG sources in a
 
 0 0 1 0 0 0 yca ycb ycc 
transmission network could change the fault current.  
Since a distribution feeder is inherently untransposed and   z fa 0 0 1 0 0 1 0 0
unbalanced, the mutual impedances between the lines are not A 3PH  0  z fb 0 0 1 0 0 1 0 . (68)
equal. However, the conventional sequence method ignores  
 0 0  z fc 0 0 1 0 0 1 
such mutual impedances. This study presents a hybrid method
 0 0 0 0 0 0 1 0 0
that combines Thevenin’s equivalent circuit and three-phase  
bus impedance matrix method for distribution systems with  0 0 0 0 0 0 0 1 0
untransposed lines. The method examines the effect of  0 1 
 0 0 0 0 0 0 0
unbalanced loads on the short-circuit current. The case studies
show that load currents do not affect the short-circuit current if
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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TPWRS.2019.2903552, IEEE
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Insu Kim (M’15) received his doctoral degree from the
Georgia Institute of Technology in Atlanta in 2014 and is now
an assistant professor in electrical engineering at Inha
University in South Korea. His major research interests are (a)
analyzing the impact of stochastically distributed renewable
energy resources such as photovoltaic systems, wind farms, and
microturbines on distribution networks, (b) examining the
steady-state and transient behavior of distribution networks
when distributed generation systems are injecting active and
reactive power, and (c) improving power-flow, short-circuit,
and harmonic analysis algorithms.