Documenti di Didattica
Documenti di Professioni
Documenti di Cultura
Packaging
JEDEC STYLE TO-247
SOURCE
DRAIN
GATE
DRAIN
(FLANGE)
4-341 CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
IRFP360
NOTE:
1. TJ = 25oC to 125oC.
4-342
IRFP360
Source to Drain Diode Voltage (Note 2) VSD TJ = 25oC, ISD = 23A, VGS = 0V (Figure 13) - - 1.8 V
Reverse Recovery Time trr TJ = 25oC, ISD = 25A, dISD/dt = 100A/µs 200 460 1000 ns
Reverse Recovery Charge QRR TJ = 25oC, ISD = 25A, dISD/dt = 100A/µs 3.1 7.1 16 µC
NOTES:
2. Pulse test: pulse width ≤ 300µs, duty cycle ≤ 2%.
3. Repetitive rating: pulse width limited by Max junction temperature. See Transient Thermal Impedance curve (Figure 3).
4. VDD = 50V, starting TJ = 25oC, L = 4mH, RG = 25Ω, Peak IAS = 23A.
1.2 25
POWER DISSIPATION MULTIPLIER
1.0
20
ID, DRAIN CURRENT (A)
0.8
15
0.6
10
0.4
5
0.2
0 0
0 50 100 150 25 50 75 100 125 150
TC , CASE TEMPERATURE (oC) TC , CASE TEMPERATURE (oC)
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
TEMPERATURE CASE TEMPERATURE
1
ZθJC, TRANSIENT THERMAL
0.5
IMPEDANCE (oC/W)
0.1 0.2
0.1
PDM
0.05
0.02
10-2 0.01 t1
t2
NOTES:
SINGLE PULSE DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJC + TC
10-3
10-5 10-4 10-3 10-2 0.1 1 10
t1, RECTANGULAR PULSE DURATION (S)
4-343
IRFP360
103 40
OPERATION IN THIS VGS = 10V PULSE DURATION = 80µs
AREA IS LIMITED DUTY CYCLE = 0.5% MAX
BY rDS(ON)
32
ID, DRAIN CURRENT (A)
100µs 24
10 1ms
VGS = 5.5V
16
10ms
1 VGS = 5.0V
8
TC = 25oC DC
TJ = MAX RATED VGS = 4.5V VGS = 4.0V
SINGLE PULSE
0.1 0
1 10 0 40 80 120 160 200
102 103
VDS , DRAIN TO SOURCE VOLTAGE (V)
VDS , DRAIN TO SOURCE VOLTAGE (V)
40 102
PULSE DURATION = 80µs VGS = 10V PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX DUTY CYCLE = 0.5% MAX
VDS ≥ 50V
32
ID, DRAIN CURRENT (A)
8 VGS = 5.0V
VGS = 4.0V VGS = 4.5V
0
0.1
0 2 4 6 8 10 0 2 4 6 8 10
VDS , DRAIN TO SOURCE VOLTAGE (V) VSD , GATE TO SOURCE VOLTAGE (V)
2.0 3.0
PULSE DURATION = 80µs PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX DUTY CYCLE = 0.5% MAX
NORMALIZED DRAIN TO SOURCE
1.6 2.4
VGS = 10V
ON RESISTANCE
ON RESISTANCE
1.2 1.8
0.8 1.2
0 0
0 30 60 90 120 150 -40 0 40 80 120 160
ID , DRAIN CURRENT (A) TJ , JUNCTION TEMPERATURE (oC)
4-344
IRFP360
10000
1.25
ID = 250µA VGS = 0V, f = 1MHz
NORMALIZED DRAIN TO SOURCE
C, CAPACITANCE (nF)
CISS
1.05 6000
COSS
0.95 4000
0.75 0
-40 0 40 80 120 160 1 2 5 10 2 5 102
TJ , JUNCTION TEMPERATURE (oC) VDS, DRAIN TO SOURCE VOLTAGE (V)
FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
VOLTAGE vs JUNCTION TEMPERATURE
50 102
PULSE DURATION = 80µs
ISD, SOURCE TO DRAIN CURRENT (A)
DUTY CYCLE = 0.5% MAX PULSE DURATION = 80µs
VDS ≥ 50V
gfs, TRANSCONDUCTANCE (S)
TJ = 25oC
30 TJ = 150oC
10
TJ = 25oC
20
TJ = 150oC
10
0 1
0 10 20 30 40 50 0 0.4 0.8 1.2 1.6
ID , DRAIN CURRENT (A) VSD , SOURCE TO DRAIN VOLTAGE (V)
FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE
20
VGS , GATE TO SOURCE VOLTAGE (V)
ID = 25A
16
VDS = 80V
12
VDS = 320V
0
0 25 50 75 100 125
Qg, GATE CHARGE (nC)
4-345
IRFP360
L tP
VDS
tP
0V IAS
0
0.01Ω
tAV
FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS
tON tOFF
td(ON) td(OFF)
tr tf
RL VDS
90% 90%
+
VDD 10% 10%
RG 0
-
DUT 90%
FIGURE 17. SWITCHING TIME TEST CIRCUIT FIGURE 18. RESISTIVE SWITCHING WAVEFORMS
VDS
CURRENT (ISOLATED
REGULATOR SUPPLY)
VDD
D
VDS
G DUT
0
IG(REF) S
0
VDS IG(REF)
IG CURRENT ID CURRENT
SAMPLING SAMPLING
RESISTOR RESISTOR 0
FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 20. GATE CHARGE WAVEFORMS
4-346
IRFP360
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
4-347