Microcontroller

8051 MICROCONTROLLER
A hand book of basic embedded system
Bivash mondal

2013
MICROCONTROLLER 8051 Page |2

Why we need microcontroller?

A general purpose microprocessor contains no RAM, no ROM, and no I/O ports on the chip itself. A
system designed using a general purpose microprocessor must add RAM, ROM, I/O ports and timers externally
to make them functional, which makes these systems bulkier and much more expensive. But in microcontroller
there is a CPU in addition to a fixed amount of RAM, ROM, I/O ports, and timer on one chip. It makes
microcontroller ideal for many applications in which cost and space are important.

Microprocessors are used for versatile purpose, where as microcontrollers are used for dedicated job
only. So, microcontroller is an embedded system containing RAM, ROM, I/O ports, and timer.

CPU CPU RAM ROM

General RAM ROM I/O Timer serial

Purpose µp ports COM
Port I/O Timer Serial
COM

General purpose microprocessor system microcontroller

Applications of microcontroller

Telephones, TVs, remote controls, video games, camera, calculators, microwaves, FAX machines etc.

Microcontroller ICs

There are different family of microcontroller. Here we read only 8051 family. Instructions are common
for all the family members and they are following the common architecture. They will differ in some interfacing
devices only. Various microcontrollers of 8051 family are 8051, 8052, 8031 etc.

Features of 8051 microcontroller

1. 8- bit CPU for process control.

2. Extensive Boolean operation.
3. 64 kB program memory addresses space.
4. 64 kB data memory addresses space.
5. 4 kB on chip ROM (for 8051 only).
6. 128 byte on chip RAM.
7. Four bit addressable I/O ports, each has 8 I/O lines.
8. Two 16 bit timers/counters.
9. 6 interrupt sources (5 vectors spaced) with two priority levels.
10. One full duplex UART for serial communication.
11. On chip oscillator circuit.
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Architecture of 8051 microcontroller

EXTERNAL INTERRUPTS

INTERRUPT ON CHIP ON CHIP TIMER 0 COUNTERS

CONTROL ROM RAM TIMER 1 INPUTS
4KB 128 B

8 BIT
PROCESSOR
CPU

OSC BUS 4 I/O SERIAL

CIRCUIT CONTROLLER PORTS COM PORT

P0 P1 P2 P3 TX RX

Pin diagram of 8051 microcontroller

MICROCONTROLLER 8051 Page |4

VCC (PIN 40): Supply voltage (5v dc supply).

GND (PIN 20): Ground.

PORT 0 (PIN 39-32): 8 bit bi-directional and bit addressable I/O port. Lower order address and data bus (AD0
–AD7).

PORT 1 (PIN 1-8): 8 bit quasi-bi-directional and bit addressable I/O port. Quasi-bi-directional port due to the
fact that port 1 pins are internally pulled high with fixed pull up resister. On reset, port 1 is configured as an
input port.

PORT 2 (PIN 21-28): 8 bit quasi-bi-directional and bit addressable I/O port. Port 2 is multiplexed with higher
order address bus (A8-A15).

PORT 3 (PIN 10-17): 8 bit quasi-bi-directional and bit addressable I/O port. Pins are pulled high internally
using pull up resister. Port3 has the additional function of providing some extremely important signals such as
interrupts.

P3.0 (PIN 10): RXD – serial input

P3.1 (PIN 11): TXD – serial output

P3.2 (PIN 12): INT0 – external interrupt 0

P3.3 (PIN 13): INT1 – external interrupt 1

P3.4 (PIN 14): T0 – Timer/counter0 external input

P3.5 (PIN 15): T1 – Timer/counter1 external input

P3.6 (PIN 16): WR – External data memory write strobe

P3.7 (PIN 17): RD – External data memory read strobe

RST (PIN 9): For resetting the device the reset pin of 8051 is made high for at least two machine cycles (24
period of oscillation). Generally we run the microcontroller in power on reset (POR) mode.

VCC

40
10µF

8.2kΏ
MICROCONTROLLER 8051 Page |5

A 10µF capacitor and 8.2kΏ resistance is sufficient to provide high state for two machine cycles. We can also
manually reset the device by providing high state at the reset pin.

XTAL2 and XTAL1 (PIN 18, 19): In 8051 family we use an external crystal for oscillator circuit. The crystal
is connected between the pins XTAL1 and XTAL2. The frequency of oscillation of the crystal is 11.0592 MHz
two capacitors of 30 pF are connected to the crystal to trigger the crystal for starting oscillation.

30 pF 8051

18

19

20

1 T state = 1/ crystal frequency = 1/ 11.0592 µs

1 M/C = 12 T state = 12/ 11.0592 µs = 1.085 µs

ALE (PIN 30): Address latch enable is an active high pin use to access the external data memory and program
memory.

EA (PIN 31): External access pin is an active low pin. It also uses to access the external program memory.
When we access the internal program memory the pin is connected to the VCC. The pin must be connected to
ground when access the external program memory.

PSEN (PIN 29): The program strobe enable pin is active low. It is responsible for the physical separation of
program memory and data memory. When the pin is high then we can access the 64kB data memory and when
it is low then we can access the 64kB program memory.
MICROCONTROLLER 8051 Page |6

Memory of 8051 microcontroller

There are two separate program and data memories. The program codes are typically stored at
ROM/EPROM. Since the address bus is 16 bit the maximum ROM could be 64 KB (216). But there are only
4kB on chip ROM in 8051. In data memory we can store data. Internal data memory available in 8051 is 128B
only. Whereas the RAM could be of 64kB+128B.

IC ROM RAM

internal external internal external

8051 4kB 60kB 128B 64kB

8031 0 64kB 128B 64kB

Internal memory

Internal ROM: The 8051 microcontroller has only 4 KB on chip ROM. The program is stored in ROM, that’s
why it is called program memory. But if the program size exceeds 4KB memory, then external memory is
needed.

Internal RAM: Internal RAM address is 8 bit wide. Hence we can have maximum 256 bytes memory. But out
of which 128 bytes internal RAM. For 8051 µc we have 128 internal RAM locations (00 to 7F). These internal
RAM addresses can be access by both direct and indirect addressing.

The upper portions 80 to FF are not provided for MCS 51 family. Some µc of MCS 52 family may have used
these upper portions by indirect addressing. In both cases of 8051 and 8052 family the address of SFR (special
function resisters) area is 80 to FF. But in case of 8052 the upper half of RAM also used by indirect addressing.
But SFR area always access by direct addressing mode. Hence by different addressing mode the upper portion
of memory and SFR area can be distinguished.

FF

FOR 8052 ONLY SFR AERA

ACCESS BY INDIRECT ACCESS BY DIRECT

ADDRESSING MODE ADDRESSING MODE

80
7F

128 BYTE RAM

ACCESS BY BOTH
DIRECT AND INDIRECT
ADDRESSING MODE

00
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Details of internal RAM (00h to 7Fh): Internal RAM consists of three parts;

i) Resister bank (00h to 1Fh)

ii) Bit addressable area (20h to 2Fh)

iii) Scratch pad (30h to 7Fh)

Resister bank: 00h to1Fh these 32 bytes memory is divided into four resister bank and each resister bank has
eight resisters (R0 to R7).

Resister bank Address Resisters

Bank 0 00h to 07h R0 to R7

Bank 1 08h to 0Fh R0 to R7

Bank 2 10h to 17h R0 to R7

Bank 3 18h to 1Fh R0 to R7

By default the resisters of bank 0 are selected. Other resister banks are can be selected by the help of program
status word (PSW) resister. The R0 and R1 resisters of bank 0 can be used as memory pointer.

Example: MOV R0, # 50H ; load 50h in resister R0

MOV a, @ R0 ; copy the content of 50h in accumulator

Bit addressable area: the address location 20h to2Fh (16 byte) each of eight bit long and each bit location have
individual addresses, i.e., they are bit addressable.

Byte adds. Bit address

20 00 01 02 03 04 05 06 07

21 08 09 0A 0B 0C 0D 0E 0F

22 10 11 12 13 14 15 16 17

2F 78 79 7A 7B 7C 7D 7E 7F

These bits are individually accessible as well as these 16 bytes memory of RAM (20h to 2Fh) also be address by
byte. This area generally use extensively for Boolean processing, e.g. These can be used as flags.
Instructions: SET B 09h ; 09h bit address is set to be 1

CLR 09h ; 09h bit address is set to be 0

MICROCONTROLLER 8051 Page |8

Scratch pad: 30h to 7Fh these 80 bytes data memory are byte addressable and used for storage data. It is also
known as user area. This user area is byte addressable.

7F

SCRATCH PAD AREA

OR

USER AREA

30

28 BIT ADDRESSABLE AREA 2F

20 27

18 19 1A 1B 1C 1D 1E 1F BANK 3

10 11 12 13 14 15 16 17 BANK 2

08 09 0A 0B 0C 0D 0E 0F BANK 1

00 01 02 03 04 05 06 07 BANK 0
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SFR (special function resister) area: 128 bytes memory reserved for SFR area. The address locations of SFR
area are 80h to FFh. These special function resisters are can be access by direct addressing mode only. These
special function resisters are used for control operations and show the status of various operations done by µc.
All special function resisters are directly addressable and can be read and written. Some special function
resisters (only resisters in 1st column) are bit addressable.

F8 FF

F0 B F7

E8 EF

E0 A E7

D8 DF

D0 PSW D7

C8 CF

C0 C7

B8 IP BF

B0 P3 B7

A8 IE AF

A0 P2 A7

98 SCON SBUF 9F

90 P1 97

88 TCON TMOD TLO TL1 TH0 TH1 8F

80 P0 SP DPL DPH PCON 87

SFR description

SFR Address Bit/byte Function

addressable

B (resister) F0h Bit addressable Use as a normal resister and special use for
multiplication and division operation.

Instruction: MUL AB ;(multiplication of content A &

B. lower byte of result store in A and higher byte in B)

DIV AB ;(content of A divided by content

of B. quotient store in A and remainder store in B)
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SFR Address Bit/byte Function

addressable

A (accumulator) E0h Bit addressable Similar to µp Acc. is used for any arithmetic and
logic operations.

PSW (program status D0h Bit addressable Used as flag resister.

word)

IP (interrupt priority ) B8h Bit addressable Using this resister we can change the priority
level of interrupt.

P3 (port 3) B0h Bit addressable Used as an I/O port.

IE (interrupt enable) A8h Bit addressable Using this resister we can enable or disable any
interrupt.

P2 (port 2) A0h Bit addressable Used as an I/O port.

SCON (serial control) 98h Bit addressable Used in asynchronous serial communication.

SBUF (serial buffer) 99h Byte addressable Used in asynchronous serial communication.

P1 (port 1) 90h Bit addressable Used as an I/O port.

TCON (timer control) 88h Bit addressable Timer/ counter control

TMOD (timer mode) 89h Byte addressable Timer/ counter mode selection.

TL0/TH0 (T/C 0 lower 8Ah,8Ch Byte addressable Timer 0 lower and higher byte.
and higher byte)

TL1/TH1 (T/C 1 lower 8Bh,8Dh Byte addressable Timer 0 lower and higher byte.
and higher byte)

P0 (port 0) 80h Bit addressable Used as an I/O port.

SP (stack pointer) 81h Byte addressable Stack pointer store the return address for call
instruction.

DPTR (data pointer) 82h,83h Byte addressable The only 16 bit resister in microcontroller. It can
be use d as a pointer of 16 bit memory address.
DPL (data pointer low)

DPH (data pointer high)

PCON (power control) 87h Byte addressable Used for power control in µc.
MICROCONTROLLER 8051 P a g e | 11

PSW (program status word)

D7 D6 D5 D4 D3 D2 D1 D0

C AC F0 RS1 RS0 OV - P

C: Carry flag
AC: Auxiliary carry
F0: General purpose flag. User can set or reset it. It is not affected by operation.
RS1, RS0: These two bits are used for resister bank selection.
OV: Over flow flag. This flag is used for signed operation. It is used to detect the error in sign operation.
P: Parity bit. P =1 for odd parity and P=0 for even parity.

Bank selection
RS1 RS0 Bank

0 0 Bank 0

0 1 Bank 1

1 0 Bank 2

1 1 Bank 3

On reset the content of PSW is 00h. So both RS0, RS1 are zero and by default bank 0 is selected on reset.

PCON (power control)

D7 D6 D5 D4 D3 D2 D1 D0

SMOD - - - GF1 GF0 PD IDL

SMOD: BAUD rate double bit. Speed of data transfer in serial communication is defined by BAUD rate. The
unit of BAUD rate is bps (bits per second).

GF X: General purpose flag.

PD: Power down mode. If PD=1, then the µc will be in power down mode. In power down mode CPU and the
peripherals will be in inactive status. So in this mode least amount of power consumed.

IDL: Idle mode of operation. If IDL=1, then the µc will be in idle mode. In idle mode CPU will be in inactive
status but peripherals will be in active status. Since CPU is idle it will consume less power. From idle mode
CPU will be active by interrupt.
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Timers and counters

There are two timers/ counters in microcontroller 8051, timer0 and timer1. Each timer is of 16 bit. Both
timers and counters count the clock pulses in digital system. Now the question coming to everyone mind that,
what is the different between timer and counter? If the source of clock pulse is internal to the µc then the mode
of counting is called timer. If the source of clock pulse is external to the µc then the mode of counting is called
counter. There are six special function resisters (SFR’s) used in timer and counter mode of operation.

TMOD (timer mode selection)

D7 D6 D5 D4 D3 D2 D1 D0

GATE C/T M1 M0 GATE C/T M1 M0

TIMER 1 TIMER 0

GATE: Gate control. If GATE =1, T/C x will run when INT x and TR x is high. If GATE =0, T/C x will run
when TR x bit of TCON resister is high.

C / T: Timer/ counter selector. If the bit is 1 then counter mode of operation is done and if the bit is 0 then timer
mode of operation is done.

M1: Mode selection bit 1.

M0: Mode selection bit 0.

M1 M0 Mode Operation

0 0 Mode 0 13 bit timer/counter

0 1 Mode 1 16 bit timer/counter

1 0 Mode 2 8 bit auto reload mode

1 1 Mode 3 Split timer mode

TCON (timer control)

D7 D6 D5 D4 D3 D2 D1 D0

TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0

TF X: Timer X (=0/1) overflow flag bit. This bit is set by hardware when timer x overflows and clear by
hardware when processor vectors the interrupt service routine.

TR X: Timer X run control bit. This bit can be set by software to run the timer x and clear by software to stop
the timer x.
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IE X: External interrupt edge detected flag. Set by CPU when the external interrupt edge (high to low
transition) is detected and cleared by CPU when the interrupt sub routine is processed.

IT X: External interrupt type control bit. This bit can be set or clear by software. When IT x =1, then IE x is set
at the falling edge of INT x and when IT x =0, then IE x is set at the low level of INT x.

Falling edge Rising edge

Timer/ Counter control logic

Xtal
÷ 12 C/T= 0 (timer mode)
frequency

TL 0/1 TH 0/1

T0/1 C/T = 1 (Counter mode)

TF 0/1
TR 0/1

GATE
INT 0/1

When C/ T = 0 then it operates in timer mode and then it counts the internal clocks. Then the frequency of
internal clock (frequency of machine cycle) = (crystal frequency ÷12).

f = 12MHz

f = 1 MHz

M/C

When C/ T = 1 then it operates in counter mode and then it counts the external clocks in T0/1 pin. When GATE
= 0, then the output of OR gate is always 1 and then timer x run only when TR x bit is set. When gate =1, then
timer x will run when both TR x bit and INT x are set.
MICROCONTROLLER 8051 P a g e | 14

Timer modes

Mode 0: Mode 0 is also known as 13 bit timer mode. In this mode lower 5 bit of TLX (D 0 to D4) and THX is
used. THX will be increased after each and every 32 bit of count. This 32 is known as pre-scale value of 13 bit
timer mode.

D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0

× × ×
THX TLX

Xtal ÷ 12 TLx (D0 – D4) THx (D0 – D7) TFx

frequency

TRx

Mode 1: Mode 1 is also known as 16 bit timer mode. In this mode all 8 bits of TLX and THX are used. For
each and every 256 no of clock pulses THX will be increase by 1. The timer flag bit TFX is set with the next
clock after count FFFFh. So 256 is the pre-scale value of 16 bit timer mode.

D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0

THX TLX

By default on reset the content of TL and TH resister is 00h. Then the timer counts from 0000h to FFFFh and
over flow with the next clock and timer flag (TF) is set. Here the count value is maximum 216. We can count
any desire value by loading offset value in TL and TH resister. This is used to produce a fixed delay.

Delay = ( FFFFh – offset value +1)×12T

–
MICROCONTROLLER 8051 P a g e | 15

Problem: Find out the content of resisters TL0 and TH0 for producing 1ms delay using the timer0 in 16 bit
counter mode. Given that the frequency of the crystal is 12 MHz.

Answer: crystal frequency (f) = 12 MHz

1clock = 12 T state = 12/f = 1 µs
Hence for 1 ms delay we need 1000 clocks
Again (1000)10 = (03E8)16
So, FFFFh – offset value + 1 = 03E8h
Offset value = FFFFh -03E8h +1 = FC18h
So the content of TL0 = 18h and the content of TH0 = 0FCh.
Programming part: MOV TMOD, #01h ; Select timer 0, mode 1
MOV TL0, #18h ;
Load the offset value
MOV TH0, #0FCh ;
SETB TR0 ; Start timer

Mode 2: Mode 2 is also known as 8 bit auto reload mode. When a timer is in mode 2 TH x holds the offset
value and TL x is the timer itself. TL x starts counting from just after the offset value. When reaches to FFh and
with next clock timer flag (TF x) bit is set and TL x reload with the offset value from TH x, instead off resetting
to 00h.

Xtal
÷ 12
frequency TL x TF x

TR x Reload
TH x
–
Delay

Problem: We want a delay of 100 µs by using mode 2 and crystal of frequency 12 MHz, what will be the offset value?

Answer: We know in mode 2,

–
Delay =

100×10 -6 =

Offset value = (256 – 100)10 = (156)10 = 9Ch

MICROCONTROLLER 8051 P a g e | 16

Programming part: MOV TMOD, #02h ; Select timer 0, mode 2

MOV TH0, #9Ch ; Load the offset value

SETB TR0 ; Start timer

Mode 3: This mode is also known as mix mode or 8 bit split timer mode. When timer0 is placed in mode 3, it
becomes two separate 8 bit timers. Then TL0 is timer 0and TH0 is timer 1. When TL0 is over flow, then TF0 is
set and when TH0 over flow then TF1 is set.

Interrupts

We already discuss that 8051 µc has 6 interrupt sources with two priority levels. These interrupt sources are;

i) External hardware interrupt0 (INT0).

ii) Timer0 interrupt (TF0).

iii) External hardware interrupt1 (INT1).

iv) Timer1 interrupt (TF1).

v) Serial transmits (TI).

vi) Serial receives (RI).

For every interrupt, there must be an interrupt service routine (ISR). When a interrupt is invoked, the µc run the
interrupt service routine. There are fixed locations which hold the addresses of ISR. These locations are known
as vector location. There are 6 interrupts, but 5 interrupt service routines due to common ISR for serial
interrupts.

interrupts Vector location

External hardware interrupt0 (INT0) 0003h

Timer0 interrupt (TF0) 000Bh

External hardware interrupt1 (INT1) 0013h

Timer1 interrupt (TF1) 001Bh

Serial COM interrupts (TI, RI) 0023h

IE (interrupt enable)

D7 D6 D5 D4 D3 D2 D1 D0

EA - - ES ETI EX1 ET0 EX0

EA: When EA= 0, disable all interrupts, no interrupt is acknowledged. When EA = 1, each interrupt is
individually enable/disable by setting or clearing the enable bit.

ES: Serial communication interrupt enable bit. When ES = 1, serial interrupt enable only when EA = 1.
MICROCONTROLLER 8051 P a g e | 17

ET1: Enable or disable timer1 overflow interrupt.

EX1: Enable or disable external interrupt1.

ET0: Enable or disable timer0 overflow interrupt.

EX0: Enable or disable external interrupt0.

IP (interrupt priority)

When the 8051 is power up, then the default priority is set.

Highest to lowest priority:1st : External interrupt0

2nd : Timer interrupt0

3rd : External interrupt1

4th : Timer interrupt1

Last: Serial interrupt

We can change the priority level with the help of the resister IP.

D7 D6 D5 D4 D3 D2 D1 D0

- - - PS PTI PX1 PT0 PX0

PS: Serial interrupt priority bit.

PT1: Timer1 interrupt priority bit.

PX1: External interrupt1 priority bit.

PT0: Timer0 interrupt priority bit.

PX0: External interrupt0 priority bit.

MICROCONTROLLER 8051 P a g e | 18

Serial communication

Serial communication uses a single data line instead of the 8 bit data line of parallel combination. For
serial data communication to work the byte of data must be converted to serial bits using a parallel in serial out
shift resister; then it can be transmitted over a single data line. This also means that in receiving end there must
be a serial in parallel out shift resister to receive the serial data and peak them into a byte.

Serial data communication uses two methods, asynchronous and synchronous communication. The
8051 µc chip has a built in full duplex UART (universal asynchronous receiver transmitter). The 8051 has two
pins TxD and RxD for transferring and receiving data serially.

What do you mean by full duplex?

Simplex:
Transmitter Receiver

Half-duplex:

Transmitter Transmitter

Receiver Receiver

Full-duplex:
Transmitter Receiver

Receiver Transmitter

Data framing: In asynchronous serial communication transfer a single byte at a time, while a block of data
transfer in synchronous mode.

In the asynchronous method, each character is placed between start and stop bits. This is called framing. The
data frame may be 9/10/11 bits long. But here our point of interest on 10 bits frame. The data, such as ASCII
characters, are packed between a start bit (always 0) and a stop bit (always 1).For example, the frame of ASCII
code of ‘E’ is:

ASCII code of ‘E’= 45h =01000101

ASCII
stop start
0 1 0 0 0 1 0 1
bit bit
MICROCONTROLLER 8051 P a g e | 19

SCON (serial control)

D7 D6 D5 D4 D3 D2 D1 D0

SM0 SM1 SM2 REN TB8 RB8 TI RI

SM0: Serial port mode bit 0.

SM1: Serial port mode bit 1.

SM2: Used for multiprocessor communication. (Make it 0)

REN: set/ clear by software to enable/ disable reception.

TB8: not used.

RB8: not used.

TI: transmit interrupt flag. Set by hardware at the beginning of the stop bit in mode 1.It must be cleared by
software. When TI is high it indicates that it is ready to transfer another byte.

RI: Receive interrupt flag. Set by hardware halfway through the stop bit time in mode 1. It must be cleared by
software. When RI bit is high it indicates that a byte has been received and picked up before it is lost.

SM0 SM1 Mode

0 0 Mode 0, shift resister mode with fixed BAUD rate fosc/12

0 1 Mode 1, 10 bits frame (8 bit data, 1start and 1stop), with variable BAUD rate using
timer 1 overflow rate in 8 bit auto reload mode.

1 0 Mode 2, 9 bit UART, with fixed BAUD fosc/32 or fosc/16.

1 1 Mode 3, 9bit UART with variable BAUD rate using timer 1 overflow rate in 8 bit
auto reload mode.

SBUF (serial buffer)

SBUF is an 8 bit resister used for serial communication in the 8051. For a byte of data to be transferred
via the TxD line, it must be placed in the SBUF resister and it also holds the data when it is received by RxD
line.

BAUD rate
MICROCONTROLLER 8051 P a g e | 20

Instruction set:

Modes of addressing: 1) register

2) direct

3) immediate

4) indirect
MICROCONTROLLER 8051 P a g e | 21

8051 ASSEMBLY LANGUAGE PROGRAMMING

Assembly language means the program written using mnemonics. The steps to create an executable
assembly language program are outlined as follows:

EDITOR
PROGRAM

Myfile.asm

ASSEMBLER
PROGRAM

Myfile.1st
Myfile.obj
Myfile.obj Other obj files

LINKER
PROGRAM

Myfile.abs

OH
PROGRAM

Myfile.hex

This Hex file burn in ROM to load the program in microcontroller IC.