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FET Transistors
When , there is a
voltage drop along the length of the
channel, and the depletion regions
are no longer parallel, but are
closer together towards the drain,
Figure 120. As vDS is increased,
they will touch (pinch-off) towards
the drain, and the drain current iD
can increase no longer. At the
threshold of pinch-off, vGS-vDS=Vp.
As vDS is further increased, iD
remains constant, and the JFET is
in its current saturation region, the
normal mode of operation. (This
constant current region is a
characteristic feature of any
transistor, FET or BJT.) The JFETS are high input impedance
channel shape remains unchanged, devices, and so (due to the
with a small region of touch near reverse bias pn junctions).
the drain, and further increases in
vDS occurs across this small MOSFET transistors have metal
region. gates which are insulated from the
semiconductor by a layer of SiO2 or
Figure: n-channel JFET other dielectric. In enhancement
type MOSFETs, the application of
structure for a gate voltage activates the channel
showing non-parallel depletion (by inducing a layer of carriers
regions. between source and drain under
the gate, Figure 121). In depletion
type MOSFETs, there is a small
strip of semiconductor of the same
type as that of the source and
drain, and the gate voltage can
either reduce (by depleting
carriers) or increase (by increasing
carriers) the channel current
(Figure 122). In an n channel
MOSFET, the conducting channel
exists in a p type substrate.
Figure 121: n-
channel E FET
structure.
Transconductance curve of
enhancement MOSFET is shown
below
ID =[(VGS -VGS(TH)) /
(VGS(ON)- VGS(TH))] ×
ID(ON)