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Sequential Switching Hybrid Single-

carrier Sinusoidal Modulation for
Cascaded Multi-level Inverter
a b
C. Govindaraju & K. Baskaran
a
Department of Electrical and Electronics Engineering , Government
College of Engineering , Salem, India
b
Department of Computer Science and Engineering , Government
College of Technology , Coimbatore, India
Published online: 19 Feb 2011.

To cite this article: C. Govindaraju & K. Baskaran (2011) Sequential Switching Hybrid Single-carrier
Sinusoidal Modulation for Cascaded Multi-level Inverter, Electric Power Components and Systems,
39:4, 303-316, DOI: 10.1080/15325008.2010.528531

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 Electric Power Components and Systems, 39:303–316, 2011
Copyright © Taylor & Francis Group, LLC
ISSN: 1532-5008 print/1532-5016 online
DOI: 10.1080/15325008.2010.528531

Sequential Switching Hybrid Single-carrier

Sinusoidal Modulation for Cascaded
Multi-level Inverter

C. GOVINDARAJU 1 and K. BASKARAN 2

1
Department of Electrical and Electronics Engineering, Government College of
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Engineering, Salem, India

2
Department of Computer Science and Engineering, Government College of
Technology, Coimbatore, India

Abstract This article presents a generalized hybrid single-carrier sinusoidal mod-

ulation control for cascaded multi-level inverters. This scheme combines the features
of fundamental frequency modulation and single-carrier sinusoidal modulation strate-
gies. The main characteristic of this modulation is the reduction of switching losses
with better harmonic performance. A sequential switching scheme is embedded in
this hybrid modulation to overcome differential heating among the power devices.
Single-carrier sinusoidal modulation and its base modulation design are implemented
on a TMS320F2407 digital signal processor. A complex programmable logic device
realizes a hybrid pulse width modulation algorithm, and it is integrated with a
digital signal processor for hybrid single-carrier sinusoidal modulation generation.
The feasibility of this hybrid modulation is verified by spectral analysis, power loss
analysis, simulation and experimental results.

Keywords cascaded multi-level inverter, digital signal processor, hybrid modulation,

power loss analysis, single-carrier sinusoidal modulation, weighted total harmonic
distortion

1. Introduction
A multi-level inverter is an effective solution for increasing power and reducing harmonics
of AC waveforms. A multi-level inverter has four main advantages over the conventional
bipolar inverter. First, the voltage stress on each switch is decreased due to the series
connection of the switches. Therefore, the rated voltage and consequently the total
power of the inverter could be safely increased. Second, the rate of change of voltage
(dv=dt) is decreased due to the lower voltage swing of each switching cycle. Third,
harmonic distortion is reduced due to more output levels. Fourth, lower acoustic noise
and electromagnetic interference is obtained [1]. Various multi-level inverter structures are
reported in the literature, and the cascaded multi-level inverter appears to be superior to
other multi-level inverters in applications at a high power rating due to its modular nature

Received 3 February 2010; accepted 15 July 2010.

Address correspondence to Professor C. Govindaraju, Department of Electrical and Electronics
Engineering, Government College of Engineering, Salem, 636 011, India. E-mail: govindcraju@
rediffmail.com

303
 304 C. Govindaraju and K. Baskaran

of modulation, control and protection requirements of each full bridge inverter [2]. The
cascaded multi-level inverter is a series connection of single-phase full-bridge inverters
with separate DC sources. Each inverter module can generate three different voltage
outputs: CV, 0, and V. The resulting phase voltage is synthesized by the addition of
voltages generated by the inverter modules. The power circuit for a five-level cascaded
inverter topology, shown in Figure 1, is used to examine the proposed modulation
technique.
Modulation control of any type of multi-level inverter is quite challenging, and much
of the reported research is based on somewhat heuristic investigations. Switching losses in
high-power converters represent an issue, and any switching transitions that can be elim-
inated without compromising the harmonic content of the final waveform are considered
advantages [3]. Most of the modulation methods developed for multi-level inverters is
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based on multiple-carrier arrangements with pulse width modulation (PWM). The carriers
can be arranged with vertical shifts (phase disposition, phase opposition disposition, and
alternative phase opposition disposition PWM) or with horizontal displacements (phase-
shifted carrier PWM) [4]. Space-vector modulation is also extended for the multi-level
inverter operation [5]. These high-frequency methods produce high-frequency stepped
voltage waveforms that are easily filtered by the load and, therefore, present very good
reference tracking and low current harmonic distortion. However, this is also the reason
for high switching losses, which is undesirable in high-power applications. As a result,
low-frequency methods have been presented.
Multi-level space vector control reduces the switching losses but has a variable
magnitude error for the fundamental component [6]. Selective harmonic elimination is
also extended for multi-level inverters [7]. Nevertheless, off-line calculations are nec-

Figure 1. Schematic diagram of the inverter topology used to verify the proposed hybrid SC-
SPWM technique.
 Hybrid Single-carrier Modulation 305

essary, making dynamic operation and closed-loop implementation not straightforward.

In addition, selective harmonic elimination becomes unfeasible with the increase of the
number of levels since it is directly related to the number of angles and, hence, equations
that need to be solved. None of the literature has reported on a hybrid single-carrier
sinusoidal modulation (SC-SPWM) technique for power loss reduction in a cascaded
multi-level inverter.
This article addresses the issue to reduce the switching loss of a conventional single-
carrier sinusoidal PWM scheme with low computational overhead. The architecture for a
complex programmable logic device (CPLD) implementation with only logical elements
is presented, adopting a hybrid PWM control algorithm. Although only the five-level
case is presented here, the proposed method can be equally applied to any number of
voltage levels and for any number of switching transitions.
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The article is organized in the following way. Section 2 briefly describes the SC-
SPWM suitable for a cascaded multi-level inverter. The proposed hybrid SC-SPWM is
discussed in detail in Section 3. Section 4 presents the harmonics and power loss analysis
of a cascaded multi-level inverter with this proposed modulation. Section 5 illustrates the
simulation and experimental verification of hybrid SC-SPWM, including a discussion on
the results. Finally, some conclusions are presented in Section 6.

2. Multi-level SC-SPWM Scheme

A five-level single-carrier sinusoidal PWM is a result of two sinusoidal modulating signals
with a fundamental frequency fo , amplitude of Am , and one carrier signal [8]. The carrier
signal is a train of triangular waveforms with a frequency of fc and an amplitude of Ac .
The number of full bridge inverter cells (K) depends on the number of levels (N ) required
and can be defined as K D .N 1/=2. The N -level SC-SPWM needs K modulation
signals that have the same frequency fo and amplitude Am with a DC bias of Ac . The
Am
modulation index is defined as M D KA c
. The modulation frequency ratio mf is given
as mf D ffoc p.u.
An intersection between the modulation signals and the carrier signal defines the
switching instant of the PWM pulses. In order to ensure quarter-wave symmetry of PWM
output waveform, the starting point of the modulation signals ought to be phase-shifted
by one period of the carrier wave. The main advantage with SC-SPWM is to define
the location of switching transitions that control or eliminate the selected harmonics [9].
This PWM technique is aimed at high-power voltage source inverter systems in utility
applications, and the output frequency is fixed to the utility’s grid frequency. Moreover,
the modulation index range does not change significantly and remains within a region of
0.7 to 1.

3. Proposed Hybrid SC-SPWM

The principle of the proposed modulation is to mix fundamental frequency PWM and
SC-SPWM for each inverter module operation, and therefore, the output contains the
features of fundamental frequency PWM and SC-SPWM. In this hybrid modulation,
the four switches of each inverter module are operated at two different frequencies: two
being commutated at fundamental frequency, while the other two switches are pulse
width modulated at SC-SPWM. Unfortunately, this arrangement causes the problem of
different power losses and, therefore, differential heating among the switches. In order
 306 C. Govindaraju and K. Baskaran
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Figure 2. Scheme of five-level hybrid SC-SPWM.

to overcome this problem, a sequential switching scheme is embedded in this hybrid

modulation. Figure 2 shows the general structure of the proposed hybrid SC-SPWM
method. It consists of the base modulator and hybrid PWM controller to generate new
modulation pulses.

3.1. Base PWM Generator

In this modulation strategy, three base PWM signals are required for each module
operation in a cascaded multi-level inverter. A sequential signal (A) is a square wave
signal with 50% duty ratio, and it has half of the fundamental frequency. This signal
makes every power switch operating at SC-SPWM and fundamental frequency PWM
sequentially to equalize the power losses among the switches. Fundamental frequency
PWM (B) is a square wave signal synchronized with a modulation waveform: B D 1
during the positive half-cycle of the modulation signal and B D 0 during the negative
half-cycle.
An SC-SPWM signal is obtained by the comparison of the rectified modulation wave-
form of each module with the carrier waveform. The amplitude of the modulation
waveform is defined as Am D KMAc , where Ac is the amplitude of the carrier and
M is the modulation index. An SC-SPWM pulse for Inverter I (C ) is obtained by the
comparison between the rectified modulation waveform and the carrier signal, while
the SC-SPWM pulse for Inverter II (D) is obtained by the comparison between the
rectified modulation waveform with a bias of Ac and the carrier waveform. The base
modulation signals (A, B, C , and D) are shown in Figure 3.
The mathematical model of the N -level SC-SPWM is required for on-line digital
implementation. It is derived from the point of intersection between the single carrier
 Hybrid Single-carrier Modulation 307
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Figure 3. Hybrid single-carrier sinusoidal PWM pulse pattern for five-level inverter.

and the sampled modulation signals. The modulation signals can be described as
 

S1 .t/ D Am sin !t C ; (1)
mf
 

S2 .t/ D Am sin !t C Ac ; (2)
mf
2
where the angular frequency is ! D mf . The straight-line equation for the carrier wave
can be expressed as

C.t/ D 2Ac fc t C hAc ; h D 1; 2; 3; : : : : (3)

A generalized equation to generate the i th SC-SPWM pulses for a cascaded inverter of

any level N is given by
  
1 Am 
˛u .i / D .2i C u 2/ sin !.i 1/ C ; (4)
2fc Ac mf

where i represents a position of each of the modulated pulses (i D 1; 2; 3; : : : ; mf =2), and

u D 1; 2; : : : ; K represents the full-bridge inverter that is being referenced. A sequential
 308 C. Govindaraju and K. Baskaran

switching signal and fundamental frequency PWM signals are the same for each phase
of the inverter operation.

3.2. Hybrid PWM Controller

The hybrid PWM controller is designed by using simple combinational logic and the
functions of the combinational logic for a five-level hybrid SC-SPWM operation are
expressed as

S1 D ABC C AB S10 D ABD C AB

S 2 D ABC C AB S 20 D ABD C AB
and ; (5)
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S 3 D ABC C AB S 30 D ABD C AB
S 4 D ABC C AB S 40 D ABD C AB

where A is a sequential signal, B is a fundamental frequency PWM, C is an SC-SPWM

for Inverter I, and D is SC-SPWM for Inverter II.
In Figure 3, it is shown that each gate signal is composed of both fundamental
frequency PWM and SC-SPWM pulses. If sequential switching signals A D 1 then S1,
S 2, S10, and S 20 are operated with SC-SPWM, while S 3, S 4, S 30 , and S 40 are operated
at fundamental frequency PWM. If sequential switching signal A D 0 then S1, S 2, S10,
and S 20 are operated at fundamental frequency PWM, while S 3, S 4, S 30 , and S 40 are
operated with SC-SPWM. Since A is a sequential signal, the average switching frequency
among the four switches is equalized. Voltage stress and current stress of power switches
in each inverter bridge is inherently equalized with this modulation.
For completeness, the generalized formulation of a combinational logic that suits for
any inverter level is given by

Su1 D ABZ C AB; Su2 D ABZ C AB;

(6)
Su3 D ABZ C AB; Su4 D ABZ C AB;

where Z is SC-SPWM for the Kth full-bridge inverter is being referenced.

An independent hybrid PWM controller is used to mix a sequential switching signal,
the fundamental frequency PWM, and its corresponding SC-SPWM for developing hybrid
SC-SPWM in the Kth inverter cell. Similarly, hybrid SC-SPWM pulses are developed
for all inverter modules of a cascaded inverter. A total of 4K gate pulses per phase are
developed to operate an N level cascaded multi-level inverter.

4. Performance Analysis

4.1. Spectral Analysis of Output Voltage Waveform

The quality of the output voltage waveforms from hybrid SC-SPWM is evaluated based
on the performance indexes, namely total harmonic distortion (THD) and weighted THD
(WTHD). The THD of a signal is the ratio of the sum of the powers of all harmonic
frequencies above the fundamental frequency to the power of the fundamental frequency
[10]. The THD is calculated using Eq. (7) and plotted in Figure 4 and up to the 50th order
 Hybrid Single-carrier Modulation 309
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Figure 4. THD comparsion of hybrid SC-SPWM with SPWM for five-level inverter operation.

of harmonics is taken into account. The low-pass filter and the nature of the highly
inductive load will take care of the higher order of harmonics. It is found that the proposed
PWM offers a lower THD when compared to the conventional one. Furthermore, it is
noticed that the higher the value of the modulation index (M ), the lower the value of the
THD. This is also true for an increased frequency ratio:
v
u 50
uX
t Vn2
nD2
THD D  100: (7)
V1
The WTHD is superior to THD as a figure of merit for a non-sinusoidal inverter
waveform in which the lower portion of the frequency spectrum is weighted heavily,
accurately portraying the expected harmonic current of an inductive load [11]. The WTHD
uses a spectral weighting factor, and it is calculated using Eq. (8) and plotted in Figure 5.
As expected, the WTHD values are lower when the modulation index is closer to unity
and when the carrier frequency increases:
v
u 50  2
uX Vn
t
nD2
n
WTHD D : (8)
V1
In a linear modulation range (0:5 < M < 1), the RMS value of the significant
harmonic (23rd) to a fundamental component is within 12% and even less in over-
modulation (M > 1) for frequency ratio of 30. But the lower order harmonics (third,
fifth, and seventh) are present under 3% of a fundamental value in over modulation
operation.
 310 C. Govindaraju and K. Baskaran
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Figure 5. WTHD comparsion of hybrid SC-SPWM with SPWM for five-level inverter operation.

4.2. Power Loss Analysis

A MATLAB-Simulink (The MathWorks, Natick, Massachusetts, USA) model of a five-
level inverter has been developed to study the power loss. Only conduction and switching
losses are considered for analysis in this article. The carrier frequency fc is 1.5 kHz,
and each converter cell is connected to 200-V DC supply. The insulated-gate bipolar
transistors (IGBTs) selected are FF150R12KT3G (Infineon, California, USA), in which
their maximum ratings are a forward current of 150 A and a direct voltage of 600 V.
The semiconductor power losses can be estimated from the curves (Vsat ./  Il .// and
.E./  Il .//, presented in the datasheet of each device, where Vsat is the on-state
saturation voltage (Vce ./ for the IGBT and VF ./ for the diode); E./ represents the
energy losses in one commutation (Eon ./ if it is a turn-on commutation, Eoff ./ if it
is a turn-off commutation, and Er ec ./ if it is a diode reverse recovery process). The
mathematical models obtained for the IGBT module FF150R12KT3G are given by

Vce D 1:15e 0:0026Il. / 0:6654e 0:044Il . /

; (9)

VF D 1:2e 0:002Il. / 0:7258e 0:0475Il . /

; (10)
0:000412Il . / 0:00736Il . /
Er ec D 0:01806e 0:0157e ; (11)

Eon D 0:0051e 0:0064Il . / 0:0037e 0:00811Il . /

; (12)

Eoff D 0:0643e 0:00121Il. / 0:0647e 0:00107Il . /

; (13)

Il ./ D M  Imax sin. '/; (14)

where Il ./ is the load current, M is the modulation index, and ' is the load displacement
angle.
 Hybrid Single-carrier Modulation 311

Switching losses are generated during the turn-on and turn-off switching processes
of the power devices [12]. The switching loss for every power device (Psw ) is obtained
separately by identifying every turn-on and turn-off instants during one reference period
using Eq. (15). Then the total sum gives switching loss Psw_T ;
1 X
Psw D .Eon C Eoff C Er ec / (15)
T
where Eon is the turn-on energy loss per commutation, Eoff is the turn-off energy loss
per commutation and Er ec is the energy loss during reverse recovery process.
The conduction power losses are those that occur while the semiconductor device is
conducting current. The calculation of conduction losses for each semiconductor of the
inverter are given by
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Z 2
1
Pcond_IGBT D Vce ./  Il ./  Vcmd ./d; (16)
2 0
Z 2
1
Pcond_D D VF ./  Il ./  Vcmd ./d; (17)
2 0
where Vcmd ./ is the PWM signal of the IGBT.
The sum of conduction losses for all IGBTs (Pcond_IGBT_T ) and for all diodes
(Pcond_D_T / is computed to obtain the total conduction losses:

Pcond_T D Pcond_IGBT_T C Pcond_D_T ; (18)

PTotal D Pcond_T C Psw_T : (19)

Figure 6(a) shows, for the full range of modulation indexes and relative angles
of the output currents, the ratio of the power losses for a five-level inverter with the
modulation strategy proposed in this article versus the conventional SC-SPWM technique.
It is noted that the surface is always below one, which means that the power losses are

(a) (b)

Figure 6. (a) Ratio of the power losses of hybrid SC-SPWM- and conventional SC-SPWM-fed
five-level cascaded inverters; (b) power loss comparision at M D 0:8.
 312 C. Govindaraju and K. Baskaran

significantly smaller for the proposed method. The mean value of the surface is found to
be approximately 0.7152, which means that the power loss reduction is about 28.5%. The
best case is produced for a unity power factor and a modulation index of one. Under these
conditions, the power loss savings is about 31%. The power loss measurements are also
taken for two classic multi-level PWM schemes (phase disposition modulation and SC-
SPWM), and the proposed hybrid PWM and its comparison are shown in Figure 6(b). In a
practical high-power system, reducing the power losses becomes important for improving
the efficiency of the system.

5. Results and Discussion

5.1. Simulation Results

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In order to verify that the proposed PWM can be practically implemented in a cascaded
inverter, simulations were performed by using MATLAB/Simulink software. It also helps
to confirm the PWM switching strategy, which can be implemented in a digital signal
processor (DSP) and a CPLD. The load resistance and inductance are 10  and 15 mH,
and the DC bus voltage is set at 200 V. The frequency of modulated wave and carrier
wave are 50 Hz and 1500 Hz respectively.
First, the inverter is operated with conventional SC-SPWM in the linear modulation
range (M D 0:8) and the corresponding voltage waveform with fast Fourier transform
(FFT) analysis, as shown in Figure 7. The theory of SC-SPWM states that the first
significant harmonics will be centered on the 30-p.u. frequency (for a carrier frequency
of 1500 Hz), as shown in Figure 7. The sidebands are also present; these include the 23rd,
25th, and 29th harmonics as well as the 31st, 35th, and 37th harmonics. This implies
that the most significant sideband harmonic present in the output due to the SC-SPWM
switching is the 23rd. In a linear modulation range (0:5 < M < 1), the number of
switching transitions occur in two converter cells almost equally, whereas the switching
transitions distribution is unequal in over-modulation (M > 1) and also contains lower-
order harmonics in the phase waveform.

Figure 7. Simulation results of line-to-neutral output voltage waveform with its spectrum for
conventional SC-SPWM operation in a linear modulation range.
 Hybrid Single-carrier Modulation 313
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Figure 8. Simulation results of line-to-neutral output voltage waveform with its spectrum for
hybrid SC-SPWM operation in a linear modulation range.

The output voltage with its spectrum from the proposed modulation is shown in
Figure 8. It can be seen that all of the lower-order harmonics are absent, and the
fundamental is controlled at the predefined value. It is interesting to note that the next
significant harmonic will be the 49th. The significant harmonics are the 49th, 53rd,
59th, and 61st, which are all high frequency with their RMS values under 9% of the
fundamental term. This inverter operates with an odd-frequency ratio and produces even-
side band harmonics, and for an even-frequency ratio, gets odd sideband harmonics.
Furthermore, harmonics at the carrier and the multiples of carrier frequency do not exist
at all.

5.2. Experimental Results

To verify the validity of the proposed hybrid modulation, a five-level inverter was
designed to implement this scheme. The functional block diagram of digital controller
implementation is shown in Figure 9. The inverter is made with eight IGBT switches with
internal anti-parallel diodes. The TMS320F2407 DSP (Texas Instruments, Texas, USA)
is chosen for base PWM generation (fundamental frequency PWM, sequential signal and
SC-SPWM), as it has dedicated PWM units that utilize high-speed counters/timers with
accompanying compare registers.
The proposed hybrid modulation algorithm is implemented using a Xilinx CPLD
(XC95108 IC, San Jose, California, USA). The CPLD controller combines fundamental
frequency PWM, sequential signal and SC-SPWM to generate hybrid SC-SPWM pulses.
The XC95108 IC is used to develop the control algorithm which is suited for this
application with its features of a better response for high-frequency input signals, a
narrow pulse width pulses and no jitter of the delay in the circuit. A switching dead time
of 1 s is introduced using CPLD hardware. The optically coupled isolators MCT2E
(FAIRCHILD Semiconductor, South Portland, Maine, USA) are used to provide an
electrical isolation between the Xilinx CPLD controller board and the power circuit.
Four high-voltage high-speed IGBT drivers (IR2112, International Rectifier, El Segundo,
California, USA) are used to provide proper and conditioned gate signals to the power
switches. A digital real time oscilloscope (Tektronix TPS2024, Beaverton, Oregon, USA)
 314 C. Govindaraju and K. Baskaran
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Figure 9. Functional block diagram of five-level hybrid SC-SPWM implementation.

is used to display and capture the output waveforms, and with the feature of FFT, the
spectrum of the output voltage is obtained for different operating points, as discussed
hereafter. First, conventional SC-SPWM technique was implemented to control the con-
verter. Figure 10 illustrates the implementation of the line-to-neutral output waveform
and its harmonic spectrum of conventional SC-SPWM, where a good agreement with
simulation results.

Figure 10. Line-to-neutral output voltage waveform and its spectrum for SC-SPWM operation in
a linear modulation range.
 Hybrid Single-carrier Modulation 315
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Figure 11. Line-to-neutral output voltage waveform and its spectrum for hybrid SC-SPWM oper-
ation in a linear modulation range.

Specifically, Figure 11 shows the line-to-neutral voltage waveform of the proposed

five-level hybrid SC-SPWM for a standard modulation range with its associated spectrum.
It is confirmed that the harmonic cancellation up to sidebands around 2fc is achieved in
the voltage waveform, and the first significant harmonic is the 49th, as predicted. It is
confirmed that the proposed modulation offers better harmonic performance.

5.3. SC-SPWM and Proposed Hybrid SC-SPWM: A Comparison

In this article, both techniques are analyzed and studied. The proposed hybrid SC-
SPWM is easier in the sense of practical implementation, as the switching transitions are
directly controlled by the comparison of signals, which can easily be varied to control
the modulation index. Compared to conventional SC-SPWM, the proposed modulation
technique offers significant benefits. The first benefit is a power loss savings of about
28.5% for the same carrier frequency operation. Another feature is the high bandwidth
of the converter that is considerably increased (about two times) for the same switching
transitions. It is shown that the next significant harmonic that appears in the output voltage
for the linear modulation range is the 49th, compared to the 23rd in the case of SC-SPWM.
If the over-modulation is desired for both techniques, low-order harmonics are introduced.
This was resolved in PWM systems with the introduction of the third harmonic into
the reference signal to increase the gain before the bandwidth deteriorates. The base
SC-SPWM that provides switching pulses for hybrid modulation are mathematically
calculated in order to eliminate the maximum number of possible harmonics from the
spectrum. In conclusion, the hybrid SC-SPWM approach in a multi-level system is a
beneficial method, and it feasible for practical implementation.

6. Conclusion
This article has presented a hybrid SC-SPWM for the cascaded multi-level inverter.
This modulation is based on a combination of fundamental frequency PWM and SC-
SPWM. The proposed modulation strategy is focused on minimizing power losses, and
 316 C. Govindaraju and K. Baskaran

it improves harmonic performance in the converter with the same physical structure.
Compared to conventional carrier based multi-level PWM schemes, fewer commuta-
tions are obtained while achieving the same fundamental voltage tracking, supporting
the proposed technique as very attractive for improving the overall efficiency of the
inverter. The combinational logic based hybrid modulation controller is compact and
easily realized with the CPLD. An efficient sequential switching technique embedded
with this hybrid modulation avoids the problem of unbalanced voltage stress, current
stress, and heating among the power devices. It is shown that the harmonic performance
of the proposed hybrid SC-SPWM strategy is better compared to its classic sinusoidal
PWM in the entire range of the modulation index. This technique can easily extend to
higher inverter levels, and implementation is possible with existing cascaded inverter
structures. Analysis, simulations, and experimental results are presented to demonstrate
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the superiority of the proposed system.

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