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Experiment # 01
Experiment # 02
Experiment # 03
Experiment # 04
Objective: Discover the Q point of JFET fix and self bias circuits
Experiment # 05
Objective: Find the effect Q-point of JFET voltage divider bias network
Experiment # 06
Experiment # 07
Experiment # 08
Objective: Realize the circuit using JFET for low and high frequency.
Experiment # 09
Objective:
Experiment # 10
Objective: Realize the buffer invertor ,non-invertor and summer by using op-amps
Experiment # 12
Experiment # 13
Objective: Determine the response of active filters (low & high pass).
Lab No 11 Realize the Buffer, Inverter, Non-inverter and
summer by using op-amp.
Learning Objectives: At the end of this lab student will be able to know
Apparatus
Power supply
Oscilloscope
Capacitors
LM741
Multimeter
Resistors
Connecting Wires
Procedure:
Assemble the circuit according to circuit diagram given in figure 9.1.2.3 and 4. Connects
the input signal VS, the input signal source should be sine wave with 1 kHz frequency, 1-2 V P-P
and amplitude. Use the oscilloscope to observe the input and output signal an the voltage gain.
Apparatus
Power supply
Oscilloscope
Capacitors
Multimeter
Resistors
Connecting Wires
Procedure:
Connect the circuit as shown in figure10.1 and 10.2. Check the behavior of low pass and
draw its waveform on the graph paper.
Connect the circuit as shown in figure10.1 and 10.2. Check the behavior of high pass and
draw its waveform on the graph paper.
Apparatus
Power supply
Oscilloscope
Two bipolar junction transistor (NPN, PNP)
Multimeter
Resistors
Connecting Wires
Procedure:
Connect the circuit as shown in figure 12.0. Using complementary transistor it I possible
to obtain full cycle across a load using half cycle operation for each transistor. Whereas a single
input signal is applied to the base of both transistors being of opposite type will conduct on
opposite half cycle of input. The NPN transistor will be biased into conduction by the positive
half cycle of signal across the load. During the negative half cycle of signal, the PNP transistor is
biased into conduction.
During a complete cycle of the input a complete cycle of output signal is developed across the
load. Two short coming from this circuit are (a) two separate DC power supplies are required, (b)
cross over distortion, the fact that during the signal cross-over from positive to negative (vice
versa) there is some non linearity in the output. The circuit diagram given in figure 12.0
Figure 10.0 Class B push pull amplifier
Apparatus
Power supply
Oscilloscope
FET (N channel)
Multimeter
Resistors
Connecting Wires
Connect the circuit as shown in figure. Apart of output signal (V O) is obtained using a
feed-back network resistor R1 and R2. The feedback voltage VF is connected in series with th
source signal VS their difference being the input signal VI.
A=VO/VI=-gMRL
Beta=VF/VO = -R2/R1+R2
Using the values of A and B above, we find the gain with negative feedback to be.
AF=A/1+BA= - gMRL/1+[R2R1/R1+R2]gM
If BA>>1. We have
-AF=1/β = -R1+R2/R2