VN770K

Quad smart power solid state relay

for complete H-bridge configurations

Features

Type RDS(on) IOUT VCC

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VN770K 220 m(1) 9 A(2) 36 V
1. Total resistance of one side in bridge configuration
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2. Typical current limitation value
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SO-28
■

■
Suited as low voltage bridge

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■
Linear current limitation
Very low standby power dissipation
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This device is suitable to drive a DC motor in a
■ Short circuit protected
o
bridge configuration as well as to be used as a
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quad switch for any low voltage application.
■ Status flag diagnostic (open drain)
b
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The dual high side switches have built-in thermal
■ Integrated clamping circuits shutdown to protect the chips from over
■ Undervoltage protection
s ) temperature and current limiter blocks to protect

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■ ESD protection the device from short circuit. Status output is

Description u c provided to indicate open load in off and on-state

and over temperature.

d
ro
The low side switches are two OMNIFET II types
The VN770K is a device formed by three (fully auto protected Power MOSFET in

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monolithic chips housed in a standard SO-28 VIPower™ technology). They have built-in

et
package: a double high side and two low side thermal shutdown, linear current limitation and
switches. Both the double high side and low side

o l
switches are made using STMicroelectronics
overvoltage clamping. Fault feedback for thermal
intervention can be detected by monitoring the
s
VIPower™ M0-3 Technology. voltage at the input pin.

Ob
Table 1. Device summary
Order codes
Package
Tube Tape and reel

SO-28 VN770K VN770K13TR

September 2013 Doc ID 8711 Rev 5 1/33

www.st.com 1
Contents VN770K

Contents

1 Block diagrams and pins descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . 6

2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.2 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3 Electrical characteristics for dual high side switch . . . . . . . . . . . . . . . . . . . 9

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2.4 Electrical characteristics for low side switches . . . . . . . . . . . . . . . . . . . . 11

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2.5
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Dual high-side switch timing data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

d
2.6
o
Electrical characterization for dual high side switch . . . . . . . . . . . . . . . . . 16
r
2.7
P
Electrical characterization for low side switches . . . . . . . . . . . . . . . . . . . . 19

e
3
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Application recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

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4
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Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
O
4.1
-
SO-28 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

)
4.2
state mode 27
t ( s
Thermal calculation in clockwise and anti-clockwise operation in steady

4.2.1
u c
Thermal resistances definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
4.2.2
o d Thermal calculation in transient mode . . . . . . . . . . . . . . . . . . . . . . . . . 27

P r 4.2.3 Single pulse thermal impedance definition . . . . . . . . . . . . . . . . . . . . . . 27

e te 4.2.4 Pulse calculation formula . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

5
o l Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Obs 5.1
5.2
SO-28 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
SO-28 tube shipment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
5.3 Tape and reel shipment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

2/33 Doc ID 8711 Rev 5

 VN770K List of tables

List of tables

Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Table 2. Pin definition and function. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 3. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 4. Dual high side switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 5. Low side switch. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 6. Power outputs (per each channel) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 7. Switching (per each channel) (VCC= 13V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 8. Logic input (per each channel) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 9.
)
Status pin (per each channel) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
s
t(
Table 10. Protections (per each channel) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 11.
Table 12.
u c
Openload detection (per each channel) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 13.
d
On-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
o
Table 14.
Table 15.
P r
Dynamic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Switching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 16.
Table 17. t e
Source drain diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 18.
le
Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
o
Table 19.
Table 20.
b s
Thermal calculation in clockwise and anti-clockwise operation in steady state mode . . . . 27
Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Table 21.
Table 22.
- O
SO-28 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

( s )
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Doc ID 8711 Rev 5 3/33

 List of figures VN770K

List of figures

Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Figure 2. Connection diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 3. Switching time waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 4. Open-load status timing (with external pull-up) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 5. Over temperature status timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 6. Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 7. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 8. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 9.
)
Input high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
s
t(
Figure 10. Input low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 11.
Figure 12.
u c
Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 13.
o d
ILIM vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 14.
Figure 15.
P r
Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 16.
Figure 17. t e
On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
On-state resistance vs VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 18.
le
Status leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
o
Figure 19.
Figure 20.
b s
Status low output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Openload on-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 21.
Figure 22.
- O
Openload off-state voltage detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Status clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 23.
Figure 24.
( s )
Static drain source on resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Derating curve . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 25.
c t
Transconductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 26.
Figure 27.
d u
Transfer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Turn-on current slope (Vin=5V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 28.
r o
Turn-on current slope (Vin=3.5V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 29.
Figure 30.
e P
Input voltage vs input charge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Capacitance variations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 31.
l
Figure 32. e t
Switching time resistive load (Vin=5V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Switching time resistive load (Rg=10Ohm) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

s o
Figure 33. Output characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

O b
Figure 34.
Figure 35.
Figure 36.
Step response current limit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Source drain diode forward characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Static drian source on resistance vs Id . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 37. Static drain source on resistance vs input voltage (Id=7A) . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 38. Static drain source on resistance vs input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 39. Normalized input threshold voltage vs temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 40. Normalized on resistance vs temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 41. Turn-off drain source voltage slope (Vin=3.5V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 42. Turn-off drain source voltage slope (Vin=5V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 43. Current limit vs junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 44. Application diagram bridge drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 45. Recommended motor operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 46. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 47. SO-28 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 48. Chipset configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

4/33 Doc ID 8711 Rev 5

 VN770K List of figures

Figure 49. Auto and mutual Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . 26
Figure 50. SO-28 HSD thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . 28
Figure 51. SO-28 LSD thermal impedance junction ambient single pulse. . . . . . . . . . . . . . . . . . . . . . 28
Figure 52. Thermal fitting model of an H-bridge in SO-28 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 53. SO-28 package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 54. Tube dimensions (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Figure 55. Tape and reel dimensions (suffix “13TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

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O

Doc ID 8711 Rev 5 5/33

 Block diagrams and pins descriptions VN770K

1 Block diagrams and pins descriptions

Figure 1. Block diagram

s )
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d u
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e P
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s o
O b
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t ( s
u c
o d
P r
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6/33 Doc ID 8711 Rev 5

 VN770K Block diagrams and pins descriptions

Table 2. Pin definition and function

No Name Function

1, 3, 25, 28 DRAIN 3 Drain of switch 3 (low-side switch)

2 INPUT 3 Input of switch 3 (low-side switch)
4, 11 N.C. Not connected
Drain of switches 1 and 2 (high-side switches) and power
5, 10, 19, 24 VCC
supply voltage
6 GND Ground of switches 1 and 2 (high-side switches)
7 INPUT 1 Input of switch 1 (high-side switches)

s )
t(
8 DIAGNOSTIC Diagnostic of switches 1 and 2 (high-side switches)
9 INPUT 2 Input of switch 2 (high-side switch)

u c
12, 14, 15, 18 DRAIN 4 Drain of switch 4 (low-side switch)

o d
13
16, 17
INPUT 4
SOURCE 4 P r
Input of switch 4 (low-side switch)
Source of switch 4 (low-side switch)
20, 21 SOURCE 2
t e
Source of switch 2 (high-side switch)
22, 23 SOURCE 1
o le
Source of switch 1 (high-side switch)
26, 27 SOURCE 3
b s
Source of switch 3 (low-side switch)

Figure 2. Connection diagram

- O
( s )
c t
d u
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Doc ID 8711 Rev 5 7/33

 Electrical specifications VN770K

2 Electrical specifications

2.1 Thermal data

Table 3. Thermal data
Value Max
Symbol Parameter
(°C/W)

Rthj-case Thermal resistance junction-case (high side switch) 20

Rthj-case Thermal resistance junction-case (low side switch) 20
cm2
s )
t(
Rthj-amb Thermal resistance junction-ambient (with 6 of Cu heat sink) See Figure 49

u c
2.2 Absolute maximum ratings
o d
Table 4. Dual high side switch
P r
Symbol Parameter
t e Value Unit

le
so
VCC DC supply voltage 41 V
-VCC
-IGND
Reverse DC supply voltage
DC reverse ground pin current
O b -0.3
-200
V
mA
IOUT DC output current
) - Internally limited A
-IOUT
( s
Reverse DC output current
t
-6 A
IIN
u c
DC input current ±10 mA

od
ISTAT DC status current ±10 mA

P r Electrostatic discharge (human body model:

R = 1.5K; C = 100pF)

e t e
VESD
– Input 4000 V

o l – Status
– Output
4000
5000
V
V

b s – VCC 5000 V

O Ptot
Tj
Power dissipation (TC =25°C)
Junction operating temperature
6
Internally limited
W
°C
Tc Case operating temperature -40 to 150 °C
Tstg Storage temperature -55 to 150 °C

Table 5. Low side switch

Symbol Parameter Value Unit

VDS Drain source voltage (VIN = 0V) Internally clamped V

VIN Input voltage Internally clamped V
IIN Input current ±20 mA

8/33 Doc ID 8711 Rev 5

VN770K Electrical specifications

Table 5. Low side switch (continued)

Symbol Parameter Value Unit

RIN MIN Minimum input series impedance 150 

ID Drain current Internally limited A
IR Reverse DC output current -10.5 A
VESD1 Electrostatic discharge (R = 1.5K, C = 100pF) 4000 V

Electrostatic discharge on output pin only (human

VESD2 5000 V
body model: R = 330, C = 150pF)

Ptot
Tj
Power dissipation (TC = 25°C)
Operating junction temperature
6
Internally limited
( s )
W
°C
Tc Case operating temperature Internally limited
c t °C

u
od
Tstg Storage temperature -55 to 150 °C

P r
2.3
e
Electrical characteristics for dual high side switch
t
le
8V < VCC< 36V; -40°C < Tj < 150°C, unless otherwise specified.
o
Table 6.
b s
Power outputs (per each channel)
Symbol Parameter

- O Test conditions Min Typ Max Unit

VCC(1)
s )
Operating supply
5.5 13 36 V

t(
voltage

VUSD(1)
u c
Undervoltage
shutdown
3 4 5.5 V

o d Overvoltage
VOV(1)

P r shutdown
36 - - V

et eRON
On-state
resistance
IOUT =1A; Tj =25°C
IOUT =1A; VCC >8V
- -
160
320
m
m

o l Off-state; VCC = 13V; VIN =VOUT =0V 12 40 µA

s Off-state; VCC = 13V; VIN =VOUT =0V;

Ob
IS(1) Supply current -
Tj =25°C 12 25 µA
On-state; VCC = 13V; VIN = 5V; IOUT =0V 5 7 mA
Off-state output
IL(off1) VIN =VOUT =0V 0 - 50 µA
current
Off-state output
IL(off2) VIN =0V; VOUT =3.5V -75 - 0 µA
current
Off-state output
IL(off3) VIN =VOUT =0V; VCC = 13V; Tj = 125°C - - 5 µA
current
Off-state output
IL(off4) VIN =VOUT =0V; VCC = 13V; Tj = 25°C - - 3 µA
current
1. Per device.

Doc ID 8711 Rev 5 9/33

 Electrical specifications VN770K

Table 7. Switching (per each channel) (VCC= 13V)

Symbol Parameter Test conditions Min Typ Max Unit

RL =13 from VIN rising edge

td(on) Turn-on delay time - 30 - µs
to VOUT =1.3V
RL =13 from VIN falling edge
td(off) Turn-off delay time - 30 - µs
to VOUT = 11.7V
Turn-on voltage RL =13 from VOUT = 1.3V to (1)
dVOUT/dt(on) - - V/µs
slope VOUT = 10.4V
Turn-off voltage RL =13 from VOUT = 11.7V to (1)
dVOUT/dt(off) - - V/µs
slope VOUT =1.3V

s )
t(
1. See relative diagram

Table 8. Logic input (per each channel)

u c
d
Symbol Parameter Test conditions
ro
Min Typ Max Unit

eP
VIL Input low level - - 1.25 V

IIL Low level input current VIN = 1.25V

l e t 1 - - µA

o
bs
VIH Input high level 3.25 - - V

-O
IIH High level input current VIN = 3.25V - - 10 µA

VI(hyst)
Input hysteresis
voltage
( s ) 0.5 - - V

c t IIN = 1mA 6.8 8 V

VICL

d u
Input clamp voltage
IIN = -1mA
6
-0.7 V

r o
eP
Table 9. Status pin (per each channel)

l e t
Symbol Parameter

Status low output

Test conditions Min Typ Max Unit

s o VSTAT
voltage
ISTAT = 1.6 mA - - 0.5 V

O b ILSTAT Status leakage current Normal operation; VSTAT = 5V - - 10 µA

Status pin input

CSTAT Normal operation; VSTAT = 5V - - 100 pF
capacitance
ISTAT = 1mA 6.8 8 V
VSCL Status clamp voltage 6
ISTAT = -1mA -0.7 V

Table 10. Protections (per each channel)

Symbol Parameter Test conditions Min Typ Max Unit

TTSD Shutdown temperature 150 175 200 °C

TR Reset temperature 135 - - °C

10/33 Doc ID 8711 Rev 5

VN770K Electrical specifications

Table 10. Protections (per each channel) (continued)

Symbol Parameter Test conditions Min Typ Max Unit

Thyst Thermal hysteresis 7 15 - °C

Status delay in
tSDL Tj >TTSD - - 20 µs
overload conditions
7 10 13 A
Ilim Current limitation Tj = 125°C 8 13 A
5.5V < VCC <36V 13 A

Turn-off output clamp

Vdemag IOUT =1A; L=6mH VCC-41 VCC-48 VCC-55 V
voltage

s )
Note:
c
To ensure long term reliability under heavy overload or short circuit conditions, protection t(
d u
and related diagnostic signals must be used together with a proper software strategy. If the

of activation cycles.
r o
device is subjected to abnormal conditions, this software must limit the duration and number

e P
Table 11.
Symbol
Openload detection (per each channel)
Parameter
le
Test conditions
t Min Typ Max Unit

Openload on-state
s o
IOL
detection threshold
VIN = 5V

O b 20 40 80 mA

tDOL(on)
Openload on-state
detection delay
) -
IOUT = 0A - - 200 µs

t
Openload off-state
( s
VOL

u
threshold c
voltage detection VIN = 0V 1.5 2.5 3.5 V

o d
Openload detection

Pr
tDOL(off) - - 1000 µs
delay at turn-off

t e
2.4
o le
Electrical characteristics for low side switches

b s -40°C < Tj < 150°C, unless otherwise specified.

O Table 12.
Symbol
Off-state
Parameter Test conditions Min Typ Max Unit

Drain source clamp

VCLAMP VIN =0V; ID = 3.5A 40 45 55 V
voltage
Drain source clamp
VCLTH VIN =0V; ID =2mA 36 - - V
threshold voltage
Input threshold
VINTH VDS =VIN; ID =1mA 0.5 - 2.5 V
voltage
Supply current from
IISS VDS =0V; VIN = 5V - 100 150 µA
input pin

Doc ID 8711 Rev 5 11/33

Electrical specifications VN770K

Table 12. Off-state (continued)

Symbol Parameter Test conditions Min Typ Max Unit

Input-source clamp IIN =1mA 6 6.8 8

VINCL V
voltage IIN =-1mA -1.0 -0.3
Zero input voltage VDS = 13V; VIN =0V; Tj =25°C 30
IDSS drain current - - µA
VDS = 25V; VIN =0V 75
(VIN =0V)

Table 13. On-state

Symbol Parameter Test conditions Min Typ Max
s ) Unit

Static drain source on VIN =5V; ID =3.5A; Tj = 25°C

t(
60

uc
RDS(on) - - m
resistance VIN =5V; ID =3.5A 120

o d
Tj = 25°C, unless otherwise specified.
P r
Table 14. Dynamic

et e
ol
Symbol Parameter Test conditions Min Typ Max Unit

bs
Forward trans
gfs(1) VDD =13V; ID =3.5A - 9 - S
conductance

-O
COSS Output capacitance VDS = 13V; f = 1 MHz; VIN = 0V - 220 - pF

)
1. Pulsed: Pulse duration = 300µs, duty cycle 1.5%

s
Table 15.
c
Switching t(
Symbol
d u
Parameter Test conditions Min Typ Max Unit

td(on)
r o
Turn-on delay time - 100 300 ns

e tr PRise time VDD =15V; ID =3.5A - 470 1500 ns

l e t td(off) Turn-off delay time Vgen =5V; Rgen = RIN MIN =150 - 500 1500 ns

s o tf Fall time - 350 1000 ns

Ob
td(on) Turn-on delay time - 0.75 2.3 µs
tr Rise time VDD =15V; ID =3.5A - 4.6 14 µs
td(off) Turn-off delay time Vgen =5V; Rgen =2.2K - 5.4 16 µs
tf Fall time - 3.6 11 µs

VDD =15V; ID =3.5A Vgen =5V;

(dI/dt)on Turn-on current slope - 6.5 - A/µs
Rgen = RIN MIN =150

VDD =12V; ID =3.5A; VIN =5V

Qi Total input charge - 18 - nC
Igen = 2.13mA

12/33 Doc ID 8711 Rev 5

VN770K Electrical specifications

Table 16. Source drain diode

Symbol Parameter Test conditions Min Typ Max Unit

VSD(1) Forward on voltage ISD =3.5A; VIN =0V - 0.8 - V

trr Reverse recovery time - 220 - ns

Reverse recovery ISD = 3.5A; dI/dt = 20A/µs

Qrr - 0.28 - µC
charge VDD = 30V; L = 200µH
Reverse recovery
IRRM - 2.5 - A
current
1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5%

s )
-40°C < Tj < 150°C, unless otherwise specified.
c t(
Table 17. Protections
d u
r o
Symbol Parameter Test conditions

e PMin Typ Max Unit

Ilim Drain current limit

VIN =5V; VDS =13V

l e t
VIN =5V; VDS =13V; Tj =125°C
6
6.5
9 12
12
A
A

tdlim
Step response current
s o
VIN =5V; VDS = 13V - 4 - µs

Tjsh
limit
Over temperature
O b 150 175 - °C
shutdown

) -
Tjrs
Over temperature
reset
t( s 135 - - °C

Igf
uc
Fault sink current VIN = 5V; VDS =13V; Tj =Tjsh - 15 - mA

od Starting Tj =25°C; VDD = 24V

Pr
Single pulse
Eas VIN =5V; Rgen = RIN MIN =150; 200 - - mJ
avalanche energy
L=24mH

t e
o le
b s
O

Doc ID 8711 Rev 5 13/33

Electrical specifications VN770K

2.5 Dual high-side switch timing data

Figure 3. Switching time waveforms

s )
c t(
d u
r o
e P
le t
Table 18. Truth table
s o
Conditions Input
b Output Status

Normal operation

) -O
L
H
L
H
H
H

t( s L L H
Current limitation

u c H
H
X
X
(Tj < TTSD) H
(Tj > TTSD) L
d
ro
Over temperature

P
L
H
L
L
H
L

et e
Undervoltage
L
H
L
L
X
X

o l L L H
s Overvoltage

Ob
H L H
L H L
Output voltage > VOL
H H H
L L H
Output current < IOL
H H L

14/33 Doc ID 8711 Rev 5

 VN770K Electrical specifications

Figure 4. Open-load status timing (with external pull-up)

s )
c t(
d u
Figure 5. Over temperature status timing r o
e P
le t
s o
O b
) -
t ( s
u c
o d
P r
e t e
o l
b s
O

Doc ID 8711 Rev 5 15/33

Electrical specifications VN770K

2.6 Electrical characterization for dual high side switch

Figure 6. Off-state output current Figure 7. Input clamp voltage

s )
c t(
d u
r o
e P
Figure 8. High level input current Figure 9.
t
Input high level voltage

le
s o
O b
) -
t ( s
uc
o d
P r
e te
o l
bs
Figure 10. Input low level voltage Figure 11. Input hysteresis voltage

16/33 Doc ID 8711 Rev 5

 VN770K Electrical specifications

Figure 12. Overvoltage shutdown Figure 13. ILIM vs Tcase

s )
c t(
d u
r o
Figure 14. Turn-on voltage slope
P
Figure 15. Turn-off voltage slope

e
le t
s o
O b
) -
t ( s
u c
o d
P r
e t e
o l
Figure 16. On-state resistance vs Tcase Figure 17. On-state resistance vs VCC

b s
O

Doc ID 8711 Rev 5 17/33

 Electrical specifications VN770K

Figure 18. Status leakage current Figure 19. Status low output voltage

s )
c t(
d u
r o
Figure 20. Openload on-state detection
threshold P
Figure 21. Openload off-state voltage
detection threshold
e
le t
s o
O b
) -
t ( s
uc
o d
P r
e te
o l
Figure 22. Status clamp voltage

b s
O

18/33 Doc ID 8711 Rev 5

VN770K Electrical specifications

2.7 Electrical characterization for low side switches

Figure 23. Static drain source on resistance Figure 24. Derating curve

s )
c t(
d u
r o
e P
Figure 25. Transconductance
t
Figure 26. Transfer characteristics

le
s o
O b
) -
t ( s
u c
o d
P r
e t e
o l
Figure 27. Turn-on current slope (Vin=5V) Figure 28. Turn-on current slope (Vin=3.5V)

Obs

Doc ID 8711 Rev 5 19/33

 Electrical specifications VN770K

Figure 29. Input voltage vs input charge Figure 30. Capacitance variations

s )
c t(
d u
Figure 31. Switching time resistive load
r o
Figure 32. Switching time resistive load
(Vin=5V) (Rg=10Ohm)

e P
le t
s o
O b
) -
t ( s
uc
o d
P r
e te
o l
Figure 33. Output characteristics Figure 34. Step response current limit

b s
O

20/33 Doc ID 8711 Rev 5

 VN770K Electrical specifications

Figure 35. Source drain diode forward Figure 36. Static drian source on resistance vs
characteristics Id
v

s )
c t(
d u
r o
input voltage (Id=7A)
e P
Figure 37. Static drain source on resistance vs Figure 38. Static drain source on resistance vs
input voltage

le t
s o
O b
) -
t ( s
u c
o d
P r
e t e
o l
Figure 39. Normalized input threshold voltage Figure 40. Normalized on resistance vs

b s vs temperature temperature

Doc ID 8711 Rev 5 21/33

 Electrical specifications VN770K

Figure 41. Turn-off drain source voltage slope Figure 42. Turn-off drain source voltage slope
(Vin=3.5V) (Vin=5V)

s )
c t(
d u
r o
Figure 43. Current limit vs junction
temperature
e P
le t
s o
O b
) -
t ( s
uc
o d
P r
e te
o l
b s
O

22/33 Doc ID 8711 Rev 5

 VN770K Application recommendations

3 Application recommendations

Figure 44. Application diagram bridge drivers

s )
c t(
d u
r o
e P
le t
s o
O b
Most motor bridge drivers use a reverse battery protection diode (D) inside the supply rail.

) -
This diode prevents a reverse current flow back to VBATT in case the bridge becomes
disabled via the logic inputs while motor inductance still carries energy. In order to prevent a

( s
hazardous overvoltage at circuit supply terminal (VCC), a blocking capacitor (C) is needed to
t
u c
limit the voltage overshoot. As basic orientation, 50µF per 1A load current is recommended.
As an alternative, a Zener protection (Z) is also suitable.

o d
Even if a reverse polarity diode is not present, it is recommended to use a capacitor or

P r
Zener at VCC because a similar problem appears in case the supply terminal of the module
has intermittent electrical contact to the battery or gets disconnected while the motor is

e t e
operating.

o l
b s
O

Doc ID 8711 Rev 5 23/33

 Application recommendations VN770K

Figure 45. Recommended motor operation

s )
ct(
d u
r o
e P
le t
s o
O b
) -
t ( s
u c
o d
P r
e te
o l
b s
O

24/33 Doc ID 8711 Rev 5

 VN770K Application recommendations

Figure 46. Waveforms

s )
c t(
d u
r o
e P
le t
s o
O b
) -
t ( s
u c
o d
P r
e te
o l
b s
O

Doc ID 8711 Rev 5 25/33

Thermal data VN770K

4 Thermal data

4.1 SO-28 thermal data

Figure 47. SO-28 PC board

s )
c t(
d u
r o
Note:
P
Layout condition of Rth and Zth measurements (PCB FR4 area = 58mm x 58mm, PCB
thickness = 2mm, Cu thickness = 35µm, Copper areas: from minimum pad layout to 6cm2).
e
Figure 48. Chipset configuration
le t
s o
LOW SIDE
CHIP
RthAB

O b
HIGH SIDE
CHIP
RthAC
LOW SIDE
CHIP
channel 3
) - channel 1,2
channel 4

RthB
t ( s RthA
RthC
c
du
RthBC

r o
e P
Figure 49. Auto and mutual Rthj-amb vs PCB copper area in open box free air
condition(a)

le t
s o
Ob

a. see definitions in Section 5.2 on page 31

26/33 Doc ID 8711 Rev 5

 VN770K Thermal data

4.2 Thermal calculation in clockwise and anti-clockwise

operation in steady state mode
Table 19. Thermal calculation in clockwise and anti-clockwise operation in steady state mode
HS1 HS2 LS3 LS4 TjHS12 TjLS3 TjLS4

PdHS1 x RthHS + PdLS4 x PdHS1 x RthHSLS + PdLS4 PdHS1 x RthHSLS + PdLS4 x

On Off Off On
RthHSLS + Tamb x RthLSLS + Tamb RthLS + Tamb
PdHS2 x RthHS + PdLS3 x PdHS2 x RthHSLS + PdLS3 PdHS2 x RthHSLS + PdLS3 x
Off On On Off
RthHSLS + Tamb x RthLS + Tamb RthLSLS + Tamb

s )
4.2.1 Thermal resistances definition
c t(
Values according to the PCB heatsink area.

d u
RthHS = RthHS1 = RthHS2 = high side chip thermal resistance junction to ambient (HS1 or HS2
in on-state)
r o
P
RthLS = RthLS3 = RthLS4 = low side chip thermal resistance junction to ambient
e
le t
RthHSLS = RthHS1LS4 = RthHS2LS3 = mutual thermal resistance junction to ambient between
high side and low side chips

s o
b
RthLSLS = RthLS3LS4 = mutual thermal resistance junction to ambient between low side chips

O
4.2.2 Thermal calculation in transient mode(b)
) -
( s
TjHS12 = ZthHS x PdHS12 + ZthHSLS x (PdLS3 + PdLS4) + Tamb
t
c
TjLS3 = ZthHSLS x PdHS12 + ZthLS x PdLS3 + ZthLSLS x PdLS4 + Tamb
u
d
TjLS4 = ZthHSLS x PdHS12 + ZthLSLS x PdLS3 + ZthLS x PdLS4 + Tamb
o
4.2.3
P r
Single pulse thermal impedance definition

e t e
Values according to the PCB heatsink area.

o l ZthHS = high side chip thermal impedance junction to ambient

b s ZthLS = ZthLS3 = ZthLS4 = low side chip thermal impedance junction to ambient

O ZthHSLS = ZthHS12LS3 = ZthHS12LS4 = mutual thermal impedance junction to ambient between

high side and low side chips
ZthLSLS = ZthLS3LS4 = mutual thermal impedance junction to ambient between low side chips

4.2.4 Pulse calculation formula

Z = R +Z 1 – 
TH TH THtp
where  = tP/T

b. Calculation is valid in any dynamic operating condition. Pd values set by user.

Doc ID 8711 Rev 5 27/33

 Thermal data VN770K

Figure 50. SO-28 HSD thermal impedance junction ambient single pulse

Footprint
1 cm2
2 cm2
6 cm2
Footprint
1 cm2
2 cm2
6 cm2

s )
ct(
d u
r o
e P
le t
s o
O b
) -
Figure 51. SO-28 LSD thermal impedance junction ambient single pulse

t ( s
u c
o d
P r
e te
o l
b s
O

28/33 Doc ID 8711 Rev 5

VN770K Thermal data

Figure 52. Thermal fitting model of an H-bridge in SO-28

s )
c t(
d u
r o
e P
le t
s o
Thermal parameters(1) O b
Table 20.
Area/island (cm2)
) - Footprint 1 2 6

R1 = R6 (°C/W)
t ( s 2.6
c
du
R2 (°C/W) 3.5

ro
R12 = R17 (°C/W) 3.5

eP
R3 = R13 = R 18 (°C/W) 15.5

l e t R4 = R14 = R19 (°C/W)

R5 = R15 = R20 (°C/W)
10.5
62.28 52.28 44.28 32.28

o
bs
R7 = R8 = R9 = R10 (°C/W) 150
R11 = R16 (°C/W) 1.5
O C1 = C5 (W.s/°C) 0.00025
C2 = C7 = C11 (W.s/°C) 0.024
C3 = C8 =C 12 (W.s/°C) 0.2
C4 = C9 = C13 (W.s/°C) 1.6 1.61 1.7 3.25
C6 = C10 (W.s/°C) 0.00075
1. The blank space means that the value is the same as the previous one.

Doc ID 8711 Rev 5 29/33

Package mechanical data VN770K

5 Package mechanical data

5.1 SO-28 mechanical data

Figure 53. SO-28 package outline

s )
c t(
d u
r o
e P
le t
s o
O b
Table 21.
)
SO-28 mechanical data -
t ( s
mm inch
DIM
c
du
Min. Typ Max. Min. Typ. Max.

A
r o 2.65 0.104

e
a1 P 0.1 0.3 0.004 0.012

le t b 0.35 0.49 0.013 0.019

so
b1 0.23 0.32 0.009 0.012

Ob
C 0.5 0.020

c1 45° (typ.)

D 17.7 18.1 0.697 0.713

E 10 10.65 0.393 0.419

e 1.27 0.050

e3 16.51 0.650

F 7.4 7.6 0.291 0.299

L 0.4 1.27 0.016 0.050

S 8° (max.)

30/33 Doc ID 8711 Rev 5

 VN770K Package mechanical data

5.2 SO-28 tube shipment

Figure 54. Tube dimensions (no suffix)

s )
c t(
5.3 Tape and reel shipment
d u
r o
Figure 55. Tape and reel dimensions (suffix “13TR”)

e P
le t
s o
O b
) -
t ( s
u c
o d
P r
e te
o l
b s
O

Doc ID 8711 Rev 5 31/33

 Revision history VN770K

6 Revision history

Table 22. Document revision history

Date Revision Changes

01-Dec-2002 1 Initial release.

Added thermal characterization
30-Jun-2004 2 Revision history table added
Disclaimers updated (last page)
Document formatted into new ST template

s )
t(
Dimensions updated, see Figure 55: Tape and reel dimensions
(suffix “13TR”) on page 31
Inserted Chapter 4: Thermal data on page 26
u c
31-Aug-2006 3
d
Application diagram updated, see Figure 44: Application diagram
o
bridge drivers on page 23

P r
Updated disclaimer (last page) to include a mention about the use of

e
ST products in automotive applications
t
30-Jun-2009 4 le
Updated Table 3: Thermal data.

o
Updated note of Figure 47: SO-28 PC board.

b s
Updated Figure 48: Chipset configuration.
25-Sep-2013 5
O
Updated Disclaimer.

-
( s )
c t
d u
r o
e P
l e t
s o
O b

32/33 Doc ID 8711 Rev 5

 VN770K

s )
t(
Please Read Carefully:

u c
Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the

d
right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any

o
time, without notice.
All ST products are sold pursuant to ST’s terms and conditions of sale.
P r
t e
Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no

le
liability whatsoever relating to the choice, selection or use of the ST products and services described herein.

s o
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this
document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products

b
or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such
third party products or services or any intellectual property contained therein.

O
) -
UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED

( s
WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED

t
WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS

c
OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.

u
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Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void
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Doc ID 8711 Rev 5 33/33