Integrated Circuits

DESIGN, SIMULATION AND IMPLEMENTATION OF “T” FLIP-FLOP
BASED RIPPLE CARRY COUNTER USING VERILIG HDL
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CHAPTER 1
INTEGRATED CIRCUITS
1.1. INTRODUCTION
An integrated circuit or monolithic integrated circuit (also referred to as an IC, a chip, or
a microchip) is a set of electronic circuits on one small flat piece (or "chip")
of semiconductor material that is normally silicon. The integration of large numbers of
tiny MOS transistors into a small chip results in circuits that are orders of magnitude smaller,
faster, and less expensive than those constructed of discrete electronic components. The
IC's mass production capability, reliability, and building-block approach to circuit design has
ensured the rapid adoption of standardized ICs in place of designs using discrete transistors. ICs
are now used in virtually all electronic equipment and have revolutionized the world
of electronics. Computers, mobile phones, and other digital home appliances are now
inextricable parts of the structure of modern societies, made possible by the small size and low
cost of ICs.
Fig 1.1 An Integrated circuit
Integrated circuits were made practical by technological advancements in metal–oxide–

silicon (MOS) semiconductor device fabrication. Since their origins in the 1960s, the size, speed,
and capacity of chips have progressed enormously, driven by technical advances that fit more
and more MOS transistors on chips of the same size – a modern chip may have many billions of
MOS transistors in an area the size of a human fingernail. These advances, roughly
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following Moore's law, make computer chips of today possess millions of times the capacity and
thousands of times the speed of the computer chips of the early 1970s.
ICs have two main advantages over discrete circuits: cost and performance. Cost is low because
the chips, with all their components, are printed as a unit by photolithography rather than being
constructed one transistor at a time. Furthermore, packaged ICs use much less material than
discrete circuits. Performance is high because the IC's components switch quickly and consume
comparatively little power because of their small size and proximity. The main disadvantage of
ICs is the high cost to design them and fabricate the required photomasks. This high initial cost
means ICs are only practical when high production volumes are anticipated.
1.2. DESIGN OF ICs:
The cost of designing and developing a complex integrated circuit is quite high, normally in the
multiple tens of millions of dollars. Therefore, it only makes economic sense to produce
integrated circuit products with high production volume, so the non-recurring engineering (NRE)
costs are spread across typically millions of production units.
Modern semiconductor chips have billions of components, and are too complex to be designed
by hand. Software tools to help the designer are essential. Electronic Design Automation (EDA),
also referred to as Electronic Computer-Aided Design (ECAD), is a category of software
tools for designing electronic systems, including integrated circuits. The tools work together in
a design flow that engineers use to design and analyze entire semiconductor chips.
1.3. TYPES OF ICs:
Integrated circuits can be classified into analog, digital and mixed

signal, consisting of both analog and digital signalling on the same IC.
1. Digital ICs:
Digital integrated circuits can contain anywhere from one to billions of logic gates, flip-
flops, multiplexers, and other circuits in a few square millimeters. The small size of these
circuits allows high speed, low power dissipation, and reduced manufacturing cost compared
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with board-level integration. These digital ICs, typically microprocessors, DSPs,

and microcontrollers, work using Boolean algebra to process "one" and "zero" signals.
In the 1980s, programmable logic devices were developed. These devices contain circuits whose
logical function and connectivity can be programmed by the user, rather than being fixed by the
integrated circuit manufacturer. This allows a single chip to be programmed to implement
different LSI-type functions such as logic gates, adders and registers. Programmability comes in
at least four forms - devices that can be programmed only once, devices that can be erased and
then re-programmed using UV light, devices that can be (re)programmed using flash memory,
and field-programmable gate arrays (FPGAs) which can be programmed at any time, including
during operation. Current FPGAs can (as of 2016) implement the equivalent of millions of gates
and operate at frequencies up to 1 GHz.
Digital ICs are further sub-categorized as logic ICs (such

as microprocessors and microcontrollers), memory chips (such as MOS memory and floating-
gate memory), interface ICs (level shifters, serializer/deserializer, etc.), power management
ICs, and programmable devices.
Fig 1.2. Design of a Digital IC
2. Analog ICs:
Analog ICs, such as sensors, power management circuits, and operational amplifiers (op-amps),

work by processing continuous signals. They perform analog functions such
as amplification, active filtering, demodulation, and mixing. Analog ICs ease the burden on
circuit designers by having expertly designed analog circuits available instead of designing
and/or constructing a difficult analog circuit from scratch.
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Analog ICs are further sub-categorized as linear integrated circuits and RF circuits (radio

frequency circuits).
Fig 1.3. Design of an Analog IC
3. Mixed signal ICs:
ICs can also combine analog and digital circuits on a single chip to create functions such
as analog-to-digital converters and digital-to-analog converters. Such mixed-signal circuits offer
smaller size and lower cost, but must carefully account for signal interference. Prior to the late
1990s, radios could not be fabricated in the same low-cost CMOS processes as microprocessors.
But since 1998, a large number of radio chips have been developed using RF CMOS processes.
Examples include Intel's DECT cordless phone, or 802.11 (Wi-Fi) chips created by Atheros and
other companies. Mixed-signal integrated circuits are further sub-categorized as data
acquisition ICs (including A/D converters, D/A converters, digital potentiometers), clock/timing
ICs, switched capacitor (SC) circuits, and RF CMOS circuits.
Fig 1.4. Design of a Mixed signal IC
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4. 3-D ICs:
A three-dimensional integrated circuit (3D IC) is a MOS (metal-oxide semiconductor) integrated

circuit (IC) manufactured by stacking silicon wafers or dies and interconnecting them vertically
using, for instance, through-silicon vias (TSVs) or Cu-Cu connections, so that they behave as a
single device to achieve performance improvements at reduced power and smaller footprint than
conventional two dimensional processes. The 3D IC is one of several 3D integration schemes
that exploit the z-direction to achieve electrical performance benefits,
in microelectronics and nanoelectronics.
3D integrated circuits can be classified by their level of interconnect hierarchy at the global
(package), intermediate (bond pad) and local (transistor) level. In general, 3D integration is a
broad term that includes such technologies as 3D wafer-level packaging (3DWLP); 2.5D and 3D
interposer-based integration; 3D stacked ICs (3D-SICs), monolithic 3D ICs; 3D heterogeneous
integration; and 3D systems integration.
International organizations such as the Jisso Technology Roadmap Committee (JIC) and

the International Technology Roadmap for Semiconductors (ITRS) have worked to classify the
various 3D integration technologies to further the establishment of standards and roadmaps of
3D integration. As of the 2010s, 3D ICs are widely used for NAND flash memory in mobile
devices.
Three-dimensional integrated circuits (3D ICs) are further sub-categorized into through-silicon

via (TSV) ICs and Cu-Cu connection ICs.
Fig 1.5. Sections of a 3-D IC
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CHAPTER 2
VLSI SYSTEMS
VERY LARGE SCALE INTEGRATION (VLSI)

Very large-scale integration (VLSI) is the process of creating an integrated circuit (IC) by
combining millions of MOS transistors onto a single chip. VLSI began in the 1970s when MOS
integrated circuit chips were widely adopted, enabling
complex semiconductor and telecommunication technologies to be developed.
The microprocessor and memory chips are VLSI devices. Before the introduction of VLSI
technology, most ICs had a limited set of functions they could perform. An electronic
circuit might consist of a CPU, ROM, RAM and other glue logic. VLSI lets IC designers add all of
these into one chip.
Fig 2.1. A VLSI Integrated Circuit-die
Very large-scale integration was made possible with the wide adoption of the MOS transistor,
originally invented by Mohamed M. Atalla and Dawon Kahng at Bell Labs in 1959. Atalla first
proposed the concept of the MOS integrated circuit chip in 1960, followed by Kahng in 1961,
both noting that the MOS transistor's ease of fabrication made it useful for integrated
circuits. General Microelectronics introduced the first commercial MOS integrated circuit in
1964. In the early 1970s, MOS integrated circuit technology allowed the integration of more
than 10,000 transistors in a single chip. This paved the way for VLSI in the 1970s and 1980s,
with tens of thousands of MOS transistors on a single chip (later hundreds of thousands, then
millions, and now billions).
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The first semiconductor chips held two transistors each. Subsequent advances added more
transistors, and as a consequence, more individual functions or systems were integrated over
time. The first integrated circuits held only a few devices, perhaps as many as
ten diodes, transistors, resistors and capacitors, making it possible to fabricate one or more logic
gates on a single device. Now known retrospectively as small-scale integration (SSI),
improvements in technique led to devices with hundreds of logic gates, known as medium-scale
integration (MSI). Further improvements led to large-scale integration (LSI), i.e. systems with
at least a thousand logic gates. Current technology has moved far past this mark and
today's microprocessors have many millions of gates and billions of individual transistors.
At one time, there was an effort to name and calibrate various levels of large-scale integration
above VLSI. Terms like ultra-large-scale integration (ULSI) were used. But the huge number of
gates and transistors available on common devices has rendered such fine distinctions moot.
Terms suggesting greater than VLSI levels of integration are no longer in widespread use.
2.1. TYPES OF MODELING IN VLSI
I. Gate level modeling:

Gate level modeling is virtually the lowest level of abstraction, because the
switch level abstraction is rarely used. In general, gate level modeling is used for implementing
lowest level modules in a design like full adder, multiplexers, etc. Verilog HDL has gate
primitives for all basic gates.
They are instantiated like modules. There are two classes of gate primitives: Multiple input gate
primitives and Single input gate primitives.
Multiple input gate primitives include and, nand, or, nor, xor, and xnor. These can have multiple
inputs and a single output. They are instantiated as follows:
II. Data flow modeling:

Dataflow modeling provides a powerful way to implement a
design. Verilog allows a circuit to be designed in terms of the data flow between registers and
how a design processes data rather than instantiation of individual gates.
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III. Behavioral modeling:

Behavioral models in Verilog contain procedural statements, which control the
simulation and manipulate variables of the data types. These all statements are contained within
the procedures. The algorithm of the program is important because in this modelling the
programming is done according to the algorithm.
IV. Mixed design style modeling:

The mixed style modeling is any combination of behaviour, data flow, and
structural modeling in a single architecture body. In mixed style of modeling we could use
component instantiation statements, concurrent signal assignment statements, sequential signal
assignment statement. The most popular method to modeling large system is mixed style
containing structural plus behavioral.
2.2. VLSI DESIGN FLOW
Fig 2.2.VLSI design flow
The VLSI design cycle starts with a formal specification of a VLSI chip, follows a series of
steps, and eventually produces a packaged chip. A typical design cycle may be represented by
the flow chart shown in Figure. Our emphasis is on the physical design step of the VLSI design
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cycle. However, to gain a global perspective, we briefly outline all the steps of the VLSI design
cycle.
1. System Specification:
 The first step of any design process is to lay down the specifications of the system.
System specification is a high level representation of the system. The factors to be
considered in this process include: performance, functionality, and physical dimensions
(size of the die (chip)). The fabrication technology and design techniques are also
considered.
 The specification of a system is a compromise between market requirements, technology
and economical viability. The end results are specifications for the size, speed, power,
and functionality of the VLSI system.
2. Architectural Design:
 The basic architecture of the system is designed in this step. This includes, such decisions
as RISC (Reduced Instruction Set Computer) versus CISC (Complex Instruction Set
Computer), number of ALUs, Floating Point units, number and structure of pipelines,
and size of caches among others.
3. Behavioral or Functional Design:

 In this step, main functional units of the system are identified. This also identifies the
interconnect requirements between the units. The area, power, and other parameters of
each unit are estimated.
 The behavioral aspects of the system are considered without implementation specific
information. For example, it may specify that a multiplication is required, but exactly in
which mode such multiplication may be executed is not specified. We may use a variety
of multiplication hardware depending on the speed and word size requirements. The key
idea is to specify behaviour, in terms of input, output and timing of each unit, without
specifying its internal structure.
 The outcome of functional design is usually a timing diagram or other relationships
between units. This information leads to improvement of the overall design process and
reduction of the complexity of subsequent phases.
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4. Logic Design:
 In this step the control flow, word widths, register allocation, arithmetic operations, and
logic operations of the design that represent the functional design are derived and tested.
 This description is called Register Transfer Level (RTL) description. RTL is expressed in
a Hardware Description Language (HDL), such as VHDL or Verilog. This description
can be used in simulation and verification. It consists of Boolean constants.
5. Circuit Design:
 The purpose of circuit design is to develop a circuit representation based on the logic
design. The Boolean expressions are converted into a circuit representation by taking into
consideration the speed and power requirements of the original design. Circuit
Simulation is used to verify the correctness and timing of each component.
6. Physical Design:
 In this step the circuit representation (or netlist) is converted into a geometric
representation. This geometric representation of a circuit is called a layout. Layout is
created by converting each logic component (cells, macros, gates, transistors) into a
geometric representation (specific shapes in multiple layers), which perform the intended
logic function of the corresponding component. Connections between different
components are also expressed as geometric patterns typically lines in multiple layers.
 The exact details of the layout also depend on design rules, which are guidelines based
on the limitations of the fabrication process and the electrical properties of the fabrication
materials. Physical design is a very complex process and therefore it is usually broken
down into various sub-steps. Various verification and validation checks are performed on
the layout during physical design.
7. Fabrication:
 After layout and verification, the design is ready for fabrication. Since layout data is
typically sent to fabrication on a tape, the event of release of data is called Tape
Out. Layout data is converted (or fractured) into photo-lithographic masks, one for each
layer. Masks identify spaces on the wafer, where certain materials need to be deposited,
diffused or even removed. Silicon crystals are grown and sliced to produce wafers.
Extremely small dimensions of VLSI devices require that the wafers be polished to near
perfection. The fabrication process consists of several steps involving deposition, and
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diffusion of various materials on the wafer. During each step one mask is used. Several
dozen masks may be used to complete the fabrication process.
8. Packaging, Testing and Debugging:
 Finally, the wafer is fabricated and diced into individual chips in a fabrication facility.
Each chip is then packaged and tested to ensure that it meets all the design specifications
and that it functions properly. Chips used in Printed Circuit Boards (PCBs) are packaged
in Dual In-line Package (DIP), Pin Grid Array (PGA), Ball Grid Array (BGA), and Quad
Flat Package (QFP). Chips used in Multi-Chip Modules (MCM) are not packaged, since
MCMs use bare or naked chips.
Fig 2.3.Process of chip manufacture
2.3. MERITS OF VLSI:
1. Reduces the Size of Circuits.

2. Reduces the effective cost of the devices.
3. Increases the Operating speed of circuits
4. Requires less power than Discrete components.
5.Higher Reliability
6. Occupies a relatively smaller area.
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2.4. APPLICATIONS OF VLSI:

In today's world VLSI chips are widely used in various branches of Engineering like:
1. Computers
The emergence of VLSI technology has opened many new architectural concepts that
depart sharply from the design of conventional computer systems. The design of single-chip
computers, special-purpose chips to implement algorithms, and more intelligent computer
system modules, such as memory and I/O processors, are the basic impacts of VLSI technology
on computer system design. Using the general-purpose or special-purpose chips as basic
building blocks, very powerful but inexpensive computer systems can be designed. The low
cost of these systems enables the design of special-purpose computer systems in which the
architecture is tailored to the application. The design of special-purpose VLSI chips to
implement algorithms is illustrated by the implementation of a simple systolic priority queue.
However, the problem of complexity must be overcome to exploit the advantages of VLSI
technology. Design methodology and automated design tools are needed far more urgently than
ever in the generation of VLSI technology.
2. Medicine
VLSI devices are currently used in a wide variety of medical products ranging from
magnetic resonance imaging systems to conventional electrocardiographs to Holter monitors to
instruments for analyzing blood.
Portable ECG
The portable ECG machine was made possible largely due to progress in VLSI
design. Today’s portable ECG machines, such as the Elite (Siemens Burdick, Inc.), are fully
functional 12-lead ECG machines equal in every respect to larger machines with the exception
of paper size and mass storage capacity. A quick comparison points out the dramatic results that
can be obtained with VLSI. The VLSI in Digital Signal Processing 291 portable ECG is 15 times
smaller, 10 times lighter, and half as costly as the full size machine. It consumes 90 percent less
power and uses 60 percent fewer parts (Einspruch and Gold, 1989).
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Digital hearing aid

A traditional analog hearing aid consists of the parallel connection of band pass
filters. To provide accurate compensation, a large number of filters are needed. Size, complexity,
and cost all limit the number of filters. A hearing aid with a large number of adjustable
components is also difficult to fit and adjust to the needs of each individual patient. With the
advent of general-purpose DSPs and application-specific integrated circuits (ASIC), it has
become feasible to implement a hearing aid using digital technology. The digital implementation
utilizes many of the ideas discussed previously including A/D converters, D/A converters, and
digital filtering. The biggest advantage of the digital design is that the transfer function of the
filter used to compensate for hearing loss is independent of the hardware. The compensation is
performed in software and thus is extremely flexible and can be tailored to the individual. The
digital hearing aid is more reliable and the fitting process can be totally automated (Mo, 1988).
3. Defence systems
In Defence organizations, VLSI plays a major role as it is a part of Missile systems.
VLSI evolution represents a unique example of a very dynamic and pervasive trend in
commercial and military applications. Almost all ballistic machineries use VLSI technology.
Other applications of VLSI technology include

1. Voice and Data Communication network
2. Digital Signal Processing
3. Commercial Electronics
4. Automobiles
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CHAPTER 3
ICs IN VLSI SYSTEMS
TYPES OF ICs IN VLSI

Usually two types of IC classes are used in chip designing process. They are:
1.Field Programmable Gate Array

2. Application Specific Integrated Circuit
3.1. FIELD PROGRAMMABLE GATE ARRAY(FPGA)
FPGA stands for Field Programmable Gate Array. It is an integrated circuit which can be
“field” programmed to work as per the intended design. It means it can work as a
microprocessor, or as an encryption unit, or graphics card, or even all these three at once. As
implied by the name itself, the FPGA is field programmable. So, an FPGA working as a
microprocessor can be reprogrammed to function as the graphics card in the field, as opposed to
in the semiconductor foundries. The designs running on FPGAs are generally created using
hardware description languages such as VHDL and Verilog. FPGA is made up of thousands of
Configurable Logic Blocks (CLBs) embedded in an ocean of programmable interconnects.
The CLBs are primarily made of Look-Up Tables (LUTs), Multiplexers and Flip-Flops.
They can implement complex logic functions.
The basic building block of the FPGA is the Look Up Table based function generator. The
number of inputs to the LUT vary from 3,4,6, and even 8 after experiments. Now, we have
adaptive LUTs that provides two outputs per single LUT with the implementation of two
function generators.
Xilinx Virtex-5 is the most popular FPGA, that contains a Look up Table (LUT) which is
connected with MUX, and a flip flop as discussed above. Present FPGA consists of about
hundreds or thousands of configurable logic blocks. For configuring the FPGA, Modelsim and
Xilinx ISE softwares are used to generate a bitstream file and for development.
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Fig 3.1.Schematic model of an FPGA
Fig 3.2.Block diagram of FPGA circuit
3.1.1. FPGA Architecture design flow:
FPGA Architecture design comprises of design entry, design synthesis, design

implementation, device programming and design verification.
Design verification includes functional verification and timing verification that takes place at the
time of design flow. The following flow shows the design process of the FPGA.
Fig 3.3.Architectural design flow of FPGA
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1.Design Entry:
The design entry is done in different techniques like schematic based, hardware description
language (HDL) and a combination of both etc. If the designer wants to deal with hardware, then
the schematic entry is a good choice.
If the designer thinks the design in an algorithmic way, then the HDL is the better choice. The
schematic based entry gives the designer a greater visibility and control over the hardware.
2.Design synthesis:
This process translates VHDL code into a device netlist format, i.e., a complete circuit with
logical elements. The design synthesis process will check the code syntax and analyze the
hierarchy of the design architecture.
This ensures the design optimized for the design architecture. The netlist is saved as Native
Generic Circuit (NGC) file.
3.Design Implementation:
The implementation process consists of:
Translate:
This process combines all the input netlists to the logic design file which is saved
as NGD (Native Generic Database) file. Here the ports are assigned to the physical elements like
pins, switches in the design. This is stored in a file called User Constraints File (UCF).
Map:
Mapping divides the circuit into sub-blocks such that they can be fit into the FPGA
logic blocks. Thus this process fits the logic defined by NGD into the combinational Logic
Blocks, Input-Output Blocks and then generates an NCD file, which represents the design
mapped to the components of FPGA.
Routing:
The routing process places the sub-blocks from the mapping process into the logic
block according to the constraints and then connects the logic blocks.
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Device Programming:
The routed design must be loaded into the FPGA. This design must be converted
into a format supported by the FPGA. The routed NCD file is given to the BITGEN program,
which generates the BIT file. This BIT file is configured to the FPGA.
4.Design Verification:
Verification can be done at various stages of the process.
Behavioral Simulation (RTL Simulation):
Behavioral simulation is the first of all the steps that occur in the hierarchy of the
design. This is performed before cheap lace dresses the synthesis process to verify the RTL
code.
In this process, the signals and variables are observed and further, the procedures and functions
are traced and breakpoints are set.
Functional Simulation:
Functional simulation is performed post-translation simulation. It gives the
information about the logical operation of the circuit.
Static Timing Simulation:
This is done post mapping. Post map timing report gives the signal path delays.
After place and route, timing report takes the timing delay information. This provides a complete
timing summary of the design.
3.1.2. Types of FPGAs based on applications:
Field Programmable Gate Arrays are classified into three types based on applications
such as Low-end FPGAs, Mid-range FPGAs and high-end FPGAs.
Fig 3.4.Classification of FPGAs
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Low end FPGAs:

These types of FPGAs are designed for low power consumption, low logic density and low
complexity per chip. Examples of low end FPGAs are Cyclone family from Altera, Spartan
family from Xilinx, fusion family from Microsemi and the Mach XO/ICE40 from Lattice
semiconductor.
Mid range FPGAs:
These types of FPGAs are the optimum solution between the low-end and high- end FPGAs and
these are developed as a balance between the performance and the cost. Examples of Mid range
FPGAs are Arria from Altera, Artix-7/Kintex-7 series from Xlinix, IGL002 from Microsemi and
ECP3 and ECP5 series from Lattice semiconductor.
High end FPGAs:
These types of FPGAs are developed for logic density and high performance. Examples of High
end FPGAs are a Stratix family from Altera, Virtex family from Xilinx, Speedster 22i family
from Achronix, and ProASIC3 family from Microsemi.
3.1.3. Applications of FPGA:

FPGAs have gained rapid growth over the past decade because they are useful
for a wide range of applications. Specific application of an FPGA includes digital signal
processing, bioinformatics, device controllers, software-defined radio, random logic, ASIC
prototyping, medical imaging, computer hardware emulation, integrating multiple SPLDs, voice
recognition, cryptography, filtering and communication encoding and many more.
Usually, FPGAs are kept for particular vertical applications where the production volume is
small. For these low-volume applications, the top companies pay in hardware costs per unit.
Today, the new performance dynamics and cost have extended the range of viable applications
Fig 3.5.Applications of FPGA
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3.2. APPLICATION SPECIFIC INTEGRATED CIRCUIT(ASIC)

ASIC stands for Application Specific Integrated Circuit. As the name implies, ASICs are
application specific. They are designed for one sole purpose and they function the same
their whole operating life. For example, the CPU inside your phone is an ASIC. It is meant
to function as a CPU for its whole life. Its logic function cannot be changed to anything else
because its digital circuitry is made up of permanently connected gates and flip-flops in
silicon. The logic function of ASIC is specified in a similar way as in the case of FPGAs,
using hardware description languages such as Verilog or VHDL. The difference in case of
ASIC is that the resultant circuit is permanently drawn into silicon whereas in FPGAs the
circuit is made by connecting a number of configurable blocks.
Fig 3.6. Schematic model of an ASIC
3.2.1. ASIC Architecture design flow:

There are various steps involved in the ASIC chip design. A brief description is given below.
Fig 3.7.architectural design flow of ASIC
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1. Design Entry: In this step, the designer starts the design with a text description or system
specific language like HDL, C language etc.
2. Logic Synthesis: Logic synthesis generally helps to produce the netlist consisting the
description and interconnection of logic cells.
3. System Partitioning: Here partitioning of a large design into a small ASIC design takes
place.
4. Pre layout Simulation: Pre layout Simulation allows checking whether the design functions
correctly.
5. Floor planning: Using this step we can plan the arrangement of the blocks present in the
netlist on the chip.
6. Placement: Allows the placement of cells present in the block.
7. Routing: This step is carried out to provide the necessary interconnections between the cells.
8. Circuit Extraction: Here the translation of the integrated circuit to electrical circuit takes
place.
9. Post layout Simulation: It allows checking the final layout of the design.
3.2.2. Types of ASICs based on applications

There are three different categories of ASICS:
Fig 3.8.Classification of ASICs
Full-Custom ASICs
These are custom-made from scratch for a specific application. Their ultimate purpose
is decided by the designer. All the photolithographic layers of this integrated circuit are already
fully defined, leaving no room for modification during manufacturing.
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Semi-Custom ASICs
These are partly customized to perform different functions within the field of their
general area of application. These ASICS are designed to allow some modification during
manufacturing, although the masks for the diffused layers are already fully defined.
Platform ASICs:
These are designed and produced from a defined set of methodologies, intellectual
properties and a well-defined design of silicon that shortens the design cycle and minimizes
development costs. Platform ASICs are made from predefined platform slices, where each slice
is a pre manufactured device, platform logic or entire system. The use of pre manufactured
materials reduces development costs for these circuits.
3.2.3. Applications of ASIC

Application Specific Integrated Circuits finds many applications in the field of
medical, industrial sectors, automotive and sensors. Today ASIC chip can be used in satellites,
modems, computer PCs etc. Electronic Odometer, Engine Monitor etc. are some ASIC products
suitable for automobile applications. Electronic Odometer helps to record the mileage of a
vehicle. Engine Monitor and Warning Light Controller is another ASIC product that monitors
different parameters like temperature, voltage etc. of a vehicle. ASICs can be widely used for
industrial applications also. Some ASIC based industrial products are Micro-Power 555
Programmable Timer, Thermal Controller, 8 Bit Microcontroller etc. In medical applications,
biometric monitors, hearing aids etc. are some products. Today, for security applications many
ASIC products are coming out. One of them is RFID tags. Last but not the least, ASIC can be
used for many applications and in the near future we can expect a low cost ASIC technology.
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CHAPTER 4
COUNTERS AND FLIP-FLOPS
4.1. INTRODUCTION TO COUNTERS

A counter is a device which can count any particular event on the basis of how many times
the particular event(s) is occurred. In a digital logic system or computers, this counter can count
and store the number of time any particular event or process have occurred, depending on a
clock signal. Most common type of counter is sequential digital logic circuit with a single clock
input and multiple outputs. The outputs represent binary or binary coded decimal numbers. Each
clock pulse either increase the number or decrease the number.
Electronic counters are usually divided into 5 types:
1. Asynchronous counters
2. Synchronous counters
3. Decade counters
4. Ring counters
5. Johnson counters
Counting means incrementing or decrementing the values of an operator, with respect to its
previous state value. So to perform the mathematical operation we use no devices other than
counters. We cannot perform this action (counting) with any other logic devices rather than
counters.
4.1.1. Types of Counters
Each counter is useful for different applications. Usually, counter circuits are digital in nature,
and count in natural binary. Many types of counter circuits are available as digital building
blocks, for example a number of chips in the 4500 series implement different counters.
Occasionally there are advantages to using a counting sequence other than the natural binary
sequence—such as the binary coded decimal counter, a linear-feedback shift register counter, or
a Gray-code counter. Counters are useful for digital clocks and timers, and in oven timers, VCR
clocks, etc.
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Asynchronous Counters
Asynchronous counters are those whose output is free from the clock signal. Because the flip
flops in asynchronous counters are supplied with different clock signals, there may be delay in
producing output.
The required number of logic gates to design asynchronous counters is very less. So they are
simple in design. Another name for Asynchronous counters is “Ripple counters”.
The number of flip flops used in a ripple counter is depends up on the number of states of
counter (ex: Mod 4, Mod 2 etc). The number of output states of counter is called “Modulus” or
“MOD” of the counter. The maximum number of states that a counter can have is 2n where n
represents the number of flip flops used in counter.
Applications of asynchronous counters are:
1. Asynchronous counters are used as frequency dividers, as divide by N counters.
2. These are used for low power applications and low noise emission.
3. These are used in designing asynchronous decade counter.
4. Also used in Ring counter and Johnson counter.
5. Asynchronous counters are used in Mod N ripple counters. EX: Mod 3, Mod 4, Mod 8, Mod
14, Mod 10 etc.
Synchronous Counters
The counters which use clock signal to change their transition are called “Synchronous
counters”. This means the synchronous counters depends on their clock input to change state
values. In synchronous counters, all flip flops are connected to the same clock signal and all flip
flops will trigger at the same time.
Synchronous counters are also known as ‘Simultaneous counters ’.There is no propagation delay
and no ripple effect in synchronous counters.
The most common and well known application of synchronous counters is machine motion
control, the process in which the rotary shaft encoders convert the mechanical pulses into
electric pulses. These pulses will act as clock input of the up/ down counter and will initiate the
circuit motion.
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Fig 4.1. Machine motion control using synchronous counters
This circuit consists of photo transistor or light sensor and a LED connected to the rotor shaft.
This arrangement is connected to the UP/ DOWN counter. When the machine started to move, it
turns the encoder shaft by connecting and disturbing (making and breaking) the light beam
between the light sensor and LED.
By this motion, the rotor creates clock pulses to increase the count of the up/ down counter
circuit. So the counter note downs the motion of the shaft and gives the value that how much
distance the rotor has moved.
To count the motion of the rotor shaft we increment the count by moving shaft in one direction
and decrement the count by moving in another direction. We also use an encoder /decoder circuit
to differentiate the direction of motion.
Decade Counters
A Decade counter is a serial digital counter that counts ten digits .And it resets for every new
clock input. As it can go through 10 unique combinations of output, it is also called as “Binary
coded decimal counter”. A Decade counter can count 0000, 0001, 0010, 1000, 1001, 1010, 1011,
1110, 1111, 0000, and 0001 and so on. When the Decade counter is at REST, the count is equal
to 0000. This is first stage of the counter cycle. When we connect a clock signal input to the
counter circuit, then the circuit will count the binary sequence. The first clock pulse can make
the circuit to count up to 9 (1001). The next clock pulse advances to count 10 (1010).
1. Integrated oscillator
2. Low power CMOS
3. TTL compatible inputs
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Ring Counters
A ring counter is a type of counter composed of flip-flops connected into a shift register, with
the output of the last flip-flop fed to the input of the first, making a "circular" or "ring" structure.
There are two types of ring counters:
1. A straight ring counter, also known as a one-hot counter, connects the output of the last shift
register to the first shift register input and circulates a single one (or zero) bit around the ring.
2. A twisted ring counter, also called switch-tail ring counter, walking ring counter, Johnson
counter, or Mobius counter, connects the complement of the output of the last shift register
to the input of the first register and circulates a stream of ones followed by zeros around the
ring.
Early applications of ring counters were as frequency prescalers (e.g. for Geiger counter and
such instruments), as counters to count pattern occurrences in cryptanalysis (e.g. in the Heath
Robinson code breaking machine and the Colossus computer), and as accumulator counter
elements for decimal arithmetic in computers and calculators, using either bi-quinary (as in the
Colossus) or ten-state one-hot (as in the ENIAC) representations.
Johnson Counters
A Johnson counter is a modified ring counter, where the inverted output from the last flip flop is
connected to the input to the first. The register cycles through a sequence of bit-patterns. The
MOD of the Johnson counter is 2n if n flip-flops are used. The main advantage of the Johnson
counter is that it only needs half the number of flip-flops compared to the standard ring
counter for the same MOD. Applications of Johnson counters are
1. Johnson counter is used as a synchronous decade counter or divider circuit.
2. It is used in hardware logic design to create complicated Finite states machine. ex: ASIC and
FPGA design.
3. The 3 stage Johnson counter is used as a 3 phase square wave generator which produces
1200 phase shift.
4. It is used to divide the frequency of the clock signal by varying their feedback.
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4.2. INTRODUCTION TO FLIP-FLOPS
In electronics, a flip-flop or latch is a circuit that has two stable states and can be used to store
state information – a bistable multivibrator. The circuit can be made to change state
by signals applied to one or more control inputs and will have one or two outputs. It is the basic
storage element in sequential logic. Flip-flops and latches are fundamental building blocks
of digital electronics systems used in computers, communications, and many other types of
systems. When used in a finite-state machine, the output and next state depend not only on its
current input, but also on its current state (and hence, previous inputs). It can also be used for
counting of pulses, and for synchronizing variably-timed input signals to some reference timing
signal. Flip-flops can be either level-triggered (asynchronous, transparent or opaque) or edge-
triggered (synchronous, or clocked). The term flip-flop has historically referred generically to
both level-triggered and edge-triggered circuits that store a single bit of data using gates.
Recently, some authors reserve the term flip-flop exclusively for discussing clocked circuits; the
simple ones are commonly called transparent latches. Using this terminology, a level-sensitive
flip-flop is called a transparent latch, whereas an edge-triggered flip-flop is simply called a flip-
flop. Using either terminology, the term "flip-flop" refers to a device that stores a single bit of
data, but the term "latch" may also refer to a device that stores any number of bits of data using a
single trigger. The terms "edge-triggered", and "level-triggered" may be used to avoid
ambiguity.
When a level-triggered latch is enabled it becomes transparent, but an edge-triggered flip-flop's

output only changes on a single type (positive going or negative going) of clock edge. Flip flops
are widely used in
1. Registers: As the flip flops have two stable states, we use them in memory elements like
registers, for data storage. Generally we use registers in electronic devices like
computers.
2. Counters: The groups of interconnected flip flops are uses as counters, to count the
increment or decrement of an event occurrence.
3. Frequency division: Flip flops are used as frequency division circuits, which divide the
input frequency to exactly to its half. Frequency division circuits are used to regularize
the frequency of electronic circuits.
4. Data transfer: We use shift registers (A special-type of registers) to transfer the data from
one flip flop to another, which are connected in a specific order.
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4.2.1. Types of Flip-Flops

Based on their operations, flip flops are basically 4 types. They are
1. S-R flip flop
2. D flip flop
3. J-K flip flop
4. T flip flop
S-R Flip-Flops
Most simple type of flip flop is S-R Flip Flop. It has two inputs S and R and two outputs Q and .
The state of this latch is determined by condition of Q. If Q is 1 the latch is said to be SET and if
Q is 0 the latch is said to be RESET. This S-R Latch or Flip flop can be designed either by two
cross-coupled NAND gates or two-cross coupled NOR gates. When we design this latch by
using NOR gates, it will be an active high S-R latch. That means it is SET when S = 1. When we
design this latch by using NAND gates, it will be an active low S-R latch. That means it is SET
when S = 0. S R Flip Flop is also called SET RESET Flip Flop.
Fig 4.2. S-R Flip-Flop
Tab 4.1. Truth table for S-R Flip-Flops
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D Flip-Flop
In the SR flip flop an uncertain state occurred. This can be avoided by using D flip flop. Here D
stands for “Data”. It is constructed from SR flip flop. The two inputs (S &R) of the clocked SR
flip flop are connected to an inverter.
It is one of the most widely used flip – flops. It has a clock signal (Clk) as one input and Data
(D) as other. There are two outputs and these outputs are complement to each other. The symbol
of D flip – flop is shown below.
Fig 4.3. D Flip-Flop
Tab 4.2. Truth table of D Flip-Flop
J-K Flip-Flop
JK flip – flop is named after Jack Kilby, an electrical engineer who invented IC.
A JK flip – flop is a modification of SR flip – flop. In this the J input is similar to the set input of
SR flip – flop and the K input is similar to the reset input of SR flip – flop. The condition J = K
= 1 which is not allowed in SR flip – flop (S = R = 1) is interpreted as a toggle command.
The JK flip flop has
Two data inputs J and K.
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One clock signal input (CLK).

Two outputs Q and Q’.
Fig 4.4. J-K Flip-Flop
Tab 4.3. Truth table of J-K Flip-Flop

T Flip-Flop
The T-type (toggle) flip-flop is a single input bistable, with an operation similar to the D-type
above. We saw above with the JK flip-flop configuration, that if J = K = 1 its output would
toggle on the application of the next clock cycle. Then the conversion of flip-flops to a Toggle
type is simply a matter of connecting the inputs HIGH.
The T-type flip-flop is not available commercially but can be constructed from a JK flip-flop (or
D-type flip-flop) by connecting the J input with the K input and both to logic level “1”.
With J and K HIGH, the flip-flop changes state every time it is triggered at its clock input. This
clock input is now called the “toggle input” as the output becomes “1” if it was “0”, and a “0” if
it was “1”, that is it toggles.
Fig 4.5. T Flip-Flop
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Tab 4.4. Truth table of T Flip-Flop
The toggle flip-flop changes state when the clock input is applied, T = 1 and remains unchanged
when T = 0. Then the transition from “0” to “1” will cause the output to toggle giving the flip-
flop its name. The toggle T-type flip-flop is the basic building block of many digital circuits
including frequency dividers and digital counters.
Toggle T-type flip-flops can be constructed from a JK flip-flop in two simple ways. In the first is
that the J and K inputs can be tied together HIGH as shown with the clock input becoming the
toggle as shown. The second way is with the J and K inputs tied together to provide the toggle
input with the clock input remaining unchanged. The output toggles when T and CLK= or equal
to “1”. The output remains unchanged when T or CLK are LOW.
The Data D-type flip-flop can just like the JK flip-flop be converted to perform as a toggle flip-
flop by connecting the Q output directly to the D-input with the toggling signal T being the clock
input as shown above. Connecting the Q to the input creates negative feedback.
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CHAPTER 5
HARDWARE DESCRIPTION LANGUAGES
INTRODUCTION
Hardware description language (HDL) is a specialized computer language used to describe the
structure and behaviour of electronic circuits, and most commonly, digital logic circuits.
A hardware description language enables a precise, formal description of an electronic circuit
that allows for the automated analysis and simulation of an electronic circuit. It also allows for
the synthesis of a HDL description into a netlist (a specification of physical electronic
components and how they are connected together), which can then be placed and routed to
produce the set of masks used to create an integrated circuit.
A hardware description language looks much like a programming language such as C; it is a
textual description consisting of expressions, statements and control structures. One important
difference between most programming languages and HDLs is that HDLs explicitly include the
notion of time.
HDLs form an integral part of electronic design automation (EDA) systems, especially for
complex circuits, such as application-specific integrated circuits, microprocessors,
and programmable logic devices.
Structure of HDL
HDLs are standard text-based expressions of the structure of electronic systems and their
behaviour over time. Like concurrent programming languages, HDL syntax and semantics
include explicit notations for expressing concurrency. Languages whose only characteristic is to
express circuit connectivity between a hierarchy of blocks are properly classified
as netlist languages used in electric computer-aided design (CAD). HDL can be used to express
designs in structural, behavioral or register-transfer-level architectures for the same circuit
functionality; in the latter two cases the synthesizer decides the architecture and logic gate
layout.
HDLs are used to write executable specifications for hardware. A program designed to
implement the underlying semantics of the language statements and simulate the progress of
time provides the hardware designer with the ability to model a piece of hardware before it is
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created physically. It is this executability that gives HDLs the illusion of being programming
languages, when they are more precisely classified as specification languages or modeling
languages. Simulators capable of supporting discrete-event (digital) and continuous-time
(analog) modeling exist, and HDLs targeted for each are available.
5.1. Verilog Hardware Description Language
Verilog, standardized as IEEE 1364, is a hardware description language (HDL) used to

model electronic systems. It is most commonly used in the design and verification of digital
circuits at the register-transfer level of abstraction. It is also used in the verification of analog
circuits and mixed-signal circuits, as well as in the design of genetic circuits. In 2009, the
Verilog standard (IEEE 1364-2005) was merged into the System Verilog standard, creating
IEEE Standard 1800-2009. Since then, Verilog is officially part of the System Verilog language.
The current version is IEEE standard 1800-2017. Verilog was one of the first popular hardware
description languages to be invented. It was created by Prabhu Goel, Phil Moorby and Chi-Lai
Huang and Douglas Warmke between late 1983 and early 1984. Chi-Lai Huang had earlier
worked on a hardware description LALSD, a language developed by Professor S.Y.H. Su, for
his PhD work. The rights holder for this process, at the time proprietary, was "Automated
Integrated Design Systems" (later renamed to Gateway Design Automation in 1985). Gateway
Design Automation was purchased by Cadence Design Systems in 1990. Cadence now has full
proprietary rights to Gateway's Verilog and the Verilog-XL, the HDL-simulator that would
become the de facto standard (of Verilog logic simulators) for the next decade. Originally,
Verilog was only intended to describe and allow simulation, the automated synthesis of subsets
of the language to physically realizable structures (gates etc.) was developed after the language
had achieved widespread usage. Verilog is a portmanteau of the words "verification" and
"logic". Various versions of Verilog HDL include:
Verilog-95
With the increasing success of VHDL at the time, Cadence decided to make the language
available for open standardization. Cadence transferred Verilog into the public domain under
the Open Verilog International (OVI) (now known as Accellera) organization. Verilog was later
submitted to IEEE and became IEEE Standard 1364-1995, commonly referred to as Verilog-95.
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Verilog 2001
Verilog-2001 is a significant upgrade from Verilog-95. First, it adds explicit support for (2's
complement) signed nets and variables. Previously, code authors had to perform signed
operations using awkward bit-level manipulations. The same function under Verilog-2001 can
be more succinctly described by one of the built-in operators: +, -, /, *, >>>. A
generate/endgenerate construct (similar to VHDL's generate/endgenerate) allows Verilog-2001
to control instance and statement instantiation through normal decision operators (case/if/else).
Verilog 2005
Not to be confused with System Verilog, Verilog 2005 (IEEE Standard 1364-2005) consists of

minor corrections, spec clarifications, and a few new language features (such as the u wire
keyword).
System Verilog
The advent of hardware verification languages such as OpenVera, and Verisity's e

language encouraged the development of Superlog by Co-Design Automation Inc (acquired
by Synopsys). The foundations of Superlog and Vera were donated to Accellera, which later
became the IEEE standard P1800-2005: System Verilog.
SystemVerilog is a superset of Verilog-2005, with many new features and capabilities to aid
design verification and design modeling. As of 2009, the SystemVerilog and Verilog language
standards were merged into SystemVerilog 2009 (IEEE Standard 1800-2009). The current
version is IEEE standard 1800-2017.
5.2. VHSIC Hardware Description Language

VHDL (VHSIC Hardware Description Language) is a hardware description language used
in electronic design automation to describe digital and mixed-signal systems such as field-
programmable gate arrays and integrated circuits. VHDL can also be used as a general
purpose parallel programming language.
VHDL is generally used to write text models that describe a logic circuit. Such a model is
processed by a synthesis program, only if it is part of the logic design. A simulation program is
used to test the logic design using simulation models to represent the logic circuits that interface
to the design. This collection of simulation models is commonly called a testbench.
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1. The key advantage of VHDL, when used for systems design, is that it allows the behaviour
of the required system to be described (modeled) and verified (simulated) before synthesis
tools translate the design into real hardware (gates and wires).
2. Another benefit is that VHDL allows the description of a concurrent system. VHDL is
a dataflow language in which every statement is considered for execution simultaneously,
unlike procedural computing languages such as BASIC, C, and assembly code, where a
sequence of statements is run sequentially one instruction at a time.
3. A VHDL project is multipurpose. Being created once, a calculation block can be used in
many other projects. However, many formational and functional block parameters can be
tuned (capacity parameters, memory size, element base, block composition and
interconnection structure).
4. A VHDL project is portable. Being created for one element base, a computing device project
can be ported on another element base, for example VLSI with various technologies.
5. A big advantage of VHDL compared to original Verilog is that VHDL has a full type

system. Designers can use the type system to write much more structured code (especially by
declaring record types).
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CHAPTER 6
DESIGN, SIMULATION, AND IMPLEMENTATION OF
PROPOSED MODEL
6.1. Design of a 4-bit Ripple Carry Counter using ‘T’ Flip-flops

As far as the design of this model is concerned, we have already mentioned that a “T’ Flip-flop,
is not readily available and hence we convert a “D” Flip-flop by connecting the Q output directly
to the D-input with the toggling signal T being the clock input as shown above.
Fig 6.1. Schematic of a single “T” Flip-flop obtained by conversion of “D” Flip-flop.
From the above modeling, it is clear that once the result from “D” flip-flop is obtained, it is fed
back as input thus combining with “T” input signal forming a toggle type flip-flop.
In order to convert the given D flip-flop into a T-type, we need to obtain the corresponding
conversion table, as shown in Figure 9. Here, the information in the excitation table of the D
flip-flop is inserted as a part of the T flip-flop's truth table.
Tab 6.1. “D” flip-flop to “T” flip-flop conversion table
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Having obtained the conversion table, the next step is to express the input, D, in terms of T
and Qn.
Fig 6.2. K-map simplification for D in terms of T and Qn
Simulation Model:
Hence, we make 4 such conversions and thus 4 such “T” Flip-flop obtained is connected
together to form our model design.
Fig 6.3. Simulation design of the proposed model
6.2. Simulation of proposed model

Once the designing is completed, its important to simulate the model by putting appropriate
coding into the model. Hence, we use the Verilog HDL to simulate the model and there are
numerous softwares that can be used to perform the simulation,
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Here we have used the Xilinx ISE(Integrated Synthesis Environment) and the EDA(Electronic
Design Automation) softwares for the simulation.
During simulation we write two codes. One is the main code comprising of three important
modules. They are:
1.Implementing main code
2. Implementing “T” Flip-flop logic
3.Implementing “D” Flip-flop logic
And the second code is called the Ripple Test Bench code.
Test benches are used to simulate your design without the need of any physical hardware. A
test bench is actually just another Verilog file! However, the Verilog you write in a test bench is
not quite the same as the Verilog you write in your designs. This is because all the Verilog you
plan on using in your hardware design must be synthesizable, meaning it has a hardware
equivalent.
The detailed representation of the simulation code is as follows:
1. Implementing main program:
Ripple carry counter:

module ripple_carry_counter(q, clk, reset);
output [3:0] q;
input clk, reset;
T_FF tff0(q[0], clk, reset);
T_FF tff1(q[1], q[0], reset);
endmodule
2. Implementing “T” Flip-flop logic:
T flip-flop:
module T_FF(q, clk, reset);
output q;
input clk, reset;
wire d;
D_FF dff0(q, d, clk, reset);
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not n1(d, q); // not is Verilog-provided primitive. Case sensitive.

endmodule
3. Implementing “D” Flip-flop logic:
D flip-flop:
module D_FF(q, d, clk, reset);
output q;
input d, clk, reset;
reg q;
always @(posedge reset or negedge clk)
if (reset)
q = 1'b0;
else
q = d;
endmodule
Once the main coding is done, we can use the Test Bench coding which helps in viewing the
output directly through simulation rather than using a physical hardware.
In this case, we implement the Test Bench code and verify the output with the main code already
being implemented.
Test Bench:
module ripple_tb;
reg clk; // Input
reg reset; // Input
wire [3:0] q; // Output
// Instantiate the Unit Under Test
ripple_carry_counter r1 (.q(q), .clk(clk), .reset(reset));
// Control the clk signal that drives the design block. Cycle time = 10
initial
clk = 1'b0; // Set clk to 0
always
#5 clk = ~clk; // Toggle clk every 5 time units
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// Control the reset signal that drives the design block.

// reset is asserted from 0 to 20 and from 200 to 220
initial
begin
reset = 1'b1;
#20 reset = 1'b0;
#180 reset = 1'b1;
#20 reset = 1'b0;
end endmodule
Output:
Fig 6.4. Output obtained by simulating the proposed model

In simple representation, we can give the output as follows:
Fig 6.5. General representation of the above output
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6.3. Implementation of proposed model

Ripple carry counters play an important role in digital systems. Although its presence is often
unnoticed, it is the backbone in such systems.
Ripple counters are usually used in Voice and Data Communication networks, Digital Signal
Processing, Computers, Commercial Electronics, Automobiles, Medicine, Defence systems.
In all these systems, the timing requirements are fulfilled by such counters. Toggling is the
major process that occurs in each of these applications.
In our project, we design a timing circuit that resembles the normal digital clock. This circuit in
real life plays a major role in deciding the Trajectory path of a Self Guided Missile in Defence
systems.
6.3.1. Self Contained Guidance Systems

The self-contained group falls as an important category of guidance system types. All the
guidance and control equipment is entirely within the missile. Some of the systems of this type
are: Preset, Inertial, and Celestial navigation. These systems are most commonly applicable to
surface-to-surface missiles, and electronic countermeasures are relatively ineffective against
them since they neither transmit nor receive signals that can be jammed.
6.3.1.1. Preset Guidance

The term preset completely describes one guidance method. When preset guidance is used, all of
the control equipment is inside the missile. This means that before the missile is launched, all
information relative to target location as well as the trajectory the missile must follow must be
calculated. After this is done, the missile guidance system must be set to follow the course to the
target, to hold the missile at the desired altitude, to measure its air speed and, at the correct time,
cause the missile to start the terminal phase of its flight and dive on the target.
Fig 6.6. Guidance path of a missile

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A major advantage of preset guidance is that it is relatively simple compared to other types of
guidance and it does not require tracking or visibility.
6.3.1.2. Navigational Guidance Systems

When targets are located at great distances from the launching site, some form of navigational
guidance must be used. Accuracy at long distances is achieved only after exacting and
comprehensive calculations of the flight path have been made. The mathematical equation for a
navigation problem of this type may contain factors designed to control the movement of the
missile about the three axes--pitch, roll, and yaw. In addition, the equation may contain factors
that take into account acceleration due to outside forces (tail winds, for example) and the inertia
of the missile itself. Navigational guidance is further classified as
Inertial guidance:
The simplest principle for guidance is the law of inertia. The inertial guidance
method is used for the same purpose as the preset method and is actually a refinement of that
method. The inertially guided missile also receives programmed information prior to launch.
Although there is no electromagnetic con-tact between the launching site and the missile after
launch, the missile is able to make corrections to its flight path with amazing precision,
controlling the flight path with accelerometers that are mounted on a gyro-stabilized platform.
All in-flight accelerations are continuously measured by this arrangement, and the missile
attitude control generates corresponding correction signals to maintain the proper trajectory.
Celestial Reference:
A celestial navigation guidance system is a system designed for a predetermined
path in which the missile course is adjusted continuously by reference to fixed stars. The system
is based on the known apparent positions of stars or other celestial bodies with respect to a point
on the surface of the earth at a given time. Navigation by fixed stars and the sun is highly
desirable for long-range missiles since its accuracy is not dependent on range. The missile must
be provided with a horizontal or a vertical reference to the earth, automatic star-tracking
telescopes to determine star elevation angles with respect to the reference, a time base, and
navigational star tables mechanically or electric-ally recorded. A computer in the missile
continuously compares star observations with the time base and the navigational tables to
determine the missile's present position. From this, the proper signals are computed to steer the
missile correctly toward the target. The missile must carry all this complicated equipment and
must fly above the clouds to assure star visibility.
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CONCLUSION
The model thus developed using VLSI technology has been successfully simulated and being
implemented in the self guided ballistic missiles. This project also proves to be one of the most
convenient methods in every application that it is used. The major advantage of the model is that
is simple in construction and easy to maintain.
With various combinations available for circuit design, there is a wide range of usage of such
models. The Hardware description language used in this project has many benefits. The major
benefit of the language is fast design and better verification. The Top-down design and
hierarchical design method allows the design time; design cost and design errors to be reduced.
Another major advantage is related to complex designs, which can be managed and verified
easily. HDL provides the timing information and allows the design to be described in gate level
and register transfer level. Reusability of resources is one of the other advantage.
Thus, it can be concluded that ripple carry counter designed using Verilog HDL and the
corresponding T Flip-flops has wide range of benefits and can be implemented using complete
reliability.
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FUTURE SCOPE
With the technology growing everyday paving way to new innovations, there has been a
urgent requirement for quick results. Keeping the point in consideration, new technologies
like VLSI can be implemented extensively in the field of Electrical and Electronics in order
to produce simple and quick response projects. With the current trend of using such
technologies being successful, means that the further research would be to develop advanced
versions.
In fields like Communication, Medicine, and Defence the development of VLSI oriented
innovation can put the country upfront considering the Economic status and also the welfare
of the country.
Defence Organisations are bound to have more benefits of using this technology as it reduces
the complexity of heavy equipments like Missiles and can obtain timely output making it
easy to operate.
This project will play an important in the future designs of defence equipments in order to
obtain simple and reliable operation.
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REFERENCES
1. DNEC, Research Center Imarat (RCI), DRDO

2. "The History of the Integrated Circuit". Nobelprize.org. Retrieved 21 Apr 2012.
3. "1960: Metal Oxide Semiconductor (MOS) Transistor Demonstrated". Computer History
Museum.
4. Moskowitz, Sanford L. (2016). Advanced Materials Innovation: Managing Global
Technology in the 21st century. John Wiley & Sons. pp. 165.167. ISBN 9780470508923.
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Integrated Circuits

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Integrated Circuits

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DESIGN, SIMULATION AND IMPLEMENTATION OF “T” FLIP-FLOP

BASED RIPPLE CARRY COUNTER USING VERILIG HDL

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Fig 1.1 An Integrated circuit

Integrated circuits were made practical by technological advancements in metal–oxide–

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1.2. DESIGN OF ICs:

1.3. TYPES OF ICs:

Integrated circuits can be classified into analog, digital and mixed

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with board-level integration. These digital ICs, typically microprocessors, DSPs,

Digital ICs are further sub-categorized as logic ICs (such

Fig 1.2. Design of a Digital IC

Analog ICs, such as sensors, power management circuits, and operational amplifiers (op-amps),

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Analog ICs are further sub-categorized as linear integrated circuits and RF circuits (radio

Fig 1.3. Design of an Analog IC

3. Mixed signal ICs:

Fig 1.4. Design of a Mixed signal IC

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A three-dimensional integrated circuit (3D IC) is a MOS (metal-oxide semiconductor) integrated

International organizations such as the Jisso Technology Roadmap Committee (JIC) and

Three-dimensional integrated circuits (3D ICs) are further sub-categorized into through-silicon

Fig 1.5. Sections of a 3-D IC

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VERY LARGE SCALE INTEGRATION (VLSI)

Fig 2.1. A VLSI Integrated Circuit-die

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2.1. TYPES OF MODELING IN VLSI

I. Gate level modeling:

II. Data flow modeling:

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III. Behavioral modeling:

IV. Mixed design style modeling:

2.2. VLSI DESIGN FLOW

Fig 2.2.VLSI design flow

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3. Behavioral or Functional Design:

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Fig 2.3.Process of chip manufacture

2.3. MERITS OF VLSI:

1. Reduces the Size of Circuits.

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2.4. APPLICATIONS OF VLSI:

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Digital hearing aid

Other applications of VLSI technology include

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TYPES OF ICs IN VLSI

1.Field Programmable Gate Array

3.1. FIELD PROGRAMMABLE GATE ARRAY(FPGA)

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Fig 3.1.Schematic model of an FPGA

Fig 3.2.Block diagram of FPGA circuit

3.1.1. FPGA Architecture design flow:

FPGA Architecture design comprises of design entry, design synthesis, design

Fig 3.3.Architectural design flow of FPGA

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3.1.2. Types of FPGAs based on applications:

Fig 3.4.Classification of FPGAs

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