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Precision Operational
Amplifier
The LM308A operational amplifier provides high input impedance,
low input offset and temperature drift, and low noise. These
characteristics are made possible by use of a special Super Beta
processing technology. This amplifier is particularly useful for http://onsemi.com
applications where high accuracy and low drift performance are
essential. In addition high speed performance may be improved by MARKING
employing feedforward compensation techniques to maximize slew DIAGRAMS
rate without compromising other performance criteria. 8
The LM308A offers extremely low input offset voltage and drift
PDIP−8 LM308AN
specifications allowing usage in even the most critical applications N SUFFIX AWL
without external offset nulling. CASE 626 YYWW
8
• Operation from a Wide Range of Power Supply Voltages 1
• Low Input Bias and Offset Currents 1
Frequency Compensation
A = Assembly Location
R2
R2
WL, L = Wafer Lot
Inverting R1 YY, Y = Year
Output Inverting R1
Input
Input Output WW, W = Work Week
Noninverting R3
+ Noninverting R3
Input Cf Compen B +
Compen A Input Compen B
100pF
1
Cf ≥ 30
R2
PIN CONNECTIONS
1+
R1
Standard Compensation Modified Compensation Compen A 1 8 Compen B
2 − 7 VCC
Inputs +
3 6 Output
RS > 10k 100k
10k 5.0pF 4 5 NC
Input VEE
Input C2* 10pF
10
k 0.01µF 500
(Top View)
Output + Compen B
+ CompenB
3.0k 500pF
3.0k CL ORDERING INFORMATION
500pF 10pF 75pF
10pF CompenA to Device Package Shipping
CompenA 0.01µF
ELECTRICAL CHARACTERISTICS (Unless otherwise noted these specifications apply for supply voltages of +5.0 V ≤ VCC ≤
+15 V and −5.0 V ≥ VEE ≥ −15 V, TA = +25°C.)
Characteristic Symbol Min Typ Max Unit
Input Offset Voltage VIO − 0.3 0.5 mV
Input Offset Current IIO − 0.2 1.0 nA
Input Bias Current IIB − 1.5 7.0 nA
Input Resistance ri 10 40 − MΩ
Power Supply Currents ICC, IEE − ±0.3 ±0.8 mA
(VCC = +15 V, VEE = −15 V)
Large Signal Voltage Gain AVOL 80 300 − V/mV
(VCC = +15 V, VEE = −15 V, VO = ±10 V, RL ≥ 10 kΩ)
The following specifications apply over the operating temperature range.
Input Offset Voltage VIO − − 0.73 mV
Input Offset Current IIO − − 1.5 nA
Average Temperature Coefficient of Input Offset Voltage ∆VIO/∆T − 1.0 5.0 µV/°C
TA (min) ≤ TA ≤ TA (max)
Average Temperature Coefficient of Input Offset Current ∆IIO/∆T − 2.0 10 pA/°C
Input Bias Current IIB − − 10 nA
Large Signal Voltage Gain AVOL 60 − − V/mV
(VCC +15 V, VEE = −15 V, VO = ±10 V, RL ≥ 10 kΩ)
Input Voltage Range VICR ±14 − − V
(VCC = +15 V, VEE = −15 V)
Common Mode Rejection CMR 96 110 − dB
(RS ≤ 50 kΩ)
Supply Voltage Rejection PSR 96 110 − dB
(RS ≤ 50 kΩ)
Output Voltage Range VOR ±13 ±14 − V
(VCC = +15 V, VEE = −15 V, RL = 10 kΩ)
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LM308A
2.0 100
Figure 1. Input Bias and Input Offset Currents Figure 2. Maximum Equivalent Input Offset
Voltage Error versus Input Resistance
130 500
120 400
TA = 0°C TA = −55°C
110 +25°C 300 0°C
−55°C
+70°C +25°C
100 200
+125°C +70°C
CF = 0 +125°C
90 100
f = 100 Hz
=
I CC
80 0
0 5.0 10 15 20 0 5.0 10 15 20
VCC = ⎥ VEE⎥, SUPPLY VOLTAGES (V) VCC = ⎥ VEE⎥, SUPPLY VOLTAGES (V)
Figure 3. Voltage Gain versus Supply Voltages Figure 4. Power Supply Currents versus
Power Supply Voltages
140 20
VOR, OUTPUT VOLTAGE RANGE (± Vp−p)
VCC = +15 V
120 VEE = −15 V
16
AVOL , VOLTAGE GAIN (dB)
100 TA = +25°C
80 12
CF = 3.0 pF
60
40 8.0
CF = 3.0 pF
CF = 30 pF
20
4.0
0 CF = 30 pF
CF = 100 pF
−20 0
1.0 10 100 1.0 k 10 k 100 k 1.0 M 10 M 100 M 1.0 k 10 k 100 k 1.0 M
f, FREQUENCY (Hz) f, FREQUENCY (Hz)
Figure 5. Open Loop Frequency Response Figure 6. Large Signal Frequency Response
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LM308A
INPUT GUARDING input pins are adjacent to pins that are at supply potentials.
Special care must be taken in the assembly of printed This leakage can be significantly reduced by using guarding
circuit boards to take full advantage of the low input currents to lower the voltage difference between the inputs and
of the LM308A amplifier. Boards must be thoroughly adjacent metal runs. The guard, which is a conductive ring
cleaned with alcohol and blown dry with compressed air. surrounding the inputs, is connected to a low−impedance
After cleaning, the boards should be coated with epoxy or point that is at approximately the same voltage as the inputs.
silicone rubber to prevent contamination. Leakage currents from high voltage pins are then absorbed
Even with properly cleaned and coated boards, leakage by the guard.
currents may cause trouble at +125°C, particularly since the
C5 (2)
RS
Input
R1 R4
150k 0.002µF
0.002 150pF
µF 1
R2 6 VCC
2 Output
1M
LM308A 1.0M
3 LM101A(3) Input
Compen B 1.0M or equiv
300pF Q1
Sample
Q2 Output
(1) Power Bandwidth: 250 kHz (3) In addition to increasing speed,
Small Signal Bandwidth: the LM101A raises high and low 1.0µF (1)
3.5 MHz frequency gain, increases output 30pF
Slew Rate: 10 V/µs drive capability and eliminates
thermal feedback.
6 X 10−8 (1) Teflon, Polyethylene or Polycarbonate
(2) C5 =
R1 Dielectric Capacitor
Figure 7. Fast (1) Summing Amplifier with Figure 8. Sample and Hold
Low Input Current
R1 R2 R2
Input R3 (1)
R3 (1)
Output
Output Input Output
R3 (1) R1
C1
C1 C1
Input
R1 R2
(1) Used to compensate for large source resistances. Note: must be an impedance.
R1 +R2
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LM308A
Compensation A Compensation B
VCC
3.5k 5.6k 7.5k
15pF
17.4k 17.4k
1.0k
7.5k 1.4k
200
7.0k VCC Output
65
1.0k 1.0k
150
80k VEE
Inputs 2.0k 2.0k
)
20k
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LM308A
PACKAGE DIMENSIONS
PDIP−8
N SUFFIX
CASE 626−05
ISSUE K
NOTES:
1. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
8 5 2. PACKAGE CONTOUR OPTIONAL (ROUND OR
SQUARE CORNERS).
3. DIMENSIONING AND TOLERANCING PER ANSI
−B− Y14.5M, 1982.
1 4 MILLIMETERS INCHES
DIM MIN MAX MIN MAX
A 9.40 10.16 0.370 0.400
B 6.10 6.60 0.240 0.260
F C 3.94 4.45 0.155 0.175
D
NOTE 2 −A− F
0.38
1.02
0.51
1.78
0.015
0.040
0.020
0.070
L G 2.54 BSC 0.100 BSC
H 0.76 1.27 0.030 0.050
J 0.20 0.30 0.008 0.012
K 2.92 3.43 0.115 0.135
C L 7.62 BSC 0.300 BSC
M −−− 10_ −−− 10_
J N 0.76 1.01 0.030 0.040
−T−
SEATING N
PLANE
M
D K
H G
0.13 (0.005) M T A M B M
SO−8
D SUFFIX
CASE 751−06
ISSUE T
NOTES:
A D
C 1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. DIMENSIONS ARE IN MILLIMETER.
8 5 3. DIMENSION D AND E DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.
E H 0.25 M B M 5. DIMENSION B DOES NOT INCLUDE DAMBAR
1 PROTRUSION. ALLOWABLE DAMBAR
4 PROTRUSION SHALL BE 0.127 TOTAL IN EXCESS
OF THE B DIMENSION AT MAXIMUM MATERIAL
CONDITION.
h X 45 _
q MILLIMETERS
B e DIM MIN MAX
A 1.35 1.75
A A1 0.10 0.25
C B 0.35 0.49
SEATING C 0.19 0.25
PLANE D 4.80 5.00
L E 3.80 4.00
0.10 e 1.27 BSC
H 5.80 6.20
A1 B h 0.25 0.50
L 0.40 1.25
0.25 M C B S A S
q 0_ 7_
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LM308A
Notes
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LM308A
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without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular
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including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be
validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.
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EUROPE: LDC for ON Semiconductor − European Support JAPAN: ON Semiconductor, Japan Customer Focus Center
German Phone: (+1) 303−308−7140 (M−F 1:00pm to 5:00pm Munich Time) 4−32−1 Nishi−Gotanda, Shinagawa−ku, Tokyo, Japan 141−0031
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