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Commutation of
Thyristor-Based Circuits
Part-I
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Dr.Arkan A.Hussein Power Electronics Fourth Class
In all practical cases, a negative current flows through the device. This current returns to zero
only after the reverse recovery time trr, when the SCR is said to have regained its reverse
blocking capability. The device can block a forward voltage only after a further tfr, the forward
recovery time has elapsed. Consequently, the SCR must continue to be reverse-biased for a
minimum of tfr + trr = tq, the rated turn-off time of the device. The external circuit must therefore
reverse bias the SCR for a time toff > tq. Subsequently, the reapplied forward biasing voltage must
rise at a dv/dt < dv/dt (reapplied) rated. This dv/dt is less than the static counterpart. General
Electric has suggested six classification methods for the turn-off techniques generally adopted
SCRs have turn-off times rated between 8 - 50 μsecs. The faster ones are popularly
for the SCR. Others have chosen different classification rules.
known as 'Inverter grade' and the slower ones as 'Converter grade' SCRs. The latter are available
at higher current levels while the faster ones are expectedly costlier.
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Dr.Arkan A.Hussein Power Electronics Fourth Class
Fig. 3.2 A resonant load commutated SCR and the corresponding waveforms
When the SCR is triggered, anode current flows and charges up C with the dot as positive. The
L-C-R form a second order under-damped circuit. The current through the SCR builds up and
completes a half cycle. The inductor current will then attempt to flow through the SCR in the
reverse direction and the SCR will be turned off.
V⎡ ⎤
The solution of the above equation is of the form
ω n2 −t RC
i (t ) = ⎢1 + sin( wt + φ )⎥
1−ξ 2 ξ
1
R⎢ ⎥⎦
⎣
e
where,
ξ= , ω n = L , ω = ω n 1 − ξ 2 , φ = tan −1 2 RCω
1 L
2R C C
and
⎡ ω2 ⎤
v(t ) = V ⎢ e −t 2 RC sin(ωt ) + 1⎥
⎢⎣ 1 − ξ 2 ⎥⎦
n
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Dr.Arkan A.Hussein Power Electronics Fourth Class
The capacitor voltage is at its peak when the SCR turns off and the capacitor discharges into
the resistance in an exponential manner. The SCR is reverse-biased till the capacitor voltages
returns to the level of the supply voltage V.
Soln # 1
The commutating capacitor is charged to the supply voltage = 100 V
i peak = V C
The peak resonant current is,
L
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Dr.Arkan A.Hussein Power Electronics Fourth Class
C = (15 ) 2 = 0.0225
L 100
The SCR commutates when the total current through it reaches zero.This corresponds to 0.73
rads after the zero crossing of the resonant current. The capacitor voltage at that instant is 75
volts. After the SCR turns off, the capacitor is charged linearly by the load current.
20.20 μF
C=
75
= 15.33 ≈ 15 μF
L= = 667 ≈ 700
μH
C
0.0225
Fig. 3.4 Class C turn-off, SCR switched off by another load-carring SCR
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Dr.Arkan A.Hussein Power Electronics Fourth Class
The circuit shown in Figure 3.3 (Class C) can be converted to Class D if the load current is
carried by only one of the SCR’s, the other acting as an auxiliary turn-off SCR. The auxiliary
SCR would have a resistor in its anode lead of say ten times the load resistance.
Example 2
SCRA must be triggered first in order to charge the upper terminal of the capacitor as
positive. As soon as C is charged to the supply voltage, SCRA will turn off. If there is substantial
inductance in the input lines, the capacitor may charge to voltages in excess of the supply
voltage. This extra voltage would discharge through the diode-inductor-load circuit.
When SCRM is triggered the current flows in two paths: Load current flows through the
load and the commutating current flows through C- SCRM -L-D network. The charge on C is
reversed and held at that level by the diode D. When SCRA is re-triggered, the voltage across C
appears across SCRM via SCRA and SCRM is turned off. If the load carries a constant current as
in Fig. 3.4, the capacitor again charges linearly to the dot as positive.
Problem # 2
A Class D turn-off circuit has a commutating capacitor of 10 μF. The load consists of a clamped
grade' SCR has a turn-off time of 12 μsecs. Determine whether the SCR will be satisfactorily
inductive load such that the load current is reasonably constant at 25 amperes. The 'Inverter
commutated. Also dimension the commutating inductor. The supply voltage is 220 VDC.
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Dr.Arkan A.Hussein Power Electronics Fourth Class
Soln # 2
The capacitor is initially charged to the supply voltage 220 V at the end of the conduction period
of SCRA.
When SCRM is triggered, the 25 Amps load current and the L-C ringing current flows
through it. Peak current through SCR is
= = 0.0568
C 25
L
L = 3 .1
2.220
mH
Assuming that the capacitor charges to 70% of its original charge because of losses in the
C- SCRM -L-D network, and it charges linearly when SCRA is again triggered,
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Dr.Arkan A.Hussein Power Electronics Fourth Class
SCR
LOAD
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Dr.Arkan A.Hussein Power Electronics Fourth Class
energy trapped in the load inductance is dissipated. During the negative half cycle, therefore, the
SCR will turn off when the load current becomes zero 'naturally'. The negative polarity of the
voltage appearing across the outgoing SCR turns it off if the voltage persists for the rated turn-
off period of the device. The duration of the half cycle must be definitely longer than the turn-
off time of the SCR.
The rectifier in Fig.3.6 is supplied from an single phase AC supply. The commutation
process involved here is representative of that in a three phase converter. The converter has an
input inductance Ls arising manly out of the leakage reactance of the supply transformer.
Initially, SCRs Th1 and Th1' are considered to be conducting. The triggering angle for the
converter is around 600. The converter is operating in the continuous conduction mode aided by
the highly-inductive load.
When the incoming SCRs, Th2 and Th2' are triggered, the current through the incoming
devices cannot rise instantaneously to the load current level. A circulating current Isc builds up in
the short-circuited path including the supply voltage, Vs-Ls-Th1'- Th2 and Vs- Ls-Th2'-Th1 paths.
This current can be described by:
Vs sin(ωt − 90 0 ) Vs V cos(ωt ) Vs
I sc = + cos α = s + cos α
ωL s ωLs ωLs ωL s
where α the triggering angle and Isc and Vs as shown in Fig. 3.6.
This expression is obtained with the simplifying assumption that the input inductance
contains no resistances. When the current rises in the incoming SCRs, which in the outgoing
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Dr.Arkan A.Hussein Power Electronics Fourth Class
ones fall such that the total current remains constant at the load current level. When the current in
the incoming ones reach load current level, the turn-off process of the outgoing ones is initiated.
The reverse biasing voltage of these SCRs must continue till they reach their forward blocking
angle. It is lowest when α ~ 900. These SCRs being 'Converter grade', they have a larger turn-off
state. As is evident from the above expression, the overlap period is a function of the triggering
The majority of inverter applications, however, would result in circuit malfunction due to
dv/dt turn-on. One solution to this problem is to reduce the dv/dt imposed by the circuit to a
value less than the critical dv/dt of the SCR being used. This is accomplished by the use of a
circuit similar to those in Figure 3.8 to suppress excessive rate of rise of anode voltage. Z
represents load impedance and circuit impedance. Variations of the basic circuit is also shown
where the section of the network shown replaces the SCR and the R-C basic snubber.
Since circuit impedances are not usually well defined for a particular application, the values
of R and C are often determined by experimental optimization. A technique can be used to
simplify snubber circuit design by the use of nomographs which enable the circuit designer to
select an optimized R-C snubber for a particular set of circuit operating conditions.
Another solution to the dv/dt turn-on problem is to use an SCR with higher dv/dt turn-on
problem is to use an SCR with higher dv/dt capability. This can be done by selecting an SCR
designed specially for high dv/dt applications, as indicated by the specification sheet. Emitter
shorting is a manufacturing technique used to accomplish high dv/dt capability.
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Dr.Arkan A.Hussein Power Electronics Fourth Class
Ans: (Hints): The capacitor would now charge in an exponential manner. The time it takes to
#2 For a Class F converter, will the overlap period rise with the leakage inductance of the
converter? What happens to the output voltage?
Ans: Yes. The overlap time is directly related to the commutating inductance. The output
voltage decreases. In fact, this inductor limits the maximum output current of the converter. The
input current maximum would be as for a shorted network with the leakage inductance only
present.
Ans: Yes. Most of the above circuits are also called 'forced commutated' DC-DC chopper
circuits.
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