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Intel Pentium 4
1.E+07
Intel Pentium
1.E+05 Intel 386
Intel 8086
1.00
per transistor
0.10
0.01
2000 2004 2008 2012 2016
Data from Intel (http://www.pcworld.com/article/2887275/intel-moores-law-will-continue-through-7nm-chips.html)
Demagnifying Wafer
lens
Res /NA
Berkeley Lab | MSD Materials Sciences Division 8
Moore’s Law driven by wavelength shrink
1.E+11
Number of Transistors
White
438 nm
365 nm
1.E+09
1.E+07
13.5 nm
193i nm
193 nm
248nm
1.E+05
1.E+03
1970 1980 1990 2000 2010 2020
Illuminator Projection
Intermediate optics
focus
Source
Plasma
Collector
Wafer
Berkeley Lab | MSD Materials Sciences Division 11
Near term source power requirements
Wafer Throughput wafer/h 145
Total wafer time sec 24.8
Stage motion overhead sec 18
Wafer exposure time sec 6.8
Wafer diameter mm 300
Wafer fill factor % 89%
Required
Resist Sensitivity
Required Power at Wafer
mJ/cm^2
W
15
1.38
source power
POB reflectivity (0.66^6) % 8.27% = 250W
Mask reflectivity % 62%
Illuminator reflectivity (0.66^4) % 18.97%
Overfill efficiency % 75%
Pellicle efficiency % 76%
Total Optical Efficiency % 0.55%
Dose
• 15 mJ/cm2
likely not
enough in
the future
Dose
• 15 mJ/cm2
likely not
enough in
the future
𝐿𝑊𝑅 ∝ 1 𝑑𝑜𝑠𝑒
2-4x more power
Berkeley Lab | MSD Materials Sciences Division 20
Depending on resist performance,
future power needs could range
from 500W to 2000W
• Allowable
source footprint:
~ 10m x 3m
• Multilayer BW limits
require pulse > 2.5 fs
• Longer is better to avoid
optics damage issues
• No longitudinal
coherence needed
• No lateral coherence
needed (coherence
must be destroyed)
Berkeley Lab | MSD Materials Sciences Division Data courtesy of K. Goldberg, A. Wojdyla, LBNL
Summary