301 chap1

Learning outcome
1. boolean algebra, combinational logic gates and relaxation oscillators
Assessment criteria – Practical
practical not required
Assessment criteria – Knowledge
The learner can:
1.1 explain laws of boolean algebra and their relationship with switch circuits for
logic functions
1.2 explain functions of logic gates and construct their truth tables
1.3 identify the British standard (BS) and American military standard (mil) symbols
for logic gates
1.4 construct truth tables for combined logic functions
1.5 use truth tables to derive boolean expressions for the output function in terms of
the inputs
1.6 derive not and and or functions using nand or nor logic gates
1.7 determine boolean expressions from logic networks and vice versa
1.8 state de morgans theorem
1.9 prove de morgans theorem using truth tables
1.10 explain the relevance of de morgans theorem in logic circuit design
1.11 minimise combined logic functions using boolean algebra and/or karnaugh map
1.12 distinguish between relaxation and sine wave oscillators
1.13 identify symbols for multivibrators
1.14 explain using waveform diagrams, the operation of multivibrators
1.15 explain applications for multivibrators
1.16 explain how a bistable may be implemented using either nand or nor gates
1.17 construct truth tables for bistable multivibrators
301 chap1

laws of boolean algebra and their relationship with switch circuits for logic
functions
As well as the logic symbols “0” and “1” being used to represent a digital input or output, we can
also use them as constants for a permanently “Open” or “Closed” circuit or contact respectively.
A set of rules or Laws of Boolean Algebra expressions have been invented to help reduce the
number of logic gates needed to perform a particular logic operation resulting in a list of
functions or theorems known commonly as the Laws of Boolean Algebra.
Boolean Algebra is the mathematics we use to analyse digital gates and circuits. We can use
these “Laws of Boolean” to both reduce and simplify a complex Boolean expression in an
attempt to reduce the number of logic gates required. Boolean Algebra is therefore a system of
mathematics based on logic that has its own set of rules or laws which are used to define and
reduce Boolean expressions.
The variables used in Boolean Algebra only have one of two possible values, a logic “0” and a
logic “1” but an expression can have an infinite number of variables all labelled individually to
represent inputs to the expression, For example, variables A, B, C etc, giving us a logical
expression of A + B = C, but each variable can ONLY be a 0 or a 1.
Examples of these individual laws of Boolean, rules and theorems for Boolean Algebra are
given in the following table.

Truth Tables for the Laws of Boolean

B
o B
o o
l o
e l
a e
n a
n
E
x A
p l
r g
e e
s b
s r
i a
301 chap1

L
a
w

o o
n r

R
u
l
e

A A
n
+ n
u
1 l
m
= e
n
1 t

A
I
d
+
e
n
0
t
i
=
t
y
A

A
I
d
.
e
n
1
t
i
=
t
y
A

A A
n
. n
u
301 chap1

0 l
m
= e
n
0 t

I
A
d
e
+
m
p
A
o
t
=
e
n
A
t

I
A
d
e
.
m
p
A
o
t
=
e
n
A
t

D
o
u
N b
O l
T e
 
A N
  e
= g
  a
A t
i
o
n

A C
o
+ m
301 chap1

p
 
l
A
e
 
m
=
e
 
n
1
t

C
A
o
m
.
p
 
l
A
e
 
m
=
e
 
n
0
t

C
A o
+ m
B m
  u
= t
  a
B t
+ i
A v
e

C
A o
. m
B m
  u
= t
  a
B t
. i
A v
e

A d
+ e
B
  M
301 chap1

o
r
g
a
n
= ’
  s
A
. T
B h
e
o
r
e
m

d
e

M
o
A r
. g
B a
  n
= ’
  s
A
+ T
B h
e
o
r
e
m
The basic Laws of Boolean Algebra that relate to the Commutative Law allowing a change in position
for addition and multiplication, the Associative Law allowing the removal of brackets for addition and
multiplication, as well as the Distributive Lawallowing the factoring of an expression, are the same as in
ordinary algebra.
Each of the Boolean Laws above are given with just a single or two variables, but the number of variables
defined by a single law is not limited to this as there can be an infinite number of variables as inputs too
the expression. These Boolean laws detailed above can be used to prove any given Boolean expression
as well as for simplifying complicated digital circuits.
A brief description of the various Laws of Boolean are given below with Arepresenting a variable input.
Description of the Laws of Boolean Algebra
Annulment Law – A term AND´ed with a “0” equals 0 or OR´ed with a “1” will equal 1
 301 chap1

o  A . 0 = 0    A variable AND’ed with 0 is always equal to 0

o A + 1 = 1    A variable OR’ed with 1 is always equal to 1

 Identity Law – A term OR´ed with a “0” or AND´ed with a “1” will always equal that term

o  A + 0 = A   A variable OR’ed with 0 is always equal to the variable

o A . 1 = A    A variable AND’ed with 1 is always equal to the variable

 Idempotent Law – An input that is AND´ed or OR´ed with itself is equal to that input
  

o A + A = A    A variable OR’ed with itself is always equal to the variable

o A . A = A    A variable AND’ed with itself is always equal to the variable

 Complement Law – A term AND´ed with its complement equals “0” and a term OR´ed with its
complement equals “1”
 

o A . A = 0    A variable AND’ed with its complement is always equal to 0

o A + A = 1    A variable OR’ed with its complement is always equal to 1

  Commutative Law – The order of application of two separate terms is not important
  

o A . B = B . A    The order in which two variables are AND’ed makes no

difference
o A + B = B + A    The order in which two variables are OR’ed makes no
difference

  Double Negation Law – A term that is inverted twice is equal to the original term

o  A = A     A double complement of a variable is always equal to the variable

  de Morgan´s Theorem – There are two “de Morgan´s” rules or theorems,

  (1) Two separate terms NOR´ed together is the same as the two terms inverted
(Complement) and AND´ed for example:  A+B = A . B

  (2) Two separate terms NAND´ed together is the same as the two terms inverted
(Complement) and OR´ed for example:  A.B = A + B
 Other algebraic Laws of Boolean not detailed above include:

 Distributive Law – This law permits the multiplying or factoring out of an expression.
  
 301 chap1

o A(B + C) = A.B + A.C    (OR Distributive Law)

o A + (B.C) = (A + B).(A + C)    (AND Distributive Law)

  Absorptive Law – This law enables a reduction in a complicated expression to a simpler

one by absorbing like terms.

o  A + (A.B) = A    (OR Absorption Law)

o A(A + B) = A    (AND Absorption Law)

  Associative Law – This law allows the removal of brackets from an expression and
regrouping of the variables.

o  A + (B + C) = (A + B) + C = A + B + C    (OR Associate Law)

o A(B.C) = (A.B)C = A . B . C    (AND Associate Law)

Boolean Algebra Functions

Using the information above, simple 2-input AND, OR and NOT Gates can be represented by
16 possible functions as shown in the following table.

Function Description Expression

1. NULL 0

2. IDENTITY 1

3. Input A A

4. Input B B

5. NOT A A

6. NOT B B

7. A AND B (AND) A . B

8. A AND NOT B A . B

9. NOT A AND B A . B

10. NOT AND (NAND) A . B

11. A OR B (OR) A + B

12. A OR NOT B A + B

 301 chap1

13. NOT A OR B A + B

14. NOT OR (NOR) A + B

15. Exclusive-OR A . B + A . B

16. Exclusive-NOR A . B + A . B

Laws of Boolean Algebra Example No1

Using the above laws, simplify the following expression:  (A + B)(A + C)

Q= (A + B).(A + C)  

A.A + A.C + A.B +

   – Distributive law
B.C

 – Idempotent AND law (A.A =

  A + A.C + A.B + B.C
A)

  A(1 + C) + A.B + B.C  – Distributive law

  A.1 + A.B + B.C  – Identity OR law (1 + C = 1)

  A(1 + B) + B.C  – Distributive law

  A.1 + B.C  – Identity OR law (1 + B = 1)

Q= A + (B.C)  – Identity AND law (A.1 = A)

 
Then the expression:  (A + B)(A + C) can be simplified to A + (B.C) as in the Distributive law.

functions of logic gates and construct their truth tables

As well as a standard Boolean Expression, the input and output information of any Logic Gate or circuit
can be plotted into a standard table to give a visual representation of the switching function of the
system.
The table used to represent the boolean expression of a logic gate function is commonly called a Truth
Table. A logic gate truth table shows each possible input combination to the gate or circuit with the
resultant output depending upon the combination of these input(s).
For example, consider a single 2-input logic circuit with input variables labelled as A and B. There are
“four” possible input combinations or 22 of “OFF” and “ON” for the two inputs. However, when dealing
with Boolean expressions and especially logic gate truth tables, we do not general use “ON” or “OFF”
but instead give them bit values which represent a logic level “1” or a logic level “0” respectively.
Then the four possible combinations of A and B for a 2-input logic gate is given as:
 Input Combination 1. – “OFF” – “OFF” or ( 0, 0 )
 301 chap1

 Input Combination 2. – “OFF” – “ON” or ( 0, 1 )

 Input Combination 3. – “ON” – “OFF” or ( 1, 0 )
 Input Combination 4. – “ON” – “ON” or ( 1, 1 )
Therefore, a 3-input logic circuit would have 8 possible input combinations or 2 3and a 4-input logic
circuit would have 16 or 24, and so on as the number of inputs increases. Then a logic circuit
with “n” number of inputs would have 2n possible input combinations of both “OFF” and “ON”.
So in order to keep things simple to understand, in this tutorial we will only deal with standard 2-
input type logic gates, but the principals are still the same for gates with more than two inputs.
Then the Truth tables for a 2-input AND Gate, a 2-input OR Gate and a single input NOT Gate are given
as:

2-input AND Gate

For a 2-input AND gate, the output Q is true if BOTH input A “AND” input B are both true, giving
the Boolean Expression of: ( Q = A and B ).

Symbol Truth Table

A B Q

0 0 0

0 1 0

1 0 0

1 1 1

Boolean
Expressi
Read as A AND B gives Q
on Q =
A.B
Note that the Boolean Expression for a two input AND gate can be written as: A.Bor just
simply AB without the decimal point.

2-input OR (Inclusive OR) Gate

For a 2-input OR gate, the output Q is true if EITHER input A “OR” input B is true, giving the
Boolean Expression of: ( Q = A or B ).

Symbol Truth Table

A B Q

0 0 0

0 1 1
301 chap1

1 0 1

1 1 1

Boolean
Expressi
Read as A OR B gives Q
on Q =
A+B

NOT Gate (Inverter)

For a single input NOT gate, the output Q is ONLY true when the input is “NOT” true, the output is the
inverse or complement of the input giving the Boolean Expression of: ( Q = NOT A ).
Symbol Truth Table

A Q

0 1

1 0

Boolean
Expression Read as inversion of A
Q = NOT A gives Q
or A
The NAND and the NOR Gates are a combination of the AND and OR Gates respectively with that of
a NOT Gate (inverter).

2-input NAND (Not AND) Gate

For a 2-input NAND gate, the output Q is true if BOTH (or either) input A AND input B are not true, giving
the Boolean Expression of: ( Q = A AND B ).
Symbol Truth Table

A B Q

0 0 1

0 1 1

1 0 1

1 1 0

Boolean Read as not-A AND not-B

Expressi gives Q
301 chap1

on Q
= A .B

2-input NOR (Not OR) Gate

For a 2-input NOR gate, the output Q is true if BOTH (or either) input A AND input B are not true, giving
the Boolean Expression of: ( Q = A AND B ).
Symbol Truth Table

A B Q

0 0 1

0 1 0

1 0 0

1 1 0

Boolean
Expressi Read as not-A AND not-B
on Q gives Q
= A+B
As well as the standard logic gates there are also two special types of logic gate function called
an Exclusive-OR Gate and an Exclusive-NOR Gate. The Boolean expression to indicate an Exclusive-OR or
Exclusive-NOR function is to a symbol with a plus sign inside a circle, ( ⊕ ).
The switching actions of both of these types of gates can be created using the above standard logic
gates. However, as they are widely used functions they are now available in standard IC form and have
been included here as reference.

2-input EX-OR (Exclusive OR) Gate

For a 2-input Ex-OR gate, the output Q is true if EITHER input A or if input B is true, but NOT
both giving the Boolean Expression of: ( Q = (A and NOT B) or (NOT A and B) ).

Symbol Truth Table

A B Q

0 0 0

0 1 1

1 0 1

1 1 0
301 chap1

Boolean
Expressi
 
on Q =
A ⊕ B

2-input EX-NOR (Exclusive NOR) Gate

For a 2-input Ex-NOR gate, the output Q is true if BOTH input A and input B are the same,
either true or false, giving the Boolean Expression of: ( Q = (A and B) or (NOT A and NOT B) ).

Symbol Truth Table

A B Q

0 0 1

0 1 0

1 0 0

1 1 1

Boolean
Expressi
 
on Q
= A ⊕ B

Summary of 2-input Logic Gates

The following Truth Table compares the logical functions of the 2-input logic gates above.

Inputs Truth Table Outputs For Each Gate

A B AND NAND OR NOR EX-OR EX-NOR

0 0 0 1 0 1 0 1

0 1 0 1 1 0 1 0

1 0 0 1 1 0 1 0

1 1 1 0 1 0 0 1
The following table gives a list of the common logic functions and their equivalent Boolean
notation.
301 chap1

Logic Function Boolean Notation

AND A.B

OR A+B

NOT A

NAND A .B

NOR A+B

EX-OR (A.B) + (A.B) or A ⊕ B

EX-NOR (A.B) + (A.B) or A ⊕ B
2-input logic gate truth tables are given here as examples of the operation of each logic
function, but there are many more logic gates with 3, 4 even 8 individual inputs. The multiple
input gates are no different to the simple 2-input gates above, So a 4-input AND gate would still
require ALL 4-inputs to be present to produce the required output at Q and its larger truth table
would reflect that.

British standard (BS) and American military standard (mil) symbols for logic gates
IEC/BritisStandard and US Standard symbols for logic gates

A B F

US Standard symbol for a 0 0 0

AND gate.
0 1 0

1 0 0

IEC/British Standard symbol

for a AND gate. 1 1 1

A B F
 
US Standard symbol for a
301 chap1

0 0 1
NAND gate.

0 1 1

1 0 1
IEC/British Standard symbol
for a NAND gate. 1 1 0

A B F
 
US Standard symbol for a OR 0 0 0
gate.
0 1 1

1 0 1

IEC/British Standard symbol

for a OR gate. 1 1 1

A B F
 
US Standard symbol for a 0 0 1
NOR gate.
0 1 0

1 0 0

IEC/British Standard symbol

for a NOR gate. 1 1 0

A B F
 
US Standard symbol for a
301 chap1

0 0 0
EXCLUSIVE-OR gate.

0 1 1

1 0 1
IEC/British Standard symbol
for a EXCLUSIVE-OR gate. 1 1 0

 
US Standard symbol for a A F
NOT gate.
0 1

1 0

IEC/British Standard symbol

for a NOT gate.
construct truth tables for combined logic functions
Unlike Sequential Logic Circuits whose outputs are dependant on both their present inputs and
their previous output state giving them some form of Memory. The outputs of Combinational
Logic Circuits are only determined by the logical function of their current input state, logic “0”
or logic “1”, at any given instant in time.
The result is that combinational logic circuits have no feedback, and any changes to the signals
being applied to their inputs will immediately have an effect at the output. In other words, in
a Combinational Logic Circuit, the output is dependant at all times on the combination of its
inputs. Thus a combinational circuit is memoryless.
So if one of its inputs condition changes state, from 0-1 or 1-0, so too will the resulting output as
by default combinational logic circuits have “no memory”, “timing” or “feedback loops” within
their design.

Combinational Logic
 301 chap1

 
Combinational Logic Circuits are made up from basic logic NAND, NOR or NOT gates that are
“combined” or connected together to produce more complicated switching circuits. These logic gates
are the building blocks of combinational logic circuits. An example of a combinational circuit is a
decoder, which converts the binary code data present at its input into a number of different output
lines, one at a time producing an equivalent decimal code at its output.
Combinational logic circuits can be very simple or very complicated and any combinational circuit can be
implemented with only NAND and NOR gates as these are classed as “universal” gates.
The three main ways of specifying the function of a combinational logic circuit are:
 1. Boolean Algebra – This forms the algebraic expression showing the operation of the
logic circuit for each input variable either True or False that results in a logic “1” output.
 2. Truth Table – A truth table defines the function of a logic gate by providing a concise
list that shows all the output states in tabular form for each possible combination of input
variable that the gate could encounter.
 3. Logic Diagram – This is a graphical representation of a logic circuit that shows the
wiring and connections of each individual logic gate, represented by a specific graphical
symbol, that implements the logic circuit.
and all three of these logic circuit representations are shown below.

 
As combinational logic circuits are made up from individual logic gates only, they can also be considered
as “decision making circuits” and combinational logic is about combining logic gates together to process
two or more signals in order to produce at least one output signal according to the logical function of
each logic gate. Common combinational circuits made up from individual logic gates that carry out a
desired application include Multiplexers, De-multiplexers, Encoders, Decoders, Full and Half Adders etc.
Classification of Combinational Logic
 301 chap1

 
One of the most common uses of combinational logic is in Multiplexer and De-multiplexer type circuits.
Here, multiple inputs or outputs are connected to a common signal line and logic gates are used to
decode an address to select a single data input or output switch.
A multiplexer consist of two separate components, a logic decoder and some solid state switches, but
before we can discuss multiplexers, decoders and de-multiplexers in more detail we first need to
understand how these devices use these “solid state switches” in their design.
Solid State Switches
Standard TTL logic devices made up from Transistors can only pass signal currents in one direction only
making them “uni-directional” devices and poor imitations of conventional electro-mechanical switches
or relays. However, some CMOS switching devices made up from FET’s act as near perfect “bi-
directional” switches making them ideal for use as solid state switches.
Solid state switches come in a variety of different types and ratings, and there are many different
applications for using solid state switches. They can basically be sub-divided into 3 different main groups
for switching applications and in this combinational logic section we will only look at the Analogue type
of switch but the principal is the same for all types including digital.
Solid State Switch Applications
 Analogue Switches – Used in Data Switching and Communications, Video and Audio
Signal Switching, Instrumentation and Process Control Circuits …etc.
 Digital Switches – High Speed Data Transmission, Switching and Signal Routing,
Ethernet, LAN’s, USB and Serial Transmissions …etc.
 Power Switches – Power Supplies and General “Standby Power” Switching Applications,
Switching of Larger Voltages and Currents …etc.
Analogue Bilateral Switches
Analogue or “Analog” switches are those types that are used to switch data or signal currents when they
are in their “ON” state and block them when they are in their “OFF” state. The rapid switching between
the “ON” and the “OFF” state is usually controlled by a digital signal applied to the control gate of the
switch. An ideal analogue switch has zero resistance when “ON” (or closed), and infinite resistance when
“OFF” (or open) and switches with RON values of less than 1Ω are commonly available.
Solid State Analogue Switch
301 chap1

 
By connecting an N-channel MOSFET in parallel with a P-channel MOSFET allows signals to pass in either
direction making it a “Bi-directional” switch and as to whether the N-channel or the P-channel device
carries more signal current will depend upon the ratio between the input to the output voltage. The two
MOSFET’s are switched “ON” or “OFF” by two internal non-inverting and inverting amplifiers.
Contact Types
Just like mechanical switches, analogue switches come in a variety of forms or contact types, depending
on the number of “poles” and “throws” they offer. Thus, terms such as “SPST” (single-pole single throw)
and “SPDT” (single-pole double-throw) also apply to solid state analogue switches with “make-before-
break” and “break-before-make” configurations available.
Analogue Switch Types

 
Individual analogue switches can be grouped together into standard IC packages to form devices with
multiple switching configurations of SPST (single-pole single-throw) and SPDT (single-pole double-throw)
as well as multi channel multiplexers.
The most common and simplest analogue switch in a single IC package is the 74HC4066 which has 4
independent bi-directional “ON/OFF” Switches within a single package but the most widely used
variants of the CMOS analogue switch are those described as “Multi-way Bilateral Switches” otherwise
known as the “Multiplexer” and “De-multiplexer” IC´s and these are discussed in the next tutorial.

Combinational Logic Summary

Then to summarise, Combinational Logic Circuits consist of inputs, two or more basic logic gates and
outputs. The logic gates are combined in such a way that the output state depends entirely on the input
301 chap1

states. Combinational logic circuits have “no memory”, “timing” or “feedback loops”, there operation is
instantaneous. A combinational logic circuit performs an operation assigned logically by a Boolean
expression or truth table.
Examples of common combinational logic circuits include: half adders, full adders, multiplexers,
demultiplexers, encoders and decoders all of which we will look at in the next few tutorials.

truth tables to derive boolean expressions for the output function in terms of the
inputs
Converting Truth Tables into Boolean Expressions
In designing digital circuits, the designer often begins with a truth table describing
what the circuit should do. The design task is largely to determine what type of circuit
will perform the function described in the truth table. While some people seem to have
a natural ability to look at a truth table and immediately envision the necessary logic
gate or relay logic circuitry for the task, there are procedural techniques available for
the rest of us. Here, Boolean algebra proves its utility in a most dramatic way.
To illustrate this procedural method, we should begin with a realistic design problem.
Suppose we were given the task of designing a flame detection circuit for a toxic waste
incinerator. The intense heat of the fire is intended to neutralize the toxicity of the
waste introduced into the incinerator. Such combustion-based techniques are
commonly used to neutralize medical waste, which may be infected with deadly viruses
or bacteria:

So long as a flame is maintained in the incinerator, it is safe to inject waste into it to be

neutralized. If the flame were to be extinguished, however, it would be unsafe to
continue to inject waste into the combustion chamber, as it would exit the exhaust un-
neutralized, and pose a health threat to anyone in close proximity to the exhaust. What
we need in this system is a sure way of detecting the presence of a flame, and
permitting waste to be injected only if a flame is “proven” by the flame detection
system.
Several different flame-detection technologies exist: optical (detection of light),
thermal (detection of high temperature), and electrical conduction (detection of ionized
particles in the flame path), each one with its unique advantages and disadvantages.
Suppose that due to the high degree of hazard involved with potentially passing un-
neutralized waste out the exhaust of this incinerator, it is decided that the flame
detection system be made redundant (multiple sensors), so that failure of a single
sensor does not lead to an emission of toxins out the exhaust. Each sensor comes
equipped with a normally-open contact (open if no flame, closed if flame detected)
which we will use to activate the inputs of a logic system:
301 chap1

Our task, now, is to design the circuitry of the logic system to open the waste valve if
and only if there is good flame proven by the sensors. First, though, we must decide
what the logical behavior of this control system should be. Do we want the valve to be
opened if only one out of the three sensors detects flame? Probably not, because this
would defeat the purpose of having multiple sensors. If any one of the sensors were to
fail in such a way as to falsely indicate the presence of flame when there was none, a
logic system based on the principle of “any one out of three sensors showing flame”
would give the same output that a single-sensor system would with the same failure. A
far better solution would be to design the system so that the valve is commanded to
open if and only if all three sensors detect a good flame. This way, any single, failed
sensor falsely showing flame could not keep the valve in the open position; rather, it
would require all three sensors to be failed in the same manner—a highly improbable
scenario—for this dangerous condition to occur.
Thus, our truth table would look like this:

It does not require much insight to realize that this functionality could be generated
with a three-input AND gate: the output of the circuit will be “high” if and only if input
A AND input B AND input C are all “high:”
301 chap1

If using relay circuitry, we could create this AND function by wiring three relay contacts
in series, or simply by wiring the three sensor contacts in series, so that the only way
electrical power could be sent to open the waste valve is if all three sensors indicate
flame:

While this design strategy maximizes safety, it makes the system very susceptible to
sensor failures of the opposite kind. Suppose that one of the three sensors were to fail
in such a way that it indicated no flame when there really was a good flame in the
incinerator’s combustion chamber. That single failure would shut off the waste valve
unnecessarily, resulting in lost production time and wasted fuel (feeding a fire that
wasn’t being used to incinerate waste).
It would be nice to have a logic system that allowed for this kind of failure without
shutting the system down unnecessarily, yet still provide sensor redundancy so as to
maintain safety in the event that any single sensor failed “high” (showing flame at all
times, whether or not there was one to detect). A strategy that would meet both needs
would be a “two out of three” sensor logic, whereby the waste valve is opened if at
least two out of the three sensors show good flame. The truth table for such a system
would look like this:
301 chap1

Here, it is not necessarily obvious what kind of logic circuit would satisfy the truth
table. However, a simple method for designing such a circuit is found in a standard form
of Boolean expression called the Sum-Of-Products, or SOP, form. As you might
suspect, a Sum-Of-Products Boolean expression is literally a set of Boolean terms
added (summed) together, each term being a multiplicative (product) combination of
Boolean variables. An example of an SOP expression would be something like this: ABC
+ BC + DF, the sum of products “ABC,” “BC,” and “DF.”
Sum-Of-Products expressions are easy to generate from truth tables. All we have to do
is examine the truth table for any rows where the output is “high” (1), and write a
Boolean product term that would equal a value of 1 given those input conditions. For
instance, in the fourth row down in the truth table for our two-out-of-three logic system,
where A=0, B=1, and C=1, the product term would be A’BC, since that term would have
a value of 1 if and only if A=0, B=1, and C=1:

Three other rows of the truth table have an output value of 1, so those rows also need
Boolean product expressions to represent them:
301 chap1

Finally, we join these four Boolean product expressions together by addition, to create
a single Boolean expression describing the truth table as a whole:

Now that we have a Boolean Sum-Of-Products expression for the truth table’s function,
we can easily design a logic gate or relay logic circuit based on that expression:

Unfortunately, both of these circuits are quite complex, and could benefit from
simplification. Using Boolean algebra techniques, the expression may be significantly
simplified:
301 chap1

As a result of the simplification, we can now build much simpler logic circuits
performing the same function, in either gate or relay form:

Either one of these circuits will adequately perform the task of operating the
incinerator waste valve based on a flame verification from two out of the three flame
sensors. At minimum, this is what we need to have a safe incinerator system. We can,
however, extend the functionality of the system by adding to it logic circuitry designed
to detect if any one of the sensors does not agree with the other two.
301 chap1

If all three sensors are operating properly, they should detect flame with equal
accuracy. Thus, they should either all register “low” (000: no flame) or all register
“high” (111: good flame). Any other output combination (001, 010, 011, 100, 101, or 110)
constitutes a disagreement between sensors, and may therefore serve as an indicator
of a potential sensor failure. If we added circuitry to detect any one of the six “sensor
disagreement” conditions, we could use the output of that circuitry to activate an
alarm. Whoever is monitoring the incinerator would then exercise judgment in either
continuing to operate with a possible failed sensor (inputs: 011, 101, or 110), or shut
the incinerator down to be absolutely safe. Also, if the incinerator is shut down (no
flame), and one or more of the sensors still indicates flame (001, 010, 011, 100, 101, or
110) while the other(s) indicate(s) no flame, it will be known that a definite sensor
problem exists.
The first step in designing this “sensor disagreement” detection circuit is to write a
truth table describing its behavior. Since we already have a truth table describing the
output of the “good flame” logic circuit, we can simply add another output column to
the table to represent the second circuit, and make a table representing the entire logic
system:

While it is possible to generate a Sum-Of-Products expression for this new truth table
column, it would require six terms, of three variables each! Such a Boolean expression
would require many steps to simplify, with a large potential for making algebraic errors:
301 chap1

An alternative to generating a Sum-Of-Products expression to account for all the “high”

(1) output conditions in the truth table is to generate a Product-Of-Sums, or POS,
expression, to account for all the “low” (0) output conditions instead. Being that there
are much fewer instances of a “low” output in the last truth table column, the resulting
Product-Of-Sums expression should contain fewer terms. As its name suggests, a
Product-Of-Sums expression is a set of added terms (sums), which are multiplied
(product) together. An example of a POS expression would be (A + B)(C + D), the
product of the sums “A + B” and “C + D”.
To begin, we identify which rows in the last truth table column have “low” (0) outputs,
and write a Boolean sum term that would equal 0 for that row’s input conditions. For
instance, in the first row of the truth table, where A=0, B=0, and C=0, the sum term
would be (A + B + C), since that term would have a value of 0 if and only if A=0, B=0, and
C=0:

Only one other row in the last truth table column has a “low” (0) output, so all we need
is one more sum term to complete our Product-Of-Sums expression. This last sum term
represents a 0 output for an input condition of A=1, B=1 and C=1. Therefore, the term
must be written as (A’ + B’+ C’), because only the sum of the complemented input
variables would equal 0 for that condition only:
301 chap1

The completed Product-Of-Sums expression, of course, is the multiplicative

combination of these two sum terms:

Whereas a Sum-Of-Products expression could be implemented in the form of a set of

AND gates with their outputs connecting to a single OR gate, a Product-Of-Sums
expression can be implemented as a set of OR gates feeding into a single AND gate:

Correspondingly, whereas a Sum-Of-Products expression could be implemented as a

parallel collection of series-connected relay contacts, a Product-Of-Sums expression
can be implemented as a series collection of parallel-connected relay contacts:

The previous two circuits represent different versions of the “sensor disagreement”
logic circuit only, not the “good flame” detection circuit(s). The entire logic system
301 chap1

would be the combination of both “good flame” and “sensor disagreement” circuits,
shown on the same diagram.
Implemented in a Programmable Logic Controller (PLC), the entire logic system might
resemble something like this:

As you can see, both the Sum-Of-Products and Products-Of-Sums standard Boolean
forms are powerful tools when applied to truth tables. They allow us to derive a
Boolean expression—and ultimately, an actual logic circuit—from nothing but a truth
table, which is a written specification for what we want a logic circuit to do. To be able
to go from a written specification to an actual circuit using simple, deterministic
procedures means that it is possible to automate the design process for a digital
circuit. In other words, a computer could be programmed to design a custom logic
circuit from a truth table specification! The steps to take from a truth table to the final
circuit are so unambiguous and direct that it requires little, if any, creativity or other
original thought to execute them.
 REVIEW:
 Sum-Of-Products, or SOP, Boolean expressions may be generated from truth
tables quite easily, by determining which rows of the table have an output of 1,
writing one product term for each row, and finally summing all the product terms.
This creates a Boolean expression representing the truth table as a whole.
 Sum-Of-Products expressions lend themselves well to implementation as a set of
AND gates (products) feeding into a single OR gate (sum).
 Product-Of-Sums, or POS, Boolean expressions may also be generated from truth
tables quite easily, by determining which rows of the table have an output of 0,
writing one sum term for each row, and finally multiplying all the sum terms. This
creates a Boolean expression representing the truth table as a whole.
 Product-Of-Sums expressions lend themselves well to implementation as a set of
OR gates (sums) feeding into a single AND gate (product).
301 chap1

determine boolean expressions from logic networks and vice versa

1.Identify each of these logic gates by name, and complete their respective truth
tables:

2.The following set of mathematical expressions is the complete set of “times tables”

for the Boolean number system:

Now, nothing seems unusual at first about this table of expressions, since they appear
to be the same as multiplication understood in our normal, everyday system of
numbers. However, what is unusual is that these four statements comprise the entire
set of rules for Boolean multiplication!
Explain how this can be so, being that there is no statement saying 1 ×2 = 2 or 2 ×3 = 6.
Where are all the other numbers besides 0 and 1?
301 chap1

de morgans theorem
DeMorgan’s Theorems
A mathematician named DeMorgan developed a pair of important rules regarding group
complementation in Boolean algebra. By groupcomplementation, I’m referring to the
complement of a group of terms, represented by a long bar over more than one variable.
You should recall from the chapter on logic gates that inverting all inputs to a gate
reverses that gate’s essential function from AND to OR, or vice versa, and also inverts
the output. So, an OR gate with all inputs inverted (a Negative-OR gate) behaves the
same as a NAND gate, and an AND gate with all inputs inverted (a Negative-AND gate)
behaves the same as a NOR gate. DeMorgan’s theorems state the same equivalence in
“backward” form: that inverting the output of any gate results in the same function as
the opposite type of gate (AND vs. OR) with inverted inputs:

A long bar extending over the term AB acts as a grouping symbol, and as such is
entirely different from the product of A and B independently inverted. In other words,
(AB)’ is not equal to A’B’. Because the “prime” symbol (’) cannot be stretched over two
variables like a bar can, we are forced to use parentheses to make it apply to the whole
term AB in the previous sentence. A bar, however, acts as its own grouping symbol
when stretched over more than one variable. This has profound impact on how Boolean
expressions are evaluated and reduced, as we shall see.
DeMorgan’s theorem may be thought of in terms of breaking a long bar symbol. When a
long bar is broken, the operation directly underneath the break changes from addition
to multiplication, or vice versa, and the broken bar pieces remain over the individual
variables. To illustrate:

When multiple “layers” of bars exist in an expression, you may only break one bar at a
time, and it is generally easier to begin simplification by breaking the longest
(uppermost) bar first. To illustrate, let’s take the expression (A + (BC)’)’ and reduce it
using DeMorgan’s Theorems:
301 chap1

Following the advice of breaking the longest (uppermost) bar first, I’ll begin by breaking
the bar covering the entire expression as a first step:

As a result, the original circuit is reduced to a three-input AND gate with the A input
inverted:

You should never break more than one bar in a single step, as illustrated here:

As tempting as it may be to conserve steps and break more than one bar at a time, it
often leads to an incorrect result, so don’t do it!
It is possible to properly reduce this expression by breaking the short bar first, rather
than the long bar first:
301 chap1

The end result is the same, but more steps are required compared to using the first
method, where the longest bar was broken first. Note how in the third step we broke
the long bar in two places. This is a legitimate mathematical operation, and not the
same as breaking two bars in one step! The prohibition against breaking more than one
bar in one step is nota prohibition against breaking a bar in more than one place.
Breaking in more than one place in a single step is okay; breaking more than
one bar in a single step is not.
You might be wondering why parentheses were placed around the sub-expression B’ +
C’, considering the fact that I just removed them in the next step. I did this to
emphasize an important but easily neglected aspect of DeMorgan’s theorem. Since a
long bar functions as a grouping symbol, the variables formerly grouped by a broken bar
must remain grouped lest proper precedence (order of operation) be lost. In this
example, it really wouldn’t matter if I forgot to put parentheses in after breaking the
short bar, but in other cases it might. Consider this example, starting with a different
expression:

As you can see, maintaining the grouping implied by the complementation bars for this
expression is crucial to obtaining the correct answer.
Let’s apply the principles of DeMorgan’s theorems to the simplification of a gate circuit:

As always, our first step in simplifying this circuit must be to generate an equivalent
Boolean expression. We can do this by placing a sub-expression label at the output of
each gate, as the inputs become known. Here’s the first step in this process:
301 chap1

Next, we can label the outputs of the first NOR gate and the NAND gate. When dealing
with inverted-output gates, I find it easier to write an expression for the gate’s
output without the final inversion, with an arrow pointing to just before the inversion
bubble. Then, at the wire leading out of the gate (after the bubble), I write the full,
complemented expression. This helps ensure I don’t forget a complementing bar in the
sub-expression, by forcing myself to split the expression-writing task into two steps:

Finally, we write an expression (or pair of expressions) for the last NOR gate:

Now, we reduce this expression using the identities, properties, rules, and theorems
(DeMorgan’s) of Boolean algebra:
301 chap1

The equivalent gate circuit for this much-simplified expression is as follows:

 REVIEW
 DeMorgan’s Theorems describe the equivalence between gates with inverted
inputs and gates with inverted outputs. Simply put, a NAND gate is equivalent to a
Negative-OR gate, and a NOR gate is equivalent to a Negative-AND gate.
 When “breaking” a complementation bar in a Boolean expression, the operation
directly underneath the break (addition or multiplication) reverses, and the broken
bar pieces remain over the respective terms.
 It is often easier to approach a problem by breaking the longest (uppermost) bar
before breaking any bars under it. You must neverattempt to break two bars in
one step!
 Complementation bars function as grouping symbols. Therefore, when a bar is
broken, the terms underneath it must remain grouped. Parentheses may be placed
around these grouped terms as a help to avoid changing precedence.

de morgans theorem using truth tables

De Morgan’s Theorem was created by Augustus De Morgan, a 19th-century mathematician who
developed many of the concepts that make Boolean logic work with electronics. Among De Morgan’s
most important work are two related theorems that have to do with how NOT gates are used in
conjunction with AND and OR gates:
 An AND gate with inverted output behaves the same as an OR gate with inverted
inputs.
301 chap1

 An OR gate with inverted output behaves the same as an AND gate with inverted
inputs.
An AND gate with inverted output is also called a NAND gate, of course, and an OR gate with inverted
output is also called a NOR gate. Thus, De Morgan’s laws can also be stated like this:
 A NAND gate behaves the same as an OR gate with inverted inputs.

 A NOR gate behaves the same as an AND gate with inverted inputs.
An OR gate with inverted inputs is called a negative OR gate, and an AND gate with inverted inputs is
called a negative AND gate.
In case you’re not persuaded, review for a moment the truth table for a NAND gate:

A B X

0 0 1

0 1 1

1 0 1

1 1 0

Now look at the truth table for an OR gate, with an extra set of columns added to show
the inverted inputs:

A B NOT A NOT B X

0 0 1 1 1

0 1 1 0 1

1 0 0 1 1

1 1 0 0 0
Here, the A and B columns represent the inputs. The NOT A and NOT B columns are the inputs after
they’ve been inverted. Finally, the X column represents an OR operation applied to the NOT A and NOT
B values.
As you can see, the final output column of these truth tables is the same. Thus, a NAND gate is
equivalent to a negative OR gate. Any time you see a NAND gate in a circuit diagram, you can substitute
a negative OR gate.
Now take a look at the other side of De Morgan’s Theorem. Here’s a truth table for a NOR gate:
A B X

0 0 1

1 0 0

0 1 0
301 chap1

1 1 0
And here’s the output of a negative AND gate:
A B NOT A NOT B X

0 0 1 1 1

0 1 1 0 0

1 0 0 1 0

1 1 0 0 0
Again, you can see that these two truth tables give the same output.
Just as a circle is used on the output of a NAND or NOR gate to indicate that the output is inverted, you
can use a circle on the inputs to an OR or AND gate to indicate that the inputs are inverted.

relevance of de morgans theorem in logic circuit design

DeMorgan’s Theorem
DeMorgan’s Theorem is mainly used to solve the various Boolean algebra expressions.The
Demorgan’s theorem defines the uniformity between the gate with same inverted input and
output. It is used for implementing the basic gate operation likes NAND gate and NOR gate. The
Demorgan’s theorem mostly used in digital programming and for making digital circuit
diagrams. There are two DeMorgan’s Theorems. They are described below in detail.

DeMorgan’s First Theorem

According to DeMorgan’s first theorem, a NOR gate is equivalent to a bubbled AND gate. The Boolean expressions for the
bubbled AND gate can be expressed by the equation shown below. For NOR gate, the equation is

For the bubbled AND gate the equation is

As the NOR and bubbled gates are interchangeable, i.e., both gates have exactly identical outputs for
the same set of inputs.
Therefore, the equation can be written as shown below.

This equation (1) or identity shown above is known as DeMorgan’s Theorem. The symbolic
representation of the theorem is shown in the figure below.
301 chap1

DeMorgan’s Second Theorem

DeMorgan’s Second Theorem states that the NAND gate is equivalent to a bubbled OR gate.
The Boolean expression for the NAND gate is given by the equation shown below.

The Boolean expression for the bubbled OR gate is given by the equation shown below.

Since NAND and bubbled OR gates are interchangeable, i.e., both gates have identical outputs for the same set of inputs.
Therefore, the equations become as given below.

This identity or equation (2) shown above is known as DeMorgan’s Second Theorem.
The symbolic representation of the theorem is shown in the figure below.

The Bubbled OR Gate

The logic circuit of the bubbled OR gate is shown below.

The truth table for bubbled OR gate is shown below.

A B Z

0 0 1

0 1 1

1 0 1

1 1 0
301 chap1

In this, both the inputs are inverted before they are applied to an OR gate. The output of  a bubbled
OR gate can be derived from its logic circuit and can be expressed by the equation shown below.

Here are the results when the logic circuit of bubbled OR gate when all the possible sets of inputs are
applied such as 00, 01, 10 or 11.

For AB: 00

For AB: 01

For AB: 10

For AB: 11

The truth table for the bubbled AND gate is exactly identical to the truth table of a NAND gate. Hence,
NAND and bubbled OR gate is interchangeable.

minimise combined logic functions using boolean algebra and/or karnaugh map

Who Developed the Karnaugh Map?

Maurice Karnaugh, a telecommunications engineer, developed the Karnaugh map at
Bell Labs in 1953 while designing digital logic based telephone switching circuits.

The Use of Karnaugh Map

Now that we have developed the Karnaugh map with the aid of Venn diagrams, let’s put it to use.
Karnaugh maps reduce logic functions more quickly and easily compared to Boolean algebra. By reduce
we mean simplify, reducing the number of gates and inputs. We like to simplify logic to a lowest
cost  form to save costs by elimination of components. We define lowest cost as being the lowest
number of gates with the lowest number of inputs per gate.
301 chap1

We show five individual items above, which are just different ways of representing the
same thing: an arbitrary 2-input digital logic function. First is relay ladder logic, then
logic gates, a truth table, a Karnaugh map, and a Boolean equation. The point is that
any of these are equivalent. Two inputs A and B can take on values of either 0 or 1,
high or low, open or closed, True or False, as the case may be. There are 22 = 4
combinations of inputs producing an output. This is applicable to all five examples.
These four outputs may be observed on a lamp in the relay ladder logic, on a logic
probe on the gate diagram. These outputs may be recorded in the truth table, or in the
Karnaugh map. Look at the Karnaugh map as being a rearranged truth table. The Output
of the Boolean equation may be computed by the laws of Boolean algebra and
transfered to the truth table or Karnaugh map. Which of the five equivalent logic
descriptions should we use? The one which is most useful for the task to be
accomplished.

The outputs of a truth table correspond on a one-to-one basis to Karnaugh map entries.
Starting at the top of the truth table, the A=0, B=0 inputs produce an output α. Note that
this same output α is found in the Karnaugh map at the A=0, B=0 cell address, upper
left corner of K-map where the A=0 row and B=0 column intersect. The other truth table
outputs β, χ, δ from inputs AB=01, 10, 11 are found at corresponding K-map locations.
Below, we show the adjacent 2-cell regions in the 2-variable K-map with the aid of
previous rectangular Venn diagram like boolean regions.
301 chap1

Cells α and χ are adjacent in the K-map as ellipses in the left most K-map below.
Referring to the previous truth table, this is not the case. There is another truth table
entry (β) between them. Which brings us to the whole point of the organizing the K-map
into a square array, cells with any Boolean variables in common need to be close to one
another so as to present a pattern that jumps out at us. For cells α and χ they have the
Boolean variable B’ in common. We know this because B=0 (same as B’) for the
column above cells α and χ. Compare this to the square Venn diagram above the K-map.
A similar line of reasoning shows that β and δ have Boolean  B (B=1) in common. Then,
α and β have Boolean A’ (A=0) in common. Finally, χ and δ have Boolean A (A=1) in
common. Compare the last two maps to the middle square Venn diagram.
To summarize, we are looking for commonality of Boolean variables among cells. The
Karnaugh map is organized so that we may see that commonality. Let’s try some
examples.

Example:
Transfer the contents of the truth table to the Karnaugh map above.

Solution:
The truth table contains two 1s. the K- map must have both of them. locate the
first 1 in the 2nd row of the truth table above.
 note the truth table AB address
 locate the cell in the K-map having the same address
 place a 1 in that cell
301 chap1

Repeat the process for the 1 in the last line of the truth table.
Example:
For the Karnaugh map in the above problem, write the Boolean expression. Solution is
below.

Solution:
Look for adjacent cells, that is, above or to the side of a cell. Diagonal cells are not
adjacent. Adjacent cells will have one or more Boolean variables in common.
 Group (circle) the two 1s in the column
 Find the variable(s) top and/or side which are the same for the group, Write this as
the Boolean result. It is B in our case.
 Ignore variable(s) which are not the same for a cell group. In our case A varies, is
both 1 and 0, ignore Boolean A.
 Ignore any variable not associated with cells containing 1s. B’ has no ones under
it. Ignore B’
 Result Out = B
This might be easier to see by comparing to the Venn diagrams to the right, specifically
the B column.
Example:
Write the Boolean expression for the Karnaugh map below.

Solution: (above)
 Group (circle) the two 1’s in the row
 Find the variable(s) which are the same for the group, Out = A’
Example:
For the Truth table below, transfer the outputs to the Karnaugh, then write the Boolean
expression for the result.
301 chap1

Solution:
Transfer the 1s from the locations in the Truth table to the corresponding locations in
the K-map.
 Group (circle) the two 1’s in the column under B=1
 Group (circle) the two 1’s in the row right of A=1
 Write product term for first group = B
 Write product term for second group = A
 Write Sum-Of-Products of above two terms Output = A+B
The solution of the K-map in the middle is the simplest or lowest cost solution. A less
desirable solution is at far right. After grouping the two 1s, we make the mistake of
forming a group of 1-cell. The reason that this is not desirable is that:
 The single cell has a product term of AB’
 The corresponding solution is Output = AB’ + B
 This is not the simplest solution
The way to pick up this single 1 is to form a group of two with the 1 to the right of it
as shown in the lower line of the middle K-map, even though this 1 has already been
included in the column group (B). We are allowed to re-use cells in order to form larger
groups. In fact, it is desirable because it leads to a simpler result.
We need to point out that either of the above solutions, Output or Wrong Output, are
logically correct. Both circuits yield the same output. It is a matter of the former circuit
being the lowest cost solution.
Example:
Fill in the Karnaugh map for the Boolean expression below, then write the Boolean
expression for the result.

Solution: (above)
The Boolean expression has three product terms. There will be a 1 entered for each
product term. Though, in general, the number of 1s per product term varies with the
number of variables in the product term compared to the size of the K-map. The product
term is the address of the cell where the 1 is entered. The first product term, A’B,
301 chap1

corresponds to the 01 cell in the map. A 1 is entered in this cell. The other two P-
terms are entered for a total of three 1s
Next, proceed with grouping and extracting the simplified result as in the previous truth
table problem.
Example:
Simplify the logic diagram below.

Solution: (Figure below)
 Write the Boolean expression for the original logic diagram as shown below
 Transfer the product terms to the Karnaugh map
 Form groups of cells as in previous examples
 Write Boolean expression for groups as in previous examples
 Draw simplified logic diagram

Example:
Simplify the logic diagram below.

Solution:
 Write the Boolean expression for the original logic diagram shown above
 Transfer the product terms to the Karnaugh map.
 It is not possible to form groups.
301 chap1

 No simplification is possible; leave it as it is.

No logic simplification is possible for the above diagram. This sometimes happens.
Neither the methods of Karnaugh maps nor Boolean algebra can simplify this logic
further. We show an Exclusive-OR schematic symbol above; however, this is not a
logical simplification. It just makes a schematic diagram look nicer. Since it is not
possible to simplify the Exclusive-OR logic and it is widely used, it is provided by
manufacturers as a basic integrated circuit (7486).
distinguish between relaxation and sine wave oscillators
What is an Oscillator
An oscillator provides a source of repetitive A.C. signal across its output
terminals without needing any input (except a D.C. supply). The signal
generated by the oscillator is usually of constant amplitude.
The wave shape and amplitude are determined by the design of the oscillator
circuit and choice of component values.
The frequency of the output wave may be fixed or variable, depending on the oscillator design.
Types of Oscillator

Fig. 1.0.1 Oscillator

(AC Source)
Circuit Symbol

Oscillators may be classified by the type of signal they produce.

 SINE WAVE OSCILLATORS produce a sine wave output.

 RELAXATION OSCILLATORS and ASTABLE MULTIVIBRATORS produce Square waves and rectangular

pulses.

 SWEEP OSCILLATORS produce sawtooth waves.

Sine wave oscillators can also be classified by frequency, or the type of frequency control they use. RF
(radio frequency) oscillators working at frequencies above about 30 to 50kHz use LC (inductors and
capacitors) or Crystals to control their frequency. These may also be classified as HF, VHF, and UHF
oscillators, depending on their frequency.
LF (low frequency) oscillators are generally used for generating frequencies below about 30kHz and are
usually RC oscillators, as they use resistors and capacitors to control their frequency.
Square wave oscillators such as relaxation and astable oscillators may be used at any frequency from
less than 1Hz up to several GHz and are very often implemented in integrated circuit form.
Sine Wave Oscillators.
301 chap1

Fig. 1.0.2 Frequency Control Networks

These circuits ideally produce a pure sine wave output having a constant amplitude and stable
frequency. The type of circuit used depends on a number of factors, including the frequency required.
Designs based on LC resonant circuits or on crystal resonators are used for ultrasonic and radio
frequency applications, but at audio and very low frequencies the physical size of the resonating
components, L and C would be too big to be practical.
For this reason a combination of R and C is used to a control frequency. The circuit symbols used for
these frequency control networks are shown in Fig. 1.0.2
LC oscillators

Inductors and capacitors are combined in a resonating circuit that produces a very good shape of sine
wave and has quite good frequency stability. That is, the frequency does not alter very much for changes
in the D.C. supply voltage or in ambient temperature, but it is relatively simple, by using variable
inductors or capacitors, to make a variable frequency (tuneable) oscillator. LC oscillators are extensively
used in generating and receiving RF signals where a variable frequency is required.
RC (or CR) oscillators

At low frequencies such as audio the values of L and C needed to produce a resonating circuit would be
too large and bulky to be practical. Therefore resistors and capacitors are used in RC filter type
combinations to generate sine waves at these frequencies, however it is more difficult to produce a pure
sine wave shape using R and C. These low frequency sine wave oscillators are used in many audio
applications and different designs are used having either a fixed or variable frequency.
Crystal oscillators
301 chap1

At radio frequencies and higher, whenever a fixed frequency with very high degree of frequency stability
is needed, the component that determines the frequency of oscillation is usually a quartz crystal, which
when subjected to an alternating voltage, vibrates at a very precise frequency. The frequency depends
on the physical dimensions of the crystal, therefore once the crystal has been manufactured to specific
dimensions, the frequency of oscillation is extremely accurate. Crystal oscillator designs can produce
either sine wave or square wave signals, and as well as being used to generate very accurate frequency
carrier waves in radio transmitters, they also form the basis of the very accurate timing elements in
clocks, watches, and computer systems.
Relaxation oscillators

These oscillators work on a different principle to sine wave oscillators. They produce a square wave or
pulsed output and generally use two amplifiers, and a frequency control network that simply produces a
timing delay between two actions. The two amplifiers operate in switch mode, switching fully on or fully
off alternately, and as the time, during which the transistors are actually switching, only lasts for a very
small fraction of each cycle of the wave, the rest of the cycle they "relax" while the timing network
produces the remainder of the wave. An alternative name for this type of oscillator is an "astable
multivibrator", this name comes from the fact that they contain more than one oscillating element.
There are basically two oscillators, i.e. ''vibrators'', each feeding part of its signal back to the other, and
the output changes from a high to a low state and back again continually, i.e. it has no stable state,
hence it is astable. Relaxation oscillators can be built using several different designs and can work at
many different frequencies. Astables may typically be chosen for such tasks as producing high frequency
digital signals. They are also used to produce the relatively low frequency on-off signals for flashing
lights.
Sweep oscillators
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A sweep waveform is another name for a saw-tooth wave. This has a linearly changing (e.g increasing)
voltage for almost the whole of one cycle followed by a fast return to the wave’s original value. This
wave shape is useful for changing (sweeping) the frequency of a voltage-controlled oscillator, which is
an oscillator that can have its frequency varied over a set range by having a variable ‘sweep’ voltage
applied to its control input. Sweep oscillators often consist of a ramp generator that is basically a
capacitor charged by a constant value of current. Keeping the charging current constant whilst the
charging voltage increases, causes the capacitor to charge in a linear fashion rather than its normal
exponential curve. At a given point the capacitor is rapidly discharged to return the signal voltage to its
original value. These two sections of a saw-tooth wave cycle are called the sweep and the fly-back.

symbols for multivibrators

Multivibrators and their Types

 As circuits got more and more complicated over the years, it became impossible to have advanced
applications without multiple states. Just think about it. What if a certain device of yours had only one state and
no settings? This was the sort of problem faced earlier, when circuits were growing in complexity, and required
components that could facilitate more efficient operation with multiple outputs. In modern terms, what if your
microwave oven could only heat for say 30 seconds, nothing more, nothing less? They’re not directly related of
course, but it’s just something we’re used to, electronic devices with multiple functions and outputs, multiple
states, so to speak. So a multivibrator can be defined as an electronic circuit that is used to implement two
state systems like oscillators, timers and flip-flops. Here’s all you need to know about them and their types!

History of Multivibrators
Back in 1919, Henri Abraham and Eugene Bloch described the first multivibrator circuit, also called a plate-
coupled multivibrator. Made from vacuum tubes and introduced in 1920, it was christened the ‘Abraham-
Bloch multivibrator oscillator’. It was simple yet progressive, and used harmonics to calibrate a wavemeter in
the center. The whole setup was rather large because of the use of vacuum tubes, and gave way to more
popular circuits. In fact, the Eccles-Jordan trigger is often said to be the original multivibratorcircuit, when in
reality, it was derived from the Abraham-Bloch multivibrator oscillator. It is, however, considered to be the first
electronic flip-flop, and is named after William Eccles and F.W. Jordan.
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The Eccles-Jordan trigger also made use of vacuum tubes, and was used in early computers, even in
transistorized form. Basically, the fundamental flip-flop circuit introduced here was in use for a long time after,
hence the popularity. Flip-flop types as we know them, were first described in 1954 by Montgomery Phister, in
a course on computer design at the University of California, Los Angeles (UCLA). The Eccles-Jordan trigger
was the first bistable multivibrator, a type that we will describe below. Over the years, the terminologies
for multivibrators and flip-flops became more defined, and the terms as we know it were formed. Earlier, even
monostable multivbrators were sometimes called flip-flops, which we now use only to refer to bistable
multivibrators.

Types of Multivibrators
The name ‘multivibrator‘, originally came from the original oscillator version of the circuit, because of the
harmonics seen in the output waveform. It became the generalized term for the circuit, and over the years more
specific types of the circuit arose, which are:

Astable Multivibrator
A multivibrator circuit in which there is no single stable state is known as an astable multivibrator, as the name
suggests. Basically the circuit keeps switching from one state to another, and while that theoretically sounds
undesirable, there are actually many practical applications for it, namely, relaxation oscillators. It consists of two
amplifying stages connected by coupling networks, with a positive feedback loop. The actual amplifying
elements used range from vacuum tubes to op-amps and many more, including field effect transistors and
bipolar junction transistors.

The circuit keeps switching from one state to another because of the positive feedback, and has only one
amplifying element running at a time. The charge cycle is much faster compared to the discharge cycle, and is
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facilitated by the coupling capacitors, since voltage change in a capacitor cannot be instantaneous.  Just like
other circuits, it requires some time to begin conducting, which depends on the amplifying elements used.

Applications
 Used in applications where low clock frequency clock pulse train is required
 Relaxation oscillators, which are parts of vehicle indicator lights, disco strobe lights, early oscilloscopes
and television receivers
 Timing signals

Monostable Multivibrator
A monostable multivibrator, as the name suggests, is a circuit with a single stable state. Conceptually and
practically, it can be termed as a half astable multivibrator. While an astable multivibrator uses two resistive-
capacitive networks, a monostable multivibrator uses one resistive-capacitive and one simple resistive network,
hence it being called a half astable multivibrator. It outputs a perfect square waveform because of the absence
of a loaded capacitor, and is used in precise applications.

The circuit, when triggered by an input pulse, switches to the unstable state for some time, then returns to the
stable state. Depending on the application, the circuit can be tweaked to stay in the unstable state for as long
as required, even sometimes requiring multiple input pulses to keep it in the unstable state. This is also called a
retriggerable monostable multivibrator. Consequently, if the trigger pulses don’t affect the time spent in the
unstable state, it is called a non-retriggerable monostable multivibrator.

Applications:
 Used as pulse generators
 Used to produce time delay in circuits
 Used to regenerate pulses in old telecommunication systems
 Used to reduce pulse distortion in computer systems
 Used as gated circuits

Bistable Multivibrator
A bistable multivibrator is a circuit that has two stable states. Instead of using two resistive-capacitive networks
like an astable multivibrator, a bistable multivibrator uses two resistive networks only. Therefore it uses
only direct or resistive coupling, and the latch type has no charge or discharge time because of the lack of any
capacitors. Switching between the states can be done by two terminals called set and reset.
Bistable multivibrators are among the most important components of digital computer systems, because they’re
used to store data. It is also the basic storage element in sequential logic, and can be clocked or unclocked.
Just like other types of multivibrators, bistable multivibrators also use multiple control elements, such as
vacuum tubes and bipolar junction transistors. In complex circuits, multiple bistable multivibrators are cascaded
as well.
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As flip-flops, it can be divided into a few common types:

1. Set-Reset Latch: An electronic device that requires no control input, and depends entirely on the state
of the S and R signals. It is a simple circuit made from both NOR and NAND gates. As in, there are SR
NOR latches, as well as SR NAND latches.
2. Gated Latches: Similar to set-reset latches, these electronic devices often have an extra pair of
NAND/NOR gates. So it requires an extra input before the set-rest inputs can be activated. This extra
input is also termed as the ‘Enable’ input, since it enables the usage of the set and reset inputs.
3. D Flip-Flop: Also known as the ‘Data’ or ‘Delay’ flip-flop, this widely used electronic
device finds application in memory, delay lines or a zero cell hold. Practically, it’s the basis for shift
registers, a highly important part of many electronic devices. It basically holds the current value of D
input.
4. T Flip-Flop: T Flip-Flops are also known as toggle flip flops, and change their output on each clock
edge, which is usually half the frequency of the signal to the T input. They are used extensively in
frequency dividers, binary counters and binary addition devices.
5. JK Flip-Flop: Known as the universal flip-flop, JK flip-flops are similar to SR NAND latches, except
that there is no forbidden input, even when both set and reset are 1. It is basically a gated SR flip-flop
with an additional input clock circuit for extra stability. There are four possible outputs in this case,
namely logic 1, logic 0, toggle and no change.
Bistable multivibrators, particularly flip-flops, are subject to something called metastability, which happens when
both inputs change at the same time. It can cause unforeseen problems like extra time to settle into a state,
unintended oscillations and the like. In digital computer systems, this can lead to data corruption and crashes
because of the inconsistent state change. This is fixed by setting proper time constraints and cascading
multiple flip-flops.

Applications:
 Used in counting circuits
 Used in memory storage units
 Used as frequency dividers
 Used in pulse generation circuits

Conclusion
Thus, multivibrators are very important electronic devices, used in a wide range of applications. As seen above,
they’re more of the basic building blocks of electronics and computer systems, and began from simpler vacuum
tubes. While earlier they found use in television sets, frequency dividers and the like for synchronizing
purposes, evolved versions of them are now used in complex computer systems and form the very basic forms
of memory. On the other hand, they’re also used in simple turn signal circuits seen in vehicles around the
world, which is testament to their versatility. Our basic notion of multiple operation, types and states stems from
these devices, without which we’d probably be stuck with much simpler devices. It’s quite interesting to see
how multivibrators give way to devices like oscillators and flip-flops, which in turn turn intosomething more
complex, so on and so forth. Basic components like these are what make much more complex systems
possible, and whether you’re a budding engineer or inventor, you’ll still have to familiarize yourself with these
components to get anywhere. After all, we all have to start somewhere, and for understanding electronics, this
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is one of the places you can begin! Do let us know if you’d like to know more about these topics and feel free to
ask us anything you didn’t understand via the comments below!
using waveform diagrams, the operation of multivibrators
The Bistable Multivibrator is another type of two state device similar to the Monostable
Multivibrator we looked at in the previous tutorial but the difference this time is that BOTH states
are stable.
Bistable Multivibrators have TWO stable states (hence the name: “Bi” meaning two) and
maintain a given output state indefinitely unless an external trigger is applied forcing it to change
state.
The bistable multivibrator can be switched over from one stable state to the other by the
application of an external trigger pulse thus, it requires two external trigger pulses before it
returns back to its original state. As bistable multivibrators have two stable states they are more
commonly known as Latches and Flip-flops for use in sequential type circuits.
The discrete Bistable Multivibrator is a two state non-regenerative device constructed from
two cross-coupled transistors operating as “ON-OFF” transistor switches. In each of the two
states, one of the transistors is cut-off while the other transistor is in saturation, this means that
the bistable circuit is capable of remaining indefinitely in either stable state.
To change the bistable over from one state to the other, the bistable circuit requires a suitable
trigger pulse and to go through a full cycle, two triggering pulses, one for each stage are
required. Its more common name or term of “flip-flop” relates to the actual operation of the
device, as it “flips” into one logic state, remains there and then changes or “flops” back into its
first original state. Consider the circuit below.

Bistable Multivibrator Circuit

 
The Bistable Multivibrator circuit above is stable in both states, either with one transistor
“OFF” and the other “ON” or with the first transistor “ON” and the second “OFF”. Lets suppose
that the switch is in the left position, position “A”. The base of transistor TR1 will be grounded
and in its cut-off region producing an output at Q. That would mean that transistor TR2 is “ON”
as its base is connected to Vcc through the series combination of resistors R1 and R2. As
transistor TR2 is “ON” there will be zero output at Q, the opposite or inverse of Q.
If the switch is now move to the right, position “B”, transistor TR2 will switch “OFF” and
transistor TR1 will switch “ON” through the combination of resistors R3 and R4 resulting in an
output at Q and zero output at Q the reverse of above. Then we can say that one stable state
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exists when transistor TR1 is “ON” and TR2is “OFF”, switch position “A”, and another stable state
exists when transistor TR1 is “OFF” and TR2 is “ON”, switch position “B”.
Then unlike the monostable multivibrator whose output is dependent upon the RC time constant
of the feedback components used, the bistable multivibrators output is dependent upon the
application of two individual trigger pulses, switch position “A” or position “B”.
So Bistable Multivibrators can produce a very short output pulse or a much longer rectangular
shaped output whose leading edge rises in time with the externally applied trigger pulse and
whose trailing edge is dependent upon a second trigger pulse as shown below.

Bistable Multivibrator Waveform

 
Manually switching between the two stable states may produce a bistable multivibrator circuit
but is not very practical. One way of toggling between the two states using just one single
trigger pulse is shown below.

Sequential Switching Bistable Multivibrator

 
Switching between the two states is achieved by applying a single trigger pulse which in turn will
cause the “ON” transistor to turn “OFF” and the “OFF” transistor to turn “ON” on the negative
half of the trigger pulse. The circuit will switch sequentially by applying a pulse to each base in
turn and this is achieved from a single input trigger pulse using a biased diodes as a steering
circuit.
Then on the application of a first negative pulse switches the state of each transistor and the
application of a second pulse negative pulse resets the transistors back to their original state
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acting as a divide-by-two counter. Equally, we could remove the diodes, capacitors and
feedback resistors and apply individual negative trigger pulses directly to the transistor bases.
Bistable Multivibrators have many applications producing a set-reset, SR flip-flop circuit for
use in counting circuits, or as a one-bit memory storage device in a computer. Other
applications of bistable flip-flops include frequency dividers because the output pulses have a
frequency that are exactly one half ( ƒ/2 ) that of the trigger input pulse frequency due to them
changing state from a single input pulse. In other words the circuit produces Frequency
Division as it now divides the input frequency by a factor of two (an octave).

TTL/CMOS Bistable Multivibrators

As well as producing a bistable multivibrator from individual discrete components such as
transistors, we can also construct bistable circuits using commonly available integrated circuits.
The following circuit shows how a basic bistable multivibrator circuit can be constructed using
just two 2-input Logic “NAND” Gates.

NAND Gate Bistable Multivibrator

 
The circuit above shows us how we can use two NAND gates connected together to form a
basic bistable multivibrator. This type of bistable circuit is also known as a “Bistable Flip-flop”.
The manually controlled bistable multivibrator is activated by the single-pole double-throw
switch (SPDT) to produce a logic “1” or a logic “0” signal at the output.
You may have noticed that this circuit looks a little familiar, and you would be right!. This type of
bistable switching circuit is more commonly called a SR NAND Gate Flip-flop being almost
identical to the one we looked at back in the sequential logic tutorials. In that particular tutorial
we saw that this type of NAND gate bistable makes an excellent “switch debounce” circuit
allowing only one switching action to control its output.
In the next tutorial about Multivibrators, we will look at one that has NO stable states because it
is continually switching over from one stable state to the other. This type of multivibrator circuit
is called an Astable Multivibrator also known by their more common name of “fee-running
oscillator”.
applications for multivibrators
There are three types of multivibrator circuit: 

Astable, in which the circuit is not stable in either state - it continuously oscillates from one
state to the other. Useful for producing low cost, low accuracy timing pulses. They can be
phase locked to improve accuracy. 

Monostable, in which one of the states is stable, but the other is not - the circuit will flip into
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the unstable state for a determined period, but will eventually return to the stable state. Such
a circuit is useful for creating a timing period of fixed duration in response to some external
event. This circuit is also known as a one shot. A common application is in eliminating switch
bounce. 

Bistable, in which the circuit will remain in either state indefinitely. The circuit can be flipped
from one state to the other by an external event or trigger. Such a circuit is important as the
fundamental building block of a register or memory device. This circuit is also known as a flip-
flop. 

All these building blocks are still used in integrated circuits although you may not be aware of
them. It is usual to lump them into groups and represent them as blocks but the functions are
still there.