Documenti di Didattica
Documenti di Professioni
Documenti di Cultura
ISSUE NO : 001 ISSUE DATE 14-07-2016 REV NO: 002 REV DATE 26-07-2017
SEMESTER 5th
DEPARTMENT: ECE LABORATORY: MPI
:
THEORY:
M-8086 is a single board Microprocessor trainer Kit based on 16 bit 8086
any industrial process & control. This kit Consists of power-full Monitor EPROM, RAM,
I/O Lines, Timer/Counter, Serial, Seven segment Display and Keyboard for Man to
machine Interface.
GENERAL DESCRIPTION:-
The kit communicates with the outside world through a keyboard
having 28 keys & 8 seven segment display. The kit also has the capacity of interacting with
tally typewriter & circuit terminal. VHC -8603 is packet up with powerful monitor in 16K byte
of factory programmed EPROM’S and 16 byte of read\write memory. The total memory on the
board can be easily expanded to 256k byte of EPROM & 128KB of CMOS RAM. The system
has 72 programmable I/O lines. It is provided various software commands like BLOCK, MOVE,
INSERT, DELETE etc. which are helpful in debugging /developing software. An on board line
1
CPU:-
8086 is a 16 bit, 3rd generation microprocessor and is suitable for an exceptionally wide
characteristics. 8086 has got 16 data lines & 20 address lines. The lower 16 address lines are
multiplexed with 16 data lines. Software written for one cpu will execute on the other without
alteration. An interrupt container circuit is provided to take care of more than one source of
interrupt.
CO-PROCESSOR 8087:-
Co-processor “hooks” have been designed into the 8086 & 8088 so
that this type of processor can be accommodated in the future. A co-processor in that it obtains
its instructions from another processor in that it obtain its instruction from another processor
called a host. Another processor in effect, extends the instruction set of its host computer.
Performance I\O application. In addition it can transfer data on its own bus or on the system
bus can match 8-bit or 16-bit buses and on transfer data from m/m to m/m & from I/O to I/O
device.
CLOCK GENERATION:-
Clock generation circuit is an INTEL’S 8284 clock generator. The
circuit accepts crystals I/P which operates at a fundamental frequency at 14.7456khz was
selected since this frequency is a multiple of the band rate clock and also provides a suitable
freq. of CPU.
The clock generator provides two control signal O/P which are synchronized to the 4.9MHz
clock signal. RST is used to reset the VMC-8603 at an initialized state that occurs when the RES
2
I/P goes low.The VMC-8603 is supplied in 4.9 MHz configuration.
WAIT-STATE GENERATOR:-
Wait-state generator circuit allows wait states to be inserted
in to the CPU’S bus cycle. The wait state generator is cleared following every read, write or
interrupt cycle and is enable at the beginning of the interrupt cycle and enable at the beginning
of the next read, write or interrupt cycle. When the selected number (0-7) of shifts have occurred
the jumped O/P goes active which coupled to the RD4/I/P of the clock generator causes the clock
BUS CONTROLLER:-
Bus controller which decodes status signal O/P by an 8089 or 8086
where these signal indicates that the processor is to run a bus cycle.
MEMORY:-
VHC-8603 provides 16 bytes of EPROM with monitor and 16k bytes of CMOS
RAM. The total memory is EPROM 64k bytes of EPROM using 128k bytes using 27256, 256k
RAM:-
128K bytes of RAM using 62256 with the 20 bit address of 8086, a total of 1 mega byte of
MEM7. Memory sockets MEM-2, MEM-3, -----------MEM-7 are meant for RAM area 0,1,4,5 can
3
I/O DEVICES:-
8279:-
8279 is a general purpose programmable keyboard and display. I/O interface device
designed for use with 8086 microprocessor. It provides a scanned interface to 28 contact key
matrix provide VMC-8603 and scanned display. 8279 also refreshes the display RAM
automatically.
8255:-
It is a PPI designed to use with 8086 microprocessor. This basically acts as a general
purpose I/O component to interface peripheral equipment to the system bus. It is not necessary
to have an external logic interface. Port C can be divided in to 2 ports of 4 lines each named as
port C upper and port C lower. The port address for these ports are given here, these ports are
8253:-
This chip is a programmable interval timer/counter and can be used for the generation
of accurate time delays under software control. This chip has got three independent 16-bit
counter each having a count rate of up to 2 MHz. The CLK, GATE & OUT signals of these
8251:-
This chip is a programmable communication interface and is used as a peripheral device.
This device accept data character from the CPU in parallel form and then convert them in to a
continuous serial data stream for transmission. 8251 has been utilized in VMC-8603 for
8259:-
8259 is a device specially, designed for use in real time, interrupt driven micro computer
system. It manages 8 level of requests. The priority modes can be changed or reconfigured
4
dynamically at any time during the main program.
DISPLAY:-
VMC-8603 provides 8 digit of 7-segment display. 4 digit are for displaying the
address of any location or name or any register, where as the reset of the four digit are meant
for displaying the content of memory location or of a register. All the eight digit of the display
RESULT:-
We have studied microprocessor 8086 kit.
5
GEETA ENGINEERING COLLEGE, NAULTHA,
LABORATORY MANUAL
PANIPAT
ISSUE NO : 001 ISSUE DATE 14-07-2016 REV NO: 002 REV DATE 26-07-2017
5th
DEPARTMENT: ECE LABORATORY: MPI SEMESTER:
AIM: Write a program to add two binary numbers each 8 byte long.
CODE :
6
020E 46 INC SI Point at 0302 LOCN (next relevant
sources LOCN)
020F 46 INC SI
GEETA ENGINEERING COLLEGE, NAULTHA,
LABORATORY MANUAL
PANIPAT
7
EXPERIMENT NO: GEC-
EXPERIMENT TITLE: To sort a string of no. of bytes in descending
LM-ECE-309N-03
order.
ISSUE NO : 001 ISSUE DATE 14-07-2016 REV NO: 002 REV DATE 26-07-2017
5th
DEPARTMENT: ECE LABORATORY: MPI SEMESTER:
CODE :
8
0211 73 06 JAE 0219 If two bytes are equal or Ist byte is
above that the second byte branch
(1).
9
0301 : 00 in descending order.) 0303 : 25
0302 : 20 0304 : 20
0303 : 25 0305 : 15
0304 : 28 0306 : 07
0305 : 15
0306 : 07
GEETA ENGINEERING COLLEGE, NAULTHA,
LABORATORY MANUAL
PANIPAT
10
EXPERIMENT TITLE: To sort a string of no. of bytes in ascending EXPERIMENT NO: GEC-
order. LM-ECE-309N-04
ISSUE NO : 001 ISSUE DATE 14-07-2016 REV NO: 002 REV DATE 26-07-2017
5th
DEPARTMENT: ECE LABORATORY: MPI SEMESTER:
CODE :
11
0211 76 06 JAE 0219 If two bytes are equal or Ist byte is
above that the second byte branch
(1).
12
0301 : 00 in ascending order.) 0303 : 15
0302 : 20 0304 : 20
0303 : 25 0305 : 25
0304 : 28 0306 : 28
0305 : 15
0306 : 07
13
EXPERIMENT TITLE: Write a program to move a block of data EXPERIMENT NO: GEC-
(byte) from location 0202 to 0302. LM-ECE-309N-05
ISSUE NO : 001 ISSUE DATE 14-07-2016 REV NO: 002 REV DATE 26-07-2017
5th
DEPARTMENT: ECE LABORATORY: MPI SEMESTER:
AIM: Write a program to move a block of data (byte) from location 0202 to 0302.
CODE :
0109 46 INC SI
010A 46 INC SI
010B F2 REP
010C A4 MOV SB
010D F4 HLT
14
DATA INPUT :- DATA OUTPUT:-
15
GEETA ENGINEERING COLLEGE, NAULTHA,
LABORATORY MANUAL
PANIPAT
AIM: A data string of number of bytes (to be specified in cx reg.) is located from the starting
address 0300 this data string is to be converted to its equivalent 2’s complement form and
result is to be stored from 0400 on words
CODE :
16
Address Op-code Mnemonics Operands
0200 BE 00 03 MOV SI, 03 00
0203 BE 00 04 MOV DI, 04 00
0206 B9 10 00
0209 AC LODS B
020A F6 NEG AL
020B D8ENGINEERING COLLEGE, NAULTHA,
GEETA
LABORATORY MANUAL
PANIPAT
020C AA ST 05 B
020D F0 LOOP N NI 02 09
EXPERIMENT TITLE: Write a program to find the power of a EXPERIMENT NO: GEC-
020Eraised to a givenFA
number number. LM-ECE-309N-07
020F F4 HLT
ISSUE NO : 001 ISSUE DATE 14-07-2016 REV NO: 002 REV DATE 26-07-2017
5th
DEPARTMENT: ECE LABORATORY: MPI SEMESTER:
AIM:
DATA Write a program
INPUT :- to find the power of a number raised
DATAto a OUTPUT
given number.
:-
0300 : 01 0400 : FF
APPRATUS:
0301 : 028086 microprocessor kit. 0401 : FE
0302 : 03 0402 : FD
CODE
0303 : : 04 0403 : FC
0304 : 05 0404 : FB
0305 : 06 0405 : FA
0306 : 07 0406 : F9
Address
0307 : 08 Op-code Mnemonics
0407 : F8 DATA
0308 : 09 0408 : F7 INPUT :-
0200: 0A
0309 BE 00 03 MOV0409
SI, 0300H
: F6 DATA
030A : 0B 040A : F5 OUTPUT:-
030B
0203: 0C BE 02 03 MOV040B : F4
DI, 0302H
030C : 0D 040C : F3 0300 :
030D
0205: 0E 8B 00 (0B) 040D
MOV CX, [DI] : F2 02
030E : 0F 040E : F1 0300 :
030F : 10 040F : F0 08
0208 49 DEC, CX
0301 :
00
0209 8B 04 MOV AX, [SI] 0301 :
00
020B 89(B9) D8 MOV BX, AX 0302 :
03
020D F7 FC BACK MVL, BX,AX 0304 :
00
020F 49 DEC CX
ISSUE NO : 001 ISSUE DATE 14-07-2016 REV NO: 002 REV DATE 26-07-2017
5th
DEPARTMENT: ECE LABORATORY: MPI SEMESTER:
18
AIM: Write a program to find the largest no 8-bit no in an 8-bit array.
0115 F4 HLT
19
GEETA ENGINEERING COLLEGE, NAULTHA,
LABORATORY MANUAL
PANIPAT
EXPERIMENT TITLE: Write a program to find the sum of a series of 16- EXPERIMENT NO: GEC-
bit no. LM-ECE-309N-09
ISSUE NO : 001 ISSUE DATE 14-07-2016 REV NO: 002 REV DATE 26-07-2017
5th
DEPARTMENT: ECE LABORATORY: MPI SEMESTER:
CODE :
20
Address Op-code Mnemonics Operands
010A 46 INC SI
0112 F4 HALT
EXPERIMENT TITLE: Write a program to divide a string of unpacked EXPERIMENT NO: GEC-
ASCII digit. LM-ECE-309N-1
ISSUE NO : 001 ISSUE DATE 14-07-2016 REV NO: 002 REV DATE 26-07-2017
5th
DEPARTMENT: ECE LABORATORY: MPI SEMESTER:
21
CODE :
0210 AC LODS B
0214 D5 0A AAD
0216 F6 E2 DIV DL
0218 AA STOS B
0300 : 31 0308 : 00
0301 : 32 0309 : 02
0302 : 33 030A : 00
0303 : 34 030B : 05
0304 : 35 030C : 07
0305 : 36 030D : 06
0306 : 31 030E : 00
0307 : 32 030F : 02
22