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Multi-objective optimization of power converters using genetic algorithms

Conference Paper · June 2006

DOI: 10.1109/SPEEDAM.2006.1649862 · Source: IEEE Xplore

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 Multi-Objective Optimization of
Power Converters Using Genetic Algorithms
D.V. Malyna, J.L. Duarte, M.A.M. Hendrix, F.B.M. van Horck
Technical University of Eindhoven, 5600MB Eindhoven, The Netherlands

Abstract--In this paper an application of the multi-objective

genetic algorithm NSGA-II to synthesize a power electronic
converter is described. The formal approach and the
routines for synthesis are developed. As an example, a
flyback converter is synthesized for minimum diode and
transistor losses. The results are compared with brute-force
simulation and show an exact match, but with 2.5 less
simulation time. The bottlenecks of the optimization process
are explored and acceleration techniques are introduced.
Index Terms--circuit optimization, genetic algorithms,
modeling, power converter, simulation.
I. INTRODUCTION
Existing power converter design techniques
incorporate computer-aided (CAD) tools aiming at
reducing prototyping time. Those tools usually consist of
a library set and a numerical simulator. A designer
performs a simulation and checks whether the results are
fulfilling his specifications. If it is not the case, the
designer manually changes the converter parameters and
repeats the simulation again. Obviously, the
abovementioned design process is inefficient in terms of
time. Briefly, CAD tools allow performing analysis, but
synthesis is still a challenge. A better approach is to
exclude manual tasks from the design process as far as
possible. But the current CAD tools are not powerful
enough to perform the total synthesis automatically.
II. FORMULATION OF THE OPTIMIZATION ASSIGNMENT
A typical design assignment is to minimize the size
of the converter. This means that the total losses in the
transistor and diode should be minimal to reduce the area
of the heatsinks.
The values of inductor L1 and filter capacitor C1 are
design parameters. They are varied within a certain range
in order to obtain the desirable losses. The models of the
inductor and capacitor include equivalent series
resistance, which is a function of the capacitances and
inductances with quality factor Q . The input and output
voltages are specified, and, at the same time, the
converter should maintain an acceptable level of the
output ripple. A standard practice for the flyback is to
employ a PWM control scheme to stabilize the output.
The abovementioned assignment is a constrained
multi-objective minimization problem. It is formulated as
finding minimal transistor and diode losses, PD1 and PT 1
simultaneously, considering L1 and C1 as the varying
parameters. Overall, the output voltage and output ripple
should be maintained within the given specification.
L1=75...750uH
Q=20
C1=100...1000uF
Vo=50V
R1=50 Ohm
V1=100V Esr C1=65*(10E-6)/C1
Esr L1=L1*(10E-5)/Q

In this paper the issue of power converter computer-

aided synthesis is addressed and possible improvements T1
STD2NB70
D1
BYV27-200

are presented. A common assignment for power converter Duty cycle

design is to find the values of the components to fulfill control

design requirements. Similar studies have been performed

in the field of electric drives [3,4]. In power electronics Feedback path

values of the components are available from standard

lists, e.g. E12, E24, etc. It means that the choice space of Fig. 1. Sample flyback converter.
the parameters is discrete. Also, certain restrictions on the
In formal notation:
output voltages and currents should be considered, for
example, the average value of the output voltage is  PD1 , PT 1
constant and the output filter ripple voltage is specified 
 L1 ∈ [ Lmin … Lmax ] (1)
[6]. min 
 C1 ∈ [Cmin … Cmax ]
To illustrate the abovementioned, a specific converter
Vo = const ; ∆Vo ≤ ∆Vspecified
is considered, which is simple, but illustrative enough to 
allow good insight in the problem. The flyback converter where:
(see Fig. 1) is used as an example to show application of PD1 , PT 1 - power dissipated in T 1 and D1 ,
genetic algorithm techniques as a tool for synthesis.
L1, C1 - adjusted components,
Lmin , Lmax , Cmin , Cmax - boundary values of the
This work was supported by SenterNovem within the IOP EMVT components.
research program.
 The assignment was solved by original routines [2],
which were developed by the authors (Fig. 2). As the Ui
starting point the designer should manually provide a
schematic netlist and the optimization assignment. Then
the periodic steady-state of the converter is found, and D U0 - δU 0
Converter
electrical losses are calculated [6].
Accelerated +
electrical
Netlist file *.net simulation U 0ref

Fig. 4. Power converter without control.

no
Netlist Control parameter
Uo=50V?
manipulation variation
The output equation (see Fig. 4)
yes
δ U 0 = U 0ref − U 0 = f ( D) (4)
where:
Variation of the
no
U 0 - actual output voltage,
Optimization Nruns=Nrqst?
variables
assignment
U ref - reference output voltage
yes
is solved numerically in an iterative way by the secant
Final results method [7]. The value of the duty cycle for the next
iteration is determined by
Dn − Dn −1 (5)
Fig. 2. Flow diagram of the optimization process. Dn+1 = Dn − δ U 0 ( Dn ) ⋅
The simulator uses piece-wise linear resistive models
δ U 0 ( Dn ) − δ U 0 ( Dn −1 )
for the switches. The routines show a 7 to 30 times speed where
up compared to sequential period-by-period simulators Dn −1 , Dn , Dn +1 - denote the values of the duty cycle of
[2]. the previous, current and following iterations of the
A visualization of an arbitrary state-space variable algorithm respectively, and
response is shown in Fig. 3. For loss calculation the δ U 0 - is the error signal for the respective duty cycle.
steady-state is the only relevant part. Fig. 3 illustrates the The iterations are repeated till the termination criteria
acceleration principle of the steady state determination. is not satisfied:
x
δU0
≤ε , (6)
U 0ref
Steady-state where ε is the tolerance of the control.
The control action is presented in the flowchart of Fig. 5.
Start

Acceleration
algorithm
D=Do

t
Fig. 3. Accelerated steady-state determination.

When the steady state is achieved, the state vector

value at the beginning of the period is equal to the state
vector value at the end of the period, as summarized by Simulation of the
f (T , x 0 ) − x 0 = 0 . (2) converter

The Newton-Raphson algorithm with analytically

formulated Jacobians [2] was used for solving (2).
The control action is incorporated in the simulation as See formula 6 yes Stop

well (see Fig. 4). Simply stated, if the component

no
variation leads to a change of the output voltage, the
simulator performs an adjustment of the duty cycle D , in D(n+1)=…
see formula 5
order to solve a non-linear algebraic equation with single
variable
U o = f ( D) , (3) Fig. 5. Flowchart of the duty cycle adjustment routine.

At this stage, only the input-output behavior of the

converter is considered.
 A number of tests performed over the whole range of When an optimization problem involves more than
the variables L1, C1 showed that the iterative method for one objective function, the task of finding one or more
determination of the steady-state converged in 4-8 optimum solutions is known as multi-objective
iterations. optimization.
Finally, when the required steady-state is found, A number of studies [1,3] report the Non-Dominated
conduction losses in all resistive branches of the circuit Sorting Genetic Algorithm of the second generation
are calculated. Further on, prediction of the switching (NSGA-2) [1] as being the most efficient at the present
losses [6] is also performed. time. The NSGA-II was therefore implemented in
MATLAB; the routines were developed in such way that
III. BRUTE-FORCE APPROACH it is possible to handle any general multi-objective
optimization problem.
In order to get detailed information on the problem, Contrary to a single-objective optimization problem
brute-force simulations over the feasible component solution a multi-objective optimization problem solver
range were performed. Equally spaced points, 16 in total, produces a set of points, rather than a single point. The
were chosen from each of the component ranges mentioned curve, which is called a Pareto front,
L1∈ [ Lmin … Lmax ] and C1∈ [Cmin …Cmax ] . Component represents a trade-off solution between several objectives.
The Pareto front of the problem in Section II consists
pairs were picked-up one by one from the [ L1, C1] set. of a single point because of the problem nature and
The steady-state search was performed and the objective chosen grid. At the same time, NSGA-II requires an even
functions calculated. Finally, the boundary condition, i.e. number of population points.
output ripple, was considered. If the boundary condition Each GA includes several major operations [5]:
was not fulfilled, the LC-pair was excluded from the selection, crossover and mutation. The selection operator
feasible design set. picks up the best solutions from the population, thus
The resulting range of the diode losses is found to be pushing the search towards optimum. The crossover
50 mW and the transistor loss spans 200mW range (see operation combines two members of the population and
Fig. 6). The converter has a single optimal point within generates two offspring. The mutation operator randomly
generates a point, thus exploring all regions of the search
the 16x16 grid, that is 
L1 = 255µ H PD1 = 929mW  space.
 .
C1 = 760 µ F PT 1 = 795mW  With only two points in the population crossover,
This non-dominated point is marked by the diamond. The operations will not be strong enough to push searching in
points with the higher losses in the top-right corner of the a correct direction. However, the number of points should
Fig. 6 correspond to discontinuous conduction mode. be small enough to keep the number of simulations less
The routines were implemented in MATLAB 7.0 than 256 converter simulations of the brute-force
approach. A genetic algorithm usually runs for a certain
environment and the simulation time was 163 minutes on
number of times, tending to approach a Pareto front. The
an AMD64-3000+ CPU-based PC system.
number of simulations plays a key role here as well. On
1 one hand it should be as low as possible, but on another
hand a good approximation of the front is required. A
trade-off number of 25 runs was found experimentally.
0.95
Thus, in our particular case the GA has 4 members and
25 runs. This means in total 4 × 25 = 100 converter
Transistor losses [W]

0.9 evaluations, leading to the results in Fig. 7.

The boundary conditions are considered as well. The
0.85
only difference from the brute-force approach is that in
order to avoid too much non-mutation random points, the
values of the objective functions are penalized, instead of
0.8
excluding them from the solutions pool. The approach
Non-dominated set described in [4] was used. A constraint violation
0.75  ∆V ( )
− ∆V0 if ∆Vspecified − ∆V0 < 0
0.925 0.93 0.935 0.94 0.945 0.95 0.955 0.96 0.965 0.97 0.975
w =  specified (7)
Diode losses [W]

Fig. 6. Feasible objective space.

 0 otherwise
is multiplied with scaling factors R and the product is
added to each objective function value according to
IV. GENETIC ALGORITHM (GA) APPROACH
F ( x ) = f ( x) + R ⋅ w . (8)
The brute-force approach resulted in heavy simulation
where x is a vector of state variables and f (x) are the
overhead. If a higher precision is required, one should use
a denser grid. But in case of a denser grid the situation objective functions.
becomes even worse. As already mentioned before, a GA
technique has been applied to tackle the problem.
 The function F takes into account the constraint A number of works report the Non-Dominated Sorting
violations. For a feasible solution the corresponding w is being the most time consuming operation. This is a valid
zero. In contrary, for non-feasible solution the fitness F statement in case where the objective function is an
is degraded, thus pushing the reproduction probability of algebraic equation, which can be calculated very fast. But
the solution down. in our case the objective functions are calculated by
0.7958
simulating the power converter. The execution speed of
4th non-dominated set the GA can therefore be neglected. For example, Non-
0.7956 Dominated Sorting was performed during 0.078 seconds
3rd non-dominated set (0.002% of the total time).
0.7954
A special method was developed to accelerate the
Transistor losses [W]

0.7952 steady-state determination (see Fig. 3). As one can see,

2nd non-dominated set
the simulation is started from zero initial conditions and it
0.795
takes quite a number of sequential simulations to achieve
0.7948
the steady-state. Another possibility is to accumulate the
information about the converter in a database, and then to
0.7946 use this information in the simulation process. An
Non-dominated set
intelligent guess could be easily made from Fig. 3. The
0.7944
0.9292 0.9294 0.9296 0.9298 0.93 0.9302 0.9304 0.9306 0.9308 0.931 0.9312 instantaneous values of state-space variables are being
Diode losses [W]
stored together with the component values and the duty
Fig. 7. Non-dominated sets obtained by NSGA-2.
cycle D .
As it can be seen from Fig. 7 the non-dominated point After creation of new values for the search variables
is exactly the same: 
L1 = 255µ H PD1 = 929mW  L1, C1 by the genetic algorithm the closest point k in the
 . database is picked up according to
 1 = 760 µ F PT 1 = 795mW 
C
Three other points belong to 2nd, 3rd and 4th non-   L1 − L1*   C1i − C1*   , (9)
2 2

dominated sets respectively. k = index  min  i  + 

i =1…N  L1max   C1max  
To summarize, the same results were obtained in 63  
minutes at a cost of 100 converter evaluations instead of where:
256. L1i , C1i - values of the variables, stored in the database,
In case of our specific assignment the converter is
operating in continuous conduction mode, thus L1* , C1* - values of the variables, created by the genetic
disproving the statement that the optimum operation algorithm, for which the search is performed,
point is always in discontinuous conduction mode. L1max , C1max - feasible maximum values,
N - size of the database.
V. ACCELERATION OF THE OPTIMIZATION PROCESS The initial conditions are picked up from the database
A study was performed in order to determine the (see Fig. 9) and are used as initial conditions
“bottlenecks” of the algorithm (see Fig. 8). As it is x* = x ( k ) , D * = D ( k ) (10)
evident from Fig.8, the numerical integration and for finding the steady-state during the converter
calculation of power dissipation are the most time- simulation.
consuming operations. L1 C1 D x {iL1 , uC 1}
147
Other

1
8
Accelerated algorithm
2
Grows with each GA run

3
Routine

1595
Power calculation
4
5
2050
Simulation

i
3800
Total

N
0 500 1000 1500 2000 2500 3000 3500 4000
Execution time, [s]

variables independent instantaneous

Fig. 8. Execution time of the routines. control state-space
parameter values

Fig. 9. Database, used for the bookkeeping.

 The optimization was performed by using the
abovementioned technique. In total the simulation time
decreased to 1200 seconds (20 minutes) in contrary to
3800 seconds (63 minutes) before. This means a
improvement of 3.17 times over the case without the
database. The detailed results of the simulations for each
particular part of the algorithm are summarized in Table
I.
TABLE I COMPARISON OF THE RESULTS WITH AND WITHOUT THE
BOOKKEEPING
Function calls Function calls
Action
without database with database
Adjusting duty cycle 100 28
Search for steady state 632 224
Sequential period-by-
4375 968
period simulations
The adjustment of the duty cycle with the bookkeeping
occurs not for every evaluation of the objective function.
In most cases the database value of D is already close
enough to satisfy the allowable output voltage criteria.
However, it takes more computational effort for the duty
cycle search routine to determine the correct value of the
duty cycle.
The number of sequential simulations to achieve the
duty cycle decreased as well. But the algorithm
discovered a slightly different optimal point
 L1 = 255µ H PD1 = 934mW  .
 
C1 = 940 µ F PT 1 = 798mW 
The relative error in the objective functions is less than
1%. This is explained by slightly different initial
conditions used for the simulations. However, the
difference in the component values is big. The
synthesized converter has the same value of the
inductance, but a very large variation in the capacitor
value C1. Hence the sensitivity of C1 on the losses is
small. This effect is understandable because the average
output voltage is regulated and the ripple voltage (a few
percent of the average value) only marginally effects the
conduction time of the diode. Hence, the losses are also
weakly dependent on the capacitor value. This means that
extra measures are required to deal with tolerances.
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VI. CONCLUSIONS
The multi-objective optimization problem was solved
by applying brute-force and GA. The same optimum
converter design was found by both approaches. The
brute-force method resulted in 256 steady-state
simulations. In contrary, the GA approach produced the
same results with 100 simulations. The study showed a
huge dependency of the optimization time on the
simulation process over the GA itself. The proposed
Ratio bookkeeping technique significantly reduced the
simulation time. The major improvement is gained by
3.57
choosing a better value of the duty cycle. The error in
2.82 objective functions between simulation with and without
database is less than 1%. However the resulting
4.52
component values are quite different. This points out the
need for some measures to control small differences in
the objective functions. The study showed the necessity
to develop fast routines for calculations of the power
dissipation.
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Multiobjective Genetic Algorithm: NSGA-II, IEEE Transactions
on Evolutionary Computation, Vol. 6, No. 2, April 2002.
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Comparison of Methods for Finding Steady-State Solution in
Power Electronic Circuits, International Power Electronics and
Motion Control Conference (IPEMC), Xi’an (China), August
2004.
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of Permanent Magnet DC Motors, IEEE Young Researchers
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Netherlands), 18-19 March 2004.
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[5] K. Deb. Multi-Objective Optimization Using Evolutionary
Algorithms, 1st Edition. John Willey and Sons 2002.
[6] R. Erickson, D. Maksimovic, Fundamentals of Power Electronics,
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