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1:icc_shell> # Search Path #

2:icc_shell> set_app_var search_path "/home/tools/libraries/28nm"


4:icc_shell>
5:icc_shell> # Timing & Power Library #
6:icc_shell> set_app_var link_library "*
/home/tools/libraries/28nm/lib/stdcell_hvt/db_nldm/saed32hvt_ss0p95v125c.db
/home/tools/libraries/28nm/lib/stdcell_lvt/db_nldm/saed32lvt_ss0p95v125c.db
/home/tools/libraries/28nm/lib/stdcell_rvt/db_nldm/saed32rvt_ss0p95v125c.db
/home/tools/libraries/28nm/lib/stdcell_hvt/db_nldm/saed32hvt_dlvl_ss0p95v125c_i0p95
v.db
/home/tools/libraries/28nm/lib/stdcell_hvt/db_nldm/saed32hvt_ulvl_ss0p95v125c_i0p95
v.db
/home/tools/libraries/28nm/lib/stdcell_lvt/db_nldm/saed32lvt_dlvl_ss0p95v125c_i0p95
v.db
/home/tools/libraries/28nm/lib/stdcell_lvt/db_nldm/saed32lvt_ulvl_ss0p95v125c_i0p95
v.db
/home/tools/libraries/28nm/lib/stdcell_rvt/db_nldm/saed32rvt_dlvl_ss0p95v125c_i0p95
v.db
/home/tools/libraries/28nm/lib/stdcell_rvt/db_nldm/saed32rvt_ulvl_ss0p95v125c_i0p95
v.db
/home/tools/libraries/28nm/lib/sram_lp_new/db_nldm/saed32sramlp_ss0p95v125c_i0p95v.
db /home/tools/libraries/28nm/lib/sram/db_nldm/saed32sram_ss0p95v125c.db
/home/tools/libraries/28nm/lib/pll/db_nldm/saed32pll_ss0p95v125c_2p25v.db"
8:icc_shell>
9:icc_shell> # Target Library #
10:icc_shell> set_app_var target_library
"/home/tools/libraries/28nm/lib/stdcell_hvt/db_nldm/saed32hvt_ss0p95v125c.db"
12:icc_shell>
13:icc_shell> # Tech-File -- 28nm #
14:icc_shell> set tech_file
"/home/tools/libraries/28nm/tech/milkyway/saed32nm_1p9m_mw.tf"
16:icc_shell>
17:icc_shell> # Physical Library - FRAM #
18:icc_shell> set ref_mw_libs
"/home/tools/libraries/28nm/lib/pll/milkyway/SAED32_PLL_FR
/home/tools/libraries/28nm/lib/sram_lp/milkyway/saed32sram_lp
/home/tools/libraries/28nm/lib/sram/milkyway/SRAM32NM
/home/tools/libraries/28nm/lib/stdcell_hvt/milkyway/saed32nm_hvt_1p9m
/home/tools/libraries/28nm/lib/stdcell_lvt/milkyway/saed32nm_lvt_1p9m
/home/tools/libraries/28nm/lib/stdcell_rvt/milkyway/saed32nm_rvt_1p9m"
20:icc_shell>
21:icc_shell> # TLU+ Settings #
22:icc_shell> set max_tluplus
/home/tools/libraries/28nm/tech/star_rcxt/saed32nm_1p9m_Cmax.tluplus
24:icc_shell> set min_tluplus
/home/tools/libraries/28nm/tech/star_rcxt/saed32nm_1p9m_Cmin.tluplus
26:icc_shell> set tech2itf_map
/home/tools/libraries/28nm/tech/star_rcxt/saed32nm_tf_itf_tluplus.map
28:icc_shell>
29:icc_shell> set_tlu_plus_files -max_tluplus $max_tluplus -min_tluplus
$min_tluplus -tech2itf_map $tech2itf_map
31:icc_shell> # Load the library settings #
32:icc_shell> source ./scripts/library_settings_28nm_volcano.tcl
34:icc_shell>
35:icc_shell> # Top Cell #
36:icc_shell> set top_cell volcano
38:icc_shell>
39:icc_shell> # Verilog Netlist #
40:icc_shell> set input_verilog "./inputs/volcano.v"
42:icc_shell>
43:icc_shell> # SDC #
44:icc_shell> set input_sdc_func "./inputs/volcano_func.sdc"
46:icc_shell>
47:icc_shell> # Move the existing MW lib #
48:icc_shell> set date [sh date +%F_%H_%M]
50:icc_shell> catch {sh mv outputs/work/${top_cell}.mw outputs/work/$
{top_cell}.mw_old_${date}}
52:icc_shell>
53:icc_shell> # Create the MW Lib #
54:icc_shell> create_mw_lib -technology $tech_file -mw_reference_library
$ref_mw_libs -open outputs/work/${top_cell}.mw
70:icc_shell>
71:icc_shell> # Load the TLU+ Files #
72:icc_shell>
73:icc_shell> set_tlu_plus_files -max_tluplus $max_tluplus -min_tluplus
$min_tluplus -tech2itf_map $tech2itf_map
75:icc_shell>
76:icc_shell> # Read the Verilog Netlist #
77:icc_shell> import_designs -format verilog $input_verilog
129:icc_shell>
130:icc_shell> # Read the SDC #
131:icc_shell> read_sdc $input_sdc_func
355:icc_shell>
356:icc_shell> # Link the timing library #
357:icc_shell> link > outputs/report/import_design/link_timing_lib.rpt
359:icc_shell>
360:icc_shell> # Link the Physical Library #
361:icc_shell> link_physical_library >
outputs/report/import_design/link_physical_lib.rpt
363:icc_shell>
364:icc_shell> # Sanity Checks #
365:icc_shell> check_design -summary >
outputs/report/import_design/check_design.summary
367:icc_shell> check_design > outputs/report/import_design/check_design.full.rpt
369:icc_shell> check_timing
465:icc_shell> check_timing > outputs/report/import_design/check_timing.full.rpt
467:icc_shell>
468:icc_shell> # Derive PG Connection #
469:icc_shell> derive_pg_connection -power_pin VDD -ground_pin VSS -power_net VDD
-ground_net VSS
472:icc_shell> derive_pg_connection -power_net VDD -ground_net VSS -tie
475:icc_shell>
476:icc_shell> # Save MW cel #
477:icc_shell> save_mw_cel -as ${top_cell}_imported
508:icc_shell> # Load the library settings #
509:icc_shell> source ./scripts/import/library_settings_28nm_volcano.tcl
511:icc_shell>
512:icc_shell> # Top Cell #
513:icc_shell> set top_cell volcano
515:icc_shell>
516:icc_shell> # Verilog Netlist #
517:icc_shell> set input_verilog "./inputs/volcano.v"
519:icc_shell>
520:icc_shell> # SDC #
521:icc_shell> set input_sdc_func "./inputs/volcano_func.sdc"
523:icc_shell>
524:icc_shell> # Move the existing MW lib #
525:icc_shell> set date [sh date +%F_%H_%M]
527:icc_shell> catch {sh mv outputs/work/${top_cell}.mw outputs/work/$
{top_cell}.mw_old_${date}}
529:icc_shell>
530:icc_shell> # Create the MW Lib #
531:icc_shell> create_mw_lib -technology $tech_file -mw_reference_library
$ref_mw_libs -open outputs/work/${top_cell}.mw
534:icc_shell>
535:icc_shell> # Load the TLU+ Files #
536:icc_shell>
537:icc_shell> set_tlu_plus_files -max_tluplus $max_tluplus -min_tluplus
$min_tluplus -tech2itf_map $tech2itf_map
539:icc_shell>
540:icc_shell> # Read the Verilog Netlist #
541:icc_shell> import_designs -format verilog $input_verilog
560:icc_shell>
561:icc_shell> # Read the SDC #
562:icc_shell> read_sdc $input_sdc_func
760:icc_shell>
761:icc_shell> # Link the timing library #
762:icc_shell> link > outputs/report/import_design/link_timing_lib.rpt
764:icc_shell>
765:icc_shell> # Link the Physical Library #
766:icc_shell> link_physical_library >
outputs/report/import_design/link_physical_lib.rpt
768:icc_shell>
769:icc_shell> # Sanity Checks #
770:icc_shell> check_design -summary >
outputs/report/import_design/check_design.summary
772:icc_shell> check_design > outputs/report/import_design/check_design.full.rpt
774:icc_shell> check_timing
815:icc_shell> check_timing > outputs/report/import_design/check_timing.full.rpt
817:icc_shell>
818:icc_shell> # Derive PG Connection #
819:icc_shell> derive_pg_connection -power_pin VDD -ground_pin VSS -power_net VDD
-ground_net VSS
822:icc_shell> derive_pg_connection -power_net VDD -ground_net VSS -tie
825:icc_shell>
826:icc_shell> # Save MW cel #
827:icc_shell> save_mw_cel -as ${top_cell}_imported
832:icc_shell> pwd
834:icc_shell> pwd
836:icc_shell>
837:icc_shell>
838:icc_shell> # Link the timing library #
839:icc_shell> link > outputs/report/import_design/link_timing_lib.rpt
841:icc_shell>
842:icc_shell> # Link the Physical Library #
843:icc_shell> link_physical_library >
outputs/report/import_design/link_physical_lib.rpt
845:icc_shell>
846:icc_shell> # Sanity Checks #
847:icc_shell> check_design -summary >
outputs/report/import_design/check_design.summary
849:icc_shell> check_design > outputs/report/import_design/check_design.full.rpt
851:icc_shell> check_timing
884:icc_shell> check_timing > outputs/reports/import_design/check_timing.full.rpt
885:icc_shell> # Link the timing library #
886:icc_shell> link > outputs/reports/import_design/link_timing_lib.rpt
887:icc_shell>
888:icc_shell> # Link the Physical Library #
889:icc_shell> link_physical_library >
outputs/reports/import_design/link_physical_lib.rpt
890:icc_shell>
891:icc_shell> # Sanity Checks #
892:icc_shell> check_design -summary >
outputs/reportsimport_design/check_design.summary
894:icc_shell> check_design > outputs/report/import_design/check_design.full.rpt
896:icc_shell> check_timing
929:icc_shell> check_timing > outputs/report/import_design/check_timing.full.rpt
931:icc_shell> check_timing > outputs/reports/import_design/check_timing.full.rpt
932:icc_shell>
933:icc_shell> # Link the timing library #
934:icc_shell> link > outputs/reports/import_design/link_timing_lib.rpt
935:icc_shell>
936:icc_shell> # Link the Physical Library #
937:icc_shell> link_physical_library >
outputs/reports/import_design/link_physical_lib.rpt
938:icc_shell>
939:icc_shell> # Sanity Checks #
940:icc_shell> check_design -summary >
outputs/reports/import_design/check_design.summary
941:icc_shell> check_design > outputs/report/import_design/check_design.full.rpt
943:icc_shell> check_timing
976:icc_shell> check_timing > outputs/report/import_design/check_timing.full.rpt
978:icc_shell> # Link the timing library #
979:icc_shell> link > outputs/reports/import_design/link_timing_lib.rpt
980:icc_shell>
981:icc_shell> # Link the Physical Library #
982:icc_shell> link_physical_library >
outputs/reports/import_design/link_physical_lib.rpt
983:icc_shell>
984:icc_shell> # Sanity Checks #
985:icc_shell> check_design -summary >
outputs/reports/import_design/check_design.summary
986:icc_shell> check_design > outputs/reports/import_design/check_design.full.rpt
987:icc_shell> check_timing
1020:icc_shell> check_timing > outputs/reports/import_design/check_timing.full.rpt
1021:icc_shell>
1022:icc_shell> man check_design
1054:icc_shell> start_gui
1058:icc_shell>
1128:icc_shell> create_floorplan -left_io2core 10 -bottom_io2core 10.0
-right_io2core 10.0 -top_io2core 10.0
1134:icc_shell> create_floorplan -left_io2core 10 -bottom_io2core 10.0
-right_io2core 10.0 -top_io2core 10.0
1138:icc_shell> create_floorplan -left_io2core 10 -bottom_io2core 10 -right_io2core
10 -top_io2core 10
1142:icc_shell> current_mw_lib
1144:icc_shell> close_mw_cel
1146:icc_shell> close_mw_lib
1148:icc_shell> current_mw_lib
1150:icc_shell> current_mw_lib
1152:icc_shell> close_mw_lib
1154:icc_shell> current_mw_lib
1156:icc_shell> close_mw_lib
1158:icc_shell> current_mw_lib
1160:icc_shell> close_mw_lib
1162:icc_shell> close_mw_cell
1164:icc_shell> close_mw_cell
1166:icc_shell> close_mw_cell
1168:icc_shell> current_mw_lib
1170:icc_shell> close_mw_cell
1172:icc_shell> close_mw_lib
1174:icc_shell> current_mw_lib
1176:icc_shell> exit

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