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By:
Engr. Rommel A. Manalo
Engr. Maria Cecilia A. Venal
1
Experiment No. 1
DIGITAL LOGIC GATES
Course Code: CPE 004 Program:
Course Title: Logic Circuits and Switching Theory Date Performed:
Section: Date Submitted:
Members: 1. Instructor:
2.
3.
4.
5.
1. Objective:
This activity aims to demonstrate the operation and truth table of different digital logic gates such as AND,
OR, Inverter, NOR, NAND and XOR gates.
2. Intended Learning Outcomes (ILOs):
The students should be able to:
2.1 Examine the characteristics of the different logic gates. .
2.2 Apply different integrated circuits in deriving the truth table of the logic gates.
2.3 Develop professional work ethics, including precision, neatness, safety and ability to follow instruction.
3. Discussion
Digital Logic Gate is an electronic device that makes logical decisions based on the different combinations
of digital signals present on its inputs. It may have more than one input but generally only have one digital
output. Individual logic gates can be connected together to form combinational or sequential circuits or
larger logic gate functions.
Each digital logic gate has its corresponding integrated circuits (IC) number. Below are the IC numbers of
each gate.
2
Figure 1: IC Internal Circuitry and Pin Configurations
4. Resources:
Materials: Miscellaneous:
NI ELVIS Connecting Wires
Prototyping board Long nose pliers,
Components:
IC type 7400 – Quadruple 2-input NAND gate 7408 - Quadruple 2-input AND gate
7402 - Quadruple 2-input NOR gate 7432 - Quadruple 2-input OR gate
7404 - HEX Inverter 7486 - Quadruple 2-input XOR gate
5. Procedure:
Using 7400 IC
1) Using the 7400 pin configurations, connect INPUTS A and B to the data switches, the OUTPUT F to the
LED, the GND pin to ground and Vcc pin to +5V of the NI Elvis prototyping board.
2) Follow the switch settings as indicated in Table 1.1. Take note of the status of the INPUT (data switches)
and the OUTPUT (LED). INPUTS A and B and OUTPUT (LED) can be represented by 0 (OFF) or 1
(ON). For each input combination, record the logical output state of the circuit as indicated by OUTPUT
(F). Measure also the output voltage of the IC using digital tester. Record all the results in the Table 1.1
Using 7402 IC
3) Repeat Steps 1-2 to obtain the truth table (Table 1.2). Refer to the configuration.
Using 7404 IC
4) Repeat Steps 1-2 to obtain the truth table (Table 1.3). Refer to the configuration
3
Using 7408 IC
5) Repeat Steps 1-2 to obtain the truth table (Table 1.4). Refer to the configuration
Using 7432 IC
6) Repeat Steps 1-2 to obtain the truth table (Table 1.5). Refer to the configuration.
Using 7486 IC
7) Repeat Steps 1-2 to obtain the truth table (Table 1.6). Refer to the configuration.
When completed, turn off the power and remove all components.
4
Table 1.4 Truth Table (7408 – AND gate)
INPUTS OUTPUT (F)
LED Binary State Measured
A B
(On / Off) 0 or 1) Voltage
0 0
0 1
1 0
1 1
7. Data analysis
5
8. Supplementary Questions:
Q1. Fill-out the table indicated below:
NAND
NOR
Inverter
AND
OR
XOR
Q2: Given the logic function below, create the truth table and determine the output F.
1. F = (AB)’ + C
6
Experiment No. 2
7
UNIVERSAL GATES
Course Code: CPE 004 Program:
Course Title: Logic Circuits and Switching Theory Date Performed:
Section: Date Submitted:
Members: 1. Instructor:
2.
3.
4.
5.
1. Objective:
This activity aims to construct circuits using NAND and NOR gates perform as AND, OR and INVERTER,
XOR and XNOR logic gates.
2. Intended Learning Outcomes (ILOs):
The students should be able to:
2.1 Apply universal gates to function as basic logic gates.
2.2 Derive the truth tables of each universal gate.
2.3. Develop professional work ethics including precision, neatness, safety and ability to follow instructions..
3. Discussion
Besides NOT gate, many gates perform inversion as a normal part of their function. The simplest
inverting gates are NAND gates and NOR gates which are also called as universal gates. .Logic
designers frequently use NAND and NOR gates because they are generally faster and use fewer
components than AND or OR gates. Any logic function can be implemented using NAND gates or
only NOR gates.
The small circle (or bubble) at the gate output of the NAND gate indicates inversion, so the NAND
gate is equivalent to an AND gate followed by an inverter. The NAND is also called as AND-NOT
gate. The small circle (or bubble) at the gate output of the NOR gate indicates inversion, so the
NOR gate is equivalent to an OR gate followed by an inverter. The NAND is also called as OR-
NOT gate.
4. Resources:
Materials: Miscellaneous:
NI ELVIS Connecting Wires
Prototyping board Long nose pliers
Components:
IC type 7400 – Quadruple 2-input NAND gate
IC type 7402 - Quadruple 2-input NOR gate
5. Procedure:
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Pre-lab Work:
1) Obtain the logic diagram of the basic logic gates: AND, OR, INVERTER, XOR and XNOR
2) Draw the equivalent logic diagram of the basic logic gates using minimum number of NAND gates
3) Draw the equivalent logic diagram of the basic logic gates using minimum number of NOR gates.
Lab Work:
NAND Implementation:
1) Place the 7400 ICs in the digital logic trainer and connect the diagrams that have drawn in Step 2.
2) Connect +5V and GND pins of each IC to the power and ground of the NI Elvis.
3) Use the input combinations in Tables 2.1a to 2.1e to get the outputs.
4) Record all observations in “Output Using 7400” column in Table 2.1a to Table 2.1e. Write “0” if it is
OFF and “1” if it ON.
5) Under “REMARKS” column, put check (√) if the outputs are the same (using 7408 and 7400),
otherwise, leave it blank.
NOR Implementation:
1) Place the 7402 ICs in the digital logic trainer and connect the diagrams that have drawn in Step 3.
2) Connect +5V and GND pins of each IC to the power and ground of the NI Elvis.
3) Use the input combinations in Tables 2.1d to 2.1e to get the outputs.
4) Record all observations in “Output Using 7400” column in Table 2.2a to Table 2.2e. Write “0” if it is
OFF and “1” if it ON.
5) Under “REMARKS” column, put check (√) if the outputs are the same (using 7432 and 7402),
otherwise, leave it blank.
1) USING 7400 IC
Table 2.1a. Truth table of AND gate
INPUTS OUTPUT (F) LED display REMARKS
A B Using 7408 Using 7400
0 0 0
0 1 0
1 0 0
1 1 1
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Table 2.1b. Truth table of OR gate
INPUTS OUTPUT (F) LED display REMARKS
A B Using 7432 Using 7400
0 0 0
0 1 1
1 0 1
1 1 1
2) USING 7402 IC
Table 2.2a. Truth table of AND gate
INPUTS OUTPUT (F) LED display REMARKS
A B Using 7408 Using 7402
0 0 0
0 1 0
1 0 0
1 1 1
10
A B Using 7432 Using 7402
0 0 0
0 1 1
1 0 1
1 1 1
11
7. Data analysis
8. Questions
Q.1.Given the following expression, draw the equivalent circuit using NAND and NOR gates.
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Q.2. Draw the equivalent circuit of the following logic gates using NAND and NOR gates only
NOT /
Inverter
AND
OR
XOR
XNOR
13
9. Assessment (Rubric for Laboratory Performance):
14
Experiment No. 3
SIMPLIFICATION OF BOOLEAN FUNCTION
Course Code: CPE 004 Program:
Course Title: Logic Circuits and Switching Theory Date Performed:
Section: Date Submitted:
Members: 1. Instructor:
2.
3.
4.
5.
1. Objective:
This activity aims to demonstrate the ability to simplify Boolean expressions.
2. Intended Learning Outcomes (ILOs):
The students should be able to:
2.1 Apply the Boolean expression simplification process using theorems, laws and Identity.
2.2. Develop professional work ethics including precision, neatness, safety and ability to follow instructions..
3. Discussion
The Boolean Algebra honors a fascinating English mathematician named George Boole (1815-1864). He
developed Boolean algebra in 1847 and used it to solve problems in mathematical logic. Claude Shannon
first applied the Boolean algebra to the design of switching circuits in 1939.
When a variable is used in an algebraic expression, it is generally assumed that the variable may take any
numerical value. For instance, in the expression A+B=C, we assume that A,B and C may range through the
entire field of real numbers. The variable used in Boolean equations have a unique characteristics,
because, they may be represented of two possible value. These two values may represented by 0 and 1. If
an equation describing logical circuitry has several variables, it is still understood that each of the variables
can assume only the values 0 and 1.
4. Resources:
Materials: Miscellaneous:
NI ELVIS Connecting Wires
Prototyping board Long nose pliers
Components:
IC type 7404 – HEX Inverter gate
7408 - Quadruple 2-input AND gate
7432 - Quadruple 2-input OR gate
5. Procedure:
1. Study the given diagram in Figure 3.1 and find out the number of
ICs required to construct the given diagram. Fill-out the Table 4.1. .
Boolean Expression:
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Type of IC Number
2. Construct the circuit as shown in Figure 3.1. Connect the INPUTS (A, B and C) to the data switches and
the OUTPUT (F) to the LED as indicator.
3. Apply the different combinations to the data switches and observe the corresponding output in every
combination. Record the answers in Table 3.2
4. Simplify the Boolean expression indicated in Step 1. Count the number of ICs to be used to construct the
circuit. Fill-out Table 3.3 and write the simplified Boolean expression.
5. Test the circuit function by applying the different combinations to the input lines and observe the
corresponding output for every combination. Record the results in Table 3.3
6. When the experiment is completed, turn off the power and remove all the experimental components.
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INPUTS OUTPUT F
A B C
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
number
Draw the diagram of the simplified Boolean expression. Verify the circuit of the simplified diagram using NI
Elvis..
Simplified Circuit Diagram
17
Table 3.4 Truth Table of the simplified expression
INPUTS OUTPUT F
7. Data analysis
8. Problems:
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Illustrate the circuit diagram of the simplified equation of the expressions below.
1. F(a,b,c,d) = ∑(0,1,4,5,9,10,11,13)
2. F(x,y,z) = ∑(2,3,5,6)
3. F(ABCD) = π(1,3,5,7,9,11,12,13)
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Experiment No. 4
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COMBINATIONAL LOGIC CIRCUIT
Course Code: CPE 004 Program:
Course Title: Logic Circuits and Switching Theory Date Performed:
Section: Date Submitted:
Members: 1. Instructor:
2.
3.
4.
5.
1. Objective:
This activity aims to design combinational logic circuits using logic gates
2. Intended Learning Outcomes (ILOs):
The students should be able to:
2.1. Demonstrate the correct process of simplifying a given expression.
2.2. Apply different IC type / number in designing combinational logic circuits.
2.3. Develop professional work ethics including precision, neatness, safety and ability to follow instructions..
3. Discussion
A combinational circuit consists of input variables, logic gates, and output variables. The logic gates accept
signals from the inputs and generate signals to outputs. This process transforms binary information from
the given input data to the required output data. The input and output data are represented by binary signal
that is, they exist in two possible values, either logic-0 or logic-1. A block diagram of a combinational circuit
is shown in Figure 4-1. The n input binary variables come from an external source and the m output
variables go to an external destination. There are 2 n combinations of binary input value for n input variables.
A combinational circuit described by m Boolean Functions, one for each output variable. Each output
function is expressed in terms of the n input variables.
4. Resources:
Materials: Miscellaneous:
NI ELVIS Connecting Wires
Prototyping board Long nose pliers
Components:
Integrated Circuit
5. Procedure:
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a) Analyze the given problem and determine the requirements (number of inputs and number of outputs)
of the problem.
b) Assign codes or variables to the given conditions both for inputs and outputs
c) Construct the truth table
d) Simplify the output function using either Boolean simplification or K-Mapping
e) Draw the circuit diagram of the simplified equation.
f) Construct the circuit and test its operation by verifying the input / output relationship.
Problem No. 1
Design a combinational logic circuit with four inputs A,B,C and D and one output F. F is equal to
logic 1 when A=1 provided B=0 or when B=1 provided that either C or D is equal to 1. Otherwise, the output
is 0. Complete Table 4-1and determines the simplified equation and its equivalent logic circuit design.
Problem No. 2
Design a circuit that would alarm a buzzer when the following conditions apply. Complete Table 4-2
and determine the simplified equation and its equivalent logic circuit design.
a) Switches A and B are on but switch C is off.
b) Switches C and B are on but switch A is off.
c) Switches A and C are on but switch B is off.
d) All switches are on
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INPUTS OUTPUT (F)
A B C LED (ON or OFF) Logic Value (0 or 1)
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
7. Data analysis
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8. Problems
1) Design a logic circuit that would light up a seat belt warning lamp if a car’s engine is on and the
driver’s seat belt is not plugged in. Label the inputs and outputs.
2) An ice cream company has two signals, the bulb and the alarm, to monitor the temperature of the
area. The alarm will be activated when the industrial freezers temperature is not below 0 oC or the
freezer has been left open. The bulb is lit if the alarm is not activated. Design the logic circuit.
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Experiment No. 5
NUMBER SYSTEM with 7-Segment Display
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Course Code: CPE 004 Program:
Course Title: Logic Circuits and Switching Theory Date Performed:
Section: Date Submitted:
Members: 1. Instructor:
2.
3.
4.
5.
1. Objective(s):
3. Discussion :
A numeral system (or system of numeration) is a writing system for expressing numbers, that is, a
mathematical notation for representing numbers of a given set, using digits or other symbols in a consistent
manner. It can be seen as the context that allows the symbols "11" to be interpreted as the binary symbol for
three, the decimal symbol for eleven, or a symbol for other numbers in different bases.
Binary Numbers. The binary, or base-2, numbering system is based on the same principles as the decimal,
or base-10, numbering system, with which we are already familiar. The only difference between the two
numbering systems is that binary uses only two digits, 0 and 1, and the decimal numbering system uses 10
digits, 0 through 9.
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Hexadecimal Numbers. Alternatively referred to as Base 16 and hex, the hexadecimal numbering system
uses combinations of 16 character digits to represent all numerical values. In addition to the ten numbers in
the decimal system (0, 1, 2, 3, 4, 5, 6, 7, 8, and 9), hexadecimal also uses the letters A through F to create a
hexadecimal number. For example, "computer hope" in hexadecimal becomes
"636f6d707574657220686f7065".
BCD. Short for Binary Coded Decimal, BCD is also known as packet decimal and is numbers 0 through 9
converted to four-digit binary. Below is a list of the decimal numbers 0 through 9 and the binary conversion.
4. Resources:
Materials: Miscellaneous:
NI ELVIS Connecting Wires
Prototyping board Long nose pliers
Components:
IC 7447 or 7448 , IC 7493, 7-Segment Display, Digital Tester
5. Procedure:
2) Turn the power on and observe the four indicator lamps or LED and the Hex display. Record your
observations in Table 5.1.
3) Disconnect the input of the counter at pin 14 from pulser-switch PS1 and connect it to TTL clock output
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of the function generator. Set frequency selector to “Time 1” (1 Hz).
4) Observe the results and write your observations in Table 5.1 showing the 4-bit binary number and its
hexadecimal equivalent for each binary digit.
Table 5.1 Truth table and LED Display of Binary and Hexadecimal Count Sequence Circuit
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4-Bit Binary 7-Segment Decimal
LED Display BCD
(Q8Q4Q2Q1) Display Equivalent
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Legend: For LED Display: - means OFF - means ON
Table 5.2 Truth table and LED Display of BCD Count Sequence Circuit
7-Segment
4-Bit Binary Display Decimal
LED Display BCD
(Q8Q4Q2Q1) (Hexadecimal Equivalent
Equivalent)
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
30
1111
Legend: For LED Display: - means OFF - means ON
7. Data analysis
8. Problems:
Design a combinational circuit that will display 0-5 counts in a seven-segment display
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Experiment No. 6
32
DECODER / DEMULTIPLEXER
Course Code: CPE 004 Program:
Course Title: Logic Circuits and Switching Theory Date Performed:
Section: Date Submitted:
Members: 1. Instructor:
2.
3.
4.
5.
1. Objective:
This activity aims to demonstrate the functions of decoder and demultiplexer.
2. Intended Learning Outcomes (ILOs):
The students should be able to:
2.1 Derive a truth table of a decoder / demultiplexer (DEMUX)
2.2 Verity the operation of a decoder / demultiplexer (DEMUX)
2.3. Develop professional work ethics including precision, neatness, safety and ability to follow instructions..
3. Discussion
A Decoder is another commonly used type of integrated circuit. In figure 6.1 shows the block diagram of 3-
to-8 line decoder. This decoder generates all of the minterms of the three input variables. Exactly one of the
output lines will be 1 for each combination of the values of the input variables.
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A demultiplexer, sometimes abbreviated demux, is a circuit that has one input and more than one output. It
is used when a circuit wishes to send a signal to one of many devices. This description sounds similar to
the description given for a decoder, but a decoder is used to select among many devices while a
demultiplexer is used to send a signal among many devices. Figure 6.2 shows the Block Diagram of 1-to-2
Demultiplexer.
4. Resources:
Materials: Miscellaneous:
NI ELVIS Connecting Wires
Prototyping board Long nose pliers
Components:
Integrated Circuits (ICs) - 74LS139
5. Procedure:
1. The circuit in Figure 6.3 shows how 74LS139 operates as Decoder. Construct the circuit and verify the
operation of the circuit. Record all the results in Table 6.1
2. Construct the circuit in Figure 6.4 is using 74LS139 which functions as Demultiplexer. Verify the
operation of the circuit and record all the results in Table 6.2
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Figure 6.4. 74LS139 as Demultiplexer Circuit
3. Figure 6.5 shows two (2) 2-to-4 line decoders to function as 3-to-8 decoder. Construct the circuit and
record all results in Table 6.3
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INPUT OUTPUT
Enable Select Lines L3 L2 L1 L0
On / On / On / On /
Ea A0a A1a 0 /1 Off
0 /1 Off
0 /1 Off
0 /1 Off
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
Table 6.2. Truth Table : Demultiplexer
INPUT OUTPUT
Select Lines Data L3 L2 L1 L0
On / On / On / On /
K1 K0 D 0 /1 Off
0 /1 Off
0 /1 Off
0 /1 Off
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
Table 6.3. Truth table of a 3-8 Decoder using two(2) 2-to-4 decoders
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INPUT OUTPUT
Enable
7. Select Inputs
Data analysis L7 L6 L5 L4 L3 L2 L1 L0
0 On 0 On 0 On 0 On 0 On 0 On 0 On 0 On
E A1 A0 / / / / / / / / / / / / / / / /
1 Off 1 Off 1 Off 1 Off 1 Off 1 Off 1 Off 1 Off
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1
8. Problem:: 1 1
1. What is the difference between a decoder and a demultiplexer.
2. Design 4-to-16 decoder using 3-to-8 decoder.
37
Experiment No. 7
MULTIPLEXER
Course Code: CPE 004 Program:
38
Course Title: Logic Circuits and Switching Theory Date Performed:
Section: Date Submitted:
Members: 1. Instructor:
2.
3.
4.
5.
1. Objective:
This activity aims to demonstrate the functions of a multiplexer.
2. Intended Learning Outcomes (ILOs):
The students should be able to:
2.1 Verity the operation of a multiplexer (MUX)
2.2 Derive the truth table of a multiplexer
2.3. Develop professional work ethics including precision, neatness, safety and ability to follow instructions..
3. Discussion
A multiplexer (or data selector, abbreviated as MUX) has a group of data inputs and a group of control
inputs. The control inputs are used to select one of the data inputs and connect it to the output terminal.
Multiplexers are frequently used in digital system design to select the data which is to be processed or
store. In Figure 7.1 shows the block diagram of 2-to-1 multiplexer.
4. Resources:
Materials: Miscellaneous:
NI ELVIS Connecting Wires
Prototyping board Long nose pliers
Components:
IC type 2pcs - 74LS153
1 pc - 74LS32
1 pc - 7402
5. Procedure:
1. The circuit in Figure 7.1 shows how 74LS153 operates as Multiplexer. Construct the circuit and record all
the results in Table 7.1
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Figure 7.1. 74LS153 as Multiplexer Circuit
2. Figure 7.2 shows two (2) 4-to-1 multiplexers to function as 8-to-1 multiplexer. Construct the circuit and
verify the output. Record all results in Table 7.2
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0 0 0 x X x 1
0 0 1 x X 0 X
0 0 1 x X 1 X
0 1 0 x 0 x X
0 1 0 x 1 x X
0 1 1 0 X x X
0 1 1 1 X x X
1 x x x X x X
Table 7.2. Truth table of a 8-to-1 Multiplexer using two(2) 4-to-1 Multiplexers
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1 1 0 x 1 x X x x x x
1 1 1 0 x x X x x x x
1 1 1 1 x x X x x x x
Legend: x - means don’t care For S2 = 1 = +5V and 0 = OV
7. Data analysis
8.Problem:
7.1 Discuss multiplexer.
7.2 Use 74LS151 (8-input MUX) IC to produce a 16-input MUX.
42
9. Assessment (Rubric for Laboratory Performance):
43
Experiment No. 8
FLIP-FLOPS
Course Code: CPE 004 Program:
Course Title: Logic Circuits and Switching Theory Date Performed:
Section: Date Submitted:
Members: 1. Instructor:
2.
3.
4.
5.
1. Objective:
This activity aims to demonstrate the functions of different types of flip flops
2. Intended Learning Outcomes (ILOs):
The student should be able to:
2.1 Discuss different types of flip-flops.
2.2. Analyze the internal circuit connection of a flip flop.
2.3. Develop professional work ethics including precision, neatness, safety and ability to follow instructions..
3. Discussion
A Flip-Flop (F-F) is a multi-vibrator which has two stable state (Bi-stable) High and Low. Flip-Flop (F-F) are
useful devices for applications such as counting, storing binary data and data conversion from serial to
parallel. It is common practice to synchronize the operation of all flip-flops by a common clock or pulse
generator. Each of the flip-flops has a clock input and the flip-flops can only change state in response to a
clock pulse. A memory element that has no clock input is often called a latch. We will then reserve the term
flip-flop to describe a memory device that changes output state in response to a clock input and not in
response to a data input
There are many different types of Flip-Flops: such as Set-Reset (S-R), J-K Flip-Flop, D-Type Flip-Flop and
T-Type Flip-Flop.
4. Resources:
Materials: Miscellaneous:
NI ELVIS Connecting Wires
Prototyping board Long nose pliers
Components:
Integrated Circuits.
5. Procedure:
1. Construct the simple S-R Flip-flop circuit shown in Figure 8-1 and record your output to Table 8.1.
44
Note:
Logic (1) = + 5 Volt = + VCC = HIGH.
Logic (0) = 0 Volt = GND = LOW. .
2. Construct D-type flip-flop as shown in Figure 8.2. Record the outputs on Table 8.2
45
Figure 8.3 JK flip-flop
4. Repeat step 3 for Fig. 8.4 T-type F-F. Record the output on Table 8.4.
Table 8.1 SR flip-flop characteristic Table Table 8.3 JK flip-flop characteristic Table
Table 8.2 D flip-flop characteristic Table Table 8.4 T flip-flop characteristic Table
7. Data analysis
46
8. Problems:
7.1 What are the advantages of using J-K F-F over other types of Flip- Flops?
7.2 Give at least one application of each flip-flop.
47
Activity No. 9
SEQUENTIAL CIRCUIT
48
Course Code: CPE 004 Program:
Course Title: Logic Circuits and Switching Theory Date Performed:
Section: Date Submitted:
Members: 1. Instructor:
2.
3.
4.
5.
1. Objective:
This activity aims to design a sequential circuit using flip-flops and combination logic gates.
4. Resources:
Materials: Miscellaneous:
49
NI ELVIS Connecting Wires, jumping Wires,
Prototyping board extension cord, Long nose pliers
Components:
Integrated Circuits:
_____________________ ______________________
_____________________ ______________________
5. Procedure:
50
Use the state diagram below in creating a procedure in designing sequential circuits. Use JK flip flops.
A. State table
B. State equation
51
6. Data and results
7. Data analysis:
52
53