FIELD - EFFECT TRANSISTORS(FET)

INTRODUCTION

FET is available in two types:-

1. The Junction Field-Effect Transistors (JFET).
2. The Metal-Oxide Semiconductor FET (MOSFET).
The Difference between Bipolar Junction Transistor (BJT) and FET is as follows:-

- BJT is a current-controlled device in which both electron-current and hole current

are involved, and it has low input impedance and high output impedance.
- FET is a voltage- controlled device with either electron-current being involved or
hole-current being involved, which has an extremely high input impedance and
relatively high output impedance.

The importance of FET is a consequence of four of its properties.

• Its physical size- The MOSFET is so small compared with the BJT that it
occupies only 20% to 30% of the chip area taken up by the BJT, hence they
can be densely packed on an IC. They are widely used in Very Large Scale
Integration (VLSI).
• Voltage controlled-Resistance- Over a region of its operating range, it acts
like a voltage controlled -resistance element, and occupies a much less area on
a chip than the corresponding IC resistor.
• MOSFET has high input resistance and small input capacitance- Time
constant τ = RinCin , implies that the time constant is long enough to enable
the charge stored on the small input capacitance to remain sufficiently long.
Hence can be useful as storage element in digital circuits.
• MOSFET has the ability to dissipate high power and switch large currents
at large frequencies. This is much faster than that current achievable using the
BJT.

THEORY OF OPERATION OF THE JFET

The devices consists of a thin layer of n-type material with two ohmic contacts, the
source S and the drain D, along with two rectifying contacts, called the gates G.

If a positive voltage VDS is placed between drain and source, electrons will flow from
source to drain. This contacting path between the S and D is called the channel.

Operation

1. Consider the source and gates to be at ground potential (VGS = 0V).

♦ Apply a small potential on the drain (VDS < Vp). Because of the positive
potential, the electrons will flow from source to drain, which causes the current
IDS.
♦ There will be negligible current between the source (or drain) and the gate
since the diode formed by the gate-to-channel PN junction is reverse biased.
♦ The amount of current IDS flowing depends on VDS and the resistance of
the n-material in the channel. The resistance is a function of the doping of the n-
material and the channel width, length and thickness.
♦ As VDS is increased, the channel potential increases, the PN diode formed
by the gate- channel junction is further reverse-biased as shown in fig.
♦ Note that the depletion region is increased in size as we approach the
drain. The reason for this is that, the diode formed by the gate and the channel is
more heavily back biased near the drain than near the source.
♦ Since the channel area decreases, there is an increase in channel
resistance. When IDS verses VDS is drawn it will be as shown below in fig.
♦ When VDS = Vp, the depletion regions on each side join together, as shown
in fig. The voltages Vp is called the pinch-off voltage since it pinches off the
channel connection between drain and source.
♦ When VDS > Vp, the depletion area thickens as shown in fig. Hence the
voltage drop across the depletion region increases, from point b and a as VDS
increases.
♦ The electric field produced by the voltage drop across the depletion region
draws the electrons emitted by the source across the depletion the region. [Note
that the depletion region at a remains at the pinch off voltage Vp].
♦ Since the conductivity between point a and the source remain
approximately constant, the current IDS remains almost constant as VDS increases
above Vp. This is called saturation region. At saturation, Ip = IDS = IDSS (drain - to
source current with the gate source shorted).

2. Considers holding the drain-source voltage fixed and varying the gate-source
voltage.
(a) When VGS < 0V.
 The gate-channel PN junction is reverse biased, increasing the
depletion region between the gate and the source.
 This decreases the channel width increasing the channel resistance.
  Since VDS is kept constant, IDS decreases shown on the transfer
characteristics in fig.
(b) When VGS > 0V.
 When VGS is made positive, the depletion region decreases until,
for large positive gate-source voltages, the channel opens. Then PN
junction is forward biased and the current flows from the gate to the
source.
 The n-channel JFET is usually operated such that the gate - to
- source voltage is either negative or slightly positive to avoid gate - t-
source current.

In summary
Varying the VGS varies the channel width, and hence the channel; resistance.
This in turn varies the current from the drain to source, I DS. Thus the FET is a
voltage-sensitive device, compared with the BJT which is current-sensitive
device.

From the transfer characteristic above we have,

Equation

METAL- OXIDE SEMICONDUCTOR FET(MSFET)

The MOSFDET is constructed as either a depletion MOSFET or

enhancement MOSFET as shown in fig

Depletion MOSFET

In depletion MOSFET the channel is physically constructed. As shown in fig

 When VDS < 0V. The electrons are pushed out of the channel
region, depleting the channel of carriers, until pinch off.
 When VDS > 0V. there will be an increase in channel size (pushing
away holes), allowing more carriers and hence greater channel current. Fig

Enhancement MOSFET

 When VGS > 0V, holes in the substrate region under the gate will be
repelled leaving a depletion region.

 When gate voltage is sufficiently positive, electrons are attracted

into the depletion region, making it then act as an n-channel between the
drain and the source. This phenomenon is called surface inversion, and
the gate voltage at the onset of the surface inversion is defined as the
threshold voltage (VT). As VGS increases, the width and the conductivity of
the channel increases.
 As VGS increases, the width and the conductivity of the channel
increases. As VDS is increased, the depletion region around the drain, and
near the channel- drain junction widens, thus constricting the channel.
This causes the channel impedance to increase until when VDS = Vp, and
then impedance becomes infinite ( ≈ 100KΩ ).
 Further increase in VDS >> Vp, result in only a slight increase in IDS.
The At this point the MOSFET is said to be in saturation region.
 The transfer characteristics of enhancement MOSFET is shown
below. Fig