Documenti di Didattica
Documenti di Professioni
Documenti di Cultura
Tai-Chang Chen
University of Washington
©UWEE TC Chen
Semiconductor
processing
(microfabrication)
1
SOME DEVELOPMENT AT VIETNAM
©UWEE TC Chen
Cleanroom
©UWEE TC Chen
2
WHAT IS A CLEAN ROOM?
©UWEE TC Chen
©UWEE TC Chen
3
UNBELIEVABLE HOW DANGEROUS WE
ARE!
Horseplay 100,000,000
©UWEE TC Chen
©UWEE TC Chen
4
©UWEE TC Chen
CLEANROOM CONSTRUCTION
• Cleanroom takes up three floors; ground floor and 2nd floor for
supporting facilities, with the actual cleanroom on the first floor.
5
SUBSTRATES
http://www.xbitlabs.com/images/news/2011-
03/silicon_wafer.jpg
©UWEE TC Chen
©UWEE TC Chen
6
TENSILE STRESS AND STRAIN
©UWEE TC Chen
PROCESSES
©UWEE TC Chen
7
PROCESSES/PATTERNING
photoresist
excess resist flies
off during rotation
wafer to be coated
vacuum chuck
©UWEE TC Chen
PROCESSES/PATTERNING
©UWEE TC Chen
8
PROCESSES/PATTERNING
©UWEE TC Chen
OVERVIEW OF ALIGN/EXPOSE/DEVELOP
STEPS
photoresist (PR)
©UWEE TC Chen
9
PHOTOLITHOGRAPHY
©UWEE TC Chen
10
THIN FILM DEPOSITION
©UWEE TC Chen
Transport
Evaporation In vacuum
Resistive heating,
electron beam Condensation
heating, ion
bombardment,
laser beam
bombardment Condensed Phase Condensed Phase
(solid or liquid) (usually solid)
Target materials Thin films formed
©UWEE TC Chen
11
THIN FILM DEPOSITION
©UWEE TC Chen
Sputtering
©UWEE TC Chen
12
PLASMAS 101: INTRODUCTION
©UWEE TC Chen
13
SPUTTER DEPOSITION
©UWEE TC Chen
©UWEE TC Chen
14
CVD/CVD PROCESS FLOW
Byproduct diffusion
Reactant diffusion
Desorption
Absorption
Surface diffusion Surface reaction
©UWEE TC Chen
CVD/LPCVD
15
THERMAL OXIDATION OF SILICON
©UWEE TC Chen
ETCHING
©UWEE TC Chen
16
WET ETCHING
©UWEE TC Chen
©UWEE TC Chen
17
SEMICONDUCTOR/DOPING
©UWEE TC Chen
DOPING PROCESS
©UWEE TC Chen
18
DOPING PROCESS
• Common techniques of
doping
– Ion Implantation:
energetic dopant
ions are implanted
into semiconductor
by means of an ion
beam.
©UWEE TC Chen
©UWEE TC Chen
19
CMOS INVERTER STRUCTURE
NMOS PMOS
A
GND VDD
Y
p+ n+ n+ p+ p+ n+
n well
p substrate
well
substrate tap
tap
©UWEE TC Chen
Input
GND VDD
output pMOS transistor
nMOS transistor
substrate tap well tap
©UWEE TC Chen
20
INVERTER MASK SET
– n-well
– Polysilicon Polysilicon
– n+ diffusion
– p+ diffusion n+ Diffusion
– Contact p+ Diffusion
– Metal Contact
Metal
©UWEE TC Chen
FABRICATION STEPS
p substrate
©UWEE TC Chen
21
OXIDATION
SiO2
p substrate
©UWEE TC Chen
PHOTOLITHOGRAPHY/PHOTORESIST
• Spin on photoresist
– Photoresist is a light-sensitive organic polymer
– Softens where exposed to light
Photoresist
SiO2
p substrate
©UWEE TC Chen
22
PHOTOLITHOGRAPHY/EXPOSURE(MASK 1)
Photoresist
SiO2
p substrate
©UWEE TC Chen
ETCH/TRANSFER PATTERN
Photoresist
SiO2
p substrate
©UWEE TC Chen
23
STRIP PHOTORESIST
SiO2
p substrate
©UWEE TC Chen
N-WELL/DOPING
SiO2
n well
©UWEE TC Chen
24
STRIP OXIDE
n well
p substrate
©UWEE TC Chen
Polysilicon
Thin gate oxide
n well
p substrate
©UWEE TC Chen
25
POLYSILICON PATTERNING (MASK 2)
Polysilicon
Polysilicon
Thin gate oxide
n well
p substrate
©UWEE TC Chen
OXIDATION
n well
p substrate
©UWEE TC Chen
26
PATTERN N+ REGIONS (MASK 3)
n+ Diffusion
n well
p substrate
©UWEE TC Chen
N-DIFFUSION
• ion implantation
n+ n+ n+
n well
p substrate
©UWEE TC Chen
27
OXIDE REMOVAL
n+ n+ n+
n well
p substrate
©UWEE TC Chen
P-DIFFUSION (MASK 4)
• Similar set of steps form p+ diffusion regions for pMOS source and
drain and substrate contact
p+ Diffusion
p+ n+ n+ p+ p+ n+
n well
p substrate
©UWEE TC Chen
28
CONTACTS (MASK 5)
Contact
n well
p substrate
©UWEE TC Chen
METALLIZATION (MASK 6)
Metal
Metal
Thick field oxide
p+ n+ n+ p+ p+ n+
n well
p substrate
©UWEE TC Chen
29
©UWEE TC Chen
©UWEE TC Chen
30
PENTIUM III
©UWEE TC Chen
©UWEE TC Chen
31
INTEL'S LOGIC TECHNOLOGY EVOLUTION
©UWEE TC Chen
TRI-GATE TRANSISTOR
©UWEE TC Chen
32
RESEARCHERS BUILD A WORKING CARBON
NANOTUBE COMPUTER
©UWEE TC Chen
33