PD - 97310

IRFB3806PbF
IRFS3806PbF
Applications
l High Efficiency Synchronous Rectification in IRFSL3806PbF
SMPS
l Uninterruptible Power Supply HEXFET® Power MOSFET
l High Speed Power Switching
l Hard Switched and High Frequency Circuits
D
VDSS 60V
RDS(on) typ. 12.6mΩ
G max. 15.8mΩ
Benefits
l Improved Gate, Avalanche and Dynamic S ID 43A
dv/dt Ruggedness
l Fully Characterized Capacitance and D D
Avalanche SOA D

l Enhanced body diode dV/dt and dI/dt

Capability S
S S D
D G G
G
TO-220AB D2Pak TO-262
IRFB3806PbF IRFS3806PbF IRFSL3806PbF

G D S
Gate Drain Source
Absolute Maximum Ratings
Symbol Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 43
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 31 A
IDM Pulsed Drain Current c 170
PD @TC = 25°C Maximum Power Dissipation 71 W
Linear Derating Factor 0.47 W/°C
VGS Gate-to-Source Voltage ± 20 V
dv/dt Peak Diode Recovery e 24 V/ns
TJ Operating Junction and -55 to + 175 °C
TSTG Storage Temperature Range
Soldering Temperature, for 10 seconds 300
(1.6mm from case)
Mounting torque, 6-32 or M3 screw 10lbxin (1.1Nxm)

Avalanche Characteristics
EAS (Thermally limited) Single Pulse Avalanche Energy d 73 mJ
IAR Avalanche Current c 25 A
EAR Repetitive Avalanche Energy f 7.1 mJ

Thermal Resistance
Symbol Parameter Typ. Max. Units
RθJC Junction-to-Case j ––– 2.12
RθCS Case-to-Sink, Flat Greased Surface, TO-220 0.50 ––– °C/W
RθJA Junction-to-Ambient, TO-220 ij ––– 62
RθJA 2
Junction-to-Ambient (PCB Mount) , D Pak ij ––– 40

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IRFB/S/SL3806PbF
Static @ TJ = 25°C (unless otherwise specified)
Symbol Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 60 ––– ––– V VGS = 0V, ID = 250µA
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.075 ––– V/°C Reference to 25°C, ID = 5mAc
RDS(on) Static Drain-to-Source On-Resistance ––– 12.6 15.8 mΩ VGS = 10V, ID = 25A f
VGS(th) Gate Threshold Voltage 2.0 ––– 4.0 V VDS = VGS, ID = 50µA
IDSS Drain-to-Source Leakage Current ––– ––– 20 µA VDS = 60V, VGS = 0V
––– ––– 250 VDS = 48V, VGS = 0V, TJ = 125°C
IGSS Gate-to-Source Forward Leakage ––– ––– 100 nA VGS = 20V
Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -20V
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol Parameter Min. Typ. Max. Units Conditions
gfs Forward Transconductance 41 ––– ––– S VDS = 10V, ID = 25A
Qg Total Gate Charge ––– 22 30 nC ID = 25A
Qgs Gate-to-Source Charge ––– 5.0 ––– VDS = 30V
Qgd Gate-to-Drain ("Miller") Charge ––– 6.3 ––– VGS = 10V f
Qsync Total Gate Charge Sync. (Qg - Qgd) ––– 28.3 ––– ID = 25A, VDS =0V, VGS = 10V
RG(int) Internal Gate Resistance ––– 0.79 ––– Ω
td(on) Turn-On Delay Time ––– 6.3 ––– ns VDD = 39V
tr Rise Time ––– 40 ––– ID = 25A
td(off) Turn-Off Delay Time ––– 49 ––– RG = 20Ω
tf Fall Time ––– 47 ––– VGS = 10V f
Ciss Input Capacitance ––– 1150 ––– VGS = 0V
Coss Output Capacitance ––– 130 ––– VDS = 50V
Crss Reverse Transfer Capacitance ––– 67 ––– pF ƒ = 1.0MHz
Coss eff. (ER) Effective Output Capacitance (Energy Related)h ––– 190 ––– VGS = 0V, VDS = 0V to 60V h
Coss eff. (TR) Effective Output Capacitance (Time Related)g ––– 230 ––– VGS = 0V, VDS = 0V to 60V g

Diode Characteristics
Symbol Parameter Min. Typ. Max. Units Conditions
IS Continuous Source Current ––– ––– 43 A MOSFET symbol D

(Body Diode) showing the

ISM Pulsed Source Current ––– ––– 170 integral reverse G

S
(Body Diode)c p-n junction diode.
VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 25A, VGS = 0V f
trr Reverse Recovery Time ––– 22 33 ns TJ = 25°C VR = 51V,
––– 26 39 TJ = 125°C IF = 25A
Qrr Reverse Recovery Charge ––– 17 26 nC TJ = 25°C di/dt = 100A/µs f
––– 24 36 TJ = 125°C
IRRM Reverse Recovery Current ––– 1.4 ––– A TJ = 25°C
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

Notes:
 Repetitive rating; pulse width limited by max. junction
temperature.
‚ Limited by TJmax, starting TJ = 25°C, L = 0.23mH
RG = 25Ω, IAS = 25A, VGS =10V. Part not recommended for
use above this value.
ƒ ISD ≤ 25A, di/dt ≤ 1580A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C.
„ Pulse width ≤ 400µs; duty cycle ≤ 2%.
… Coss eff. (TR) is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS.
† Coss eff. (ER) is a fixed capacitance that gives the same energy as
Coss while VDS is rising from 0 to 80% VDSS.
‡ When mounted on 1" square PCB (FR-4 or G-10 Material). For recom
mended footprint and soldering techniques refer to application note #AN-994.
ˆ Rθ is measured at TJ approximately 90°C.

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 IRFB/S/SL3806PbF
1000 1000
VGS VGS
TOP 15V TOP 15V
10V 10V
8.0V 8.0V

ID, Drain-to-Source Current (A)

ID, Drain-to-Source Current (A)

6.0V 6.0V
5.5V 5.5V
5.0V 5.0V
100 4.8V 100 4.8V
BOTTOM 4.5V BOTTOM 4.5V

4.5V
10 10

4.5V
≤60µs PULSE WIDTH ≤60µs PULSE WIDTH
Tj = 25°C Tj = 175°C
1 1
0.1 1 10 100 0.1 1 10 100
V DS, Drain-to-Source Voltage (V) V DS, Drain-to-Source Voltage (V)

Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics

1000 2.5
ID = 25A

RDS(on) , Drain-to-Source On Resistance

VGS = 10V
ID, Drain-to-Source Current (A)

100 2.0
(Normalized)

T J = 175°C
10 1.5

T J = 25°C

1 1.0

VDS = 25V
≤60µs PULSE WIDTH
0.1 0.5
2 3 4 5 6 7 8 9 -60 -40 -20 0 20 40 60 80 100120140160180

VGS , Gate-to-Source Voltage (V) T J , Junction Temperature (°C)

Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance vs. Temperature

10000 12.0
VGS = 0V, f = 1 MHZ
ID= 25A
Ciss = Cgs + Cgd, C ds SHORTED
Crss = Cgd 10.0 VDS= 48V
VGS , Gate-to-Source Voltage (V)

Coss = Cds + Cgd VDS= 30V

Ciss VDS= 12V
C, Capacitance (pF)

1000 8.0

Coss
6.0

Crss
100 4.0

2.0

10 0.0
1 10 100 0 5 10 15 20 25
VDS, Drain-to-Source Voltage (V) Q G , Total Gate Charge (nC)

Fig 5. Typical Capacitance vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
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 IRFB/S/SL3806PbF
1000 1000
OPERATION IN THIS AREA
LIMITED BY R DS(on)

ID, Drain-to-Source Current (A)

ISD, Reverse Drain Current (A)

100 100 100µsec

T J = 175°C 1msec

10 10
T J = 25°C
10msec

1 1
Tc = 25°C DC
Tj = 175°C
VGS = 0V
Single Pulse
0.1 0.1
0.0 0.5 1.0 1.5 2.0 1 10 100
VSD, Source-to-Drain Voltage (V) VDS, Drain-to-Source Voltage (V)

Fig 7. Typical Source-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area

V(BR)DSS , Drain-to-Source Breakdown Voltage (V)

45 80
Id = 5mA
40

35
75
ID, Drain Current (A)

30

25
70
20

15
65
10

0 60
25 50 75 100 125 150 175 -60 -40 -20 0 20 40 60 80 100120140160180
T C , Case Temperature (°C) T J , Temperature ( °C )

Fig 9. Maximum Drain Current vs. Case Temperature Fig 10. Drain-to-Source Breakdown Voltage

0.4 300
ID
EAS , Single Pulse Avalanche Energy (mJ)

0.3 TOP 2.8A

250
5.1A
0.3 BOTTOM 25A
200
Energy (µJ)

0.2
150
0.2

100
0.1

0.1 50

0.0 0
-10 0 10 20 30 40 50 60 70 25 50 75 100 125 150 175
Starting T J , Junction Temperature (°C)
VDS, Drain-to-Source Voltage (V)

Fig 11. Typical COSS Stored Energy Fig 12. Maximum Avalanche Energy vs. DrainCurrent
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 IRFB/S/SL3806PbF
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Thermal Response ( Z thJC ) °C/W

1 D = 0.50

0.20
0.10
R1 R2 R3
0.1 0.05 R1 R2 R3 Ri (°C/W) τi (sec)
τJ τC
0.02 τJ τ
0.6086 0.00026
τ1 τ2 τ3
0.01 τ1 τ2 τ3 0.9926 0.001228
Ci= τi/Ri 0.5203 0.00812
0.01 Ci τi/Ri

Notes:
SINGLE PULSE
1. Duty Factor D = t1/t2
( THERMAL RESPONSE )
2. Peak Tj = P dm x Zthjc + Tc
0.001
1E-006 1E-005 0.0001 0.001 0.01 0.1
t1 , Rectangular Pulse Duration (sec)

Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case

100
Duty Cycle = Single Pulse

0.01 Allowed avalanche Current vs avalanche

pulsewidth, tav, assuming ∆Tj = 150°C and
Avalanche Current (A)

Tstart =25°C (Single Pulse)

10
0.05

0.10

Allowed avalanche Current vs avalanche

pulsewidth, tav, assuming ∆Τj = 25°C and
Tstart = 150°C.
0.1
1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
tav (sec)
Fig 14. Typical Avalanche Current vs.Pulsewidth

80 Notes on Repetitive Avalanche Curves , Figures 14, 15:

TOP Single Pulse (For further info, see AN-1005 at www.irf.com)
BOTTOM 1.0% Duty Cycle 1. Avalanche failures assumption:
ID = 25A Purely a thermal phenomenon and failure occurs at a temperature far in
EAR , Avalanche Energy (mJ)

60 excess of Tjmax. This is validated for every part type.

2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
40 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. Iav = Allowable avalanche current.
7. ∆T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as
25°C in Figure 14, 15).
20
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)

0
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
25 50 75 100 125 150 175
Iav = 2DT/ [1.3·BV·Zth]
Starting T J , Junction Temperature (°C) EAS (AR) = PD (ave)·tav

Fig 15. Maximum Avalanche Energy vs. Temperature

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IRFB/S/SL3806PbF
4.0 14
IF = 17A
VGS(th) , Gate threshold Voltage (V)

3.5 12 V R = 51V
TJ = 25°C
10
3.0 TJ = 125°C

IRR (A)
2.5 ID = 50µA
ID = 250µA 6
2.0 ID = 1.0mA
4
ID = 1.0A
1.5
2

1.0 0
-75 -50 -25 0 25 50 75 100 125 150 175 200 0 200 400 600 800 1000
T J , Temperature ( °C ) diF /dt (A/µs)

Fig 16. Threshold Voltage vs. Temperature Fig. 17 - Typical Recovery Current vs. dif/dt

14 260
IF = 25A IF = 17A
12 V R = 51V V R = 51V
210
TJ = 25°C TJ = 25°C
10
TJ = 125°C TJ = 125°C
160
Q RR (A)

8
IRR (A)

6
110

4
60
2

0 10
0 200 400 600 800 1000 0 200 400 600 800 1000
diF /dt (A/µs) diF /dt (A/µs)

Fig. 18 - Typical Recovery Current vs. dif/dt Fig. 19 - Typical Stored Charge vs. dif/dt

260
IF = 25A
V R = 51V
210
TJ = 25°C
TJ = 125°C
160
Q RR (A)

110

60

10
0 200 400 600 800 1000
diF /dt (A/µs)

Fig. 20 - Typical Stored Charge vs. dif/dt

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 IRFB/S/SL3806PbF
Driver Gate Drive
D.U.T P.W.
Period D=
P.W.
Period
+

ƒ VGS=10V *
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
- • Low Leakage Inductance D.U.T. ISD Waveform
Current Transformer
+
Reverse
‚
-
„ +
Recovery
Current
Body Diode Forward
Current
- di/dt
D.U.T. VDS Waveform
Diode Recovery
 dv/dt
VDD

RG • dv/dt controlled by RG VDD Re-Applied

• Driver same type as D.U.T. + Voltage Body Diode Forward Drop
• ISD controlled by Duty Factor "D" - Inductor Current
Inductor Curent
• D.U.T. - Device Under Test

Ripple ≤ 5% ISD

* VGS = 5V for Logic Level Devices

Fig 20. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs

V(BR)DSS
15V
tp

L DRIVER
VDS

RG D.U.T +
V
- DD
IAS A
VGS
20V
tp 0.01Ω
I AS

Fig 21a. Unclamped Inductive Test Circuit Fig 21b. Unclamped Inductive Waveforms

LD
VDS VDS
90%
+
VDD -

D.U.T 10%
VGS VGS
Pulse Width < 1µs
Duty Factor < 0.1% td(on) tr td(off) tf

Fig 22a. Switching Time Test Circuit Fig 22b. Switching Time Waveforms
Id
Vds

Vgs

L
VCC
DUT Vgs(th)
0
1K

Qgs1 Qgs2 Qgd Qgodr

Fig 23a. Gate Charge Test Circuit Fig 23b. Gate Charge Waveform
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IRFB/S/SL3806PbF
TO-220AB Package Outline (Dimensions are shown in millimeters (inches))

TO-220AB Part Marking Information

(;$03/( 7+,6,6$1,5)
/27&2'(
$66(0%/('21:: ,17(51$7,21$/ 3$57180%(5
,17+($66(0%/</,1(& 5(&7,),(5
/2*2
Note: "P" in assembly line
position indicates "Lead-Free" '$7(&2'(
$66(0%/< <($5 
/27&2'( :((.
/,1(&

TO-220AB packages are not recommended for Surface Mount Application.

Note: For the most current drawing please refer to IR website at http://www.irf.com/package/

8 www.irf.com
 IRFB/S/SL3806PbF

D2Pak (TO-263AB) Package Outline

Dimensions are shown in millimeters (inches)

D2Pak (TO-263AB) Part Marking Information

7+,6,6$1,5)6:,7+ 3$57180%(5
/27&2'( ,17(51$7,21$/
$66(0%/('21:: 5(&7,),(5 )6
,17+($66(0%/</,1(/ /2*2
'$7(&2'(
$66(0%/< <($5 
/27&2'( :((.
/,1(/

25
3$57180%(5
,17(51$7,21$/
5(&7,),(5 )6
/2*2 '$7(&2'(
3 '(6,*1$7(6/($')5((
352'8&7237,21$/
$66(0%/< <($5 
/27&2'(
:((.
$ $66(0%/<6,7(&2'(

Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
www.irf.com 9
IRFB/S/SL3806PbF
TO-262 Package Outline
Dimensions are shown in millimeters (inches)

TO-262 Part Marking Information

(;$03/( 7+,6,6$1,5//
/27&2'( 3$57180%(5
,17(51$7,21$/
$66(0%/('21::
5(&7,),(5
,17+($66(0%/</,1(& /2*2
'$7(&2'(
<($5 
$66(0%/<
/27&2'( :((.
/,1(&

25

3$57180%(5
,17(51$7,21$/
5(&7,),(5
/2*2
'$7(&2'(
3 '(6,*1$7(6/($')5((
$66(0%/<
/27&2'( 352'8&7237,21$/
<($5 
:((.
$ $66(0%/<6,7(&2'(

Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
10 www.irf.com
 IRFB/S/SL3806PbF

D2Pak (TO-263AB) Tape & Reel Information

Dimensions are shown in millimeters (inches)

TRR

1.60 (.063)
1.50 (.059)
1.60 (.063)
4.10 (.161) 1.50 (.059)
3.90 (.153) 0.368 (.0145)
0.342 (.0135)

FEED DIRECTION 1.85 (.073) 11.60 (.457)

1.65 (.065) 11.40 (.449) 24.30 (.957)
15.42 (.609)
23.90 (.941)
15.22 (.601)
TRL
1.75 (.069)
10.90 (.429) 1.25 (.049)
10.70 (.421) 4.72 (.136)
16.10 (.634) 4.52 (.178)
15.90 (.626)

FEED DIRECTION

13.50 (.532) 27.40 (1.079)

12.80 (.504) 23.90 (.941)

330.00 60.00 (2.362)

(14.173) MIN.
MAX.

30.40 (1.197)
NOTES : MAX.
1. COMFORMS TO EIA-418. 26.40 (1.039) 4
2. CONTROLLING DIMENSION: MILLIMETER. 24.40 (.961)
3. DIMENSION MEASURED @ HUB.
3
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.

Note: For the most current drawing please refer to IR website at http://www.irf.com/package/

Data and specifications subject to change without notice.

This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 02/08
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