Sample Problems 5(a) by T.N.

D Mathaba - 2018
1. (DECODER): You wish to detect only the 5. (DECODER) Draw logic diagrams
presence of the codes 1010, 1100, 0001, and showing the output for the following ICs
1011. An active-HIGH output is required to when the input is 0101;
indicate their presence. Develop the minimum (a)74HC42 and (b)74HC47.
decoding logic with a single output that will 6. (PARITY) What is the parity of the
indicate when any one of these codes is on the following bit sequence 011001011?
inputs. For any other code, the output must be 7. (PARITY) Use appropriate logic gates
LOW. to design a 4-bit odd parity generator
2. (DECODER) When a LOW is at the output of circuit.
the following decoding circuit, what is the 8. (PARITY) Use the logic symbol of the
binary code appearing on the inputs? 74HC280 to show how an even parity
output P can be obtained from a 9-bit
number, 011001011.
9. (PARITY) Given the following input
wave form, draw the output waveform
for the parity generator circuit designed
3. (DECODER) Draw a logic diagram to show in Q5.
how the 74HC154s can be used to decode a 5-
bit number D5D4D3D2D1D0.
4. (DECODER) What is the difference in
functionality between the 74HC42 and the
74HC47.
10. (ENCODER) Why is the priority feature required in the decimal to BCD encoder?
11. (ENCODER) What would be the output value of pins 6,7,9 & 14, of the 74HC147, if the
inputs to pins 1, 2, 3, 4 & 5 is LOW and that of pins 10, 11, 12 & 13 is HIGH?
12. (ENCODER) Draw the logic diagram for output A0 of the Decimal-to-BCD encoder.
13. (CONVERTER) Convert the following BCD numbers to binary; 011001BCD.
14. (CONVERTER) Show that the logic circuit for converting the following Gray code to an
equivalent binary number; 011001GRAY.
15. (CONVERTER) Design logic circuit for a 4-bit Binary-to-Gray code converter.
16. (MULTIPLEXER) Draw a logic diagram of a 2-to-1 line multiplexor circuit.
17. (MULTIPLEXER) Differentiate between the functionalities of 74HC151 and the
74HC153.
18. (MULTIPLEXER) Show how the 74HC151 can be used to implement the logic function
𝑃 = 𝐴𝐵̅ 𝐶 + 𝐴̅𝐵 𝐶̅ .
19. (deMULTIPLEXER) Explain how the 4-to-16 line decoder can be used as a
demultiplexer.
20. (deMULTIPLEXER) Determine the output waveform(D3-D0) for a 1-to-4 Demultiplexer

given the following outputs;

21. (deMULTIPLEXER) Draw a logic diagram of a 1-to-4 lines demultiplexer circuit.

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Sample Problems 5(b) by T.N.D Mathaba - 2018
22. (COMPARATOR) Design a 4-bit 26. (DECODER) Show a connection of two
comparator with an equality output only, 74HC47s and two 7-segment displays with
for comparing (B3-B0) and (A3-A0). zero-suppression while displaying the
23. (COMPARATOR) Use the logic symbol number 000000112.
with labelled pin-numbers to show how the 27. (Half/Full Adder) State the names of
74HC85 can be connected to compare the two outputs of a Half-Adder.
10112 and 11012. 28. (Half/Full Adder) Use the logic gates to
24. (COMPARATOR) Use the logic symbol implement a half-adder logic circuit.
with labelled pin-numbers to show how the 29. (Half/Full Adder) Explain how is the full
74HC85 can be connected to compare adder different from the half adder?
10112 and 11012. 30. (Half/Full Adder) Draw a truth-table of
25. (COMPARATOR) Use a logic diagram to the Full-adder.
illustrate how 74HC85s can be connected to 31. (Half/Full Adder) Duse a combination of
compare the numbers 1010112 and AND-OR and NOT gates to implement a full
111110102. adder.
32. (Parallel Adders) Draw a logic diagram 36. (RC/LA-Adder) What is the advantage
showing how a cascade of full adders can of the look-ahead carry adder over the
be used to add the numbers 1012 and 1002. ripple carry adder?
33. (Parallel Adders) Show how 4-bit 37. (RC/LA-Adder) Differentiate between
adders can be cascaded to form a 10-bit the carry generation and carry propagation.
adder for numbers (D9-D0) and (D3-D0). 38. (RC/LA-Adder) An 8-bit parallel ripple
34. (Parallel Adders) Apply 74HC283 IC’s to carry adder is made up of full-adders that
add the numbers 1012 and 1002. exhibit the following propagation delays; A
35. (RC-Adder) Explain why cascaded to SUM & Cout of 20ns, B to SUM & Cout of
74HC283 IC’s exhibit both ripple carry and 20ns, Cin to Cout of 25ns and Cin to SUM of
look-ahead carry properties 30ns.