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SAMSUNG TFT-LCD
MODEL NO : LTN156AT17-D
The information described in this SPEC is preliminary and can be changed without prior notice.
APPROVED BY :
3. Electrical Characteristics - - - - - - - - - - - - - - - - - - - ( 10 )
3.1 TFT LCD Module
3.2 Backlight Unit
3.3 LED Driver
4. Block Diagram - - - - - - - - - - - - - - - - - - - ( 13 )
4.1 TFT LCD Module
6. Interface Timing - - - - - - - - - - - - - - - - - - - ( 19 )
6.1 Timing Parameters
6 2 Timing Diagrams of interface Signal
6.2
6.3 Power ON/OFF Sequence
7. Outline Dimension - - - - - - - - - - - - - - - - - - - ( 21 )
8. Packing -- - - - - - - - - - - - - - - - - - ( 22 )
11. EDID - - - - - - - - - - - - - - - - - - - ( 28 )
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Nov 11. 2010 P00 All LTN156AT17-D model spec was issued first.
Jan 07. 2011 A00 All LTN156AT17-D model approval spec was issued.
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FEATURES
• 1366 x 768 pixels resolution (16:9)
• Fast Response Time
• Low power consumption
• LED BLU Structure
• DE (Data enable) only mode
• 3.3V LVDS Interface
• On board EDID chip
• RoHS compliance
• PVC free compliance
• BFR free compliance
• As free compliance
APPLICATIONS
• Notebook PC
• If the usage of this product is not for PC application
application, but for others
others, please contact SEC
GENERAL INFORMATION
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Note (1) Temperature and relative humidity range are shown in the figure below.
95 % RH Max. (40 C Ta)
Maximum wet - bulb temperature at 39 OC or less. (Ta 40 C ) No condensation
80
60
Operating Range
( 50,50.4 )
40
( 60,27.7 )
20
5
Storage Range
0
-40 -20 0 20 40 60 80
Temperature (OC)
(2) 2ms, half sine wave, one time for X, Y, Z.
(3) 5 - 500 Hz, random vibration, 30min for X, Y, Z.
(4) At testing Vibration and Shock, the fixture in holding the Module to be tested have to be
hard and rigid enough so that the Module would not be twisted or bent by the fixture
fixture.
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The following items are measured under stable conditions. The optical characteristics
should
h ld b be measuredd iin a d
dark
k room or equivalent
i l t state
t t with
ith th
the methods
th d shown
h iin N
Note
t (5)
(5).
Measuring equipment : TOPCON SR-3
Conditio
Item Symbol Min. Typ. Max Unit Note
n
Contrast Ratio (1), (2)
(1) (2),
CR 500 - - -
(5 Points) (5)
Response Time at Ta
TRT - 16 25 msec (1), (3)
( Rising + Falling )
L 30 - -
Color Gamut - 60 - %
13 Points
L - - 17
1.7 - (6)
White Variation
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Note 2) Definition of Contrast Ratio (CR) : Ratio of gray max (Gmax) ,gray min (Gmin)
at 5 points (33, 55, 77, 37, 73)
TR TF
100%
90%
Optical
Response
10%
0%
Time
Note 4) Definition of Average Luminance of White : measure the luminance of white at 5 points.
: test point
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Photo-detector
( TOPCON SR-3 )
Field = 2
50 cm
: test point
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Vsync Frequency fv - 60 - Hz
Note (1) Display data pins and timing signal pins should be connected.( GND = 0V )
(2) fV = 60Hz,
60Hz fDCLK = 76
76.69
69 MHZ
MHZ, VDD = 3.3V
3 3V , DC Current
Current.
(3) Power dissipation pattern
VIEW AREA
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3.3V M1
2SK1059
VDD ( LCD INPUT)
FUSE
R1 C1
47K 1uF
R2
CONTROL SIGNAL M2
(HIGH to LOW) 2SK1399
1K
12V
R3 C2
C3 47K
10000pF
1uF
0.1VDD
GND
470us
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IF X VF X 36 LEDs
Power Consumption P - - 45
4.5 W
(w/o Converter)
O t t Power
Output P Pout - - 23
2.3 W BLIM 100%
BLIM=100%
Note - Test Equipment : Fluke 45
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I2 C b
bus EDID
EEPROM
LVDS
LCDS
Input Connector LVDS Input/LCDS Output
I-PEX 20455-040E Timing Controller
Source
Driver
IC 15.6” HD
DC-DC TFT-LCD Panel
Converter
Gamma
VCOM
Generator
Generator
Video Signal
Control Signal
VCOM
Gamma
DVDD SOURCE PCB
AVDD TFT on Glass
Von/Voff
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Page
LED#1 Channel 1
Channel 4 LED#1 Channel 2
Channel 3 LED#1 Channel 3
LED#1 Channel 4
C
Channel 2 LED#2 Channel 1
LED#2 Channel 2
04-A00-S-110111
C
Channel 1
LED#2 Channel 3
LED#2 Channel 4
LED Placement
9
9
LED Wiring
…
8
8
8
…
Rev.No
LED#98Channel 1
…
…
…
4.2 LED connection and placement
LED#8 Channel 2
LED#8 Channel 3
2
2
2
LED#8 Channel 4
LTN156AT17-D
LED#9 Channel 1
4. BLOCK DIAGRAM
1
1
1
LED#9 Channel 2
LED#9 Channel 3
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LED Power LED#9 Channel 4
Doc.No.
Approval
5. INPUT TERMINAL PIN ASSIGNMENT
5.1. Input Signal & Power (LVDS, Connector : I-PEX 20455-040E )
8 Odd Rin0-
Odd_Rin0 - LVDS differential data input (R0-R5
(R0 R5, G0) (odd pixels)
9 Odd_Rin0+ + LVDS differential data input (R0-R5, G0) (odd pixels)
10 VSS Ground – Shield
11 Odd_Rin1- - LVDS differential data input (G1-G5, B0-B1) (odd pixels)
12 Odd_Rin1+ + LVDS differential data input (G1-G5, B0-B1) (odd pixels)
13 VSS Ground – Shield
14 Odd_Rin2- - LVDS differential data input (B2-B5, HS, VS, DE) (odd pixels)
+ LVDS differential data input (B2-B5, HS, VS, DE) (odd
15 Odd_Rin2+
pixels)
16 VSS Ground – Shield
17 Odd_ClkIN- - LVDS differential clock input (odd pixels)
18 Odd_ClkIN+ + LVDS differential clock input (odd pixels)
19 NC No connection
20 NC No connection
21 NC
C No connection
22 NC No connection
23 NC No connection
24 NC No connection
25 NC No connection
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Pin No. Name RGB Signal Pin No. Name RGB Signal
51 TxIN0 R0 14 TxIN14 G5
52 TxIN1 R1 15 TxIN15 B0
54 TxIN2 R2 19 TxIN18 B1
55 TxIN3 R3 20 TxIN19 B2
56 TxIN4 R4 22 TxIN20 B3
3 TxIN6 R5 23 TxIN21 B4
4 TxIN7 G0 24 TxIN22 B5
11 TxIN12 G3 30 TxIN26 DE
LVDS INTERFACE
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T
TxCLK OUT
RxCLK IN
T/7
DE Vsync Hsync B5 B4 B3 B2
B1 B0 G5 G4 G3 G2 G1
G0 R5 R4 R3 R2 R1 R0
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Black 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -
Blue 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 -
Green 0 0 0 0 0 0 1 1 1 1 1 1 0 0 0 0 0 0 -
Basic Cyan 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 -
Colors Red 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 -
Magenta 1 1 1 1 1 1 0 0 0 0 0 0 1 1 1 1 1 1 -
Yellow 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 -
White 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 -
Black 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 R0
Dark 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 R1
Gray 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 R2
Scale : : : : : : : : : : : : : : : : : : :
R3R60
Of : : : : : : : : : : : : : : : : : : :
Red 1 0 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 R61
Light 0 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 R62
Red 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 R63
Black 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 G0
Dark 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 G1
Gray 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 G2
Scale : : : : : : : : : : : : : : : : : : :
G3G60
Of : : : : : : : : : : : : : : : : : : :
G
Green 0 0 0 0 0 0 1 0 1 1 1 1 0 0 0 0 0 0 G61
Light 0 0 0 0 0 0 0 1 1 1 1 1 0 0 0 0 0 0 G62
Green 0 0 0 0 0 0 1 1 1 1 1 1 0 0 0 0 0 0 G63
Black 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 B0
Dark 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 B1
Gray
G 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 B2
Scale : : : : : : : : : : : : : : : : : : :
B3B60
Of : : : : : : : : : : : : : : : : : : :
Blue 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 1 1 1 B61
Light 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 B62
Blue 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 B63
Note 1) Definition of gray :
Rn: Red gray, Gn: Green gray, Bn: Blue gray (n=gray level)
Note 2)Input signal: 0 =Low level voltage, 1=High level voltage
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Line 1 R G B R G B R G B R G B
LTN156AT17-D
Line 768 R G B R G B R G B R G B
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One Line
Cycle TH - 1586 - Clocks -
Scanning Time
TV
TVD
DE
TH
DCLK
TC
THD
DE
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T2 T3
VALID
Signals
0V
T8 T9
T10 T11
0V T12 T13
PWM
0V T14 T15
B/L Enable
0V T5 T6
0<T3 ≤50 Delay from valid data OFF to VDD OFF at power Off
200 ≤T6 Delay from valid data off to B/L disable at power Off
10<T8 Delay from valid data on to LED driver Vin rising time 10%
10<T9 Delay from LED driver Vin falling time 10% to valid data Off
10<T12 Delay from LED driver Vin rising time 90% to PWM ON
10<T13 Delay from PWM Off to LED driver Vin falling time 10%
10<T15 Delay
y from B/L
/ Enable Off to PWM Off
Note : Backlight may flash if interface signal remains floating state at invalid period.
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CUSHION TOP
TOP, BOTTOM
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4 Carton 1 set
LTN156AT17
1019
15.6” HD xxxxxxxxxx xxx 40 mm
DP / N XXXXXX
CN –XXXXXX - XXXXX - XXX- XXXX – XXX
USP6639589 / USP5280371
MADE IN CHINA
80 mm
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※ Panel revision code scheme (Refer to the Red box on the label)
Build Name(s) Revision Code(s)
SST (WS) X00, X01, X02, … X09
PT (ES) X10, X11, X12, … X19
ST (CS) X20, X21, X23, … X29
XB (MP) A00, A01, A02, … A99
(5) Packing small box attach ( Following example is only for reference )
REV.xxx
Vendor ID/Loc :
21320/39792
20
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1. Handling
(b) Refrain from strong mechanical shock and / or any force to the module. In addition to
damage, this may cause improper operation or damage to the module.
(c) Note that polarizers are very fragile and could be easily damaged. Do not press or scratch
the
h surface
f h
harder
d than
h a HB pencilil llead.
d
(d) Wipe off water droplets or oil immediately. If you leave the droplets for a long time,
Staining and discoloration may occur.
(e) If the surface of the polarizer is dirty, clean it using some absorbent cotton or soft cloth.
(f) The desirable cleaners are water, IPA (Isoprophyl Alcohol) or Hexane.
Do not use Ketone type materials(ex. Acetone), Ethyl alcohol, Toluene, Ethyl acid or Methyl
chloride. It might permanent damage to the polarizer due to chemical reaction.
(g) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or
mouth . In case of contact with hands, legs or clothes, it must be washed away thoroughly
with soap.
(h) Protect the module from static , it may cause damage to the C-MOS Gate Array IC.
(i) Use fingerstalls with soft gloves in order to keep display clean during the incoming
inspection and assembly process.
(l) Do not adjust the variable resistor which is located on the back side.
(m) Protection film for polarizer on the module shall be slowly peeled off just before use so
th t the
that th electrostatic
l t t ti charge
h can be
b minimized.
i i i d
(n) Pins of I/F connector shall not be touched directly with bare hands.
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(c) The module shall be stored in a dark place. It is prohibited to apply sunlight or fluorescent
light during the store.
3. O
3 OPERATION
O
(b) Power supply should always be turned on/off by following item 6.3
“ Power on/off sequence “.
(d) The standard limited warranty is only applicable when the module is used for general
notebook applications. If used for purposes other than as specified, SEC is not to be
held reliable for the defective operations. It is strongly recommended to contact SEC
t find
to fi d outt fitness
fit for
f a particular
ti l purpose.
4. OTHERS
(c) Do not exceed the absolute maximum rating value. ( the supply voltage variation, input
voltage variation, variation in part contents and environmental temperature, so on)
Otherwise the module may be damaged.
(e) This module has its circuitry PCB’s on the rear side and should be handled carefully in
order not to be stressed.
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3 Header FF 11111111
4 Header FF 11111111
5 Header FF 11111111
6 Header FF 11111111
7 Header 00 00000000
8 EISA manufacture code = 3 Character ID 4C 01001100
9 EISA manufacture
f t code
d (Compressed
(C d ASCII) A3 10100011
0A Panel Supplier Reserved – Product Code 41 01000001
0B Panel Supplier Reserved – Product Code 54 01010100
00
Vendor / Product
0C LCD module Serial No - Preferred but Optional (“0” if not used) 00000000
EDID Version
0D LCD module Serial No - Preferred but Optional (“0” if not used) 00 00000000
0E LCD module Serial No - Preferred but Optional (“0” if not used) 00 00000000
0F LCD module Serial No - Preferred but Optional (“0” if not used) 00 00000000
10 Week of manufacture 00 00000000
11 Year of manufacture 14 00010100
12 EDID structure version # = 1 01 00000001
13 EDID revision # 04 00000100
14 Video I/P definition = Digital I/P 90 10010000
22
Parameters
18 Feature support ( DPM (Standby, Suspend, Active), Color Type, Other Feature) 0A 00001010
19 Red/Green Low bit (RxRy/GxGy) C8 11001000
1A Blue/White Low bit (BxBy/WxWy) 95 10010101
1B Red X Rx = 0.xxx 9E 10011110
Coordinates
Panel Color
Timings
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5A Flag 00 00000000
5B Fl
Flag 00 00000000
5C Flag 00 00000000
5D Data Type Tag: Alphanumeric Data String (ASCII) FE 11111110
5E Flag 00 00000000
5F Dell P/N 1st Character 34 00110100
60 Dell P/N 2nd Character 59 01011001
61 Dell P/N 3rd Character 34 00110100
th
47
Dell specific informattion
73 Frame Rate Details (SDRRS, DRRS, Max Frame Rate, Min Frame Rate) 01 00000001
er #4
96
Timing Descripte
7C (If <13 char, then terminate with ASCII code 0Ah, set remaining char = 20h) 20 00100000
7D (If <13 char, then terminate with ASCII code 0Ah, set remaining char = 20h) 20 00100000
hecksum
7E Extension flag (# of optional 128 EDID extension blocks to follow, Typ = 0) 00 00000000
Ch
7F Checksum (The 1-byte sum of all 128 bytes in this EDID block shall = 0) CF 11001111
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