ATME COLLEGE OF ENGINEERING, MYSURU

4-Bit Parallel Adder

Adding two bit numbers with each other gives rise to 4 – bit output

DHANUSH H V
12/31/2019
4 – Bit Parallel Adder:

The 4 – bit parallel is a digital addition of 2 – bit binary numbers. As shown in the below functional table which contains of 4 – bit binary (0000 to 1111) numbers from 0 to 15. Like
this there are two columns where the 4 – bit binary numbers are divided as input 1 and input 2 as shown in the below table ‘b’. The table ‘a’ represents the 4 – bit binary numbers with their
respective decimals.

Here in the input columns, the input 1 is given as A and B similarly the input 2 is given as C and D. The disadvantage in this is that we can add from 0 to 6 only i.e. 3 + 3(11 + 11)
because it a demo and simple circuit we can design adder for n numbers. After the input we have to observe on outputs also, the output column is in the table with variables Q0, Q1, Q2 and Q3
is a 4 – bit binary number. This 4 – bit output can be converted into decimal numbers by providing a 7 – segmented LED display to the output as shown in fig.a. The input of 7 – segment LED
display are denoted as a, b, c, d, e, f and g.

Table.A:4 – Bit binary to decimal numbers

Binary numbers Decimal numbers

0000 0
0001 1
0010 2
0011 3
0100 4
0101 5
0110 6
0111 7
1000 8
1001 9
1010 10
1011 11
1100 12
1101 13
1110 14
1111 15
K 0 1 2 3 4
Note: This binary numbers are written on the basis of 2 bits i.e. 2 = 1, 2 = 2, 2 = 4, 2 = 8 and 2 = 16 and vice versa.

By DHANUSH H V
For example, in the below binary number consider only the high inputs (i.e. 1) and they are 2 2 and 20. Then add those them together which gives like, 2 2 + 20 = 4 + 1 = 5

23 22 21 20

0 1 0 1
=5
Table.B: Functional Table for 4 – Bit parallel adder

Input 1 Input 2 Output 7 – Segmented LED display input

A B C D Q0 Q1 Q2 Q3 a b c d e f g
0 0 0 0 0 0 0 0 1 1 1 1 1 1 0

0 0 0 1 0 0 0 1 0 1 1 0 0 0 0
0 0 1 0 0 0 1 0 1 1 0 1 1 0 1
0 0 1 1 0 0 1 1 1 1 1 1 0 0 1
0 1 0 0 0 0 0 1 0 1 1 0 0 0 0

0 1 0 1 0 0 1 0 1 1 0 1 1 0 1
0 1 1 0 0 0 1 1 1 1 1 1 0 0 1
0 1 1 1 0 1 0 0 0 1 1 0 0 1 1
1 0 0 0 0 0 1 0 1 1 0 1 1 0 1
1 0 0 1 0 0 1 1 1 1 1 1 0 0 1

1 0 1 0 0 1 0 0 0 1 1 0 0 1 1
1 0 1 1 0 1 0 1 1 0 1 1 0 1 1
1 1 0 0 0 0 1 1 1 1 1 1 0 0 1
1 1 0 1 0 1 0 0 0 1 1 0 0 1 1
1 1 1 0 0 1 0 1 1 0 1 1 0 1 1
1 1 1 1 0 1 1 0 1 0 1 1 1 1 1
Note: Input 1 + Input 2 = Output (ex: 0 0 + 0 1 = 0 0 0 1, Row no.2)

By DHANUSH H V
Example to represent LED display;

If Input 1 + Input 2 = 5 or (0 1 0 1), then LED display inputs are

a 1
b 0
c 1
d
e
1
0
=
f 1
g 1

After these all, we have to plot K – Map to get Boolean Expression. Now let’s plot the K – Map;

K – Map for 7 – segmented LED display input:

a = Σm(0,2,3,5,6,8,9,11,12,14,15) b = Σm(0,1,2,3,4,5,6,7,8,9,10,12,13) c = Σm(0,1,3,4,6,7,9,10,11,12,13,14,15) d = Σm(0,2,3,5,6,8,9,11,12,14,15)

a = A’BC’D + B’C’D’ + A’CD’ + B’CD + AB’D +

ABD’ + ABC b = B’D’ + A’ + C’ c = A’C’D’ + B’D + BC + AC + AB d=a

By DHANUSH H V
e = Σm(0,2,5,8,15) f = Σm(0,7,11,10,13,14,15) g = Σm(2,3,5,6,7,8,9,10,11,12,13,14,15)

e = A’BC’D + ABCD + A’B’D’ + B’C’D’ f = A’B’C’D’ + BCD + ABD + AC g = BD + C + A

Logic Diagram for 4 – Bit Parallel Adder:

Let’s rewrite the Booleans Expressions for LED display inputs,

a = A’BC’D + B’C’D’ + A’CD’ + B’CD + AB’D + ABD’ + ABC

b = B’D’ + A’ + C’

c = A’C’D’ + B’D + BC + AC + AB

d=a

e = A’BC’D + ABCD + A’B’D’ + B’C’D’

f = A’B’C’D’ + BCD + ABD + AC

g = BD + C + A

By DHANUSH H V
This Logic diagram is designed
using LOGISIM.

By DHANUSH H V