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MAGNITUDES DE UN TRANSISTOR

TIP110, TIP111, TIP112


(NPN); TIP115, TIP116,
TIP117 (PNP)
Plastic Medium-Power
Complementary Silicon
Transistors
www.onsemi.com
Designed for general−purpose amplifier and low−speed switching
applications.
Features
• High DC Current Gain −




h FE = 2500 (Typ) @ I C
= 1.0 Adc
Collector−Emitter Sustaining Voltage − @ 30 mAdc
V CEO(sus) = 60 Vdc (Min) − TIP110, TIP115
= 80 Vdc (Min) − TIP111, TIP116
= 100 Vdc (Min) − TIP112, TIP117
Low Collector−Emitter Saturation Voltage −
V CE(sat) = 2.5 Vdc (Max) @ I C
= 2.0 Adc
Monolithic Construction with Built−in Base−Emitter Shunt Resistors
Pb−Free Packages are Available*
DARLINGTON
2 AMPERE
COMPLEMENTARY SILICON
POWER TRANSISTORS
60−80−100 VOLTS, 50 WATTS
MARKING
DIAGRAM
4
TO−220AB
CASE 221A
STYLE 1
1
2
3
STYLE 1:
PIN 1.
2.
3.
4.
TIP11x
x
A
Y
WW
G
TIP11xG
AYWW
BASE
COLLECTOR
EMITTER
COLLECTOR
= Device Code
= 0, 1, 2, 5, 6, or 7
= Assembly Location
= Year
= Work Week
= Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information on page 3 of
this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2014
November, 2014 − Rev. 8
1
Publication Order Number:
TIP110/DTIP110, TIP111, TIP112 (NPN); TIP115, TIP116, TIP117 (PNP)
MAXIMUM RATINGS
Symbol TIP110,
TIP115 TIP111,
TIP116 TIP112,
TIP117 Unit
V CEO 60 80 100 Vdc
Collector−Base Voltage V CB 60 80 100 Vdc
Emitter−Base Voltage V EB 5.0 Vdc
Collector Current − Continuous
− Peak I C 2.0
4.0 Adc
Base Current I B 50 mAdc
Total Power Dissipation @ T C = 25°C
Derate above 25°C P D 50
0.4 W
W/°C
Total Power Dissipation @ T A = 25°C
Derate above 25°C P D 2.0
0.016 W
W/°C
Rating
Collector−Emitter Voltage
Unclamped Inductive Load Energy − Figure 13
Operating and Storage Junction
E 25 mJ
T J , T stg –#65 to +#150 °C
Symbol Max Unit
THERMAL CHARACTERISTICS
Characteristics
Thermal Resistance, Junction−to−Case R qJC 2.5 °C/W
Thermal Resistance, Junction−to−Ambient R qJA 62.5 °C/W
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any
of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
ELECTRICAL CHARACTERISTICS (T C = 25°C unless otherwise noted)
Symbol
Characteristic
Min Max
60
80
100 −




− 2.0
2.0
2.0


− 1.0
1.0
1.0
− 2.0
1000
500 −

Unit
OFF CHARACTERISTICS
Collector−Emitter Sustaining Voltage (Note 1)
(I C = 30 mAdc, I B = 0)
TIP110, TIP115
TIP111, TIP116
TIP112, TIP117
Collector Cutoff Current
(V CE = 30 Vdc, I B = 0)
(V CE = 40 Vdc, I B = 0)
(V CE = 50 Vdc, I B = 0) TIP110, TIP115
TIP111, TIP116
TIP112 ,TIP117
Collector Cutoff Current
(V CB = 60 Vdc, I E = 0)
(V CB = 80 Vdc, I E = 0)
(V CB = 100 Vdc, I E = 0) TIP110, TIP115
TIP111, TIP116
TIP112, TIP117
Emitter Cutoff Current
(V BE = 5.0 Vdc, I C = 0)
V CEO(sus)
Vdc
I CEO
mAdc
I CBO
I EBO
mAdc
mAdc
ON CHARACTERISTICS (Note 1)
DC Current Gain
(I C = 1.0 Adc, V CE = 4.0 Vdc)
(I C = 2.0 Adc, V CE = 4.0 Vdc)
h FE

Collector−Emitter Saturation Voltage (I C = 2.0 Adc, I B = 8.0 mAdc) V CE(sat) − 2.5 Vdc
Base−Emitter On Voltage (I C = 2.0 Adc, V CE = 4.0 Vdc) V BE(on) − 2.8 Vdc
Small−Signal Current Gain (I C = 0.75 Adc, V CE = 10 Vdc, f = 1.0 MHz) h fe 25 − −
Output Capacitance
(V CB = 10 Vdc, I E = 0, f = 0.1 MHz) C ob −
− 200
100
DYNAMIC CHARACTERISTICS
TIP115, TIP116, TIP117
TIP110, TIP111, TIP112
pF
Product parametric performance is indicated in the Electrical Characteristics for the listed
test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under
different conditions.
1. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2%.
www.onsemi.com
2TIP110, TIP111, TIP112 (NPN); TIP115, TIP116, TIP117 (PNP)
COLLECTOR
COLLECTOR
BASE
BASE
≈ 8.0 k
≈ 120
≈ 8.0 k
≈ 120
EMITTER
EMITTER
Figure 1. Darlington Circuit Schematic
ORDERING INFORMATION
Device
Package Shipping
TO−220 50 Units / Rail
TO−220
(Pb−Free) 50 Units / Rail
TO−220 50 Units / Rail
TO−220
(Pb−Free) 50 Units / Rail
TO−220 50 Units / Rail
TO−220
(Pb−Free) 50 Units / Rail
TO−220 50 Units / Rail
TO−220
(Pb−Free) 50 Units / Rail
TO−220 50 Units / Rail
TO−220
(Pb−Free) 50 Units / Rail
TO−220 50 Units / Rail
TO−220
(Pb−Free) 50 Units / Rail
TIP110
TIP110G
TIP111
TIP111G
TIP112
TIP112G
TIP115
TIP115G
TIP116
TIP116G
TIP117
TIP117G
TAT C
3.0 60
2.0 40
TC
1.0 20
TA
0
0
0
20
40
60
80
100
T, TEMPERATURE (°C)
120
Figure 2. Power Derating
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3
140
160TIP110, TIP111, TIP112 (NPN); TIP115, TIP116, TIP117 (PNP)
4.0
V CC
-#30 V
R B & R C VARIED TO OBTAIN DESIRED CURRENT LEVELS
D 1 , MUST BE FAST RECOVERY TYPE, eg:
#1N5825 USED ABOVE I B ≈ 100 mA
#MSD6100 USED BELOW I B ≈ 100 mA
V CC = 30 V
I C /I B = 250
ts
I B1 = I B2
T J = 25°C
2.0
RC
SCOPE
TUT
V2
approx
+#8.0 V
RB
D1
51
0
V1
approx
-12 V
≈ 8.0 k
≈ 60
+#4.0 V
25 ms
tr
0.6
0.4
for t d and t r , D 1 is disconnected
and V 2 = 0, R B and R C are varied
to obtain desired test currents.
t r , t f ≤ 10 ns
DUTY CYCLE = 1.0%
tf
1.0
0.8
0.2
0.04 0.06
For NPN test circuit, reverse diode,
polarities and input pulses.
0.1
Figure 3. Switching Times Test Circuit
1.0
0.7
0.5
Figure 4. Switching Times
P (pk)
Z qJC(t) = r(t) R qJC
R qJC = 2.5°C/W MAX
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
t1
READ TIME AT t 1
t2
T J(pk) - T C = P (pk) Z qJC(t)
DUTY CYCLE, D = t 1 /t 2
0.05
0.02
0.01
SINGLE PULSE
0.01
0.01
4.0
0.1
0.1
0.02
2.0
0.2
0.2
0.03
0.2
0.4 0.6
1.0
I C , COLLECTOR CURRENT (AMP)
D = 0.5
0.3
0.07
0.05
t d @ V BE(off) = 0
PNP
NPN
0.02
0.05
0.1
0.2
0.5
1.0
2.0
5.0
t, TIME (ms)
10
Figure 5. Thermal Response
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4
20
50
100
200
500
1.0 kTIP110, TIP111, TIP112 (NPN); TIP115, TIP116, TIP117 (PNP)
ACTIVE−REGION SAFE−OPERATING AREA
10
4.0
1#ms
5#ms
2.0
1.0
T J = 150°C
dc
BONDING WIRE LIMITED
THERMALLY LIMITED
@ T C = 25°C (SINGLE PULSE)
SECONDARY BREAKDOWN LIMITED
CURVES APPLY BELOW
RATED V CEO
0.1
1.0
TIP115
TIP116
TIP117
10
4.0
2.0
TIP110
TIP111
TIP112
CURVES APPLY BELOW
RATED V CEO
0.1
1.0
40 60 80 100
10
V CE , COLLECTOR-EMITTER VOLTAGE (VOLTS)
T J = 150°C
dc
BONDING WIRE LIMITED
THERMALLY LIMITED
@ T C = 25°C (SINGLE PULSE)
SECONDARY BREAKDOWN LIMITED
1.0
60 80 100
10
V CE , COLLECTOR-EMITTER VOLTAGE (VOLTS)
Figure 6. TIP115, 116, 117
Figure 7. TIP110, 111, 112
There are two limitations on the power handling ability of
a transistor: average junction temperature and second
breakdown. Safe operating area curves indicate I C − V CE
limits of the transistor that must be observed for reliable
operation; i.e., the transistor must not be subjected to greater
dissipation than the curves indicate.
The data of Figures 6 and 7 is based on T J(pk) = 150°C;
T C is variable depending on conditions. Second breakdown
pulse limits are valid for duty cycles to 10% provided T J(pk)
< 150°C. T J(pk) may be calculated from the data in Figure 5.
At high case temperatures, thermal limitations will reduce
the power that can be handled to values less than the
limitations imposed by second breakdown.
200
T C = 25°C
100
70
50
C ob
30
C ib
20
PNP
NPN
10
0.04 0.06 0.1
0.2
0.4 0.6 1.0
2.0 4.0 6.0 10
V R , REVERSE VOLTAGE (VOLTS)
Figure 8. Capacitance
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5
20
40TIP110, TIP111, TIP112 (NPN); TIP115, TIP116, TIP117 (PNP)
NPN
TIP110, 111, 112
PNP
TIP115, 116, 117
6.0 k
6.0 k
T J = 125°C
3.0 k
25°C
2.0 k
-#55°C
1.0 k
800
600
400
300
0.04 0.06
0.1
0.4 0.6
0.2
1.0
I C , COLLECTOR CURRENT (AMP)
3.0 k
25°C
2.0 k
-#55°C
1.0 k
800
600
400
300
0.04 0.06
4.0
2.0
V CE = 3.0 V
T J = 125°C
4.0 k
4.0 k
V CE = 3.0 V
0.1
2.0
0.2
0.4 0.6
1.0
I C , COLLECTOR CURRENT (AMP)
4.0
(VOLTS)
Figure 9. DC Current Gain
3.4
3.0
T J = 25°C
IC=
0.5 A
1.0 A
4.0 A
2.0 A
2.6
2.2
1.8
1.4
1.0
0.6
0.1
0.2
0.5
1.0 2.0
5.0 10
I B , BASE CURRENT (mA)
20
50
100
3.4
T J = 25°C
3.0
2.6
IC=
0.5 A
1.0 A
2.0 A
4.0 A
2.2
1.8
1.4
1.0
0.6
0.1
0.2
0.5
1.0 2.0
5.0 10
I B , BASE CURRENT (mA)
20
50
100
Figure 10. Collector Saturation Region
2.2
2.2
T J = 25°C
T J = 25°C
1.4
1.8
V BE(sat) @ I C /I B = 250
1.8
V BE @ V CE = 3.0 V
1.0
V CE(sat) @ I C /I B = 250
0.6
0.2
0.04 0.06
V BE(sat) @ I C /I B = 250
1.4
V BE @ V CE = 3.0 V
1.0
V CE(sat) @ I C /I B = 250
0.6
0.1
0.2
0.4
0.6
1.0
2.0
0.2
0.04 0.06
4.0
I C , COLLECTOR CURRENT (AMP)
0.1
0.2
0.4
0.6
1.0
I C , COLLECTOR CURRENT (AMP)
Figure 11. “On” Voltages
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6
2.0
4.0TIP110, TIP111, TIP112 (NPN); TIP115, TIP116, TIP117 (PNP)
PNP
TIP115, 116, 117
+#0.8
NPN
TIP110, 111, 112
*APPLIES FOR I C /I B ≤ h FE /3
0
-#0.8
-#1.6
25°C to 150°C
*#q VC for V CE(sat)
-#2.4
-#55°C to 25°C
25°C to 150°C
-#3.2
q VC for V BE
-#55°C to 25°C
-#4.0
-#4.8
0.04 0.06
0.1
0.2
0.4 0.6
1.0
2.0
4.0
+#0.8
*APPLIES FOR I C /I B ≤ h FE /3
0
-#0.8
-#1.6
25°C to 150°C
*#q VC for V CE(sat)
-#55°C to 25°C
-#2.4
25°C to 150°C
-#3.2
-#4.0
q VC for V BE
-#4.8
0.04 0.06
-#55°C to 25°C
0.1
I C , COLLECTOR CURRENT (AMP)
0.2
0.4 0.6
1.0
2.0
4.0
I C , COLLECTOR CURRENT (AMP)
Figure 12. Temperature Coefficients
10 5
REVERSE
10 4
10 3
REVERSE
FORWARD
10 5
V CE = 30 V
10 2
T J = 150°C
10 1
10 0
100°C
25°C
10 -1
-#0.6 -#0.4 -#0.2
0
10 3
V CE = 30 V
10 2
10 1
10 0
T J = 150°C
100°C
25°C
10 -1
-#0.6 -#0.4 -#0.2
+#0.2 +#0.4 +#0.6 +#0.8 +#1.0 +#1.2 +#1.4
V BE , BASE‐EMITTER VOLTAGE (VOLTS)
TEST CIRCUIT
t w ≈ 3.5 ms (SEE NOTE A)
100 mH
R BB1
TUT
2#kW
50 W
V BB1 = 10 V
+
-
+
-
R BB2
100 W
50 W
V BB2 = 0
+#0.2 +#0.4 +#0.6 +#0.8 +#1.0 +#1.2 +#1.4
Figure 13. Collector Cut-Off Region
VOLTAGE AND CURRENT WAVEFORMS
INPUT
VOLTAGE
MJE254
0
V BE , BASE‐EMITTER VOLTAGE (VOLTS)
V CE MONITOR
INPUT
FORWARD
10 4
0V
-#5 V
100 ms
V CC = 20 V
IC
MONITOR
COLLECTOR
CURRENT
RS=
0.1 W
0.71 A
0V
V CER
COLLECTOR
VOLTAGE
20 V
V CE(sat)
Note A: Input pulse width is increased until I CM = 0.71 A,
NPN test shown; for PNP test
reverse all polarity and use MJE224 driver.
Figure 14. Inductive Load Switching
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7TIP110, TIP111, TIP112 (NPN); TIP115, TIP116, TIP117 (PNP)
PACKAGE DIMENSIONS
TO−220
CASE 221A−09
ISSUE AH
−T−
B
F
SEATING
PLANE
C
T
S
4
DIM
A
B
C
D
F
G
H
J
K
L
N
Q
R
S
T
U
V
Z
A
Q
U
123
H
K
Z
LR
VJ
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION Z DEFINES A ZONE WHERE ALL
BODY AND LEAD IRREGULARITIES ARE
ALLOWED.
G
D
N
INCHES
MIN
MAX
0.570
0.620
0.380
0.415
0.160
0.190
0.025
0.038
0.142
0.161
0.095
0.105
0.110
0.161
0.014
0.024
0.500
0.562
0.045
0.060
0.190
0.210
0.100
0.120
0.080
0.110
0.045
0.055
0.235
0.255
0.000
0.050
0.045
---
---
0.080
STYLE 1:
PIN 1.
2.
3.
4.
MILLIMETERS
MIN
MAX
14.48
15.75
9.66
10.53
4.07
4.83
0.64
0.96
3.61
4.09
2.42
2.66
2.80
4.10
0.36
0.61
12.70
14.27
1.15
1.52
4.83
5.33
2.54
3.04
2.04
2.79
1.15
1.39
5.97
6.47
0.00
1.27
1.15
---
---
2.04
BASE
COLLECTOR
EMITTER
COLLECTOR
ON Semiconductor and the
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its
subsidiaries in the United States and/or other countries.
SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and
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changes without further notice to any products herein. SCILLC makes no warranty,
representation
or guarantee regarding the suitability of its products for any particular purpose, nor does
SCILLC assume any liability arising out of the application or use of any product or circuit,
and
specifically disclaims any and all liability, including without limitation special, consequential
or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets
and/or specifications can and do vary in different applications and actual performance may
vary over time. All operating parameters, including “Typicals” must be validated for each
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under its patent rights nor the rights of others. SCILLC products are not designed, intended,
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Sales Representative
TIP110/D

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