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FOOSE UMA Schematics Document (AMD 15.4")


D D

AMD Giffin CPU S1G2


AMD RS780 +SB700
C C

2008-01-04
REV : SB
B B

DY : Nopop Component
5761 : Use BCM5761E
5756 : Use BCM5756M
B_TPM : Use LOM TPM
C_TPM : Use China TPM

A <Variant Name> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
COVER PAGE
Size Document Number Rev
A3 FOOSE-AMD 15.4" SB
Date: Friday, January 04, 2008 Sheet 1 of 53
5 4 3 2 1
5 4 3 2 1

FOOSE AMD 15 UMA Block Diagram Project code : 91.4X801.001


PCB P/N : 48.4X801.0SB
CHARGER
BQ24745RHDR-GP
INPUTS OUTPUTS
41

Revision : SB 15"07237-SB +DC_IN_SS


DDRII DIMM2 +PWR_SRC
AMD Giffin CPU DDRII 667
667/800 11
+CHAGER_SRC
CLK GEN
ICS9LPRS474AKLFT
6
S1G2 (35W) CPU CORE
D
LCD 15.4" ISL6265HRTZ-T-GP 47 D

638-Pin uFCPGA638 DDR II 667


DDRII DIMM1
INPUTS OUTPUTS
7,8,9,10 667/800 12
Inverter 17
+VCC_CORE0
Thermal & Fan +PWR_SRC +VCC_CORE1

OUT
MEC4002 HyperTransport +VDDNB
38

IN
16X16 CRT CONN 18 SYSTEM DC/DC
SN0608098-GP 46
LVDS(2chanel)
North Bridge VSW INPUTS OUTPUTS

E-Docking
VGA TS3DV520E-GP S-Vedio CONN18
+5V_ALW
AMD RS780M S-Video +PWR_SRC
Local Frame Buffer 18 +3.3V_ALW
CPU I/F LVDS, CRT I/F Display Port1
GDDRII Side Port SYSTEM DC/DC
INTEGRATED GRAHPICS Display Port2
64MB TPS51116PWPR 45
15 PCIE(6)
INPUTS OUTPUTS
13,14,15,16 Analog
DAI +1.8V_SUS
MIC/HDP +PWR_SRC
C
SSM2602 +0.9V_DDR_VTT C

MIC IN 32 SYSTEM DC/DC


A-Link Int Mic 44
L6935TR
4X4 I/O Board
INPUTS OUTPUTS
HP1
HDD SATA SATA 34 +1.8V_SUS +1.5V_RUN
29 Azalia
South Bridge SYSTEM DC/DC
SATA
HDA CODEC TPS51117PWR-GP 43
12.7mm ODD SATA AMD SB700 OP AMP INPUTS OUTPUTS
29 IDT 92HD71B7 Mini-Card 1
E-SATA USB 2.0/1.1 ports
32
TPA6040A33 2CH
+PWR_SRC +1.2V_ALW_SUS
WWAN/WPAN
ETHERNET (10/100/1000Mb) SPEAKER PCIE 0 31 SYSTEM DC/DC
High Definition Audio RJ11 TPS51117PWR-GP 42
MDC MODEM
Ricoh ATA 66/100
29
CONN 25 INPUTS OUTPUTS
1394 30
R5C847 1/2 Mini-Card 2 +PWR_SRC +1.1V_RUN
USB ACPI 1.1 USB 2.0 x 12 SYSTEM DC/DC
WLAN/UWB
B SD/SDIO 1394 LPC I/F PCIE 1 31
EMC4002 38 B

/MMC+27 CardReader FLASH INPUTS OUTPUTS


PCI PCI/PCI BRIDGE
2Mb/8Mb PCIE 2 Left Side: USB x 2 30 +3.3V_RUN +2.5V_RUN
CARD-BUS Card 19,20,21,22,23
24
LOM
RJ45 Right Side:
I/O Board
CARD BUS B5756M/5761E CONN USB x 2
Card 28 26,27 TPM
25
39
SSX35B
(Optional)25 GB DMWG ESW Fingerprint PCB LAYER
BIOS/DASH SPI LPC Bus TPM 1.2
16Mb 24 PORT 10(Optional)
21 L1:TOP
37
L2:VCC
DASH L3:Signal
16Mb SPI L4:Signal
34 KBC LPC L5:GND
MEC 5035 BC Link ECE 5028 L6:Bottom
LPC 36
BC Link 192kB Flash SIO Expander35
A
Int. TouchPad PS2 <Variant Name> A
KB KSI/KSO 34
ECE1077 30 Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
System Block Diagram
Size Document Number Rev
A3 FOOSE-AMD 15.4" SB
Date: Friday, January 04, 2008 Sheet 2 of 53
5 4 3 2 1
5 4 3 2 1

DOCKING

D D

ADAPTER +VCC_CORE0 48 PWM


17
RUN_ON
SI3457BDV
+INV_PWR_SRC
19.5V 19.5V ISL6265HR +VCC_CORE1 LDO
3.17A 4.43A 48
65W 90W
+PWR_SRC 48
RUN SUS ALW
+VDDNB 48
BATTERY

9~11.1V
9cell
+3.3V_ALW2
85WH 47
SN0608098 L6935TR TPS51117
C
47
TPS51117 TPS51116 C

BQ24745RHDR +5V_ALW_2 45 44
43
46
47

1.5V_RUN_ON
Charger

1.1V_RUN_ON
+5V_ALW

1.2V_ALW_SUS_ON
ALW_ON

ALW_ON

0.9V_DDR_VTT_ON
+15V_ALW

1.8V_DDR_ON
47 +1.5V_RUN
+1.2V_ALW_SUS 1.1V_RUN
45 43
47 47 44

+5V_ALW +3.3V_ALW +1.8V_SUS +0.9V_DDR_VTT

46 46
AUX_ON

AUX_EN_WOWL
3.3V_SUS_ON
3.3V_RUN_ON

SI4800BDY SI3456BDV
FDS8880 SI3456BDV 42 30
49 24
SI3456BDV SI4800BDY SI4800BDY
B B

49 49 49
+3.3V_SUS +3.3V_WLAN
ODD_EN

RUN_ON
HDDC_EN

+3.3V_RUN 42 30
49

+3.3V_LAN BCM5756M/BCM5761E
LOM_REGCTL12_PNP
28
MMJT9435T1G
+5V_HDD +5V_ODD +5V_RUN 0.39A MAX +1.2V_LOM
24
49 49 49
EMC4002 LOM_REGCTL25_PNP
24

39
0.233A
MBT35200MT1G +2.5V_LOM
24
24

+2.5V_RUN PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
39 PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

A A

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Power Block Diagram


Size Document Number Rev
A2 FOOSE-AMD 15.4" SB
Date: Friday, January 04, 2008 Sheet 3 of 53
5 4 3 2 1
5 4 3 2 1

+3.3V_RUN U4C
+3.3V_RUN 4.7K +3.3V_RUN
+3.3V_ALW_R DIMM1 (A0) DIMM2 (A4)
U10A
4.7K
F8 DAC_SCL
J6 SMB_ALERT# DAT_DDC2_S 2
DY10K 2.2K 2.2K
195 197 197
2N7002
AA18 MEM_SCLK 195 E8 DAC_SDA 2N7002
CLK_DDC2_S 3 TS3DV520
D
SPD W18 MEM_SDATA 3K page 16
D

+3.3V_ALW_R
page 22 RS780
SB700 +3.3V_ALW_R +3.3V_LAN +5V_RUN
+3.3V_RUN
BCM5761E 3K
B9
2.2K 2.2K I2C_CLK LCD_DDCLK 15
4.7K
K1 LOM_SBCLK_R 2N7002 LOM_SBCLK 2N7002
4.7K LCD1 CONNECTOR
A9 I2C_DATA LCD_DDCDAT 16 page 17
K2 LOM_SBDATA_R 2N7002 LOM_SBDATA 2N7002
+3.3V_ALN CLK_DOCK 79
+3.3V_ALW DAT_DOCK 80
4.7K +5V_RUN
MEC5035
2.2K
2.2K
77 78
A10 LOM_SMB_ALERT# 4.7K +3.3V_WLAN
4.7K
+3.3V_ALW +3.3V_ALW
0R
94 LOM_WLAN_SMBDAT SB_SMBDATA_LAN 2.2K 2.2K
CLK_KBD +3.3V_RUN
93 LOM_WLAN_SMBCLK 8.2K 8.2K 10K 0R page 29
SB_SMBCLK_LAN DAT_KBD 30
2N7002 WLAN_SBCLK
71 73 77 78 WLAN
3 DOCK_SMB_ALERT# 133 2N7002 WLAN_SBDATA 32
+3.3V_ALW
5 DOCK_SMB_DAT 129 42
DOCK 19
6 DOCK_SMB_CLK 8.2K 8.2K 127 page 37
+3.3V_ALW +3.3V_RUN
7 LCD_SMBDAT 13
Invinter
C C
2.2K 2.2K 2.2K
8 LCD_SMBCLK 14 SMBus Address : 58h 2.2K
+3.3V_RUN page 29
page 17
97 SMBUS_WIRELESS_DAT SMBUS_WIRELESS_DAT_R 30
2N7002
MEC5035 98 SMBUS_WIRELESS_CLK SMBUS_WIRELESS_CLK_R 32 WWAN
2N7002
81 MS_DAT
82 MS_CLK
+3.3V_RUN
+3.3V_ALW Support WAKE ON LAN??
+3.3V_RUN 2.2K 2.2K
2.2K 2.2K page 6 100K 10K
12
CKG_SMBDAT CLK_SDATA 2
2N7002
13 CKG_SMBCLK CLK_SCLK 1 ICS9LPRS474
2N7002 +3.3V_ALW
SMBus Address : D2h
28 page 30

Charger IC 27 SSM2602
+3.3V_ALW page 38 +1.8V_SUS
BQ24745RHDR
+3.3V_SUS
2.2K 2.2K 390 390

99 CPU_THRM_SMBDATA FDV301N CPU_SID AF5

100 CPU_THRM_SMBCLK AF4 CPU


FDV301N CPU_SIC page 7

+3.3V_ALW

B 2.2K 2.2K ᒔᎁALW or ALW2,check vender ‫אױ‬൷ALW B

111 100 page 45


PBAT_SMBDAT 6
Primary Battery Connector
+3.3V_ALW 100
112 PBAT_SMBCLK 7 SMBus Address : 16h

100K
+5V_RUN
39 BC_DAT_ECE1077 2
Touch pad
40 BC_CLK_ECE1077 10k 10k 3
Connector
75 CLK_TP_SIO 9

76 DAT_TP_SIO 10
+3.3V_ALW

100K
23 BC_CLK_EMC4002
EMC4002
24 BC_DAT_EMC4002
SMBus Address : 5Eh
+3.3V_ALW

100K
87 BC_CLK_ECE5028
86 BC_DAT_ECE5028
ECE5028
A A

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
SMBUS BLOCK Diagram
Size Document Number Rev
A1 FOOSE-AMD 15.4" SB
Date: Friday, January 04, 2008 Sheet 4 of 53
5 4 3 2 1
5 4 3 2 1

POWER STATES USB PORT# DESTINATION


Signal SLP SLP ALWAYS SUS RUN 0 Left Side Top
S3# S5# PLANE PLANE PLANE CLOCKS
State

1 Left Side Bottom


RUN S0 (Full ON) H H ON ON ON ON
D
2 Right Side Top D

SUS S3 (Suspend to RAM) L H ON ON OFF OFF

3 Right Side Bottom


ALW S4 (Suspend to DISK) L H ON OFF OFF OFF

4 MINI CARD 2 (WLAN)


ALW S5 (SOFT OFF) L L ON OFF OFF OFF

5 MINI CARD 1 (WWAN/Bluetooth)


2.0
6 Reserve
Power Management TABLE SB700
ALW_2 (AUX) ALW SUS RUN 7 Card Bus
+DC_IN +15V_ALW +5V_SUS +5V_RUN 8 Dock_1
+PWR_SRC +5V_ALW +3.3V_SUS +5V_HDD
C
+5V_ALW_2 +3.3V_ALW +3.3V_ALW_R +5V_ODD 9 Dock_2 C

+3.3V_ALW_2 +3.3V_WLAN +1.8V_SUS +3.3V_RUN


power
plane +RTC_CELL +3.3V_LAN +1.2V_ALW_SUS +2.5V_RUN 10 Biometric
+2.5V_LOM +1.2V_SUS +1.8V_RUN
+1.2V_LOM +0.9V_DDR_VTT +1.8V_MEM_VDDQ 11 LOM
+V_DDR_VREF_M +1.5V_RUN
+1.2V_RUN 12 NC
+1.1V_RUN 1.1
State +0.9V_MEM_VTT 13 NC
+VCC_CORE0
+VCC_CORE1 19,34,35,39 +RTC_CELL +RTC_CELL

+VDDNB 13,14,15,16,43 +1.1V_RUN +1.1V_RUN

+INV_PWR_SRC 22,44,49 +1.2V_ALW_SUS +1.2V_ALW_SUS


PCI EXPRESS DESTINATION 31,45,49 +1.5V_RUN +1.5V_RUN

RUN S0 ON ON ON ON 17,22,24,31,37,47,49 +15V_ALW +15V_ALW


B
Lane 0 MINI CARD-1 WWAN 7,9,16,19,21,22,49,50 +1.2V_RUN +1.2V_RUN
B

SUS S3 ON ON ON OFF 17,41,42,43,44,46,47,48,51 +PWR_SRC +PWR_SRC


Lane 1 MINI CARD-2 WLAN 11,12 +VREF_DDR_MEM +VREF_DDR_MEM

ALW S5 S4/AC ON ON OFF OFF 8,11,12,15,46,49 +0.9V_DDR_VTT +0.9V_DDR_VTT


Lane 2 LOM 17 +LCDVDD +LCDVDD

ALW S5 S4 on Battery ON OFF OFF OFF 10,48 +VCC_CORE0 +VCC_CORE0


Lane 3 RESERVED 10,48 +VCC_CORE1 +VCC_CORE1

17 +INV_PWR_SRC +INV_PWR_SRC
Lane 4 RESERVED 8,9,10,11,12,39,45,46,48,49,50 +1.8V_SUS +1.8V_SUS

18,22,28,30,31,33,34,37,38,39,48,49,50 +5V_RUN +5V_RUN


Lane 5 RESERVED 9,17,19,30,38,40,41,42,44,47,49,50,51 +5V_ALW +5V_ALW

PCI ROUTING TABLE ( By SB700 side ) 6,17,19,22,24,29,30,31,34,35,37,38,39,40,41,42,47,49,50,51 +3.3V_ALW +3.3V_ALW

9,20,22,29,30,35,39,43,44,46,49,50 +3.3V_SUS +3.3V_SUS

6,9,11,12,14,16,17,18,19,20,21,22,23,24,25,26,27,28,31,32,34,35,37,38,39,40,48,49,50,51 +3.3V_RUN +3.3V_RUN

A <Variant Name> A

PCI DEVICE IDSEL REQ#/GNT# VD100/SIRQ INT#


Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

REQ1# INTE# INTF# Title

RICOH R5C833 AD17 SERIRQ Table of Content


GNT1# 1394 SD
Size Document Number Rev
A3 FOOSE-AMD 15.4" SB
Date: Friday, January 04, 2008 Sheet 5 of 53
5 4 3 2 1
5 4 3 2 1

CLKREQ# MAP
CLK GEN CLKREQ0# No use
X01
Vendor suggest. +3.3V_CLK_VDD (40 mils) +3.3V_CLK_VDD
L28
+3.3V_RUN

CLKREQ1# CLKSRC 1 MINI1 1 2

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC2D2U6D3V3KX-GP

SC22U6D3V5MX-2GP
C849 C344 C322 C349 C303 C273 C276 C351 C320 C350 BLM18PG121SN1D-GP

1
CLKREQ2# No use
SSID = CLOCK CLKREQ3# CLKSRC 3 LOM

2
CLKREQ4# CLKSRC 4 MINI3
D
CLKREQ5# No use D
X01 +3.3V_CLK_VDDREF
CLKREQ6# No use Vendor suggest. L10
CLKREQ7# No use 1 2

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
BLM18PG121SN1D-GP

1
C801 C272 C264
SC2D2U6D3V3KX-GP

2
+3.3V_CLK_VDDA
L20
1 2
BLM18PG121SN1D-GP

1
2 3 CLK_NB_GFX_R C306 C314
14 CLK_NB_GFX CLK_NB_GFX#_R SCD1U10V2KX-4GP
14 CLK_NB_GFX# 1 4 SC10U6D3V3MX-GP X01
Change to PSL part.

2
RN34
+3.3V_RUN +3.3V_RUN SRN0J-6-GP

31
32

29
30

25
26

37

43

60
61

59

52

28

17
12

69

48
1
2

1
2

1
2

3
RN18 RN24 RN37 U33

1
SRN10KJ-5-GP

SRN10KJ-5-GP

SRN10KJ-5-GP

10KR2J-3-GP
R250

ATIG0T_LPRS

ATIG1T_LPRS

ATIG2T_LPRS
ATIG0C_LPRS

ATIG1C_LPRS

ATIG2C_LPRS

VDDSATA

VDDA
VDDREF
VDDREF

VDDHTT

VDDATIG
VDDSB_SRC

VDD48

VDD
VDDCPU

VDDSRC
VDDSRC
R249
DY DY DY 10KR2J-3-GP
4
3

4
3

4
3

2
CLKREQ0# 24 21 CLK_SRC0C_LPRS 2 3 CLK_NBGPP_CLK# 14
CLKREQ0# SRC0C_LPRS CLK_SRC0T_LPRS SRN0J-6-GP
C
31 WWAN_CLKREQ#
CLKREQ2#
50
49
CLKREQ1# SRC0T_LPRS 22 1 4
RN32
CLK_NBGPP_CLK 14 NBGPP(100MHz) C
CLKREQ2# CLK_PCIE_WWAN#_R
24 LOM_CLKREQ# 42 CLKREQ3# SRC1C_LPRS 19 2 3 CLK_PCIE_WWAN# 31
SC12P50V2JN-3GP CLK_PCIE_WWAN_R SRN0J-6-GP
C254
31 WLAN_CLKREQ# 41
EXP_CLKREQ# 23 CLKREQ4# SRC1T_LPRS 20 1 4
RN31
CLK_PCIE_WWAN 31 WWAN(100MHz)
CLKREQ#33 CLKREQ5# CLK_PCIE_MINI2#_R
2 1 33 CLKREQ6# SRC2C_LPRS 15 1
CLKREQ#40 40 16 CLK_PCIE_MINI2_R 1 TP32
CLKREQ7# SRC2T_LPRS
1

22R2J-2-GP TP31
SB700_USB(48MHz)
X2 DY R173 R174 1 CLK_48 71 CLK_PCIE_LOM#_R
X-14D31818M-43GP 1MR2F-GP 20 CLK48_USB 2
70
48MHZ_0_2X SRC3C_LPRS 13
14 CLK_PCIE_LOM_R
2
1
3
4 SRN0J-6-GP CLK_PCIE_LOM# 24 LOM(100MHz)
48MHZ_1_2X SRC3T_LPRS RN25 CLK_PCIE_LOM 24
X01 EC10 1DY 2
2

CLK_X1 CLK_PCIE_WLAN#_R
67 9 2 3 CLK_PCIE_WLAN# 31 WLAN(100MHz)
2

CLK_X2 1 CLK_X2_R SC4D7P50V2CN-1GP X1 SRC4C_LPRS CLK_PCIE_WLAN_R SRN0J-6-GP


1 2 2 68 X2 SRC4T_LPRS 10 1 4 CLK_PCIE_WLAN 31
R831 0R2J-2-GP RN23
C250 SC12P50V2JN-3GP ICS9LPRS474BKLFT-GP SRC5C_LPRS 7 CLK_PCIE_EXP#_R 1
TP29
3 2 CLK_NB_GPPSB#_R 38 8 CLK_PCIE_EXP_R 1
14 CLK_NB_GPPSB# RN26 CLK_NB_GPPSB_R SB_SRC0C_LPRS SRC5T_LPRS TP30
NB ALINK(100MHz) 14 CLK_NB_GPPSB SRN0J-6-GP
4 1 39 SB_SRC0T_LPRS
44
EXPRESS CARD
SRC6C/SATAC_LPRS
19 CLK_PCIE_SB# RN33
3 2 CLK_PCIE_SB#_R
CLK_PCIE_SB_R
34 SB_SRC1C_LPRS SRC6T/SATAT_LPRS 45 (100MHz)
SB PCIE(100MHz) 19 CLK_PCIE_SB SRN0J-6-GP
4 1 35 SB_SRC1T_LPRS
4 X01
SRC7C_LPRS/27MHZ_NS
SRC7T_LPRS/27MHZ_SS 5 Change to 0 ohm with D version CLK gen.
FS0 64
FS1 REF0_2X/SEL_HTT66 RN20
63 REF1_2X/SEL_SATA
+3.3V_RUN FS2 62 54 CPU_CLK_R 1 4
REF2_2X/SEL_27 CPUKG0T_LPRS CPU_CLK 9
* default CPU_CLK#_R
53 2 3 CPU_CLK(200MHz)

HTT0C_LPRS/66M
CPU_CLK# 9

HTT0T_LPRS/66M
CPUKG0C_LPRS
SRN0J-6-GP
1

GNDSB_SRC
SEL_HTT66 1 66 MHz 3.3V single ended HTT clock

GNDSATA
FS0 R137 R138

GNDATIG
GNDCPU

GNDSRC
GNDSRC

GNDREF
GNDREF
GNDHTT

SMBDAT
SMBCLK
B 0* 100 MHz differential HTT clock 8K2R2J-3-GP DY 8K2R2J-3-GP +3.3V_RUN B

GND48
GNDA
GND
GND

PD#
SEL_SATA 1* 100 MHz non-spreading differential SRC clock
2

1
FS1
0 100 MHz spreading differential SRC clock 71.09474.A03 R170
DY
73
6

47

72

56

51

27

18
11

66
65

46

36

58
57

2
1

55
10KR2J-3-GP
R140 1 2 33R2J-2-GP
35 CLK_SIO_14M

2
KBC 5035(14MHz) CLOCK_EN# 34
1

RN19
R139 2 3 CLK_NBHT_CLK_R CLK_SCLK
R136 8K2R2J-3-GP 14 CLK_NBHT_CLK CLK_NBHT_CLK#_R CLK_SDATA
8K2R2J-3-GP
DY 14 CLK_NBHT_CLK# 1 4

SRN0J-6-GP
2

+3.3V_RUN +3.3V_RUN +3.3V_ALW

NB OSCIN R171
1
2

2
1
(14MHz) 14 CLK_NB_14M 1 2
RN21
158R2F-GP SRN2K2J-1-GP RN22
SRN2K2J-1-GP
1

U29
R166 2N7002DW-7F-GP
CLK_NB_14M
4
3

3
4
A 90D9R3F-GP S D <Variant Name> A
CLK_SCLK 1 6
RS780M 1.1V=(90.9/(90.9+158))*3.3V 32 CLK_SCLK
G G
CKG_SMBCLK 34,42
2

D
2 5
Wistron Corporation
3 4 S 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Clock generator ICS9LPR474
CKG_SMBDAT 34,42 Size Document Number Rev
CLK_SDATA
32 CLK_SDATA
A3 FOOSE-AMD 15.4" SB
Date: Friday, January 04, 2008 Sheet 6 of 53
5 4 3 2 1
5 4 3 2 1

CPU / HT3.0

SSID = CPU
D D

+1.2V_RUN

Place close to socket


SC4D7U6D3V5KX-3GP

SC4D7U6D3V5KX-3GP

SC4D7U6D3V5KX-3GP

SC180P50V2JN-1GP

SC180P50V2JN-1GP
1

1
SCD22U6D3V2KX-1GP

SCD22U6D3V2KX-1GP
C185 C584 C573 C74 C182 C76 C184
(1.2V)1.5A for VLDT
2

2
U64A

D1 VLDT_A0 HT LINK VLDT_B0 AE2


D2 VLDT_A1 VLDT_B1 AE3
D3 VLDT_A2 VLDT_B2 AE4
D4 VLDT_A3 VLDT_B3 AE5

13 HT_NB_CPU_CAD_H0 E3 L0_CADIN_H0 L0_CADOUT_H0 AD1 HT_CPU_NB_CAD_H0 13


13 HT_NB_CPU_CAD_L0 E2 L0_CADIN_L0 L0_CADOUT_L0 AC1 HT_CPU_NB_CAD_L0 13
13 HT_NB_CPU_CAD_H1 E1 L0_CADIN_H1 L0_CADOUT_H1 AC2 HT_CPU_NB_CAD_H1 13
13 HT_NB_CPU_CAD_L1 F1 L0_CADIN_L1 L0_CADOUT_L1 AC3 HT_CPU_NB_CAD_L1 13
13 HT_NB_CPU_CAD_H2 G3 L0_CADIN_H2 L0_CADOUT_H2 AB1 HT_CPU_NB_CAD_H2 13
13 HT_NB_CPU_CAD_L2 G2 L0_CADIN_L2 L0_CADOUT_L2 AA1 HT_CPU_NB_CAD_L2 13
13 HT_NB_CPU_CAD_H3 G1 L0_CADIN_H3 L0_CADOUT_H3 AA2 HT_CPU_NB_CAD_H3 13
C H1 AA3 C
13 HT_NB_CPU_CAD_L3 L0_CADIN_L3 L0_CADOUT_L3 HT_CPU_NB_CAD_L3 13
13 HT_NB_CPU_CAD_H4 J1 L0_CADIN_H4 L0_CADOUT_H4 W2 HT_CPU_NB_CAD_H4 13
13 HT_NB_CPU_CAD_L4 K1 L0_CADIN_L4 L0_CADOUT_L4 W3 HT_CPU_NB_CAD_L4 13
13 HT_NB_CPU_CAD_H5 L3 L0_CADIN_H5 L0_CADOUT_H5 V1 HT_CPU_NB_CAD_H5 13
13 HT_NB_CPU_CAD_L5 L2 L0_CADIN_L5 L0_CADOUT_L5 U1 HT_CPU_NB_CAD_L5 13
13 HT_NB_CPU_CAD_H6 L1 L0_CADIN_H6 L0_CADOUT_H6 U2 HT_CPU_NB_CAD_H6 13
13 HT_NB_CPU_CAD_L6 M1 L0_CADIN_L6 L0_CADOUT_L6 U3 HT_CPU_NB_CAD_L6 13
13 HT_NB_CPU_CAD_H7 N3 L0_CADIN_H7 L0_CADOUT_H7 T1 HT_CPU_NB_CAD_H7 13
13 HT_NB_CPU_CAD_L7 N2 L0_CADIN_L7 L0_CADOUT_L7 R1 HT_CPU_NB_CAD_L7 13
13 HT_NB_CPU_CAD_H8 E5 L0_CADIN_H8 L0_CADOUT_H8 AD4 HT_CPU_NB_CAD_H8 13
13 HT_NB_CPU_CAD_L8 F5 L0_CADIN_L8 L0_CADOUT_L8 AD3 HT_CPU_NB_CAD_L8 13
13 HT_NB_CPU_CAD_H9 F3 L0_CADIN_H9 L0_CADOUT_H9 AD5 HT_CPU_NB_CAD_H9 13
13 HT_NB_CPU_CAD_L9 F4 L0_CADIN_L9 L0_CADOUT_L9 AC5 HT_CPU_NB_CAD_L9 13
13 HT_NB_CPU_CAD_H10 G5 L0_CADIN_H10 L0_CADOUT_H10 AB4 HT_CPU_NB_CAD_H10 13
13 HT_NB_CPU_CAD_L10 H5 L0_CADIN_L10 L0_CADOUT_L10 AB3 HT_CPU_NB_CAD_L10 13
13 HT_NB_CPU_CAD_H11 H3 L0_CADIN_H11 L0_CADOUT_H11 AB5 HT_CPU_NB_CAD_H11 13
13 HT_NB_CPU_CAD_L11 H4 L0_CADIN_L11 L0_CADOUT_L11 AA5 HT_CPU_NB_CAD_L11 13
13 HT_NB_CPU_CAD_H12 K3 L0_CADIN_H12 L0_CADOUT_H12 Y5 HT_CPU_NB_CAD_H12 13
13 HT_NB_CPU_CAD_L12 K4 L0_CADIN_L12 L0_CADOUT_L12 W5 HT_CPU_NB_CAD_L12 13
13 HT_NB_CPU_CAD_H13 L5 L0_CADIN_H13 L0_CADOUT_H13 V4 HT_CPU_NB_CAD_H13 13
13 HT_NB_CPU_CAD_L13 M5 L0_CADIN_L13 L0_CADOUT_L13 V3 HT_CPU_NB_CAD_L13 13
13 HT_NB_CPU_CAD_H14 M3 L0_CADIN_H14 L0_CADOUT_H14 V5 HT_CPU_NB_CAD_H14 13
13 HT_NB_CPU_CAD_L14 M4 L0_CADIN_L14 L0_CADOUT_L14 U5 HT_CPU_NB_CAD_L14 13
13 HT_NB_CPU_CAD_H15 N5 L0_CADIN_H15 L0_CADOUT_H15 T4 HT_CPU_NB_CAD_H15 13
13 HT_NB_CPU_CAD_L15 P5 L0_CADIN_L15 L0_CADOUT_L15 T3 HT_CPU_NB_CAD_L15 13

13 HT_NB_CPU_CLK_H0 J3 L0_CLKIN_H0 L0_CLKOUT_H0 Y1 HT_CPU_NB_CLK_H0 13


13 HT_NB_CPU_CLK_L0 J2 L0_CLKIN_L0 L0_CLKOUT_L0 W1 HT_CPU_NB_CLK_L0 13
13 HT_NB_CPU_CLK_H1 J5 L0_CLKIN_H1 L0_CLKOUT_H1 Y4 HT_CPU_NB_CLK_H1 13
B B
13 HT_NB_CPU_CLK_L1 K5 L0_CLKIN_L1 L0_CLKOUT_L1 Y3 HT_CPU_NB_CLK_L1 13

13 HT_NB_CPU_CTL_H0 N1 L0_CTLIN_H0 L0_CTLOUT_H0 R2 HT_CPU_NB_CTL_H0 13


13 HT_NB_CPU_CTL_L0 P1 L0_CTLIN_L0 L0_CTLOUT_L0 R3 HT_CPU_NB_CTL_L0 13
13 HT_NB_CPU_CTL_H1 P3 L0_CTLIN_H1 L0_CTLOUT_H1 T5 HT_CPU_NB_CTL_H1 13
13 HT_NB_CPU_CTL_L1 P4 L0_CTLIN_L1 L0_CTLOUT_L1 R5 HT_CPU_NB_CTL_L1 13

SKT-CPU638P-GP-U
62.10055.111

A <Variant Name> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU_HT_LINK I/F_(1/4)
Size Document Number Rev
A3 FOOSE-AMD 15.4" SB
Date: Friday, January 04, 2008 Sheet 7 of 53
5 4 3 2 1
5 4 3 2 1

CPU / DDR2 SSID = CPU 11 MEM_MA_DATA0 G12


U64C
MEM:DATA
C11 MEM_MB_DATA0 12
MA_DATA0 MB_DATA0
11 MEM_MA_DATA1 F12 MA_DATA1 MB_DATA1 A11 MEM_MB_DATA1 12
11 MEM_MA_DATA2 H14 MA_DATA2 MB_DATA2 A14 MEM_MB_DATA2 12
11 MEM_MA_DATA3 G14 MA_DATA3 MB_DATA3 B14 MEM_MB_DATA3 12
11 MEM_MA_DATA4 H11 MA_DATA4 MB_DATA4 G11 MEM_MB_DATA4 12
11 MEM_MA_DATA5 H12 MA_DATA5 MB_DATA5 E11 MEM_MB_DATA5 12
11 MEM_MA_DATA6 C13 MA_DATA6 MB_DATA6 D12 MEM_MB_DATA6 12
+0.9V_DDR_VTT 11 MEM_MA_DATA7 E13 MA_DATA7 MB_DATA7 A13 MEM_MB_DATA7 12
Place near to CPU 11 MEM_MA_DATA8 H15
E15
MA_DATA8 MB_DATA8 A15
A16
MEM_MB_DATA8 12
11 MEM_MA_DATA9 MA_DATA9 MB_DATA9 MEM_MB_DATA9 12
D 11 MEM_MA_DATA10 E17 MA_DATA10 MB_DATA10 A19 MEM_MB_DATA10 12 D
11 MEM_MA_DATA11 H17 MA_DATA11 MB_DATA11 A20 MEM_MB_DATA11 12
11 MEM_MA_DATA12 E14 MA_DATA12 MB_DATA12 C14 MEM_MB_DATA12 12
1

1
SCD22U6D3V2KX-1GP

SCD22U6D3V2KX-1GP

SCD22U6D3V2KX-1GP

SCD22U6D3V2KX-1GP
C554 C711 C712 C558 C193 C707 C706 C569 C70 C71 C198 C195 C566 C709 C563 C708 F14 D14
11 MEM_MA_DATA13 MA_DATA13 MB_DATA13 MEM_MB_DATA13 12
11 MEM_MA_DATA14 C17 MA_DATA14 MB_DATA14 C18 MEM_MB_DATA14 12
SC4D7U6D3V5KX-3GP

SC4D7U6D3V5KX-3GP

SC4D7U6D3V5KX-3GP

SC4D7U6D3V5KX-3GP

SC1000P50V3JN-GP

SC1000P50V3JN-GP

SC1000P50V3JN-GP

SC1000P50V3JN-GP

SC180P50V2JN-1GP

SC180P50V2JN-1GP

SC180P50V2JN-1GP

SC180P50V2JN-1GP
11 MEM_MA_DATA15 G17 D18 MEM_MB_DATA15 12
2

2
MA_DATA15 MB_DATA15
11 MEM_MA_DATA16 G18 MA_DATA16 MB_DATA16 D20 MEM_MB_DATA16 12
11 MEM_MA_DATA17 C19 MA_DATA17 MB_DATA17 A21 MEM_MB_DATA17 12
11 MEM_MA_DATA18 D22 MA_DATA18 MB_DATA18 D24 MEM_MB_DATA18 12
11 MEM_MA_DATA19 E20 MA_DATA19 MB_DATA19 C25 MEM_MB_DATA19 12
11 MEM_MA_DATA20 E18 MA_DATA20 MB_DATA20 B20 MEM_MB_DATA20 12
11 MEM_MA_DATA21 F18 MA_DATA21 MB_DATA21 C20 MEM_MB_DATA21 12
11 MEM_MA_DATA22 B22 MA_DATA22 MB_DATA22 B24 MEM_MB_DATA22 12
11 MEM_MA_DATA23 C23 MA_DATA23 MB_DATA23 C24 MEM_MB_DATA23 12
11 MEM_MA_DATA24 F20 MA_DATA24 MB_DATA24 E23 MEM_MB_DATA24 12
11 MEM_MA_DATA25 F22 MA_DATA25 MB_DATA25 E24 MEM_MB_DATA25 12
11 MEM_MA_DATA26 H24 MA_DATA26 MB_DATA26 G25 MEM_MB_DATA26 12
11 MEM_MA_DATA27 J19 MA_DATA27 MB_DATA27 G26 MEM_MB_DATA27 12
+0.9V_DDR_VTT +1.8V_SUS 11 MEM_MA_DATA28 E21 MA_DATA28 MB_DATA28 C26 MEM_MB_DATA28 12
11 MEM_MA_DATA29 E22 MA_DATA29 MB_DATA29 D26 MEM_MB_DATA29 12
H20 G23
(0.9V)750mA for VTT 11 MEM_MA_DATA30
H22
MA_DATA30 MB_DATA30
G24
MEM_MB_DATA30 12
11 MEM_MA_DATA31 MA_DATA31 MB_DATA31 MEM_MB_DATA31 12
11 MEM_MA_DATA32 Y24 MA_DATA32 MB_DATA32 AA24 MEM_MB_DATA32 12

1
U64B AB24 AA23
11 MEM_MA_DATA33 MA_DATA33 MB_DATA33 MEM_MB_DATA33 12

1
C559 R509 AB22 AD24
11 MEM_MA_DATA34 MA_DATA34 MB_DATA34 MEM_MB_DATA34 12
D10 W10 SCD1U10V2KX-4GP 1KR3F-GP AA21 AE24
VTT1 11 MEM_MA_DATA35 MEM_MB_DATA35 12
C10 MEM:CMD/CTRL/CLK VTT5 AC10 W22
MA_DATA35 MB_DATA35
AA26
11 MEM_MA_DATA36 MEM_MB_DATA36 12

2
VTT2 VTT6 MA_DATA36 MB_DATA36
B10 AB10 11 MEM_MA_DATA37 W21 AA25 MEM_MB_DATA37 12

2
R519 VTT3 VTT7 +V_DDR_VREF_M MA_DATA37 MB_DATA37
AD10 VTT4 VTT8 AA10 11 MEM_MA_DATA38 Y22 MA_DATA38 MB_DATA38 AD26 MEM_MB_DATA38 12
C +1.8V_SUS 39D2R2F-L-GP A10 AA22 AE25 C
VTT9 +0.9V_SUS_CPU_M_VREF 11 MEM_MA_DATA39 MA_DATA39 MB_DATA39 MEM_MB_DATA39 12
1 2 MEMZP AF10 Y20 AC22
MEMZP 11 MEM_MA_DATA40 MA_DATA40 MB_DATA40 MEM_MB_DATA40 12
1 2 MEMZN AE10 Y10 CPU_VTT_SUS_FB 1 TP10 AA20 AD22
MEMZN VTT_SENSE 11 MEM_MA_DATA41 MA_DATA41 MB_DATA41 MEM_MB_DATA41 12
R518 R504 AA18 AE20
11 MEM_MA_DATA42 MA_DATA42 MB_DATA42 MEM_MB_DATA42 12
39D2R2F-L-GPTP16 1 MEM_RSVD_M1 H16 W17 1 2 AB18 AF20
RSVD_M1 MEMVREF DY 11 MEM_MA_DATA43 MA_DATA43 MB_DATA43 MEM_MB_DATA43 12

SC1000P50V3JN-GP

SCD1U10V2KX-4GP
11 MEM_MA_DATA44 AB21 MA_DATA44 MB_DATA44 AF24 MEM_MB_DATA44 12

1
T19 B18 MEM_RSVD_M2 1 TP25 0R3-0-U-GP AD21 AF23
11 MEM_MA0_ODT0 MA0_ODT0 RSVD_M2 11 MEM_MA_DATA45 MA_DATA45 MB_DATA45 MEM_MB_DATA45 12

1
V22 C574 C116 R513 AD19 AC20
11 MEM_MA0_ODT1 MA0_ODT1 11 MEM_MA_DATA46 MA_DATA46 MB_DATA46 MEM_MB_DATA46 12
U21 W26 1KR3F-GP Y18 AD20
MA1_ODT0 MB0_ODT0 MEM_MB0_ODT0 12 11 MEM_MA_DATA47 MA_DATA47 MB_DATA47 MEM_MB_DATA47 12
V19 W23 MEM_MB0_ODT1 12 11 MEM_MA_DATA48 AD17 AD18 MEM_MB_DATA48 12

2
MA1_ODT1 MB0_ODT1 MA_DATA48 MB_DATA48
Y26 11 MEM_MA_DATA49 W16 AE18 MEM_MB_DATA49 12

2
MB1_ODT0 MA_DATA49 MB_DATA49
11 MEM_MA0_CS#0 T20 MA0_CS_L0 11 MEM_MA_DATA50 W14 MA_DATA50 MB_DATA50 AC14 MEM_MB_DATA50 12
11 MEM_MA0_CS#1 U19 MA0_CS_L1 MB0_CS_L0 V26 MEM_MB0_CS#0 12 11 MEM_MA_DATA51 Y14 MA_DATA51 MB_DATA51 AD14 MEM_MB_DATA51 12
U20 MA1_CS_L0 MB0_CS_L1 W25 MEM_MB0_CS#1 12 11 MEM_MA_DATA52 Y17 MA_DATA52 MB_DATA52 AF19 MEM_MB_DATA52 12
V20 MA1_CS_L1 MB1_CS_L0 U22 11 MEM_MA_DATA53 AB17 MA_DATA53 MB_DATA53 AC18 MEM_MB_DATA53 12
11 MEM_MA_DATA54 AB15 MA_DATA54 MB_DATA54 AF16 MEM_MB_DATA54 12
11 MEM_MA_CKE0 J22 MA_CKE0 MB_CKE0 J25 MEM_MB_CKE0 12 11 MEM_MA_DATA55 AD15 MA_DATA55 MB_DATA55 AF15 MEM_MB_DATA55 12
11 MEM_MA_CKE1 J20 MA_CKE1 MB_CKE1 H26 MEM_MB_CKE1 12 11 MEM_MA_DATA56 AB13 MA_DATA56 MB_DATA56 AF13 MEM_MB_DATA56 12
11 MEM_MA_DATA57 AD13 MA_DATA57 MB_DATA57 AC12 MEM_MB_DATA57 12
N19 MA_CLK_H5 MB_CLK_H5 P22 11 MEM_MA_DATA58 Y12 MA_DATA58 MB_DATA58 AB11 MEM_MB_DATA58 12
N20 MA_CLK_L5 MB_CLK_L5 R22 11 MEM_MA_DATA59 W11 MA_DATA59 MB_DATA59 Y11 MEM_MB_DATA59 12
11 MEM_MA_CLK0_P E16 MA_CLK_H1 MB_CLK_H1 A17 MEM_MB_CLK0_P 12 11 MEM_MA_DATA60 AB14 MA_DATA60 MB_DATA60 AE14 MEM_MB_DATA60 12
11 MEM_MA_CLK0_N F16 MA_CLK_L1 MB_CLK_L1 A18 MEM_MB_CLK0_N 12 11 MEM_MA_DATA61 AA14 MA_DATA61 MB_DATA61 AF14 MEM_MB_DATA61 12
11 MEM_MA_CLK1_P Y16 MA_CLK_H7 MB_CLK_H7 AF18 MEM_MB_CLK1_P 12 11 MEM_MA_DATA62 AB12 MA_DATA62 MB_DATA62 AF11 MEM_MB_DATA62 12
11 MEM_MA_CLK1_N AA16 MA_CLK_L7 MB_CLK_L7 AF17 MEM_MB_CLK1_N 12 11 MEM_MA_DATA63 AA12 MA_DATA63 MB_DATA63 AD11 MEM_MB_DATA63 12
P19 MA_CLK_H4 MB_CLK_H4 R26
P20 MA_CLK_L4 MB_CLK_L4 R25 11 MEM_MA_DM0 E12 MA_DM0 MB_DM0 A12 MEM_MB_DM0 12
11 MEM_MA_DM1 C15 MA_DM1 MB_DM1 B16 MEM_MB_DM1 12
11 MEM_MA_ADD0 N21 MA_ADD0 MB_ADD0 P24 MEM_MB_ADD0 12 11 MEM_MA_DM2 E19 MA_DM2 MB_DM2 A22 MEM_MB_DM2 12
B B
11 MEM_MA_ADD1 M20 MA_ADD1 MB_ADD1 N24 MEM_MB_ADD1 12 11 MEM_MA_DM3 F24 MA_DM3 MB_DM3 E25 MEM_MB_DM3 12
11 MEM_MA_ADD2 N22 MA_ADD2 MB_ADD2 P26 MEM_MB_ADD2 12 11 MEM_MA_DM4 AC24 MA_DM4 MB_DM4 AB26 MEM_MB_DM4 12
11 MEM_MA_ADD3 M19 MA_ADD3 MB_ADD3 N23 MEM_MB_ADD3 12 11 MEM_MA_DM5 Y19 MA_DM5 MB_DM5 AE22 MEM_MB_DM5 12
11 MEM_MA_ADD4 M22 MA_ADD4 MB_ADD4 N26 MEM_MB_ADD4 12 11 MEM_MA_DM6 AB16 MA_DM6 MB_DM6 AC16 MEM_MB_DM6 12
11 MEM_MA_ADD5 L20 MA_ADD5 MB_ADD5 L23 MEM_MB_ADD5 12 11 MEM_MA_DM7 Y13 MA_DM7 MB_DM7 AD12 MEM_MB_DM7 12
11 MEM_MA_ADD6 M24 MA_ADD6 MB_ADD6 N25 MEM_MB_ADD6 12
11 MEM_MA_ADD7 L21 MA_ADD7 MB_ADD7 L24 MEM_MB_ADD7 12 11 MEM_MA_DQS0_P G13 MA_DQS_H0 MB_DQS_H0 C12 MEM_MB_DQS0_P 12
11 MEM_MA_ADD8 L19 MA_ADD8 MB_ADD8 M26 MEM_MB_ADD8 12 11 MEM_MA_DQS0_N H13 MA_DQS_L0 MB_DQS_L0 B12 MEM_MB_DQS0_N 12
11 MEM_MA_ADD9 K22 MA_ADD9 MB_ADD9 K26 MEM_MB_ADD9 12 11 MEM_MA_DQS1_P G16 MA_DQS_H1 MB_DQS_H1 D16 MEM_MB_DQS1_P 12
11 MEM_MA_ADD10 R21 MA_ADD10 MB_ADD10 T26 MEM_MB_ADD10 12 11 MEM_MA_DQS1_N G15 MA_DQS_L1 MB_DQS_L1 C16 MEM_MB_DQS1_N 12
11 MEM_MA_ADD11 L22 MA_ADD11 MB_ADD11 L26 MEM_MB_ADD11 12 11 MEM_MA_DQS2_P C22 MA_DQS_H2 MB_DQS_H2 A24 MEM_MB_DQS2_P 12
11 MEM_MA_ADD12 K20 MA_ADD12 MB_ADD12 L25 MEM_MB_ADD12 12 11 MEM_MA_DQS2_N C21 MA_DQS_L2 MB_DQS_L2 A23 MEM_MB_DQS2_N 12
11 MEM_MA_ADD13 V24 MA_ADD13 MB_ADD13 W24 MEM_MB_ADD13 12 11 MEM_MA_DQS3_P G22 MA_DQS_H3 MB_DQS_H3 F26 MEM_MB_DQS3_P 12
11 MEM_MA_ADD14 K24 MA_ADD14 MB_ADD14 J23 MEM_MB_ADD14 12 11 MEM_MA_DQS3_N G21 MA_DQS_L3 MB_DQS_L3 E26 MEM_MB_DQS3_N 12
11 MEM_MA_ADD15 K19 MA_ADD15 MB_ADD15 J24 MEM_MB_ADD15 12 11 MEM_MA_DQS4_P AD23 MA_DQS_H4 MB_DQS_H4 AC25 MEM_MB_DQS4_P 12
11 MEM_MA_DQS4_N AC23 MA_DQS_L4 MB_DQS_L4 AC26 MEM_MB_DQS4_N 12
11 MEM_MA_BANK0 R20 MA_BANK0 MB_BANK0 R24 MEM_MB_BANK0 12 11 MEM_MA_DQS5_P AB19 MA_DQS_H5 MB_DQS_H5 AF21 MEM_MB_DQS5_P 12
11 MEM_MA_BANK1 R23 MA_BANK1 MB_BANK1 U26 MEM_MB_BANK1 12 11 MEM_MA_DQS5_N AB20 MA_DQS_L5 MB_DQS_L5 AF22 MEM_MB_DQS5_N 12
11 MEM_MA_BANK2 J21 MA_BANK2 MB_BANK2 J26 MEM_MB_BANK2 12 11 MEM_MA_DQS6_P Y15 MA_DQS_H6 MB_DQS_H6 AE16 MEM_MB_DQS6_P 12
11 MEM_MA_DQS6_N W15 MA_DQS_L6 MB_DQS_L6 AD16 MEM_MB_DQS6_N 12
11 MEM_MA_RAS# R19 MA_RAS_L MB_RAS_L U25 MEM_MB_RAS# 12 11 MEM_MA_DQS7_P W12 MA_DQS_H7 MB_DQS_H7 AF12 MEM_MB_DQS7_P 12
11 MEM_MA_CAS# T22 MA_CAS_L MB_CAS_L U24 MEM_MB_CAS# 12 11 MEM_MA_DQS7_N W13 MA_DQS_L7 MB_DQS_L7 AE12 MEM_MB_DQS7_N 12
11 MEM_MA_WE# T24 MA_WE_L MB_WE_L U23 MEM_MB_WE# 12
SKT-CPU638P-GP-U
SKT-CPU638P-GP-U

A <Variant Name> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
CPU_DDR_(2/4)
Size Document Number Rev
A3 FOOSE-AMD 15.4" SB
Date: Friday, January 04, 2008 Sheet 8 of 53
5 4 3 2 1
5 4 3 2 1

+1.8V_RUN
LYAOUT:ROUTE VDDA TRACE APPROX.
X01 SSID = CPU 50mils WIDE(USE 2X25 mil TRACES TO
EXIT BALL FIELD) AND 500 mils LONG.

8
7
6
5
RN48 +1.8V_SUS
SRN300J-1-GP
+2.5V_RUN_VDDA
+2.5V_RUN L1

1
2
3
4
1 2 BLM18PG330SN1D-GP
D 19 CPU_LDT_RST# LDT_RST#_CPU 14 (2.5V)250mA for VDDA D

1
R670 0R2J-2-GP 1 2 R466 R462

1
SC4D7U6D3V5KX-3GP

SCD22U6D3V2KX-1GP

300R2J-4-GP

300R2J-4-GP
1

1
SC3300P50V2KX-1GP
1 2 LDT_PWROK C177 C181 C180 R829
19 CPU_PWRGD
R671 0R2J-2-GP +1.8V_SUS 10KR2J-3-GP
The Processor has

2
19 CPU_LDT_STOP# 1 2

2
LDT_STP#_CPU 14
R673 0R2J-2-GP reached a preset

1
14,19 ALLOW_LDTSTOP 1 2 CPU_LDT_REQ#_CPU U64D R596 R597 maximum operating
R674 0R2J-2-GP Cloce To CPU 1KR2J-1-GP 1KR2J-1-GP
F8 M11
temperature. 100к
VDDA1 KEY1
X01 F9 W18 I=Active HTC

2
VDDA2 KEY2
G.G. list 10/06 CPU_CLK(200MHz) 1 2
1
R595
2
169R2F-GP CLKCPU_IN A9 A6 O=FAN
6 CPU_CLK CLKIN_H SVC CPU_SVC 48
C7131 2SC3900P50V2KX-2GP CLKCPU#_IN A8 A4 R464
6 CPU_CLK# CLKIN_L SVD CPU_SVD 48
FDV301N, the Vgs is: C714 SC3900P50V2KX-2GP 1 2
+3.3V_SUS CPU_PROCHOT# 19
LDT_RST#_CPU B7
min = 0.65V LDT_PWROK RESET_L 0R2J-2-GP
A7 PWROK CPU exceeds to 125к

1
Typ = 0.85V LDT_STP#_CPU F10 AF6
LDTSTOP_L THERMTRIP_L CPU_THERMTRIP#_L 39
1

Max = 1.5V HDT_RST# 1 DY 2 CPU_LDT_REQ#_CPU C6 AC7 CPU_PROCHOT#_L


R455 R190 LDTREQ_L PROCHOT_L CPU_MEMHOT#_L
MEMHOT_L AA8 3 2 CPU_MEMHOT# 39
20KR2J-L2-GP 0R2J-2-GP CPU_SIC MMBT3904-7-F-GP
For HDT DBG CPU_SID
AF4 SIC
2.09V for Gate CPU_ALERT#
AF5 SID Q92
AE6 W7
2

CPU_SICD_Gate +1.8V_SUS +1.2V_RUN ALERT_L THERMDC H_THERMDC 39


THERMDA W8 H_THERMDA 39

1
1 2 CPU_HTREF0 R6 1DY 2
HT_REF0
1
34K8R2F-1-GP

C843 R90 1 2 44D2R2F-GP CPU_HTREF1 P6 C253


HT_REF1
1

C524 SCD1U10V2KX-4GP R80 44D2R2F-GP SC100P50V2JN-3GP

2
C SCD1U10V2KX-4GP R457 F6 W9 CPU_VDDIO_SUS_FB_H 1 TP11 C
48 CPU_VDD0_RUN_FB_H VDD0_FB_H VDDIO_FB_H
1

1 48 CPU_VDD0_RUN_FB_L E6 Y9 CPU_VDDIO_SUS_FB_L 1 TP9


2

R456 R467 VDD0_FB_L VDDIO_FB_L


2

390R2J-1-GP 390R2J-1-GP X01 Y6 H6


G

48 CPU_VDD1_RUN_FB_H VDD1_FB_H VDDNB_FB_H CPU_VDDNB_RUN_FB_H 48


AB6 G6
Smooth signal. 48 CPU_VDD1_RUN_FB_L VDD1_FB_L VDDNB_FB_L CPU_VDDNB_RUN_FB_L 48
2

CPU_DBRDY G10
CPU_SIC CPU_TMS DBRDY
D S AA9 E10 CPU_DBREQ#
D

34 CPU_THRM_SMBCLK TMS DBREQ_L


CPU_TCK
Q57 CPU_TRST#
AC9
AD9
TCK
AE9 CPU_TDO
LAYOUT: Route FBCLKOUT_H/L
FDV301N-NL-GP CPU_TDI TRST_L TDO
AF9 differentially impedance 80
G

TDI
TP6 1 CPU_TEST23 AD7 J7 CPU_TEST28_H 1 TP12
TEST23 TEST28_H CPU_TEST28_L 1 TP13
TEST28_L H8
D S CPU_SID TP15 1 CPU_TEST18 H10
D

34 CPU_THRM_SMBDATA TEST18
TP14 1 CPU_TEST19 G9 D7 CPU_TEST17 1 TP22
Q54 TEST19 TEST17 CPU_TEST16 TP20
Sideband temperature X01 TEST16 E7 1
FDV301N-NL-GP TP18 1 CPU_TEST25_H E9 F7 CPU_TEST15 1 TP17
TP19 CPU_TEST25_L TEST25_H TEST15 CPU_TEST14 TP23
1 E8 C7 1

HDT Connectors
TEST25_L TEST14
R686 1 2300R2J-4-GP CPU_TEST21 AB8 C3
TP4 CPU_TEST20 TEST21 TEST7
1 AF7 TEST20 TEST10 K8
+1.8V_SUS R694 1 2300R2J-4-GP CPU_TEST24 AE7
R473 TP3 CPU_TEST22 TEST24
1 AE8 TEST22 TEST8 C4
1KR2J-1-GP TP7 1 CPU_TEST12 AC8
TP2 CPU_TEST27 TEST12
1 2 1 AF8 TEST27
1CPU_ALERT#_Q

C9 CPU_TEST29H 1 TP24
TEST29_H
1

1 2 CPU_TEST9 C2 C8 CPU_TEST29L 1 TP21


R470 TEST9 TEST29_L
AA6 TEST6 +1.8V_SUS
B 1KR2J-1-GP R108 B
0R2J-2-GP A3 H18
RSVD1 RSVD10
CPU temperature sensor A5 H19
2

RSVD2 RSVD9
B3 RSVD3 RSVD8 AA7 X01

2
driver INT event to EC B5 RSVD4 RSVD7 D5
C1 C5 R699 HDT1
CPU_ALERT# RSVD5 RSVD6 300R2J-4-GP
35 CPU_THERM_ALERT# 3 2 1 2
Q58 SKT-CPU638P-GP-U
DY
3 4

1
MMBT3904-7-F-GP 5 6
CPU_DBREQ# 7 8
CPU_DBRDY 9 10
CPU_TCK 11 12
+5V_ALW +3.3V_RUN CPU_TMS 13 14
CPU_TDI 15 16
CPU_TRST# 17 18
1

CPU_TDO 19 20
R487 R469 21 22
10KR2J-3-GP 10KR2J-3-GP +1.8V_SUS 23 24
26
2

FDV301N, the Vgs is: LDT_PWROK# SMC-CONN26A-FP


CPU_PWRGD_SVID_REG 48 20.F0357.025
min = 0.65V D D HDT_RST#
Typ = 0.85V H
D

Max = 1.5V
Q60
FDV301N-NL-GP
A
LDT_PWROK H G L G <Variant Name> A

Q61
FDV301N-NL-GP
Wistron Corporation
S

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

Title
CPU_Control&Debug_(3/4)
Size Document Number Rev
A3 FOOSE-AMD 15.4" SB
Date: Friday, January 04, 2008 Sheet 9 of 53
5 4 3 2 1
5 4 3 2 1

SSID = CPU

D D

U64F
AA4 VSS1 VSS66 J6
AA11 VSS2 VSS67 J8
AA13 J10 +VCC_CORE0
AA15
VSS3 VSS68
J12
36A for VDD0&VDD1 +VCC_CORE1
VSS4 VSS69 U64E
AA17
AA19
VSS5 VSS70 J14
J16
Bottom Side Decoupling Bottom Side Decoupling
VSS6 VSS71
AB2 VSS7 VSS72 J18 G4 VDD0_1 VDD1_1 P8
AB7 VSS8 VSS73 K2 H2 VDD0_2 VDD1_2 P10
AB9 VSS9 VSS74 K7 J9 VDD0_3 VDD1_3 R4
AB23 VSS10 VSS75 K9 J11 VDD0_4 VDD1_4 R7
AB25 K11 C170 C153 C147 C156 C171 C175 C169 J13 R9 C122 C134 C78 C146 C110 C79 C109
VSS11 VSS76 VDD0_5 VDD1_5

1
AC11 VSS12 VSS77 K13 J15 VDD0_6 VDD1_6 R11
AC13 VSS13 VSS78 K15 K6 VDD0_7 VDD1_7 T2
AC15 K17 K10 T6

2
VSS14 VSS79 VDD0_8 VDD1_8
AC17 VSS15 VSS80 L6 K12 VDD0_9 VDD1_9 T8

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SCD22U6D3V2KX-1GP

SCD01U50V2KX-1GP

SC180P50V2JN-1GP

SC180P50V2JN-1GP

SCD01U50V2KX-1GP

SCD22U6D3V2KX-1GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP
AC19 VSS16 VSS81 L8 K14 VDD0_10 VDD1_10 T10
AC21 VSS17 VSS82 L10 L4 VDD0_11 VDD1_11 T12
AD6 VSS18 VSS83 L12 L7 VDD0_12 VDD1_12 T14
AD8 VSS19 VSS84 L14 L9 VDD0_13 VDD1_13 U7
C AD25 L16 L11 U9 C
VSS20 VSS85 VDD0_14 VDD1_14
AE11 VSS21 VSS86 L18 L13 VDD0_15 VDD1_15 U11
AE13 VSS22 VSS87 M7 L15 VDD0_16 VDD1_16 U13
AE15 VSS23 VSS88 M9 M2 VDD0_17 VDD1_17 U15
AE17 VSS24 VSS89 AC6 M6 VDD0_18 VDD1_18 V6
AE19 VSS25 VSS90 M17 M8 VDD0_19 VDD1_19 V8
AE21 VSS26 VSS91 N4 M10 VDD0_20 VDD1_20 V10
AE23 VSS27 VSS92 N8 N7 VDD0_21 VDD1_21 V12
B4 VSS28 VSS93 N10 N9 VDD0_22 VDD1_22 V14
B6 N16 +VDDNB N11 W4
B8
VSS29 VSS94
N18
(0.8~1.1V)3A for VDDNB VDD0_23 VDD1_23
Y2
VSS30 VSS95 VDD1_24
B9 VSS31 VSS96 P2 K16 VDDNB_1 VDD1_25 AC4
SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP
+1.8V_SUS
B11
B13
VSS32 VSS97 P7
P9
M16
P16
VDDNB_2 VDD1_26 AD2 Place near to CPU
VSS33 VSS98 VDDNB_3
1

1
B15 P11 C145 C545 C155 T16 Y25
VSS34 VSS99 VDDNB_4 VDDIO27
B17 VSS35 VSS100 P17 V16 VDDNB_5 VDDIO26 V25
B19 R8 V23
2

2
VSS36 VSS101 VDDIO25 C132 C668 C93 C112 C166 C157 C106 C158 C161 C162 C160
B21 VSS37 VSS102 R10 H25 VDDIO1 VDDIO24 V21
B23 VSS38 VSS103 R16 J17 VDDIO2 VDDIO23 V18

1
B25 VSS39 VSS104 R18 K18 VDDIO3 VDDIO22 U17
D6 VSS40 VSS105 T7 K21 VDDIO4 VDDIO21 T25
D8 T9 K23 T23

2
VSS41 VSS106 VDDIO5 VDDIO20
D9 VSS42 VSS107 T11 K25 VDDIO6 VDDIO19 T21

SC180P50V2JN-1GP

SCD01U50V2KX-1GP

SCD01U50V2KX-1GP

SCD22U6D3V2KX-1GP

SCD22U6D3V2KX-1GP

SCD22U6D3V2KX-1GP

SCD22U6D3V2KX-1GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP
D11 VSS43 VSS108 T13 L17 VDDIO7 VDDIO18 T18
D13 VSS44 VSS109 T15 M18 VDDIO8 VDDIO17 R17
D15 T17 M21 P25
D17
VSS45 VSS110
U4 +1.8V_SUS (1.8V)2A for VDDIO M23
VDDIO9 VDDIO16
P23
VSS46 VSS111 VDDIO10 VDDIO15
D19 VSS47 VSS112 U6 Bottom Side Decoupling M25 VDDIO11 VDDIO14 P21
D21 VSS48 VSS113 U8 N17 VDDIO12 VDDIO13 P18
B B
D23 VSS49 VSS114 U10
D25 VSS50 VSS115 U12
E4 U14 SKT-CPU638P-GP-U
VSS51 VSS116 C127 C92 C118 C144 C632 C94
F2 VSS52 VSS117 U16
1

F11 VSS53 VSS118 U18


F13 VSS54 VSS119 V2
F15 V7
2

VSS55 VSS120
F17 VSS56 VSS121 V9
SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SCD22U6D3V2KX-1GP

SCD22U6D3V2KX-1GP

SC180P50V2JN-1GP

SC180P50V2JN-1GP

F19 VSS57 VSS122 V11


F21 VSS58 VSS123 V13
F23 VSS59 VSS124 V15
F25 VSS60 VSS125 V17
H7 VSS61 VSS126 W6
H9 VSS62 VSS127 Y21
H21 VSS63 VSS128 Y23
H23 VSS64 VSS129 N6
J4 VSS65
SKT-CPU638P-GP-U

A <Variant Name> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
CPU_Power_(4/4)
Size Document Number Rev
A3 FOOSE-AMD 15.4" SB
Date: Friday, January 04, 2008 Sheet 10 of 53
5 4 3 2 1
5 4 3 2 1

SSID = MEMORY DIMM1 (A0)


A
+0.9V_DDR_VTT
DIMM2 (A4)
RN13
DIMM2 1 8 MEM_MA_ADD14 8
2 7
8 MEM_MA_ADD0 102 108 MEM_MA_RAS# 8
A B 3 6
MEM_MA_ADD11 8
MEM_MA_ADD7 8
A0 RAS#
8 MEM_MA_ADD1 101 A1 WE# 109 MEM_MA_WE# 8 4 5 MEM_MA_ADD6 8

A1
100 113

A3

A4

A5

A6

A7

A8

A9

A10

A11

A12

A13

A14

A15

A16

A17

A18

A19

A20

A21

A22

A23

A24
8 MEM_MA_ADD2 A2 CAS# MEM_MA_CAS# 8

B3

B4

B5

B6

B7

B8

B9

B10

B11

B12

B13

B14

B15

B16

B17

B18

B19

B20

B21

B22

B23

B24

B25
99 SRN47J-4-GP

C1

C2

C3

C4

C5

C6

C7

C8

C9

C10

C11

C12

C13

C14

C15

C16

C17

C18

C19

C20

C21

C22

C23

C24

C25

C26
8 MEM_MA_ADD3 A3

D1

D2

D3

D4

D5

D6

D7

D8

D9

D10

D11

D12

D13

D14

D15

D16

D17

D18

D19

D20

D21

D22

D23

D24

D25

D26
98 110 RN9

E1

E2

E3

E4

E5

E6

E7

E8

E9

E10

E11

E12

E13

E14

E15

E16

E17

E18

E19

E20

E21

E22

E23

E24

E25

E26
8 MEM_MA_ADD4 A4 CS0# MEM_MA0_CS#0 8

F1

F2

F3

F4

F5

F6

F7

F8

F9

F10

F11

F12

F13

F14

F15

F16

F17

F18

F19

F20

F21

F22

F23

F24

F25

F26
G10

G11

G12

G13

G14

G15

G16

G17

G18

G21

G22

G23

G24

G25

G26
97 115 1 8

G1

G2

G3

G4

G5

G6

G9
8 MEM_MA_ADD5 A5 CS1# MEM_MA0_CS#1 8 MEM_MA_ADD1 8

H1

H2

H3

H4

H5

H6

H7

H8

H9

H10

H11

H12

H13

H14

H15

H16

H17

H18

H19

H20

H21

H22

H23

H24

H25

H26
94 2 7

J1

J2

J3

J4

J5

J6

J7

J8

J9

J 10

J11

J12

J 13

J 14

J 15

J 16

J 17

J 18

J 19

J 20

J 21

J22

J 23

J24

J 25

J 26
D D

BGA638_50_26SQ_S1G2_OEM
8 MEM_MA_ADD6 A6 MEM_MA_ADD10 8

K1

K2

K3

K4

K5

K6

K7

K8

K9

K10

K11

K12

K13

K14

K15

K16

K17

K18

K19

K20

K21

K22

K23

K24

K25

K26
92 79 3 6

L1

L2

L3

L4

L5

L6

L7

L8

L9

L10

L11

L12

L13

L14

L15

L16

L17

L18

L19

L20

L21

L22

L23

L24

L25

L26
8 MEM_MA_ADD7 A7 CKE0 MEM_MA_CKE0 8 MEM_MA_BANK0 8

M10

M11

M16

M17

M18

M19

M20

M21

M22

M23

M24

M25

M26
M1

M2

M3

M4

M5

M6

M7

M8

M9
93 80 4 5

N1

N2

N3

N4

N5

N6

N7

N8

N9

N10

N11

N16

N17

N18

N19

N20

N21

N22

N23

N24

N25

N26
8 MEM_MA_ADD8 A8 CKE1 MEM_MA_CKE1 8 MEM_MA_ADD5 8
B

P1

P2

P3

P4

P5

P6

P7

P8

P9

P10

P11

P16

P17

P18

P19

P20

P21

P22

P23

P24

P25

P26
91

R1

R2

R3

R4

R5

R6

R7

R8

R9

R10

R11

R16

R17

R18

R19

R20

R21

R22

R23

R24

R25

R26
8 MEM_MA_ADD9 A9

T1

T2

T3

T4

T5

T6

T7

T8

T9

T10

T11

T12

T13

T14

T15

T16

T17

T18

T19

T20

T21

T22

T23

T24

T25

T26
105 30 SRN47J-4-GP

U1

U2

U3

U4

U5

U6

U7

U8

U9

U10

U11

U12

U13

U14

U15

U16

U17

U18

U19

U20

U21

U22

U23

U24

U25

U26
8 MEM_MA_ADD10 A10/AP CK0 MEM_MA_CLK0_P 8

V1

V2

V3

V4

V5

V6

V7

V8

V9

V10

V11

V12

V13

V14

V15

V16

V17

V18

V19

V20

V21

V22

V23

V24

V25

V26
RN14

W10

W11

W12

W13

W14

W15

W16

W17

W18

W21

W22

W23

W24

W25

W26
90 32

W1

W2

W3

W4

W5

W6

W7

W8

W9
8 MEM_MA_ADD11 A11 CK0# MEM_MA_CLK0_N 8

Y1

Y2

Y3

Y4

Y5

Y6

Y9

Y10

Y11

Y12

Y13

Y14

Y15

Y16

Y17

Y18

Y19

Y20

Y21

Y22

Y23

Y24

Y25

Y26
AA10

AA11

AA12

AA13

AA14

AA15

AA16

AA17

AA18

AA19

AA20

AA21

AA22

AA23

AA24

AA25

AA26
89 1 8

AA1

AA2

AA3

AA4

AA5

AA6

AA7

AA8

AA9
8 MEM_MA_ADD12 A12 MEM_MA_ADD15 8

AB10

AB11

AB12

AB13

AB14

AB15

AB16

AB17

AB18

AB19

AB20

AB21

AB22

AB23

AB24

AB25

AB26
AB1

AB2

AB3

AB4

AB5

AB6

AB7

AB8

AB9

AC10

AC11

AC12

AC13

AC14

AC15

AC16

AC17

AC18

AC19

AC20

AC21

AC22

AC23

AC24

AC25

AC26
116 164 2 7

AC1

AC2

AC3

AC4

AC5

AC6

AC7

AC8

AC9
8 MEM_MA_ADD13 A13 CK1 MEM_MA_CLK1_P 8 MEM_MA_CKE1 8

AD10

AD11

AD12

AD13

AD14

AD15

AD16

AD17

AD18

AD19

AD20

AD21

AD22

AD23

AD24

AD25

AD26
AD1

AD2

AD3

AD4

AD5

AD6

AD7

AD8

AD9

AE10

AE11

AE12

AE13

AE14

AE15

AE16

AE17

AE18

AE19

AE20

AE21

AE22

AE23

AE24

AE25
86 166 3 6

AE2

AE3

AE4

AE5

AE6

AE7

AE8

AE9
8 MEM_MA_ADD14 A14 CK1# MEM_MA_CLK1_N 8 MEM_MA_CKE0 8

AF10

AF11

AF12

AF13

AF14

AF15

AF16

AF17

AF18

AF19

AF20

AF21

AF22

AF23

AF24
AF4

AF5

AF6

AF7

AF8

AF9
8 MEM_MA_ADD15 84 A15 4 5 MEM_MA_BANK2 8
85 10 +3.3V_RUN
A16/BA2 DM0 MEM_MA_DM0 8
8 MEM_MA_BANK2 26 MEM_MA_DM1 8 SRN47J-4-GP
DM1
8 MEM_MA_BANK0 107 52 MEM_MA_DM2 8 RN6
BA0 DM2
8 MEM_MA_BANK1 106 BA1 DM3 67 MEM_MA_DM3 8 1 8 MEM_MA0_CS#1 8

1
DM4 130 MEM_MA_DM4 8 2 7 MEM_MA_CAS# 8
147 R497 R499 3 6
DM5 MEM_MA_DM5 8 2K2R2F-GP MEM_MA_RAS# 8
5 170 2K2R2F-GP 4 5
8 MEM_MA_DATA0 DQ0 DM6 MEM_MA_DM6 8 MEM_MA_ADD2 8
8 MEM_MA_DATA1 7 DQ1 DM7 185 MEM_MA_DM7 8
8 MEM_MA_DATA2 17 SRN47J-4-GP

2
DQ2
8 MEM_MA_DATA3 19 RN4
DQ3 MEM_SDATA
8 MEM_MA_DATA4 4 DQ4 SDA 195 MEM_SDATA 12,20 1 8 MEM_MA_ADD13 8
6 197 MEM_SCLK MEM_SCLK 12,20 2 7
8 MEM_MA_DATA5 DQ5 SCL MEM_MA0_ODT0 8
8 MEM_MA_DATA6 14 DQ6 3 6 MEM_MA0_CS#0 8
8 MEM_MA_DATA7 16 DQ7 VDDSPD 199 +3.3V_RUN 4 5 MEM_MA0_ODT1 8
8 MEM_MA_DATA8 23 DQ8

1
25 198 DIMM1_SA0 1 2 C66 C63 SRN47J-4-GP
8 MEM_MA_DATA9 DQ9 SA0
35 200 DIMM1_SA1 R65 1 210KR2J-3-GP SC2D2U6D3V3KX-GP SCD1U10V2KX-4GP RN11
8 MEM_MA_DATA10 DQ10 SA1
37 R64 10KR2J-3-GP 1 8
8 MEM_MA_DATA11
PARALLEL TERMINATION MEM_MA_ADD3 8

2
DQ11
20 50 2 7
8
8
MEM_MA_DATA12
MEM_MA_DATA13 22
36
DQ12
DQ13
NC#50
NC#69 69
83
(A0) 3
4
6
5
MEM_MA_ADD9 8
MEM_MA_ADD8 8
8 MEM_MA_DATA14 DQ14 NC#83 MEM_MA_ADD12 8
8 MEM_MA_DATA15 38 DQ15 NC#120 120
8 MEM_MA_DATA16 43 DQ16 NC#163/TEST 163 Put decap near power(0.9V) and pull-up resistor SRN47J-4-GP
45 +1.8V_SUS RN8
8 MEM_MA_DATA17
8
8
8
MEM_MA_DATA18
MEM_MA_DATA19
MEM_MA_DATA20
55
57
44
46
DQ17
DQ18
DQ19
DQ20
REVERSE TYPE VDD
VDD
81
82
87 PLACE CLOSE TO PROCESSOR
1
2
3
4
8
7
6
5
MEM_MA_ADD0 8
MEM_MA_BANK1 8
MEM_MA_ADD4 8
8 MEM_MA_DATA21 DQ21 VDD MEM_MA_WE# 8
8 MEM_MA_DATA22 56 DQ22 VDD 88 WITHIN 1.5 INCH
8 MEM_MA_DATA23 58 95 SRN47J-4-GP
DQ23 VDD
8 MEM_MA_DATA24 61 DQ24 VDD 96 Do not share the Term resistor between
C 63 103 MEM_MA_CLK0_P C
8 MEM_MA_DATA25
73
DQ25 VDD
104
the DDR addess and Control Signals.
8 MEM_MA_DATA26 DQ26 VDD

1
8 MEM_MA_DATA27 75 DQ27 VDD 111
62 112 C192
8 MEM_MA_DATA28 DQ28 VDD SC1D5P50V2CN-1GP
8 MEM_MA_DATA29 64 117

2
DQ29 VDD MEM_MA_CLK0_N
8 MEM_MA_DATA30 74 DQ30 VDD 118
8 MEM_MA_DATA31 76 DQ31
123 3 MEM_MA_CLK1_P
8 MEM_MA_DATA32 DQ32 VSS
8 MEM_MA_DATA33 125 DQ33 VSS 8

1
8 MEM_MA_DATA34 135 DQ34 VSS 9
137 12 C64
8 MEM_MA_DATA35 DQ35 VSS SC1D5P50V2CN-1GP
8 MEM_MA_DATA36 124 15

2
DQ36 VSS MEM_MA_CLK1_N
126 18
8
8
8
MEM_MA_DATA37
MEM_MA_DATA38
MEM_MA_DATA39
134
136
DQ37
DQ38
DQ39
VSS
VSS
VSS
21
24
Decoupling Capacitor
8 MEM_MA_DATA40 141 DQ40 VSS 27
143 28
8
8
8
MEM_MA_DATA41
MEM_MA_DATA42
MEM_MA_DATA43
151
153
DQ41
DQ42
DQ43
VSS
VSS
VSS
33
34
+1.8V_SUS
Place these Caps near DM2
8 MEM_MA_DATA44 140 DQ44 VSS 39
8 MEM_MA_DATA45 142 DQ45 VSS 40
8 MEM_MA_DATA46 152 DQ46 VSS 41

SC2D2U6D3V3KX-GP

SC2D2U6D3V3KX-GP

SC2D2U6D3V3KX-GP

SC2D2U6D3V3KX-GP

SC2D2U6D3V3KX-GP

SCD01U50V2KX-1GP

SC180P50V2JN-1GP

SCD01U50V2KX-1GP

SC180P50V2JN-1GP
8 MEM_MA_DATA47 154 DQ47 VSS 42
8 MEM_MA_DATA48 157 DQ48 VSS 47

1
159 48 C86 C612 C159 C82 C644 C623 C131 C648 C655
8 MEM_MA_DATA49 DQ49 VSS
8 MEM_MA_DATA50 173 DQ50 VSS 53
175 54 +0.9V_DDR_VTT +1.8V_SUS
8 MEM_MA_DATA51

2
DQ51 VSS
8 MEM_MA_DATA52 158 59

DDR_VREF
DQ52 VSS
8 MEM_MA_DATA53 160 DQ53 VSS 60 1 DY2 1 2
174 65 C626 C673
8 MEM_MA_DATA54 DQ54 VSS
176 66 SCD1U10V2KX-4GP SCD1U10V2KX-4GP
8 MEM_MA_DATA55 DQ55 VSS
8 MEM_MA_DATA56 179 DQ56 VSS 71 1 DY2
181 72 C173
8 MEM_MA_DATA57 DQ57 VSS +1.8V_SUS +V_DDR_VREF_M
189 77 +VREF_DDR_MEM SCD1U10V2KX-4GP
8 MEM_MA_DATA58 DQ58 VSS
8 MEM_MA_DATA59 191 DQ59 VSS 78 1 DY2 1 2
180 121 C174 C99
8 MEM_MA_DATA60 DQ60 VSS
182 122 SCD1U10V2KX-4GP SCD1U10V2KX-4GP
8 MEM_MA_DATA61 DQ61 VSS
1

8 MEM_MA_DATA62 192 DQ62 VSS 127 Layout Note: 1 DY2


194 128 R618 C165
1

C740
8 MEM_MA_DATA63 DQ63 VSS
132 1KR2F-3-GP Place one cap close to every 2 pullup SCD1U10V2KX-4GP
VSS SCD1U10V2KX-4GP
B
8 MEM_MA_DQS0_N 11 DQS0# VSS 133 +0.9V_DDR_VTT resistors terminated to +0.9V_DDR_VTT 1 DY2
C135 B
2

8 MEM_MA_DQS1_N 29 138
2

DQS1# VSS SCD1U10V2KX-4GP


8 MEM_MA_DQS2_N 49 DQS2# VSS 139
8 MEM_MA_DQS3_N 68 DQS3# VSS 144 1 DY 2 1 DY2
C139
1
C138
2
8 MEM_MA_DQS4_N 129 DQS4# VSS 145
1

146 149 R620 SCD1U10V2KX-4GP SCD1U10V2KX-4GP


8 MEM_MA_DQS5_N DQS5# VSS
1

167 150 R616 C732 C735 0R3-0-U-GP 1 DY2


8 MEM_MA_DQS6_N DQS6# VSS
186 155 1KR2F-3-GP SCD1U10V2KX-4GP SC1KP50V2KX-1GP C126 C630 C168 C151 C143 C105 C148 C125 C172 C100 C136 C140 C117 C101 C107
8 MEM_MA_DQS7_N DQS7# VSS

1
156 SCD1U10V2KX-4GP
2

VSS

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
8 MEM_MA_DQS0_P 13 161 1 DY2 1 2
2

DQS0 VSS C128 C154


8 MEM_MA_DQS1_P 31 162

2
DQS1 VSS SCD1U10V2KX-4GP SCD1U10V2KX-4GP
8 MEM_MA_DQS2_P 51 DQS2 VSS 165
8 MEM_MA_DQS3_P 70 DQS3 VSS 168
8 MEM_MA_DQS4_P 131 DQS4 VSS 171
8
8
MEM_MA_DQS5_P
MEM_MA_DQS6_P
148
169
DQS5
DQS6
VSS
VSS
172
177 LAYOUT: Locate close to DIMM
8 MEM_MA_DQS7_P 188 DQS7 VSS 178
VSS 183
8 MEM_MA0_ODT0 114 OTD0 VSS 184
8 MEM_MA0_ODT1 119 OTD1 VSS 187
VSS 190
+VREF_DDR_MEM 1 VREF VSS 193
2 VSS VSS 196
1

1
SC2D2U6D3V3KX-GP

SCD1U10V2KX-4GP

C722 C728 202 201


GND GND
2

MH1 MH1 MH2 MH2

DDR2-200P-21-GP-U
62.10017.A51

HI 9.2mm
Place C2.2uF and 0.1uF <
500mils from DDR connector

A A

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
DDR DIMM1
Size Document Number Rev
A2 FOOSE-AMD 15.4" SB
Date: Friday, January 04, 2008 Sheet 11 of 53
5 4 3 2 1
5 4 3 2 1

SSID = MEMORY

DIMM1
+0.9V_DDR_VTT
8 MEM_MB_ADD0 102 A0 RAS# 108 MEM_MB_RAS# 8
8 MEM_MB_ADD1 101 A1 WE# 109 MEM_MB_WE# 8
8 MEM_MB_ADD2 100 113 MEM_MB_CAS# 8 RN15
A2 CAS#
8 MEM_MB_ADD3 99 A3 1 8 MEM_MB_ADD14 8
98 110 2 7

D
8
8
8
MEM_MB_ADD4
MEM_MB_ADD5
MEM_MB_ADD6
97
94
A4
A5
A6
CS0#
CS1# 115
MEM_MB0_CS#0 8
MEM_MB0_CS#1 8 PARALLEL TERMINATION 3
4
6
5
MEM_MB_ADD12 8
MEM_MB_ADD9 8
MEM_MB_ADD5 8 D
8 MEM_MB_ADD7 92 A7 CKE0 79 MEM_MB_CKE0 8
8 MEM_MB_ADD8 93 80 MEM_MB_CKE1 8 SRN47J-4-GP
A8 CKE1
8 MEM_MB_ADD9 91 A9 Put decap near power(0.9V) and pull-up resistor RN10
8 MEM_MB_ADD10 105 A10/AP CK0 30 MEM_MB_CLK0_P 8 1 8 MEM_MB_ADD4 8
8 MEM_MB_ADD11 90 A11 CK0# 32 MEM_MB_CLK0_N 8 2 7 MEM_MB_ADD6 8
8 MEM_MB_ADD12 89 A12 3 6 MEM_MB_ADD1 8
8 MEM_MB_ADD13 116 A13 CK1 164 MEM_MB_CLK1_P 8 4 5 MEM_MB_ADD2 8
8 MEM_MB_ADD14 86 A14 CK1# 166 MEM_MB_CLK1_N 8
8 MEM_MB_ADD15 84 SRN47J-4-GP
A15
85 10 MEM_MB_DM0 8 RN7
A16/BA2 DM0
8 MEM_MB_BANK2 DM1 26 MEM_MB_DM1 8 Do not share the Term resistor between 1 8 MEM_MB_ADD0 8
107 52 2 7
8 MEM_MB_BANK0
106
BA0 DM2
67
MEM_MB_DM2 8 the DDR addess and Control Signals. 3 6
MEM_MB_BANK1 8
8 MEM_MB_BANK1 BA1 DM3 MEM_MB_DM3 8 MEM_MB_RAS# 8
DM4 130 MEM_MB_DM4 8 4 5 MEM_MB_ADD10 8
DM5 147 MEM_MB_DM5 8
8 MEM_MB_DATA0 5 170 MEM_MB_DM6 8 SRN47J-4-GP
DQ0 DM6
8 MEM_MB_DATA1 7 185 MEM_MB_DM7 8 RN16
DQ1 DM7
8 MEM_MB_DATA2 17 DQ2 1 8 MEM_MB_BANK2 8
8 MEM_MB_DATA3 19 DQ3 2 7 MEM_MB_CKE0 8
8 MEM_MB_DATA4 4 DQ4 SDA 195 MEM_SDATA 11,20 3 6 MEM_MB_CKE1 8
8 MEM_MB_DATA5 6 DQ5 SCL 197 MEM_SCLK 11,20 4 5 MEM_MB_ADD15 8
8 MEM_MB_DATA6 14 DQ6
16 199 SRN47J-4-GP
8 MEM_MB_DATA7 DQ7 VDDSPD +3.3V_RUN
8 MEM_MB_DATA8 23 RN12
DQ8

1
SC2D2U6D3V3KX-GP
25 198 DIMM2_SA0 1 2 C53 1 8
8 MEM_MB_DATA9 DQ9 SA0 MEM_MB_ADD7 8
35 200 DIMM2_SA1R81 1 210KR2J-3-GP +3.3V_RUN C55 SCD1U10V2KX-4GP 2 7
8 MEM_MB_DATA10 DQ10 SA1 MEM_MB_ADD11 8
37 R78 10KR2J-3-GP 3 6
8 MEM_MB_DATA11 MEM_MB_ADD8 8

2
DQ11
20 50 4 5
8 MEM_MB_DATA12
8 MEM_MB_DATA13 22
36
DQ12
DQ13
NC#50
NC#69 69
83
(A4) SRN47J-4-GP
MEM_MB_ADD3 8

8 MEM_MB_DATA14 DQ14 NC#83


8 MEM_MB_DATA15 38 120 RN5
DQ15 NC#120
8 MEM_MB_DATA16 43 DQ16 NC#163/TEST 163 1 8 MEM_MB0_CS#0 8
45 +1.8V_SUS 2 7
8 MEM_MB_DATA17 DQ17 MEM_MB_BANK0 8
8 MEM_MB_DATA18 55 DQ18 3 6 MEM_MB_ADD13 8
8 MEM_MB_DATA19 57 DQ19 VDD 81 4 5 MEM_MB0_ODT0 8
8 MEM_MB_DATA20 44 DQ20 VDD 82 PLACE CLOSE TO PROCESSOR
8 MEM_MB_DATA21 46 87 WITHIN 1.5 INCH SRN47J-4-GP

REVERSE TYPE
DQ21 VDD
8 MEM_MB_DATA22 56 88 RN3
DQ22 VDD
8 MEM_MB_DATA23 58 DQ23 VDD 95 1 8 MEM_MB_WE# 8
61 96 MEM_MB_CLK0_P 2 7
8 MEM_MB_DATA24 DQ24 VDD MEM_MB_CAS# 8
C
8 MEM_MB_DATA25 63 DQ25 VDD 103 3 6 MEM_MB0_CS#1 8
C

1
8 MEM_MB_DATA26 73 DQ26 VDD 104 4 5 MEM_MB0_ODT1 8
75 111 C202
8 MEM_MB_DATA27 DQ27 VDD SC1D5P50V2CN-1GP
8 MEM_MB_DATA28 62 112 SRN47J-4-GP

2
DQ28 VDD MEM_MB_CLK0_N
8 MEM_MB_DATA29 64 DQ29 VDD 117
8 MEM_MB_DATA30 74 DQ30 VDD 118
76 MEM_MB_CLK1_P
8 MEM_MB_DATA31 DQ31
8 MEM_MB_DATA32 123 DQ32 VSS 3

1
8 MEM_MB_DATA33 125 DQ33 VSS 8
135 9 C69
8 MEM_MB_DATA34 DQ34 VSS SC1D5P50V2CN-1GP
8 MEM_MB_DATA35 137 12

2
DQ35 VSS MEM_MB_CLK1_N
8 MEM_MB_DATA36 124 DQ36 VSS 15
8 MEM_MB_DATA37 126 DQ37 VSS 18
8 MEM_MB_DATA38 134 DQ38 VSS 21
8 MEM_MB_DATA39 136 DQ39 VSS 24
8 MEM_MB_DATA40 141 DQ40 VSS 27
8 MEM_MB_DATA41 143 DQ41 VSS 28
8 MEM_MB_DATA42 151 DQ42 VSS 33
8 MEM_MB_DATA43 153 DQ43 VSS 34
8 MEM_MB_DATA44 140 DQ44 VSS 39
8 MEM_MB_DATA45 142 DQ45 VSS 40
152 41
8 MEM_MB_DATA46
8 MEM_MB_DATA47
8 MEM_MB_DATA48
154
157
DQ46
DQ47
DQ48
VSS
VSS
VSS
42
47
Decoupling Capacitor
8 MEM_MB_DATA49 159 DQ49 VSS 48
8 MEM_MB_DATA50 173 DQ50 VSS 53
175 54
8 MEM_MB_DATA51
8 MEM_MB_DATA52
8 MEM_MB_DATA53
158
160
DQ51
DQ52
DQ53
VSS
VSS
VSS
59
60 +1.8V_SUS Place these Caps near DM1
8 MEM_MB_DATA54 174 DQ54 VSS 65
8 MEM_MB_DATA55 176 DQ55 VSS 66
+1.8V_SUS

SC2D2U6D3V3KX-GP

SC2D2U6D3V3KX-GP

SC2D2U6D3V3KX-GP

SC2D2U6D3V3KX-GP

SC2D2U6D3V3KX-GP

SCD01U50V2KX-1GP

SC180P50V2JN-1GP

SCD01U50V2KX-1GP

SC180P50V2JN-1GP
179 71 +0.9V_DDR_VTT
8 MEM_MB_DATA56 DQ56 VSS
8 MEM_MB_DATA57 181 DQ57 VSS 72

1
189 77 C609 C631 C624 C652 C83 C141 C620 C167 C661 1 DY2 1 2
8 MEM_MB_DATA58 DQ58 VSS
191 78 C97 C665
8 MEM_MB_DATA59 DQ59 VSS
180 121 SCD1U10V2KX-4GP SCD1U10V2KX-4GP
8 MEM_MB_DATA60

2
DQ60 VSS
8 MEM_MB_DATA61 182 DQ61 VSS 122 1 DY2
192 127 C108
8 MEM_MB_DATA62 DQ62 VSS
194 128 SCD1U10V2KX-4GP
8 MEM_MB_DATA63 DQ63 VSS
VSS 132 1 DY2 1 2
11 133 C104 C645
B
8 MEM_MB_DQS0_N DQS0# VSS
29 138 SCD1U10V2KX-4GP SCD1U10V2KX-4GP B
8 MEM_MB_DQS1_N DQS1# VSS
8 MEM_MB_DQS2_N 49 DQS2# VSS 139 1 DY2
68 144 C114
8 MEM_MB_DQS3_N DQS3# VSS
129 145 Layout Note: SCD1U10V2KX-4GP
8 MEM_MB_DQS4_N DQS4# VSS
8 MEM_MB_DQS5_N 146 149 1 DY2
167
DQS5# VSS
150 Place one cap close to every 2 pullup C89
8 MEM_MB_DQS6_N DQS6# VSS
8 MEM_MB_DQS7_N 186 DQS7# VSS 155 +0.9V_DDR_VTT resistors terminated to +0.9V_DDR_VTT SCD1U10V2KX-4GP
VSS 156 1 DY2 1 2
13 161 C113 C627
8 MEM_MB_DQS0_P DQS0 VSS
31 162 SCD1U10V2KX-4GP SCD1U10V2KX-4GP
8 MEM_MB_DQS1_P DQS1 VSS
8 MEM_MB_DQS2_P 51 DQS2 VSS 165 1 DY2
70 168 C123
8 MEM_MB_DQS3_P DQS3 VSS
131 171 SCD1U10V2KX-4GP
8 MEM_MB_DQS4_P DQS4 VSS
148 172 C163 C95 C149 C120 C87 C142 C102 C152 C96 C164 C115 C111 C90 C137 1 DY2 1 2
8 MEM_MB_DQS5_P DQS5 VSS 1

1
169 177 C121 C641
8 MEM_MB_DQS6_P DQS6 VSS
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
188 178 SCD1U10V2KX-4GP SCD1U10V2KX-4GP
8 MEM_MB_DQS7_P DQS7 VSS
183
2

2
VSS
8 MEM_MB0_ODT0 114 OTD0 VSS 184
8 MEM_MB0_ODT1 119 OTD1 VSS 187
VSS 190
+VREF_DDR_MEM 1 VREF VSS 193
2 VSS VSS 196
1

1
SC2D2U6D3V3KX-GP

SCD1U10V2KX-4GP

C246 C241 202 201


GND GND
2

MH1 MH1 MH2 MH2

DDR2-200P-20-GP-U
62.10017.A41

Place C2.2uF and 0.1uF < LOW 5.2 mm


500mils from DDR connector

A A

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
DDR DIMM2
Size Document Number Rev
A2 FOOSE-AMD 15.4" SB
Date: Friday, January 04, 2008 Sheet 12 of 53
5 4 3 2 1
5 4 3 2 1

U72A
7 HT_CPU_NB_CAD_H0 Y25 HT_RXCAD0P HT_TXCAD0P D24 HT_NB_CPU_CAD_H0 7
Y24 PART 1 OF 6 D25
SSID = N.B 7
7
7
HT_CPU_NB_CAD_L0
HT_CPU_NB_CAD_H1
HT_CPU_NB_CAD_L1
V22
V23
HT_RXCAD0N
HT_RXCAD1P
HT_RXCAD1N
HT_TXCAD0N
HT_TXCAD1P
HT_TXCAD1N
E24
E25
HT_NB_CPU_CAD_L0
HT_NB_CPU_CAD_H1
HT_NB_CPU_CAD_L1
7
7
7
7 HT_CPU_NB_CAD_H2 V25 HT_RXCAD2P HT_TXCAD2P F24 HT_NB_CPU_CAD_H2 7
7 HT_CPU_NB_CAD_L2 V24 HT_RXCAD2N HT_TXCAD2N F25 HT_NB_CPU_CAD_L2 7
7 HT_CPU_NB_CAD_H3 U24 HT_RXCAD3P HT_TXCAD3P F23 HT_NB_CPU_CAD_H3 7
7 HT_CPU_NB_CAD_L3 U25 HT_RXCAD3N HT_TXCAD3N F22 HT_NB_CPU_CAD_L3 7
7 HT_CPU_NB_CAD_H4 T25 HT_RXCAD4P HT_TXCAD4P H23 HT_NB_CPU_CAD_H4 7
7 HT_CPU_NB_CAD_L4 T24 HT_RXCAD4N HT_TXCAD4N H22 HT_NB_CPU_CAD_L4 7

HYPER TRANSPORT CPU I/F


7 HT_CPU_NB_CAD_H5 P22 HT_RXCAD5P HT_TXCAD5P J25 HT_NB_CPU_CAD_H5 7
7 HT_CPU_NB_CAD_L5 P23 HT_RXCAD5N HT_TXCAD5N J24 HT_NB_CPU_CAD_L5 7
D 7 HT_CPU_NB_CAD_H6 P25 HT_RXCAD6P HT_TXCAD6P K24 HT_NB_CPU_CAD_H6 7 D
7 HT_CPU_NB_CAD_L6 P24 HT_RXCAD6N HT_TXCAD6N K25 HT_NB_CPU_CAD_L6 7
7 HT_CPU_NB_CAD_H7 N24 HT_RXCAD7P HT_TXCAD7P K23 HT_NB_CPU_CAD_H7 7
7 HT_CPU_NB_CAD_L7 N25 HT_RXCAD7N HT_TXCAD7N K22 HT_NB_CPU_CAD_L7 7

7 HT_CPU_NB_CAD_H8 AC24 HT_RXCAD8P HT_TXCAD8P F21 HT_NB_CPU_CAD_H8 7


7 HT_CPU_NB_CAD_L8 AC25 HT_RXCAD8N HT_TXCAD8N G21 HT_NB_CPU_CAD_L8 7
7 HT_CPU_NB_CAD_H9 AB25 HT_RXCAD9P HT_TXCAD9P G20 HT_NB_CPU_CAD_H9 7
7 HT_CPU_NB_CAD_L9 AB24 HT_RXCAD9N HT_TXCAD9N H21 HT_NB_CPU_CAD_L9 7
7 HT_CPU_NB_CAD_H10 AA24 HT_RXCAD10P HT_TXCAD10P J20 HT_NB_CPU_CAD_H10 7
7 HT_CPU_NB_CAD_L10 AA25 HT_RXCAD10N HT_TXCAD10N J21 HT_NB_CPU_CAD_L10 7
7 HT_CPU_NB_CAD_H11 Y22 HT_RXCAD11P HT_TXCAD11P J18 HT_NB_CPU_CAD_H11 7
7 HT_CPU_NB_CAD_L11 Y23 HT_RXCAD11N HT_TXCAD11N K17 HT_NB_CPU_CAD_L11 7
7 HT_CPU_NB_CAD_H12 W21 HT_RXCAD12P HT_TXCAD12P L19 HT_NB_CPU_CAD_H12 7
7 HT_CPU_NB_CAD_L12 W20 HT_RXCAD12N HT_TXCAD12N J19 HT_NB_CPU_CAD_L12 7
7 HT_CPU_NB_CAD_H13 V21 HT_RXCAD13P HT_TXCAD13P M19 HT_NB_CPU_CAD_H13 7
7 HT_CPU_NB_CAD_L13 V20 HT_RXCAD13N HT_TXCAD13N L18 HT_NB_CPU_CAD_L13 7
7 HT_CPU_NB_CAD_H14 U20 HT_RXCAD14P HT_TXCAD14P M21 HT_NB_CPU_CAD_H14 7
7 HT_CPU_NB_CAD_L14 U21 HT_RXCAD14N HT_TXCAD14N P21 HT_NB_CPU_CAD_L14 7
7 HT_CPU_NB_CAD_H15 U19 HT_RXCAD15P HT_TXCAD15P P18 HT_NB_CPU_CAD_H15 7
7 HT_CPU_NB_CAD_L15 U18 HT_RXCAD15N HT_TXCAD15N M18 HT_NB_CPU_CAD_L15 7

7 HT_CPU_NB_CLK_H0 T22 HT_RXCLK0P HT_TXCLK0P H24 HT_NB_CPU_CLK_H0 7


7 HT_CPU_NB_CLK_L0 T23 HT_RXCLK0N HT_TXCLK0N H25 HT_NB_CPU_CLK_L0 7
7 HT_CPU_NB_CLK_H1 AB23 HT_RXCLK1P HT_TXCLK1P L21 HT_NB_CPU_CLK_H1 7
7 HT_CPU_NB_CLK_L1 AA22 HT_RXCLK1N HT_TXCLK1N L20 HT_NB_CPU_CLK_L1 7

7 HT_CPU_NB_CTL_H0 M22 HT_RXCTL0P HT_TXCTL0P M24 HT_NB_CPU_CTL_H0 7


7 HT_CPU_NB_CTL_L0 M23 HT_RXCTL0N HT_TXCTL0N M25 HT_NB_CPU_CTL_L0 7
C R21 P19 C
7 HT_CPU_NB_CTL_H1 HT_RXCTL1P HT_TXCTL1P HT_NB_CPU_CTL_H1 7
7 HT_CPU_NB_CTL_L1 R20 HT_RXCTL1N HT_TXCTL1N R18 HT_NB_CPU_CTL_L1 7
1 2 R148 HT_RXCALP C23 HT_RXCALP HT_TXCALP B24 HT_TXCALP 1 2 R132
301R2F-GP HT_RXCALN A24 B25 HT_TXCALN 301R2F-GP
HT_RXCALN HT_TXCALN
Place < 100mils from pin C23 and A24 Place < 100mils from pin B25 and B24
RS780M-GP-U1
To E DOCK
U72B Placement: close RS780
D4 A5 DPB_LANE_P0 C739 1 2 SCD1U10V2KX-4GP
GFX_RX0P GFX_TX0P DPB_LANE_P0_C 37
C4 PART 2 OF 6 B5 DPB_LANE_N0 C742 1 2 SCD1U10V2KX-4GP
GFX_RX0N GFX_TX0N DPB_LANE_N0_C 37
A3 A4 DPB_LANE_P1 C741 1 2 SCD1U10V2KX-4GP
GFX_RX1P GFX_TX1P DPB_LANE_P1_C 37
B3 B4 DPB_LANE_N1 C745 1 2 SCD1U10V2KX-4GP
GFX_RX1N GFX_TX1N DPB_LANE_N1_C 37
C2 C3 DPB_LANE_P2 C751 1 2 SCD1U10V2KX-4GP
GFX_RX2P GFX_TX2P DPB_LANE_P2_C 37
C1 B2 DPB_LANE_N2 C748 1 2 SCD1U10V2KX-4GP
GFX_RX2N GFX_TX2N DPB_LANE_N2_C 37
E5 D1 DPB_LANE_P3 C749 1 2 SCD1U10V2KX-4GP
GFX_RX3P GFX_TX3P DPB_LANE_P3_C 37
F5 D2 DPB_LANE_N3 C746 1 2 SCD1U10V2KX-4GP
GFX_RX3N GFX_TX3N DPB_LANE_N3_C 37
G5 E2 DPC_LANE_P0 C752 1 2 SCD1U10V2KX-4GP
GFX_RX4P GFX_TX4P DPC_LANE_P0_C 37
G6 E1 DPC_LANE_N0 C755 1 2 SCD1U10V2KX-4GP
GFX_RX4N GFX_TX4N DPC_LANE_N0_C 37
H5 F4 DPC_LANE_P1 C753 1 2 SCD1U10V2KX-4GP
GFX_RX5P GFX_TX5P DPC_LANE_P1_C 37
H6 F3 DPC_LANE_N1 C757 1 2 SCD1U10V2KX-4GP
GFX_RX5N GFX_TX5N DPC_LANE_N1_C 37
J6 F1 DPC_LANE_P2 C758 1 2 SCD1U10V2KX-4GP
GFX_RX6P GFX_TX6P DPC_LANE_P2_C 37
J5 F2 DPC_LANE_N2 C765 1 2 SCD1U10V2KX-4GP
GFX_RX6N GFX_TX6N DPC_LANE_N2_C 37
J7 H4 DPC_LANE_P3 C763 1 2 SCD1U10V2KX-4GP
GFX_RX7P GFX_TX7P DPC_LANE_P3_C 37
J8 H3 DPC_LANE_N3 C768 1 2 SCD1U10V2KX-4GP
GFX_RX7N GFX_TX7N DPC_LANE_N3_C 37
L5 GFX_RX8P GFX_TX8P H1
L6 GFX_RX8N GFX_TX8N H2
M8 GFX_RX9P GFX_TX9P J2
B B
L8 GFX_RX9N GFX_TX9N J1
PCIE I/F GFX

P7 GFX_RX10P GFX_TX10P K4
M7 GFX_RX10N GFX_TX10N K3
P5 GFX_RX11P GFX_TX11P K1
M5 GFX_RX11N GFX_TX11N K2
R8
P8
GFX_RX12P GFX_TX12P M4
M3
RS780M Display Port Support(muxed on GFX)
GFX_RX12N GFX_TX12N
R6
R5
GFX_RX13P GFX_TX13P M1
M2
DP0 GFX_TX0,TX1,TX2,TX3,AUX0,HPD0
GFX_RX13N GFX_TX13N
P4
P3
GFX_RX14P GFX_TX14P N2
N1
DP1 GFX_TX4,TX5,TX6,TX7,AUX1,HPD1
GFX_RX14N GFX_TX14N
T4 GFX_RX15P GFX_TX15P P1
T3 GFX_RX15N GFX_TX15N P2

31 PCIE_NBRX_WANTX_P0 AE3 AC1 PCIE_NBTX_WANRX_P0 C785 1 2 SCD1U10V2KX-4GP


GPP_RX0P GPP_TX0P PCIE_NBTX_C_WANRX_P0 31
PCIE_NBTX_WANRX_N0 C792 SCD1U10V2KX-4GP
WWAN 31 PCIE_NBRX_WANTX_N0 AD4
AE2
GPP_RX0N GPP_TX0N AC2
AB4 PCIE_NBTX_WLANRX_P1C780
1
1
2
2 SCD1U10V2KX-4GP
PCIE_NBTX_C_WANRX_N0 31 WWAN
31 PCIE_NBRX_WLANTX_P1 GPP_RX1P GPP_TX1P PCIE_NBTX_C_WLANRX_P1 31
PCIE_NBTX_WLANRX_N1C783 SCD1U10V2KX-4GP
WLAN 31 PCIE_NBRX_WLANTX_N1 AD3
AD1
GPP_RX1N GPP_TX1N AB3
AA2 PCIE_NBTX_LOMRX_P2 C775
1
1
2
2 SCD1U10V2KX-4GP PCIE_NBTX_C_WLANRX_N1 31 WLAN
24 PCIE_NBRX_LOMTX_P2 GPP_RX2P GPP_TX2P PCIE_NBTX_C_LOMRX_P2 24
PCIE I/F GPP PCIE_NBTX_LOMRX_N2 C777 SCD1U10V2KX-4GP
LOM 24 PCIE_NBRX_LOMTX_N2 AD2
V5
GPP_RX2N GPP_TX2N AA1
Y1
1 2 PCIE_NBTX_C_LOMRX_N2 24 LOM
GPP_RX3P GPP_TX3P
W6 GPP_RX3N GPP_TX3N Y2
U5 GPP_RX4P GPP_TX4P Y4
U6 GPP_RX4N GPP_TX4N Y3
U8 GPP_RX5P GPP_TX5P V1
U7 GPP_RX5N GPP_TX5N V2

19 ALINK_NBRX_SBTX_P0 AA8 AD7 ALINK_NBTX_SBRX_P0 C817 1 2 SCD1U10V2KX-4GP


SB_RX0P SB_TX0P ALINK_NBTX_C_SBRX_P0 19
19 ALINK_NBRX_SBTX_N0 Y8 AE7 ALINK_NBTX_SBRX_N0 C818 1 2 SCD1U10V2KX-4GP <Variant Name>
A SB_RX0N SB_TX0N ALINK_NBTX_C_SBRX_N0 19 A
19 ALINK_NBRX_SBTX_P1 AA7 AE6 ALINK_NBTX_SBRX_P1 C814 1 2 SCD1U10V2KX-4GP
SB_RX1P SB_TX1P ALINK_NBTX_C_SBRX_P1 19
Y7 AD6 ALINK_NBTX_SBRX_N1 C815 1 2 SCD1U10V2KX-4GP
A-LINK 19 ALINK_NBRX_SBTX_N1 SB_RX1N
PCIE I/F SB
SB_TX1N ALINK_NBTX_SBRX_P2 C813 SCD1U10V2KX-4GP
ALINK_NBTX_C_SBRX_N1 19
19
19
ALINK_NBRX_SBTX_P2
ALINK_NBRX_SBTX_N2
AA5
AA6
SB_RX2P
SB_RX2N
SB_TX2P
SB_TX2N
AB6
AC6 ALINK_NBTX_SBRX_N2 C816
1
1
2
2 SCD1U10V2KX-4GP
ALINK_NBTX_C_SBRX_P2
ALINK_NBTX_C_SBRX_N2
19
19
Wistron Corporation
W5 AD5 ALINK_NBTX_SBRX_P3 C811 1 2 SCD1U10V2KX-4GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
19 ALINK_NBRX_SBTX_P3 SB_RX3P SB_TX3P ALINK_NBTX_C_SBRX_P3 19
Y5 AE5 ALINK_NBTX_SBRX_N3 C812 1 2 SCD1U10V2KX-4GP Taipei Hsien 221, Taiwan, R.O.C.
19 ALINK_NBRX_SBTX_N3 SB_RX3N SB_TX3N ALINK_NBTX_C_SBRX_N3 19
AC8 PCE_PCAL 1 2 Title
PCE_CALRP PCE_NCAL R215 1
PCE_CALRN AB8 2 1K27R2F-L-GP +1.1V_RUN ATi-RS780M_HT LINK&PCIE_(1/4)
R195 2KR2F-3-GP
Size Document Number Rev
RS780M-GP-U1
Place < 100mils from pin AC8 and AB8 A3 FOOSE-AMD 15.4" SB
Date: Friday, January 04, 2008 Sheet 13 of 53
5 4 3 2 1
5 4 3 2 1

+3.3V_RUN
+3.3V_RUN +3.3V_RUN_AVDD
SSID = N.B 1
L8
2
15 mils width STRAP_DEBUG_BUS_GPIO_ENABLE

2
Enables the Test Debug Bus using GPIO.(PIN: RS780M--> VSYNC)

1
BLM18PG330SN1D-GP C248 R604 R605 0 : Enable 1 : Disable
Close to NB ball 33ohm 3A SC2D2U6D3V3KX-GP 3KR2F-GP DY 3KR2F-GP
*

2
+1.1V_RUN +1.1V_RUN_PLLVDD RS780: Enables Side port memory ( RS780 use HSYNC)

1
L4 CRT_VSYNC
+1.8V_RUN CRT_HSYNC
1 2
BLM15AG221SN-GP
15 mils width
R610
15 mils width *0 : Enable 1 : Disable
1

1
+1.8V_RUN_AVDDDI

SC2D2U6D3V3KX-GP
1 2
D C211 R121 R120 D

C720
SC2D2U6D3V3KX-GP 0R3-0-U-GP 3KR2F-GP DY 3KR2F-GP SUS_STAT#
2

Selects Loading of STRAPS From EEPROM


+1.8V_RUN +1.8V_RUN_AVDDQ
*10 :: I2C
Bypass the loading of EEPROM straps and use Hardware Default Values

2
R128 15 mils width
+1.8V_RUN_PLVDD18 Master can load strap values from EEPROM if connected,

SCD1U10V2KX-4GP
+1.8V_RUN 1 2
L3 15 mils width BLM18BB221SN1D-GP or use default values if not connected

C239
1 2
BLM15AG221SN-GP C230 U72C
1

C220 SC2D2U6D3V3KX-GP F12 A22 TXAOUT0+ 17

2
C229 SCD1U10V2KX-4GP AVDD1 TXOUT_L0P
E12 AVDD2 PART 3 OF 6 TXOUT_L0N B22 TXAOUT0- 17
SC2D2U6D3V3KX-GP F14 A21 TXAOUT1+ 17
2

AVDDDI TXOUT_L1P
G15 AVSSDI TXOUT_L1N B21 TXAOUT1- 17
R135 1 2 150R2F-1-GP H15 B20
AVDDQ TXOUT_L2P TXAOUT2+ 17
R149 1 2 150R2F-1-GP H14 A20
AVSSQ TXOUT_L2N TXAOUT2- 17
+1.8V_RUN R150 1 2 150R2F-1-GP A19
+1.8V_VDDA18HTPLL TXOUT_L3P
18 TV_C E17 C_Pr TXOUT_L3N B19
L13 15mil width F17
18 TV_Y Y
1 2 F15 B18

CRT/TVOUT
18 TV_CVBS COMP_Pb TXOUT_U0P TXBOUT0+ 17
BLM15AG221SN-GP A18
TXOUT_U0N TXBOUT0- 17
1

C270 G18 A17


18 VGA_RED RED TXOUT_U1P TXBOUT1+ 17
C279 SCD1U10V2KX-4GP R155 1 2 150R2F-1-GP G17 B17
REDb TXOUT_U1N TXBOUT1- 17
SC2D2U6D3V3KX-GP E18 D20
18 VGA_GRN TXBOUT2+ 17
2

R130 1 GREEN TXOUT_U2P


2 150R2F-1-GP F18 GREENb TXOUT_U2N D21 TXBOUT2- 17
18 VGA_BLU E19 BLUE TXOUT_U3P D18
R144 1 2 150R2F-1-GP F19 D19
+1.8V_RUN BLUEb TXOUT_U3N
+1.8V_VDDA18PCIEPLL A11 B16
18 CRT_HSYNC DAC_HSYNC TXCLK_LP TXACLK+ 17
L7 15mil width B11 A16
18 CRT_VSYNC DAC_VSYNC TXCLK_LN TXACLK- 17
C 1 2 F8 D16 +1.8V_RUN C
18 NB_DDCCLK DAC_SCL TXCLK_UP TXBCLK+ 17
BLM18BB221SN1D-GP E8 D17
18 NB_DDCDATA DAC_SDA TXCLK_UN TXBCLK- 17
1

C234 X01
C232 SCD1U10V2KX-4GP 1 2DAC_RSET G14 15 mils width L54
SC2D2U6D3V3KX-GP R151 768R2F-1-GP DAC_RSET +1.8V_RUN_VDDLP18
A13 1 2
2

+1.1V_RUN_PLLVDD VDDLTP18 BLM15AG221SN-GP


A12 PLLVDD VSSLTP18 B13

1
+1.8V_RUN_PLVDD18 D14 PLLVDD18 C730
B12 PLLVSS VDDLT18_1 A15
+3.3V_RUN +3.3V_RUN B15 +1.8V_RUN_VDDLT18 SC2D2U6D3V3KX-GP

2
LVTM
+1.8V_VDDA18HTPLL VDDLT18_2
H17 VDDA18HTPLL VDDLT33_1 A14

PLL PWR
VDDLT33_2 B14
1

D7 VDDA18PCIEPLL1
R219 DY DY R218 1 DY 2 +1.8V_VDDA18PCIEPLL E7 C14 15 mils width L53
9 LDT_RST#_CPU VDDA18PCIEPLL2 VSSLT1
4K7R2J-2-GP 4K7R2J-2-GP R172 0R2J-2-GP D15 1 2
R220 SYSREST# VSSLT2 BLM15AG221SN-GP
19,34,35,50 PLTRST# 1 2 D8 SYSRESET# VSSLT3 C16

1
0R2J-2-GP R176 0R2J-2-GP NB_PWRGD A10 C18
2

NB_LDT_STOP# POWERGOOD VSSLT4 C716 C718


9 LDT_STP#_CPU 1 2 C10 LDTSTOP# VSSLT5 C20
1 2 NB_ALLOW_LDTSTOP C12 E20 SC4D7U6D3V3KX-GP SCD1U10V2KX-4GP
9,19 ALLOW_LDTSTOP

2
ALLOW_LDTSTOP VSSLT6
VSSLT7 C22

CLOCKs PM
R241 C25
6 CLK_NBHT_CLK HT_REFCLKP
0R2J-2-GP C24
6 CLK_NBHT_CLK# HT_REFCLKN
+1.1V_RUN 1KR2F-3-GP
R129 E11
6 CLK_NB_14M REFCLK_P/OSCIN
1 2 NB_REFCLK_N F11 E9
REFCLK_N LVDS_DIGON LVDS_DIGON 17
1 2 F7 GMCH_BL_ON
Remove R240 at X01.
ENABLE External CLK GEN +3.3V_RUN R146 T2
LVDS_BLON
G12
GMCH_BL_ON 17
6 CLK_NB_GFX GFX_REFCLKP LVDS_ENA_BL PANEL_BKEN 35
1KR2F-3-GP T1
G.G list 10/06. 6 CLK_NB_GFX# GFX_REFCLKN R107 1 DY 21K27R2F-L-GP
6 CLK_NBGPP_CLK U1 GPP_REFCLKP
1

B R152 1 B
6 CLK_NBGPP_CLK# U2 GPP_REFCLKN DY 21K27R2F-L-GP
R117 R608
4K7R2J-2-GP 4K7R2J-2-GP V4 R154 1 DY 2100KR2J-1-GP
6 CLK_NB_GPPSB GPPSB_REFCLKP
6 CLK_NB_GPPSB# V3 GPPSB_REFCLKN
2

17 LCD_DDCLK B9 I2C_CLK
A9 D9
17 LCD_DDCDAT
B8
I2C_DATA MIS. TMDS_HPD
D10
DPB_HPD 37
37 DPB_DOCK_AUX# DDC_CLK0/AUX0P DDC_DATA0/AUX0N HPD DPC_DOCK_HPD 37
A8 R200
37 DPB_DOCK_AUX DDC_DATA0/AUX0N DDC_CLK0/AUX0P
B7 D12 SUS_STAT#_R 1 2
37 DPC_DOCK_AUX DDC_CLK1/AUX1P SUS_STAT# SUS_STAT# 20
37 DPC_DOCK_AUX# A7 DDC_DATA1/AUX1N
R119 AE8 0R2J-2-GP pull up from SB
STRP_DATA THERMALDIODE_P NB_THERMDP 39
+3.3V_RUN 1 2 B10 STRP_DATA THERMALDIODE_N AD8 NB_THERMDN 39
GPIO MODE 10KR2J-3-GP
TP26 1 NB_RESERVED G11 D13 TESTMODE_NB
R127 RESERVED TESTMODE
STRP_DATA 0 *1

1
1 2 RS780_AUX_CAL C8 AUX_CAL R147 R203
VCC_NB 1.0V 1.1V
150R2F-1-GP RS780M-GP-U1 1K8R2F-GP DY 3KR2F-GP

2
1 2 +1.8V_RUN
20 SB_TO_NB_PWRGD
R603 0R2J-2-GP
+3.3V_RUN
X01 X01
U96 X01 AMD schematic review 11/19.
5 VCC NC#1 1 1 R607
A 2 300R2J-4-GP <Variant Name> A
A U70
34 SB_TO_EC_PWRGD 4 Y GND 3
2

1.8V_RUN_U1
74AUP1G17GW-GP
35 EC_NB_PWRGD 1 2 EC_NB_PWRGD_R
DY 0R2J-2-GP
1
2
NC#1
A DY
VCC 5
Wistron Corporation
R601 3 4 NB_PWRGD 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
GND Y Taipei Hsien 221, Taiwan, R.O.C.
X01
1

C717
SNAUC1G17DCKR-1GP Title
DYSCD1U10V2KX-4GP
Ati:0~30n sec ATi-RS780M_LVDS&CRT_(2/4)
2

1 2
R693 0R2J-2-GP Size Document Number Rev
A3 FOOSE-AMD 15.4" SB
Date: Friday, January 04, 2008 Sheet 14 of 53
5 4 3 2 1
5 4 3 2 1

U72D
PAR 4 OF 6 MEM_COMP_P and MEM_COMP_N trace
MEM_A0 AB12 AA18 MEM_DQ0
SSID = N.B MEM_A1
MEM_A2
AE16
V11
MEM_A0
MEM_A1
MEM_A2
MEM_DQ0/DVO_VSYNC
MEM_DQ1/DVO_HSYNC
MEM_DQ2/DVO_DE
AA20
AA19
MEM_DQ1
MEM_DQ2
width >=10mils and 10mils spacing from
other Signals in X,Y,Z directions
MEM_A3 AE15 Y19 MEM_DQ3
MEM_A4 MEM_A3 MEM_DQ3/DVO_D0 MEM_DQ4
AA12 MEM_A4 MEM_DQ4 V17
MEM_A5 AB16 AA17 MEM_DQ5 +1.8V_RUN
MEM_A5 MEM_DQ5/DVO_D1 L64
MEM_A6 AB14 AA15 MEM_DQ6 15 mils width
MEM_A7 MEM_A6 MEM_DQ6/DVO_D2 MEM_DQ7
AD14 MEM_A7 MEM_DQ7/DVO_D4 Y15 1 2
MEM_A8 AD13 AC20 MEM_DQ8
MEM_A9 MEM_A8 MEM_DQ8/DVO_D3 MEM_DQ9 BLM15AG221SN-GP
AD15 MEM_A9 MEM_DQ9/DVO_D5 AD19

1
+1.8V_RUN +1.8V_MEM_VDDQ MEM_A10 MEM_DQ10

SBD_MEM/DVO_I/F
D L58 220 ohm @ 100MHz,2A MEM_A11
AC16 MEM_A10 MEM_DQ10/DVO_D6 AE22
MEM_DQ11 C821
D
AE13 MEM_A11 MEM_DQ11/DVO_D7 AC18
1 2 MEM_A12 AC14 AB20 MEM_DQ12 SC2D2U6D3V3KX-GP

2
MEM_A12 MEM_DQ12

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
BLM21PG221SN-1GP TP27 1MEM_A13 Y14 AD22 MEM_DQ13
MEM_A13 MEM_DQ13/DVO_D9 MEM_DQ14
MEM_DQ14/DVO_D10 AC22

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
C300 C788 C798 C784 MEM_BA0 AD16 AD21 MEM_DQ15 +1.1V_RUN
MEM_BA0 MEM_DQ15/DVO_D11 L60

1
C834 C833 MEM_BA1 AE17 15 mils width
TC19 MEM_BA2 MEM_BA1 MEM_DQS0P
ST330U2D5VCM-GP
DY AD17 MEM_BA2 MEM_DQS0P/DVO_IDCKP Y17
MEM_DQS0N
1 2
W18
2

2
RAS# MEM_DQS0N/DVO_IDCKN MEM_DQS1P BLM15AG221SN-GP
W12 MEM_RAS# MEM_DQS1P AD20

SC2D2U6D3V3KX-GP
CAS# Y12 AE21 MEM_DQS1N
WE# MEM_CAS# MEM_DQS1N
AD18 MEM_WE#

1
CS# AB13 W17 MEM_DM0 C787 C794
CKE MEM_CS# MEM_DM0 MEM_DM1 SCD1U10V2KX-4GP
AB18 MEM_CKE MEM_DM1/DVO_D8 AE19
ODT V14

2
MEM_ODT +1.8V_IOPLLVDD18
IOPLLVDD18 AE23
MEM_CLKP V15 AE24 +1.1V_IOPLLVDD
+1.8V_MEM_VDDQ 40D2R2F-GP MEM_CLKN MEM_CKP IOPLLVDD
W14 MEM_CKN
R663 AD23
MEM_COMPP IOPLLVSS
1 2 AE12 MEM_COMPP
1 2 MEM_COMPN AD12 AE18 MEM_VREF_NB +1.8V_MEM_VDDQ
MEM_COMPN MEM_VREF
R660 RS780M-GP-U1
40D2R2F-GP

1
R661 C809
1KR2F-3-GP SCD1U10V2KX-4GP

2
2
C C
+0.9V_MEM_VTT +1.8V_MEM_VDDQ

1
U34

1
MEM_BA0 L2 B9 MEM_DQ15 1 2 C375 R654
MEM_BA1 L3
BA0 DQ15
B1 MEM_DQ14 RN53 DY SC10U6D3V5KX-1GP 1KR2F-3-GP C820
BA1 DQ14 MEM_DQ13 CS# SCD1U10V2KX-4GP
D9 1 8

2
MEM_A12 DQ13 MEM_DQ12 MEM_A0
R2 D1 2 7 1 2 C324
DY DY

2
MEM_A11 A12 DQ12 MEM_DQ11 MEM_A4 SCD1U10V2KX-4GP
P7 A11 DQ11 D3 3 6
MEM_A10 M2 D7 MEM_DQ10 MEM_A8 4 5 1 2 C325
MEM_A9 P3
A10/AP DQ10
C2 MEM_DQ9 DY SCD1U10V2KX-4GP
MEM_A8 A9 DQ9 MEM_DQ8
P8 C8 SRN47J-4-GP
MEM_A7 A8 DQ8 MEM_DQ7
P2 F9 RN36
MEM_A6 A7 DQ7 MEM_DQ6 RAS#
N7 F1 1 8 1 2 C352
MEM_A5 N3
A6 DQ6
H9 MEM_DQ5 CAS# 2 7
DY SCD1U10V2KX-4GP
MEM_A4 N8
A5 DQ5
H1 MEM_DQ4 MEM_A11 3
DY 6
MEM_A3 A4 DQ4 MEM_DQ3 MEM_A6
N2 H3 4 5 1 2 C348
MEM_A2 M7
A3 DQ3
H7 MEM_DQ2 DY SCD1U10V2KX-4GP
MEM_A1 A2 DQ2 MEM_DQ1
M3 G2 SRN47J-4-GP
MEM_A0 M8
A1 DQ1
G8 MEM_DQ0 RN29
Design current: 1400mA
R667 A0 DQ0 MEM_A12 1 8 1 2 C363 Max current: 2000mA
1 2 100R2F-L1-GP-U MEM_A7 2 7
DY SCD1U10V2KX-4GP
MEM_CLKN K8 A9 +1.8V_MEM_VDDQ MEM_A3 3
DY 6
MEM_CLKP CK VDDQ1 MEM_BA0
J8 C1 4 5 1 2 C355 +0.9V_DDR_VTT +0.9V_MEM_VTT
CK VDDQ2
C3
DY SCD1U10V2KX-4GP
CKE VDDQ3
K2 C7 SRN47J-4-GP
CKE VDDQ4
VDDQ5 C9 RN47 D U27 S
E9 MEM_BA1 1 8 1 2 C366 +15V 1 D D 6
VDDQ6
G1 WE# 2 7
DY SCD1U10V2KX-4GP 2 D D 5
CS# L8
VDDQ7
G3 MEM_A10 3
DY 6 3 G S 4
B CS VDDQ8 49 1.8V_RUN_ENABLE B
G7 MEM_BA2 4 5 1 2 C374 G
VDDQ9 DY

SC10U6D3V5KX-1GP
WE# K3 G9 SCD1U10V2KX-4GP SI3456BDV-T1-GP
WE VDDQ10

1
SRN47J-4-GP C262 2Amp
DY
1

RAS# K7 A1 RN35 SC470P50V2KX-3GP C280


RAS VDD1 L59 MEM_A2
E1 1 8 1 2 C822
DY

2
CAS# VDD2 BLM18AG601SN-3GP MEM_A1 SCD1U10V2KX-4GP
L7 J9 2 7
CAS VDD3
M9 600 ohm @ 100MHz,200mA MEM_A5 3
DY 6
MEM_DM0 VDD4 MEM_A9
F3 R1 4 5 1 2 C806
MEM_DM1 B3
LDM VDD5 DY SCD1U10V2KX-4GP
2

UDM VDDL_VRAM
J1 SRN47J-4-GP
VDDL
J7 Layout Note: 50 mil for VSSDL RN27 1 2 C825
ODT K9
VSSDL CKE 1 4
DY SCD1U10V2KX-4GP
ODT DY
1

+1.8V_MEM_VDDQ ODT 2 3 1 2 C830


C786 DY SCD1U10V2KX-4GP
MEM_DQS0P F7 SC1U6D3V3KX-1GP SRN47J-7-GP
2

MEM_DQS0N LDQS
E8 LDQS VSSQ1 A7
VSSQ2 B2 Local Frame Buffer Strapping List
1

VSSQ3 B8 Copy from Becks.


1

R646 D2
C804 1KR2F-3-GP MEM_DQS1P VSSQ4
SCD1U10V2KX-4GP MEM_DQS1N
B7
A8
UDQS VSSQ5 D8
E7
LFB_ID2 LFB_ID1 LFB_ID0 Vendor Part Number Wistron Part Number
2

UDQS VSSQ6
F2 Hynix 0 0 0 HY5PS121621CFP-25 72.51216.F0U
2

VSSQ7
VSSQ8 F8
MEM_VREF_CHIP J2 VREF VSSQ9 H2
H8
Main Source Qimonda 0 0 1 HYB18T512161B2F-25 72.18512.M0U
VSSQ10
1

A2 NC#A2 2nd Source Samsung 0 1 0 K4N51163QE-ZC25 72.45116.A0U


1

C797 R643 E2 A3
SCD1U10V2KX-4GP 1KR2F-3-GP MEM_BA2 NC#E2 VSS1
L1 NC#L1 VSS2 E3
A R3 J3 <Variant Name> A
2

NC#R3 VSS3
R7 N1
2

NC#R7 VSS4
R8 NC#R8 VSS5 P9
Wistron Corporation
HY5PS121621CFP-25-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
14_ATi-RS780M_SidePort_(3/4)
Size Document Number Rev
A3 FOOSE-AMD 15.4" SB
Date: Friday, January 04, 2008 Sheet 15 of 53
5 4 3 2 1
5 4 3 2 1

SSID = N.B

D D

+1.1V_RUN
120mil Width U72F
0.6A per ANT Rev1.1, Page3
L15 A25 VSSAHT1 VSSAPCIE1 A2
+1.1V_RUN
+1.1V_RUN_VDDHT
0.7A per ANT Rev1.1, Page3 D23 VSSAHT2 PART 6/6 VSSAPCIE2 B1
1 2 L14 E22 VSSAHT3 VSSAPCIE3 D3
SC4D7U6D3V3KX-GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
BLM21PG221SN-1GP C275 C284 C301 U72E 300mil Width G22 D5
VSSAHT4 VSSAPCIE4
1

1
220 ohm @ 100MHz,2A C292 J17 A6 +1.1V_RUN_VDDPCIE 1 2 G24 E4
VDDHT_1 VDDPCIE_1 VSSAHT5 VSSAPCIE5

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC4D7U6D3V3KX-GP
K16 PART 5/6 B6 C231 C219 BLM21PG221SN-1GP G25 G1
VDDHT_2 VDDPCIE_2 VSSAHT6 VSSAPCIE6

1
SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
L16 C6 C266 C225 C267 H19 G2
2

2
VDDHT_3 VDDPCIE_3 VSSAHT7 VSSAPCIE7
M16 VDDHT_4 VDDPCIE_4 D6 J22 VSSAHT8 VSSAPCIE8 G4
P16 E6 L17 H7

2
VDDHT_5 VDDPCIE_5 VSSAHT9 VSSAPCIE9
R16 VDDHT_6 VDDPCIE_6 F6 220 ohm @ 100MHz, 2A L22 VSSAHT10 VSSAPCIE10 J4
T16 VDDHT_7 VDDPCIE_7 G7 L24 VSSAHT11 VSSAPCIE11 R7
VDDPCIE_8 H8 L25 VSSAHT12 VSSAPCIE12 L1
+1.1V_RUN H18 J9 M20 L2
VDDHTRX_1 VDDPCIE_9 VSSAHT13 VSSAPCIE13
L9 70mil Width 0.45A per ANT Rev1.1, Page3 G19 VDDHTRX_2 VDDPCIE_10 K9 N22 VSSAHT14 VSSAPCIE14 L4
F20 VDDHTRX_3 VDDPCIE_11 M9 P20 VSSAHT15 VSSAPCIE15 L7
1 2 +1.1V_RUN_VDDHTRX E21 L9 R19 M6
VDDHTRX_4 VDDPCIE_12 VSSAHT16 VSSAPCIE16
SC4D7U6D3V3KX-GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

BLM21PG221SN-1GP C238 C243 C249 D22 P9 7A per ANT Rev1.1, Page3 R22 N4
VDDHTRX_5 VDDPCIE_13 VSSAHT17 VSSAPCIE17
1

220 ohm @ 100MHz,2A C245


C
B23 VDDHTRX_6 VDDPCIE_14 R9 +NB_VCORE R24 VSSAHT18 VSSAPCIE18 P6
C
A23 VDDHTRX_7 VDDPCIE_15 T9 Per check list (Rev 0.02) R25 VSSAHT19 VSSAPCIE19 R1
X01 V9 H20 R2
2

VDDPCIE_16 +1.1V_RUN VSSAHT20 VSSAPCIE20


+1.35V_RUN_LDO
AE25 VDDHTTX_1 VDDPCIE_17 U9 RS780M: 1V ~ 1.1V, check PWR team 300mil Width U22 VSSAHT21 VSSAPCIE21 R4
AD24 VDDHTTX_2 V19 VSSAHT22 VSSAPCIE22 V7
L23

GROUND
AC23 VDDHTTX_3 VDDC_1 K12 W22 VSSAHT23 VSSAPCIE23 U4

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP
1 DY 2 AB22 J14 C296 C299 C290 C278 C305 C263 C288 W24 V8
VDDHTTX_4 VDDC_2 VSSAHT24 VSSAPCIE24

1
BLM21PG221SN-1GP AA21 U16 C304 C291 W25 V6
VDDHTTX_5 VDDC_3 VSSAHT25 VSSAPCIE25
Y20 VDDHTTX_6 VDDC_4 J11 Y21 VSSAHT26 VSSAPCIE26 W1
+1.2V_RUN W19 K15 AD25 W2

2
L24 VDDHTTX_7 VDDC_5 VSSAHT27 VSSAPCIE27
45mil Width V18 VDDHTTX_8 VDDC_6 M12 VSSAPCIE28 W4

POWER
1 2 +1.2V_RUN_VDDHTTX U17 L14 L12 W7
VDDHTTX_9 VDDC_7 VSS11 VSSAPCIE29
SC4D7U6D3V3KX-GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

BLM21PG221SN-1GP C331 C338 C277 C307 T17 L11 M14 W8


VDDHTTX_10 VDDC_8 VSS12 VSSAPCIE30
1

C312 R17 M13 N13 Y6


VDDHTTX_11 VDDC_9 VSS13 VSSAPCIE31
220 ohm @ 100MHz,2A P17 VDDHTTX_12 VDDC_10 M15 P12 VSS14 VSSAPCIE32 AA4
M17 N12 P15 AB5
2

VDDHTTX_13 VDDC_11 VSS15 VSSAPCIE33


VDDC_12 N14 R11 VSS16 VSSAPCIE34 AB1
J10 VDDA18PCIE_1 VDDC_13 P11 R14 VSS17 VSSAPCIE35 AB7
+1.8V_RUN P10 P13 220 ohm @ 100MHz, 2A T12 AC3
VDDA18PCIE_2 VDDC_14 +1.8V_RUN VSS18 VSSAPCIE36
L17 K10 VDDA18PCIE_3 VDDC_15 P14 U14 VSS19 VSSAPCIE37 AC4
20mil Width M10 R12 +1.8V_RUN_MEM U11 AE1
VDDA18PCIE_4 VDDC_16 L25 VSS20 VSSAPCIE38
1 2 +1.8V_RUN_VDDA18PCIE L10 R15 15mil Width U15 AE4
VDDA18PCIE_5 VDDC_17 VSS21 VSSAPCIE39
SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

BLM21PG221SN-1GP C257 C261 C328 C298 W9 T11 1 2 V12 AB2


VDDA18PCIE_6 VDDC_18 VSS22 VSSAPCIE40
1

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC4D7U6D3V3KX-GP
C316 C287 H9 T15 BLM21PG221SN-1GP W11
VDDA18PCIE_7 VDDC_19 VSS23

1
220 ohm @ 100MHz,2A T10 U12 C347 C346 C321 C313 C376 W15
VDDA18PCIE_8 VDDC_20 VSS24
R10 T14 AC12 AE14
2

VDDA18PCIE_9 VDDC_21 VSS25 VSS1


Y9 J16 AA14 D11

2
VDDA18PCIE_10 VDDC_22 VSS26 VSS2
AA9 VDDA18PCIE_11 Y18 VSS27 VSS3 G8
AB9 VDDA18PCIE_12 VDD_MEM1 AE10 AB11 VSS28 VSS4 E14
AD9 VDDA18PCIE_13 VDD_MEM2 AA11 AB15 VSS29 VSS5 E15
B B
AE9 VDDA18PCIE_14 VDD_MEM3 Y11 AB17 VSS30 VSS6 J15
+1.8V_RUN U10 VDDA18PCIE_15 VDD_MEM4 AD10 X01 AB19 VSS31 VSS7 J12
15mil Width VDD_MEM5 AB10
+3.3V_RUN AMD schematic review 11/19. AE20 VSS32 VSS8 K14
F9 VDD18_1 VDD_MEM6 AC10 AB21 VSS33 VSS9 M11
SC1U6D3V2KX-GP

G9 VDD18_2 15mil Width K11 VSS34 VSS10 L15


1

C203 +1.8V_RUN 1 2 +1.8V_RUN_VDD18_MEM AE11 H11


R202 VDD18_MEM1 VDD33_1 +3.3V_RUN_VDD33 RS780M-GP-U1
AD11 VDD18_MEM2 VDD33_2 H12 1 2
SC1U6D3V2KX-GP

0R3-0-U-GP 15mil Width R156


2

SCD1U10V2KX-4GP

C318 RS780M-GP-U1 SCD1U10V2KX-4GP 0R3-0-U-GP


1

C247 1 C282
2

A <Variant Name> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
ATi-RS780M_PWR&GD_(4/4)
Size Document Number Rev
A3 FOOSE-AMD 15.4" SB
Date: Friday, January 04, 2008 Sheet 16 of 53
5 4 3 2 1
5 4 3 2 1

SSID = VIDEO

D D

+PWR_SRC
+INV_PWR_SRC
33,35,49,50 RUN_ON
R113 100KR2J-1-GP

SC10U25V6KX-1GP

SC1KP50V2KX-1GP

SCD1U25V3KX-GP
SC10U25V6KX-1GP
U23 1 2

1
C205
LVDS1 C206 C210 C208 1 D D 6

1
59 2 D D 5
51 61
DY 3 G S 4 1 2

G
2

2
NP1 1

2
SI3457BDV-T1-1GP C194 R114
2 S_PWR_SRC SC1KP50V2KX-1GP 1 2 C_PWR_SRC D S
3 Q30
4 +LCDVDD 2N7002-7F-GP
5 100KR2J-1-GP
52 6
7

1
8 EC9 C224
9 SCD1U10V2KX-4GP SCD1U10V2KX-4GP
10

2
11 PNL_BKLT_CBL_DET#
PNL_BKLT_CBL_DET# 21
12
53 13 LCD_SMBDAT +3.3V_RUN
LCD_SMBDAT 34
14 LCD_SMBCLK
LCD_SMBCLK 34
15
16 BAT1_LED_BLUE_R BAT2_LED_BLUE_R 38

1
C 17 BAT2_LED_AMBER_R Populate R141 for C227 +LCDVDD C
18
BAT1_LED_AMBER_R 38
BREATH_LED_PANEL_B 38 R141 DPST implementation
DY SCD1U10V2KX-4GP
19 10KR2J-3-GP

2
only.
20

1
54 21 R142
LCD_DDCLK 14

1
150R2F-1-GP
22 BACKLITEON 1 2 C226
23
LCD_DDCDAT 14 DY GMCH_BL_ON 14 +3.3V_RUN R134 SC10U6D3V5KX-1GP

2
24 0R2J-2-GP
TXAOUT0+ 14
25 TXAOUT0- 14
26 PopulateR142 for

2
1
27 TXAOUT1- 14 platform without DPST 1 D D 6
28 C209 2 D D 5
TXAOUT1+ 14 support. No Stuff for
55 29 SCD1U10V2KX-4GP 3 G S 4

2
30 TXAOUT2- 14 Discrete DSPT support U24
+3.3V_ALW

FPVCC_CTL2
31 TXAOUT2+ 14 due to back up plan. SI3456BDV-T1-GP
32 R111
33 TXACLK- 14 +15V_ALW 1 2

1
34 TXACLK+ 14 100KR2J-1-GP
35 U19 R115
36 4K7R2J-2-GP
TXBCLK+ 14
37 TXBCLK- 14 1 2 4 3
56 38 C187

2
39 TXBOUT0+ 14 SCD1U25V2ZY-1GP 5 2
40 TXBOUT0- 14
41 1 2 FPVCC_CTL1 6 1
42 TXBOUT2- 14 R145DY 100KR2J-1-GP
43 TXBOUT2+ 14 D18
44 2 Q31 2N7002DW-7F-GP
35 LCD_VCC_TEST_EN
57 45 TXBOUT1- 14 3 OUT FPVCC_CTL3
B FPVCC_CTL4 R1 B
46 TXBOUT1+ 14 3 2
47 IN 1 GND
48 LVDS_CBL_DET# 1 R2
LVDS_CBL_DET# 21 14 LVDS_DIGON
49 DDTC144EUA-7F-GP
LCD_TST 35
NP2 50 +5V_ALW BAT54CW-1-GP
58 62
60
IPEX-CON50-GP
20.F1093.050

A <Variant Name> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
LCD Connector
Size Document Number Rev
A3 FOOSE-AMD 15.4" SB
Date: Friday, January 04, 2008 Sheet 17 of 53
5 4 3 2 1
5 4 3 2 1

+3.3V_RUN

A
D57 X01
SSID = VIDEO
+3.3V_RUN
CRT I/F & CONNECTOR
B0530WS-7-F-GP
The solution of leakage. +5V_RUN +5V_CRT_RUN

1
D30 D28
K

R506 R495 R486 D33

A
BAV99PT-GP-U

BAV99PT-GP-U
+3.3V_RUN_TS3DV520E DY DY DY

1
SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

150R2F-1-GP

150R2F-1-GP

150R2F-1-GP

BAV99PT-GP-U
D34

1
B0530WS-7-F-GP +5V_CRT_RUN
C326 C242 C255 C237 C294 C319 C295 C283

3
1

1
D
DY D

K
D36

2
BAV99PT-GP-U
2

2
RED_CRT L45 1 2 CRT_R

3
BLM18BA220SN1D-GP
GREEN_CRT L44 1 2 CRT_G

1
BLM18BA220SN1D-GP CRT1

1
U28 BLUE_CRT L42 1 2 CRT_B 16 R516

2
4 BLM18BA220SN1D-GP +5V_CRT_RUN R477 NP1 2K2R2F-GP
VCC

1
SC5D6P50V2CN-1GP

SC5D6P50V2CN-1GP

SC5D6P50V2CN-1GP

SC10P50V2JN-4GP

SC10P50V2JN-4GP

SC10P50V2JN-4GP
10 C560 C546 C534 C565 C553 C538 2K2R2F-GP F2 6
VCC DAT_DDC2_CRT FUSE-3A32V-7-GP
18 48 DY DY DY 11

2
VCC 0B1 CLK_DDC2_CRT Layout Note: CRT_R
27 47 1

2
VCC 1B1 CRT_VSYNC_U Place these resistors
38 43 7

1
VCC 2B1

1
50 42 CRT_HSYNC_U close to the CRT-out
VCC 3B1 RED_CRT connector DAT_DDC2_CRT
56 VCC 4B1 37 12
36 GREEN_CRT CRT_G 2
DAT_DDC2_S 2
5B1
32 BLUE_CRT DY D27 8
CLK_DDC2_S A0 6B1 BAV99PT-GP-U HSYNC_BUF
3 A1 7B1 31 13
7 22 X01 3 CRT_B
14 CRT_VSYNC

3
A2 8B1 +5V_CRT_RUN_R
14 CRT_HSYNC 8 23 9
11
A3 9B1 CRT EA solution. 14 VSYNC_BUF
14 VGA_RED A4
14 VGA_GRN 12 A5 4
14 VGA_BLU 14 A6 10
15 CLK_DDC2_CRT 15
A7 DAT_DDC2_DOCK
19 A8 0B2 46 DAT_DDC2_DOCK 37 5
20 45 CLK_DDC2_DOCK NP2
A9 1B2 VSYNC_DOCK CLK_DDC2_DOCK 37
2B2 41 VSYNC_DOCK 37 17
17 40 HSYNC_DOCK
35 CRT_MUX_SWITCH SEL 3B2 HSYNC_DOCK 37
35 RED_DOCK
C 4B2 GREEN_DOCK RED_DOCK 37 VIDEO-15-84-GP-U C
1 GND 5B2 34 GREEN_DOCK 37
CRT_MUX_SWITCH 6 GND 6B2 30 BLUE_DOCK
BLUE_DOCK 37
20.20735.015
9 GND 7B2 29
13 25 +5V_CRT_RUN
GND 8B2
SEL CRT TV 16
21
GND
GND
9B2 26
Hsync & Vsync level shift +5V_CRT_RUN

0 MB Dock 24 GND
28 GND
S-Video I/F & CONNECTOR

1
33 52 C570
GND NC#52
Dock MB 39 5 SCD1U10V2KX-4GP
GND NC#5

1
1 44 54 D31 D29

2
GND NC#54
49 GND NC#51 51
+3.3V_RUN +3.3V_RUN +3.3V_RUN

BAV99PT-GP-U

BAV99PT-GP-U
DY DY

14
53 GND

1
55 57 U56A
GND GND SSAHCT125PWR-GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
CRT_VSYNC_U 2 3

3
TS3DV520E-GP

VSYNC_5

1
14
DY C766

7
X01 4 RN41 C779 C789
2 3 VSYNC_BUF DY DY

2
Remove S-vedio function from DOCK. CRT_HSYNC_U 5 6 HSYNC_5 1 4 HSYNC_BUF

SC8P250V2CC-GP

SC8P250V2CC-GP
U56B SRN0J-6-GP

1
SSAHCT125PWR-GP C543 C544
7

1
X01 D43 D42 D40

BAV99-4-GP

BAV99-4-GP

BAV99-4-GP
TV EA solution.
B
S-Video Connector B

3
S_VIDEO1
8
+3.3V_RUN +3.3V_RUN
1
1 2 TV_LUMA
14 TV_Y
L61 BLM18BB470SN1-GP TV_LUMA 4
CLK_DDC2_S 2
1

SPDIF_D 5
4K7R2J-2-GP

4K7R2J-2-GP

R187 R201 1 2 TV_COMP TV_COMP 7


14 TV_CVBS
L56 BLM18BB470SN1-GP TV_CRMA 6
Q35 1 2 TV_CRMA 3
14 TV_C
L55 BLM18BB470SN1-GP
2

SC10P50V2JN-4GP

SC10P50V2JN-4GP
3 4 9
1

1
150R2F-1-GP

150R2F-1-GP

150R2F-1-GP

SC10P50V2JN-4GP

SC10P50V2JN-4GP

SC10P50V2JN-4GP
S G D

D G S

R640

R630

R624

2 5 MINDIN7-22-GP-U
14 NB_DDCCLK
1

1
C790

C778

C782

C772

C756
22.10021.I81
1 6 DAT_DDC2_S C764
14 NB_DDCDATA
SC10P50V2JN-4GP
2

2
2N7002DW-7F-GP

X01
G.G list 10/06.
A <Variant Name> A

C805
SCD01U16V2KX-3GP R648 Wistron Corporation
1 2 SPDIF_C2 1 2 SPDIF_C3 1 2 SPDIF_D 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
32 SPDIF_OUT Taipei Hsien 221, Taiwan, R.O.C.
1

R653 0R3-0-U-GP 1
220R2F-GP R645 C800 Title
110R2F-GP SC270P50V2JN-2GP
CRT Connector
2

Size Document Number Rev


2

A3 FOOSE-AMD 15.4" SB
Date: Friday, January 04, 2008 Sheet 18 of 53
5 4 3 2 1
5 4 3 2 1

X01
X01
SSID = S.B 0R2J-2-GP
R322
U81A
SB700
14,34,35,50 PLTRST# 1 2 NB_RST# N2 P4 PCI_CLK0_R R336 1 2 49D9R2F-GP
A_RST# PCICLK0 CLK_PCI_DOCK 37
Part 1 of 5 P3 PCI_CLK1_R R319 1 2 49D9R2F-GP
PCICLK1 CLK_PCI_LOM 23,24

PCI CLKS
1 2 ALINK_NBRX_C_SBTX_P0 V23 P1 PCI_CLK2_R R321 1 2 49D9R2F-GP
13 ALINK_NBRX_SBTX_P0 PCIE_TX0P PCICLK2 CLK_PCI_5035 23,34
C386 1 2 SCD1U10V2KX-4GP ALINK_NBRX_C_SBTX_N0 V22 P2 PCI_CLK3_R R331 1 2 49D9R2F-GP
13 ALINK_NBRX_SBTX_N0 PCIE_TX0N PCICLK3 CLK_PCI_5028 23,35
C385 1 2 SCD1U10V2KX-4GP ALINK_NBRX_C_SBTX_P1 V24 T4 PCI_CLK4_R R324 1 2 49D9R2F-GP
13 ALINK_NBRX_SBTX_P1 PCIE_TX1P PCICLK4 CLK_PCI_PCCARD 23,26
C388 1 2 SCD1U10V2KX-4GP ALINK_NBRX_C_SBTX_N1 V25 T3 PCI_CLK5_R R830 1 2 49D9R2F-GP
13 ALINK_NBRX_SBTX_N1 PCIE_TX1N PCICLK5/GPIO41 C_TPM_LCLK 25
C387 1 2 SCD1U10V2KX-4GP ALINK_NBRX_C_SBTX_P2 U25
13 ALINK_NBRX_SBTX_P2 PCIE_TX2P

C459

C462

C458

C461

C463

C950
C383 1 2 SCD1U10V2KX-4GP ALINK_NBRX_C_SBTX_N2 U24
13 ALINK_NBRX_SBTX_N2 PCIE_TX2N
D C384 1 2 SCD1U10V2KX-4GP ALINK_NBRX_C_SBTX_P3 T23 D
13 ALINK_NBRX_SBTX_P3 PCIE_TX3P
C382 1 2 SCD1U10V2KX-4GP ALINK_NBRX_C_SBTX_N3 T22 N1 PCIRST#_SB 1 2 X01
13 ALINK_NBRX_SBTX_N3 PCIE_TX3N PCIRST# PCI_RST# 26,37

1
C381 SCD1U10V2KX-4GP R340

PCI EXPRESS INTERFACE


13 ALINK_NBTX_C_SBRX_P0 U22 33R2J-2-GP
PCIE_RX0P
13 ALINK_NBTX_C_SBRX_N0 U21 U2 PCI_AD0 26

2
PCIE_RX0N AD0
13 ALINK_NBTX_C_SBRX_P1 U19 PCIE_RX1P AD1 P7 PCI_AD1 26 DY DY DY DY DY
13 ALINK_NBTX_C_SBRX_N1 V19 PCIE_RX1N AD2 V4 PCI_AD2 26

SC22P50V2JN-4GP

SC22P50V2JN-4GP

SC22P50V2JN-4GP

SC22P50V2JN-4GP

SC22P50V2JN-4GP

SC12P50V2JN-3GP
13 ALINK_NBTX_C_SBRX_P2 R20 PCIE_RX2P AD3 T1 PCI_AD3 26
13 ALINK_NBTX_C_SBRX_N2 R21 PCIE_RX2N AD4 V3 PCI_AD4 26
13 ALINK_NBTX_C_SBRX_P3 R18 PCIE_RX3P AD5 U1 PCI_AD5 26
13 ALINK_NBTX_C_SBRX_N3 R17 PCIE_RX3N AD6 V1 PCI_AD6 26
+1.2V_RUN +1.2V_RUN_PCIE_PVDD +1.2V_PCIE_VDDR V2
AD7 PCI_AD7 26
R269 1 2 562R2F-GP PCIE_CALRP T25 T2
PCIE_CALRP AD8 PCI_AD8 26
R267 1 2 2K05R2F-GP PCIE_CALRN T24 W1
L31 PCIE_CALRN AD9 PCI_AD9 26
20mil Width AD10 T9 PCI_AD10 26
1 2 P24 PCIE_PVDD 40mA AD11 R6 PCI_AD11 26
BLM21PG221SN-1GP R7
AD12 PCI_AD12 26
1

200 ohm 2A C391


P25 PCIE_PVSS AD13 R5 PCI_AD13 26
AD14 U8 PCI_AD14 26 X01
SC2D2U6D3V3KX-GP Place R <100mils form pins T25,T24 U5 PCI_AD15 26
2

AD15
Y7 Delete RP1 by AMD suggestion.
AD16 PCI_AD16 26
AD17 W8 PCI_AD17 26
X01 AD18 V9 PCI_AD18 26
Y8 PCI_AD19 26
AMD schematic review 11/19. AD19
AA8
AD20 PCI_AD20 26
AD21 Y4 PCI_AD21 26
AD22 Y3 PCI_AD22 26
AD23 Y2 PCI_AD23 23,26
+5V_ALW +3.3V_ALW AA2
C AD24 PCI_AD24 23,26 C
AD25 AB4 PCI_AD25 23,26
6 CLK_PCIE_SB N25 PCIE_RCLKP/NB_LNK_CLKP AD26 AA1 PCI_AD26 23,26
1

6 CLK_PCIE_SB# N24 PCIE_RCLKN/NB_LNK_CLKN AD27 AB3 PCI_AD27 23,26


R679 R691 AB2 +3.3V_RUN
AD28 PCI_AD28 23,26
10KR2J-3-GP 10KR2J-3-GP K23 NB_DISP_CLKP AD29 AC1 PCI_AD29 23,26
K22 AC2 BIO_DET# 1 2 R297
NB_DISP_CLKN AD30 PCI_AD30 23,26

PCI INTERFACE
AD1 100KR2J-1-GP
PCI_AD31 26
2

AD31
CPU_PWRGD_Q 34 M24 NB_HT_CLKP CBE0# W2 PCI_C/BE#0 26
M25 U7 CDD_VDD_ON 1 DY 2 R308
NB_HT_CLKN CBE1# PCI_C/BE#1 26
PU to +1.8V_SUS CPU_PWRGD# AA7 100KR2J-1-GP
CBE2# PCI_C/BE#2 26
P17 Y1 +COIN_CELL
D

CPU_HT_CLKP CBE3# PCI_C/BE#3 26


M18 CPU_HT_CLKN FRAME# AA6 PCI_FRAME# 26
3

R672 W5
DEVSEL# PCI_DEVSEL# 26
CPU_PWRGD 1 2CPU_PWRGD_R 1 NPN M23 SLT_GFX_CLKP IRDY# AA5 PCI_IRDY# 26

1
G M22 SLT_GFX_CLKN TRDY# Y5 PCI_TRDY# 26
1KR2F-3-GP Q79 U6 R534
PCI_PAR 26
2

MMBT3904-7-F-GP Q81 PAR 1MR2F-GP


J19 W6 PCI_STOP# 26
S

2N7002-7F-GP GPP_CLK0P STOP#


J18 GPP_CLK0N PERR# W4 PCI_PERR# 26
V7 PCI_SERR# 26

2
SERR# PCI_REQ0# TP97
L20 AC3 1

G
GPP_CLK1P REQ0#
L19 GPP_CLK1N REQ1# AD4 PCI_REQ1# 26
AB7 PCI_REQ2# 1 TP54
REQ2# RTC_BAT_DET#
Place the translation circuit for CPU_PWRGD close to the M19 GPP_CLK2P REQ3#/GPIO70 AE6 BIO_DET# 38 21 RTC_BAT_DET# D S
KB_DET# TP57

CLOCK GENERATOR
M20 AB6 1
SB700 to minimize stubbs when the circuit is No Stuff. GPP_CLK2N REQ4#/GPIO71

1
AD2 PCI_GNT0# 1 TP98 R548
GNT0# RTC_BAT_DET#_R 1 Q68 R551
N22 AE4 2
P22
GPP_CLK3P GNT1#
AD5 SB700_GNT2# 1 TP52
PCI_GNT1# 26 DY 2N7002-7F-GP 1KR2J-1-GP
GPP_CLK3N GNT2# CDD_VDD_ON 0R2J-2-GP
1
R757
DY 2
20MR3-GP GNT3#/GPIO72 AC6
L18 AE5

2
B 25M_48M_66M_OSC GNT4#/GPIO73 B
CLKRUN# AD6 PM_CLKRUN# 25,26,34,35
2 1 32K_X1 V5 PCI_LOCK# 1 TP49
LOCK#

1
J21 25M_X1
C880 AD3 PCI_PIRQA# R307
SC12P50V2JN-3GP INTE#/GPIO33 PCI_PIRQB# PCI_PIRQA# 26 10KR2J-3-GP DY
X01 AC4
AMD schematic review 11/19.
INTF#/GPIO34
INTG#/GPIO35 AE2 PCI_PIRQC# PCI_PIRQB# 26
PCI_PIRQC# 26 SSID =RBATT
3

J20 AE3 PCI_PIRQD# 1

2
R758 25M_X2 INTH#/GPIO36 TP155
20MR3-GP
G22 LPCCLK0_R R690 1 2 22R2J-2-GP LPCCLK0
LPCCLK0 23 +3.3V_ALW_2
E22 LPCCLK1_R R681 1 2 22R2J-2-GP LPCCLK1 23
2

LPCCLK1
A3 H24 LPC_LAD0 24,25,34,35
2

X7 X1 LAD0
LAD1 H23 LPC_LAD1 24,25,34,35

1
RTC XTAL

X-32D768KHZ-38GPU 0R2J-2-GP J25 +COIN_CELL


LAD2 LPC_LAD2 24,25,34,35
R754 J24 R541
LAD3 LPC_LAD3 24,25,34,35
LPC

2 1 32K_X2 1 2 32K_X2_R B3 H25 +3.3V_RUN 0R2J-2-GP


X2 LFRAME# LPC_LFRAME# 24,25,34,35 D38
LDRQ0# H22 LPC_LDRQ0# 35
C882 +1.8V_RUN AB8 R298 BAT54CW-1-GP
LPC_LDRQ1# 35

2
SC12P50V2JN-3GP R659 LDRQ1#/GNT5#/GPIO68 SB700_GPIO65 +3.3V_ALW_2_R RTC1
BMREQ#/REQ5#/GPIO65 AD7 1 2 1
1 2 V15 8K2R2J-3-GP 5
SERIRQ IRQ_SERIRQ 24,25,26,34,35
300R2J-4-GP 3 RTC_BAT_DET#_R 3
9,14 ALLOW_LDTSTOP F23 49K9R2F-L-GP +RTC_CELL 2
ALLOW_LDTSTP RTCCLK 23 R537
9 CPU_PROCHOT# F24 C3 R765 2VBAT_R 1 2 VBAT
PROCHOT# RTCCLK

SCD1U16V2KX-3GP
F22 C2 INTRUDER_ALERT# 1 2 1
9 CPU_PWRGD LDT_PG INTRUDER_ALERT# +VBAT_IN DY 390R2J-1-GP
CPU

9 CPU_LDT_STOP# G25 LDT_STP# VBAT B2 1 2 4

1
RTC

9 CPU_LDT_RST# G24 EC17


LDT_RST# R770 EC16 MLX-CON3-9-GP
X01
1

1
SC1U6D3V2KX-GP

SCD1U16V2KX-3GP
C898 C897 510R2J-1-GP SC100P50V2JN-3GP 20.D0198.103

2
A SB700-1-GP-U <Variant Name> A
2

2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
ATi-SB700_PCIE&PCI_(1/5)
Size Document Number Rev
A3 FOOSE-AMD 15.4" SB
Date: Friday, January 04, 2008 Sheet 19 of 53
5 4 3 2 1
5 4 3 2 1

SSID = S.B U81D

SB700 Part 4 of 5
35 SB_PME# E1 PCI_PME#/GEVENT4#
E2 C8 CLK48_USB
+3.3V_RUN 35 SIO_EXT_WAKE# RI#/EXTEVNT0# USBCLK/14M_25M_48M_OSC CLK48_USB 6
1 SB700_SLPS2 H7 R755
TP45 SLP_S2/GPM9#
F5 G8 USB_PCOMP 1 2 10R2F-L-GP
35 SIO_SLP_S3# SLP_S3# USB_RCOMP
SUS_STAT# R284 CLK48_USB_R2

USB MISC
1 2 G1 1 2 1 DY2
R316 4K7R2J-2-GP
34 SIO_SLP_S5#
SIO_PWRBTN#_R SLP_S5# 11K8R2F-GP DY C888

ACPI / WAKE UP EVENTS


34 SIO_PWRBTN# 1 2 H2 PWR_BTN#
DY SHUTDOWN#/GPIO5 R753 SC10P50V2JN-4GP
1
R271
2
10KR2J-3-GP 0R2J-2-GP
50 SB_PWRGD H1 PWR_GOOD 1%
D
ODD_DET#
14 SUS_STAT#
SB_TEST2
K3 SUS_STAT# Place these close SB700 D
1 2 H5 TEST2 USB_FSD13P E6
R379 100KR2J-1-GP SB_TEST1 H4 E7 Place R near pin14. Route it with 10mils
SB_TEST0 TEST1 USB_FSD13N
X01 H3 TEST0 Trace width and 25mils spacing to any
+3.3V_ALW_R 34 SIO_A20GATE Y15 F7

USB 1.1
SMSC suggest to PU. 34 SIO_RCIN# W15
GA20IN/GEVENT0# USB_FSD12P
E8 signals in X, Y, Z directions.
KBRST#/GEVENT1# USB_FSD12N
34 SIO_EXT_SCI# K4 LPC_PME#/GEVENT3#
1 DY 2 SB_TEST2 SDMK0340L-7-F-GP 1 SB700_EXTEVNT1# K24 H11 USBP11- 24
TP92 LPC_SMI#/EXTEVNT1# USB_HSD11P
R344 2K2R2F-GP D50
SB_TEST1 SYS_RESET#
F1 S3_STATE/GEVENT5# USB_HSD11N J10 USBP11+ 24 -----> LOM BCM5761E
1
R760
DY 2K2R2F-GP
2 35 HDT_RESET# K A J2 SYS_RESET#/GPM7#
35 SB_PCIE_WAKE# H6 WAKE#/GEVENT8# USB_HSD10P E11 USBP10+ 38
DY SB_TEST0
1
R790
2
2K2R2F-GP
34 SIO_EXT_SMI#
R328 1 2 0R2J-2-GP SMB_ALERT#
F2 BLINK/GPM6# USB_HSD10N F11 USBP10- 38 ----->Biometric
SIO_EXT_SMI#
39 THERMTRIP1# DY J6 SMBALERT#/THRMTRIP#/GEVENT2#
1 2 14 SB_TO_NB_PWRGD W14 NB_PWRGD USB_HSD9P A11 USBP9+ 37
R785 10KR2J-3-GP
USB_HSD9N B11 USBP9- 37 ----->Dock_2
1 2 SIO_EXT_SCI# 34 SB_RSMRST# 1 2 SB_RSMRST#_R D3
R367 10KR2J-3-GP R332 1 RSMRST#
2 0R2J-2-GP USB_HSD8P C10 USBP8+ 37
1 DY 2 SB_PME# C378 DY SCD1U10V2KX-4GP USB_HSD8N D10 USBP8- 37 ----->Dock_1
R325 10KR2J-3-GP
1 DY 2 SIO_EXT_WAKE# TP95 1 SB700_GPIO10 AE18 G11 USBP7+ 26
SATA_IS0#/GPIO10 USB_HSD7P
R787 10KR2J-3-GP Datasheet P.39:open drain +3.3V TP96 1 SB700_GPIO6 AD18 CLK_REQ3#/SATA_IS1#/GPIO6 USB_HSD7N H12 USBP7- 26 ----->1394
1 DY 2 SB_PCIE_WAKE# TP40 1 SB700_GPIO4 AA19
R791 10KR2J-3-GP TP38 SB700_GPIO0 SMARTVOLT/SATA_IS2#/GPIO4
1 W17 CLK_REQ0#/SATA_IS3#/GPIO0 USB_HSD6P E12 USBP6+ 1 TP44
1 DY 2 SMB_ALERT# TP41 1 SB700_GPIO39 V17 CLK_REQ1#/SATA_IS4#/FANOUT3/GPIO39 USB_HSD6N E14 USBP6- 1 TP43 ----->Reversed
R327 10KR2J-3-GP TP39 1 SB700_GPIO40 W20
SATA_DET# CLK_REQ2#/SATA_IS5#/FANIN3/GPIO40
1 DY 2 32 SB_SPKR W21 SPKR/GPIO2 USB_HSD5P C12 USBP5+ 31
----->MINI CARD 2 WWAN

USB 2.0
R326 10KR2J-3-GP 11,12 MEM_SCLK AA18 D12 USBP5- 31
SCL0/GPOC0# USB_HSD5N
11,12 MEM_SDATA W18 SDA0/GPOC1#
LOM_SBCLK_R K1 B12 USBP4+ 31
SCL1/GPOC2# USB_HSD4P
C
+3.3V_SUS
LOM_SBDATA_R K2 SDA1/GPOC3# USB_HSD4N A12 USBP4- 31 ----->MINI CARD 1 WLAN C

GPIO
31 PCIE_WLAN_DET# AA20 DDC1_SCL/GPIO9
31 PCIE_WWAN_DET# Y18 DDC1_SDA/GPIO8 USB_HSD3P G12 USBP3+ 40
1 DY 2R750 DELL_ESATA_USB_OC# SATA_DET# C1 LLB#/GPIO66 USB_HSD3N G14 USBP3- 40 ----->USE4/Right Side Bottom
10KR2J-3-GP SHUTDOWN#/GPIO5
2R329 USB_OC#0_1 TP53 SB700_GEVENT7#
Y19 SHUTDOWN#/GPIO5 USB_OC#2_3
1 DY 10KR2J-3-GP
1 G5 DDR3_RST#/GEVENT7# USB_HSD2P H14 USBP2+ 40
2R752 USB_OC#2_3 USB_HSD2N H15 USBP2- 40 ----->USE3/Right Side Top
1 DY 10KR2J-3-GP
USB_HSD1P A13 USBP1+ 30

X01
USB_HSD1N B13 USBP1- 30 -----> USB2/Left Side Bottom
B14
USB_OC#0_1
USB_HSD0P USBP0+ 30
TP149 1
DELL_ESATA_USB_OC#
B9
B8
USB_OC6#/IR_TX1/GEVENT6# USB_HSD0N A14 USBP0- 30 -----> USB1/Left Side TOP
TP158 USB_OC5#/IR_TX0/GPM5#
1 A8 USB_OC4#/IR_RX0/GPM4# IMC_GPIO8 A18

USB OC
TP159 1 A9 B18
TP160 USB_OC3#/IR_RX1/GPM3# IMC_GPIO9
1 E5 USB_OC2#/GPM2# IMC_PWM0/IMC_GPIO10 F21
Close to SB700R346 33R2J-2-GP
40 USB_OC#2_3 F8 USB_OC1#/GPM1# SCL2/IMC_GPIO11 D21
32 SB_AZ_CODEC_BITCLK 1 2 30 USB_OC#0_1 E4 USB_OC0#/GPM0# SDA2/IMC_GPIO12 F19
R357 1 2 33R2J-2-GP E20
29 SB_AZ_MDC_BITCLK R345 33R2J-2-GP SB_AZ_BITCLK SCL3_LV/IMC_GPIO13
32 SB_AZ_CODEC_SDOUT 1 2 M1 AZ_BITCLK SDA3_LV/IMC_GPIO14 E21
R348 1 2 33R2J-2-GP SB_AZ_SDOUT M2 E19
29 SB_AZ_MDC_SDOUT SB_AZ_CODEC_SDIN0 AZ_SDOUT IMC_PWM1/IMC_GPIO15
32 SB_AZ_CODEC_SDIN0 J7 AZ_SDIN0/GPIO42 IMC_PWM2/IMC_GPO16 D19 SB_GPO16 23
29 SB_AZ_MDC_SDIN1 SB_AZ_MDC_SDIN1 J8 E18 SB_GPO17 23
AZ_SDIN1/GPIO43 IMC_PWM3/IMC_GPO17

HD AUDIO
29 ODD_DET# L8 AZ_SDIN2/GPIO44
M3 AZ_SDIN3/GPIO46 IMC_GPIO18 G20
R363 33R2J-2-GP SB_AZ_SYNC
32 SB_AZ_CODEC_SYNC
R362
1
1
2
2 33R2J-2-GP SB_AZ_RST#
L6
M4
AZ_SYNC IMC_GPIO19 G21
D25
Strap Pin / define to use LPC or SPI ROM
29 SB_AZ_MDC_SYNC R355 33R2J-2-GP AZ_RST# IMC_GPIO20
1 2 1SB700_GPM8# L5 D24

INTEGRATED uC
B 32 SB_AZ_CODEC_RST# AZ_DOCK_RST#/GPM8# IMC_GPIO21 B
29 SB_AZ_MDC_RST# R304 1 2 33R2J-2-GP C25
TP51 IMC_GPIO22
X01 IMC_GPIO23 C24
1 C467

1 C472

1 C465

1 C469

1 C471

1 C460

1 C470

1 C444

SB_AZ_RST# 23 B25
G.G. list 10/24. IMC_GPIO24
C23
IMC_GPIO25
TO STRAPS
IMC_GPIO26 B24
DY DY DY DY DY DY DY DY IMC_GPIO27 B23
A23
SC22P50V2JN-4GP2

SC22P50V2JN-4GP2

SC22P50V2JN-4GP2

SC22P50V2JN-4GP2

SC22P50V2JN-4GP2

SC22P50V2JN-4GP2

SC22P50V2JN-4GP2

SC22P50V2JN-4GP2

+1.8V_RUN IMC_GPIO28
IMC_GPIO29 C22
IMC_GPIO30 A22
10KR2J-3-GP

IMC_GPIO31 B22
1

IMC_GPIO32 B21
IMC_GPIO33 A21
R658 TP69 1SB700_IMC_GPIO0 H19 D20
TP144 IMC_GPIO0 IMC_GPIO34
1SB700_IMC_GPIO1 H20 C20

INTEGRATED uC
TP67 IMC_GPIO1 IMC_GPIO35
1SB_SPI_CS1# H21 A20
2

IDE_RST# SPI_CS2#/IMC_GPIO2 IMC_GPIO36


F25 IDE_RST#/F_RST#/IMC_GPO3 IMC_GPIO37 B20
IMC_GPIO38 B19
TP145 1SB700_IMC_GPIO4 D22 A19
TP146 IMC_GPIO4 IMC_GPIO39
1SB700_IMC_GPIO5 E24 IMC_GPIO5 IMC_GPIO40 D18
TP147 1SB700_IMC_GPIO6 E25 C18
TP148 IMC_GPIO6 IMC_GPIO41
1SB700_IMC_GPIO7 D23 IMC_GPIO7
+3.3V_ALW_R
+3.3V_ALW_R
X01
SB700-1-GP-U
1

R384 R334
A
2K2R2F-GP 2K2R2F-GP <Variant Name> A
U43
2

LOM_SBCLK LOM_SBCLK_R
24 LOM_SBCLK 6 1
Wistron Corporation
5 2 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LOM_SBDATA_R 4 3 LOM_SBDATA LOM_SBDATA 24
Title

2N7002DW-7F-GP ATi-SB700_USB&GPIO_(2/5)
Size Document Number Rev
A3 FOOSE-AMD 15.4" SB
Date: Friday, January 04, 2008 Sheet 20 of 53
5 4 3 2 1
5 4 3 2 1

+3.3V_RUN

PLACE SATA AC DECOUPLING


SSID = S.B CAPS CLOSE TO SB700 LVDS_CBL_DET# 1 2
U81B R305 10KR2J-3-GP
X01 X01
29 SATA_TX0+_R AD9
SB700 AA24 1 FAN1_DET# 1 2
SATA_TX0P IDE_IORDY TP117
29 SATA_TX0-_R AE9 Part 2 of 5 AA25 1 TP118 R295 10KR2J-3-GP
SATA_TX0N IDE_IRQ
SATA HDD IDE_A0 Y22 1 TP119
29 SATA_RX0- AB10 SATA_RX0N IDE_A1 AB23 1 TP120
D 29 SATA_RX0+ AC10 Y23 1 TP121 PNL_BKLT_CBL_DET# 1 2 D
SATA_RX0P IDE_A2 R747 10KR2J-3-GP
IDE_DACK# AB24 1 TP126
29 SATA_TX1+_R AE10 SATA_TX1P IDE_DRQ AD25 1 TP124
29 SATA_TX1-_R AD10 SATA_TX1N IDE_IOR# AC25 1 TP125
SATA ODD AC24 1 TP122 SPEAKER_DET# 1 2
IDE_IOW# R628 100KR2J-1-GP
29 SATA_RX1- AD11 SATA_RX1N IDE_CS1# Y25 1 TP123
29 SATA_RX1+ AE11 SATA_RX1P IDE_CS3# Y24 1 TP142
AB12 AD24 1 TP131 RTC_BAT_DET# 1 2
SATA_TX2P IDE_D0/GPIO15 R539 100KR2J-1-GP
AC12 SATA_TX2N IDE_D1/GPIO16 AD23 1 TP129
IDE_D2/GPIO17 AE22 1 TP130

ATA 66/100/133
AE12 SATA_RX2N IDE_D3/GPIO18 AC22 1 TP127
0R2J-2-GP AD12 AD21 1 TP128
R721 SATA_RX2P IDE_D4/GPIO19
IDE_D5/GPIO20 AE20 1 TP136
37 SATA_TX3+_R 1 2 SATA_TX3+ AD13 AB20 1 TP134
SATA_TX3P IDE_D6/GPIO21 +3.3V_ALW_R

SERIAL ATA
37 SATA_TX3-_R 1 2 SATA_TX3- AE13 AD19 1 TP135
R717 0R2J-2-GP SATA_TX3N IDE_D7/GPIO22
Dock eSATA IDE_D8/GPIO23 AE19 1 TP132
37 SATA_RX3- AB14 SATA_RX3N IDE_D9/GPIO24 AC20 1 TP133

1
37 SATA_RX3+ AC14 SATA_RX3P IDE_D10/GPIO25 AD20 1 TP141
AE21 1 TP139 R361
IDE_D11/GPIO26
AE14 SATA_TX4P IDE_D12/GPIO27 AB22 1 TP140 10KR2J-3-GP
AD14 AD22 1 TP137
SATA_TX4N IDE_D13/GPIO28
AE23 1 TP138 B_TPM

2
IDE_D14/GPIO29 China BCM TPM_ID
AD15 SATA_RX4N IDE_D15/GPIO30 AC23 1 TP143
AE15 TPM_ID 0 1
SATA_RX4P

1
AB16 R365
C426 SATA_TX5P
AC16 SATA_TX5N 10KR2J-3-GP
SC12P50V2JN-3GP G6 SB_SPI_DIN
C 2 1 AE16
SPI_DI/GPIO12
D2 SB_SPI_DO C_TPM C

2
1KR2F-3-GP SATA_RX5N SPI_DO/GPIO11 SB_SPI_CLK
AD16 SATA_RX5P SPI_CLK/GPIO47 D1
1

R277 F4 SB700_GPIO31 1 TP56


SPI_HOLD#/GPIO31

SPI ROM
X4 R282 1 2 SATA_CAL V12 F3 SB_SPI_CS0#
XTAL-25MHZ-107-GP 1MR2F-GP SATA_CAL SPI_CS#/GPIO32
SATA_X1 Y12 U15 SB700_GPIO13 1 TP42
2

R279 SATA_X1 LAN_RST#/GPIO13 TPM_ID +3.3V_ALW_R


J1
2

SATA_X2_R ROM_RST#/GPIO14
2 1 1 20R2J-2-GP SATA_X2 AA12 SATA_X2
M8 SB700_GPIO3 1 TP47 R732
C411 FANOUT0/GPIO3 FAN1_DET# SP_DET#
38 SATA_LED# W11 SATA_ACT#/GPIO67 FANOUT1/GPIO48 M5 FAN1_DET# 39 1 2
SC12P50V2JN-3GP M7 USB_WWAN_DET# USB_WWAN_DET# 31 10KR2J-3-GP
FANOUT2/GPIO49
+1.2V_RUN +1.2V_PLLVDD_SATA AA11 77mA P5 R728
L37 PLLVDD_SATA FANIN0/GPIO50

SATA PWR
P8 USB_WLAN_DET# USB_WLAN_DET# 31 LED_BD_DET# 1 2
FANIN1/GPIO51 PCIE_WPAN_DET# TP48 10KR2J-3-GP
1 2 W12 XTLVDD_SATA FANIN2/GPIO52 R8 1
20mil Width BLM15AG221SN-GP 1mA
1

C414 C6 R103
SC2D2U6D3V3KX-GP TEMP_COMM USB_WPAN_DET# TP46 HDD_DET#
TEMPIN0/GPIO61 B6 1 1 2
A6 SPEAKER_DET# 33
2

TEMPIN1/GPIO62 100KR2J-1-GP
X01 A5 RTC_BAT_DET# 19

HW MONITOR
TEMPIN2/GPIO63 TALERT# TP55
B5 1
AMD schematic review 11/19. TEMPIN3/TALERT#/GPIO64
X01
A4 SP_DET# SP_DET# 30
VIN0/GPIO53
B4 LED_BD_DET# LED_BD_DET# 38
G.G. list 10/24.
+3.3V_RUN +3.3V_XTLVDD_SATA VIN1/GPIO54 HDD_DET#
VIN2/GPIO55 C4 HDD_DET# 29
L35 VIN3/GPIO56 D4
D5 LFB_ID0
LVDS_CBL_DET# 17 LFB_ID0 to LFB_ID2 got internal PU to S5.
VIN4/GPIO57 LFB_ID1
1 2 VIN5/GPIO58 D6
20mil Width BLM15AG221SN-GP A7 LFB_ID2 +3.3V_ALW_R
VIN6/GPIO59
1

B C407 B
VIN7/GPIO60 B7 PNL_BKLT_CBL_DET# 17
SC1U6D3V2KX-GP
+3.3V_AVDD_HWM +3.3V_ALW_R R303 1 2 10KR2J-3-GP
L38 DY
2

5mA AVDD F6 1 2 R314 1 10KR2J-3-GP


SAM 2

SC2D2U6D3V3KX-GP
SCD1U10V2KX-4GP
G7 HWM_AGND C430 BLM15AG221SN-GP R300 1 10KR2J-3-GP
AVSS QIM 2

1
C432

SB700-1-GP-U LFB_ID0 R299 1 10KR2J-3-GP


SAM 2

2
LFB_ID1 R309 1 10KR2J-3-GP
X01 QIM 2
LFB_ID2 R738 1 2 10KR2J-3-GP
G.G. list 11/07. Layout connect to Cap then GND

Local Frame Buffer Strapping List


+3.3V_ALW_R
Copy from Becks.
LFB_ID2 LFB_ID1 LFB_ID0 Vendor Part Number
Hynix 0 0 0 HY5PS121621CFP-25
1

C850
R716 R711 R704 SCD1U10V2KX-4GP Main Qimonda 0 0 1 HYB18T512161B2F-25
1KR2F-3-GP 10KR2J-3-GP 10KR2J-3-GP
2nd Samsung 0 1 0 K4N51163QE-ZC25
2

A
SPI3 <Variant Name> A
2

SB_SPI_CS0# 1 8 X01
SB_SPI_DIN SB_SPI_DIN_R CS# VCC SB_HOLD#0
SB_SPI_WP#0
1
R722
2
15R2J-GP
2
3
DO
WP#
HOLD#
CLK
7
6 SB_SPI_CLK_R R700 1 2 33R2J-2-GP SB_SPI_CLK Wistron Corporation
4 5 SB_SPI_DO_R R705 1 2 15R2J-GP SB_SPI_DO 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
GND DIO Taipei Hsien 221, Taiwan, R.O.C.

W25X16VSSIG-GP Title
ATi-SB700_SATA-IDE_(3/5)
Size Document Number Rev
A3 FOOSE-AMD 15.4" SB
Date: Friday, January 04, 2008 Sheet 21 of 53
5 4 3 2 1
5 4 3 2 1

+1.2V_RUN
X01
U81C +1.2V_RUN_VDD
SSID = S.B L9 VDDQ_1
SB700
VDD_1 L15 1
L67
2
U81E

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC10U6D3V3MX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
Part 3 of 5 BLM21PG221SN-1GP Part 5 of 5
M9 VDDQ_2 VDD_2 M12 SB700

1
T15 604mA M14 C392 C390 C857 C858 C417 220 ohm @ 100MHz, 2A A2
+3.3V_RUN VDDQ_3 VDD_3 VSS_1
U9 VDDQ_4
71mA VDD_4 N13 VSS_2 A25

CORE S0
U16 P12 B1

2
VDDQ_5 VDD_5 VSS_3

SC22U6D3V5MX-2GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

PCI/GPIO I/O
U17
V8
VDDQ_6 VDD_6 P14
R11
A11:WORK AROUNT T10
VSS_4 D7
F20
VDDQ_7 VDD_7 AVSS_SATA_1 VSS_5

1
TC5 C442 C428 C395 W7 VDDQ_8 VDD_8 R15 A12:Change back U10 AVSS_SATA_2 VSS_6 G19
Y6 VDDQ_9 VDD_9 T16 U11 AVSS_SATA_3 VSS_7 H8
AA4 X01 U12 K9

2
VDDQ_10 AVSS_SATA_4 VSS_8
D X01 AB5 VDDQ_11 AMD schematic review 11/19. V11 AVSS_SATA_5 VSS_9 K11 D
AB21 V14 K16
AMD schematic review 11/19. VDDQ_12
W9
AVSS_SATA_6 VSS_10
L4
AVSS_SATA_7 VSS_11
Y9 AVSS_SATA_8 VSS_12 L7
+3.3V_RUN +1.2V_RUN_CKVDD +1.2V_RUN Y11 L10
L29 AVSS_SATA_9 VSS_13
Use Flash I/O:+1.8V / IDE:+3.3V Y14 AVSS_SATA_10 VSS_14 L11
Y20 VDD33_18_1 CKVDD_1.2V_1 L21 1 2 Y17 AVSS_SATA_11 VSS_15 L12

SC1U6D3V2KX-GP

SC10U6D3V3MX-GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC1U6D3V2KX-GP
AA21 L22 BLM21PG221SN-1GP AA9 L14
VDD33_18_2 CKVDD_1.2V_2 AVSS_SATA_12 VSS_16

1
IDE/FLSH I/O
C957 C367 C371 C854 C370

CLKGEN I/O
AA22 VDD33_18_3 CKVDD_1.2V_3 L24 AB9 AVSS_SATA_13 VSS_17 L16
DY AE25 VDD33_18_4 CKVDD_1.2V_4 L25 AB11 AVSS_SATA_14 VSS_18 M6
X01 AB13 M10

2
AVSS_SATA_15 VSS_19
71mA 286mA AB15 M11
Change to I=2A. AB17
AVSS_SATA_16 VSS_20
M13
AVSS_SATA_17 VSS_21
AC8 AVSS_SATA_18 VSS_22 M15
AD8 AVSS_SATA_19 VSS_23 N4
X01 AE8 AVSS_SATA_20 VSS_24 N12
N14
+1.2V_RUN +1.2V_PCIE_VDDR AMD schematic review 11/19. POWER X01
VSS_25
VSS_26 P6
+3.3V_ALW_R P9
L30 AMD schematic review 11/19. VSS_27
50mil Width VSS_28 P10
SC4D7U6D3V3KX-GP

1 2 P18 PCIE_VDDR_1 A15 AVSS_USB_1 VSS_29 P11


SC1U6D3V2KX-GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
BLM21PG221SN-1GP P19 B15 P13
PCIE_VDDR_2 AVSS_USB_2 VSS_30
1

1
C402 C379 C377 P20 16mA C14 P15

A-LINK I/O
PCIE_VDDR_3 AVSS_USB_3 VSS_31

1
220 ohm 2A C393 P21 A17 D8 R1
PCIE_VDDR_4 S5_3.3V_1 C394 C396 AVSS_USB_4 VSS_32
R22 A24 D9 R2
2

2
PCIE_VDDR_5 S5_3.3V_2 SC2D2U6D3V3KX-GP SC2D2U6D3V3KX-GP AVSS_USB_5 VSS_33
R24 B17 D11 R4

2
PCIE_VDDR_6 S5_3.3V_3 AVSS_USB_6 VSS_34
R25 J4 D13 R9

3.3V_S5 I/O
PCIE_VDDR_7 S5_3.3V_4 AVSS_USB_7 VSS_35

GROUND
S5_3.3V_5 J5 D14 AVSS_USB_8 VSS_36 R10
844mA L1 +1.2V_ALW_SUS_R +1.2V_ALW_SUS D15 R12
C S5_3.3V_6 L39 AVSS_USB_9 VSS_37 C
+1.2V_RUN +1.2V_AVDD_SATA S5_3.3V_7 L2 20mil Width E15 AVSS_USB_10 VSS_38 R14

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
L33 50mil Width 1 2
BLM15AG221SN-GP
F12 AVSS_USB_11 VSS_39 T11
F14 AVSS_USB_12 VSS_40 T12

1
1 2 AA14 C447 C445 220 ohm @ 100MHz, 300mA G9 T14
BLM21PG221SN-1GP AVDD_SATA_1 AVSS_USB_13 VSS_41
AB18 AVDD_SATA_4 H9 AVSS_USB_14 VSS_42 U4
SC22U6D3V5MX-2GP

AA15 101mA H17 U14

2
AVDD_SATA_2 AVSS_USB_15 VSS_43

SATA I/O
SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

AA17 AVDD_SATA_3 S5_1.2V_1 G2 J9 AVSS_USB_16 VSS_44 V6


1

CORE S5
50mil Width C404 C401 C406 C400 C399 AC18 G4 J11 Y21
AVDD_SATA_5 S5_1.2V_2 AVSS_USB_17 VSS_45
AD17 AVDD_SATA_6 J12 AVSS_USB_18 VSS_46 AB1
AE17 +1.2V_SUS J14 AB19
2

AVDD_SATA_7 AVSS_USB_19 VSS_47


J15 AVSS_USB_20 VSS_48 AB25

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC10U6D3V3MX-GP
367mA USB_PHY_1.2V_1 A10 K10 AVSS_USB_21 VSS_49 AE1
USB_PHY_1.2V_2 B10 K12 AVSS_USB_22 VSS_50 AE24

1
C419 C420 C425 K14 AVSS_USB_23
Use Plane Shape for +3.3V_AVDD_USB 113mA X01 K15 AVSS_USB_24
P23

2
AMD schematic review 11/19. PCIE_CK_VSS_9
R16
+3.3V_SUS +3.3V_AVDD_USB +5V_RUN PCIE_CK_VSS_10
L66 AVDDTX:330mA PCIE_CK_VSS_11 R19
AVDDRT:209mA 4mA R333 T17
+5V_VREF1 PCIE_CK_VSS_12
1 2 A16 AVDDTX_0 V5_VREF AE7 2 1 PCIE_CK_VSS_13 U18
BLM21PG221SN-1GP B16 H18 U20
AVDDTX_1 1KR2J-1-GP PCIE_CK_VSS_1 PCIE_CK_VSS_14
C16 AVDDTX_2
7mA AVDDCK_3.3V J16 +3.3V_AVDDCK J17 PCIE_CK_VSS_2 PCIE_CK_VSS_15 V18
50mil Width D16 AVDDTX_3 J22 PCIE_CK_VSS_3 PCIE_CK_VSS_16 V20
1

+3.3V_ALW_R +3.3V_RUN
SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC1U10V3KX-3GP
C852 C952 C848 C847 D17 44mA K17 +1.2V_AVDDCK L32 K25 V21
AVDDTX_4 AVDDCK_1.2V PCIE_CK_VSS_4 PCIE_CK_VSS_17

1
PLL
SC1U10V3KX-3GP

SC1U10V3KX-3GP

E17 AVDDTX_5 M16 PCIE_CK_VSS_5 PCIE_CK_VSS_18 W19


+3.3V_ALW_R_AVDDC C415
USB I/O

F15 E9 1 2 K A M17 W22


2

AVDDRX_0 AVDDC D22 PCIE_CK_VSS_6 PCIE_CK_VSS_19


F17 M21 W24

2
AVDDRX_1 SDMK0340L-7-F-GP PCIE_CK_VSS_7 PCIE_CK_VSS_20
F18 AVDDRX_2
16mA BLM15AG221SN-GP P16 PCIE_CK_VSS_8 PCIE_CK_VSS_21 W25

SCD1U10V2KX-4GP

SC2D2U6D3V3KX-GP
G15 AVDDRX_3

1
B C405 C410 B
G17 AVDDRX_4 F9 AVSSC AVSSCK L17
G18 AVDDRX_5

2
X01 SB700-1-GP-U
SB700-1-GP-U
AMD schematic review 11/19.

+3.3V_ALW_2 +3.3V_RUN +3.3V_AVDDCK


L36
1 2
1 DY R302
2 SB_ALW_ON_3V# +3.3V_SUS +3.3V_ALW_R

1
100KR2J-1-GP 0R5J-5-GP BLM15AG221SN-GP C408
D G S R159 50mil Width SC2D2U6D3V3KX-GP
+3.3V_ALW 1 2 20mil Width

2
6

Design current: 682mA


Q47 +15V_ALW U39 +3.3V_ALW_SB

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC22U6D3V5MX-2GP
2N7002DW-7F-GP 1 D D 6 0R5J-5-GP C449 C456 C240 C443

1
2 D DY D 5 R275 C236 +1.2V_RUN +1.2V_AVDDCK
DY L34
1

3 G S 4 1 DY 2
R287 1 2
1

2
1
SC10U6D3V5KX-1GP

S G D 100KR2J-1-GP SI3456BDV-T1-GP
DY
1

1
4.5A R273 BLM15AG221SN-GP C409
DY C412 DY 20KR2J-L2-GP SC2D2U6D3V3KX-GP
2

20mil Width
2

2
SB_ALW_ENABLE
34 SB_ALW_ON
2
1

A A
1

R288 C416
100KR2J-1-GP
DY DY SC4700P50V2KX-1GP
Wistron Corporation
2
2

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

Title
ATi-SB700_POWER&GND_(4/5)
Size Document Number Rev
A3 FOOSE-AMD 15.4" SB
Date: Friday, January 04, 2008 Sheet 22 of 53
5 4 3 2 1
5 4 3 2 1

SSID = S.B

REQUIRED STRAPS
D
+3.3V_RUN
+3.3V_ALW_R
DEBUG STRAPS D

+3.3V_RUN
1 R323

1 R710

1 R697

1 R354

1 R312

1 R692

1 R688

1 R320

1 R318

1 R338

1 R387

1 R405

1 R390

1 R383

1 R382

1 R378

1 R377

1 R369
X01
DY DY DY DY DY DY DY DY DY From document PA_SB700AD2.
2

2
10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP
DY DY DY DY DY DY DY DY

2
10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP
CLK_PCI_5035 19,34
CLK_PCI_5028 19,35
CLK_PCI_LOM 19,24
LPCCLK0 19
LPCCLK1 19 PCI_AD23 19,26
RTCCLK 19 PCI_AD24 19,26
SB_AZ_RST# 20 PCI_AD25 19,26
SB_GPO16 20 PCI_AD26 19,26
C C
SB_GPO17 20 PCI_AD27 19,26
CLK_PCI_PCCARD 19,26 PCI_AD28 19,26
PCI_AD29 19,26
PCI_AD30 19,26
1 R341

1 R709

1 R708

1 R353

1 R310

1 R684

1 R689

1 R337

1 R335

1 R339

1 R389

1 R398

1 R391

1 R385

1 R380

1 R374

1 R376

1 R375
X01
DY DY DY DY From document PA_SB700AD2. DY DY DY DY DY DY DY DY
2

2
10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

2K2R2F-GP

2K2R2F-GP

2K2R2F-GP

2K2R2F-GP

2K2R2F-GP

2K2R2F-GP

2K2R2F-GP

2K2R2F-GP
X00:Pull-low
X01:Pull-low
REQUIRED SYSTEM STRAPS From document PA_SB700AD2

B
CLK_PCI_LOM PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23 PCI_AD30 B
CLK_PCI_5035 CLK_PCI_5028 CLK_PCI_PCCARD LPCCLK0 LPCCLK1 RTCCLK AZ_RST# SB_GPO17 , SBGPO16 PCI_AD29
ROM TYPE: USE USE PCI USE ACPI USE IDE USE DEFAULT
PULL WatchDOG USE IMC CLKGEN INTERNAL ENABLE PCI PULL LONG PLL BCLK PLL PCIE STRAPS Reserved
HIGH (NB_PWRGD) DEBUG ENABLED ENABLED RTC ROM BOOT H, H = Reserved HIGH RESET
ENABLED STRAPS (DEFAULT) (DEFAULT) (DEFAULT) (DEFAULT) (DEFAULT) (DEFAULT)
(Use Internal) DEFAULT H, L = SPI ROM DEFAULT Reserved
RESERVED
EXT. RTC DISABLE PCI USE BYPASS BYPASS BYPASS IDE USE EEPROM Reserved
PULL WatchDog IGNORE IMC CLKGEN (PD on X1, ROM BOOT L, H = LPC ROM PULL SHORT PCI PLL ACPI PLL PCIE STRAPS
LOW (NB_PWRGD) DEBUG DISABLED DISABLED apply LOW RESET BCLK
DISABLED STRAPS (Use External) 32KHz to DEFAULT L, L = FWH ROM
DEFAULT DEFAULT DEFAULT DEFAULT RTC_CLK)

Note: SB700 has 15K internal PU FOR PCI_AD[30:23]


NOTE: SB700 HAS INTERNAL 15K PULL UP RESISTOR FOR RTCCLK

A <Variant Name> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
ATi-SB700_STRAPPING_(5/5)
Size Document Number Rev
A3 FOOSE-AMD 15.4" SB
Date: Friday, January 04, 2008 Sheet 23 of 53
5 4 3 2 1
5 4 3 2 1

SSID = LOM +3.3V_ALW_2 +15V_ALW


+3.3V_LAN
+3.3V_LAN +3.3V_ALW

1
R112 R110
100KR2J-1-GP 100KR2J-1-GP
Co-lay with 5756M, P/N:71.05756.00U 1 D D 6
+3.3V_LAN 2 D D 5

2
6 1 LOM_SBCLK 20 +3.3V_LAN_EN1 +3.3V_LAN_EN2 3 G S 4
34 SB_SMBCLK_LAN
U22
5 2 SMBCLK 1 8 SI3456BDV-T1-GP
U35 SMBDATA 2 7

4
4 3 2N7002DW-7F-GP LAN_SMBDATA0 3 6

1
LAN_SMBCLK0 4 5

1
RN30 SRN2K2J-2-GP R109 C188

D
34 SB_SMBDATA_LAN
U21 DY470KR2J-2-GP DYSC4700P50V2KX-1GP D

2
LOM_SBDATA 20

2
2N7002DW-7F-GP

3
+1.2V_LOM U32A 1 OF 2 +3.3V_LAN
Core Power Decoupling

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
5761_GPIO0 TP75

SC4D7U6D3V3KX-GP
E4 VDDC APE_GPIO0 A11 1 34 AUX_ON
E7 A10 LOM_SMB_ALERT#
VDDC APE_GPIO1

1
C341

C336

C258

C345

C343

C353

C359

C361

C334
F5 A9 USB_11+_R_1 1 2
VDDC APE_GPIO2

2
1
H9 A8 5761_GPIO3 1 TP78 R696
VDDC APE_GPIO3 5761_GPIO4 TP77 R238
J4 A7 1 100KR2J-1-GP

2
VDDC APE_GPIO4 5761_GPIO5 TP85 1K5R2J-3-GP RN28
K4 VDDC APE_GPIO5 A2 1
K7 B1 5761_GPIO6 1 TP87 SRN2K2J-1-GP

2
VDDC APE_GPIO6
L4 VDDC
E8 SMBCLK 1 5756 2 LOM_SBCLK 20

3
4
+3.3V_LAN VDDC_IO SMB_CLK LAN_SMBCLK0 R242 1
2 5761 20R2J-2-GP
VDDIOPower Decoupling
+3.3V_LAN
R177 5756 10R2J-2-GP M13 VDDC_IO APE_SMB_CLK0 A3
A5 LAN_SMBCLK1 R217 0R2J-2-GP
APE_SMB_CLK1 SMBDATA R227 1
B7 VDDIO SMB_DATA C7
LAN_SMBDATA0
5756 2 LOM_SBDATA 20
B11 VDDIO APE_SMB_DATA0 A4 1 5761 20R2J-2-GP
1

1
C360 C356 C327 C339 G11 A6 LAN_SMBDATA1 R221 0R2J-2-GP
SCD1U10V2KX-4GP SCD1U10V2KX-4GP SCD1U10V2KX-4GP SC4D7U6D3V3KX-GP VDDIO APE_SMB_DATA1 +3.3V_LAN
D2 VDDIO
H2 H1 USB_11-_R R230 1 2 22R2J-2-GP USBP11- 20
2

2
VDDIO HUSB_DN USB_11+_R
K3 VDDIO HUSB_DP G1 1 2 USBP11+ 20

1
R229 22R2J-2-GP C191
N2 VDDIO R116 5756 SCD1U10V2KX-4GP 5756 C186
SC4D7U6D3V3KX-GP
+1.2V_LOM J1 close to LOM 1R2512J-1-GP 5756

2
VDDIO_USB
Put 0.1u cap close to Chip VSS A1
1 2 +1.2V_AVDDL E11 A12

2
L12 AVDDL VSS +3.3V_LAN_R1
D11 AVDDL VSS A13
BLM18AG601SN-3GP 1 2 1 2 1 2 C11 B4 +1.2V_LOM
AVDDL VSS MBT35200MT1G-GP

4
E
C302 C285 C286 B10
+3.3V_LAN SC4D7U6D3V3KX-GP SCD1U10V2KX-4GP SCD1U10V2KX-4GP VSS LOM_REGCTL25_PNP
E10
D10
AVDDH VSS D6
E5
3 B 5756
+2.5V_AVDD AVDDH VSS +1.2V_PCIE_PLLVDD
C C C C Design Current: 233mA
1
5761 2 F11 AVDDH VSS E9 1 2
Q32
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

L21 BLM18AG601SN-3GP SCD1U10V2KX-4GP F6 L18

1
2
5
6
VSS

1
+2.5V_LOM C308 C309 C310 L7 F7 SCD1U10V2KX-4GP 1 2 C335 21 BLM18AG601SN-3GP C207
XTALVDDH VSS +2.5V_LOM
1

1
C323 SCD047U10V2KX-2GP
VSS F8
DY

1
SC4D7U6D3V3KX-GP
1
5756 2 F12 F9
5756 C213

2
L16 BLM18AG601SN-3GP BIASVDDH VSS +1.2V_PCIE_SDSVDD SCD1U10V2KX-4GP
G5 1 2
5756 C204
2

+1.2V_USB_PLLVDD VSS L26 SC10U6D3V5KX-1GP


C L1 G6 C

2
USB_PLLVDDL VSS SCD1U10V2KX-4GP 1
VSS G7 2 C342 2 1 BLM18AG601SN-3GP
+1.2V_PCIE_SDSVDD N4 G8 C340
PCIE_SDSVDD VSS SC4D7U6D3V3KX-GP
VSS G9
+2.5V_XTALVDD +1.2V_PCIE_PLLVDD +1.2V_GPHY_PLLVDD
1
L22 5761 2
BLM18AG601SN-3GP
L5 PCIE_PLLVDDL VSS G10
H4
1
L11
2
VDDP Power Decoupling
+1.2V_GPHY_PLLVDD VSS SCD1U10V2KX-4GP 1 +2.5V_LOM
2 1 G12 GPHY_PLLVDDL VSS H5 2 C259 2 1 BLM18AG601SN-3GP
C315 C265
1
L19 5756 2
BLM18AG601SN-3GP SCD1U10V2KX-4GP VSS H6
H7 SC4D7U6D3V3KX-GP
VSS +1.2V_USB_PLLVDD
VSS H10
J5
1
L27 5761 2
VSS

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
+2.5V_BIASVDD SCD1U10V2KX-4GP 1 2 C354 BLM18AG601SN-3GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP
1 2 K1 2 1
L6 5761 BLM18AG601SN-3GP TP83 1 5761_NC#TDI
VSS 5756 5756 5756 5756 5756 5756
G3 TDI VSS K5
5761

1
C212

C215

C214

C217

C218

C216
2 1 TP86 1 5761_NC#TMS F2 TMS VSS L6 C362
C260 TP79 1 5761_NC#TDO SC4D7U6D3V3KX-GP
L5
1
5756 2
BLM18AG601SN-3GP SCD1U10V2KX-4GP Populate resister for debug TP80 1 5761_NC#TCK
D5
C6
TDO VSS M1
M4

2
TCK VSS
TP81 1 5761_NC#TRST# C3 M6
1
DY 2 NB_GPHY_TVCOI
DK_GPHY_TVCOI
F10
TRST#
NB_GPHY_TVCOI
VSS
VSS N1 close to the power pins and 0.1u
R163 1 2 4K7R2J-2-GP
R169 DY 4K7R2J-2-GP
N13 DK_GPHY_TVCOI VSS N6
cap should be closer to Chip
Co-Lay U18 +2.5V_LOM 2 1 BCM5761EA0KFBG-GP
R158
LOM_CS# 4 5 +3.3V_LAN
5756 0R2J-2-GP
S# W# U32B 2 OF 2
+3.3V_LAN 3 RESET# VCC 6
LOM_SCLK 2 7
LOM_SO C VSS LOM_SI LOM_XTALI
1 8 H12 M9
D DY Q 37 DOCK_LOM_TRD0+ DK_TRD0+ XTALI
1

C190 LOM_XTALO 1LOM_XTAL1


SCD1U10V2KX-4GP
37 DOCK_LOM_TRD0- H13
J12
DK_TRD0- XTALO N9
200R2F-L-GP
2
R186
Place crystal less
37 DOCK_LOM_TRD1+ DK_TRD1+
M45PE20-VMN6TP-GP
37 DOCK_LOM_TRD1- J13 2 1 than 0.75" (~1.9cm)
2

DK_TRD1- X3
37 DOCK_LOM_TRD2+ K12 E3
37 DOCK_LOM_TRD2- K13
DK_TRD2+
DK_TRD2-
DK_LINKLED#
DK_SPD100LED# E2
DOCK_LOM_SPD10LED_GRN# 37
DOCK_LOM_SPD100LED_ORG# 37
XTAL-25MHZ-72GP from LAN Controller

1
L12 D3 C311 C297
37 DOCK_LOM_TRD3+ DK_TRD3+ DK_SPD1000LED#
L13 F3 SC27P50V2JN-2-GP SC27P50V2JN-2-GP
37 DOCK_LOM_TRD3- DK_TRD3- DK_TRAFFICLED# DOCK_LOM_ACTLED_YEL# 37
U17 B8

2
NB_LINKLED# NB_LOM_SPD10LED_GRN# 25
25 NB_LOM_TRD0+ E12 NB_TRD0+ NB_SPD100L# C8 NB_LOM_SPD100LED_ORG# 25
LOM_CS# 4 5 +3.3V_LAN E13 D8
CS# WP# 25 NB_LOM_TRD0- NB_TRD0- NB_SPD1000LED#
+3.3V_LAN 3 RESET# VCC 6 25 NB_LOM_TRD1+ D12 NB_TRD1+ NB_TRAFFICLED# D7 NB_LOM_ACTLED_YEL# 25
LOM_SCLK 2 7 D13
SCK GND 25 NB_LOM_TRD1- NB_TRD1-
LOM_SO LOM_SI DOCKED LOM_CS#
1 SI SO 8 25 NB_LOM_TRD2+ C12
C13
NB_TRD2+ CS# C10
R161
1
DY 2
4K7R2J-2-GP
+3.3V_LAN BCM5756M
B
SEL 0:RJ45. 25 NB_LOM_TRD2- NB_TRD2- LOM_NV_STRAP0 NV_STRAP1 NVSTRAP0 SO SI CS# SCLK B
B12 K2 1 2
AT45BCM021B-GP SEL 1:Dock. 25 NB_LOM_TRD3+ NB_TRD3+ NV_STRAP0 LOM_NV_STRAP1 R254 1 DY 2 4K7R2J-2-GP
25 NB_LOM_TRD3- B13 NB_TRD3- NV_STRAP1 M2
R234 DY 4K7R2J-2-GP Ato-Sense Mode 0 0 0 0 0 0
8Mb for 5761E: Main 72.45081.C01 LOM_SI
35 DOCKED F4
LOM_CABLE_DET E_SWITCH_CONT SI D9
LOM_SO
1
R181 1 DY 2
2 4K7R2J-2-GP ST M45PE20 0 1 1 0 0 1
Second 72.45081.B01 35 LOM_CABLE_DETECT R235
1 2
0R2J-2-GP
C4 ENERGYDET SO C9
B9 LOM_SCLK R182 1 DY 2 4K7R2J-2-GP R191
2Mb for 5756M: Main 72.45021.E01 SCLK R193 DY 4K7R2J-2-GP 4K7R2J-2-GP Atmel AT45BCM021B 0 0 1 0 1 1
1 2 +3.3V_LAN
Second 72.45P20.001 N8 LOM_SMB_ALERT#_1 1 2
GPIO0 LOM_SMB_ALERT# 34
5761_GPIO1 TP76R188 0R2J-2-GP
GPIO1 M8
C5 5761_GPIO2
1
1 TP82 5756
GPIO2
19,23 CLK_PCI_LOM H8 LCLK
+3.3V_LAN LOM_SERIAL_DI
LPC_LAD0 R259 B_TPM 0R2J-2-GP SERIAL_DI J3 1
LOM_SERIAL_DO R253 1 DY 2
2 4K7R2J-2-GP
+3.3V_LAN
X01 +3.3V_LAN
19,25,34,35 LPC_LAD0
LPC_LAD1 R223
1
1
2
B_TPM
2 0R2J-2-GP
L9
J8
LAD0 SERIAL_DO L3
R212 DY 4K7R2J-2-GP
19,25,34,35 LPC_LAD1 LAD1
1

LPC_LAD2 R225 1 B_TPM


2 0R2J-2-GP K10 J2
19,25,34,35 LPC_LAD2 LAD2 LOW_PWR LOM_LOW_PWR 35
R231 LPC_LAD3 R226 B_TPM 0R2J-2-GP SUPER_LOW_PWR
C_TPM 19,25,34,35 LPC_LAD3 1 2 J10 LAD3 PWR_DOWN K11 2
DY 1 LOM_SUPER_IDDQ 35

1
47KR2F-GP R157

1
19,25,34,35 LPC_LFRAME# LPC_LFRAME# R224 1 2 0R2J-2-GP L11 B6 VAUX_PRSNT R197 1 2 1KR2F-3-GP +3.3V_LAN 20KR2J-L2-GP R122 C196
LFRAME# VAUXPRSNT VMAIN_PRSNT R165 1
L8 H11 2 1KR2F-3-GP +3.3V_RUN R168 1R2512J-1-GP C199 SC4D7U6D3V3KX-GP
2

25 LOM_PCIE_RST# IRQ_SERIRQ LRESET# VMAINPRSNT 39KR2J-GP SCD1U10V2KX-4GP


L10
B_TPM

2
19,25,26,34,35 IRQ_SERIRQ LOM_TPM_EN_R# SERIRQ
35 LOM_TPM_EN# 1 2 L2

2
R233 TPM_EN# NB_LOM_RDAC
F13 2 1

2
0R2J-2-GP TPM_GPIO0 NB_RDAC DOCK_LOM_RDAC 1K24R2F-GP 2 +3.3V_LAN_R2
1 R162
1
R257 1 DY 2
2 10KR2J-3-GP TPM_GPIO1
K9 TPM_GPIO0 DK_RDAC G13
1K18R2F-GP R164
DY K8

E
R256 1 TPM_GPIO2 TPM_GPIO1
2 10KR2J-3-GP J9
DY TPM_GPIO2/TPMSTATUS
2

R255 10KR2J-3-GP N11 B Q33


R232 REGSUP12 MMJT9435T1G-GPU
REGSEN12 M12 +1.2V_LOM

2
LOM_REGCTL12_PNP C222
4K7R2J-2-GP
DY M11

C
REGCTL12 LOM_REGCTL25_PNP VDDC_IO SCD047U10V2KX-2GP
+2.5V_LOM TP89 15761_NC#C1 C1
REGIO_OUT12 N12 2
R175 5761 10R2J-2-GP 1 2
C274 SCD1U10V2KX-4GP DY +1.2V_LOM
1

1
NC#C1

1
TP90 15761_NC#D1 D1 NC#D1
C228 C221
LAN_NC_D04 SCD1U10V2KX-4GP
Reserve for EMI
2
R236 5756 1 TP84 15761_NC#E1
D4
E1
NC#D4 PCIE_RXDP N7
M7
PCIE_NBTX_C_LOMRX_P2 13 SC10U6D3V3MX-GP
PCIE_NBTX_C_LOMRX_N2 13

2
0R2J-2-GP NC#E1 PCIE_RXDN
E6 NC#E6
CLK_PCI_LOM TP88 15761_NC#F1 F1 N3 PCIE_NBRX_LOMTX_P5_C 2 1 +3.3V_RUN
NC#F1 PCIE_TXDP PCIE_NBRX_LOMTX_N5_C SCD1U10V2KX-4GP PCIE_NBRX_LOMTX_P2 13
G2 NC#G2 PCIE_TXDN M3 2 1 C358
1

LAN_NC_G04 SCD1U10V2KX-4GP C357 PCIE_NBRX_LOMTX_N2 13


2
5756 1 G4 NC#G4

2
R196 R237 H3 N5
NC#H3 REFCLK+ CLK_PCIE_LOM 6
22R2J-2-GP 0R2J-2-GP J6
J7
NC#J6 REFCLK- M5 CLK_PCIE_LOM# 6 2
4K7R2J-2-GP DYR199
1
5761 R252
4K7R2J-2-GP
A LAN_NC_J11 NC#J7 LOM_REFCLK_SEL A
2
5756 1 J11 B3
2

R143 NC#J11 REFCLK_SEL LOM_PCIE_RST#


CLK_PCIGLAN

K6 B2 2 1 PLTRST_SYS# 31,50

1
0R2J-2-GP NC#K6 PERST# 0R2J-2-GP R205
M10 NC#M10 WAKE# B5 PCIE_WAKE# 31,35 LOM_CLKREQ# Logic High Voltage must
N10 C2
NC#N10 CLKREQ# LOM_CLKREQ# 6 be 0.7V to 2.75V

1
BCM5761EA0KFBG-GP <Variant Name>
5756 R251
0R2J-2-GP
1

C317 Wistron Corporation

2
SC4D7P50V2CN-1GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2

Taipei Hsien 221, Taiwan, R.O.C.

Title
LAN BCM5756ME
Size Document Number Rev
A2 FOOSE-AMD 15.4" SB
Date: Friday, January 04, 2008 Sheet 24 of 53
5 4 3 2 1
5 4 3 2 1

SSID = LOM LAN Connector


TRING1
3 0R0603-PAD
1 TIP_R 1 L51 2

2 RING_R 1 L52 2
4 0R0603-PAD
10/100/1000M Lan Transformer
D
+2.5V_LOM MLX-CON2-5-GP D

2
XF1 20.D0173.102
C183 C178
1 24 RJ45_LOM_TRD3- SC300P3K8KN-GP DY DY SC300P3K8KN-GP
24 NB_LOM_TRD3-

1
TD+#1 TX+#24
1

2 23 RJ45_LOM_TRD3+ +3.3V_LAN
24 NB_LOM_TRD3+ TD-#2 TX-#23
L50 5 20 RJ45_LOM_TRD2- LAN1
24 NB_LOM_TRD2- TD+#5 TX+#20
BLM18AG601SN-3GP 6 19 RJ45_LOM_TRD2+ 9
24 NB_LOM_TRD2+ TD-#6 TX-#19
7 18 RJ45_LOM_TRD1-
5756 24 NB_LOM_TRD1-
8
TD+#7 TX+#18
17 RJ45_LOM_TRD1+ TIP RJ11_1
24 NB_LOM_TRD1+ TD-#8 TX-#17
11 14 RJ45_LOM_TRD0- 150R2F-1-GP RING RJ11_2
24 NB_LOM_TRD0-
2

TD+#11 TX+#14 RJ45_LOM_TRD0+ R563 GRN


24 NB_LOM_TRD0+ 12 TD-#12 TX-#13 13
2 1 LOM_SPD100LED_ORG# A1 A1
24 NB_LOM_SPD10LED_GRN# A2
A2
1 2 NB_LOM_TCT 3 16 XFR_MCT3 X01 2 1 LOM_ACTLED_YEL# A3
TDCT#3 TXCT#16 24 NB_LOM_SPD100LED_ORG# A3
C647 1 2 SCD1U10V2KX-4GP 4 15 XFR_MCT4 RJ45_LOM_TRD0+ RJ45_1
TDCT#4 TXCT#15

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP
C629 1 2 SCD1U10V2KX-4GP 9 21 XFR_MCT2 R562 RJ45_LOM_TRD0- RJ45_2 ORG
C653 1 TDCT#9 TXCT#21
2 SCD1U10V2KX-4GP 10 TDCT#10 TXCT#22 22 XFR_MCT1 150R2F-1-GP RJ45_LOM_TRD1+ RJ45_3

1
C625 SCD1U10V2KX-4GP RJ45_LOM_TRD2+ RJ45_4
EC14 EC13 RJ45_LOM_TRD2- RJ45_5
XFORM-248-GP RJ45_LOM_TRD1- RJ45_6

2
1

1
RJ45_LOM_TRD3+ RJ45_7

R553

R554

R564

R561
75R2F-2-GP

75R2F-2-GP

75R2F-2-GP

75R2F-2-GP
RJ45_LOM_TRD3- RJ45_8 YEL
B1 B1
2 1 LOM_SPD10LED_GRN# B2
24 NB_LOM_ACTLED_YEL# B2
R543

2
150R2F-1-GP 10

1
LAN_TERMINAL EC11 RJ45+RJ11-6GP
SC1KP50V2KX-1GP 22.10177.B11

2
1
C EC12 C
SC1KP3KV8KX-GP

2
Yellow LED:TX/RX
NB_LOM_TRD0+ The blowout from the LAN magnetics to the RJ45
NB_LOM_TRD0- Amber LED:Speed 100
NB_LOM_TRD1+
connector maintining the distance between the two
to be within 1 inch. Green LED:Speed 10
NB_LOM_TRD1-
NB_LOM_TRD2+
NB_LOM_TRD2-
NB_LOM_TRD3+ Hipot layout guide line update space > 50mil
NB_LOM_TRD3- 1.route on bottom as differential pairs.
Rj11 layout guide line update > 100mil
2.Tx+/Tx- are pairs. Rx+/Rx- are pairs.
1

1
C669

C663

C650

C646

C643

C640

C619

C611
SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

DY DY DY DY DY DY DY DY 3.No vias, No 90 degree bends.


4.pairs must be equal lengths.
2

5.6mil trace width,12mil separation.


6.36mil between pairs and any other trace.
7.Must not cross ground moat,except
RJ-45 moat.

China TPM +3.3V_RUN

U90
B B

1 GPIO1 NC VDD 10

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
2 GPIO2 NC VDD 19
TP156 1 C_TPM_GPIO3 6 24
GPIO_EXPRESS_00 VDD

1
X01 GPIO3
R399 C891 C894 C959
1 2 SP_TPM_LPC_EN_R 28 SC2D2U6D3V3KX-GP
35 SP_TPM_LPC_EN C_TPM

2
R270 LPCPD#
1 C_TPM 2 0R2J-2-GP 26 11
19,24,34,35 LPC_LAD0 LAD0 GND C_TPM C_TPM C_TPM
1

0R2J-2-GP R268 1 C_TPM 2 0R2J-2-GP 23 18


19,24,34,35 LPC_LAD1 LAD1 GND
R404 R281 1 C_TPM 2 0R2J-2-GP 20 25
4K7R2J-2-GP C_TPM 19,24,34,35 LPC_LAD2
R306 1 C_TPM 2 0R2J-2-GP 17
LAD2 GND
4
19,24,34,35 LPC_LAD3 LAD3 GND

C_TPM
2

19 C_TPM_LCLK 21 LCLK BA1 NC#3 3


+3.3V_RUN 1 C_TPM2 LPC_LFRAME#_CTPM 22 5
19,24,34,35 LPC_LFRAME# LFRAME# NC NC#5
R859 0R2J-2-GP 16 12
24 LOM_PCIE_RST# LRESET# GPIO15 NC#12
27 13 1 TP157
19,24,26,34,35 IRQ_SERIRQ SERIRQ GPIO16 NC#13

2
R800 CLKRUN#_CTPM 15 14
CLKRUN# VR25 NC#14

SCD1U10V2KX-4GP
TPM_PP
1
C_TPM2 7
9
PP DY R860
0R2J-2-GP
TESTBI/BADD BA0

1
10KR2J-3-GP 8 TESTI NC C960

1
2
SSX35BCB-SCMR-GP
+3.3V_RUN C_TPM
2

A <Variant Name> A
R861
C_TPM

3
4
100KR2J-1-GP
RN57
SRN10KJ-5-GP
C_TPM
Wistron Corporation
1

1 2 CLKRUN#_CTPM 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


19,26,34,35 PM_CLKRUN# DY Taipei Hsien 221, Taiwan, R.O.C.
2

R862

2
1
0R2J-2-GP R863 Title

C_TPM 10KR2J-3-GP
LAN Connector&TPM
Size Document Number Rev
1

A3 FOOSE-AMD 15.4" SB
Date: Friday, January 04, 2008 Sheet 25 of 53
5 4 3 2 1
5 4 3 2 1

SSID = 1394
1 OF 3
U44A
+3.3V_RUN

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP
2 OF 3 J18
CADR25 CBS_CAD19 28
SC10U6D3V5KX-1GP

SCD01U16V2KX-3GP
U44B J15
CADR24 CBS_CAD17 28
C1 NC#C1 CADR23 K16 CBS_CFRAME# 28
+3.3V_RUN L16
CADR22 CBS_CTRDY# 28
1

1
C478
C475

C473

C500

C480

C491

C520

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP
W3 VCC_PCI3V CADR21 L18 CBS_CDEVSEL# 28

SCD01U16V2KX-3GP

SC10U6D3V5KX-1GP
D R11 VCC_PCI3V VCC_3V F5 D1 NC#D1 CADR20 M16 CBS_CSTOP# 28 D
R12 J19 N19 CBS_CBLOCK# 28
2

2
VCC_PCI3V VCC_3V CADR19
VCC_3V K19 CADR18 N16 CBS_DATA18 28

1
C484
C474

C481

C485
VCC_3V G5 E1 NC#E1 CADR17 P16 CBS_CAD16 28
R6 L19 CBS_CCLK_R 1 2 R388
VCC_RIN CADR16 CBS_CCLK 28
E13 K15 0R2J-2-GP
CBS_CIRDY# 28

2
VCC_ROUT1 VCC_RIN CADR15
L1 VCC_ROUT C2 NC#C2 CADR14 N18 CBS_CPERR# 28
VCC_ROUT2 E14 A4 N15
VCC_ROUT VCC_MD3V CADR13 CBS_CPAR 28
SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

R7 REGEN# CADR12 K18 CBS_CC/BE2# 28


SCD47U6D3V2KX-GP

SCD47U6D3V2KX-GP D2 R18 CBS_CAD12 28


NC#D2 CADR11
GND J1 CADR10 U19 CBS_CAD9 28
GND J5 CADR9 R19 CBS_CAD14 28
1

1
C483

C487

C488

C482

1 1 19 PCI_AD31 M2 K5 E2 P15
AD31 GND NC#E2 CADR8 CBS_CC/BE1# 28
19,23 PCI_AD30 M1 AD30 GND E9 CADR7 J16 CBS_CAD18 28
2 2 19,23 PCI_AD29 N5 R10 H15 CBS_CAD20 28
2

AD29 GND CADR6


19,23 PCI_AD28 N4 AD28 GND T10 E4 NC#E4 CADR5 H18 CBS_CAD21 28
19,23 PCI_AD27 N2 AD27 GND V10 CADR4 G15 CBS_CAD22 28
19,23 PCI_AD26 N1 AD26 GND W10 CADR3 G18 CBS_CAD23 28
19,23 PCI_AD25 P5 AD25 GND L15 CADR2 F15 CBS_CAD24 28
19,23 PCI_AD24 P4 AD24 GND M19 CADR1 F18 CBS_CAD25 28
19,23 PCI_AD23 R4 AD23 AGND A9 CADR0 E16 CBS_CAD26 28
19 PCI_AD22 R2 AD22 AGND B9
19 PCI_AD21 R1 AD21 AGND D9 CDATA15 U18 CBS_CAD8 28
19 PCI_AD20 T2 AD20 AGND D14 CDATA14 W18 CBS_DATA14 28
19 PCI_AD19 T1 AD19 AGND A15 CDATA13 V17 CBS_CAD6 28
U2 B15 +3.3V_RUN V16
19 PCI_AD18 AD18 AGND CDATA12 CBS_CAD4 28
19 PCI_AD17 U1 AD17 CDATA11 V15 CBS_CAD2 28
19 PCI_AD16 V1 AD16 TEST F4 CDATA10 B19 CBS_CAD31 28

1
19 PCI_AD15 T7 AD15 CDATA9 C18 CBS_CAD30 28
C
19 PCI_AD14 V7 R436 D18 C
AD14 4K7R2J-2-GP CDATA8 CBS_CAD28 28
19 PCI_AD13 W7 AD13 CDATA7 W17 CBS_CAD7 28
19 PCI_AD12 R8 AD12 CDATA6 W16 CBS_CAD5 28
19 PCI_AD11 T8 W15 CBS_CAD3 28

2
AD11 CB_HWSPND# CDATA5
19 PCI_AD10 V8 AD10 HWSPND# F2 CB_HWSPND# 35 CDATA4 T15 CBS_CAD1 28
19 PCI_AD9 W8 AD9 CDATA3 R14 CBS_CAD0 28
19 PCI_AD8 R9 F1 CBS_SPK R435 2 1 100KR2J-1-GP +3.3V_RUN C19
AD8 SPKROUT CDATA2 CBS_DATA2 28
19 PCI_AD7 V9 R471 2 1 100KR2J-1-GP D19
19 PCI_AD6 W9
AD7 DY CDATA1
E19
CBS_CAD29 28
AD6 CDATA0 CBS_CAD27 28
19 PCI_AD5 T11 AD5 X01 For MMC PLUS
19 PCI_AD4 V11 AD4
W11 +3.3V_RUN TP116 1 R5C847_MDIO19 E8 T19
19 PCI_AD3 AD3 MDIO19 OE# CBS_CAD11 28
19 PCI_AD2 T12 AD2 WE# M15 CBS_CGNT# 28
19 PCI_AD1 V12 G1 RN40 TP113 1 R5C847_MDIO18 D8 T18
AD1 UDIO5 MDIO18 CE2# CBS_CAD10 28
19 PCI_AD0 W12 AD0 CE1# V19 CBS_CC/BE0# 28
19 PCI_PAR V6 H5 UDIO4 2 3 F16
PAR UDIO4 REG# CBS_CC/BE3# 28
19 PCI_C/BE#3 P2 C/BE3# 1 4 B8 MDIO17 RESET H19 CBS_CRST# 28
19 PCI_C/BE#2 W2 H4 UDIO3 A8 G16
C/BE2# UDIO3 SRN10KJ-5-GP MDIO16 WAIT# CBS_CSERR# 28
19 PCI_C/BE#1 W6 C/BE1# E7 MDIO15 WP/IOIS16# A18 CBS_CCLKRUN# 28
19 PCI_C/BE#0 T9 C/BE0# UDIO2 H2 D7 MDIO14 RDY/IREQ# M18 CBS_CINT# 28
PCI_AD17 1 2 R5C834_IDSEL P1 B7 F19
IDSEL 27 SDDAT0/MMCDAT3 MDIO13 BVD2 CBS_CAUDIO 28
R368 100R2F-L1-GP-U H1 A7 E18
UDIO1 27 SDDAT0/MMCDAT2 MDIO12 BVD1 CBS_CSTSCHNG 28
19 PCI_REQ1# M4 REQ# 27 SDDAT0/MMCDAT1 E6 MDIO11 VS2# H16 CBS_CVS2 28
+3.3V_RUN M5 J4 D6 R16
19 PCI_GNT1# GNT# UDIO0/SRIRQ# IRQ_SERIRQ 19,24,25,34,35 27 SDDAT0/MMCDAT0 MDIO10 VS1# CBS_CVS1 28
19 PCI_FRAME# V3 FRAME# CD2# D15 CBS_CCD2# 28
V4 1 SDCLK/MMCCLK
2 B6 T14
19 PCI_IRDY# IRDY# 27 SDCLK/MMCCLK_R MDIO09 CD1# CBS_CCD1# 28
W4 0R2J-2-GP R427 G19
19 PCI_TRDY# TRDY# INPACK# CBS_CREQ# 28
1

T5 SDCMD/MMCCMD A6
19 PCI_DEVSEL# DEVSEL# 27 SDCMD/MMCCMD MDIO08
R434 V5 J2 PCI_PIRQA# 19
B 19 PCI_STOP# STOP# INTA# B
100KR2J-1-GP W5 2 1 MDIO07 D5 P18
19 PCI_PERR# PERR# MDIO07 IORD# CBS_CAD13 28
T6 K4 PCI_PIRQB# 19 R432 0R2J-2-GP P19
19 PCI_SERR# SERR# INTB# IOWR# CBS_CAD15 28
B5
2

GBRST# MDIO06
G2 GBRST# INTC# K2 PCI_PIRQC# 19
19,37 PCI_RST# L4 PCIRST# A5 MDIO05 USBDP V14 USBP7+_R R351 1 2 0R2J-2-GP USBP7+ 20
K1 PCICLK NC#L2 L2 USBDM W14 USBP7-_R R352 1 2 0R2J-2-GP USBP7- 20
2

C503 CARD_PWR B4
SC1U10V2KX-1GP 27 CARD_PWR MDIO04
19,25,34,35 PM_CLKRUN# L5 CLKRUN#
G4 SDWP# B3
1

RI_OUT#/PME# 27 SDWP# MDIO03


TP115 1 R5C847_MDIO02 A3 MDIO02
19,23 CLK_PCI_PCCARD
R5C847-GP TP114 1 R5C847_MDIO01 A2 W13 VPPEN1
MDIO01 VPPEN1 VPPEN0 VPPEN1 28
SHIELD VPPEN0 V13 VPPEN0 28
2

GND SDCD#/MMCCD# B1 T13 VCC3EN#


27 SDCD#/MMCCD# MDIO00 VCC3EN# VCC3EN# 28
R409 R13 VCC5EN#
VCC5EN# VCC5EN# 28
DY 10KR2J-3-GP

1
R5C847-GP R349 R347
DY
1

CLK_PCI_PCCARD_R 100KR2J-1-GP 100KR2J-1-GP


1

2
DY C489
SC10P50V2JN-4GP
2

SDCLK/MMCCLK CBS_CRST# CBS_CCD1# CBS_CCD2#


1

1
DY R433
100KR2J-1-GP
DY C486
SCD01U16V2KX-3GP
C807
SC270P50V2JN-2GP
C810
SC270P50V2JN-2GP
A <Variant Name> A
2

2
2

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
X01 Taipei Hsien 221, Taiwan, R.O.C.

Title
R5C833/PCI
Size Document Number Rev
A3 FOOSE-AMD 15.4" SB
Date: Friday, January 04, 2008 Sheet 26 of 53
5 4 3 2 1
5 4 3 2 1

SSID = 1394 +3.3V_RUN +3.3V_RUN_PHY


L40
2 1
BLM21PG600SN-1GP C490 C495 C497 C498 C499

SC10U6D3V5KX-1GP

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP
1

1
2

SCD33U10V3KX-3GP

SCD01U16V2KX-3GP
D
+3.3V_RUN_PHY TPBIAS0 D

1
1

C508
R431

C509
R420 R430
0R2J-2-GP 56R2J-4-GP 56R2J-4-GP

2
2

2
3 OF 3

2
U44C

CPS D11 E10


CPS AVCC_PHY3V TPA0P
AVCC_PHY3V E11
X01 A17 TPA0N
AVCC_PHY3V TPB0P
AVCC_PHY3V B17
1394_XI A16 TPB0N
XI TPBIAS0
TPBIAS0 D12

1
X5

1
1 2 1394_XO 2 1 1394_XO_R B16
R439 0R2J-2-GP XO R428 R429
TPBN0 A13 TPB0N 40
X-24D576MHZ-69GP B13 56R2J-4-GP 56R2J-4-GP
TPBP0 TPB0P 40
A14

2
FIL0
SC15P50V2JN-2-GP

2
TPB_EMI
SC15P50V2JN-2-GP

TPAN0 A12 TPA0N 40


C525
SCD01U16V2KX-3GP

CBREXT B14 B12


REXT TPAP0 TPA0P 40
1

1
C505

C506

1
C507 R440
DY
1
10KR2F-2-GP

D13 D10 SC270P50V2JN-2GP 5K11R2F-L1-GP


2

VREF TPBIAS1
R447

2
C E12 A11 C
NC#E12 TPBN1
B11
CBVERF
2

TPBP1
X01
TPAN1 A10
Close to U15
TPAP1 B10
1

C512 R5C847-GP
SCD01U16V2KX-3GP
2

SSID = SDIO
+3.3V_RUN_CARD
Card Reader Power CARD1

4 VDD COMMON GROUND SWITCH 10


11 SDCD#/MMCCD#
SDDAT0/MMCDAT0 CARD DETECT SWITCH SDWP# SDCD#/MMCCD# 26
26 SDDAT0/MMCDAT0 7 DAT0 WRITE PROTECT SWITCH 12 SDWP# 26
SDDAT0/MMCDAT3 1 13
26 SDDAT0/MMCDAT3 CD/DAT3 GROUND SWITCH

1
SDDAT0/MMCDAT1 8
B +3.3V_RUN U47 40mil +3.3V_RUN_CARD C522
SCD1U10V2KX-4GP
26
26
SDDAT0/MMCDAT1
SDDAT0/MMCDAT2
SDDAT0/MMCDAT2
SDCMD/MMCCMD
9
2
DATE1
DATE2
3
B

26 SDCMD/MMCCMD

2
SDCLK/MMCCLK_R CMD VSS
5 IN OUT 1 26 SDCLK/MMCCLK_R 5 CLK VSS 6
GND 2 NP1 NP1 GND 14
2

CARD_PWR 4 3 NP2 15
26 CARD_PWR EN# OC# NP2 GND
1

C523 C521 R452


SCD01U16V2KX-3GP SC1U10V2KX-1GP 150KR2F-L-GP
1

TPS2051BDBVR-GP SKT-SDCARD-15-GP
2

C519 SDDAT0/MMCDAT3 2 20.I0074.001


DY11SC100P50V2JN-3GP
1

SCD1U10V2KX-4GP SDDAT0/MMCDAT2 C502 2


DY1SC100P50V2JN-3GP
2

SDDAT0/MMCDAT1 C501 2
SDDAT0/MMCDAT0 C476 2 DY1SC100P50V2JN-3GP
C477 DYSC100P50V2JN-3GP

A <Variant Name> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
FLASH CARD CONN .
Size Document Number Rev
A3 FOOSE-AMD 15.4" SB
Date: Friday, January 04, 2008 Sheet 27 of 53
5 4 3 2 1
5 4 3 2 1

SSID = CARDBUS

D D

+5V_RUN

SC1U6D3V2KX-GP
1
C457

69
70
71
72
73
74
75
76
77
+3.3V_RUN CARDBUS1
35 35 1

69
70
71
72
73
74
75
76
77
2
1
26 CBS_CCD1# 36 36 2 2 CBS_CAD0 26

SC1U6D3V2KX-GP
26 CBS_CAD2 37 37 3 3 CBS_CAD1 26

1
VPPEN0 U41 C454 38 38 4
26 VPPEN0 26 CBS_CAD4 4 CBS_CAD3 26
VPPEN1 39 39 5
26 VPPEN1 26 CBS_CAD6 5 CBS_CAD5 26
3 15 26 CBS_DATA14 40 40 6 CBS_CAD7 26

2
EN0 VCC5_IN 6
4 EN1 VCC5_IN 13 26 CBS_CAD8 41 41 7 7 CBS_CC/BE0# 26
26 CBS_CAD10 42 42 8 8 CBS_CAD9 26
6 11 +CBS_VCC 43 43 9
NC#6 VCC3_IN 26 CBS_CVS1 9 CBS_CAD11 26
7 NC#7 26 CBS_CAD13 44 44 10 10 CBS_CAD12 26
10 NC#10 VCC_OUT 14 26 CBS_CAD15 45 45 11 11 CBS_CAD14 26

SCD01U16V2KX-3GP

SC10U6D3V5KX-1GP
VCC_OUT 12 26 CBS_CAD16 46 46 12 12 CBS_CC/BE1# 26

1
+CBS_VPP 5 9 C438 C441 47 47 13
C FLG VCC_OUT 26 CBS_DATA18 13 CBS_CPAR 26 C
26 CBS_CBLOCK# 48 48 14 14 CBS_CPERR# 26
8 26 CBS_CSTOP# 49 49 15 CBS_CGNT# 26

2
VPP_OUT 15
SCD1U10V2KX-4GP

SCD01U16V2KX-3GP

VCC3_EN 2 26 CBS_CDEVSEL# 50 50 16 16 CBS_CINT# 26


C466 C464 16 1 +CBS_VCC 51 51 17 +CBS_VCC
GND VCC5_EN 17
1

+CBS_VPP 52 52 18 18 +CBS_VPP
26 CBS_CTRDY# 53 53 19 19 CBS_CCLK 26
R5531V002-GP 54 54 20
26 CBS_CFRAME# CBS_CIRDY# 26
2

VCC3EN# 20
VCC3EN# 26 26 CBS_CAD17 55 55 21 21 CBS_CC/BE2# 26
VCC5EN# 56 56 22
VCC5EN# 26 26 CBS_CAD19 22 CBS_CAD18 26
26 CBS_CVS2 57 57 23 23 CBS_CAD20 26
26 CBS_CRST# 58 58 24 24 CBS_CAD21 26
26 CBS_CSERR# 59 59 25 25 CBS_CAD22 26
26 CBS_CREQ# 60 60 26 26 CBS_CAD23 26
26 CBS_CC/BE3# 61 61 27 27 CBS_CAD24 26
26 CBS_CAUDIO 62 62 28 28 CBS_CAD25 26
Close to CARDBUS1 26 CBS_CSTSCHNG 63 63
64 64
29 29
30
CBS_CAD26 26
+CBS_VCC +CBS_VPP 26 CBS_CAD28 30 CBS_CAD27 26
26 CBS_CAD30 65 65 31 31 CBS_CAD29 26
26 CBS_CAD31 66 66 32 32 CBS_DATA2 26
SKT1 67 67 33 CBS_CCLKRUN# 26

NP1
NP2
26 CBS_CCD2# 33
SC10U6D3V5KX-1GP

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

SCD1U10V2KX-4GP

3 68 68 34

78
79
80
81
82
83
84
34
1

1 C889 C893 C437 C896

78
79
80
81
82
83
84

NP1
NP2
2 FOX-CONN84-GP
2

4 62.10024.981

CARDBUS-SKT104-GP-U
21.H0164.001
B B

A <Variant Name> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
R5C847 PCI_CARD
Size Document Number Rev
A3 FOOSE-AMD 15.4" SB
Date: Friday, January 04, 2008 Sheet 28 of 53
5 4 3 2 1
5 4 3 2 1

SSID = SATA SSID = MDC 15"MDC Board Connector

MDC1 +3.3V_SUS
NP1 14

13 15

SATA HDD Connector

1
D 1 2 D
C439
SB_AZ_MDC_SDOUT 3 4 SC4D7U6D3V5KX-3GP
20 SB_AZ_MDC_SDOUT

2
5 6
20 SB_AZ_MDC_SYNC SB_AZ_MDC_SYNC 7 8
HDD1 1 2 ACSDATAIN1_A 9 10
20 SB_AZ_MDC_SDIN1
SB_AZ_MDC_RST#_R 11 12 SB_AZ_MDC_BITCLK 20

1
23 R804

1
NP1 R796 33R2J-2-GP 18 16
DY

1
1 10R2F-L-GP R803
C928 NP2 17
DY 10R2F-L-GP
21 SATA_TX0+_R C677 1 2SCD01U50V2KX-1GP SATA_TX0+_C 2 SC22P50V2JN-4GP

2
21 SATA_TX0-_R C672 1 2SCD01U50V2KX-1GP SATA_TX0-_C 3 TYCO-CONN12A-5-GP

2
4 20.F1227.012

SB_AZ_CODEC_SDOUT_RC
21 SATA_RX0- C671 2 1 SCD01U50V2KX-1GP SATA_RX0-_C 5

1 SB_AZ_MDC_BITCLK_RC
21 SATA_RX0+ C676 2 1 SCD01U50V2KX-1GP SATA_RX0+_C 6
+3.3V_HDD 7

8
SCD1U10V2KX-4GP

SC10U6D3V5KX-1GP

9
X01 10
1

EC18 C674 +5V_HDD 11


DY 21 HDD_DET# 12
PWR TRACE 100mil 13
2

14
SCD1U10V2KX-4GP

15
16
DY
1

1
C614 C618 C615 17 C930
DY
SC10U6D3V5KX-1GP

SC1U10V3KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP
EC19 C639 C635 18 C918 SC10P50V2JN-4GP

2
SC1000P50V3JN-GP

C 19 SC10P50V2JN-4GP C
2

2
20
21
22
NP2
24
FOX-CON22-3-GP-U1
62.10065.061

SSID = SATA
SATA ODD Connector X01

+3.3V_ALW

2
1 2
B R313 R734 DY 0R2J-2-GP B
10KR2J-3-GP
+3.3V_SUS
ODD1

1
8 U84
NP1 20 SB_AZ_MDC_RST# 1 A VCC 5

S1 35 MDC_RST_DIS# 2 B
21 SATA_TX1+_R C933 1 2SCD01U50V2KX-1GP SATA_TX1+_C S2 3 4 SB_AZ_MDC_RST#_R
C931 1 GND Y
21 SATA_TX1-_R 2SCD01U50V2KX-1GP SATA_TX1-_C S3
S4
21 SATA_RX1- C927 2 1 SCD01U50V2KX-1GP SATA_RX1-_C S5 SNLVC1G08DCKRG4-GP
21 SATA_RX1+ C924 2 1 SCD01U50V2KX-1GP SATA_RX1+_C S6
S7
+5V_ODD
PWR TRACE 100mil 20 ODD_DET# P1 AND Gate
P2
P3
TP99 1ODD_MD P4
1

C911 P5
SC10U6D3V5KX-1GP

SCD1U16V2KX-3GP

C912 P6
NP2
2

SATA_RX- and SATA_RX+ Trace 9


Length match within 20 mil SKT-SATA7P+6P-5-GP-U
62.10065.191
A <Variant Name> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
HD/CDROM/MDC
Size Document Number Rev
A3 FOOSE-AMD 15.4" SB
Date: Friday, January 04, 2008 Sheet 29 of 53
5 4 3 2 1
5 4 3 2 1

SSID = USB SSID = TOUCH.PAD


TouchPad Connector
+5V_RUN TP28
S5 Support USB Charger USB_OC#0_1 20 17

U30 1
+5V_ALW F1 +5V_CHGUSB

1
2
FUSE-3A32V-7-GP 1 8 100 mil BC_DAT_ECE1077 2
GND OC1# 34 BC_DAT_ECE1077
SC1U6D3V2KX-GP

1 2 +5V_ALW_F 2 7 RN54 BC_CLK_ECE1077 3


D
DY IN OUT1 34 BC_CLK_ECE1077 D

SC4D7U6D3V5KX-3GP
3 6 SRN10KJ-5-GP BC_INT#_ECE1077 4
EN1# OUT2 34 BC_INT#_ECE1077

1
ST150U6D3VDML3GP
C269

C268
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
G41 GAP-CLOSE-PWR-3-GP 4 5 C281 +3.3V_ALW 5
EN2# OC2#
1

1 2 TC4 6
C333 G40 GAP-CLOSE-PWR-3-GP DY 7

4
3
1 2 TPS2062AD-GP X01 8
2

G39 GAP-CLOSE-PWR-3-GP CLK_TP_SIO 9


34 CLK_TP_SIO
1 2 DAT_TP_SIO 10
G38 GAP-CLOSE-PWR-3-GP Charger USB 34 DAT_TP_SIO
11
1 2 12

1
1
C836 C831 +5V_ALW 13
SC33P50V2JN-3GP SC33P50V2JN-3GP 14
TP_CABLE_DET# 15

2
2
35 TP_CABLE_DET#
35 ESATA_USB_PWR_EN# 16

18
MLX-CON16-7-GP
+3.3V_ALW_2 +5V_ALW 20.F1077.016

1 R592
2 USB_SIDE_EN#_Q +5V_CHGUSB

1
100KR2J-1-GP
D G S R594
100KR2J-1-GP
SSID = User.Interface
6

S
2
Q75

Hall Switch
2N7002DW-7F-GP G
C FDN340P-1-GP C
Q76
1

S G D +3.3V_ALW

D
100KR2J-1-GP
+5V_USB1_SUS R720 U20
1 2 1 VDD
USB_SIDE_EN#_Q_5V
35,40 USB_SIDE_EN#
VSS 2

LID_CL_SIO# 1 2LID_CL_SIO#_R 3
35 LID_CL_SIO# OUTPUT

1
C865 R719 EM-6781-T30-GP
SCD047U10V2KX-2GP 10R2F-L-GP 74.06781.07B
C867

2
SCD1U10V2KX-4GP

DLW21SN900SQ2LUGP
2

2
EL3 EL2
USB Connector
+3.3V_SUS
DY DY SSID = Legacy
+5V_CHGUSB +5V_USB1_SUS
DLW21SN900SQ2LUGP
3

3
X01 USB1
13
15"Serial port connector
1

B C289 B
11
SCD1U10V2KX-4GP U26 0R3-0-U-GP 0R3-0-U-GP
R614 1 5 R609
2

8 1 S_PORT1
VCC 1OE# USB_0-_U USB_0-_SW USB_01-_R TP50
7 2OE# 1A 2 USBP0+ 20 1 2 2 6 1 2 USBP1- 20 13 1
6 3 USB_0+_U 1 2 USB_0+_SW 3 7 USB_01+_R 1 2 USBP1+ 20
2B 1B SP_DET#
20 USBP0- 5 2A GND 4 4 8 1 SP_DET# 21
R617 9 10 R613
0R3-0-U-GP 12 0R3-0-U-GP 2 COMRXD0
COMRXD0 35
SNCB3Q3306APWRGP 14 3 COMTXD0
COMTXD0 35
4 COMRTS0#
COMRTS0# 35
SKT-USB-218-GP 5 COMDSR0#
COMDSR0# 35
22.10218.Y01 6 COMCTS0#
COMCTS0# 35
7 COMDTR0#
COMDTR0# 35
8 COMRI0#
COMRI0# 35
9 COMDCD0#
+3.3V_ALW_2 COMDCD0# 35
10 +3.3V_ALW
11
12
D19
1

14
R622 USB_0-_SW 1 6 USB_0+_SW
100KR2J-1-GP ESD I/O1 ESD I/O4 MLX-CON12-13-GP-U
2 GND VP 5 +5V_CHGUSB
USB_01-_R 3 4 USB_01+_R 20.F0693.012
DY
ESD I/O2 ESD I/O3
2

C750 IP4220CZ6-GP
2 1 EN_CELL_CHARGER_DET#_R 1 2
34 EN_CELL_CHARGER_DET#
A <Variant Name> A
R623 SC1U10V2KX-1GP
0R2J-2-GP

Wistron Corporation
D39 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2 1 CELL_CHARGER_DET#_R A K CHARGER_USB_DET# Taipei Hsien 221, Taiwan, R.O.C.
35 CELL_CHARGER_DET#
R619 SDMK0340L-7-F-GP Title
0R2J-2-GP
USB charger PORT
Size Document Number Rev
A3 FOOSE-AMD 15.4" SB
Date: Friday, January 04, 2008 Sheet 30 of 53
5 4 3 2 1
5 4 3 2 1

SSID = Wireless DEBUG PINS


JMINI Pin Debug Pin Name EC Pin
16 HOST_DEBUG_TX 70
Mini Card Connector 2(WLAN/UWB) 17
19
HOST_DEBUG_RX
8051_TX
71
82
+3.3V_ALW_2 +3.3V_RUN
42 8051_RX 81
+15V_ALW +3.3V_ALW +3.3V_RUN +3.3V_WLAN
1 2AUX_EN_WLAN#
R438 Close to WLAN connect
100KR2J-1-GP R401 Close to WLAN Pin24 Close to WLAN connect

1
D G S 0R6J-3-GP +3.3V_WLAN

1
1 2 +3.3V_WLAN +1.5V_RUN R421 R411
DY

4
D R425 10KR2J-3-GP 100KR2J-1-GP D

SC4D7U6D3V3KX-GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD047U10V2KX-2GP

SCD047U10V2KX-2GP
Q52 100KR2J-1-GP

1
2N7002DW-7F-GP

SCD047U10V2KX-2GP

SCD047U10V2KX-2GP
C504 C935 C510 C511 C496 C938
U46

2
1

1
SCD1U10V2KX-4GP C939 C934

2
1 D D 6 PCIE_WLAN_DET#

2
2 D D 5

2
WLAN_EN 3 G S 4 +3.3V_WLAN
1

S G D 3 1 2 +3.3V_WLAN
DY

1
SI3456BDV-T1-GP
DY C492 R424
SC4700P50V2KX-1GP 0R2J-2-GP

2
USB_WLAN_DET#
34 AUX_EN_WOW_LAN

2
1
1 R423
2
100KR2J-1-GP
24,35 PCIE_WAKE# 1 2 MINI1_WAKE#
15"MiniCard WLAN connector RN56
SRN2K2J-1-GP
R441 0R2J-2-GP

3
4
MINICARD1 U94
WLAN_CLKREQ# 53 +3.3V_WLAN +1.5V_RUN D52
6 WLAN_CLKREQ# WLAN_RADIO_OFF# SMBUS_WIRELESS_CLK
NP1 A K WLAN_RADIO_DIS# 35 1 6
CLK_PCIE_WLAN# MINI1_WAKE#
WLAN 6 CLK_PCIE_WLAN#
CLK_PCIE_WLAN
1 2
SDMK0340L-7-F-GP 2 5
6 CLK_PCIE_WLAN
COEX3_WLAN_ACTIVE WLAN_PCIE_RST# 2 SB_WLAN_PCIE_RST# 1 TP111
COEX1_BT_ACTIVE
3
5
4
6
1
DY 3 4
WLAN_CLKREQ# 7 8 R822
34 MS_CLK 1 2 MS_CLK_R 9 10 0R2J-2-GP
R437 0R2J-2-GP CLK_PCIE_WLAN# 11 12 2N7002DW-7F-GP
PCIE_NBRX_WLANTX_N1 CLK_PCIE_WLAN 13 14 1 2
13 PCIE_NBRX_WLANTX_N1 PLTRST_SYS# 24,50
PCIE_NBRX_WLANTX_P1 15 16 SMBUS_WIRELESS_DAT
13 PCIE_NBRX_WLANTX_P1 HOST_DEBUG_TX 34
R821
0R2J-2-GP
PCIE_NBTX_C_WLANRX_N1 34 HOST_DEBUG_RX WLAN_SMBCLK
13 PCIE_NBTX_C_WLANRX_N1 17 18
13 PCIE_NBTX_C_WLANRX_P1 PCIE_NBTX_C_WLANRX_P1 MS_CLK_R 19 20 WLAN_RADIO_OFF# WLAN_SMBDATA
21 22 WLAN_PCIE_RST#
PCIE_WLAN_DET# PCIE_NBRX_WLANTX_N1 23 24
20 PCIE_WLAN_DET# PCIE_NBRX_WLANTX_P1 25 26
27 28
29 30 WLAN_SMBCLK USBP4-_L R813 1 2 0R3-0-U-GP USBP4- 20
PCIE_NBTX_C_WLANRX_N1 31 32 WLAN_SMBDATA USBP4+_L R814 1 2 0R3-0-U-GP USBP4+ 20
PCIE_NBTX_C_WLANRX_P1 33 34 USB_WLAN_DET#
USBP4-_L MS_DATA_R R820 1 USB_WLAN_DET# 21
C 35 36 2 0R2J-2-GP MS_DATA 34
C
PCIE_WLAN_DET# 37 38 USBP4+_L MS_DATA_R R407 1 2 0R2J-2-GP WIMAX_LED
39 40 USB_WLAN_DET# LED_WLAN_OUT# DY
MS_DATA_R LED_WLAN_OUT# 38
+3.3V_WLAN 41 42
GAP-OPEN-PWR 43 44 LED_WLAN_OUT#
+5V_RUN G44 1 2 +5V_DBG_RUN +5V_DBG_RUN 45 46
47 48
49 50

DLW21SN900SQ2LUGP
+3.3V_ALW G43 1 2 +3.3V_DBG_ALW +3.3V_DBG_ALW 51 52

1
NP2 C942
GAP-OPEN-PWR 54 EL4 SC4700P50V2KX-1GP

2
SKT-MINI52P-6-GP DY WLAN NOISE
62.10043.261
Close to Pin 40

3
Mini Card Connector 1(WWAN/WPAN) +3.3V_RUN
+3.3V_RUN

34 SMBUS_WIRELESS_CLK
Close to WWAN connect Close to WWAN connect

3
4
+1.5V_RUN +3.3V_RUN
Close to WWAN Pin24
Q50 RN39
+3.3V_RUN SRN2K2J-1-GP
1 6
SC33P50V2JN-3GP

SCD047U10V2KX-2GP

2 5

2
1
1

ST220U6D3VDM-20GP

SC33P50V2JN-3GP

SC33P50V2JN-3GP

SCD047U10V2KX-2GP

SCD047U10V2KX-2GP

SCD1U10V2KX-4GP
C940 C936 C937
1

1
TC6 C494 C921 C941 C920 SMBUS_WIRELESS_DAT_R
DY DY 34 SMBUS_WIRELESS_DAT 3 4
DY DY DY DY DY
2

2
2N7002DW-7F-GP

SMBUS_WIRELESS_CLK_R

B B

+3.3V_RUN
X01
0R2J-2-GP

1
R445
24,35 PCIE_WAKE# 1 2 MINI2_WAKE#
15"MiniCard WWAN connector R698
100KR2J-1-GP DY WWAN_RADIO_DIS# 35

2
MINICARD2 +3.3V_RUN +1.5V_RUN

2
53
NP1 WWAN_RADIO_DIS#_R 3 D53
MINI2_WAKE# 1 2 BAT54A-3

WWAN_CLKREQ# COEX3_WLAN_ACTIVE 3 4
6 WWAN_CLKREQ# COEX1_BT_ACTIVE 5 6

1
CLK_PCIE_WWAN# WWAN_CLKREQ# 7 8 UIM_PWR 1 TP150
6 CLK_PCIE_WWAN# WPAN_RADIO_DIS# 35

DLW21SN900SQ2LUGP
CLK_PCIE_WWAN 9 10 UIM_DATA 1 TP151
6 CLK_PCIE_WWAN
CLK_PCIE_WWAN# 11 12 UIM_CLK 1 TP152

4
CLK_PCIE_WWAN 13 14 UIM_RESET 1 TP153
15 16 UIM_VPP 1 TP154

+3.3V_RUN
X01 DY
17 18
PCIE_NBRX_WANTX_N0 19 20 WWAN_RADIO_DIS#_R Remove SIM card signals. EL5
13 PCIE_NBRX_WANTX_N0 PCIE_NBRX_WANTX_P0 WWAN_PCIE_RST# WWAN_PCIE_RST#
21 22 2 1SB_WWAN_PCIE_RST# 1 TP112
DY

1
13 PCIE_NBRX_WANTX_P0 PCIE_NBRX_WANTX_N0 R819 0R2J-2-GP
23 24
PCIE_NBRX_WANTX_P0 25 26
13 PCIE_NBTX_C_WANRX_N0 PCIE_NBTX_C_WANRX_N0 27 28 1 R816 2 PLTRST_SYS# 24,50
13 PCIE_NBTX_C_WANRX_P0 PCIE_NBTX_C_WANRX_P0 29 30 SMBUS_WIRELESS_CLK_R 0R2J-2-GP
PCIE_NBTX_C_WANRX_N0 31 32 SMBUS_WIRELESS_DAT_R 0R3-0-U-GP
+3.3V_RUN PCIE_NBTX_C_WANRX_P0 33 34 USBP5-_R 1 R817 2 USBP5- 20
+3.3V_RUN 35 36 USBP5-_R USBP5+_R 1 2 USBP5+ 20
PCIE_WWAN_DET# 37 38 USBP5+_R
39 40 USB_WWAN_DET# LED_WWAN_OUT# R818
LED_WWAN_OUT# LED_WWAN_OUT# 38 0R3-0-U-GP
41 42
43 44 R832
1

BT_ACTIVE_WPAN# X01 WIMAX_LED


R393 R392
45
47
46
48 +3.3V_RUN
1
DY 2

100KR2J-1-GP 100KR2J-1-GP 49 50 0R2J-2-GP


51 52
A A
NP2
2

PCIE_WWAN_DET# 54 R397
20 PCIE_WWAN_DET# BT_ACTIVE_WPAN# BT_ACTIVE_K#
1 2 BT_ACTIVE_K# 38
R402 SKT-MINI52P-6-GP
1 2 62.10043.261 0R3-0-U-GP
DY
0R3-0-U-GP <Variant Name>
USB_WWAN_DET#
Close
21 USB_WWAN_DET#
MINICARD1(WLAN)
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Layout Note:
Place resistors close to choke Title
as possible to minimize stubs.
MINI CARD CONN .
Size Document Number Rev
A2 FOOSE-AMD 15.4" SB
Date: Friday, January 04, 2008 Sheet 31 of 53
5 4 3 2 1
5 4 3 2 1

X01
+3.3V_RUN SSID = AUDIO +VDDA
+3.3V_RUN
XTALO_12MHZ 1 2 XTALO_12MHZ_R
Close to pin1 and pin9 R88 100R2F-L1-GP-U
L48
X1

SC1U6D3V2KX-GP
SCD1U10V2KX-4GP
1 2 +3.3V_RUN_I2S_VDD

SC1U6D3V2KX-GP
SC10U6D3V5KX-1GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
+3.3V_RUN BLM21PG600SN1-GP XTALI_12MHZ 2 1

SC1U6D3V2KX-GP
1

2
C704

C201

C701

C688

C613

C610
1

2
SC1U6D3V2KX-GP

SCD1U10V2KX-4GP

C621
C197 C719 C133 XTAL-12MHZ-19GP
DY SCD1U10V2KX-4GP U69 DY SC10U6D3V5KX-1GP SC27P50V2JN-2-GP C98
2

1
1

1
D C658 C654 SC27P50V2JN-2-GP D

1
1 DVDD_CORE AVDD1 25 Change to KDS,
+3.3V_RUN 9 38 P/N:82.30006.081

2
DVDD_CORE AVDD2
40 NC#40/OTP
1 2 3 AUD_AGND AUD_AGND AUD_AGND
C200 SCD1U10V2KX-4GP DVDD_IO AUD_SENSE_A U60
SENSE_A 13
Close to pin3 34 AUD_SENSE_B AUD_AGND
SENSE_B/NC#34 +3.3V_RUN
HEAR PHONE 3 DCVDD DVSS 4

SCD1U10V2KX-4GP
20 SB_AZ_CODEC_BITCLK 6 BITCLK 18 AVDD AVSS 19

SC1U6D3V2KX-GP
PORTA_L 39 AUD_HP_OUT_L 33 12 HPVDD HPVSS 15
20 SB_AZ_CODEC_SDIN0 1 2 SB_AC_SDIN0_R 8 SDI_CODEC PORTA_R 41 AUD_HP_OUT_R 33 5 DBVDD
R589 33R2J-2-GP AUD_AGND
NC#37 37 EXTERNAL MIC

1
20 SB_AZ_CODEC_SDOUT 5 C657 C651 AUD_DOCK_HP_OUT_L_C 24 16 AUD_DOCK_MIC_IN_L_C
SDO AUD_EXT_MIC_L LLINEIN LOUT AUD_DOCK_MIC_IN_R_C
PORTB_L 21 1 2 MIC_IN_L_2 40 ROUT 17
10 22 AUD_EXT_MIC_R C684 1 2SC1U6D3V3KX-1GP AUD_DOCK_HP_OUT_R_C 23
20 SB_AZ_CODEC_SYNC MIC_IN_R_2 40

2
SYNC PORTB_R C683 SC1U6D3V3KX-1GP RLINEIN
VREFOUT_B 28 AUD_VREFOUT_B 40
11 CLK_SCLK 28 13 NC_LHPOUT 1 TP70
20 SB_AZ_CODEC_RST# RESET# 6 CLK_SCLK SCLK LHPOUT
AUD_INT_MIC +3.3V_RUN CLK_SDATA NC_RHPOUT 1 TP72
PORTC_L 23
24 C682
1 2
SC1U6D3V3KX-1GP
INTERNAL MIC AUD_AGND
6 CLK_SDATA 27 SDIN RHPOUT 14
PORTC_R AUD_VREFOUT_C INT_MIC_L_R XTALI_12MHZ I2S_12MHZ
VREFOUT_C 29 1 2 INT_MIC_L_R 33 1 MCLK/XTI CLKOUT 6

2
R593 4K7R2J-2-GP XTALO_12MHZ 2
DY R560 XTO/POR I2S_BCLK
PORTD_L 35
36
AUD_LINE_OUT_L 33 LINE OUT DY10KR2J-3-GP TP74 1 NC_MICIN 22
BCLK 7
PORTD_R AUD_LINE_OUT_R 33 TP73 NC_MICBIAS MICIN I2S_DI#
1 21 MICBIAS DACDAT 8
14 AUD_DOCK_IN_OUT_L 1 2 AUD_DOCK_MIC_IN_L_C 10 I2S_DO

1
PORTE_L AUD_DOCK_IN_OUT_R C686 1 ADCDAT
46 DMIC_CLK PORTE_R 15 2SC1U25V5KX-1GP AUD_DOCK_MIC_IN_R_C 2602_MODE 25 MODE
2 31 C685 SC1U25V5KX-1GP 9 I2S_LRCLK
VOL_UP/DMIC_0/GPIO1 VREFOUT_E/GPIO4 DACLRC

2
4 2 1 2602_CSB 26 11 NC_ADCLRC 1 TP71
VOL_DN/DMIC_1/GPIO2
16 AUD_DOCK_HP_OUT_L 1 2 AUD_DOCK_HP_OUT_L_C
+3.3V_RUN
R559 R558 DY0R2J-2-GP CS# ADCLRC
PORTF_L AUD_DOCK_HP_OUT_R C690 1
C
PORTF_R 17 2SC1U25V5KX-1GP AUD_DOCK_HP_OUT_R_C 10KR2J-3-GP 2602_VMID 20
VMID GND 29 C

SC1U6D3V2KX-GP
2 1 30 C689 SC1U25V5KX-1GP
+3.3V_RUN
R599 DY 10KR2J-3-GP GPIO3 R555

C608
18 Please close to U27 R586 10KR2J-3-GP SSM2602-GP
NC#18 AUD_AGND
33 AUD_EAPD# 47 EAPD/GPIO0/SPDIF_OUT0OR1 NC#19 19 From SB
SPDIF_OUT R588 2 SB_SPKR_R
48 20 PC BEEP 1 2 1 SB_SPKR 20

2
18 SPDIF_OUT SPDIF_OUT0 NC#20 20KR2J-L2-GP SCD1U10V2KX-4GP C693
12 AUD_PC_BEEP 1 2 KBC_BEEP_R 2 1
PCBEEP KBC_BEEP 34
20KR2J-L2-GP SCD1U10V2KX-4GP C696 AUD_AGND AUD_AGND
X01 MONO_OUT 32 From EC

2
43 +3.3V_RUN
GPIO5

SC1U6D3V2KX-GP
44 33 CAP2 R584
GPIO6 CAP2

SC10U6D3V5KX-1GP
45 27 CODEC_VREF 10KR2J-3-GP
GPIO7/SPDIF_OUT1 VREFFILT +3.3V_RUN
2

1
C703

C705

1
AVSS1 26

1
SCD1U10V2KX-4GP
R118 7 42 D14 D13 D15 D16
DY

2
10KR2J-3-GP DVSS AVSS2 AUD_AGND
49 GND AUD_AGND
DY DY DY DY
1

1
92HD71B7X5NLGXA1X8-GP C603
AUD_AGND AUD_AGND AUD_AGND BAV99PT-GP-U BAV99PT-GP-U BAV99PT-GP-U BAV99PT-GP-U
+3.3V_RUN U9

3
X01 +3.3V_RUN
1 2 2 16 VCC 1Y#/1Y 3 DAI_BCLK# 37
R837 0R2J-2-GP SCD1U10V2KX-4GP AUD_AGND 5
1 2 3 Link CIS C598 2Y#/2Y
7
DAI_LRCK# 37
R838 0R2J-2-GP DY +3.3V_RUN 1 2 I2S_BCLK 2
3Y#/3Y
9
DAI_DO# 37
I2S_LRCLK 1A 4Y#/4Y DAI_12MHZ# 37
1 2 1 4 2A 5Y#/5Y 11
B R839 0R2J-2-GP D12 I2S_DO I2S_DI# B

14

14
6 3A 6Y#/6Y 13
1 2 BAV99PT-GP-U U10F U10B AUD_AGND I2S_12MHZ 10
Azalia I/F EMI R840 0R2J-2-GP AUD_AGND 12
4A
5A
1 2 DAI_DI 13 12 DAI_DI_1 3 4 DAI_DI_R 14
37 DAI_DI 6A
R841 0R2J-2-GP
SB_AZ_CODEC_BITCLK 1
35 EN_I2S_NB_CODEC OE1#
TSAHC14PW-GP TSAHC14PW-GP 1 2 DAI_OE2# 15 8
7

7
AUD_AGND OE2# GND
R550
Azalia I/F EMI AUD_AGND AUD_AGND AUD_AGND 1KR2J-1-GP 74HC366D-GP
+VDDA +VDDA AUD_AGND
SB_AZ_CODEC_SDOUT
Place this block
close to Pin13
Internal MIC
1

1
Place this block
1

R582 R600
1

R590 5K1R2F-2-GP 5K1R2F-2-GP close to Pin34


R591 47R2J-2-GP MICROPHONE-38-GP-U1
47R2J-2-GP
DY MIC1
2

AUD_SENSE_A AUD_SENSE_B
DY
2

AUD_INT_MIC-
SB_AZ_CODEC_BITCLK1

2
2

33 AUD_INT_MIC-
1

1
SB_AZ_CODEC_SDOUT1

R583 R581 C691 R602 R598 C710

1
39K2R2F-L-GP 20KR2F-L-GP SC1KP50V2KX-1GP 39K2R2F-L-GP 20KR2F-L-GP SC1KP50V2KX-1GP
2

2 33 AUD_INT_MIC+
AUD_INT_MIC+
AUD_AGND AUD_AGND
2

HP_NB_SENSE DOCK_MIC_DET_R#
AUD_MIC_SWITCH 40 DOCK_HP_DET 35

A <Variant Name> A
AUD_AGND AUD_AGND
DOCK_HP_DET_R#
3

Wistron Corporation
1

C702 C700
MIC_SWITCH

SCD1U10V2KX-4GP SCD1U10V2KX-4GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
DY DY
2

Q73 Q78 Title


4

2N7002DW-7F-GP 2N7002DW-7F-GP
CODEC_92HD71B7
Size Document Number Rev
AUD_HP_NB_SENSE 33,35,40 DOCK_MIC_DET 35
A3 FOOSE-AMD 15.4" SB
AUD_AGND AUD_AGND
Date: Friday, January 04, 2008 Sheet 32 of 53
5 4 3 2 1
5 4 3 2 1

60ohm 100MHz
Close to Pin8 Close to +5V_SPK_AMP
Speaker
3000mA 0.05ohm DC
Pin18
SSID = AUDIO

SC1U6D3V2KX-GP
+5V_SPK_AMP

SCD1U10V2KX-4GP

SC10U6D3V5KX-1GP
+5V_SPK_AMP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
+5V_RUN 1 2

SC10U6D3V5KX-1GP

SCD1U10V2KX-4GP
L2 BLM21PG600SN-1GP SPEAKER_DET# SPK1
21 SPEAKER_DET#

1
C179

C659

C699

C694
C189 8
6

1
C698

C176

C660
AUD_SPK_L2 0R0603-PAD 1 R126 2 AUD_SPK_L2_R 5

2
AUD_SPK_L1 0R0603-PAD 1 R125 2 AUD_SPK_L1_R 4
D AUD_SPK_R2 0R0603-PAD 1 R124 2 AUD_SPK_R2_R 3 D

2
AUD_SPK_R1 0R0603-PAD R123 AUD_SPK_R1_R

18

17

30
1 2 2

9
U68

SC100P50V2JN-3GP

SC100P50V2JN-3GP

SC100P50V2JN-3GP

SC100P50V2JN-3GP
1

PVDD

PVDD

CPVDD

HPVDD

VDD
AUD_AGND 7

1
+5V_SPK_AMP

EC7

EC8

EC5

EC6
AUD_SPK_L1 6 2 AUD_LIN_R 1 2
AUD_SPK_L2 7
OUTL+ SPKR_INR
3 AUD_LIN_L C715 1 2SCD033U16V3KX-GP
AUD_LINE_OUT_R 32 DY DY DY DY MLX-CON6-10-GP-U
OUTL- SPKR_INL AUD_LINE_OUT_L 32
AUD_SPK_R2 19 C662 SCD033U16V3KX-GP 20.F0693.006

2
OUTR-
1

1
AUD_SPK_R1 20
C670 OUTR+ C649 C727
SC1U6D3V2KX-GP SC47P50V2JN-3GP SC47P50V2JN-3GP DYDY +5V_SPK_AMP
2

2
AUD_HP_JACK_R 15 23 AUD_SPK_ENABLE#
40 AUD_HP_JACK_R AUD_HP_JACK_L 16
HPR SPKR_EN#
25 AMP_MUTE# R587 2 9789 1 100KR2J-1-GP
40 AUD_HP_JACK_L HPL MUTE# AUD_HP_EN AUD_AGND AUD_AGND R585 2 0R2J-2-GP
22
Close to Pin9
HP_EN
4 AMP_REGEN R568 2 6040 11 0R2J-2-GP
REGEN +VDDA RUN_ON 17,35,49,50
X01 AUD_AMP_GAIN1 31 10 AMP_C1P 1 2
GAIN1 C1P 9789

1
AUD_AMP_GAIN2 32 12 AMP_C1N C680
SC1U25V6KX-2GP 1KR2F-3-GP GAIN2 C1N
29 SC1U6D3V2KX-GP 6040 C656 SPEAKER_DET#
VOUT

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
C725 R626 24 AUD_BIAS SCD033U16V2KX-GP AUD_SPK_L2_R

2
AUD_HP1_OUT_R1 BIAS AUD_SET AUD_SPK_L1_R
32 AUD_HP_OUT_R 1 2 1 2 26 HP_INR SET 1

SCD033U16V2KX-GP
AUD_HP1_OUT_L1 AUD_SPK_R2_R

CPGND
1 2 1 2 27

CPVSS
32 AUD_HP_OUT_L HP_INL

PGND
PGND

PVSS

C664
AUD_AGND AUD_SPK_R1_R

GND
GND

1
C695

C729

C723
C724 R629

1
SC1U25V6KX-2GP 1KR2F-3-GP

SC270P50V2JN-2GP

SC270P50V2JN-2GP

SC270P50V2JN-2GP

SC270P50V2JN-2GP

SC100P50V2JN-3GP
9789 6040

21
5

28
33

11

13

14

EC20
C738

C737

C736

C733
1st TPA6040A:74.06040.013 MAX9789A-GP R569

2
2nd MAX9789A:74.09789.013 0R2J-2-GP
For EMI

2
C AUD_AGND AUD_AGND AUD_AGND C
NOTE: For MAX9789A
AUD_AGND
No-stuff R585,C656,C664
1 2AUD_CPVSS
stuff R587,R568,R569 C687 SC1U6D3V2KX-GP

+VDDA
+5V_SPK_AMP
AND Gate for HP Mute Function
+VDDA
1

R444

2
100KR2J-1-GP +5V_SPK_AMP
U16 DY C697
NB_HP_MUTE# 1 5 SCD1U10V2KX-4GP
35 NB_HP_MUTE#
2

1
A VCC
8

U48A

2
AUD_INT_NET_2 3 AUD_HP_NB_SENSE 2
+
1 AUD_MIC_BIAS
32,35,40 AUD_HP_NB_SENSE B AUD_AGND R102 U15 DY C692
1
C518
SC2D2U25V5KX-1GP

2 3 4 AUD_NB_MUTE_R# 2 1 SCD1U10V2KX-4GP
- DY

1
GND Y
1

R451 AUD_EAPD# 1 5
100KR2J-1-GP LM358-2-GP 0R2J-2-GP A VCC AUD_AGND
2
4

74AHCT1G08DBVR-GP B AUD_HP_EN
3 4
2

GND Y
2

SNAHC1G08DBVT-GP
AUD_AGND AUD_AGND AUD_AGND
+5V_SPK_AMP
B +VDDA B
+5V_SPK_AMP
Signal inverter for speaker shutdown
1

1
R446
GAIN SETTING R578 R571

2
1
1KR2J-1-GP 100KR2J-1-GP 100KR2J-1-GP
DY RN17
SRN100KJ-6-GP
2

2
AUD_INT_NET_1 AUD_AMP_GAIN1 AUD_AMP_GAIN2
SC2D2U25V5KX-1GP

1
+VDDA

3
4
C517

R577 R567
1

100KR2J-1-GP 100KR2J-1-GP
R450 DY
1

1KR2J-1-GP C514 Q25


2

2
SCD1U10V2KX-4GP
AUD_AGND 4 3
2

SCD1U25V3KX-GP R442 From EC From CODEC


8

AUD_AGND C516 10KR2J-3-GP U48B AUD_AGND AUD_AGND 5 2


35 NB_HP_MUTE# AUD_EAPD# 32
1 2 AUD_INT_NET_3 1 2 5 + AUD_AGND
32 AUD_INT_MIC+
7 AUD_SPK_ENABLE# 6 1 NB_MUTE
AUD_INT_NET_4 INT_MIC_L_R 32
32 AUD_INT_MIC- 1 2 1 2 6 - GAIN1 GAIN2 GAIN
AUD_INT_NET_5
1

C515 10KR2J-3-GP LM358-2-GP 0 0 6dB 2N7002DW-7F-GP


4

R448 SCD1U25V3KX-GP R443


1KR2J-1-GP 0 1 10dB
1 0 15.6dB
2

A
AUD_INT_NET_5 AUD_AGND <Variant Name> A
SC2D2U25V5KX-1GP

1 2 1 1 21.6dB
1
C513

R449 R834
Wistron Corporation
1

1KR2J-1-GP 100KR2J-1-GP
X01 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
2

Title

AUD_AGND AUD_AGND AUDIO AMP/SPEAKER


Size Document Number Rev
A3 FOOSE-AMD 15.4" SB
Date: Friday, January 04, 2008 Sheet 33 of 53
5 4 3 2 1
5 4 3 2 1

+3.3V_ALW +3.3V_ALW
+3.3V_ALW
SSID = KBC X01 +RTC_CELL R359

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC10U6D3V6MX-2GP
1

2
10KR2J-3-GP
R635 C842 C839 C795 C819 C851 C832 C796 C844 C808 C468

1
R656 0R2J-2-GP
4K3R3-U-GP 2+RTC_CELL_R R364 DY DY
1
DY DYR371 SCD1U10V2KX-4GP

2
+5V_RUN 100KR2J-1-GP 10KR2J-3-GP

2
SPI1

1
1
RN52 1 4 CLK_KBD RC_ID C776

2
2 3 DAT_KBD SCD1U16V2KX-3GP EC_SPI_CS# 1 8
CS# VCC

1
SRN4K7J-8-GP EC_FLASH_SPI_DIN 1 2 SPI_SO0 2 7 SPI_HOLD#0
DY

2
RN50 1 CLK_DOCK C846 SPI_WP#0 DO HOLD# SPI_CLK0
4 3 6
D 2 3 DAT_DOCK SC4700P50V2KX-1GP R342 4
WP# DY CLK
5 SPI_SI0 D

2
SRN4K7J-8-GP 15R2J-GP GND DIO

121

116
104
X01

21
44
65
83

52
4
+3.3V_ALW U77 W25X16VSSIG-GP

VTR[1]
VTR[2]
VTR[3]
VTR[4]
VTR[5]
VTR[6]
VTR[7]
VTR[8]
VBAT
RN43 1 4 PBAT_SMBDAT For RC_ID and new SUSPWROK
2 3 PBAT_SMBCLK
SRN2K2J-1-GP +3.3V_ALW
PS/2 INTERFACE MISC INTERFACE
TP36 1 5035_GPIO007 9 19 RC_ID
GPIO007/I2C1D_DATA/PS2_CLK0B GPIO021/RC_ID

1
TP91 1 5035_GPIO010 10 27
+3.3V_ALW GPIO010/I2C1D_CLK/PS2_DAT0B GPIO025/UART_CLK 1.8V_DDR_ON 46 R641
+3.3V_ALW 30 CLK_TP_SIO 75 GPIO110/PS2_CLK2/GPTP-IN6 VCC_PRWGD 49 RUNPWROK 35,50 X01
30 DAT_TP_SIO 76 GPIO111/PS2_DAT2/GPTP-OUT6 GPIO060/KBRST 50 1.2V_SUS_ON 49 10KR2J-3-GP
77 67 EC_FLASH_SPI_CLK 1 2 SPI_CLK0
37 CLK_KBD
78
GPIO112/PS2_CLK1A GPIO101/ECGP_SCLK
68 EC_FLASH_SPI_DO R370 1 215R2J-GP
DY SPI_SI0
37 DAT_KBD DY

2
GPIO113/PS2_DAT1A GPIO102/ECGP_SOUT
1

1
79 69 EC_FLASH_SPI_DIN R373 15R2J-GP FWP#
37 CLK_DOCK GPIO114/PS2_CLK0A GPIO103/ECGP_SIN
8
7
6
5

R649 80 70
37 DAT_DOCK GPIO115/PS2_DAT0A GPIO104/UART_TX HOST_DEBUG_TX 31

1
49D9R2F-GP R639 111 71
JTAG1 RN42 10KR2J-3-GP 41 PBAT_SMBDAT GPIO154/I2C1C_DATA/PS2_CLK1B GPIO105/UART_RX HOST_DEBUG_RX 31 R638
7 SRN10KJ-6-GP 41 PBAT_SMBCLK 112 GPIO155/I2C1C_CLK/PS2_DAT1B GPIO106/nRESET_OUT 72
81 MS_DATA RESET_OUT# 50 JDEBUG
10KR2J-3-GP
DY
2

2
JTAG_PWR GPIO116/MSDATA MS_CLK MS_DATA 31
1 GPIO117/MSCLK 82 MS_CLK 31
92
1
2
3
4

2
GPIO127/A20M SIO_A20GATE 20
2 JTAG_TDI R642 1 C781 JTAG INTERFACE GPIO153/LED3 110 PS_ID 40
+3.3V_ALW

1
SCD1U10V2KX-4GP
3 JTAG_TMS JTAG_TDI 102 114 BAT1_LED#
DY DY GPIO145/I2C1K_DATA/JTAG_TDI GPIO156/LED1 BAT1_LED# 38
10KR2J-3-GP

4 JTAG_CLK JTAG_TDO 103 115 BAT2_LED# TP33


JTAG_TDO JTAG_CLK GPIO146/I2C1K_CLK/JTAG_TDO GPIO157/LED2 FWP# BAT2_LED# 38 1 DOCK_SMB_ALERT# R652
5 105 123 1 210KR2J-3-GP
2 JTAG_TMS GPIO147/I2C1J_DATA/I2C2C_DATA/JTAG_CLK nFWP HOST_DEBUG_TX R358
6 106 1 210KR2J-3-GP
2

JTAG_RST# GPIO150/I2C1J_CLK/I2C2C_CLK/JTAG_TMS HOST_DEBUG_RX R682


8 0 = Reset JTAG I/F 107 JTAG_RST# 1 210KR2J-3-GP
BC_DAT_EMC4002 R683 1 2100KR2J-1-GP
C MLX-CON6-9-GP 1 = Disable GENERAL PURPOSE I/O MS_DATA R664 1 2100KR2J-1-GP C
20.D0198.106 2 MS_CLK R657 1 210KR2J-3-GP
GPIO001 SB_TO_EC_PWRGD 14
FAN PWM & TACH GPIO002 3 DOCK_SMB_ALERT# 37
41 14 NB_VCORE_PWRGD LCD_SMBCLK 1 4 RN51
37 DOCK_POR_RST# GPIO050/FAN_TACH1 GPIO014/GPTP-IN7 NB_VCORE_PWRGD 35
DOCK_POR_RST# 42 15 LOM_SMB_ALERT# LCD_SMBDAT 2 3 SRN8K2J-3-GP
49,50 SUS_ON GPIO051/FAN_TACH2 GPIO015/GPTP-OUT7 LOM_SMB_ALERT# 24
X01 43 GPIO052/FAN_TACH3 GPIO016/GPTP-IN8 16 1.8V_SUS_PWRGD 46
1

45 17 1.2V_RUN_ON LOM_WLAN_SMBCLK 1 4 RN46


37,38 BREATH_LED# GPIO053/PWM0 GPIO017/GPTP-OUT8 1.2V_RUN_ON 45,49
1

R858 46 18 LOM_WLAN_SMBDAT 2 3 SRN2K2J-1-GP


22 SB_ALW_ON GPIO054/PWM1 GPIO020 3.3V_LAN_PWRGD 50
C13 1MR2F-GP 1 5035_GPIO054 47 28
GPIO055/PWM2 GPIO26/GPTP-IN1 CPU_PWRGD_Q 19
SCD1U16V2KX-3GP TP94 EC_SPI_CS# 48 29 ALW_PWRGD_3V_5V SMBUS_WIRELESS_CLK 1 4 RN44
ALW_PWRGD_3V_5V 47
2

GPIO056/PWM3 GPIO27/GPTP-OUT1 SMBUS_WIRELESS_DAT


30 SUSPWROK 39,50 2 3 SRN2K2J-1-GP
2

GPIO30/GPTP-IN2 SIO_SLP_S5#
GPIO31/GPTP-OUT2 31 SIO_SLP_S5# 20
32 CPU_THRM_SMBCLK 1 4 RN45
GPIO032/GPTP-IN3 KBC_BEEP 32 CPU_THRM_SMBDATA
BC-LINK GPIO040/GPTP-OUT3 33 AUX_ON 24 2 3 SRN2K2J-1-GP
+3.3V_ALW 23 34 5035_GPIO041 1
39 BC_CLK_EMC4002 GPIO022/BCM_B_CLK/V_CLK GPIO041 TP93
24 73 5035_GPIO107 1 DOCK_SMB_CLK 1 4 RN49
39 BC_DAT_EMC4002 GPIO023/BCM_B_DAT/V_DATA GPIO107 TP37
1 2 BC_INT#_ECE1099 25 84 DOCK_SMB_DAT 2 3 SRN8K2J-3-GP
39 BC_INT#_EMC4002 GPIO024/BCM_B_INT#/V_FRAME GPIO120 AUX_EN_WOW_LAN 31
R701 100KR2J-1-GP 35 89
BC_DAT_ECE1099 GPIO042/BCM_C_INT# GPIO124/GPTP-OUT5 1.1V_RUN_ON 43
1 2 36 GPIO043/BCM_C_DAT GPIO125/GPTP-IN5 90 1.2V_ALW_SUS_ON 44
R702 100KR2J-1-GP 37 91
BC_DAT_ECE1077 GPIO044/BCM_C_CLK GPIO126 SB_RSMRST# 20 +3.3V_RUN
1 2 30 BC_INT#_ECE1077 38 GPIO045/LSBCM_D_INT# GPIO151/GPTP-IN4 108 CLOCK_EN# 6
R703 100KR2J-1-GP 39 109
30 BC_DAT_ECE1077 GPIO046/LSBCM_D_DAT GPIO152/GPTP-OUT4 SIO_PWRBTN# 20
1 2 BC_DAT_ECE5028 40 SB_TO_EC_PWRGD 2 1
30 BC_CLK_ECE1077 GPIO047/LSBCM_D_CLK
R666 100KR2J-1-GP 85 10KR2J-3-GP R283
35 BC_INT#_ECE5028 GPIO121/BCM_A_INT#
1 2 LPC_LDRQ# 86
R712 DY 100KR2J-1-GP
35 BC_DAT_ECE5028
87
GPIO122/BCM_A_DAT
SMBUS INTERFACE
+3.3V_RUN 35 BC_CLK_ECE5028 GPIO123/BCM_A_CLK
5 1.2V_RUN_ON R677 1 2100KR2J-1-GP
GPIO003/I2C1A_DATA DOCK_SMB_DAT 37
6 SUS_ON R343 1 2100KR2J-1-GP
GPIO004/I2C1A_CLK DOCK_SMB_CLK 37
1 2 IRQ_SERIRQ 7 1.8V_DDR_ON R687 1 2100KR2J-1-GP
B R715 DY 100KR2J-1-GP HOST INTERFACE
GPIO005/I2C1B_DATA
8
LCD_SMBDAT 17
1.1V_RUN_ON R665 1 2100KR2J-1-GP
B
GPIO006/I2C1B_CLK LCD_SMBCLK 17
11 12 1.2V_ALW_SUS_ON R662 1 2100KR2J-1-GP
20 SIO_EXT_SMI# GPIO011/nSMI GPIO012/I2C1H_DATA/I2C2D_DATA CKG_SMBDAT 6,42
20 SIO_RCIN# 54 GPIO061/LPCPD# GPIO013/I2C1H_CLK/I2C2D_CLK 13 CKG_SMBCLK 6,42
JDBG1 +3.3V_ALW LPC_LDRQ# 55 93 LOM_WLAN_SMBDAT 2 1
LDRQ# GPIO130/I2C2A_DATA SB_SMBDATA_LAN 24
7 56 94 LOM_WLAN_SMBCLK 2 1 R239 0R2J-2-GP
19,24,25,26,35 IRQ_SERIRQ SER_IRQ GPIO131/I2C2A_CLK SB_SMBCLK_LAN 24
5 57 95 R222 0R2J-2-GP
14,19,35,50 PLTRST# LRESET# GPIO132/I2C1G_DATA ACAV_IN_NB 37,42
4 MS_DATA 58 96 5035_GPIO140 1
19,23 CLK_PCI_5035 PCI_CLK GPIO140/I2C1G_CLK TP35
3 MS_CLK 59 97
19,24,25,35 LPC_LFRAME# LFRAME# GPIO141/I2C1F_DATA/I2C2B_DATA SMBUS_WIRELESS_DAT 31
DY 2 HOST_DEBUG 1 2 HOST_DEBUG_RX 60 98
19,24,25,35 LPC_LAD0 LAD0 GPIO142/I2C1F_CLK/I2C2B_CLK SMBUS_WIRELESS_CLK 31
R789 0R2J-2-GP 61 99
19,24,25,35 LPC_LAD1 LAD1 GPIO143/I2C1E_DATA CPU_THRM_SMBDATA 9
1 19,24,25,35 LPC_LAD2 62 LAD2 GPIO144/I2C1E_CLK 100 CPU_THRM_SMBCLK 9
6 X01 19,24,25,35 LPC_LAD3 63 LAD3
19,25,26,35 PM_CLKRUN# 64 CLKRUN#
MLX-CON5-10-GP 66 +RTC_CELL
20.D0198.105 20 SIO_EXT_SCI# GPIO100/nEC_SCI D41
DELL PWR SW INF
118 RSVD_RTC 1 TP34 A K
BGPO0 5035_VCI_IN2#
VCI_IN2# 119
CLK_PCI_5035 MASTER CLOCK 120 ALW_ON SDMK0340L-7-F-GP
MEC5035_XTAL1 VCI_OUT ALW_ON 47 EN_CELL_CHARGER_DET#
122 XTAL1 VCI_IN1# 126 EN_CELL_CHARGER_DET# 30 1 2
1

R644 1 2 0R2J-2-GP MEC5035_XTAL2_R 124 127 5035_VCI_IN2# R636 1 2 200KR2J-L1-GP


MEC5035_XTAL2

R695 XTAL2 VCI_IN0# ACAV_IN MAIN_PWR_SW# 39 R627 100KR2J-1-GP


39 EC_32KHZ_OUT 117 GPIO160/32KHZ_OUT VCI_OVRD_IN 128 ACAV_IN 39,42
10R2F-L-GP 1
VCI_IN3# DOCK_PWR_SW# 39
VR_CAP[1]

VSS_RO

+RTC_CELL
X01
VSS[1]
VSS[2]
VSS[3]
VSS[4]
VSS[5]
VSS[7]
VSS[8]
2

AGND

X6
VSS

Remove U37 and C904 from DELL command.


Place close
SC33P50V2JN-3GP

1 4

2
+RTC_CELL +3.3V_ALW MEC5035-NZW-REV-B-GP
to Pin58
1CLK_PCI_5035_R

125

26
51
74
88
113
20
53

129

22

101

A
R680 R669 <Variant Name> A
1

C791 C802 100KR2J-1-GP 100KR2J-1-GP


1

SC33P50V2JN-3GP R676
MEC_AGND

5035_VR_CAP[1]

5035_VSS_RO

2 3
R633 R634 1KR2J-1-GP
Wistron Corporation
2

1
100KR2J-1-GP 100KR2J-1-GP MAIN_PWR_SW# 1 2 POWER_SW#_MB 40 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
X-32D768KHZ-40GPU
1

DOCK_PWR_SW# 1 2 Taipei Hsien 221, Taiwan, R.O.C.


C770 DOCK_PWR_BTN# 37
2

R678
1

C841 1 2 L63 1KR2J-1-GP Title


1

1
SC4D7P50V2CN-1GP BLM18AG121SN-1GP L62 C827 C823
X01 KBC_EMC5035
2

C837 BLM18AG121SN-1GP
SC1U6D3V2KX-GP
DY DYSC1U6D3V2KX-GP
2

SCD1U10V2KX-4GP SC4D7U6D3V3KX-GP Size Document Number Rev


2

A3 FOOSE-AMD 15.4" SB
2

Date: Friday, January 04, 2008 Sheet 34 of 53


5 4 3 2 1
5 4 3 2 1

+3.3V_ALW

SSID = SIO +3.3V_ALW +3.3V_RUN

SCD1U10V2KX-4GP
1

1
+3.3V_RUN

C448
SP_TPM_LPC_EN R403 1 210KR2J-3-GP

1
C917 C910 C883 C923 DY C914 D_CLKRUN# R33 1 2100KR2J-1-GP
Wireless Switch

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
SC4D7U6D3V3KX-GP D_SERIRQ R19 1 2100KR2J-1-GP

2
1
D_DLDRQ1# R25 1 2100KR2J-1-GP

108
SW1 R350

34
57
85
NP1 100KR2J-1-GP U42
1 +3.3V_ALW

VCC1
VCC1
VCC1
VCC1
R828

2
D 2 WIRELESS_ON/OFF#_R 1 2 WIRELESS_ON/OFF# CPU_THERM_ALERT# 1 2 D
3 R360 4K7R2J-2-GP

1
NP2 33R2J-2-GP 97 8 CRT_MUX_SWITCH 1 2
41 PBAT_PRES# GPIOA0 VCC1
C946 98 14 R797 10KR2J-3-GP
SW-SLIDE67-GP SC1U10V3KX-3GP 38 SCRL_LED# GPIOA1 GPIOJ7 DOCK_MIC_DET 32 TP_CABLE_DET#
99 20 CPU_THERM_ALERT# 9 1 2

2
62.40083.001 38 NUM_LED# 5028_GPIOA3 GPIOA2 GPIOK4 R386 100KR2J-1-GP
TP68 1 100 GPIOA3
+3.3V_ALW 101 119
41 PBATT_OFF MDC_RST_DIS# GPIOA4 GPIOI1 1.8V_RUN_ON 49
29 MDC_RST_DIS# 102 GPIOA5
R315 1 2100KR2J-1-GP PWR_BTN_BD_DET# PCIE_WAKE# 103 +3.3V_SUS
24,31 PCIE_WAKE# GPIOA6
R793 1 2100KR2J-1-GP SLICE_BAT_PRES# ESATA_USB_PWR_EN# 104 9 5028_GPIOJ2 1 TP66 X01
R408 30 ESATA_USB_PWR_EN# GPIOA7 GPIOJ2
1 210KR2J-3-GP PCIE_WAKE#
GPIOJ3 10 5028_GPIOJ3 1 TP65
R794 1 2100KR2J-1-GP DELL_ESATA_PWR_EN# X01 WIRELESS_ON/OFF# 24 13 2.5V_RUN_PWRGD 1 2
R228 GPIOH0 GPIOJ6 DOCK_HP_DET 32
1 2100KR2J-1-GP NB_HP_MUTE#
31 WPAN_RADIO_DIS# 25 12 R178 10KR2J-3-GP
R842 1 2100KR2J-1-GP CELL_CHARGER_DET# 1 5028_GPIOH4 26
GPIOH1 GPIOJ5
15 SBAT_DSCHG_EN1 TP62CRT_MUX_SWITCH 18
TP58 GPIOH4 GPIOK0
R468 1 210KR2J-3-GP DOCK_DET# 1 5028_GPIOH5 27 16 NB_AC_OFF
TP59 GPIOH5 GPIOK1 NB_AC_OFF 40,41,42
58 19 DP_PRIORITY1 TP60
+3.3V_ALW_2 34 BC_INT#_ECE5028 BC_INT# GPIOK3
X01 34 BC_DAT_ECE5028 59 BD_DAT GPIOK2 18 2.5V_RUN_PWRGD 39,50 LOM solution selection
34 BC_CLK_ECE5028 60 BC_CLK GPIOK5 21 RUN_ON 17,33,49,50
R769 1 2100KR2J-1-GP USB_SIDE_EN# 22
R808 1 GPIOK6 1.5V_RUN_ON 45 +3.3V_ALW
2100KR2J-1-GP ESATA_USB_PWR_EN#
30 COMRXD0
COMRXD0 TP109 1 COMRXD0 1 GPIOE0/RXD
COMTXD0 TP108 1 COMTXD0 2 R394 0R2J-2-GP
30 COMTXD0 GPIOE1/TXD
COMRTS0# TP106 1 COMRTS0# 3 125 CPU_VCORE_ENABLE_R 1 2
30 COMRTS0# GPIOE2/RTS# GPIOI6 CPU_VCORE_ENABLE 48

2
+RTC_CELL COMDSR0# TP105 1 COMDSR0# 4 124
30 COMDSR0# GPIOE3/DSR# GPIOI5 CPU_VCORE_PWRGD 48,50
COMCTS0# TP104 1 COMCTS0# 5 120 R395
30 COMCTS0# GPIOE4/CTS# GPIOI2 0.9V_DDR_VTT_ON 46
R356 1 210KR2J-3-GP DOCK_DET# COMDTR0# TP103 1 COMDTR0# 84 86 CAP_LDO 5761 10KR2J-3-GP
DY 30 COMDTR0#
COMRI0# TP102 1 COMRI0# 83
GPIOE5/DTR# CAP_LDO
127 DP_MUX_PD
+3.3V_RUN 30 COMRI0# GPIOE6/RI# GPIOJ0
COMDCD0# TP107 1 COMDCD0# 6
30 COMDCD0#

1
GPIOE7/DCD#

1
DP_MUX_PD
R372 1 2100KR2J-1-GP AUD_HP_NB_SENSE 65 R766 C479
30,40 USB_SIDE_EN# GPIOB0/INIT#

2
C TP100 1 EN_I2S_NB_CODEC 66 35 TEST_PIN 1 2 SC4D7U6D3V3KX-GP C

2
RN38 32 EN_I2S_NB_CODEC CB_HWSPND# GPIOB1/SLCTIN# TEST_PIN 1KR2F-3-GP R396
26 CB_HWSPND# 67 GPIOC2/SLCT
1 4 HDDC_EN EN_DOCK_PWR_BAR 68 5756 10KR2J-3-GP
2 3 ODD_EN 0R2J-2-GP 41 EN_DOCK_PWR_BAR ADAPT_OC 69
GPIOC3/PE
126 DOCK_AC_OFF_EC
R776 42 ADAPT_OC GPIOC4/BUSY GPIOI7 DOCK_AC_OFF_EC 37
X01 70

1
GPIOC5/ACK#
1 2 71
SRN100KJ-6-GP
20 HDT_RESET# DY 73
GPIOC6/ERROR#
123
17 LCD_TST 40 PS_ID_DISABLE# GPIOC7/ALF# GPIOI4 SIO_SLP_S3# 20
PANEL_BKEN 74 122
+3.3V_ALW 14 PANEL_BKEN GPIOD0/STROBE# GPIOI3 3.3V_RUN_ON 49
DOCKED 75
24 DOCKED GPIOC1/PD7
DOCK_DET# 76
37,41 DOCK_DET# GPIOC0/PD6
NB_HP_MUTE# 77
33 NB_HP_MUTE# GPIOB7/PD5
1

CELL_CHARGER_DET# 78 54
30 CELL_CHARGER_DET# GPIOB6/PD4 LAD0 LPC_LAD0 19,24,25,34
R317 79 52 EC_NB_PWRGD 1 DY 2
100KR2J-1-GP 17 LCD_VCC_TEST_EN GPIOB5/PD3 LAD1 LPC_LAD1 19,24,25,34
1 5028_GPIOB4 80 49 R792 100KR2J-1-GP
TP61 GPIOB4/PD2 LAD2 LPC_LAD2 19,24,25,34
81 47 0.9V_DDR_VTT_ON 1 2
32,33,40 AUD_HP_NB_SENSE GPIOB3/PD1 LAD3 LPC_LAD3 19,24,25,34
1 DELL_ESATA_PWR_EN# 82 42 R406 100KR2J-1-GP
LPC_LFRAME# 19,24,25,34
2

LID_CL_SIO# TP101 GPIOB2/PD0 LFRAME# DP_PRIORITY


LRESET# 41 PLTRST# 14,19,34,50 1 2
61 56 R366 DY 100KR2J-1-GP
30 LID_CL_SIO# GPIOD1 PCICLK CLK_PCI_5028 19,23
1

62 GPIOD2 CLKRUN# 37 PM_CLKRUN# 19,25,26,34


C864 R685 46 RN55
SCD047U10V2KX-2GP LDRQ0# LPC_LDRQ0# 19 RUN_ON
43,50 1.1V_RUN_PWRGD 1 2 63 44 1 8
2

GPIOD3 LDRQ1# LPC_LDRQ1# 19 1.5V_RUN_ON


28 GPIOD4 SER_IRQ 39 IRQ_SERIRQ 19,24,25,26,34 2 7
0R2J-2-GP 29 3.3V_RUN_ON 3 6
GPIOD5 1.8V_RUN_ON
34 NB_VCORE_PWRGD 49 HDDC_EN 30 GPIOD6 4 5
49 ODD_EN 31 GPIOD7 14_318MHZ 64 CLK_SIO_14M 6
+3.3V_ALW SRN100KJ-5-GP
SLICE_BAT_PRES# 32 96
37 SLICE_BAT_PRES# GPIOH6 VSS
40 PWR_BTN_BD_DET# 33 GPIOH7
1

B R774 LOM_LOW_PWR B
24 LOM_LOW_PWR 88 GPIOG0
10KR2J-3-GP 89 55
38 CAP_LED# GPIOG1 DLAD0 D_LAD0 37
1 5028_GPIOG2 90 53
TP63 GPIOG2 DLAD1 D_LAD1 37
R381 1.1V_RUN_PWRGD 91 50
43,50 1.1V_RUN_PWRGD D_LAD2 37
2

SIO_EXT_WAKE#_1 GPIOG3 DLAD2


20 SIO_EXT_WAKE# 1 2 92 GPIOG4 DLAD3 48 D_LAD3 37
HDT_RESET# SB_PME# 93 43 Place closely pin 64 Place closely pin 56
20 SB_PME# GPIOG5 DLFRAME# D_LFRAME# 37
SC1U10V3KX-3GP

SC1U10V3KX-3GP

0R2J-2-GP SB_PCIE_WAKE# 94 38
20 SB_PCIE_WAKE# GPIOG6 DCLKRUN# D_CLKRUN# 37
1

1
C905

C902

WLAN_RADIO_DIS# 95 45 CLK_SIO_14M CLK_PCI_5028


31 WLAN_RADIO_DIS# GPIOG7 DLDRQ1# D_DLDRQ1# 37
R777 40
DSER_IRQ D_SERIRQ 37

1
100KR2J-1-GPDY R400 106
2

31 WWAN_RADIO_DIS# LOM_CABLE_DETECT_R 107 SYSOPT1/GPIOH2 RUNPWROK R763 R762


24 LOM_CABLE_DETECT 1 2 SYSOPT0/GPIOH3 PWRGD 7 RUNPWROK 34,50
10R2F-L-GPDY 6D8R2F-GP
2

0R2J-2-GP 109 105


24 LOM_TPM_EN# GPIOF7 OUT65 TP64 SP_TPM_LPC_EN 25
110 1

1CLK_SIO_14M_R 2

1CLK_PCI_5028_R 2
24 LOM_SUPER_IDDQ VGA_IDENTIFY GPIOF6
111 GPIOF5
CHIPSET_ID1 112 11 PSID_SELECT
GPIOF4 GPIOJ4 PSID_SELECT 40
VSS 17
R809 TP110 1 5028_IRTX 113 23 EC_NB_PWRGD
+3.3V_ALW IRRX IRTX GPIOK7 EC_NB_PWRGD 14
1 2 114 36
+3.3V_ALW Board ID 10KR2J-3-GP CHIPSET_ID0
IRRX VSS
VSS 51
115 GPIOF3/IRMODE/IRRX3B VSS 72
10KR2J-3-GP

X01 BID2 116 87


GPIOF2/IRTX2 VSS
1

1
10KR2J-3-GP

10KR2J-3-GP

BID1 117 121


GPIOF1/IRRX2 VSS
1

R810

R412 BID0 118 128 C890 DY EC15


GPIOF0/IRMODE/IRRX3A GPIOJ1 TP_CABLE_DET# 30
R418

R416

R414 DY 10KR2J-3-GP SC10P50V2JN-4GP SC4D7P50V2CN-1GP

2
DY DY 10KR2J-3-GP MB VERSION ID
2

2
2

BID2 CHIPSET_ID0
A
BID1 CHIPSET_ID1
BID2 BID1 BID0 REV ECE5028-NU-GP
<Variant Name> A

BID0 VGA_IDENTIFY
10KR2J-3-GP

10KR2J-3-GP

100KR2J-1-GP

10KR2J-3-GP

0 0 0 X00 Wistron Corporation


1

CHIPSET_ID1 CHIPSET_ID0 NOTE 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
R419

R417

R811

R812

R415 R413
10KR2J-3-GP Taipei Hsien 221, Taiwan, R.O.C.
DY DY 10KR2J-3-GP 0 0 1 X01
0 0 Intel CPU and Intel chipset Title
2

0 1 0 X02 EMC-5028
Size Document Number Rev
0 1 AMD CPU and AMD chipset
0 1 1 A00 A3 FOOSE-AMD 15.4" SB
Date: Friday, January 04, 2008 Sheet 35 of 53
5 4 3 2 1
5 4 3 2 1

+3.3V_ALW
X01

SSID = Docking

1
U95
C954 5 1
VCC A ACAV_IN_NB 34,42

4
SCD1U10V2KX-4GP

4
2 L69 L70 L73
B DOCK_AC_OFF_EC 35 ACM2012H-900-GP ACM2012H-900-GP ACM2012H-900-GP L74
DOCK_AC_OFF 4 3 ACM2012H-900-GP
Y GND
SNLVC1G08DCKRG4-GP

3
+DOCK_PWR_BAR
DOCK1 0R2J-2-GP 0R2J-2-GP
D 145 R867 R869 D
1 DY 2 DPB_LANE_P0_EL DPC_LANE_P0_EL 1 DY 2
13 DPB_LANE_P0_C DPB_LANE_N0_EL DPC_LANE_N0_EL DPC_LANE_P0_C 13
153 160 1 DY 2 1 DY 2

1
13 DPB_LANE_N0_C R866 R864 R868 R865 DPC_LANE_N0_C13
147 C10 0R2J-2-GP 1 DY 2 0R2J-2-GP DPB_LANE_P1_EL DPC_LANE_P1_EL 0R2J-2-GP 1 DY 2 0R2J-2-GP
SCD1U50V3KX-GP 13 DPB_LANE_P1_C DPB_LANE_N1_EL DPC_LANE_N1_EL DPC_LANE_P1_C 13
1 DY 2 1 DY 2

2
13 DPB_LANE_N1_C 0R2J-2-GP R870 0R2J-2-GP 0R2J-2-GP R871 0R2J-2-GP DPC_LANE_N1_C13
+DOCK_PWR_BAR 148 146
R873 1 DY 2 DPB_LANE_P2_EL DPC_LANE_P2_EL R876 1 DY 2
DOCK_AC_OFF 13 DPB_LANE_P2_C DPB_LANE_N2_EL DPC_LANE_N2_EL DPC_LANE_P2_C 13
1 2 13 DPB_LANE_N2_C 1 DY 2
R874 R878
1 DY
R875
2
R880 DPC_LANE_N2_C 13
161
3 4 0R2J-2-GP 1 DY 2 0R2J-2-GP DPB_LANE_P3_EL DPC_LANE_P3_EL 0R2J-2-GP 1 DY 2 0R2J-2-GP
24 DOCK_LOM_SPD10LED_GRN# DPB_DOCK_CA_DET DPC_CA_DET DOCK_LOM_SPD100LED_ORG# 24 13 DPB_LANE_P3_C DPB_LANE_N3_EL DPC_LANE_N3_EL DPC_LANE_P3_C 13
5 6 13 DPB_LANE_N3_C 1 DY
R877
2
0R2J-2-GP
1 DY
R879
2
0R2J-2-GP DPC_LANE_N3_C 13
7 8
NP1
DPB_LANE_P0_EL 9 10 DPC_LANE_P0_EL X01
X01 DPB_LANE_N0_EL 11 12 DPC_LANE_N0_EL

4
13 14
DPB_LANE_P1_EL 15 16 DPC_LANE_P1_EL L71 L72 L75 L76
DPB_LANE_N1_EL 17
19
18
20
DPC_LANE_N1_EL ACM2012H-900-GP ACM2012H-900-GP Close to DOCK1 ACM2012H-900-GP ACM2012H-900-GP

DPB_LANE_P2_EL 21 22 DPC_LANE_P2_EL
DPB_LANE_N2_EL 23 24 DPC_LANE_N2_EL
25 26
DPB_LANE_P3_EL 27 28 DPC_LANE_P3_EL
DPB_LANE_N3_EL 29 30 DPC_LANE_N3_EL

3
X01 31 32
DPB_DOCK_AUX_SW 33 34 DPC_DOCK_AUX_SW
DPB_DOCK_AUX#_SW 35 36 DPC_DOCK_AUX#_SW
R70 37 38 R68
1 2 DPB_DOCK_HPD 39 40 DPC_DOCK_HPD_R 1 2
14 DPB_HPD DPC_DOCK_HPD 14
+NBDOCK_DC_IN_SS 41 42 ACAV_DOCK_SRC# 41
1

1
20KR2J-L2-GP 43 44 20KR2J-L2-GP
R28 45 46 R5 +3.3V_RUN +3.3V_RUN
18 BLUE_DOCK DAT_DDC2_DOCK 18
100KR2J-1-GP 47 48 100KR2J-1-GP
CLK_DDC2_DOCK 18
49 50

2
2

2
R422 R410
154 159 2K2R2F-GP 2K2R2F-GP
X01
162

1
51 52 Q8
C 53 54 SATA_TX3+_C SCD01U50V2KX-1GP 1 2 C22 SATA_RX3+ 21 C
18 RED_DOCK
55 56 SATA_TX3-_C SCD01U50V2KX-1GP 1 2 C23 SATA_RX3- 21 1 6
57 58 Dock eSATA
59 60 SATA_RX3+_C SCD01U50V2KX-1GP 1 2 C6 SATA_TX3+_R 21 2 5
18 GREEN_DOCK
61 62 SATA_RX3-_C SCD01U50V2KX-1GP 1 2 C7 SATA_TX3-_R 21
63 64 3 4 X01
65 66 USBP8+ 20 DPB_DOCK_AUX_Q
18 HSYNC_DOCK
18 VSYNC_DOCK 67 68 USBP8- 20
69 70 Q7 2N7002DW-7F-GP
34 CLK_DOCK 71 72 USBP9+ 20

1
73 74 USBP9- 20 C24 1 6 DPB_DOCK_AUX_SW DPB_DOCK_AUX_G
34 DAT_DOCK
SCD1U16V2KX-3GP

D G S

S G D
75 76

1
77 78 2 5 DPB_DOCK_AUX#_SW
32 DAI_BCLK# CLK_KBD 34

2
79 80 R18 R21
32 DAI_LRCK# DAT_KBD 34 100KR2J-1-GP
81 82 14 DPB_DOCK_AUX 3 4 DY 100KR2J-1-GP
+3.3V_RUN
+15V_ALW +15V_ALW
32 DAI_DI 83 84
32 DAI_DO# 85 86

1
87 88 2N7002DW-7F-GP
89 90 R12 R26
32 DAI_12MHZ#

1
SCD1U16V2KX-3GP
91 92 100KR2J-1-GP 100KR2J-1-GP X01
93 94 R1 R7 Q6
100KR2J-1-GPDY 100KR2J-1-GP

2
Q3 1 6 DPB_DOCK_CA_DET#

1
C14

D G S

S G D
155 158 X01

2
1 6 2 5

D G S

S G D
163

2
95 96 2 5 DPB_DOCK_AUX_G 3 4 +3.3V_RUN +3.3V_RUN
35 D_LAD0 97 98 BREATH_LED# 34,38
35 D_LAD1 99 100 DOCK_LOM_ACTLED_YEL# 24 14 DPB_DOCK_AUX# 3 4

2
SCD1U16V2KX-3GP
101 102 2N7002DW-7F-GP
103 104 X01 R465 R463
35 D_LAD2 DOCK_LOM_TRD0+ 24
105 106 2N7002DW-7F-GP DPB_DOCK_CA_DET 2K2R2F-GP 2K2R2F-GP
35 D_LAD3 DOCK_LOM_TRD0- 24

1
107 108 C21

D
35 D_LFRAME# 109 110

1
DOCK_LOM_TRD1+ 24 +2.5V_LOM
SCD1U16V2KX-3GP DPB_DOCK_AUX#_Q Q9
35 D_CLKRUN# 111 112

2
DOCK_LOM_TRD1-
C4 24
113 114 DY
35 D_SERIRQ 115 116 1 2 G 1 6
35 D_DLDRQ1# 117 118 1 2
119 120 C12 Q1 2 5

S
CLK_PCI_DOCK 121 122 SCD1U16V2KX-3GP 2N7002-7F-GP
19 CLK_PCI_DOCK DOCK_LOM_TRD2+ 24
123 124 DOCK_LOM_TRD2- 24 3 4
1

SCD1U16V2KX-3GP
B 125 126 DPC_DOCK_AUX_Q B

1
R35 DY 127 128
34 DOCK_SMB_CLK DOCK_LOM_TRD3+ 24
10R2F-L-GP 129 130 R6 DY Q12 2N7002DW-7F-GP
34 DOCK_SMB_DAT DOCK_LOM_TRD3- 24
131 132 470R2F-GP

1
133 134 +3.3V_RUN C48 1 6 DPC_DOCK_AUX_SW DPC_DOCK_AUX_G
34 DOCK_SMB_ALERT# DOCK_DCIN_IS+ 42
2

Q10

D G S

S G D
40 DOCK_PSID 135 136 DOCK_DCIN_IS- 42

1
+3.3V_RUN DPC_DOCK_AUX#_SW
CLK_PCI_DOCK_RC

137 138 2N7002-7F-GP 2 5

2
1
139 140 DOCK_RST# 1 2 DY G
34 DOCK_PWR_BTN# PCI_RST# 19,26
141 142 R843 0R2J-2-GP R39 3 4 DY R15 R8 +15V_ALW +15V_ALW
14 DPC_DOCK_AUX
35 SLICE_BAT_PRES# 143 144 X01 1 DY 2 DY 2K49R2F-GP 100KR2J-1-GP 100KR2J-1-GP

S
R844 0R2J-2-GP DOCK_POR_RST# 34
NP2

1
164 2N7002DW-7F-GP
DOCK_DET# 35,41
2

+DOCK_PWR_BAR 149 151 R14 R4

1
100KR2J-1-GP 100KR2J-1-GP
1

SCD1U16V2KX-3GP
150 +DOCK_PWR_BAR R16 R9 Q4
R43 100KR2J-1-GPDY 100KR2J-1-GP

2
1

EC4 156 157 DY 649R2F-GP Q17 1 6 DPC_CA_DET#


1

1
SC4D7P50V2CN-1GP DY C19

D G S

S G D
X01

2
152 C11 1 6 2 5
2

SCD1U50V3KX-GP

D G S

S G D
2

2
JAE-CONN144D-GP-U1 2 5 DPC_DOCK_AUX_G 3 4

14 DPC_DOCK_AUX# 3 4

SCD1U16V2KX-3GP
DOCK_LOM_TRD1+ 2N7002DW-7F-GP
24 DOCK_LOM_TRD1+
DOCK_LOM_TRD1-
24 DOCK_LOM_TRD1-

1
DOCK_LOM_TRD2+ C49 2N7002DW-7F-GP DPC_CA_DET
24 DOCK_LOM_TRD2+
DOCK_LOM_TRD2-
24 DOCK_LOM_TRD2-
DOCK_LOM_TRD3- EC1 1 DY2 SC4D7P50V2CN-1GP X01

D
24 DOCK_LOM_TRD3- 24 DOCK_LOM_TRD0+

2
EC2 1 DY2 SC4D7P50V2CN-1GP
24 DOCK_LOM_TRD0-
EC3 1 DY2 SC4D7P50V2CN-1GP DPC_DOCK_AUX#_Q
24 DOCK_LOM_TRD3+
1

1
C8

C9
C18

C17

C16

DY
SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

DY DY DY DY DY G
2

Q21
S

2N7002-7F-GP
1

DY R75
470R2F-GP
A A

For ESD For ESD


D

+3.3V_RUN
DY
1

D6 D5 G
DPC_DOCK_HPD_R 10 1 DPC_DOCK_HPD_R DPB_DOCK_HPD 10 1 DPB_DOCK_HPD R60
DPC_CA_DET NC#10 TMDS_D2+ DPC_CA_DET DPB_DOCK_CA_DET NC#10 TMDS_D2+ DPB_DOCK_CA_DET 2K49R2F-GP Q16 <Variant Name>
9 2 9 2 DY
S

TMDS_D2- NC#2 TMDS_D2- NC#2 2N7002-7F-GP


DPC_DOCK_AUX_SW
8
7
DY
TMDS_GND TMDS_VDD 3
4 DPC_DOCK_AUX_SW
+5V_RUN 8
7
DY
TMDS_GND TMDS_VDD 3
4 DPB_DOCK_AUX_SW
+5V_RUN

Wistron Corporation
2

DPC_DOCK_AUX#_SW NC#7 TMDS_D1+ DPC_DOCK_AUX#_SW DPB_DOCK_AUX#_SW NC#7 TMDS_D1+


6 TMDS_D1- NC#5 5 6 TMDS_D1- NC#5 5
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1

IP4280CZ10-GP IP4280CZ10-GP Taipei Hsien 221, Taiwan, R.O.C.


R59
649R2F-GP
DY Title

Close to DOCK1 Close to DOCK1 Docking Conn


2

Size Document Number Rev


A2 FOOSE-AMD 15.4" SB
Date: Friday, January 04, 2008 Sheet 36 of 53
5 4 3 2 1
5 4 3 2 1

SSID = User.interface +3.3V_RUN LED BD Connetor

SCD1U10V2KX-4GP
LED Location from left to right
LED Board

1
C678 LEDB1
HDD BATTERY WLAN BLUE TOOTH WWAN 13
FP1

2
7 1
R97 1
0R3-0-U-GP BAT1_LED_AMBER_R 2
20 USBP10- 1 2 Biometric_USBP- 2 BAT2_LED_BLUE_R 3
D 20 USBP10+ 1 2 Biometric_USBP+ 3 4 D
R95 4 BT_LED_B 5
0R3-0-U-GP 5 6
6 LED_WLAN_OUT_B 7
19 BIO_DET#
8 8
9
MLX-CON6-11-GP HDD_LED_B 10
3

4
20.K0227.006 LED_WWAN_OUT_B 11
EL1 12
21 LED_BD_DET#
DLW21SN900SQ2LUGP
14
DY MLX-CON12-11GP
20.K0227.012

Biometric Connector
2

+3.3V_ALW

+5V_ALW
X01 SCRLK LED

1
+3.3V_ALW
X01 Power & Suspend LED
Q56 R857
R2
R461 E 200KR2J-L1-GP
SCRL_LED_R# B R458 LED3 BREATH_PWRLED#

14
35 SCRL_LED# 1 2 R1
C SCRLK_LED 2 1LED_SCRLK_R A K U85F

3
C 20KR2J-L2-GP C
DDTA143ECA-7-F-GP 330R2J-3-GP LED-B-98-GP 13 12 BREATH_PWRLED 1 2BREATH_PWRLED_R 1 Q65
+5V_ALW 34,37 BREATH_LED#
MMBT3904-7-F-GP
R524
CAPS LED

2
1
Q53 SSAHC14PWR-GP 10KR2J-3-GP

7
R2
R459 E C587
1 2 CAP_LED_R# B R453 LED2 SC1U6D3V2KX-GP
35 CAP_LED#

2
R1
C CAP_LED 2 1LED_CAP_R A K X01
20KR2J-L2-GP
DDTA143ECA-7-F-GP 330R2J-3-GP LED-B-98-GP
+5V_ALW

NUM LED Q55


R460
R2
E +5V_ALW
NUM_LED_R# R454 Q93 BREATH_PWRLED_B 40
35 NUM_LED# 1 2 B R1 LED1 R2
C NUM_LED 2 1LED_NUM_R A K E
20KR2J-L2-GP B R856
R1
DDTA143ECA-7-F-GP 330R2J-3-GP LED-B-98-GP C 1 2 BREATH_LED_PANEL_B 17
DDTA143ECA-7-F-GP 330R2J-3-GP

1
DY C958
SCD1U10V2KX-4GP
Bluetooth LED

2
+5V_RUN
Q26
R2
R104 E
B 31 BT_ACTIVE_K#
BT_ACTIVE_K# 1 2BT_ACT_K_R# B R1
R100 HDD LED B
C BT_LED_R 2 1 BT_LED_B
20KR2J-L2-GP
DDTA143ECA-7-F-GP 330R2J-3-GP
+5V_RUN
X01
Q70
WLAN LED R566
R2
E
1 2 SATA_ACT_C# B
+5V_RUN 21 SATA_LED# R1
C HDD_LED 2 1 HDD_LED_B
Q27 20KR2J-L2-GP R565 330R2J-3-GP
R2
R833 E DDTA143ECA-7-F-GP
K A 1 2 LED_WLAN_OUT_R# B R99
31 LED_WLAN_OUT# R1
D17 C LED_WAN_OUT_R2 1 LED_WLAN_OUT_B
SDMK0340L-7-F-GP 20KR2J-L2-GP
DDTA143ECA-7-F-GP 330R2J-3-GP

X01 Battery LED. WWAN LED


+5V_ALW
+5V_RUN
Q29 Q72
R2 R2
R106 E R576 E
1 2BAT2_LED_R# B R98 1 2 LED_WWAN_OUT_R# B R570
34 BAT2_LED# R1
C BAT2_LED 2 1 BAT2_LED_BLUE_R
31 LED_WWAN_OUT# DY DY
R1
C LED_WWAN_OUT_R 2 1 LED_WWAN_OUT_B
20KR2J-L2-GP AMBER BAT2_LED_BLUE_R 17 20KR2J-L2-GP DY
DDTA143ECA-7-F-GP 330R2J-3-GP DDTA143ECA-7-F-GP 330R2J-3-GP

+5V_ALW
A
Q28 <Variant Name> A
R2
R105 E
34 BAT1_LED# 1 2BAT1_LED_R# B R1
R101
BAT1_LED BAT1_LED_AMBER_R
20KR2J-L2-GP BLUE
C 2 1 BAT1_LED_AMBER_R 17 Wistron Corporation
DDTA143ECA-7-F-GP 330R2J-3-GP X01 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
BOARD to BOARD
Size Document Number Rev
A3 FOOSE-AMD 15.4" SB
Date: Friday, January 04, 2008 Sheet 37 of 53
5 4 3 2 1
5 4 3 2 1

SSID = THERMAL Place close to the


Diode circuit at DP4/DN4 is used for skin temp
sensor (placed optimally between CPU, MCH and
REM_DIODE3_N, REM_DIODE3_P routing together. Guardian pins as
Trace width / Spacing = 10 / 10 mil possible
GPU).
Place near the bottom SODIMM

SC100P50V2JN-3GP

C726
X01

1
1
C251 1
34 BC_DAT_EMC4002
1.Place under CPU 1 2 SC2200P50V2KX-2GP Q77
34 BC_CLK_EMC4002 42 ISL88731_ICM DY

2
D 2.Place CAP close to Q24 R160 MMBT3904-7-F-GP D

2
4K7R2J-2-GP

SC100P50V2JN-3GP
CAP close to diode
U31

1
C150 C235
Q24 1 SC2200P50V2KX-2GP 10
MMBT3904-7-F-GP SMDATA/BC-LINK_DATA
Close to the 11 39
DY
2

2
SMBCLK/BC-LINK-CLK VIN1
NPN Guardian pins 48 Place close to the

2
VCP1 SYS_MON
VCP2 45 Guardian pins as
REM_DIODE1_P REM_DIODE4_P possible
36 DP1/VREF_T DP4/DN8 44
1 2 C244 REM_DIODE1_N 35 DN1/THERM DN4/DP8 43 REM_DIODE4_N
SC470P50V2KX-3GP
9 H_THERMDA NB_THERMDP 14
9 H_THERMDC 38 DP2 DP5/DN9 47 1 2 C256 Place close to the
37 46 SC470P50V2KX-3GP Guardian pins as NTC-10K-17-GP
DN2 DN5/DP9 NB_THERMDN 14
RT1
NPN possible

2
Q74 place near DIMM C252 REM_DIODE3_P 41 1 THERMAL_DP6 1 2 1 2
C679 SC2200P50V2KX-2GP REM_DIODE3_N DP3/DN7 DP6/VREF_T2 THERMAL_DN6 R167
1 40 DN3/DP7 DN6/VIN2 2 1 2
SC100P50V2JN-3GP Q74 +3.3V_ALW 1K2R2F-1-GP C271
DY 2

1
+3.3V_SUS MMBT3904-7-F-GP R214 SCD1U16V2KX-3GP

2
1 2 10KR2J-3-GP
1 2 3VSUS_THRM 4
R184 VDD
X01 ATF_INT#/BC-LINK_IRQ# 12 BC_INT#_EMC4002 34
1

0R3-0-U-GP C293 +RTC_CELL 21 26 POWER_SW_IN3#_IN#


SCD1U16V2KX-3GP RTC_PWR3V POWER_SW#
1 2C413 ACAVAIL_CLR 27 ACAV_IN 34,42
R207 SC1U10V3KX-3GP 20 THERMTRIP_SIO 1 2 R209
DY +3.3V_SUS
2

1KR2F-3-GP THERMTRIP_SIO/PWM1/GPIO5 10KR2J-3-GP


SYS_SHDN# 25 THERM_STP# 47
+1.8V_SUS 1 2 THERM_VDD_PWRGD 18 R198
34,50 SUSPWROK VDD_PWRGD +2.5V_RUN
1 2 THERM_3V_PWROK# 17 1 2
C +3.3V_SUS
50 SB_PWRGD#
R206 1KR2F-3-GP 3V_PWROK# DY +RTC_CELL
C
THERMTRIP1# 22 47KR2F-GP +3.3V_SUS
THERMTRIP1#
1

1
THERMTRIP2# 23 THERMTRIP2#
1
2K2R2F-GP

R675 R668 THERMTRIP3# 24 19 THERM_LDO_SHDN# 1 2 R208 R183


300R2J-4-GP R210 THERMTRIP3# LDO_SHDN# 10KR2J-3-GP 31K6R2F-GP DY Ra
8K2R2J-3-GP VSET 42 34
VSET LDO_POK 2.5V_RUN_PWRGD 35,50
2

2
3VSUS_THRM 1 2 3VSUS_THRM_R 3 33 LDO_SET LDO_SET
2

R180 ADDR_MODE/XEN LDO_SET +3.3V_RUN


Q1_1

THERMTRIP1# 20

1
4K7R2J-2-GP
3

6 32 +3V_LDOIN 1 2 R625
VDDH1 VDDH2 Rb
1

+3.3V_RUN

SCD1U16V2KX-3GP
R647 1KR2F-3-GP
1
Q80
NPN C332
5 VDDH1 VDDH2 31
C761 0R0J-GP

1
+2.5V_RUN

SC10U6D3V6MX-2GP
MMBT3904-7-F-GP SCD1U16V2KX-3GP 9 28 C793
2

2
VDDL1 VDDL2
9 CPU_THERMTRIP#_L
SC10U6D3V5KX-1GP

C329 C771 FAN1_VOUT 7 29

2
FAN_OUT1 LDO_OUT/FAN_OUT2
1

+3.3V_SUS
SCD1U16V2KX-3GP

8 FAN_OUT1 LDO_OUT/FAN_OUT2 30

SCD1U16V2KX-3GP
C774 Voltage margining

1
1 2 R213 FAN1_TACH_FB 15 16
2

8K2R2J-3-GP 14
TACH1/GPIO3 TACH2/GPIO4
13 C760 circuit for LDO output.
34 EC_32KHZ_OUT CLK_IN/GPIO2 PWM2/GPIO1
1 2 R204 SC10U6D3V5KX-1GP For Vmargin, stuff

2
8K2R2J-3-GP
Ra=31.6K and Rb=30K.
1

C337 49
GND
SCD1U10V2KX-4GP

C330 Rb=1K for production


SCD1U10V2KX-4GP EMC4002-HZH-REV-C-GP
DY DY
2

+3.3V_SUS
10KR2J-3-GP
Pull-up Resistor SMBUS R211
B on ADDR_MODE/XEN Remote mode Address 1 2
B

CPU_MEMHOT# 9
<= 4.7K DIODE 5F(r/w)
At maximum load current of 600mA, the
1

10K DIODE 5E(r/w) voltage drop across the should be keep


SCD1U16V2KX-3GP

R621
1

C747 953R2F-GP 18K Thermistor 5F(r/w) in the range of 0.5V to 1V


X01 +RTC_CELL
>= 33K Thermistor 5E(r/w)
2

2
+3.3V_RUN R855 1 2 MAIN_PWR_SW# 34
100KR2J-1-GP R216 0R2J-2-GP
1

2
1

C571

1
+5V_RUN SCD1U10V2KX-4GP R512
2

10KR2J-3-GP POWER_SW_IN3#_IN# 3 D54


BAT54A-3
SC10U6D3V5KX-1GP

2
SCD1U16V2KX-3GP

FAN1_TACH_FB FAN1
2

1
C762

C769

1
FAN1_VOUT 1 1 2 DOCK_PWR_SW# 34
R835 R240 0R2J-2-GP
1

SC22U6D3V5MX-2GP

2 0R2J-2-GP
K

3 1 2 MAIN_PWR_SW#_R
DY
1

D35 C578 4 1 2 DOCK_PWR_SW#_R


SDMK0340L-7-F-GP 6
DY
A
R836 <Variant Name> A
2

MLX-CON4-19-GP 0R2J-2-GP
A

20.D0198.104

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
21 FAN1_DET# Title
1

C597 Thermal/Fan Controllor EMC4002


SCD1U10V2KX-4GP Size Document Number Rev
2

A3 FOOSE-AMD 15.4" SB
Date: Friday, January 04, 2008 Sheet 38 of 53
5 4 3 2 1
5 4 3 2 1

*PIN
PIN
NAME DIFFERENCES*
MAXIM INTERSIL BQ24745
SSID = User.Interface
SSID = PWR.Support 1 GND NC ICREF
3 REF VREF VREF
4 CCS ICOMP EAO
5 CCI NC EAI
6 CCV VCOMP FBO
X01
TABLE 7
8
DAC
IINP
NC
ICM
CE
VICM
IO Board Connector
MAXIM & INTERSIL BOM DIFFERENCES
D 11 VDD VDDSMB VDDSMB D
REF DES MAXIM INTERSIL TI IOB1
14 BATSEL NC NC +DC_IN
R505 8.45K 1% DUMMY DUMMY 15 FBSA VFB VFB
61
C56 0.01uF 0.1uF 0.1uF NP1
16 FBSB NC NC 35 PWR_BTN_BD_DET# 1 2
C562 0.1uF 10V DUMMY 200P 10V

SCD1U50V3KX-GP
17 CSIN CSON CSON

C582
SCD1U50V3KX-GP
C576 1uF 10V DUMMY 1uF 10V 18 CSIP CSOP CSOP 38 BREATH_PWRLED_B 3 4

1
C67
5 6
R525 365K 1% 215K 1% 309K 1% 20 DLO LGATE LGATE 34 POWER_SW#_MB
7 8
35 PS_ID_DISABLE#
R490 0 5% 10 5% 0 5% 21 LDO VDDP VDDP 9 10

2
R510 0 5% 10 5% 0 5% 23 LX PHASE PHASE 11 12
NB_PSID_TS5A63157 13 14
C549 DUMMY 0.22uF 0.1uF 24 DHI UGATE UGSTE +5V_ALW 15 16
C564 DUMMY 0.22uF 0.1uF 25 BST BOOT BOOT 17 18
C579 0.01uF DUMMY DUMMY 26 VCC VCC ICOUT 19 20
"NC" means no-connect 21 22
C567 0.1uF 10V DUMMY DUMMY 23 24
C548 220pF 50V DUMMY DUMMY 25 26 +3.3V_RUN

C65
SCD1U10V2KX-4GP
D32 RB751V-40 DUMMY RB751V-40 27 28 USBP3+ 20
29 30 USBP3- 20

2
C30 3.3nF DUMMY DUMMY 31 32

2
R500 1 1% 0 5% 0 5% 33 34 USBP2+ 20
35 36 USBP2- 20 R575
R17 100 5% 0 5% 0 5% 32 AUD_VREFOUT_B
37 38 100KR2J-1-GP
R71 0 5% 8.45K 1% 8.45K 1% 32 MIC_IN_L_2
39 40 USB_OC#2_3 20

1
32 MIC_IN_R_2
R527 10K 5% 2.2K 5% 4.7K 5% 41 42 USB_SIDE_EN# 30,35
33 AUD_HP_JACK_L 43 44
C588 0.01uF 0.01uF DUMMY 45 46
33 AUD_HP_JACK_R AUD_MIC_SWITCH 32
C585 0.01uF 0.01uF DUMMY 47 48 AUD_HP_NB_SENSE 32,33,35
C 49 50 C
R22 1K 5% DUMMY DUMMY Reserved for EMI

SCD01U50V2KX-1GP
27 TPA0N 51 52
Q8 ISS355 DUMMY DUMMY 53 54
27 TPA0P
C557 1uF 10V 1uF 10V DUMMY +DC_IN 55 56
R507 33 1% 33 1% DUMMY 27 TPB0N 57 58

PC68
27 TPB0P 59 60

1
R515 DUMMY DUMMY 0 5% NP2
R523 DUMMY DUMMY 200K 5% 62
R530 DUMMY DUMMY 7.5K 5%

2
FOX-CONN60A-5-GP
C575 DUMMY DUMMY 51P 10V Place near DCIN1 20.F0965.060
C580 DUMMY DUMMY 2000P 10V
AUD_AGND
C586 DUMMY DUMMY 130P 10V
C568 DUMMY DUMMY 0.1uF
C540 DUMMY DUMMY 0.1uF
R508 10K 1% 10K 1% DUMMY
R475 DUMMY DUMMY 10k 5%
R503 15.8K 1% 15.8K 1% DUMMY
R514 DUMMY 10K 5% DUMMY +3.3V_ALW
R517 0 5% 10 5% 0 5%
2K2R2F-GP

C541 DUMMY DUMMY DUMMY


1

C561 DUMMY DUMMY DUMMY


PR281

R491 0 5% 10 5% 0 5% +5V_ALW

PU38 To 5035 Pin 110


2

B B
NB_PSID_TS5A63157 3 4
B0 A PS_ID 34
2 GND VCC 5
37 DOCK_PSID 1 B1 S 6 PSID_SELECT 35

Form 5028 Pin 11 +DC_IN_SS


NC7SB3157P6X-1GP

+DC_IN
S PU55 D
1 S D 8
2 S D 7
MAX 8731A/ISL88731 3 S D 6

SCD01U50V2KX-1GP

SCD1U50V3KX-GP

SCD1U50V3KX-GP

SC10U25V6KX-1GP
1 2 4 G D 5

1
4K7R3J-2-GP
PR526 G PC59 PC47 PC54 PC60 PR66
Adapter Trip Current R67 R485 R484 R489 PQ62
240KR3-GP SI4835BDY-T1-GP
(W) (A) DYPC581

2
1
R2
PQ64 E 1 2
65 3.17 57.6K 13.0K 105 24.9K 3 OUT NB_AC_OFF_1 B PC577 SCD1U50V3KX-GP

2
R1 R1
90 4.43 51.1K 17.8K 348 33.2K 1 C AC_OFF_2 SCD47U25V3KX-1GP
41 NB_AC_OFF_BJT

2
*R489 is populated if ADAPT_TRIP_SEL is used IN 2 GND
R2 PR521 PR511
to program for the next lower adapter. AC_OFF_2_R 2 1 1 2

X01 47KR3J-L-GP 47KR3J-L-GP


D

BQ247451 PDTA124EU-1-GP
PQ23
A
DDTC124EUA-7F-GP 2N7002-7F-GP <Variant Name> A
Adapter Trip Current R67 R485 R484 R489 2 1 NB_AC_OFF_R G
35,41,42 NB_AC_OFF
(W) (A)
1

PC951
Wistron Corporation
S

65 3.17 57.6K 12.4K 205 24.3K SCD1U50V3KX-GP


PR528
90 4.43 51.1K 16.9K 499 32.4K 100KR2J-1-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2

Taipei Hsien 221, Taiwan, R.O.C.


*R489 is populated if ADAPT_TRIP_SEL is used
to program for the next lower adapter. Title
DCIN CONN
Size Document Number Rev
A3 FOOSE-AMD 15.4" SB
Date: Friday, January 04, 2008 Sheet 39 of 53
5 4 3 2 1
5 4 3 2 1

+PWR_SRC +DOCK_PWR_BAR
PD11
2

SC2200P50V2KX-2GP
3

SCD1U25V2ZY-1GP
1
SSID = PWR.Support

1
PC40

PC42
+3.3V_ALW_2
PDS1040-13-GP

D
2

2
PU5 PQ95

100KR2J-1-GP
1 8 2N7002-7F-GP

1
2 7 PR422 PQ2
D 3 6 100KR2J-1-GP 2N7002DW-7F-GP G D
DOCK_DET# 35,37

PR10
4 5
3 4

S
1
+PBATT_+PWR_SRC FDS6679AZ-GP

2
37 ACAV_DOCK_SRC# 2 5
+PBATT
PU2 PU6 1 6
1 S D 8 8 D S 1
2 S D 7 7 D S 2 +3.3V_ALW_2

22KR2F-GP
3 S D 6 6 D S 3 X01 PRN1 X01
PR40 4 G D 5 5 D G 4 2 3

PR2
240KR2F-L-GP 1 4
SI4835BDY-T1-GP
SI4835BDY-T1-GP SRN100KJ-6-GP

2
+5V_ALW

1
47KR2F-GP
C
E

PR42
PQ5

1
PQ9 X01
PDTA124EU-1-GP PR3 4 3
22KR2F-GP NB_AC_OFF 35,40,42
R2

2
R1

5 2 SW_GND 42
PD52

2
+PWR_SRC 6 1
B

PQ11 40 NB_AC_OFF_BJT
+DC_IN_SS 1
3 OUT PBATT_OFF_1

D
1 R1 3 2N7002DW-7F-GP
35 PBATT_OFF

SCD47U25V3KX-2GP
IN 2 GND PQ96

240KR2F-L-GP
C R2 2 PQ19 2N7002-7F-GP C
+NBDOCK_DC_IN_SS

2
DDTC124EUA-7F-GP E
R2 +PWR_SRC G

PR494
B

PC539
R1
SDMG0340LC7F-GP-U C

S
1

1
2
PQ98 PDTA124EU-1-GP PR49
FDN358P-1-GP X01 22KR2F-GP
PD53 PQ20
S D A K OUT 3
+DOCK_PWR_BAR

2
1

R1 1 EN_DOCK_PWR_BAR#
PR855 SDMK0340L-7-F-GP GND 2 IN

1
240KR2J-1-GP R2
G

PR837 DDTC124EUA-7F-GP
100KR2J-1-GP PQ13

D
2

2N7002-7F-GP

2
1

1
47KR2F-GP
PR856 G
EN_DOCK_PWR_BAR 35

PR498
47KR2F-GP

1
S
PR57
2

2
22KR2F-GP

0R2J-2-GP

2
PR857
D

PQ99 1 2 EN_DOCK_PWR_BAR#
2N7002-7F-GP

G G 1 2
B PQ100 DY ACAV_DOCK_SRC 42 B
2N7002-7F-GP PR858
S

0R2J-2-GP
+3.3V_ALW_2
+3.3V_ALW
1

1
PBAT_SMBCLK 3 PR410
100KR2J-1-GP
2
PD2

2
BAV99-4-GP
42 ACAV_DOCK_SRC

SSID = RBATT 1

D
PQ51
PBAT_SMBDAT 3 2N7002-7F-GP

Batt Connecter +3.3V_ALW


PD3
2 ACAV_DOCK_SRC# G

BAV99-4-GP

S
BATT1
1

1
GND 11
10 PR13 PBAT_ALARM# 3
GND 10KR2J-3-GP
GND2 9 TP1
8 2
2

GND1 PBAT_ALARM# PR111


BAT_ALERT 7 2100R2F-L1-GP-U PBAT_PRES# 35 PD1
6 BAV99-4-GP
SYS_PRES# PBAT_PRES1# PRN2
A BATT_PRS# 5 <Variant Name> A
4 PBAT_SMBDAT1 1 4 1
DAT_SMB PBAT_SMBDAT 34
3 PBAT_SMBCLK1 2 3
CLK_SMB PBAT_SMBCLK 34
PBAT_PRES#
BATT2+
BATT1+
2
1 SRN100J-3-GP +PBATT
3
Wistron Corporation
SC2200P50V2KX-2GP

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U50V3KX-GP

2
PD4 Taipei Hsien 221, Taiwan, R.O.C.
1

1
PC15

PC526

SYN-CON9-1-GP-U1 BAV99-4-GP
Title
PC1

PC5

20.80590.009
BATT CONN
2

X01 Size Document Number Rev


A3 FOOSE-AMD 15.4" SB
Date: Friday, January 04, 2008 Sheet 40 of 53
5 4 3 2 1
5 4 3 2 1

SSID = Charger +SDC_IN +PWR_SRC


CHAGER_SRC

SCD1U50V3KX-GP
D PU53 S X01
8 D S 1 PR493 PG49
7 D S 2 1 2 1 2
+DC_IN_SS

SC2200P50V2KX-2GP
D S

33KR2J-3-GP
6 3
DY DY

SCD1U25V2ZY-1GP
2

1
+DC_IN

PC52

PC536
5 D G 4 PR483 D01R2512F-3-GP G1 1 6 D1 GAP-CLOSE-PWR-3-GP
100KR2J-1-GP DOCK_DCIN_IS- 37

PR529

PC583
160KR2F-GP
G PG53
SI4835BDY-T1-GP 1 2

2
1
1 2 S2 2 5 S1

1
PR481 GAP-CLOSE-PWR-3-GP

1 1
PR82

10KR2J-3-GP
10KR2F-2-GP PG52
+SDC_IN G1 1 6 D1 G2 3 4 D2 1 2

D
DOCK_DCIN_IS+ 37
PQ93 PQ59

PR536
D 2N7002-7F-GP 2N7002-7F-GP PQ97 GAP-CLOSE-PWR-3-GP D
S2 2 5 S1 SI3993DV-T1-GP PG100

100KR2J-1-GP

100KR2J-1-GP
G G 1 2

D 2

2
35,40,41 NB_AC_OFF PQ67

1
0R2J-2-GP

0R2J-2-GP
G2 3 4 D2

33KR2J-3-GP
GAP-CLOSE-PWR-3-GP
S

SCD1U50V3KX-GP
2N7002-7F-GP PQ63 PG50
DY

PR514

PR510

PR843

PR844
SI3993DV-T1-GP 1 2
41 ACAV_DOCK_SRC G G PQ66

1
PR79
2N7002-7F-GP GAP-CLOSE-PWR-3-GP

2
2

SCD1U50V3KX-GP
1 2 PG51
SW_GND 41

S
2
SCD1U50V3KX-GP
309KR3F-GP

200KR2F-L-GP

PR845 1 2
1

PC75

0R2J-2-GP
100KR2J-1-GP

1
PR838

PC561
0R2J-2-GP
+DC_IN_SS D58 2 1 GAP-CLOSE-PWR-3-GP

1
CHAGER_SRC
PR525

PC551

SC1U6D3V2KX-GP
1
DY
PR496

PR517
CHG_AGND PC568
DY

2
3 SCD1U50V3KX-GP +CHAGER_SRC
2

SC2D2U25V5KX-1GP
+NBDOCK_DC_IN_SS PU54 PC564

SC2200P50V2KX-2GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP

SCD1U50V3KX-GP
33R3J-2-GP
2 SCD1U50V3KX-GP CHG_AGND

ICREF

PC51

PC39
PR507

PC557

PC542

PC537

PC550
MAX8731A_DCIN 22 28 MAX8731A_CSSP 2 1
DCIN CSSP

5
6
7
8

D 5
D 6
D 7
D 8

1
BAT54CW-1-GP

SI4800BDY-T1

SI4800BDY-T1
MAX8731A_ACIN

D
D
D
D
2 ACIN DY DY
49K9R2F-L-GP

27 MAX8731A_CSSN

2
CSSN
1

+3.3V_ALW 11 26

2
VDDSMB ICOUT
1

PC572 PR502

PU51
PR522

PU3
SCD01U50V2KX-1GP 0R3-0-U-GP PD32 CHG_AGND
SCD1U10V2KX-4GP

PR501 25 1 2MAX8731A_BST1 K A 1 2
2

G
S
S
S

G
S
S
S
MAX8731A_LDO MAX8731A_REF 0R2J-2-GP BOOT MAX8731A_LDO PC547
21
2

4
3
2
1

4
3
2
1
MAX8731A_ACOK VDDP SDMK0340L-7-F-GP SCD1U50V3KX-GP
1 2 13 ACOK
10KR2F-2-GP

10KR2F-2-GP
1

SC3300P50V3KX-1GP
C C
UGATE 24 X01

1
+VCHGR1 +PBATT

PC30
PC556

CHG_AGND 10 PR500 1 2
DY 6,34 CKG_SMBCLK SCL
PR508

PR475

0R3-0-U-GP PC555 PL41 PR465


DY
2

23 1 2 SCD1U50V3KX-GP MAX8731A_LX1 2 1 1 2

2
PHASE
X01 1 2
2

PC13
CHG_AGND PC548 D01R2512F-3-GP

SI4812BDY-T1-E3-GP
9
6,34 CKG_SMBDAT DY

3
34,39 ACAV_IN SDA

SC10U25V6KX-1GP

SC10U25V6KX-1GP
PC27

PC525

PC531

PC529

PC527
SC2D2U25V5KX-1GP
SCD1U50V3KX-GP
20 SC220P50V2JN-3GP
LGATE
1

5
6
7
8

1
SC10U25V6KX-1GP

SC10U25V6KX-1GP
15K8R3F-GP

IND-5D6UH-42-GP

1
D
D
D
D
+3.3V_ALW 14 19
DY 39 ISL88731_ICM

2
NC#14 PGND
PR503

PR847

GAP-CLOSE-PWR

2
2

2
GAP-CLOSE-PWR
1 2 2 1 18
DY
2

CSOP

PU52
SCD1U50V3KX-GP
PR846 CHG_AGND
0R2J-2-GP 100KR2J-1-GP 17

G
S
S
S
CSON

PG46

PG45
PC540
MAX8731A_IINP MAX8731A_IINP 8

4
3
2
1

1
MAX8731A_CCV VICM
SC220P50V2JN-3GP

SCD1U50V3KX-GP
PR523

2
200KR2F-L-GP
4K7R2J-2-GP

1 2 PR530

2
7K5R2F-1-GP 6 1 2 MAX8731A_CSIP
1MAX8731A_CCV1

FBO
1

MAX8731A_CCI 5 16 PR490
EAI NC#16

1
PR527

PC549
8K45R2F-2-GP

MAX8731A_CCS CHG_AGND 0R2J-2-GP

0R2J-2-GP
1 2 1 2 4 EAO +PBATT

PR491
PC580 MAX8731A_REF 3 PR22
VREF DY
1

SC2200P50V2KX-2GP 1 2 MAX8731A_DAC
7 1K8R6J-GP

1
CE
PR505

PR515 12 15 +VCHGR_R 1 2 MAX8731A_CSIN


GND
2

GND VFB

ACAV_IN_S
SCD1U50V3KX-GP
1 2 1 2 0R2J-2-GP PR17
DY
2

2
1

1
PC562

PC586 PC575 0R2J-2-GP


1

PC541
SC150P50V2JN-3GP SC56P50V2JN-2GP BQ24745RHDR-GP PR479
DY DY
2

29
1

1K8R6J-GP PR72
DY DY
2

B +5V_ALW B
1 2
DY
2

2
1 2
DY
2

2
PC588 PC579 PC585 PC576 PC567 PG54 1MR2F-GP

D
1
+5V_ALW

SCD01U50V2KX-1GP
SCD1U50V3KX-GP SCD01U50V2KX-1GP SCD01U50V2KX-1GP SC1U6D3V2KX-GP SCD1U10V2KX-4GP 0R3-0-U-GP
CHG_AGND PR77
CHG_AGND PR74 100KR2J-1-GP CHG_AGND
This Resistor 1 2 ACAV_IN G
DY

PC73
must be 1%

2
1

1
tolerance. 100KR2J-1-GP ADAPT_OC 35 PQ8

S
PC72 2N7002-7F-GP
SC100P50V2JN-3GP

1
PR67

8
51K1R3F-GP CHG_AGND
CHG_AGND PU7A PR76
MAX8731A_REF 1 2 MAX8731A_REF1 3 LM393ADR-1-GP 1KR2J-1-GP
DY +
1 ADAPT_OC1 G
MAX8731A_IINP 1 2MAX8731A_IINP_R 2
DY -

2
SCD1U10V2KX-4GP

PQ22
SC100P50V2JN-3GP

S
PC56

PC57

PR71 2N7002-7F-GP

4
1

+3.3V_ALW 8K45R2F-2-GP
+DC_IN_SS MAX8731A_IINP
X01
1 2
1

PR848
2

2
232KR2F-GP

47KR2F-GP

1MR2F-GP PR485 CHG_AGND CHG_AGND


1

+5V_ALW 16K9R2F-GP CHG_AGND


2
PR849

PR850

PR851 CHG_AGND CHG_AGND


SCD01U16V2KX-3GP

100KR2J-1-GP
2

PU7B MAX8731A_REF1_E
SC100P50V2JN-3GP
A <Variant Name> A
PC61

PC58

5 + LM393ADR-1-GP
1

1
SC100P50V2JN-3GP

7 1 2 ACAV_IN_NB 34,37
PR852 PR484
6 -
Wistron Corporation
21K5R2F-GP

0R2J-2-GP 499R3F-GP
SC100P50V2JN-3GP

2
1

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


PC955

42K2R2F-L-GP

4
1

PC956

Taipei Hsien 221, Taiwan, R.O.C.


2
PR853

PR854

Title
2

CHARGER BQ24745
2

CHG_AGND
Size Document Number Rev
CHG_AGND CHG_AGNDCHG_AGND CHG_AGND CHG_AGND A3 FOOSE-AMD 15.4" SB
Date: Friday, January 04, 2008 Sheet 41 of 53
5 4 3 2 1
5 4 3 2 1

SSID = PWR.Plane.Regulator_1p1v

D D

Design Current = 6.3A


Peak Current =9A
+1.1V_PWR_SRC +PWR_SRC
OCP min = 11.7A
PG74
+5V_SUS 1 2 +1.1V_RUN_P +1.1V_RUN
PG33

1
GAP-CLOSE-PWR-3-GP 1 2
PC835 PC824 PC826 PC838 DY PC840 PG75

SC4D7U25V5KX-GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SCD1U50V3KX-GP

SC2200P50V2KX-2GP
1 2 GAP-CLOSE-PWR-3-GP

2
1

PG29
D

5
6
7
8
PR626 GAP-CLOSE-PWR-3-GP 1 2

D
D
D
D
300R3-GP PU74 PG84
1

PC807 1 2 GAP-CLOSE-PWR-3-GP

FDS8884-GP
SC1U10V2KX-1GP PG28
2

51117A_V5FILT GAP-CLOSE-PWR-3-GP 1 2
2

PR655 PC810 PG83


1

G
S
S
S
+5V_SUS 1 2 51117A_LL1 2 1 1 2 GAP-CLOSE-PWR-3-GP
PC767 PG36
G S

4
3
2
1
SC1U10V2KX-1GP 0R3-0-U-GP SCD1U25V3KX-GP GAP-CLOSE-PWR-3-GP 1 2
A

PD44 GAP-CLOSE-PWR-3-GP
B0530WS-7-F-GP PU73 PG32
4 13 51117A_DRVH +1.1V_RUN_P 1 2
V5FILT DRVH PL57
10
K

C V5DRV 51117A_LL GAP-CLOSE-PWR-3-GP C


LL 12 1 2
51117A_VBST 14 IND-1D5UH-33-GP PG30
VBST

GAP-CLOSE-PWR-3-GP
51117A_VFB 5 9 51117A_DRVL 1 2
VFB DRVL

1
PR637 0R2J-2-GP PC759 PC754 PTC18
VOUT 3 +1.1V_VO D

5
6
7
8
1 2 1.1V_RUN_ON_R 1 6 PR650 GAP-CLOSE-PWR-3-GP
34 1.1V_RUN_ON EN_PSV PGOOD

D
D
D
D
+3.3V_SUS

FDS6690DS-GP

SC4D7U6D3V5KX-3GP

SE330U2D5VDM-LGP
PU75 2D2R5J-1-GP PG34

2
SCD1U10V2KX-4GP
1 PR629 2 51117A_TON 2 TON GND 7 1 2

2
249KR2F-GP 51117A_TRIP 11 8

2
TRIP PGND

1
PG73 GAP-CLOSE-PWR-3-GP
1

TPS51117PWR-GP PR656 PG31

G
S
S
S
PR651 DY 100KR2J-1-GP 1 2

1
15KR2J-1-GP
G S

51117A_LL_RC
4
3
2
1
GAP-CLOSE-PWR-3-GP

2
+1.1V_VO PG37

SC18P50V2JN-1-GP
2

1
1.1V_RUN_PWRGD 35,50 1 2

PC773
PR632
18KR2F-GP GAP-CLOSE-PWR-3-GP
DY PG35

2
1 2

2
51117A_VFB
GAP-CLOSE-PWR-3-GP

1
X01
PC799 PR631 R631 change to 22.6K ohm
SC330P50V2KX-3GP 36K5R2F-GP
when voltage need to increase to +1.35V

2
B
Vout=0.75V*(R1+R2)/R2 B

I/P cap: 10U 25V K1206 X5R/ 78.10622.52L


Inductor: 1.5UH MPLC0730L1R5 NEC_TOKIN 8.8Arms 68.1R510.20C
O/P cap: 330U 2.5V 2R5TPE330MF 15mOhm 3.1Arms Sanyo/ 77.23371.L01
H/S: FDS8884 SO-8/ 30mOhm/ 4.5Vgs/ 84.08884.037
L/S: FDS6690AS SO-8/ 15mOhm/ 4.5Vgs/ 84.06690.E37
Ton = 249KOhm --> 300KHz

A <Variant Name> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
1D1V(TPS5117)
Size Document Number Rev
A3 FOOSE-AMD 15.4" SB
Date: Friday, January 04, 2008 Sheet 42 of 53
5 4 3 2 1
5 4 3 2 1

SSID = PWR.Plane.Regulator_1p2v

D D

+1.2V_PWR_SRC +PWR_SRC
PG90
1 2
GAP-CLOSE-PWR-3-GP
PG89
PC875 PC876 PC874 PC873 PC436 1 2

1
GAP-CLOSE-PWR-3-GP
DY DY PG88

SC4D7U25V5KX-GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SCD1U50V3KX-GP

SC2200P50V2KX-2GP
1 2

2
+5V_ALW
PU83 GAP-CLOSE-PWR-3-GP
D 5 PG91
D 6 1 2
D 7
1

D 8 GAP-CLOSE-PWR-3-GP
1
SC1U10V2KX-1GP

PR699
PC861 300R2J-4-GP 4 G
S 1
2

S 2
2

51117B_V5FILT S 3
C C
Design Current = 2.6A
1

+5V_ALW PR714 PC853 SI7326DN-T1-E3-GP


PC845 1 2 51117B_LL1 2 1 Max Current =3.7A
SC1U10V2KX-1GP OCP min =4.8A
A

0R3-0-U-GP SCD1U25V3KX-GP
PD45
B0530WS-7-F-GP PU78 +1.2V_SUSP +1.2V_ALW_SUS
4 13 51117B_DRVH
V5FILT DRVH PL69
10 PG94
K

V5DRV

GAP-CLOSE-PWR-3-GP
12 51117B_LL 1 2 1 2
51117B_VBST LL IND-4D7UH-120-GP
14 VBST

1
51117B_VFB 5 9 51117B_DRVL PC879 PC881 PTC22 GAP-CLOSE-PWR-3-GP
PR694 0R2J-2-GP VFB DRVL PU87 PR306 PG97
VOUT 3 +1.2V_VO

SC4D7U6D3V5KX-3GP

ST220U2D5VBM-2GP
1 2 1.2V_ALW_SUS_ON_R 1 6 D 5 DY 2D2R5J-1-GP 1 2
34 1.2V_ALW_SUS_ON

2
EN_PSV PGOOD +3.3V_SUS

SCD1U10V2KX-4GP
PR707 D 6 PG42
1 2 51117B_TON 2 7 X01 D 7 GAP-CLOSE-PWR-3-GP

2
300KR2F-GP 51117B_TRIP 11 TON GND D PG98
8 8

1
TRIP PGND 1
1 2
TPS51117PWR-GP PR706 4 G
1

100KR2J-1-GP S 1 +1.2V_VO GAP-CLOSE-PWR-3-GP

51117B_LL_RC

SC18P50V2JN-1-GP
PR718 S 2 PG99

PC392
4K02R2F-GP S 3 PR270 1 2
2

18KR2F-GP
DY GAP-CLOSE-PWR-3-GP
2

2
1.2V_ALW_SUS_PWRGD 50 SI7230DN-T1-E3-GP PG93
X01

2
51117B_VFB 1 2

1
GAP-CLOSE-PWR-3-GP

1
PC440 PR268 PG96
B PC958 SC330P50V2KX-3GP 30KR2F-GP B
DY SC1KP50V2KX-1GP
DY 1 2

2
GAP-CLOSE-PWR-3-GP

2
X01 PG95
1 2
GAP-CLOSE-PWR-3-GP

Vout=0.75V*(R1+R2)/R2
I/P cap: 10U 25V K1206 X5R/ 78.10622.52L
Inductor: 4.7UH MPLC0730L4R7 NEC_TOKIN 5.6Arms 68.4R710.20G
O/P cap: 220U 2.5V 2R5TPE220MAZB 35mOhm 1.4Arms Sanyo/ 77.22271.18L
H/S: SI7326 / 30mOhm/ 4.5Vgs/ 84.07326.037
L/S: Si7326 / 30mOhm/ 4.5Vgs/ 84.07326.037
Ton = 249KOhm --> 250KHz

A <Variant Name> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
DCDC 1D2V(TPS5117)
Size Document Number Rev
A3 FOOSE-AMD 15.4" SB
Date: Friday, January 04, 2008 Sheet 43 of 53
5 4 3 2 1
5 4 3 2 1

SSID = PWR.Plane.Regulator_1p2v1p5v

X01 1.5V_RUN_PWRGD 50

2
+1.8V_SUS

1
10KR2F-2-GP
+1.8V_LDOIN PR719 PC855
D D
PG66

2
SCD1U10V2KX-4GP
1 2

1
GAP-CLOSE-PWR-3-GP
+1.5V_RUN

5
4
3
2
1
PG64 PU65 Design current =1.2A
1 2

PGOOD
NC#4
NC#3
GND
NC#1
Max current = 1.6A
GAP-CLOSE-PWR-3-GP

0R2J-2-GP PR585 0R3-0-U-GP L6935TR-GPGND 21


PR556 1 2 6 20 L6935_SS1 +1.5V_RUN_PWR +1.5V_RUN
VBIAS SS
35 1.5V_RUN_ON 1 2 1.5V_RUN_ON_R 7 EN ADJ 19 L6935_ADJ1 PG68
8 VIN VOUT 18 1 2
9 VIN VOUT 17
10 16 GAP-CLOSE-PWR-3-GP
VIN VOUT PG69
1

1
PC642 PC617 PR572 PC675 PC666 1 2

NC#11
NC#12
NC#13
NC#14
NC#15
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

DY +5V_SUS

20KR2F-L-GP
GAP-CLOSE-PWR-3-GP
2

2
2

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP
PC622 PC667 PG70

SC10U6D3V5KX-1GP

SCD1U10V2KX-4GP
1 2

11
12
13
14
15

2
1

2
2
GAP-CLOSE-PWR-3-GP
PR586
DY

2
0R3-0-U-GP
PR573

10KR2F-2-GP
1

C C

1
X01
VOUT = 0.5 *(1+Rtop/Rbot)

AMD WORK AROUNT


X01
+1.8V_SUS +1.8V_LDOIN2 1.35V_RUN_LDO_PWRGD 50
2

1
10KR2F-2-GP

PC856
PG72 PR999
1 2
2

B B
SCD1U10V2KX-4GP

GAP-CLOSE-PWR-3-GP
+1.35V_RUN_LDO
1

5
4
3
2
1

PG71 PU71 Design current =1A


1 2
PGOOD
NC#4
NC#3
GND
NC#1

Max current = 1A
GAP-CLOSE-PWR-3-GP

PR587 0R3-0-U-GP L6935TR-GPGND 21


1 2 6 20 L6935_SS2 +1.35V_RUN_LDO
1.35V_RUN_ON VBIAS SS L6935_ADJ2
34,49 1.2V_RUN_ON 1 2 7 EN ADJ 19
8 VIN VOUT 18
PR611 9 17
0R2J-2-GP VIN VOUT
10 VIN VOUT 16

1
16K9R2F-GP

1
PR615 PC743 PC744
NC#11
NC#12
NC#13
NC#14
NC#15

PC734 +5V_SUS PC731

2
1

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP
PC721
2
SCD1U10V2KX-4GP

SC10U6D3V5KX-1GP

SCD1U10V2KX-4GP
11
12
13
14
15
2

2
2

1
10KR2F-2-GP

PR612
PR588
0R3-0-U-GP DY
1

A <Variant Name> A

VOUT = 0.5 *(1+Rtop/Rbot) Wistron Corporation


X01 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
1.2/1.5V_LDO (L6935TR)
Size Document Number Rev
A3 FOOSE-AMD 15.4" SB
Date: Friday, January 04, 2008 Sheet 44 of 53
5 4 3 2 1
5 4 3 2 1

TI TPS51116 for 1.8V and 0.9V SSID = PWR.Plane.Regulator_1p8v0p9v

D
+1.8V_SUS_P D

1
+5V_SUS

SC1U10V2KX-1GP
+5V_SUS

PC103

A
2
1
PD37
PR542 DY DY B0530WS-7-F-GP
1M1R2J-GP
+5116_PWR_SRC +PWR_SRC

K
2
PU11 0R3-0-U-GP
PR87 PG25
1

DY PR84 1 20 TPS51116_VBST1 1 2 TPS51116_VBST 1 2


PC81 0R2J-2-GP VLDOIN VBST TPS51116_UGT
+0.9V_DDR_P 2 VTT DRVH 19
SC1000P50V3JN-GP 3 18 TPS51116_PHS GAP-CLOSE-PWR-3-GP
2

VTTGND LL TPS51116_LGT PG26


4 VTTSNS DRVL 17
5 16 1 2
2

TPS5116_MODE GND PGND TPS51116_CS PR533


6 MODE CS 15 1 2 +3.3V_SUS
7 14 100KR2J-1-GP GAP-CLOSE-PWR-3-GP
+V_DDR_VREF_M VTTREF V5IN
TIS5116_V5IN 8 13 PG27
TPS51116_VDDQSNS COMP PGOOD 1.8V_SUS_PWRGD 34
9 VDDQSNS S5 12 1.8V_DDR_ON 34 1 2
1 PR538 2 51116_VDDQSET 10 11 0.9V_DDR_VTT_ON_R 1 2

GND
+5V_SUS VDDQSET S3
0R2J-2-GP PR841 0R2J-2-GP GAP-CLOSE-PWR-3-GP
+5V_SUS
SCD1U10V2KX-4GP

PG24
PC77

TPS51116PWPR-GP 1 DY 2 1 2

21
0.9V_DDR_VTT_ON 35
1

PR840 0R2J-2-GP

2
DY PC592 GAP-CLOSE-PWR-3-GP
C SCD033U25V3KX-GP PR83 X01 +5116_PWR_SRC PG23 C
2

0R3-0-U-GP 1 2

GAP-CLOSE-PWR-3-GP

1
TPS51116_CS 1 PR86 2 TIS5116_V5IN

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SCD1U50V3KX-GP

SC4D7U25V5KX-GP
9K09R2F-GP PC130

1
PC129 PC628 +1.8V_SUS_P +1.8V_SUS

1
1 2 PC80 PC124 PG65
SC4D7U6D3V5KX-3GP 1 2

2
PC88

2
SC1KP50V2KX-1GP GAP-CLOSE-PWR-3-GP

5
6
7
8
D
D
D
D
PU61 PG61

FDS8880-NL-GP
Design Current = 8.9A 1 2
Peak Current =12.7A GAP-CLOSE-PWR-3-GP
+0.9V_DDR_P OCP min = 16.5A
+0.9V_DDR_P +0.9V_DDR_VTT

G
S
S
S
PG67
PG58 1 2

4
3
2
1
SCD1U16V2KX-3GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

1 2
+1.8V_SUS_P GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP TPS51116_UGT
PL47
1

PC607 PC606 PC604 PG59 PG62


DY PC605 1 2 TPS51116_VBST 1 2 TPS51116_PHS 1 2 1 2
IND-1D5UH-38-GP
2

GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP PC591 GAP-CLOSE-PWR-3-GP

1
SCD1U25V3KX-GP
PG60

5
6
7
8

1
DY PR544 PC595 PC594 PTC15 PTC1 1 2

D
D
D
D
B PU66 2D2R5J-1-GP PG55 B
FDS6676AS-GP GAP-CLOSE-PWR-3-GP

2
SCD1U10V2KX-4GP

SC4D7U6D3V5KX-3GP

ST220U4VDM-24GP

ST220U4VDM-24GP
1
PG56

TPS51116_PHS_RC
1 2

G
S
S
S
GAP-CLOSE-PWR-3-GP

4
3
2
1
TPS51116_VDDQSNS

SC18P50V2JN-1-GP
1
PG63

PC590
TPS51116_LGT 1 2
PR540 DY DY
42K2R2F-L-GP GAP-CLOSE-PWR-3-GP

2
2
51116_VDDQSET PG57
I/P cap: 10U 25V K1206 X5R/ 78.10622.52L 1 2

1
PC596
Inductor: 1.5UH MPLC1040L1R5 NEC_TOKIN 12.7Arms 68.1R510.20D SC330P50V2KX-3GP PR535 DY GAP-CLOSE-PWR-3-GP
O/P cap: 330U 2.5V 2R5TPE330MF 15mOhm 3.1Arms Sanyo/ 77.23371.L01 DY 30KR2F-GP

2
O/P cap: 220U 2.5V 2R5TPE220MF 15mOhm 3.1Arms Sanyo/77.22271.20L

2
H/S: FDS8880 SO-8/ 12mOhm/ 4.5Vgs/ 84.08880.037
L/S: FDS6676AS SO-8/ 7.25mOhm/ 4.5Vgs/ 84.06676.A37
Switching freq-->400KHz

A VDDQSET VDDQ (V) VTTREF and VTT NOTE <Variant Name> A

State S3 S5 VDDR VTTREF VTT GND 2.5 VVDDQSNS/2 DDR


Wistron Corporation
S0 Hi Hi On On On 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
V5IN 1.8 VVDDQSNS/2 DDR2 Taipei Hsien 221, Taiwan, R.O.C.
S3 Lo Hi On On Off(Hi-Z) Title
S4/S5 Lo Lo Off Off Off FB Resistors Adjustable VVDDQSNS/2 1.5 V < VVDDQ < 3 V DCDC 1D8V/0D9V(TPS5116)
Size Document Number Rev
A3 FOOSE-AMD 15.4" SB
Date: Friday, January 04, 2008 Sheet 45 of 53
5 4 3 2 1
5 4 3 2 1

+PWR_SRC +SN0608098_PWR_SRC_3.3V SSID = PWR.Plane.Regulator_3p3v5v


+PWR_SRC +SN0608098_PWR_SRC_5V
+3.3V_ALW_P +3.3V_ALW
PG112 PG105
1 2 1 2 PG86
1 2
GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP
PG111 PG104 GAP-CLOSE-PWR-3-GP
1 2 1 2 PG92
1 2
GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP
PG106 PG102 GAP-CLOSE-PWR-3-GP
1 2 1 2 PG87
1 2
GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP
D PG109 PG103 GAP-CLOSE-PWR-3-GP D
1 2 1 2

GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP
PG107
1 2

GAP-CLOSE-PWR-3-GP
PG110
1 2 +SN0608098_PWR_SRC_3.3V +PWR_SRC

GAP-CLOSE-PWR-3-GP
PG108 +5V_ALW_P +5V_ALW
1 2 PR751 +SN0608098_PWR_SRC_5V PG77

1
0R5J-5-GP 1 2
SCD1U50V3KX-GP

SC4D7U25V5KX-GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP
GAP-CLOSE-PWR-3-GP PR745
1

1
PC925 PC922 PC916 PC913 0R5J-5-GP +5V_ALW_2 +5V_VCC1 GAP-CLOSE-PWR-3-GP
PC869 PC866 PC862 PC863 PG78

8
7
6
5

1
1 2
2

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SCD1U50V3KX-GP

SC4D7U25V5KX-GP
D
D
D
D
PU93 PR761
SN0608098_VIN 2 DY 1 GAP-CLOSE-PWR-3-GP

2
FDS8880-NL-GP
X01 PG80

5
6
7
8
10R3J-2 1 2

D
D
D
D
PC884 PU80

19
PU88

6
SCD1U25V3KX-GP Design Current = 7.32A GAP-CLOSE-PWR-3-GP
S
S
S
G FDS8884-GP

2
Design Current = 9.12A PG76

VIN

V5DRV
1
2
3
4

0R3-0-U-GP Peak Current = 10.5A 1 2


Peak Current = 13.1A OCP min = 13.65A
PR773 PR756 PC878

G
S
S
S
OCP min = 17.03A PC900 GAP-CLOSE-PWR-3-GP
2 1 SN0608098_VBST2_R 1 2SN0608098_VBST2 24 17 SN0608098_VBST1 1 2 SN0608098_VBST1_R 1 2 PG81

4
3
2
1
0R3-0-U-GP VBST2 VBST1
1 2
+3.3V_ALW_P SCD1U25V3KX-GP SN0608098_DRVH2 26 15 SN0608098_DRVH1 SCD1U25V3KX-GP +5V_ALW_P
DRVH2 DRVH1 PL65
PL70 GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP

1 2 SN0608098_LL2 25 16 SN0608098_LL1 1 2 PG82


IND-1D5UH-33-GP LL2 LL1 IND-2D2UH-73-GP 1 2

GAP-CLOSE-PWR-3-GP
SN0608098_DRVL2 23 18 SN0608098_DRVL1
DRVL2 DRVL1
1

PC944 PC945 PTC23 PTC8 X01 GAP-CLOSE-PWR-3-GP


1

8
7
6
5

1
PG113 PR807 PU79 PG79

5
6
7
8
SC4D7U6D3V5KX-3GP

SCD1U10V2KX-4GP

ST220U6D3VDM-20GP

ST100U6D3VBM-7GP

D
D
D
D

2D2R3J-2-GP PU92 SN0608098_VO2 30 10 SN0608098_VOUT1 PR713 PG85 1 2


2

VO2 VOUT1

D
D
D
D
2D2R3J-2-GP PTC21

1
FDS6676AS-GP

SCD1U10V2KX-4GP

ST100U6D3VBM-7GP
11 SN0608098_VFB1 PC829 PC828 PTC20 GAP-CLOSE-PWR-3-GP
2

2
VFB1

1
C SN0608098_LL2_RC SN0608098_PGOOD2 C

2
1
SC1500P50V3KX-GP

FDS6690DS-GP

SCD1U10V2KX-4GP

SC4D7U6D3V5KX-3GP

ST220U6D3VDM-20GP
22

2
PGND
1

1
+3.3V_ALW_P_G PC932 DY PC907 PC872 SN0608098_LL1_RC

SC18P50V2JN-1-GP
S
S
S
G

2
G
S
S
S
X01 X01 SCD1U10V2KX-4GP DY
1
2
3
4

2
1

PC877
28 13 SN0608098_PGOOD1
2

4
3
2
1
PGOOD2 PGOOD1
1

1
63K4R2F-1-GP
DY PR784 X01 PR780 PR748 PC859 DY
0R2J-2-GP 1 2SN0608098_TRIP2 31 12 SN0608098_TRIP1 1 2 SC1500P50V3KX-GP PR741

2
PC901 143KR2F-GP TRIP2 TRIP1
SC18P50V2JN-1-GP
2

SN0608098_REF2 1 267KR2F-GP
2

VREF2 SN0608098_EN SN0608098_AGND


14

2
EN1
1
PC899
SN0608098_AGND SCD1U10V2KX-4GP SN0608098-GP
PR782 2 DY 1 0R2J-2-GP 20 SN0608098_SECFB
SECFB
2

27 I/P cap: 10U 25V K1206 X5R/ 78.10622.52L


2

EN2
DY PR786 +5V_VCC1 Inductor: 2.2UH MPLC0730L2R2 NEC_TOKIN 8.2Arms 68.2R210.20D
0R2J-2-GP 0R2J-2-GP 4 9
EN_LDO VSW

1
PR771 SN0608098_AGND O/P cap: 220U 6.3V 6TPE220M 25mOhm 2.4Arms Sanyo/77.22271.17L
+5V_ALW_2
2 DY 1 SN0608098_TONSEL 2 PR735 O/P cap: 220U 6.3V 6TPE100MAZB 35mOhm 1.4Arms Sanyo /77.21071.07L
1

TONSEL PC868 PC870 10KR2F-2-GP


7
LDO Sanyo/77.22271.17L

SC4D7U25V5KX-GP

SCD1U25V3KX-GP

SCD1U25V3KX-GP
2 DY 1 SN0608098_SKIPSEL 29 SKIPSEL

2
SN0608098_AGND PR778 8 H/S: FDS8884 SO-8/ 30mOhm/ 4.5Vgs/ 84.08884.037

2
LDOREFIN
2

1
+5V_VCC1

PC871
0R2J-2-GP 32 PD46
PR779 REFIN2 L/S: FDS6690AS SO-8/ 15mOhm/ 4.5Vgs/ 84.06690.E37
DY BAT54-7-F-GP

315V_ALW_P_C 2

35V_ALW_P_C 2
PR772 0R2J-2-GP 21

V5FILT
VREF3

2
GND
2

0R2J-2-GP SN0608098_AGND
PR783 33
1

3
0R2J-2-GP GND
+3.3V_ALW_P
5

3
SN0608098_AGND SN0608098_AGND
1

+3.3V_ALW_2 +5V_VCC1

BAT54S-7F-GP
SN0608098_AGND PD49
SN0608098_REFIN2 PD51
1

BAT54S-7F-GP
2

PR737 PR740 PC887 PC906


100KR2F-L1-GP 100KR2F-L1-GP SC1U10V3KX-3GP SC1U10V3KX-3GP
DY PR781
2

1
0R2J-2-GP
2

10V_ALW_P_C
1

SN0608098_AGND SN0608098_AGND
PR743 +15V_ALW_P +5V_ALW_P
SN0608098_PGOOD2
34 ALW_ON 1 2
2

1KR2J-1-GP 2 PR7681
1

B PR746 SN0608098_AGND B

1
0R2J-2-GP PR744 PR742 200KR2F-L-GP PC903
1 2 200KR2F-L-GP PR767

1
39 THERM_STP#

SCD1U25V3KX-GP
0R2J-2-GP 39K2R3F-GP PC892
1

2
SN0608098_PGOOD1 PG101 GAP-CLOSE-PWR-3-GP
2

ALW_PWRGD_3V_5V 34 SCD1U25V3KX-GP
1 2

2
I/P cap: 10U 25V K1206 X5R/ 78.10622.52L
SN0608098_AGND
Inductor: 1.5UH MPLC0730L1R5 NEC_TOKIN 8.8Arms 68.1R510.20C +15V_ALW +15V_ALW_P
O/P cap: 220U 6.3V 6TPE220M 25mOhm 2.4Arms Sanyo/77.22271.17L
H/S: FDS8880 SO-8/ 12mOhm/ 4.5Vgs/ 84.08880.037 PG114
1 2
L/S: FDS6676AS SO-8/ 7.25mOhm/ 4.5Vgs/ 84.06676.A37
GAP-CLOSE-PWR-3-GP

SKIPSEL GND FLOAT/VREF2 V5IN TABLE1


MAXIM ,INTERSIL & TI BOM differences
Operating Auto OATM PWM
Mode Skip
MAXIM INTERSIL TI
R 10ohm NO STUFF NO STUFF
C 1uF 0.1uF 1uF
TONSEL GND VREF2 or Float V5FILT
CH1 Freq 400kHz 400kHz 200kHz

CH2 Freq 500kHz 300kHz 300kHz

Min Typ Max


A A
3.3V Preset Output: REFIN2 = 5V, 3.285 3.33 3.375
VIN = 5.5V to 28V, SKIPSEL = 5V (-1.4%) (+1.4%)

VOUT2 Output 1.05V Preset Output: REFIN2 = 1.038 1.05 1.062 <Variant Name>
3.3V, VIN = 5.5V to 28V, SKIPSEL=5V (-1.2%) (+1.2%)

1.01
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Tracking Output: REFIN2 = 1.0V, 0.99 1.00 (+1%) Taipei Hsien 221, Taiwan, R.O.C.
VIN = 5.5V to 28V, SKIPSEL = 5V (-1%)
Title
DCDC 5V/3D3V (TPS51125)
Size Document Number Rev
A2 FOOSE-AMD 15.4" SB
Date: Friday, January 04, 2008 Sheet 46 of 53
5 4 3 2 1
5 4 3 2 1

SSID = CPU.Regulator
PC32
1 2 6265_FB_NB_C
I/P cap: 10U 25V K1206 X5R/ 78.10622.52L
PR44 Inductor: 4.7uH NEC_TOKIN MPLC0730L4R7 / 68.4R710.20G
SC33P50V2JN-3GP
+5V_RUN 1 2 O/P cap: 330U 2.5V 2R5TPE330M9L/ 77.23371.13L
+PWR_SRC +CPU_PWR_SRC 2R3J-GP PR47 PC34 +CPU_PWR_SRC
H/S: SI7326DN/30mOhm/ 4.5Vgs/ 84.07326.037 X01
PG22 1 26265_FB_NB_R 1 2
Delete PTC12 by power team suggestion.

1
1 2
PC29 44K2R2F-1-GP SC1200P50V2KX-1GP
L/S: SI7326DN/30mOhm/ 4.5Vgs/ 84.07326.037

1
SC10U25V0KX-3GP
GAP-CLOSE-PWR-3-GP SC1U10V3KX-3GP PC533 PC33

SC4D7U25V5KX-GP
PG4
1 2 PC532 PQ15

2
1 2 SI7326DN-T1-E3-GP
D GAP-CLOSE-PWR-3-GP GNDA_VCORE D 5 D
PG20 SC1KP50V2KX-1GP D 6
PR471 +VDDNB D 7
1 2
1 2 1 2 GNDA_VCORE D 8
+CPU_PWR_SRC
GAP-CLOSE-PWR-3-GP 2R3J-GP PR474 22KR2F-GP +VDDNB

2
SCD1U50V3KX-GP
PG21 PC25 UGATE_NB 4 G Design Current: 2.1A
1 2 PR492 S 1
10R2F-L-GP S 2 Peak current: 3A

2
GAP-CLOSE-PWR-3-GP S 3 OCP_min:5A
PG47 PR50

1
1 2 GNDA_VCORE 10R2J-2-GP 2 +VDDNB
CPU_VDDNB_RUN_FB_H 9 PL43 +VCC_CORE0 +VCC_CORE1
+3.3V_RUN +5V_RUN +3.3V_RUN PR63 PC46

CPU_VDDNB_RUN_FB_H_R
GAP-CLOSE-PWR-3-GP 1 2 PHASE_NB BOOT_NB 1 2 BOOT_NB_R 1 2 PHASE_NB 1 2 PG19
PG3 PR51 6K34R2F-GP IND-4D7UH-120-GP 1 2

SCD1U10V2KX-4GP
1 2 0R3-0-U-GP SCD22U10V3KX-2GP PTC11
1

4D7R6J-GP

PC535
LGATE_NB PC552 GAP-OPEN-PWR

1
OCSET_NB

ST330U2D5VDM-9GP
GAP-CLOSE-PWR-3-GP PU4 PG5

6265_COMP_NB

SC4D7U6D3V5KX-3GP
PG2 PR37 DY PR463 PHASE_NB SI7326DN-T1-E3-GP PR56

6265_FSET_NB
1 2
1 2 0R2J-2-GP 0R2J-2-GP X01 D 5 DY

6265_FB_NB

2
UGATE_NB D 6 GAP-OPEN-PWR

6265_VCC
2

6265_VIN
GAP-CLOSE-PWR-3-GP D 7 PG14

PHASE_NB_RC 2
1

CPU_VDDNB_RUN_FB_L_R 1 PR53 2 CPU_VDDNB_RUN_FB_L 9


D 8 1 2
PR32 PR468 1 0R2J-2-GP
10KR2F-2-GP DY 10KR2F-2-GP LGATE_NB 4 G GAP-OPEN-PWR

2
S 1 PG6

6265_OFS/VFIXEN
PR38DY PR488 S 2 1 2
2

0R2J-2-GP GNDA_VCORE 10R2F-L-GP S

49
48
47
46
45
44
43
42
41
40
39
38
37
3
PU1 GAP-OPEN-PWR
2

SC1500P50V3KX-GP
PG13

GND
VIN
VCC
FB_NB
COMP_NB
FSET_NB
VSEN_NB
RTN_NB
OCSET_NB
PGND_NB
LGATE_NB
PHASE_NB
UGATE_NB

1
PC36 1 2
GNDA_VCORE PC957 DY
SC1KP50V2KX-1GP GAP-OPEN-PWR

2
PG12
1 36 BOOT_NB 1 2
OFS/VFIXEN BOOT_NB BOOT0
35,50 CPU_VCORE_PWRGD 2 PGOOD BOOT0 35
3 34 UGATE0 GAP-OPEN-PWR
9 CPU_PWRGD_SVID_REG PWROK UGATE0 +CPU_PWR_SRC
1 2 CPU_SVD_R 4 33 PHASE0 PG11
9 CPU_SVD SVD PHASE0
PR31 1 2 0R2J-2-GP CPU_SVC_R 5 32 +5V_RUN 1 2
9 CPU_SVC SVC PGND0
PR30 0R2J-2-GP 6 31 LGATE0
35 CPU_VCORE_ENABLE ENABLE LGATE0
1 2 1 2 6265_RBIAS 7 30 GAP-OPEN-PWR
PR20 49K9R2F-L-GP PR29 100KR2F-L1-GP 6265_OCSET RBIAS PVCC LGATE1 PG10
X01 8 OCSET LGATE1 29

1
C 6265_VDIFF0 9 28 PC601 PC600 PC599 PC602 PC85 PTC9 1 2 C
VDIFF0 PGND1

1
6265_FB0 10 27 PHASE1 PC44
FB0 PHASE1

5
6
7
8

5
6
7
8

1
SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC4D7U25V5KX-GP

SCD1U50V3KX-GP

SE100U25VM-14GP
6265_COMP0 11 26 UGATE1 SC2D2U6D3V3KX-GP GAP-OPEN-PWR

2
COMP0 UGATE1

D
D
D
D

D
D
D
D
SI7686DP-T1-GP

SI7686DP-T1-GP
GNDA_VCORE 6265_VW0 12 25 BOOT1 PU13 PU63 DY PG9

2
VW0 BOOT1
+VCC_CORE0 1 2

2
COMP1
VDIFF1
VSEN0

VSEN1
Design Current: 12.6A
RTN0
RTN1

PG1 GAP-OPEN-PWR
ISN0

ISN1
ISP0

VW1
ISP1
FB1 Peak current: 18A PG8
1 2

G
S
S
S

G
S
S
S
OCP_min:24A 1 2
GAP-CLOSE-PWR QFN48-G4D4H32
13
14
15
16
17
18
19
20
21
22
23
24

4
3
2
1

4
3
2
1
GAP-OPEN-PWR
+VCC_CORE0
6265_COMP1

GNDA_VCORE PG7
6265_VDIFF1
6265_VSEN0

6265_VSEN1

6265_VW1
6265_FB1
6265_RTN0
6265_RTN1

ISP0 ISN1 UGATE0 PL49 1 2


ISN0 ISP1 PHASE0 1 2
+1.8V_SUS L-D36UH-1-GP GAP-OPEN-PWR

1
+VCC_CORE0

4D7R6J-GP
PG15

1
+VCC_CORE1 PR27 1 2
1

8
7
6
5
BOOT0 1 PR62 2 BOOT0_R 1 2 PR92 16KR2F-GP
1

8
7
6
5
D
D
D

SI7636DP

ST330U2D5VDM-9GP

ST330U2D5VDM-9GP

ST330U2D5VDM-9GP
D
PR478 1R3J-L1-GP PU14 DY PTC3 PTC16 PTC17 GAP-OPEN-PWR
1

1
D
D
D

SI7636DP
D
PR94 DY 0R2J-2-GP PC45 PU67 PG16

2
10R2F-L-GP PR89 SCD22U10V3KX-2GP 1 2 1 2

1PHASE0_RC 2
10R2F-L-GP PR41 4K02R2F-GP
2

2
GAP-OPEN-PWR
2

G
S
S
S
1 2 PG17
2

G
S
S
S
PC28 SCD1U16V3KX-3GP 1 2

4
3
2
1
9 CPU_VDD0_RUN_FB_H 1 2

4
3
2
1

SC1500P50V3KX-GP
PR472 1 2 0R2J-2-GP GAP-OPEN-PWR
9 CPU_VDD0_RUN_FB_L
PR476 0R2J-2-GP LGATE0 PC119 1 DY 2 1 DY 2 PG18
9 CPU_VDD1_RUN_FB_L 1 2 DY 1 2

ISP0
PR482 1 2 0R2J-2-GP PR580 PR579

ISN0
9 CPU_VDD1_RUN_FB_H

2
PR480 0R2J-2-GP NTC-10K-9-GP 10R2F-L-GP GAP-OPEN-PWR
1

ISP0_R
PR93 PR91
10R2F-L-GP 10R2F-L-GP
2

B B
6265_FB0_C 6265_FB1_C
PR24 PR45
PC20 PC31 +CPU_PWR_SRC
249R2F-GP PC530 249R2F-GP PC35
1 2 1 2 1 2 SC180P50V2JN-1GP 1 2 1 2 1 2 1 2 1 2

SC4700P50V2KX-1GP PC26 SC1KP50V2KX-1GP SC4700P50V2KX-1GPSC180P50V2JN-1GP PC38 SC1KP50V2KX-1GP

PC637 PC634 PC636 PC633 PC84


PR23 PR34 PR48 PR46 PR52

SE100U25VM-14GP
5
6
7
8

5
6
7
8

1
SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC4D7U25V5KX-GP

SCD1U50V3KX-GP
1 PR36 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 PTC10 +VCC_CORE1

D
D
D
D

D
D
D
D
SI7686DP-T1-GP

SI7686DP-T1-GP
1KR2F-3-GP 6K81R2F-1-GP 54K9R2F-L-GP 6K81R2F-1-GP PU12 PU59 DY
54K9R2F-L-GP PC528 PC37
Design Current: 12.6A

2
SC1200P50V2KX-1GP 1KR2F-3-GP SC1200P50V2KX-1GP Peak current: 18A
6265_FB0_R 6265_FB1_R OCP_min:24A

G
S
S
S

G
S
S
S
4
3
2
1

4
3
2
1
+VCC_CORE1
UGATE1 PL46
PHASE1 1 2
L-D36UH-1-GP

1
4D7R6J-GP
PR85 PR54

8
7
6
5

8
7
6
5
BOOT1 1 PR61 2 BOOT1_R 1 2 DY 16KR2F-GP PTC2 PTC14 PTC13

1
D
D
D

SI7636DP

D
D
D

SI7636DP
D

D
1R3J-L1-GP PU57

ST330U2D5VDM-9GP

ST330U2D5VDM-9GP

ST330U2D5VDM-9GP
PC50

PHASE1_RC 2

2
SCD22U10V3KX-2GP 1 2

2
PR55 4K02R2F-GP
PU8

SC1500P50V3KX-GP
G
S
S
S

G
S
S
S
1 2
PC41 SCD1U16V3KX-3GP
4
3
2
1

4
3
2
1

1
LGATE1 PC91 1 PR531 2 1 PR532 2
DY DY 10R2F-L-GP

ISP1
DY

ISN1
2
NTC-10K-9-GP
ISP1_R
A A

I/P cap: 10U 25V K1206 X5R/ 78.10622.52L <Variant Name>


Inductor: 0.36uH ETQP4LR36WFC / 68.R3610.20A
O/P cap: 330U 2.5V 2R5TPE330M9L/ 77.23371.13L Wistron Corporation
H/S: SI7686DP/ POWERPAK-8/ 14mOhm/ 4.5Vgs/ 84.07686.037 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
L/S: SI7636ADP/ POWERPAK-8/ 4.8mOhm/ 4.5Vgs/ 84.07636.037
Title

+VCC_CORE(ISL6265HR)
Size Document Number Rev
A2 FOOSE-AMD 15.4" SB
Date: Friday, January 04, 2008 Sheet 47 of 53
5 4 3 2 1
5 4 3 2 1

+3VSUS Source SUS Power Discharge RUN Power Discharge


SSID = Reset.Suspend +3.3V_ALW
D U50 S
+3.3V_SUS
Design current: 210mA +0.9V_DDR_VTT
+5V_RUN
+3.3V_RUN
+2.5V_RUN
+1.8V_RUN
+1.5V_RUN

8 1 Max current: 300mA

2
D S
7 2

2
+3.3V_ALW_2 +1.8V_SUS

SC10U6D3V5KX-1GP
D S
6 3 R330
R574

1
+15V_ALW D S
C947 R827 1KR2J-1-GP
SUS_ON_5V#
5 D G 4
20KR2J-L2-GP SUS_ON_1.8V#_EN DYR775 DYR311
1 2
SI4800BDY-T1
G 2
DY 1
DYR96
1KR2J-1-GP
2
DY 1 RUN_ON_5V#_EN
DYR296
1KR2J-1-GP
1KR2J-1-GP
DYR788
1KR2J-1-GP
1KR2J-1-GP

1
1
R826 D G 1KR2J-1-GP RUN_ON_2.5V#_EN 1.5V_RUN_Q

1
100KR2J-1-GP S R824 9 Amp SUS_ON_5V# RUN_ON_5V#

4
100KR2J-1-GP
Q91 D G S D G S D G S
D
+5VSUS Source D

D
2N7002DW-7F-GP

4
SUS_ON_5V#_EN
Design current: 700mA

RUN_ON_1.8V#_EN
Q71 Q49 Q87

RUN_ON_3.3V#_EN
+5V_ALW +5V_SUS DY

2N7002DW-7F-GP

2N7002DW-7F-GP

2N7002DW-7F-GP
Max current: 1005mA G

SC4700P50V2KX-1GP
D U49 S DY DY
1

S G 3 SUS_ENABLE 8 1 Q86
DY

S
2N7002-7F-GP
D S
D 7 2

1
SC10U6D3V5KX-1GP
D S
C948 6 3

3
1
D S
5 D G 4 C949 R825 S G D S G D S G D
G 20KR2J-L2-GP
34,50 SUS_ON

2
SI4800BDY-T1

2
9 Amp
+3.3V_ALW_2

1 DY 21.2V_SUS_ON# +15V_ALW

R727 D G S +3.3V_ALW_2 ODD PWR Design current: 1050mA


100KR2J-1-GP +1.2V_ALW_SUS BLM21PG221SN-1GP +1.2V_SUS
Max current: 1500mA
6

L68 +5V_ALW
2

Q83 1 2 1 2 MODC_EN# +15V_ALW


+1.2VSUS Source 0R5J-5-GP +5V_ODD
2N7002DW-7F-GP

SC10U6D3V5KX-1GP
DY R726 +5V_RUN
100KR2J-1-GP D U82 R806 D G S R795
DY Design current: 75mA

1
C915
D

100KR2J-1-GP
1 D 6 100KR2J-1-GP 1 2
DY

4
D DY D 5 D U91 S
2 Max current: 100mA
1

R805

SC10U6D3V5KX-1GP
1.2V_SUS_ON_EN 3 G S 4 Q89 8 1
1

2
2N7002DW-7F-GP
D S
S G D G S 7 2
1

1
SCD1U10V2KX-4GP
D S

100KR2J-1-GP
C860 SI3456BDV-T1-GP G 6 3

1
D S

C919
C SC4700P50V3KX-1GPDY 5 D G 4 C909 C

R798
X01 G
2

SI4800BDY-T1
34 1.2V_SUS_ON

2
S G D ODD_EN_5V

2
1
+3.3V_ALW_2 +15V_ALW 9 Amp
+5VRUN Source C929
1 2RUN_ON_5V# Design current: 2096mA 35 ODD_EN
SCD1U50V3KX-GP

2
100KR2J-1-GP
1

R261 D G S R246
100KR2J-1-GP
Max current: 2994mA
6

Q38 +5V_ALW +5V_RUN +5V_ALW HDD PWR Design current: 840mA


2N7002DW-7F-GP

D U36 S Max current: 1200mA


2

8 1
7
D S
2 1 +3.3V_ALW_2 +15V_ALW D U62 +5V_RUN 0R5J-5-GP +5V_HDD
SC10U6D3V5KX-1GP

D S
6 3 1 D D 6 R557
1

SCD1U10V2KX-4GP
D S
5 4 C380 R189 1 2 HDDC_EN# 2 D D 5 1 2
DY
1

1
SC4700P50V2KX-1GP

D G
20KR2J-L2-GP

100KR2J-1-GP
S G D G 3 G S 4
1

R545
SI4800BDY-T1 C369 R547 D G S G S
2

1
100KR2J-1-GP
9 Amp 100KR2J-1-GP SI3456BDV-T1-GP C616 R552
2

1
C589 5 Amp C638
2

RUN_ENABLE Q69 SCD1U50V3KX-GP


17,33,35,50 RUN_ON

2
2N7002DW-7F-GP

SC10U6D3V5KX-1GP
2
2
+3.3V_ALW
+3.3V_ALW_2 +15V_ALW
+3.3V_RUN +3.3V_HDD
+3.3V_RUN Source

3
S G D D U58 S R549
1

B B
1 23.3V_RUN_ON# Design current: 5309mA 1 D D 6 1 2
100KR2J-1-GP

SC10U6D3V5KX-1GP
R815 2 D D 5
R823 D G S HDD_EN_5V 3 G
DY S 4 0R5J-5-GP
100KR2J-1-GP
Max current: 7585mA G
35 HDDC_EN
6

1
20KR2J-L2-GP
SI3456BDV-T1-GP C593
2

Q90 +3.3V_ALW +3.3V_RUN SB:70215


2N7002DW-7F-GP D U45 S
5 Amp DY DYR546

2
SC10U6D3V5KX-1GP

8 D S 1
7 D S 2

2
1

+3.3V_ALW_2
20KR2J-L2-GP

6 D S 3
1

5 D G 4 C493 R426 +15V_ALW


1

SCD1U50V3KX-GP

S G D G 1 21.2V_RUN_ON#
+1.2V_RUN Source
1

FDS8880-NL-GP C943
2

1
R289 D G S +1.2V_ALW_SUS +1.2V_RUN
2

11 Amp 100KR2J-1-GP R301


Design current: 1883mA
2

4
3.3V_RUN_ENABLE Q48 100KR2J-1-GP
35 3.3V_RUN_ON

2N7002DW-7F-GP
D U40 S Max current: 2690mA
1 D D 6

2
+3.3V_ALW_2 2 D D 5
+15V_ALW RUN_ENABLE_1.8V 3 G S 4

SC10U6D3V5KX-1GP
+1.8V_RUN Source G

1
20KR2J-L2-GP
1 21.8V_RUN_ON# SI3456BDV-T1-GP

3
1.8V_RUN_ENABLE 15 SB:70215
100KR2J-1-GP

S G D 5 Amp R276
Design current: 1305mA
1

1
R131 D G S C431
R153

100KR2J-1-GP C434
Max current: 1864mA
6

+1.8V_SUS SCD1U16V2KX-3GP

2
Q34 X01
34,45 1.2V_RUN_ON
2N7002DW-7F-GP

A <Variant Name> A
D U25 S +1.8V_RUN
1 D D 6
D D 5
2
Wistron Corporation
1

S G D 1.8V_RUN_ENABLE 3 G S 4
1
SC4700P50V2KX-1GP

C223 G 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


1

1
SC10U6D3V5KX-1GP

SI3456BDV-T1-GP Taipei Hsien 221, Taiwan, R.O.C.


1

R133 C233 R179


DY
2

100KR2J-1-GP
SB:70215 5 Amp 20KR2J-L2-GP Title
35 1.8V_RUN_ON
PWRPLANE&RESETLOGIC
2
2

Size Document Number Rev


A3 FOOSE-AMD 15.4" SB
Date: Friday, January 04, 2008 Sheet 48 of 53
5 4 3 2 1
5 4 3 2 1

35,43 1.1V_RUN_PWRGD R260 1 2 0R2J-2-GP


SSID = Reset.Suspend
+3.3V_RUN +3.3V_SUS +3.3V_ALW
X01
R263 1 2 0R2J-2-GP X01
35,39 2.5V_RUN_PWRGD DY 1 2

1
45 1.5V_RUN_PWRGD R262 1 2 0R2J-2-GP R736 R759 C803 +3.3V_ALW
20KR2F-L-GP DY 100KR2F-L1-GP SCD1U10V2KX-4GP

14

14
D 45 1.35V_RUN_LDO_PWRGD R606 1 2 0R2J-2-GP SSAHC14PWR-GP D

2
U85B +3.3V_ALW
RUN_R1 1 2 RUN_R2 1 2 RUN_R3 3 4

SCD01U50V2KX-1GP
1 2
R764 U85A
+5V_ALW 0R2J-2-GP C886 SSAHC14PWR-GP C908

7
1
+5V_RUN SCD1U10V2KX-4GP

14
E
D23 SSLVC08APWR-GP

2
A K 5V_RUN_D 1 2 5V_RUN_R B Q42 RUN_PLANE_PWRGD 1 U89A
R280 MMST3906-7-F-GP 3
1

SDMK0340L-7-F-GP 10KR2J-3-GP

RUN_ON_D
17,33,35,49 RUN_ON 2

C
1

R290 MMBT3904-7-F-GP

3
C450 200KR2J-L1-GP C424 Q39

7
SCD1U10V2KX-4GP SC2200P50V2KX-2GP 5V_RUN_Q0 1 25V_RUN_Q1 1 +3.3V_ALW
2

2
2

R264

14
2
+3.3V_ALW 4K7R2J-2-GP
4
+3.3V_RUN 6 RUNPWROK 34,35

E
D24 5
A K 3.3V_RUN_D 1 23.3V_RUN_R B Q44
R286 MMST3906-7-F-GP U89B

7
1

SDMK0340L-7-F-GP 10KR2J-3-GP SSLVC08APWR-GP


C
1

R291 MMBT3904-7-F-GP

3
C451 200KR2J-L1-GP C421 Q43
SCD1U10V2KX-4GP SC2200P50V2KX-2GP 3.3V_RUN_Q0 1 23.3V_RUN_Q1 1 +3.3V_ALW
2

+3.3V_ALW +3.3V_ALW
2

R272

14
2
C +1.8V_SUS 4K7R2J-2-GP C

14

14
34,49 SUS_ON 9
+1.8V_RUN 8 SUSPWROK 34,39
E

D26 SUS_R2 5 6 SUS_R3 9 8 SUS_R4 10


A K 1.8V_RUN_D 1 21.8V_RUN_R B Q45
R278 MMST3906-7-F-GP U85C U85D U89C

7
1

SCD01U50V2KX-1GP
SDMK0340L-7-F-GP 10KR2J-3-GP SSAHC14PWR-GP SSAHC14PWR-GP SSLVC08APWR-GP

7
C
1

R293 MMBT3904-7-F-GP C389 +3.3V_SUS

1
C453 200KR2J-L1-GP C423 Q85
SCD1U10V2KX-4GP SC2200P50V2KX-2GP 1.8V_RUN_Q0 1 21.8V_RUN_Q1 1
2

1
2

2
R274 R294

2
4K7R2J-2-GP +3.3V_SUS 100KR2J-1-GP

2 1

2
+1.2V_SUS SB_PWRGD# 39
+1.2V_RUN C435 U86
SCD1U10V2KX-4GP 1 5
E

D25 A VCC

D
A K 1.2V_RUN_D 1 21.2V_RUN_R B Q46 2 Q88
14,19,34,35 PLTRST# B
R285 MMST3906-7-F-GP
1

SDMK0340L-7-F-GP 10KR2J-3-GP MMBT3904-7-F-GP 3 4 PLTRST_SYS# 24,31 2N7002-7F-GP


C

GND Y
1

R292 Q82 G
C452 200KR2J-L1-GP C422 1.2V_RUN_Q0 1 21.2V_RUN_Q1 1
SCD1U10V2KX-4GP SC2200P50V2KX-2GP SNLVC1G08DCKRG4-GP

S
2

R723 +3.3V_ALW
2

4K7R2J-2-GP

14
B B

35,48 CPU_VCORE_PWRGD 12
11 SB_PWRGD 20
34 RESET_OUT# 13
R266 1 2 0R2J-2-GP
44 1.2V_ALW_SUS_PWRGD
U89D

7
SSLVC08APWR-GP

+3.3V_ALW
+5V_ALW +3.3V_LAN
+5V_SUS +3.3V_ALW

E
D48 R731
E

D21 SUS_R1 1 2 A K 2 1 B
5V_SUS_D 5V_SUS_R Q37 Q84

14
A K 1 2 B

1
R248 MMST3906-7-F-GP R265 SDMK0340L-7-F-GP 10KR2J-3-GP MMBT3906-2-GP

C
1

SDMK0340L-7-F-GP 10KR2J-3-GP MMBT3904-7-F-GP 0R2J-2-GP


DY
C
1

R247 Q40 C885 R730 A K 11 10


C373 200KR2J-L1-GP C368 5V_SUS_Q0 1 5V_SUS_Q1 SCD1U10V2KX-4GP D47 3.3V_LAN_PWRGD 34
2 1
1

SCD1U10V2KX-4GP SC2200P50V2KX-2GP 200KR2J-L1-GP SDMK0340L-7-F-GP U85E


2

1
R258 SSAHC14PWR-GP
2

7
4K7R2J-2-GP R724 R725
200KR2J-L1-GP
200KR2J-L1-GP

2
+3.3V_ALW
+3.3V_SUS
A <Variant Name> A
E

D20
A K 3.3V_SUS_D 1 2 3.3V_SUS_R B Q36
R244 MMST3906-7-F-GP
Wistron Corporation
1

SDMK0340L-7-F-GP 10KR2J-3-GP MMBT3904-7-F-GP


C
1

R243 Q41 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


C364 200KR2J-L1-GP C365 3.3V_SUS_Q0 1 2 3.3V_SUS_Q1 1 Taipei Hsien 221, Taiwan, R.O.C.
SCD1U10V2KX-4GP SC2200P50V2KX-2GP
2

R245 Title
2

4K7R2J-2-GP
POWER ON LOGIC
Size Document Number Rev
A3 FOOSE-AMD 15.4" SB
Date: Friday, January 04, 2008 Sheet 49 of 53
5 4 3 2 1
5 4 3 2 1

SSID=Mechanical
SSID=EMI
H1 HOLE H2 H3 H4 H5 H6

HOLE

HOLE

HOLE

HOLE

HOLE
1

1
D D

SPR1 SPR2 SPR3 SPR4 SPR8

1
SPRING-24-GP SPRING-7 SPRING-24-GP SPRING-24-GP SPRING-58-GP
34.45T31.001 34.49U26.001 34.45T31.001 34.45T31.001 34.4B312.002

H7 H8 H9 H11 H12 H13


HOLE

HOLE

HOLE

HOLE

HOLE

HOLE
1

1
34.4H103.001 SPR5 SPR6 SPR7 SPR9 SPR10 SPR11

1
SPRING-24-GP SPRING-24-GP SPRING-58-GP SPRING-24-GP SPRING-24-GP SPRING-24-GP
34.45T31.001 34.45T31.001 34.4B312.002 34.45T31.001 34.45T31.001 34.45T31.001

H14 H15 H16 H17 H18 H19


HOLE

HOLE

HOLE

HOLE

HOLE

HOLE
1

1
34.4X801.001 34.4X801.001 34.4X802.001 +PWR_SRC +5V_ALW +3.3V_ALW
C C

SCD1U25V3KX-GP

SCD1U25V3KX-GP

SCD1U25V3KX-GP

SCD1U25V3KX-GP

SCD1U25V3KX-GP

SCD1U25V3KX-GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
1

1
EC21 EC22 EC23 EC24 EC25 EC26 EC27 EC28 EC29 EC30 EC31
H20 H21 H22
3
9
2

H10

2
HOLE

HOLE

HOLE

4
1

5 8
1

GEN8
6
10
7

+3.3V_RUN +DOCK_PWR_BAR +3.3V_RUN

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U25V3KX-GP

SCD1U25V3KX-GP

SCD1U25V3KX-GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
1

1
EC32 EC33 EC34 EC35 EC36 EC37 EC38 EC39 EC40 EC41 EC42 EC43 EC44

2
B B

+3.3V_RUN +3.3V_RUN +3.3V_RUN +3.3V_RUN


14

14

14

14

U10A U10C U10D U10E


1 2 5 6 9 8 11 10

TSAHC14PW-GP TSAHC14PW-GP TSAHC14PW-GP TSAHC14PW-GP


7

AUD_AGND AUD_AGND AUD_AGND AUD_AGND

+5V_CRT_RUN +5V_CRT_RUN
14

10

14

13

A <Variant Name> A

U56C U56D
9 8 12 11
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
SSAHCT125PWR-GP SSAHCT125PWR-GP Taipei Hsien 221, Taiwan, R.O.C.
7

Title
MISC
Size Document Number Rev
A3 FOOSE-AMD 15.4" SB
Date: Friday, January 04, 2008 Sheet 50 of 53
5 4 3 2 1
5 4 3 2 1

DATE VERSON ITEM PAGE Modify List Issue Description OWNER


1 06 Add R831 for CLK gen. X'tal. Add C801 and C849 for CLK gen. +3.3V power. Follow vendor suggestion. EE
2 06 Change L10, L20, L28 to Muruta material. Change material to meet PSL. EE
3 14 Remove R240 and short R674 pin 1 (page 9) and R241 pin1. R240 is extra 0 ohm resistor. R241 is enough. EE
4 19 Delete RP1 by AMD suggestion. Pin INT# already have internal PU. EE
5 20 Connect USB_OC#2_3 to SB700 pin F8 and E4. Connect USB_OC#0_1 to SB700 pin A9. Follow GPIO table. EE
D 6 21 Add test pad TP117~TP143 commanded from GG list. Follow AMD check list. EE D

Change to +3.3V_ALW_2 to prevent NB_AC_OFF floating


7 40 Change RN1 pull-high power to +3.3V_ALW_2. under battery mode. EE

The cap connect to 19.5V power,


8 40 Change C539 from 0.47U 16V to 0.47U 25V cap. the spec of original cap is only 16V EE

9 21, 29 Add HDD_DET# connect from HDD to SB700 pin C4, change PU power to +3.3V_ALW_R. Follow GG list. EE
10 34 Change MEC5035 pin 19 to RC_ID, pin 30 to SUSPWROK. Follow GG list and GPIO table. EE
11 34 JDBG1 pin 2 connect to R789 and then connect to HOST_DEBUG_RX. Follow GG list. EE
MDC_RST_DIS# change from SB700 to 5028 pin 102
12 29, 35 and change pull-high power to +3.3V_ALW Follow GG list. EE

13 35, 49 No populate R263 and populate R178. For 2.5V_RUN_PWRGD issue. EE


14 31 Connect WIMAX_LED to LED_WWAN_OUT# through a 0 ohm resistor R832. Follow GG list. Implement WiMAX LED. EE
15 36 Add a net "+NBDOCK_DC_IN_SS" to dock connector pin 41 for battery protection. Follow GG list. EE
SPDIF_SHDN is no longer used in Dell’s M09 audio
16 18, 32 Delete SPDIF_SHDN circuit at page 18. Short SPDIF_OUT and R643 pin 1. architecture. This signal can be deleted. The SPDIF EE
C output will be turned off whenever a DRM event occurs. C

Add a net "WPAN_RADIO_DIS#" from ECE5028 pin 25 to D53 pin 2. In Foose there are WWAN and WPAN module will co-use
17 31, 35 Add D53 to be a OR gate to or WWAN_RADIO_DIS# and WPAN_DARIO_DIS# a WWAN mini card slot. This change is for disable EE
11/08 GPIO signals from ECE5028. Also pull-high D53 pin 3 to +3.3V_RUN but no pop. WWAN and WPAN module properly.

18 20, 21 Remove the second SPI ROM SPI2. Follow GG list. EE


X01 19 06 Change RN20 from 33 ohm to 0 ohm. Vendor change chipset version to D. EE
20 09 Change RN48 pull-high power from +1.8V_SUS to +1.8V_RUN. Follow AMD suggestion. EE
21 20 Add test pad from TP69, TP144~TP148 for integrated uC. Follow AMD check list. EE
22 22 Change L29 from max current 300mA to 2A. Follow AMD suggestion. EE
23 19 No populate R765 suggested by AMD. No populate R765 suggested by AMD. EE
24 30 Swap U26 pin 2 and pin 6. 1A connect to 1B, and 2A connect to 2B from spec. EE
25 48 Populate C434 with 0.1U 16V cap. Solution for +1.2V_RUN issue. EE
26 40 Remove C2 and C3. Pop these cap will cause the problem to read SMBus. EE
27 14 Change R607 pull-high power from +3.3V_RUN to +1.8V_RUN. Follow AMD suggestion. EE
B B
Add U96 for PWRGD signal from SB to NB and EC.
28 14 Because EC need +3.3V power, SB and NB only need +1.8V power. Follow AMD suggestion. EE

29 34 Change X6 to vendor EPSON, C791 and C802 from 22pF to 33pF. Follow vendor suggestion. EE
30 27 Change X5 from CL=20pF to CL=12pF. Follow vendor suggestion. EE
31 32 Change R88 from 0 ohm to 100 ohm. Follow vendor suggestion. EE
32 34 Add R841 for PWRGD circuit. Follow AMD suggestion. EE
33 37 Change R104 R105 R106 R459 R460 R461 R566 R576 R833 from 10K ohm to 20K ohm. LEDs have leakage issue. EE
34 32 Add 100K ohm resistor R834 for internal MIC feedback circuit. Follow vendor suggestion. EE
35 25 Change LED signal of LOM connector. Design error. EE
36 30 Change U30 to TPS2062A command by DELL. Follow DELL command. EE
11/23 37 14 Add R203 but no pop for SUS_STAT# suggested by AMD. Follow AMD suggestion. EE
38 35 Populate R419 and no populate R418 for changing board ID to X01. Change board ID to X01. EE
39 21 Change R700 from 15 ohm to 33 ohm resistor. For improving SIV signal. EE
11/29 40 38 Change R362 from 22 ohm to 0 ohm. Add AND gate for POWER_SW_IN3#_IN#. Follow GG list. EE
A <Variant Name> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Change List
Size Document Number Rev
A3 FOOSE-AMD 15.4" SB
Date: Friday, January 04, 2008 Sheet 51 of 53
5 4 3 2 1
5 4 3 2 1

DATE VERSON ITEM PAGE Modify List Issue Description OWNER


Make sure the PWR_DOWN pin is only pulled to GND
41 24 No pop R157 by Broadcom suggestion. and never asserted (Sighting S2_5761_31695). EE
D D

42 34 Change ACAV_IN circuit net name. Follow GG list. EE


43 38 MAX8731A_IINP change from EMC4002 pin 48 to pin 45. Change R160 to 4.7K ohm. Follow GG list. EE
44 36 Pop R1,R16 and no pop R7,R9. Follow GG list. EE
11/29 45 19 Change R322 from 33 ohm to 0 ohm. Improve signal measured by SIV team. EE
46 41 No pop R489 to let ADAPT_TRIP_SEL NC. Follow GG list. EE
47 23 Change ROM strip PU and PD resistor from 2.2K to 10K. AMD chipset SB700 change version from A11 to A12. EE
48 22 Change power for SB700 VDD from +1.2V_ALW_SUS to +1.2V_RUN. AMD chipset SB700 change version from A11 to A12. EE
49 48 Short +1.2V_SUS and +1.2V_ALW_SUS by L68, no pop enable related circuit. Solution of +1.2V_SUS leakage. EE
50 45 Add R840 and R841 for +0.9V_DDR_VTT, and no pop R840. Correct DDR power sequence to SUS plan. EE
12/05 51 20 Pop R367 and R785 to PU EC5035 pin11 and pin66 by vendor suggestion. Follow vendor suggestion. EE
52 16 No pop L23 and populate L24 for RS780 version changed from A11 to A12. AMD chipset RS780 change version from A11 to A12. EE
53 36 No pop Q1 Q21 R6 R85 for RS780 version changed from A11 to A12. AMD chipset RS780 change version from A11 to A12. EE
54 39 Change I/O board pin define for solution of audio noise. The solution for MIC noise when recording. EE
12/10 Remove S-vedio signal from U28, and short to connector side directly. DELL will remove S-vedio function from DOCK
C C
55 18 Add D57 and remove R185 for power leakage. at next version. EE

56 36 Modify DPC_DOCK_HPD and DPB_HPD circuit from DELL command. Follow DELL command. EE
Change R336, R319, R321, R331, R324, R830 from 22 ohm to 49.9 ohm.
57 19 C950 change from 22pF to 12pF and populate it. Solution of PCICLK EA. EE

12/13 X01 58 34 Remove U37 and C904 from DELL command. Follow GG list. EE
59 35 No connect SIO5028 pin 70. Follow GG list. EE
60 33 Add R626 and R629 for AUD_HP1_OUT_R1 and AUD_HP1_OUT_L1. Follow GG list. EE
61 32,33 Separate analog ground form digital ground for audio. Solution of audio noise. EE
62 37 Use BAT2_LED# to control blue LED, and use BAT1_LED# to control amber LED. Correct KBC GPIO for controlling battery LED. EE
63 09 Add R686, R694, R699 to protect noise for CPU and HDT. Follow AMD suggestion. EE
12/20 Change L42, L44, L45 from 47 ohm bead to 22 ohm bead.
64 18 No pop C538, R553, C565. Populate C534, C546, C560 with 5.6pF cap. Solution of CRT EA. EE

65 14,18 Change RN41 from 33 ohm to 0 ohm. Change R151 from 715 ohm to 768 ohm. Solution of CRT EA. EE
66 25 Add R268, R270, R281, R306. Prevent noise if another TPM is not populated. EE
B B
67 36 Swap E-SATA Tx and Rx signals. E-SATA Tx and Rx signals are wrong. EE
12/21 68 37 Add Q93, R856, C958, R857. Synchronize the LED for I/O board and LCD inverter. EE
69 36 Add Q8 and Q9 related circuit for DVI signal. Follow DELL command. EE
No populate PH resistor R356 and add a new 100K PH resistor Change DOCK_DET# PH from +RTC_CELL to +3.3V_ALW
70 35 R468 to +3.3V_ALW for DOCK_DET#. to prevent RTC leakage when docked. EE
12/26
71 35,36 Add C13 and R858 and R844 for DOCK_RST# circuit. Follow GG list. EE
72 35 Change USB_SIDE_EN# and ESATA_USB_PWR_EN# PH from +3.3V_ALW to +3.3V_ALW2. Follow GG list. EE
73 26,27 Add R471 and C525 but no-pop, add C807 and C810. Follow GG list. EE
12/27 74 25 Change C_TPM circuit. C_TPM part is changed, so change the circuit. EE
75 44 Remove +1.35V_RUN_LDO circuit. AMD chipset change to A12 and no need to use +1.35V. EE
76 14 Change R607 from 4.7K ohm to 300 ohm. Follow AMD suggestion. EE
12/31 77 21 Remove R729, R733, R739, R749. Remove 0ohm and route the trace in the same layer. EE
01/02 78 36 Add EL69~EL74 for Dock display port EMI. For Dock display port EMI. EE

A <Variant Name> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Change List II_EE
Size Document Number Rev
A3 FOOSE-AMD 15.4" SB
Date: Friday, January 04, 2008 Sheet 52 of 53
5 4 3 2 1
A B C D E

4 4

DATE VERSON ITEM PAGE Modify List Issue Description OWNER


1 40 Add a circuit for battery protection. The command from DELL. Power Team
2 41 Change L41 and R465. Follow power team suggestion. Power Team
11/08 3 47 Change R20 from 18K ohm to 49.9K ohm. Follow power team suggestion. Power Team
4 39 Add R528 and C951 by power team suggestion. Add R528 and C951 by power team suggestion. Power Team
Connect U53 drain and R525 pin 1 by power team suggestion. Connect U53 drain and R525 pin 1
5 41 Add Q93 and R838 by power team. by power team suggestion. Power Team

3
6 40 Add Q96, and let its drain connect to R845 at page 42. The command from DELL. Power Team 3
7 40 Add Q95, and connect gate to DOCK_DET# to prevent +DOCK_PWR_BAR leakage. Solution of +DOCK_PWR_BAR leakage. Power Team
8 41 Change R508 pin2 and Q8 gate from ACAV_IN_NB to ACAV_IN by power team at page42. A common signal name for all modules. Power Team
12/05 9 41 Change power +CHAGER_SRC to CHAGER_SRC by power team. A common signal name for all modules. Power Team
10 41 Add Q97 related circuit for net DOCK_DCIN_IS. The command from DELL. Power Team
11 41 Add U7B related circuit for net ACAV_IN_NB. The command from DELL. Power Team
X01 12 41 Add R846 and R847, and connect ISL88731_ICM to R160 pin1. Follow power team suggestion. Power Team
13 41 No pop ADAPT_OC related circuit. The command from DELL. Power Team
14 42 Populate PR650 and PC699. Follow power team suggestion. Power Team
Change PR718 from 6.2K ohm to 4.02K ohm. Add PC958 but no-pop.
15 43 Change PR706 PU power from +3.3V_ALW to +3.3V_SUS. Follow power team suggestion. Power Team

12/11 16 44 Add PR719 and PR999. Follow power team suggestion. Power Team
Populate PR807 and PC932. Change PR780 from 240K ohm to 143K ohm.
17 46 Change PU80 to FDS8884. Follow power team suggestion. Power Team

18 47 Add PC957 and change PU4 same as PQ15. Follow power team suggestion. Power Team
2 2
19 47 Remove PTC12 by power team suggetion. Follow power team suggestion. Power Team
12/13 20 Change all open-gap to close-gap except the close-gap for VCORE1 and VCORE2. Follow power team suggestion. Power Team
21 49 Change R759 from 20K to 100K. Follow power team suggestion for L6935 PGOOD issue. Power Team
12/20 22 44 Add PR585~PR588 by power team suggestion. Follow power team suggestion. Power Team
23 42,43 Change PR656 and PR706 from 200K to 100K ohm. Follow power team suggestion. Power Team
12/28 24 40 Add PR855, PQ98, PR856, PD53, PQ99, PQ100, PR857, PR858. Follow power team suggestion. Power Team
25 46 Populate PR713, and populate PC859 from 330pF 50V to 1500pF 50V. Follow power team suggestion. Power Team
01/02 26 46 Change PR748 from 249k to 267k ohm. This is for OCP solution. Power Team

1 <Variant Name> 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Change List_EE
Size Document Number Rev
A3 FOOSE-AMD 15.4" SA
Date: Friday, January 04, 2008 Sheet 53 of 53
A B C D E

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