Lab Manual Digital Electronics

Government College University,
Faisalabad
Department of Electrical Engineering,
Digital Electronics
Lab Manual
Prepared & Edited by:
Engr. M. Malik (Lecturer)
Engr. Maria Hanif (Lab Engineer)
Verified by:
Engr. Kashif Nisar Paracha (Lecturer)
Approved by:
Engr. Muhammad Afzal Sipra (TI, M),
Associate Professor, Chairman Electrical
Engineering Department
Digital Electronics Lab Manual 2

TABLE OF LAB EXPERIMENTS
Sr. Page.
No. Experiments No.
 To check the behavior of a transistor in saturation & cutoff mode

1. 6
 To verify transistor’s behavior as a switch
2.  To check the behavior of a transistor in saturation & cutoff mode. 11
 To verify transistor’s behavior as an inverter

 To check the functionality of a Schmitt Trigger circuit.
3. 13
 To verify it’s behavior using different inputs.
 To check the functionality of a Monostable Multivibrator circuit.
4 17
 To verify its behavior using different triggering circuits.
To check the behavior and functionality of a Monostable Multivibrator using a
5 20
555 Timer IC.
6 To check the behavior and functionality of a Astable Multivibrator Circuit. 23
To check the behavior and functionality of an Astable Multivibrator using a 555

7 26
Timer IC.
 To check the functionality of a Bistable Multivibrator circuit.
8 29
 To verify its behavior using different triggering circuits.
9  To design, implement & analysis of a Transistor Sweep Generator 32
 To implement AND, OR, NAND, NOR, and NOT logic gates using Resistor
10 35
Transistor Logic (RTL)
 To Implement AND, OR, NAND, NOR, and NOT logic gates using Diod
11 38
Transistor Logic (DTL)
To check the input volt-ampere characteristics & behavior of a transistor-
12 41
transistor logic gate.
To check the output volt-ampere characteristics & behavior of a transistor-
13 44
transistor logic gate.
PREFACE
The laboratory of each and every subject taught in the degree of Bachelors in Electrical
Engineering is of very much importance in every University. Fully equipped laboratory meeting

the industrial demands under the supervision of qualified, talented and practically motivated lab
assistants and lab engineers is also a basic criterion of the Pakistan Engineering Council. This
Manual has been formulated considering all these above mentioned points.
This manual is according to the equipment supplied by the RIMS, USA and meets the
requirements of all the course of Digital Electronics as per the curriculum of GC University
Faisalabad.
Special thanks to the staff and students for assisting me in the preparation of this manual.
With Regards
Engr. Maria Hanif
General Lab Instructions

 Each student group consists of a maximum of 2-4 students. Each group member is
responsible in submitting lab report upon completion of each experiment on their
practical Note book.
 Students are to wear proper attire i.e shoe or sandal instead of slipper. Excessive
jewelries are not advisable as they might cause electrical shock.
 A permanent record in ink of observations as well as results should be maintained by
each student and enclosed with the report.
 The recorded data and observations from the lab manual need to be approved and
signed by the lab instructor upon completion of each experiment.
 Before beginning connecting up, it is essential to check that all sources of supply at
the bench are switched off.
 Start connecting up the experiment circuit by wiring up the main circuit path, then
adds the parallel branches as indicated in the circuit diagram.
 After the circuit has been connected correctly, remove all unused leads from the
experiment area, set the voltage supplies at the minimum value, and check the meters
are set for the intended mode of operation.
 The students may ask the lab instructor to check the correctness of their circuit before
switching on.
 When the experiment has been satisfactory completed and the results approved by the
instructor, the students may disconnect the circuit and return the components and
instruments to the locker tidily. Chairs are to be slid in properly.

Experiment No. 1
DESIGN AND ANALYSIS OF A TRANSISTOR AS A
SWITCH
OBJECTIVE
 To check the behavior of a transistor in saturation & cutoff mode.
 To verify transistor’s behavior as a switch.
EQUIPMENT
 DC Power Supply  Transistors:
 Digital Multimeter (DMM)  BJT 2N3904
 Function Generator  MOSFET (2N4351)
 Oscilloscope  Resistors: 1 k, 18 k
 Capacitors: 0.001 μF
THEORY
A bipolar junction transistor (BJT) is widely used in discrete circuits as well as in IC design,
both analog and digital. Its main applications are in amplification of small signals, and in
switching digital logic signals. In a BJT, both majority carriers and minority carriers play a role
in the operation of the transistor, hence the term bipolar.
The circuit symbol of the NPN transistor with current and voltage polarities marked is shown in
Figure 1.

IC
Collector
+
Base
+ VCE
IB
VBE
IE
Emitter
Fig.1: Circuit Symbol of a NPN BJT
A BJT commonly called simply a transistor may be made to act like a simple on off switch. In
such an application the transistor is operated in the saturated region to simulate the on switch
condition and in the cutoff region to simulate the off switch condition. The input applied to the
base of the transistor either turns it on or off. When the transistor switches On VCE is equal to VCE
(On) and when the transistor is Off VCE is equal Vcc.
The metal oxide semiconductor field effect transistor may also be used as a switch in a manner
similar to BJT switch. In fact the MOSFET switch is becoming more popular, especially since its
switching speed is becoming favorably comparable to a BJT switch.
PROCEDURE
1. Connect the transistor switch circuit.
2. Apply 0v at the input terminal. Measure and record the voltage appearing at the output
terminal.
3. Apply 5v DC at the input terminal. Measure and record the voltage at the output terminal.
4. Apply a 10 Vp-p, 1 KHz sine wave at input terminal.
5. Using Oscilloscope, observe and record the input as well as the output voltage waveform.
6. From the waveforms observed in procedure step 5, find VCE(on), VCE(off) minimum input
voltage required to turn transistor on and the minimum bias voltage required to turn the
transistor off.
7. Change the input to a 10 Vp-p 1 KHz square wave. Observe and draw the input as well as
the output waveforms.
8. Increase the input frequency slowly and observe its effects on the output waves. The
output waveform should get progressively distorted as the frequency is increased.

9. Set the input frequency to 100 KHz. The output waveform should now appear
considerably distorted. Draw the distorted waveform.
10. Connect a .001 μF capacitor across 47 kΩ resistor. The distortion in output waveform
should now disappear. Draw the output waveform.
11. Connect the MOSFET switch circuit as shown in figure.
12. Apply 5V at input terminal. Measure and record in table the DC voltage appearing at
output.
13. Decrease the input slowly while monitoring the output voltage level. A point will be
reached when the output becomes high. Measure and record in table the input and output
voltage levels at this point.
CIRCUIT DIAGRAM
Fig 2: Transistor as a Switch Fig. 3: Transistor with speed up capacitor

OBSERVATION
Table 1: Comparison between calculated and measured results
VBB VCE IB IC VCE Ic

(V) (V) (A) (mA) (V) (mA)
Measured Measured Measured Calculated Calculated
0
1
1.5
2
2.5
CALC 3 ULATI
ON 3.5
4
1. 4.5 From the
5
manufacturers data sheet it is noted that Ic(max) = 600mA, Vcc(max) = 40V, VCE (on)=
0.4V, VBE (on) = 0.75V, β=80 and QT = 40uC for 2N4401.
2. Consider simple transistor switch shown in figure. Find and record in table (given below)
the two output voltage levels for the input voltage levels from 0V to 5V.
3. Calculate the percentage error between the experimentally observed and the theoretically
expected output values.
QUESTIONS
1. The information recorded in the table is intended to show that a transistor may be used as
a switch. Explain whether that has been accomplished.
2. Examine the input output recorded in the table. Explain briefly what happens in each
case.
3. Explain how a speed up capacitor accomplices its task.

DISCUSSION AND CONCLUSION
1) -------------------------------------------------------------------------------------------
2) -------------------------------------------------------------------------------------------
3) --------------------------------------------------------------------------------------------

Experiment No. 2
DESIGN AND ANALYSIS OF A TRANSISTOR AS AN
INVERTER
OBJECTIVE
 To check the behavior of a transistor in saturation & cutoff mode
 To verify transistor’s behavior as an inverter
EQUIPMENT
 DC Power Supply  Transistors:
 Digital Multimeter (DMM)  BJT 2N3904
 Function Generator  MOSFET (2N4351)
 Oscilloscope  Resistors: 1 k, 18 k
 Capacitors: 0.001 μF
THEORY
One common use of a transistor switch is in the inverter circuit. It basically is a simple
transistor switch with a biasing voltage and a resistor added to it. Addition of V BB and RB assures
the off condition of the inverter.
PROCEDURE
1. Connect the transistor inverter circuit.
2. Apply a 10 Vp-p, 1 KHz sine wave at input terminal.
3. Using Oscilloscope, observe and record the input as well as the output voltage waveform.
4. From the waveforms observed, find VCE (on), VCE(off) minimum input voltage required
to turn transistor on and the minimum bias voltage required to turn the transistor off.
5. Change the input to a 10 Vp-p 1 KHz square wave. Observe and draw the input as well as
the output waveforms.
6. Increase the input frequency slowly and observe its effects on the output waves. The
output waveform should get progressively distorted as the frequency is increased.

CIRCUIT DIAGRAM
Fig. 1: Transistor as an inverter

QUESTION
Assess whether or not the inverter functioned properly.
DISCUSSION
1. Summarize your conclusion from the observed and theoretical values.
2. Account for discrepancies between observed and theoretically expected values.
CONCLUSION
1) -------------------------------------------------------------------------------------------
2) -------------------------------------------------------------------------------------------

Experiment No. 3
DESIGN, IMPLEMENTATION & ANALYSIS OF
SCHMITT TRIGGER CIRCUIT
OBJECTIVE
 To check the functionality of a Schmitt Trigger circuit
 To verify it’s behavior using different inputs
EQUIPMENT
 DC Power Supply  Capacitors: 35 pF
 Digital Multimeter (DMM)  Transistors: BJT 2N3904
 Function Generator  Resistors: RC = 3.9 KΩ, R1 = R2 =

22 KΩ, RB = 2.2 KΩ , RE = 2.2 KΩ
 Oscilloscope
THEORY
A Schmitt trigger circuit is basically a switched bistable multivibrator device, that is, at any
one time, one transistor is off while the other is ON. The input voltage determines whether Q 1 is
ON or and Q2 is OFF or Q1 is OFF and Q2 is ON. A Schmitt trigger circuit is a slight variation of
the bistable multivibrator circuit.
The upper trigger potential (UTP) refers to the input voltage level above which Q1 stays ON and
Q2 stays OFF. The lower trigger potential (LTP) refers to the input voltage level below which Q 1
stays OFF and Q2 stays ON.
The basic Schmitt trigger circuit is shown in fig.1. If we compare the bistable multivibrator
circuit with the Schmitt trigger circuit, we find that coupling from Q 2 collector to Q1 base in the
case of a bistable circuit is absent in the case of a Schmitt trigger circuit. Instead, the resistance
RE provides the coupling.
PROCEDURE:
1. Connect the Schmitt Trigger circuit as shown in fig.1.
2. With Vin at 0V (ground), measure and record the DC voltages appearing at collectors,
bases, and emitters of both transistors.
3. Connect the DC power supply at Vin. Increase the input voltage (Vin) slowly while
constantly monitoring the output voltage at Vo. The output voltage should suddenly jump
to about Vcc when the input voltage reaches a certain level. This is UTP.

4. Now decrease the input DC voltage (from above UTP) slowly while monitoring the
output voltage level (VO). The output voltage level should drop suddenly as the input
reaches a certain level (LTP).
5. Replace the DC input power supply by a 10 V p-p, 5 KHz sine wave. Observe and draw the
input as well as the output waveforms. Again find the UTP and LTP from the waveforms
drawn.
6. Disconnect and return all the test equipment to its proper place.
CIRCUIT DIAGRAM
Fig. 1: Schmitt Trigger circuits
Fig. 2: Transfer Characteristics of Schmitt trigger

OBSERVATION
VC1 VC2 VB1 VB2 VE1 VE2

(V) (V) (V) (V) (V) (V)
Measured Calculated
Measured UTP
LTP
Calculated
QUESTION
1. Calculate VC1, VC2, VB1, VB2, VE1 and VE2 when Ei = 0V. Assume VBE (ON) = 0.7V,
VCE(ON) = 0.3V and β = 80.
2. Calculate the percentage error between the observed and the theoretical values using the
following relation:
Percentage Error = (Theoretical Value – Observed Value)/ Theoretical Value
DISCUSSION
CONCLUSION
1) -------------------------------------------------------------------------------------------
2) -------------------------------------------------------------------------------------------

3) --------------------------------------------------------------------------------------------
ASSIGNMENT
Construct Schmitt circuit through op-amp.

Experiment No. 4
DESIGN, IMPLEMENTATION & ANALYSIS OF A
MONOSTABLE MULTIVIBRATOR
OBJECTIVE
 To check the functionality of a Monostable Multivibrator circuit
 To verify it’s behavior using different triggering circuits
EQUIPMENT
 DC Power Supply (9 V)  Capacitors: 2500pF
 Function Generator  Resistors: RL = 4.7 KΩ, R1 = 27 KΩ,

R2 = 47 KΩ, RB = 180 KΩ
 Oscilloscope
THEORY
A multivibrator is an electronic circuit used to implement a variety of simple two-state
systems such as oscillators, timers and flip-flops. It is characterized by two amplifying
devices (transistors,electron tubes or other devices) cross-coupled by resistors or capacitors. The
name "multivibrator" was initially applied to the free-running oscillator version of the circuit
because its output waveform was rich in harmonics. There are three types of multivibrator
circuits depending on the circuit operation.
1) Astable
2) Monostable
3) Bistable
A monostable multivibrator, also known as a monoshot, is one in which one of the states is stable
and the other is quasi-stable. The circuit is initially in the stable state. It goes to the quasi-stable
state when appropriately triggered. It stays in the quasi-stable state for a certain time period, after
which it comes back to the stable state. Figure below shows the basic monostable multivibrator
circuit.
PROCEDURE
1. Connect the monostable circuit as shown in figure below.
2. Measure and record in table the output voltage level (Vo).
3. Measure and record in table, the base voltages of both of the transistors [VBE (on) and
VBE (off)] of the monostable circuit.

4. CIRCUIT DIAGRAM
Fig. 1: Monostable Multivibrator
OBSERVATION
VCE (ON) VCE (OFF) VBE (ON) VBE (OFF) VO tp (min) tp (max)
(V) (V) (V) (V) (V) (Sec) (Sec)
Measured
Calculated
QUESTION
1. From the transistor manual, find Ic(max), VBE(ON), and VBE(ON).
2. Calculate VCE(OFF) and VBE(OFF) for the monostable circuit tested.
3. Calculate the percentage error between the observed and the theoretical values.
4. Summaries your conclusions from the observed and theoretical values.
DISCUSSION

CONCLUSION
1) -------------------------------------------------------------------------------------------
2) -------------------------------------------------------------------------------------------
3) --------------------------------------------------------------------------------------------

Experiment No. 5
IMPLEMENTATION & ANALYSIS OF A MONOSTABLE
MULTIVIBRATOR USING 555 TIMER IC.
OBJECTIVE
 To check the behavior and functionality of a Monostable Multivibrator using a 555 Timer
IC
EQUIPMENT
 Oscilloscope  Resistors: R = 22 KΩ
 DC Power supply
 Multimeter  Capacitors: C = 0.039 μF
 Multi function generator  555 timer
THEORY
555 timer IC is one of the most commonly used general-purpose linear integrated circuits.
The simplicity with which monostable and astable multivibrator circuits can be configured
around this IC is one of the main reasons for its wide use.
In monostable mode, the output stays HIGH as long as voltage across an externally connected
capacitor to the threshold terminal is below two-thirds of V CC. When the capacitor voltage
reaches two-thirds of VCC, the comparator (built within 555 timer) resets the timer to LOW,
which in turn closes the discharge path for the capacitor (stable state).
A basic 555 monostable circuit is shown in the figure. The supply voltage is connected across
terminal 8 (+Vcc) and terminal 1 (Ground). Terminal 2 (Trigger) is directly connected to trigger
pulse source which should initially be kept at + V CC. A HIGH at terminal 2 forces the output to
the LOW state. A HIGH-to-LOW trigger pulse at terminal 2 holds the output in the HIGH state
and simultaneously allows the capacitor to charge from + VCC through R. Remember that a LOW
level of the trigger pulse needs to go at least below + VCC /3. When the capacitor voltage exceeds
+2 VCC /3, the output goes back to the LOW state.
We will need to apply another trigger pulse to terminal 2 to make the output go to the HIGH state
again. Every time the timer is appropriately triggered, the output goes to the HIGH state and
stays there for the time it takes the capacitor to charge from 0 to +2 V CC /3. This time period,
which equals the monoshot output pulse width, is given by the equation:

T = 1.1RC
C is the capacitor which charges from VCC via resistor R when npn transistor Q1 is off. Terminal
4 is connected directly to VCC to ensure that pnp transistor Q2 remains off at all times. The output
is taken from terminal 3.
INTERNAL CIRCUITARY
Initially, when the output at pin 3 is low i.e. the circuit is in a stable state, the transistor is on and
capacitor- C is shorted to ground. When a negative pulse is applied to pin 2, the trigger input
falls below +1/3 VCC, the output of comparator goes high which resets the flip-flop and
consequently the transistor turns off and the output at pin 3 goes high. This is the transition of the
output from stable to quasi-stable state, as shown in figure. As the discharge transistor is cutoff,
the capacitor C begins charging toward +VCC through resistance RA with a time constant equal to
RAC. When the increasing capacitor voltage becomes slightly greater than +2/3 VCC, the output of
comparator 1 goes high, which sets the flip-flop. The transistor goes to saturation, thereby
discharging the capacitor C and the output of the timer goes low.
Thus the output returns back to stable state from quasi-stable state.
The output of the Monostable Multivibrator remains low until a trigger pulse is again applied.
Then the cycle repeats. Trigger input, output voltage and capacitor voltage waveforms are shown
in figure 3.
PROCEDURE
1. Connect the monostable circuit as shown.
2. Measure the DC levels appearing at the output, the control voltage, and across the
capacitor when the input is high.
3. Apply the pulse wave to the trigger input terminal.
4. Observe the input, the output, and the threshold voltage waveforms.

CIRCUIT DIAGRAM
Fig.1: Monosatble Multivibrator using 555 Timer
Fig.2: internal circuitary

Fig. 3: Monosatble Multivibrator relevant Waveforms
QUESTIONS
1. Calculate the theoretical value of tp.
2. Calculate the percentage error between the observed and the theoretical values in the
following manner:
DISCUSSION
CONCLUSION
1) -------------------------------------------------------------------------------------------
2) -------------------------------------------------------------------------------------------

Experiment No. 6
DESIGN, IMPLEMENTATION & ANALYSIS OF AN
ASTABLE MULTIVIBRATOR
OBJECTIVE
 To check the functionality of an Astable Multivibrator circuit
EQUIPMENT
 DC Power Supply (5 V)  Capacitors: 0.005 μF
 Function Generator  Resistors: RL = 2.7 KΩ, RB = 150 KΩ
 Oscilloscope
THEORY
In the case of an astable multivibrator, neither of the two states is stable. Both output states
are quasi-stable. The output switches from one state to the other and the circuit functions like a
free-running square-wave oscillator. Figure below shows the basic astable Multivibrator circuit.
It can be proved that, in this type of circuit, neither of the output states is stable. Both states,
LOW as well as HIGH, are quasi-stable. The time periods for which the output remains LOW
and HIGH depends upon R2C2 and R1C1 time constants respectively. For R1C1 = R2C2, the output
is a symmetrical square waveform.
PROCEDURE
1. Connect the Astable circuit as shown.
2. Measure and record in table the output voltage level (Vo).3.
3. Measure and record in table, the base voltages of both of the transistors [VBE(on) and VBE
(off)] of the Astable circuit.

CIRCUIT DIAGRAM
Fig.1: Astable Multivibrator
OBSERVATION
(V) (V) (V) (V) (V) (Sec) (Sec)
Measured
Calculated
QUESTION
1. From the transistor manual, find Ic(max), VCE(ON), and VBE(ON).
2. Calculate VCE(OFF) and VBE(OFF) for the Astable circuit tested.
DISCUSSION

CONCLUSION
1) -------------------------------------------------------------------------------------------
2) -------------------------------------------------------------------------------------------
3) --------------------------------------------------------------------------------------------

Experiment No. 7
IMPLEMENTATION & ANALYSIS OF AN ASTABLE
MULTIVIBRATOR USING 555 TIMER IC.
OBJECTIVE
 To check the behavior and functionality of an Astable Multivibrator using a 555 Timer IC
EQUIPMENT
 Oscilloscope  Resistors: R1 = 3.3 KΩ , R2 = 2.7 KΩ
 DC Power supply
 Capacitors: C = 0.082μF
 Multimeter
 Multi function generator
THEORY
In the astable mode, the threshold terminal is connected to the input trigger terminal and the
resistance is inserted between the threshold and the discharge terminal.
Figure below shows the basic 555 timer based astable multivibrator circuit. Initially, capacitor C
is fully discharged, which forces the output to go to the HIGH state. An open discharge transistor
allows the capacitor C to charge from + VCC through R1 and R2. When the voltage across C
exceeds +2 VCC/3, the output goes to the LOW state and the discharge transistor is switched ON
at the same time. Capacitor C begins to discharge through R2 and the discharge transistor inside
the IC. When the voltage across C falls below + VCC/3, the output goes back to the HIGH state.
The charge and discharge cycles repeat and the circuit behaves like a free-running multivibrator.
Terminal 4 of the IC is the RESET terminal. Usually, it is connected to + VCC. If the voltage at
this terminal is driven below 0.4 V, the output is forced to the LOW state, overriding command
pulses at terminal 2 of the IC.
The HIGH-state and LOW-state time periods are governed by the charge (+VCC/3 to +2
VCC/3) and discharge (+2 VCC/3 to + VCC/3) timings. These are given by the equations:
HIGH-state time period THIGH = 0.69 (R1 +R2).C

LOW-state time period TLOW = 0.69R2C

PROCEDURE
1. Connect the astable circuit as shown.
2. Measure the DC levels appearing at the output, the discharge, and across the capacitor.
3. Observe the input, the output, and the threshold voltage waveforms.
CIRCUIT DIAGRAM
Fig. 1: Astable Multivibrator using 555 Timer.

Fig. 2: Astable Multivibrator relevant Waveforms.
QUESTIONS
1. Calculate the theoretical value of tp.
following manner:
DISCUSSION
CONCLUSION
1) -------------------------------------------------------------------------------------------
2) -------------------------------------------------------------------------------------------

Experiment No. 8
BISTABLE MULTIVIBRATOR
OBJECTIVE
 To check the functionality of a Bistable Multivibrator circuit
 To verify it’s behavior using different triggering circuits
EQUIPMENT
 DC Power Supply (5 V)  Capacitors: 0.01μF
 Function Generator  Resistors: RL = 2.7 KΩ, R1 = 15 KΩ,

R2 = 27 KΩ
 Oscilloscope
THEORY
A bistable multivibrator circuit is one in which both LOW and HIGH output states are stable.
Irrespective of the logic status of the output, LOW or HIGH, it stays in that state unless a change
is induced by applying an appropriate trigger pulse. As we will see in the subsequent pages, the
operation of a bistable multivibrator is identical to that of a flip-flop.
Figure shows the basic bistable multivibrator circuit. This is the fixed-bias type of bistable
multivibrator. Other configurations are the self-bias type and the emitter-coupled type. However,
the operational principle of all types is the same.
PROCEDURE
1. Connect the F/F circuit as shown.
2. Measure and record in table the two output voltage levels (VO1 and VO2).
3. Measure and record in table the base voltages of both of the transistors [V BE(on) and VBE
(off)] of the F/F.

CIRCUIT DIAGRAM
Fig. 1: Bistable Multivibrator
OBSERVATION
(V) (V) (V) (V) (V) (Sec) (Sec)
Measured
Calculated
QUESTIONS
1. From the transistor manual, find Ic(max), VCE(ON), and VBE(ON).
2. Calculate VCE(OFF) and VBE(OFF) for the F/F circuit tested.
DISCUSSION

CONCLUSION
1) -------------------------------------------------------------------------------------------
2) -------------------------------------------------------------------------------------------
3) --------------------------------------------------------------------------------------------

Experiment No. 9
TRANSISTOR SWEEP GENERATOR
OBJECTIVE
 To check the functionality of a Sweep Generator circuit
EQUIPMENT
 DC Power Supply  Capacitors: 2.5 μF
 Function Generator  Resistors: RL = 1.5 KΩ, R1 = 10 KΩ,

R2 = 15 KΩ
 Oscilloscope
THEORY
The transistor sweep generator consists of a simple transistor switch with a capacitor as load.
The load capacitor charges through a larger load resistor RL (sweep time) when the transistor is
off and discharges quickly (retrace time) through the lower resistance of the transistor when it
(transistor) is ON. Assuming VCE(ON) to be negligible, the sweep voltage is given by:
�t �
-� �
Vc = Vcc - Vcc e �RC �
PROCEDURE
1. Connect the transistor sweep circuits as shown.
2. Observe and draw the input as well as the output voltage waveforms. Make sure you
record the correct amplitude and the sweep time of the output sweep.
3. Change the input frequency to 50 KHz. Observe and draw the output voltage waveform.
4. Change the input frequency to 500 KHz. Observe and draw the output voltage waveform.

CIRCUIT DIAGRAM
Fig. 1: Transistor Sweep Generator.
Fig. 2: Miller Sweep Generator.

OBSERVATIONS
VCE (ON) VCE (OFF) VBE (ON) VBE (OFF) VO

(V) (V) (V) (V) (V)
Measured
Calculated
QUESTIONS
1. From the output waveform drawn, find the experimentally observed peak-to-peak
amplitude of the output sweep.
2. Calculate peak-to-peak amplitude (theoretical) of the output sweep.
following manner:
DISCUSSION
CONCLUSION
1) -------------------------------------------------------------------------------------------
2) -------------------------------------------------------------------------------------------

Experiment No. 10
IMPLEMENTATION OF AND, OR, NAND, NOR, AND
NOT LOGIC GATES USING RESISTOR TRANSISTOR
LOGIC (RTL)
OBJECTIVE
 To check the behavior & functionality of different logic gates using Resistor-Transistor
Logic (RTL).
EQUIPMENT
 DC Power Supply  Oscilloscope
 Function Generator  Resistors: 18 KΩ, 1 KΩ
THEORY
There are several so called commercial families of IC logic gates, which are an
improvement over simple diode gates. A family of logic gates is characterized by the constituents
of a typical gate circuit. Resistor-Transistor logic (RTL) gates constitute one such family. All
logic gates of this family contain only resistors (R) and transistors (T) in their individual logic
(L) circuits.
PROCEDURE
1. Connect the circuits as shown.
2. Attach the DC power supply to the circuit to give Vcc.
3. Now apply the combination of 00, 01, 10, and 11 to the inputs of the gates (where logic
0 = 0V and logic 1 = 5V)
4. Observe and draw the output voltage waveforms.

CIRCUIT DIAGRAM
Fig. 1: RTL NAND Fig.2: RTL NOR
OBSERVATIONS

(V) (V) (V) (V) (V)
Measured
Calculated
QUESTIONS
1. From the output waveforms drawn, find the experimentally observed amplitude of the
output.
following manner:

DISCUSSIONS
CONCLUSION
1) -------------------------------------------------------------------------------------------
2) -------------------------------------------------------------------------------------------
3) --------------------------------------------------------------------------------------------

Experiment No. 11
IMPLEMENTATION OF AND, OR, NAND, NOR, AND
NOT LOGIC GATES USING DIODE TRANSISTOR LOGIC
(DTL)
OBJECTIVE
 To check the behavior & functionality of different logic gates using Diode-Transistor
Logic (DTL)
EQUIPMENT
 DC Power Supply  Diodes
 Function Generator  Resistors: 18 KΩ, 1 KΩ
 Oscilloscope
THEORY
Diode-Transistor logic is another family of logic gates. A DTL gate is constructed using
diodes and transistors as logic elements. The AND/OR operation is accomplished by using
diodes and NOT operation is accomplished by a transistor inverter.
PROCEDURE:
1. Connect the circuits as shown.
3. Now apply the combination of 00, 01, 10, and 11 to the inputs of the gates (where
logic0 = 0V and logic1 = 5V)
4. Observe and draw the output voltage waveforms.

CIRCUIT DIAGRAM
Fig.1: DTL NAND
Fig.2: DTL NOR

OBSERVATIONS

(V) (V) (V) (V) (V)
Measured
Calculated
QUESTIONS
output.
following manner:
DISCUSSIONS
CONCLUSION
1) -------------------------------------------------------------------------------------------
2) -------------------------------------------------------------------------------------------
3) --------------------------------------------------------------------------------------------

Experiment No. 12
INPUT VOLT-AMPERE CHARACTERISTICS OF THE TTL
GATE.
OBJECTIVE
 To check the input volt-ampere characteristics & behavior of a transistor-transistor logic
gate.
EQUIPMENT
 Digital Multimeter (DMM)  Transistor: BJT 2N3904
 Function Generator  Resistors: R1 = 4KΩ, R2 =1.6 KΩ, R3

= 130 Ω, R4 = 1 KΩ
 Oscilloscope
THEORY
When Vi = 0V, Q2 is cutoff therefore Ic1 = 0. By neglecting B we can represent Q 1 as a diode.
Then,
Ii = (5 – 0.75 - Vi)/ 4 KΩ
For Vi = 0, Ii = -1.06 mA, the voltage intercept is given by 5 – 0.75 = 4.25V.
As Vi increases the transistor Q2 begins to turn ON. When Ii = 0 mA, all the current flows into the
collector of Q1 and into the base of Q2. At this point transistor Q4 and Q2 will be saturation and
the voltage VB4 = 1.5V. Vi is also approximately 1.5V. This point of V i = 1.5V and Ii = 0mA is
noted in the plot.
When the base current of Q2 becomes significant then transistor Q2 and Q4 are in their active
region and T1 will saturate. So,
Vi = VBE3 + VBE4 – VCE1 (sat)
= 0.7 + 0.7 – 0.2
= 1.2 V
With Vi greater than 1.5V the IE1 if Q1 is in reverse direction and it enters its inverse active
region. So we have very small current (Ii = 14 μA). The current remains approximately the same
as Vi reaches to its maximum voltage.

PROCEDURE
1. Connect the circuit as shown.
3. Give the input signal Vi.
4. Increase the value of Vi and observe the current Ii.
5. Draw the graph using different values if Vi and Ii and compare it with the actual graph.
CIRCUIT DIAGRAM
Fig.1: TTL NAND
Fig. 2: Input Volt-Ampere Characteristics of TTL gate

OBSERVATIONS
Vi I
(V) (mA)
Measured
Calculated
QUESTIONS
output.
following manner:
DISCUSSION
CONCLUSION
1) -------------------------------------------------------------------------------------------
2) -------------------------------------------------------------------------------------------
3) --------------------------------------------------------------------------------------------

Experiment No. 13
OUTPUT VOLT-AMPERE CHARACTERISTICS OF THE
TTL GATE.
OBJECTIVE
 To check the output volt-ampere characteristics & behavior of a transistor-transistor logic
gate.
EQUIPMENT
 Digital Multimeter (DMM)  Transistor: BJT 2N3904
 Function Generator  Resistors: R1 = 4KΩ, R2 =1.6 KΩ,

R3 = 130 Ω, R4 = 1 KΩ
 Oscilloscope
THEORY
When the gate input is at logic 0, the transistors Q2 and Q4 are cutoff. The gate output is now
at logic 1, and the gate is sourcing the current i.e. furnishing current to the load so that I L is
negative. When the gate input is at logic 1, the transistor Q4 is in saturation and the gate will be
sinking current i.e. IL will be positive.
PROCEDURE
1. Connect the circuit as shown.
3. Give the input signal Vi.
4. Change the value of Vo and observe the current Is.
5. Draw the graph using different values if Vo and Is and compare it with the actual graph.

CIRCUIT DIAGRAM
Fig. 1: TTL NAND gate
Fig. 2: Output Volt-Ampere Characteristics of TTL gate

OBSERVATIONS
Vo I
(V) (mA)
Measured
Calculated
QUESTIONS
output.
following manner:
DISCUSSION
CONCLUSION
1) -------------------------------------------------------------------------------------------
2) -------------------------------------------------------------------------------------------
3) --------------------------------------------------------------------------------------------

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Government College University,

Digital Electronics Lab Manual 2

 To check the behavior of a transistor in saturation & cutoff mode

 To verify transistor’s behavior as an inverter

To check the behavior and functionality of an Astable Multivibrator using a 555

9  To design, implement & analysis of a Transistor Sweep Generator 32

Digital Electronics Lab Manual 3

Engr. Maria Hanif

General Lab Instructions

Digital Electronics Lab Manual 4

Digital Electronics Lab Manual 5

 Digital Multimeter (DMM)  BJT 2N3904

 Function Generator  MOSFET (2N4351)

 Oscilloscope  Resistors: 1 k, 18 k

Digital Electronics Lab Manual 6

Digital Electronics Lab Manual 7

Fig 2: Transistor as a Switch Fig. 3: Transistor with speed up capacitor

Digital Electronics Lab Manual 8

VBB VCE IB IC VCE Ic

Digital Electronics Lab Manual 9

Digital Electronics Lab Manual 10

 Digital Multimeter (DMM)  BJT 2N3904

 Function Generator  MOSFET (2N4351)

 Oscilloscope  Resistors: 1 k, 18 k

Digital Electronics Lab Manual 11

Fig. 1: Transistor as an inverter

Digital Electronics Lab Manual 12

 Digital Multimeter (DMM)  Transistors: BJT 2N3904

 Function Generator  Resistors: RC = 3.9 KΩ, R1 = R2 =

Digital Electronics Lab Manual 13

Fig. 1: Schmitt Trigger circuits

Fig. 2: Transfer Characteristics of Schmitt trigger

Digital Electronics Lab Manual 14

VC1 VC2 VB1 VB2 VE1 VE2

Table 2: Comparison between calculated and measured results

Digital Electronics Lab Manual 15

Digital Electronics Lab Manual 16

 Digital Multimeter (DMM)  Transistors: BJT 2N3904

 Function Generator  Resistors: RL = 4.7 KΩ, R1 = 27 KΩ,

Digital Electronics Lab Manual 17

Fig. 1: Monostable Multivibrator

Digital Electronics Lab Manual 18

Digital Electronics Lab Manual 19

Digital Electronics Lab Manual 20

Digital Electronics Lab Manual 21

Fig.1: Monosatble Multivibrator using 555 Timer

Fig.2: internal circuitary

Digital Electronics Lab Manual 22

Digital Electronics Lab Manual 23

 Digital Multimeter (DMM)  Transistors: BJT 2N3904

 Function Generator  Resistors: RL = 2.7 KΩ, RB = 150 KΩ

Digital Electronics Lab Manual 24

Fig.1: Astable Multivibrator

Digital Electronics Lab Manual 25

Digital Electronics Lab Manual 26

HIGH-state time period THIGH = 0.69 (R1 +R2).C

Digital Electronics Lab Manual 27

Fig. 1: Astable Multivibrator using 555 Timer.

Digital Electronics Lab Manual 28

Digital Electronics Lab Manual 29

 Digital Multimeter (DMM)  Transistors: BJT 2N3904

 Function Generator  Resistors: RL = 2.7 KΩ, R1 = 15 KΩ,

Digital Electronics Lab Manual 30