SEMINAR TOPICS ST·A2.

HIGH' FREQUENCY SERIES RESONANT

. 'POWER· SUPPLY - DESIGN REVIEW
. By Raoji Patel and Roger Adair

I. INTRODUCTION

In the past decade, power conversion technology has advanced from linear to switching due
to the inherent high efficiency, smaller size, and lower cost of the latter technology. Recently,
designers involved with conversion technology have started to consider resonant sine wave
power supplies because they offer even smaller size, improved reliability, and reduced EMI.

It is possible to operate these power supplies at high frequency for two reasons. First,
low-cost power MOSFETs, which, unlike bipolar transistors, have no storage time, are now
available. Second, series resonant topologies are tolerant of some undesirable features of
power semiconductor devices, (e.g., switching transition time and reverse recovery times.)

This paper explains the basic operation of the power output stage of a series resonant
converter and examines its advantages and disadvantages compared to a conventional
.switching-regulated power supply. To provide a practical example, the paper details the
design of an off-line series resonant power supply. The Unitrode low-cost UC3524A PWM
Control Circuit is utilized to provide control for the .series resonant power supply.

The 200kHz resonant power supply developed herein, as shown in Figure 1, operates from a
117V(±15%), 60Hz line and meets the following requirements:

1. Output Voltage
A. +5V ±5% 2.5A - 5.0A
Ripple Voltage: lOOmV P-P maximum
B. +12V ±3% lA - 2A
Ripple voltage: lOOmV P-P maximum
C. +24V ±5% lA - 2A
Ripple Voltage: 200mV P-P maximum
2. Efficiency 80% minimum.
3. Short-circuit protected.

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-jrc:
",mz en
x~::j m
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UES2402 L3
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13~~11051
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R10 C8 CR8 L1,L2,L3=1.8JlH
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w

m
w
l~I~"
w T2 - FERROXCUBE +30V @70mA
EC35 - 3C~
R6 = UES1102 CR9
R5 ~
6.8K ~ r I CR41-L C14
1 16 ",'""nn - :J: 47

~It·
Ii 15 T1 - FERROXCUBE
R9 ~
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Y -.. . VIN 15
3 OSC/SYNC
2
3
IC2
• 1811-3C8
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UC3524A Q4 2.5 MIL GAP
= C9 IC1
UC3524A
C10 C 12
A
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.002 .002
ilH 6 CT 03 qH 6 EA 11

~R8
2N2222
1/ 7 RT I( 7 1N914 520
COMP 9 R7 9 R2
8 GND 4,5,10 _~ 10K 8 4,5,10 20K

~
Figure 1. Schematic of Resonant Converter i!!;
SEMINAR TOPICS ST-A2

Basic Principle and Operation

The power output stage and its associated waveforms at typical input voltage are shown in
Figures 2 and 3. During the on-time of power switch QI, the energy is delivered from the
input supply to the output load and series resonant capacitor CR. During the on-time of
transistor Q2, the energy is transferred from capacitor CR to the output load. Note that the
rectifier diodes, CR 1 and CR2, clamp the voltage across capacitor CR by providing a current
path through the Yin supply or ground. The AC current in the secondary winding of the
transformer is rectified by rectifier diodes CR3 and CR4 and filtered with output filter
capacitor Co.

Under steady state condition, the output voltage V0 is reflected back to the primary side by
NVo, where N is the transformer turns ratio. The polarity of the reflected voltage depends
upon the state of transistors Q 1 and Q2. When transistor Q 1turns on, the input voltage Vin is
applied across the series resonant network LRCR and the primary of the power transformer.
Since voltage across the primary is fixed by its turns ratio and the output voltage, the current
iR in the primary increases in a sinusoidal manner (starting at zero) because it is controlled by
the series resonant network. The voltage across capacitor CR increases in a sinusoidal manner
starting at zero, while the voltage across the inductor decreases toward zero. When the
voltage across the inductor reaches zero, the current in the resonant network ceases to
increase. At this instant, the peak current IRP can be expressed by the equation:
Vin-NVO-VCi Where Zo is the characteristic impedance
IRP = IZol of the series resonant network
VCi is the initial voltage across the
capacitor; VCi = 0 for input
voltage above Vin(min)

~
I;n
1!(on~1
~~Q1
I I
I I
I I

INPUT DRIVE

I -iT(on1r-
! nl-___
t= 0

Figure 2. Power Output Stage

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SEMINAR TOPICS ST·A2

Figure 3A. } 01 - Drive II 02 - Drive

Drive d .
Pulses

I.. 2 Tlon) ·1
I" .. I

Figure 38. -di- -NVo

--
dt LR
Drain
Current I
i 01 , i02 I
I
1
NV~
I
Figure 3C. I
Voltage I
across VCi
Capacitor
I
CR I
1
I
I
IRP

Figure 3D.
Current in
Resonant Circuit,iR

Vin - NVo

Figure 3E.
Inductor
Voltage

Figure 3. Voltage and Current Waveforms of the Power

Output Stage of a Series Resonant Converter
(with Input Volt Vln greater than Vin(min»

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SEMINAR TOPICS ST·A2

The polarity of the voltage across series resonant inductor LR reverses and the current starts
to decrease from its peak value. The voltage across the resonant capacitor CR continues to
increase until it is clamped by diode CR2. The voltage across the series resonant inductor LR
ceases to increase when the voltage across capacitor CR is equal to one diode drop above the
input voltage Yin. The voltage across the inductor LR is equal to the reflected output voltage
NVo. The current in the primary decreases in a linear manner. The slope of the current can be
expressed by the equation:
di NVo
slope: - - = - - -
dt L&
For proper operation, transistor QI must remain on until the current in the resonant
network reaches zero. When the current in the resonant network reaches zero, the transistor
Q2 is turned on and the current in the primary increases from zero, but this time in the reverse
direction. The cycle repeats itself as described previously.

For maximum power transfer in a given design the selected turns ratio of the transformer
should be such that the reflected output voltage across the primary is equal to half the value
of the minimum input supply voltage. This can be expressed by the equation:

NVo = V'mmm
( .)
2
The output voltage is regulated by controlling the duty cycle, using a single cycle sine wave.
Note that the required on-time of the power switches varies somewhat depending upon the
input voltage variation. To maintain zero current switching, high efficiency and prevent
cross conduction, the on-time should be determined at the maximum input voltage.

The maximum on-time of the power switch, referring to Figure 4A, can be calculated as
follows:
Maximum on-time: Ton = t1 + t2 Where it = time period for sinusoidal part of
the current waveform.
Where t2 = time period for linear part of the
current waveform.
The time it can be expressed by the equation:

= 27T~ (Vin(min)/2~
t1
360 L
1900 + SIN-1 . . ]
Vm(max) - (Vm~mm»)

The peak current in diode CR2, to calculate the linear portion of the current waveform:

Id(Pk) =
Vin(max)-NVO SIN
I Zo I l~ 900 + SIN-1 [ (Vin(min)/2)
Vin(max) - (Vin(min)/2)
Jl
)

Characteristic
impedance of series
resonant network.

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SEMINAR TOPICS ST·A2

Thus, the time needed for the linear portion of the current waveform:

IRP __ ,

/' '\.
/ IdlPkl-------J\

II \
at VinlmaXI--+t / '
\
Figure 4A.
Current in the
Primary Circuit
/ \,
/ \
I ,
I \
I \\
I \
I ,
\
~-------t1--------~~lc~--t2----~:~1
~-----------Tlonl ---------------+1

/
/'
-- " I Figure 4B.
iin, Current Drawn
i;nat / I from the Input Power
Vin greater--.j I Supply
than Vinlminl /
/ I
/
/
/
I
Figure 4. Current Waveforms at-Minimum and
Maximum Input Voltage.

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SEMINAR TOPICS ST-A2

m. ADVANTAGES AND DISADVANTAGES

OF SERIES RESONANT CONVERTERS

Advantages

The resonant sine-wave converter, when compared to buck-derived switching regulator

topologie~, has the following advantages.

(A) Higher overall efficiency:

(1) There are no power losses due to the switching of the power switch or
rectifier reverse recovery. Therefore, the conversion efficiency is higher.
(B) Smaller weight and volume:
(1) Because the voltage is switched when the drain current is zero, operation at a
higher frequency is possible. This results in smaller magnetic elements and
filter components.
(2) Due to the absense of switching losses, the required heat sink is smaller.
(3) Simpler drive circuit when power MOSFETs are used.
(4) The output filter inductor is smaller.
(C) Reduction in EMI:
(1) No high frequency rectifier reverse recovery current spikes are reflected
back to the transformer primary.
(2) The transistor voltage is switched when current in the switch is zero.
Therefore, there is no high di/ dt other than at the fundamental frequency.
Thus, a smaller amount of high frequency energy is radiated from the
circuit.
(3) Undesirable effects of leakage inductance (L,I ) in the transformer primary
are minimized in a resonance converter because L,I is utilized as part of the
series resonance circuit. Thus, high frequency current and voltage spikes due
to leakage inductance are eliminated.
(4) Current drawn from the input filter capacitor has only the odd harmonics of
the resonance frequency and their amplitude is lower.
(D) Increased reliability (high MTBF):
(I) The resonant inductor LR provides inherent short-circuit protection.
(2) The inductor LR also minimizes large current spikes in the power switch
during start-up.
(3) Zero current switching eliminates high peak power stress on the power
semiconductor and localized peak junction temperature.

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SEMINAR TOPICS ST-A2

(4) When using a MOSFET as a power switch, there is no danger of forward

bias (ISB) or RBSOA.
(5) Voltage and current overshoot are minimized.
(6) Resonant converters are stable under no-load operation.

Disadvantages

(A) This topology requires the additional resonant circuit (inductor and capacitor),
when compared to a buck type converter. The inductor and capacitor must carry
high current, but are small in value.
(B) The required current or voltage rating of the power switch is V2 times higher
compared to a switching regulator topology.
(C) Output filter capacitors must have low ESR and high ripple current ratings.

IV. HIGH FREQUENCY CONSIDERATIONS

A. Circuit Layout Guidelines

The following circuit layout guidelines should be used to optimize performance and prevent
spurious oscillation or ringing, reduce radiated RFI, improve efficiency and regulation, and
allow proper circuit operation.
(I) Use a short, wide ground plane and minimize the component lead inductance to that
ground plane.
(2) Use separate ground returns for the power stage and the low-level control circuit.
(3) Minimize circuit lead inductance:
(a) Keep leads short.
(b) Minimize the loop area enclosed by wire carrying high frequency current.
(c) When necessary, use copper straps/foils for high current.
(4) Use shielded wire in the feedback path to minimize pick-Up and spurious oscillation.
(5) Be aware of package inductances, junction capacitances, heat sink capacitances, and
other undesirable circuit parasitics.
(6) Use high frequency, low ESR capacitors and ferrite beads for EMI filtering.
(7) Use resistive damping when applicable. For example, a resistor or ferrite bead in the
gate circuit can help to prevent spurious oscillation.
(8) Place the gap in the magnetic structure of the inductor directly under the coil winding.

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SEMINAR TOPICS ST-A2

B. Component Selection Guidelines

The following considerations are required when selecting or designing the components.

(1) Transformer and Inductor

Core losses are an important consideration in the design of a high-frequency converter.

The core losses depend not only upon the peak flux density and the frequency, but also
on the core geometry. These losses increase linearly with operating frequency, in ferrite
with negligible eddy losses. Also, core losses increase as the peak operating flux density
to the power of 2.5, approximately. Therefore, when the operating frequency is
doubled for a given transformer (without changing the number of turns) the volt-
seconds delivered to the primary and the peak operating flux density each decrease by a
factor of two. The overall result is that core losses are reduced by approximately a
factor of three at the higher frequency. If the transformer is redesigned to obtain the
same core losses, the core will be smaller by a factor of 1/ 2 .50. = 0.65.

Use many parallel wires of small A WG size for the windings to minimize the proximity
and skin effects. The proximity effect is a function of skin depth, conductor diameter,
turns/layer, number of conductors per turn, and number of layers in the coil. The
proximity effect produces eddy currents which distort the current distribution in the
wire. Thus it increases the effective series resistance of the coil.

For low-voltage, high-current windings, copper strip or foil may be more practical than
Litz wire because few turns are required. The gap in the inductor should be directly
underneath the coil to minimize the radiated flux.

(2) Capacitors

Capacitors for high· frequency circuits should be selected on the basis of ESR, ESL,
ripple current rating (iRMS) and self-resonant frequency (fR), as well as cost and size. The
resonant capacitor in the primary needs a good· ESR and iRMs rating. The output filter
capacitors need low ESR and ESL, and high iRMs and·fR..Bypass capacitors need low
ESR and high fRo

(3) Rectifiers

In this circuit, the parasitic diode,of the power MOSFET should have fast forward .'
recovery with low voltage overshoot, otherwise the other power device can be driven
into breakdown during the deadband period.

In a series resonant converter, the reverse recovery of the output rectifier need not be
extremely fast because of the low di/ dt during diode turn-off.

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SEMINAR TOPICS ST-A2

v. DISCUSSION: PRACTICAL CIRCUIT

A. Power Output Stage

The output stage functions as follows. Assume both MOSFETs are off and the voltage on CR
is zero. When QI is turned on, the supply voltage is applied to the series resonant circuit
comprised of LR, the primary of T2, and CR. The current starts to increase from zero in a
sinusoidal manner, charging CR and delivering energy through T2 to the load. Shortly after
the peak of the sinewave current waveform is past, the voltage on CR reaches the positive
supply rail and CR2 conducts. The energy left in LR continues to be released through T2 to
the load, and the current ramps down toward zero. Note that the MOSFET voltage is
switched when the current is close to zero, resulting in negligible switching loss. Also note
that because of the intervening impedance ofLR, negligible reverse recovery spikes are drawn
from the output rectifiers when Q I or Q2 turn on.

The second of the two adjacent pulses produced by the drive circuit turns Q I off and Q2 on.
The above half cycle is repeated, except that the current flows in the opposite direction, thus
producing the negative half-sine. Note that energy is drawn from the previously charged
capacitor. CR should be chosen for low ESR and good high frequency ripple current rating.

The output of the centertapped transformer secondary is rectified and is fed to capacitor Co.
Since the peak current in Co is high, Co must have low ESR and high ripple current rating.

Polypropylene type capacitors can be used. If lower cost is desired, a low ESR electrolytic of
much larger capacitance (and size) may be suitable. A small low-pass filter comprised of Ll
and C5 reduces the ripple appearing at the output to the desired value.

Note that the leakage inductance of the power transformer is in series with the inductance of
LR. Thus the total series resonant inductance is equal to the sum of the two. Also note the
absence of snubbers across the Schottky rectifiers, permissible because of the low di/ dt
sinusoidal waveforms at the secondaries of the transformer.

B. Regulation and Drive Circuit

The drive circuit regulates the output voltage by varying the repetition rate of the waveform
that drives the gates of the power MOSFETs. The two gates are driven by adjacent pulses of
fixed pulse width. (This is not pulse width modulation.) Two of the standard PWM chips,
the UC3524A, are used for the regulation circuit because they contain the necessary func-
tions for this type of regulation.

The error amplifier and reference voltage of the first UC3524A are used in the normal
manner. The output of the error amplifier, however, is used to control the amount of current
at the RT terminal of the oscillator, thus controlling the oscillator frequency. Q3, with a
resistor RI from emitter to ground, amplifies the error amplifier output. The collector of Q3
then sinks a variable amount of current out of the RT terminal. The external CT and RT
values set the minimum frequency. If the output power can vary by a factor of 2, then the
frequency must be adjustable over a 2 to I range. The maximum frequency is set by the series
resonant frequency of the output stage. If that is chosen at 200kHz, the minimum frequency
for a 2 to I load change will be 100kHz.

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SEMINAR TOPICS ST-A2

The second IC chip is used as a one-shot. This is achieved by duty cycle limiting at the output
of the error amplifier with diode CR3 and potentiometer R2. The pulse width is set equal to
the width of a half sine of the output stage resonant circuit. By connecting their oscl sync pins
together, the second IC is driven at the same frequency as the first Ie. One of the output
transistors drives the gate of Q4. Q4 drives the primary of Tl to produce a positive gate pulse
for power switch Q 1. When Q4 turns off, energy stored in the transformer core is returned to
the 30V drive supply through "tertiary" winding WT and CR4. Q2 is driven on at this time.
The primary and tertiary windings of Tl have an equal number of turns and are clamped to
the same voltage (30Y) when conducting. Therefore, the time for the current to decay to zero
in the tertiary winding will be the same as the time Q4 drove the primary. In this way Q2 and
QI are operated at identical pulse widths. (Core saturation in Tl is prevented by using only
one of the output transistors of the UC3524A, so the duty cycle is limited to 50%.) The
snubber across Q4 (C13 and R3) damps out ringing to prevent Ql or Q2 being turned on
again after the desired double pulse is produced.

The rise and fall time of the MOSFET gate drive waveforms do not have to be ultra-fast in
order to reduce switching losses, because those losses are already low due to zero current.
Reasonably fast waveforms are desirable, however, to reduce deadtime between half-sine
waveforms at maximum output. This minimizes the peak current in the MOSFETs, in the
resonant circuit inductor and capacitor, and in the transformer and output rectifier and filter
capacitors.

The circuit provides an efficiency of 81% and line and load regulation of ±5%.

VI. STABILITY CONSIDERATIONS

A simplified functional diagram of the regulator is shown in Figure 5. The small signal
response of this converter is similar to that of a discontinuous-mode flyback regulator. The
response of each of these topologies has only a single pole roll-off, the break frequency of
which is determined by the output load RL and the output filter capacitor Co.

In the simplified functional diagram, the control chip ICI converts the output of the error
amplifier into regularly spaced sync pulses for control chip IC2. For each sync pulse, the
control chip IC2 and the interfacing circuit provide two identical drive pulses in sequence.
The total period of these pulses is equal to I/fR. The duty cycle D can be related to the error
output voltage V by the equation:

D = _f_ = (1.15)2rr~ = (1.l5)Vc(2rr) JLRCi

fR RTCT VREFRTE~

The approximate DC transfer function of the power output stage, in terms of input supply
voltage Vin and output RL, is:

The small signal gain varies with the input supply voltage and with output load. No special
considerations are required, however, because the transfer function has only a single pole
roll-off. It will provide 90" phase margin, which results in stable operation.

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SEMINAR TOPICS ST·A2

CT'~
IC2
AT' UC3524A I----Q----1
=
~ SYNC '--_ _---.J

OSC

~ ~SYNC
I PULSES
I"" 1/Fo ~I
j.2TIOn).j I
SLl--~
I-I I

~-

DRIVE PULSES

Figure 5. Simplified Functional Diagram

VII. SUMMARY

The availability of power MOSFETs, which have negligible storage times, has made
practical the use of high frequency resonant sinewave converters. Switching losses are
minimized by switching at approximately zero current crossings. Considerable
improvements are realized in efficiency and reliability when compared to switched-mode
designs.

BIBLIOGRAPHY

Amin, D. "Applying Sinewave Power Switching Techniques to the Design of High

Frequency Offline Converters", Powercon 7, April 1980.

Babu, S. "A Practical Resonant Converter Using High Speed Power Darlington
Transistors", PCI Conference Proceedings, March 1982.

Baker, R. "High Frequency Power Conversion with FET Controlled Resonant Charge
Transfer", PCI Conference Proceedings, April 1983.

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