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TWO EARLY COMPUTATIONAL AIDS THAT WERE WIDELY USED UNTIL QUITE

RECENTLY ARE

 ABACUS
-Has columns of pebble like beads mounted on rods. The beads are moved by hand to
positions that represent numbers. Manipulating the beads enables performing
operations.
 SLIDE RULE
-Represents numbers by lengths marked on ruler like scales that can be moved relative
to one another. The slide rule’s main scale is logarithmic so the process of adding
lengths on these scales effectively multiplies two.
AS THE SIZE AND COMPLEXITY OF THE CALCULATIONS BEING CARRIED OUT
INCREASES, TWO SERIOUS LIMTATIONS OF MANUAL COMPUTATION BECOME
APPARENT

 The speed at which a human computer can work is limited – Performing arithmetic
operations take seconds or minutes, but billions of problems can never be solved
manually in a reasonable amount of time.
 Humans are notoriously prone to error – due to long calculations, sources of human
error (distraction, fatigue, and the like) these do not affect machines thus free from
errors.
CHARLES BABBAGE

 Construction of the first automatic computing machine, the Difference engine were
limited to addition and subtraction.
 Difference engine version 2 – Able to handle 7th order polynomials,
REASONS FOR BABBAGE’S FAILURE TO COMPLETE HIS DIFFERENCE ENGINE

 He was never able to complete this mainly because of the difficulty of fabricating 4000 or
so high precision mechanical parts.
 He conceived a much more powerful computing machine called the analytical engine.
ANALYTICAL ENGINE – First general purpose programmable computer ever designed.
The analytical engine has a memory called the store and the ALU called the mill which was
designed to perform the four basic arithmetic operations. Program control unit is used to control
the program’s operation which made use of Punched cards consisting of operation cards to
select the operation to be performed by the mill and the variable cards to specify the locations in
the store from which inputs were taken or results sent. The input and output equipment is used
to print data obtained from the main memory.
MAIN COMPONENTS OF MACHINE COMPUTATION

TURING MACHINE SET OF INSTRUCTIONS


If the present state of the Processor P is Sh and the symbol it reads on the square of M
under the read write head is Ti, then perform the action specified by Ij and change the state
of P to Sk

THREE NOTIONS OF REASONABLENESS

 The computer should not store the answers to all possible problems
 The computer should only be required to solve problems for which a solution procedure
or program can be given
 The computer should process information at a finite speed
LIMITATIONS OF COMPUTERS

 Unsolvable problems – There exists problems that no practical computer can solve such
as Goldbach’s conjecture which states that every integer greater than 2 is the sum of
exactly two prime numbers.
 Intractable Problems – Computers can solve problems to a reasonable degree of
accuracy. The questions is, can a computer with a reasonable size and cost solve a
given problem in a reasonable amount of time? If so the problem is said to be tractable;
otherwise intractable.
 Speed Limitations - The speed at which the computer can solve problems are limited to
the processor’s speed.
FACTORS THAT DETERMINE TRACTABILITY

 The nature of the problem itself


 Solution or method or programs used
 Computing speed or performance
TWO MAJOR TECHNIQUES TO SOLVE INTRACTABLE PROBLEMS
EDVAC INSTRUCTION SET (A1 A2 A3 A4 OP)
Perform the operation in OP (addition, multiplication, etc) on the contents of main memory
locations A1 and A2 and then place the result in memory location A3, The fourth address
specifies the location of the next instruction to be executed.

IAS INSTRUCTION FORMAT (OP A)


8-bit opcode OP followed by a 12 bit address A. That identifies 2^12 = 4K 40-bit words in M
TWO KEY ASPECTS OF THE IAS’S DESIGN THAT HAVE BEEN INCORPORATED INTO
ALL LATER COMPUTER

 The CPU contains a small set of high-speed storage devices called registers, which
serve as implicit storage locations for operands and results.
 A program’s instructions are stored in M in the sequence in which they are executed.
Hence the address of the next instruction is usually that of the current instruction plus
one. The Program counter (PC) stores the address of the current instruction word and is
incremented by one when the CPU needs a new instruction word. Only branch
instructions is permitted to vary the execution sequence.
ORGANIZATION OF THE CPU AND MAIN MEMORY OF THE IAS COMPUTER
INSTRUCTION SET OF THE IAS COMPUTER
IAS SHORTCOMINGS

 The program self-modification process is inefficient


 The small amount of storage space in the CPU results in a great deal of unproductive
data-transfer traffic between the CPU and the Main memory M
 No facilities were provided for structuring programs
 The instruction set is biased toward numerical computation
 Input-output (IO) instructions were considered of minor importance.

STACK PROCESSOR
Note that the Stack Pointer (SP) always points to the TOS
POLISH NOTATION

 A stack computer evaluates arithmetic and other expressions using a format known as
polish notation. Instead of placing operator between its operands as in x + y, the
operator is placed to the right of its operands as in x y +. A more complex expression
such as z : = w + 3 x ( x – y ) becomes z w 3 x y – x + :=
THE STACK CONCEPT EVENTUALLY BECAME WIDELY USED IN ONLY TWO
SPECIALIZED APPLICATIONS

 Pocket calculators sometimes employ a stack organization to take advantage of the


conciseness of polish notation when entering data and commands manually via keypad.
 Stacks are included in most conventional computers to implement subroutine calls and
return instructions.
CPU HAS TWO MAJOR CONTROL STATES

 Supervisor state- For use by the operating system, certain program control instructions
could only be executed in this state.
 User state – For executing application programs
THE CPU’s PROCESSING OF AN INSTRUCTION INVLOVES SEVERAL STEPS, EACH OF
WHICH REQUIRES AT LEAST ONE CLOCK CYCLE:

 Fetch the instruction from main memory M


 Decode the instruction’s opcode
 Load (read) from M any operands needed unless they are already in CPU registers
 Execute the instruction via a register-to-register operation using an appropriate
functional uit of the CPU, such as a fixed point adder.
 Store (write) the results in M unless they are to be retained in CPU registers
PROGRAM EXECUTION TIME (T)

FACTORS THAT DETERMINE A COMPUTER’S PERFORMANCE

 Software – The efficiency with which the programs are written and compiled into object
code influences N, the number of instructions executed.
 Architecture – The efficiency with which individual instructions are processed directly
affects CPI, reducing CPI also tends to reduce T
 Hardware – The raw speed of the processor circuits determines f, the clock frequency.
Increasing f tends to reduce T.
SPEEDUP TECHNIQUES

 Cache – A memory unit placed between the CPU and main memory M used to store
instructions, data or both. Much smaller in capacity than M but accessed more rapidly.
 Pipelining – Increase performance by allowing the processing of several instructions to
be partially overlapped. CPU is constructed from independent stages which can hold
several instructions in different stages of execution
 Superscalar processing – Increase performance by allowing several instructions to be
processed (full overlapping). Instructions can be issued simultaneously to each unit.
POWERPC DESIGN EXHIBITS THE FOLLOWING FEATURES THAT ARE TYPICAL OF
CONTEMPORARY RISC-STYLE DESIGNS

 Instructions have a fixed length and employ just a few opcode formats and addressing
modes.
 Only load and store instructions can access main memory; all other instructions must
have their operands in CPU registers. This reduces time devoted to accessing memory.
 Instruction processing is heavily pipelined. A new result emerges from it every clock
cycle.
 The CPU contains several E-units allowing it to issue several instructions simultaneously
OVERALL ORGANIZATION OF THE POWERPC

OVERVIEW OF COMPUTER SYSTEM OPERATION

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