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Abstract:
The purpose of the experiment is to design 12v DC power supply with 100mA output
current. The design includes 4 different stages (rectification, smoothing, ripple reduction
and Zener diode shunt regulator stage). the circuit created using Altium designer, then built
in breadboard. Finally, the design has been built and test into vero board.

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Table of contents
Abstract: .................................................................................................................................................. 2
Objectives: .............................................................................................................................................. 5
Introduction: ........................................................................................................................................... 5
Technical section:.................................................................................................................................... 6
Calculation: ......................................................................................................................................... 6
1. Half wave rectification stage:...................................................................................................... 6
2. Smoothing stage: ....................................................................................................................... 7
3. ripple reduction stage: ................................................................................................................ 9
4. voltage regulation stage: .......................................................................................................... 10
Altium designer: ................................................................................................................................ 11
1. Half wave rectification stage:.................................................................................................... 11
2. Smoothing stage: ..................................................................................................................... 12
3. ripple reduction stage: .............................................................................................................. 13
4. voltage regulation stage: .......................................................................................................... 14
Breadboard connection: ................................................................................................................... 15
1. half wave rectification stage: .................................................................................................... 15
2. Smoothing stage: ...................................................................................................................... 16
3. Ripple reduction stage: ............................................................................................................. 17
4. regulation stage: ....................................................................................................................... 18
Vero board: ....................................................................................................................................... 20
Results table:..................................................................................................................................... 20
Discussion section: ................................................................................................................................ 21
Conclusion: ............................................................................................................................................ 22
Reference: ............................................................................................................................................. 23

Table of tables
Table 1 result table ............................................................................................................................... 20
Table 2 deviation table ......................................................................................................................... 21

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Table of figures
Figure 1 (Stage 1: Rectification circuit) ................................................................................................. 11
Figure 2 (Stage1 output graph) ............................................................................................................. 11
Figure 3 (stage 2: Smoothing circuit) .................................................................................................... 12
Figure 4 (stage 2 output graph) ............................................................................................................ 12
Figure 5 (stage 3: Reduction circuit) ..................................................................................................... 13
Figure 6 (stage 3 output circuit) ............................................................................................................ 13
Figure 7 (stage 4: regulation circuit) ..................................................................................................... 14
Figure 8 (stage 4 output graph) ............................................................................................................ 14
Figure 9: stage 1 connection on breadboard ........................................................................................ 15
Figure 10 stage 1 oscilloscope result .................................................................................................... 15
Figure 11 stage 2 breadboard circuit .................................................................................................... 16
Figure 12 stage 2 oscilloscope result .................................................................................................... 16
Figure 13 stage 3 breadboard circuit .................................................................................................... 17
Figure 14 stage 3 oscilloscope result .................................................................................................... 17
Figure 15 stage 4 breadboard circuit .................................................................................................... 18
Figure 16 stage 4 oscilloscope result .................................................................................................... 18
Figure 17 stage 4 current measurement .............................................................................................. 19
Figure 18 DMM output current ............................................................................................................ 19
Figure 19 vero board connection .......................................................................................................... 20

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Objectives:
o Convert the AC power supply to DC power supply to give an output voltage of 12 and
100 mA output current by applying calculations for four different stages; half wave
rectification stage, smoothing stage, ripple reduction stage and Voltage regulation
stage.
o Simulate the circuit design on Altium designer.
o prove the calculation and design into breadboard.
o Build the circuit design into vero board.

Introduction:
A transformer with 230 secondary Voltage, 24 primary voltage, 50VA power and variable
components were used to convert the AC current to DC current with an output voltage of
12v and output current of 100mA. Firstly, the transformer supplies alternating current (AC),
and it pass through the rectification stage to turn off the negative reverse biased. Secondly,
the output has been smoothed with single capacitor. Thirdly, the ripple reduced by passing
it through filtering stage. Finally, to output the voltage required, a Zener shunt diode has
been used.

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Technical section:
Calculation:
1. Half wave rectification stage:
Transformer primary voltage (Vp) = 230 Vrms.
Transformer secondary voltage (Vs) = 12 Vrms.
The peak voltage was founded by multiplying the RMS voltage with √2.

So, Vpeak = Vrms*√2 → Vp = 230*√2 = 325.27 V.

Vs = 24*√2 = 33.941 V.

The voltage ratio of the transformer was founded by dividing the primary voltage over the
secondary voltage.
So, voltage ratio = Vp/Vs → 24/230 = 0.1043.

The secondary peak voltage will drop when the current pass through the diode by 0.7v.
*note: the diode has 0.7v forward bias voltage.
So, Vpeak out = Vp in – 0.7 → 33.941 – 0.7 = 33.241 v.

The average voltage was founded by dividing the secondary output peak voltage by π.
So, Vave = Vpeak out /π → 32.241/π = 10.26 v.

The resistor value was founded using ohms law.

So, R = Vave / Iout → 10.26/(100*10-3 )=102.6Ω.

The power was founded using ohms low.

So, P = Vave * I → 10.26*(100*10-3) = 1.02W.

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2. Smoothing stage:
The smoothing stage must give a 6 Vpp ripple.
The average voltage will become different because a capacitor must be added to reduce the
ripple to 6 Vpp.
So, Vave=V peak out – (Vripple*0.5) → 33.241 – (6*0.5) = 30.241 v.

The new load resistor voltage was founded using ohms low.
30.241
So, R load = Vave / Iout → = 302.41𝛺.
100∗10−3

The power was founded using ohms low.

So, P = Vave * I → 33.241*(100*10-3) = 3.324 W.

To find out the time firstly, the VL was founded by subtracting the ripple voltage of the peak
voltage.
So, VL = Vpeak out – Vripple → 33.241 – 6 = 26.241 v.

The time angle between Vpeak and VL was founded using the formula below,
VL = Vpeak sin(t).
26.241 = 33.241 sin(t)
26.241
𝑡 = sin−1
33.241
t = 52.13 ̊.

The angle was converted to time by dividing it by 360 multiplied with the frequency.
*note; frequency = 50 Hz.
52.13
So, t= angle/(360*50) → 360∗50 = 2.896𝑚𝑠.

The phase shift different of time between VL and Vp = (2.896*10-3)+ (5*10-3) = 7.896ms.

The capacitor value was founded using the results founded and replacing them in the bellow
equation

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 𝑡
𝑉𝑟𝑖𝑝𝑝𝑙𝑒 = 𝑉𝑝𝑒𝑎𝑘 (1 − 𝑒 −𝑅𝐶 )
7.896
6 = 33.241 (1 − 𝑒 − 302𝐶 )
6 7.896
= (1 − 𝑒 − 302𝐶 )
33.241
−6 7.17
+ 1 = 𝑒 −302𝐶
33.241
−6 −7.869 ∗ 10−3
ln( + 1) =
33.241 302𝐶
−7.869 ∗ 10−3
−0.199 =
302𝐶
−0.199 ∗ 302𝐶 = −7.869 ∗ 10−3
−60.098𝐶 = −7.869 ∗ 10−3
−7.869 ∗ 10−3
𝐶=
−60.75
𝐶 = 131.345 µF.

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3. ripple reduction stage:
The Vpp ripple which is 6 v must be reduced 70%.
So, Vpp - (Vpp * 70%) → 6 - (6*70%) = 1.8 v.

The new capacitor for this stage can be found using the formula below,
𝐼𝑜𝑢𝑡
𝑉𝑟𝑖𝑝𝑝𝑙𝑒´ =
𝑓 ∗ 𝐶2
100 ∗ 10−3
1.8 =
50 ∗ 𝐶2
100 ∗ 10−3
𝐶2 =
50 ∗ 1.8
𝐶2 = 1111.11 µ𝐹.

The capacitive reactance was founded by,

1 1
𝑋𝑐 = 2𝜋𝑓𝐶 = = 2.86𝛺.
2∗𝜋∗50∗1111.11µ

The filtering stage resistor was founded by the formula below,

𝑋𝑐 √𝑅 2 + 2.862 =
2.86
𝑉𝑟𝑖𝑝𝑝𝑙𝑒´ = 𝑉𝑟𝑖𝑝𝑝𝑙𝑒 ∗ 0.3
√𝑅 2 + 𝑋𝑐 2 2.86
𝑋𝑐 𝑅 2 + 2.862 = ( 0.3 )2
1.8 = 6 ∗
√𝑅 2 + 2.862 2.86 2
𝑅2 = ( ) − 2.862
1.8 2.86 0.3
=
6 √𝑅 2 + 2.862 𝑅 = √82.7 = 9.09𝛺.

The output voltage in this stage will be different, so its calculated using,
Vout = Vin – ( I * R) → 30.241 – (100*10-3 * 9.09) = 29.303 v.

The load resistor was founded using ohms low.

So, R = V/I → 29.303/(100*10-3) = 293.03Ω.

The power of the resistor was founded using ohms low.

So, P = IV → (100*10-3) * 29.303 = 2.93 W.

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4. voltage regulation stage:
In this stage the Zener diode which allow 10mA current pass should regulate the output
voltage to 12v and the output current to 100mA.
The total current was found by adding the Zener diode current with the output current.
So, IT = Id + Iout → 10 + 100 = 110mA.

The voltage of the resistor with Zener regulator was founded by,
VR = Vin – Vout → 29.303-12 = 17.303v.

The Resistor value was founded using ohms low.

So, R= V/I → 17.303/(110*10-3) = 157.3Ω.

Power was founded using ohms low.

So, P = IV → 110*10-3*17.303 = 1.903W.

The load resistor was found using ohms low.

So, Rload = V/I → 12/(100*10-3) = 120Ω.

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Altium designer:
1. Half wave rectification stage:

Figure 1 (Stage 1: Rectification circuit)

Graph of Volt against time in rectification stage for Vout and Vin:

Figure 2 (Stage1 output graph)

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2. Smoothing stage:

Figure 3 (stage 2: Smoothing circuit)

Vout graph of time against volt in smoothing stage:

Figure 4 (stage 2 output graph)

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3. ripple reduction stage:

Figure 5 (stage 3: Reduction circuit)

Vout graph of time against voltage for reduction stage:

Figure 6 (stage 3 output circuit)

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4. voltage regulation stage:

Figure 7 (stage 4: regulation circuit)

Vout graph of time against voltage for regulation stage:

Figure 8 (stage 4 output graph)

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Breadboard connection:
1. half wave rectification stage:

Figure 9: stage 1 connection on breadboard

Figure 10 stage 1 oscilloscope result

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2. Smoothing stage:

Figure 11 stage 2 breadboard circuit

Figure 12 stage 2 oscilloscope result

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3. Ripple reduction stage:

Figure 13 stage 3 breadboard circuit

Figure 14 stage 3 oscilloscope result

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4. regulation stage:

Figure 15 stage 4 breadboard circuit

Figure 16 stage 4 oscilloscope result

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Output current in the third stage was measured and it was almost 100mA.

Figure 17 stage 4 current measurement

Figure 18 DMM output current

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Vero board:

Figure 19 vero board connection

Results table:

Table 1 result table

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Discussion section:

Table 2 deviation table

the table shows the deviation between the calculated and simulated results, and the
deviation between the calculated and experimental results.

The deviation may be because of the human error in taking to accurate measurement from
the oscilloscope and DMM, because some values does not remain stable. Also, the
components don’t have the accurate values same as the calculated one, so the nearest
value was taking. Moreover, the component has a high tolerance which may give a higher or
lower value than the value chosen.

The highest error founded was in ripple reduction stage were the oscilloscope shows 1.4 V
ripple and the calculated was 1.8 v, which give us a deviation of 11%. However, the high
deviation is because of the mentioned errors above.

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Conclusion:
To conclude, the design was tested safely for 24 Vin and 100mA output current and 12
output voltage. A 230V/24V transformer was used to give the input AC voltage. Different
components were used to do the experimental design such as, 120Ω resistor, 1000uF
capacitor and jumpers. Also, the stages circuits were done using altium designer to find out
the simulated results. Deviation was found between the experimental, simulated and
calculated results due to some reasons. However, the experiment was proven due to the 12
v output result.

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Reference:

1. Half Wave Rectifier Circuit Working and Characteristics . (2016, April 18). Retrieved from
https://www.elprocus.com/half-wave-rectifier-circuit-working-principle-and-characteristics-
2/
2. Power Diodes used as Half-wave Rectifiers. (2018, January 29). Retrieved from
https://www.electronics-tutorials.ws/diode/diode_5.html
3. Amelia, Rithika, Raut, N., Junaid, P., Anwar, S., Vishal, . . . Satheesh KM. (2017, December 24).
Half Wave Rectifier Circuit Characteristics and Working. Retrieved from
https://www.electronicshub.org/characteristics-and-working-of-half-wave-rectifier/

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