MICROCONTROLLERS AND EMBEDDED SYSTEMS

18CS44
SEMESTER - IV

MODULE 1

An Integrated circuit is a special component which is fabricated with

thousands of transistors, resistors, diodes and other electronic
components on a tiny silicon chip. These are the building blocks of current
electronic devices like cell phones, computers, etc.

Resistors are two-terminal components that oppose current. They

produce a voltage drop between each terminal, following Ohm law which
states "the electrical resistance is equal to the voltage drop across the
resistor divided by the current through the resistor while the temperature
remains the same (R=V/I)".

 Voltage is the difference in charge between two points.

 Current is the rate at which charge is flowing.
 Resistance is a material's tendency to resist the flow of charge
(current).
Capacitors store energy in the electric field between a pair of conductors
called plates. The storing of energy occurs by "charging" the capacitor.
Storing occurs when electric charges of equal magnitude, but opposite
polarity, build up on each plate.

Transistors are a semiconductor device used to amplify or switch

electronic signals.

Registers: In computer architecture, a processor register is a quickly

accessible location available to a computer's central processing unit.

Fig: Different Electrical components

Clock Speed: A good way to understand how a processor works is to

imagine that your job is to tell a thousand people how to do their jobs. The
faster you can do that, the faster everyone works. Computer processors,
or chips, operate in a similar fashion. A processor provides the
instructions that multiple applications and processes need to perform
their jobs. The faster it does that, the faster a computer operates. Faster
computers often translate into increased productivity and efficiency.

Clock speed refers to the number of cycles that a processor executes per
second. A cycle is a unit of measurement during which a processor
executes instructions. If you see a processor that has a rating of 3.1 GHz,
it operates at 3.1 billion cycles per second.

CPU Performance: The performance of a CPU is the number of programs

it can run in a given time. The more the number of programs it can run in
that time, the faster the CPU is.

MICROPROCESSOR VS MICROCONTROLLERS

Microcontroller

It’s like a small computer on a single IC. It contains a processor core, ROM,
RAM and I/O pins dedicated to perform various tasks. Microcontrollers
are generally used in projects and applications that require direct control
of user. As it has all the components needed in its single chip, it does not
need any external circuits to do its task so microcontrollers are heavily
used in embedded systems and major microcontroller manufacturing
companies are making them to be used in embedded market. A
microcontroller can be called the heart of embedded system. Some
examples of popular microcontrollers are 8051, AVR, PIC series of
microcontrollers.
Fig: architecture of 8051 micro controller. And you can see all the required
components for a small project is present in a single chip.

Microprocessor
Microprocessor has only a CPU inside them in one or few Integrated
Circuits. Like microcontrollers it does not have RAM, ROM and other
peripherals. They are dependent on external circuits of peripherals to
work. But microprocessors are not made for specific task but they are
required where tasks are complex and tricky like development of
software’s, games and other applications that require high memory and
where input and output are not defined. It may be called heart of a
computer system. Some examples of microprocessor are Pentium, I3, and
I5 etc
From this image of architecture of microprocessor, it can be easily seen
that it has registers and ALU as processing unit and it does not have RAM,
ROM in it.
Major Differences between Microprocessor and Microcontroller
RISC AND CISC

Imagine you are training a dog. You teach it to understand certain specific
instructions like ‘sit’ or ‘fetch’ and then associate those words with certain
tasks. So that later on, when you say ‘fetch’, and throw a ball, the dog will
fetch it.

A CPU (and I will use this term to mean both microcontrollers and
processors in general) works in a similar way. There are certain
instructions that the CPU knows and when we give them those
instructions, different transistors inside it switch ON and OFF to perform
those instructions.

The instructions that we input are in the form of 1’s and 0’s, or opcode.
Since it is hard for us to remember combinations of 1’s and 0’s, we tend to
use shorthand’s for those instructions, called assembly language, and a
compiler converts it into opcode.

The number of instructions that a particular CPU can have is limited and
the collection of all those instructions is called the Instruction Set.

The Instruction Set is very important. High-level programming languages

are designed based on how the instruction set is and a proper design of
hardware and instruction set can determine how fast the CPU is.
A processor also known as the Central Processing Unit (CPU) mainly
performs the instruction fetching, decoding, execution. For the processor
to perform its operations, it requires standard set of instructions, these are
called Instruction sets. There are two types of instruction set architectures.
They are RISC and CISC.

Instruction set or instruction set architecture is the structure of the

computer that provides commands to the computer to guide the
computer for processing data manipulation. Instruction set specifies
processor functionality including the operations supported by the
processor, storage mechanisms of the processor, and the way of compiling
the programs to the processor.

Instruction set consists of instructions, addressing modes, native data

types, registers, interrupt, exception handling and memory architecture.
Instruction set can be emulated in software by using an interpreter or built
into hardware of the processor. Instruction Set Architecture can be
considered as a boundary between the software and hardware.

Classification of microcontrollers and microprocessors can be done based

on the RISC and CISC instruction set architecture.

In layman terms Instruction set is the basic/fundamental structure which

bridges the gap between hardware and software

Reduced Set Instruction Set Architecture (RISC) – The main idea behind
is to make hardware simpler by using an instruction set composed of a
few basic steps for loading, evaluating and storing operations just like a
load command will load data, store command will store the data.

RISC is a simple instruction set. It utilizes simple addressing modes. To

access the memory locations, it uses the load and stores instructions. It
also consists of a large number of registers. Moreover, each instruction
requires one clock cycle to execute an instruction.

Complex Instruction Set Architecture (CISC) – The main idea is to make

hardware complex as a single instruction will do all loading, evaluating
and storing operations just like a multiplication command will do stuff
like loading data, evaluating and storing it.

RISC Vs CISC

RISC CODE (A=B+C) CISC CODE (A=B+C)

Load R1, @B
Load R2, @C ADD @A, @B, @C
Add R3, R1, R2
Load R3,@A
ARM EMBEDDED SYSTEMS

Fig: A chipset designed by ARM

An ARM processor is one of a family of CPUs based on

the RISC (Reduced Instruction Set Computer) architecture developed
by Advanced RISC Machines (ARM).

ARM makes 32-bit and 64-bit RISC multi-core processors (A multi-core

processor is an integrated circuit (IC) to which two or more processors have been
attached for enhanced performance, reduced power consumption, and more
efficient simultaneous processing of multiple tasks).

RISC processors are designed to perform a smaller number of types of

computer instructions so that they can operate at a higher speed,
performing more millions of instructions per second (MIPS). RISC
Reduce the cycles per instruction at the cost of the increases number of
instructions per program. RISC processors provide outstanding
performance at a fraction of the power demand of CISC (complex
instruction set computing) devices.

As the name indicates in CISC, the main idea is to make hardware

complex, as a single instruction will do all loading, evaluating and storing
operations. The CISC approach attempts to minimize the number of
instructions per program by making them complex but at the cost of
increase in number of cycles per instruction. (As the complexity of the
instruction increases the time required to process the instruction also
increases)

Hardware of the Intel is termed as Complex Instruction Set

Computer (CISC)

Apple hardware is Reduced Instruction Set Computer (RISC).

ARM processors are extensively used in consumer electronic devices such

as smartphones, tablets, multimedia players and other mobile devices,
such as wearables. Because of their reduced instruction set, they require
fewer transistors, which enables a smaller die size for the integrated
circuitry (IC). The ARM processor’s smaller size, reduced complexity and
lower power consumption makes them suitable for increasingly
miniaturized devices.

The simplified design of ARM processors enables more efficient multi-

core processing and easier coding for developers.
The ARM architecture was originally developed by Acorn Computers in
the 1980s.

THE RISC DESIGN PHILOSOPHY

Earlier when programming was done using assembly language, a need

was felt to make instruction do more task because programming in
assembly was tedious and error prone due to which CISC architecture
evolved but with up rise of high level language dependency on assembly
reduced RISC architecture prevailed.

The microcontroller architecture that utilizes small and highly optimized

set of instructions is termed as the Reduced Instruction Set Computer or
simply called as RISC. It is also called as LOAD/STORE architecture. RISC
is used in portable devices due to its power efficiency. For Example,
Apple iPod and Nintendo DS. RISC is a type of microprocessor
architecture that uses highly-optimized set of instructions. RISC reduces
the cycles per instruction at the cost of the number of instructions per
program. ARM uses the RISC architecture.

The RISC philosophy is implemented with four major design rules or

Characteristics

i. Instructions: RISC processors have a reduced number of

instruction classes (Complexity of the instruction is reduced and
not the number of lines in instruction). These classes provide
simple operations that can each execute in a single cycle. The
compiler achieves complex tasks by executing several simple
instructions. Hence each instruction is executed in single cycle.
In contrast, in CISC processors the instructions are often of variable
size and take many cycles to execute.

ii. Pipeline: The processing of instructions is broken down

into smaller units that can be executed in parallel by pipelines.
Pipelining attempts to keep every part of the processor busy with
some instruction by dividing incoming instructions into a series
of sequential steps (hence the name "pipeline") performed by
different processor units with different parts of instructions
processed in parallel. An instruction pipeline reads instruction
from the memory while previous instructions are being executed
in other segments of the pipeline. Thus we can execute multiple
instructions simultaneously. There is no need for an instruction to
be executed by a mini program called microcode as on CISC processors.
 iii. Registers—RISC machines have a large general-purpose register
set. Any register can contain either data or an address. In
contrast, CISC processors have dedicated registers for specific purposes.

iv. Load-store architecture—The processor operates on data held in

registers. Separate load and store instructions transfer
data between the register bank and external memory. In contrast,
with a CISC design the data processing operations can act on memory
directly.

The ARM Design Philosophy

There are a number of physical features that have driven the ARM
processor design.

1. portable embedded systems require some form of battery power.

The ARM processor has been specifically designed to be small to
reduce power consumption and extend battery operation—
essential for applications such as mobile phones and personal
digital assistants (PDAs).
2. High code density is another major requirement since embedded
systems have limited memory due to cost and/or physical size
 restrictions. High code density is useful for applications that have
limited on-board memory, such as mobile phones and mass storage
devices.
3. In addition, embedded systems are Price sensitive and use slow
and low-cost memory devices. For high-volume applications like
digital cameras, every cent has to be accounted for in the design.
The ability to use low-cost memory devices produces substantial
savings.
4. Another important requirement is to reduce the Area of the die
taken up by the embedded processor. For a single-chip solution, the
smaller the area used by the embedded processor, the more
available space for specialized peripherals. This in turn reduces the
cost of the design and manufacturing since fewer discrete chips are
required for the end product.
5. ARM has incorporated hardware debug technology within the
processor so that software engineers can view what is happening
while the processor is executing code. With greater visibility,
software engineers can resolve issues faster, which has a direct
effect on the time to market and reduces overall development costs.
6. The ARM core is not a pure RISC architecture because of the
constraints of its primary application—the embedded system. In
some sense, the strength of the ARM core is that it does not take the
RISC concept too far. In today’s systems the key is not raw processor
speed but total effective system performance and power consumption.

Instruction Set for Embedded Systems

The ARM instruction set differs from the pure RISC definition in several
ways that make the ARM instruction set suitable for embedded
applications:

 Variable cycle execution for certain instructions—Not every ARM

instruction executes in a single cycle. For example, load-store-
multiple instructions vary in the number of execution cycles
depending upon the number of registers being transferred. The
transfer can occur on sequential memory addresses, which increases
 performance since sequential memory accesses are often faster than
random accesses. Code density is also improved since multiple
register transfers are common operations at the start and end of
functions.
 Inline barrel shifter leading to more complex instructions— Barrel
shifters shifts the 32-bit binary pattern in one of the source registers,
left or right by specific number of positions before it enters ALU.
The inline barrel shifter is a hardware component that preprocesses
one of the input registers before it is used by an instruction. This
expands the capability of many instructions to improve core
performance and code density (For more info:
http://www.davespace.co.uk/arm/introduction-to-arm/barrel-
shifter.html).

 Thumb 16-bit instruction set—Thumb is compressed, 16-bit

representation of subset of 32-bit ARM instruction set. The primary
aim of Thumb is to increase the code density and performance. The
16-bit Thumb instructions improve code density by about 30% over
32-bit fixed-length instructions.
 Conditional execution—An instruction is only executed when a
specific condition has been satisfied. This feature improves
performance and code density by reducing branch instructions.
 Enhanced instructions—The enhanced digital signal processor
(DSP) instructions were added to the standard ARM instruction set
to support fast 16 × 16-bit multiplier operations and saturation.
These instructions allow a faster-performing ARM processor in
some cases to replace the traditional combinations of a processor
plus a DSP.
Note: Digital Signal Processors (DSPs) - Microprocessors
specialized for signal (Analog/Digital) processing application

These additional features have made the ARM processor one of the most
commonly used 32-bit embedded processor cores. Many of the top
semiconductor companies around the world produce products based
around the ARM processor.

Embedded System Hardware

Above figure shows a typical embedded device based on an ARM core.

Each box represents a feature or function. The lines connecting the boxes
are the buses carrying data. We can separate the device into four main
hardware components:

 The ARM processor controls the embedded device. An ARM

processor comprises a core (the execution engine that processes
instructions and manipulates data) plus the surrounding
components that interface it with a bus. These components can
include memory management and caches.
 Controllers coordinate important functional blocks of the system.
Two commonly found controllers are interrupt and memory
controllers.
  The peripherals provide all the input-output capability external to
the chip and are responsible for the uniqueness of the embedded
device.
 A bus is used to communicate between different parts of the device.

The Advanced High-performance Bus (AHB)

The ARM System Bus (ASB)
The Advanced Peripheral Bus (APB)

ARM BUS TECHNOLOGY

AMBA stands for Advanced Microcontroller Bus Architecture. AMBA

specification specifies an on chip communication standard. This is used to
design embedded microcontrollers with high performance.

Embedded systems use different bus technologies. The Peripheral

Component Interconnect (PCI) bus connects devices such as video card
and disk controllers to the X 86 processor buses. This is called External or
off chip bus technology.

Embedded devices use an on-chip bus that is internal to the chip and
allows different peripheral devices to be inter-connected with an ARM
core.

There are two different types of devices connected to the bus

1. Bus Master

2. Bus Slave

Bus Master: A logical device capable of initiating a data transfer with

another device across the same bus (ARM processor core is a bus Master).

Bus Slave: A logical device capable only of responding to a transfer

request from a bus master device (Peripherals are bus slaves)

Generally, a Bus has two architecture levels

Physical level: Which covers electrical characteristics a bus width (16, 32,
64 bits).

Protocol level: which deals with protocols between processor and

peripheral.

AMBA (Advanced Microcontroller Bus Architecture) Bus protocol:

AMBA Bus was introduced in 1996 and has been widely adopted as the
On Chip bus architecture used for ARM processors.

The first AMBA buses were

1. ARM System Bus (ASB)

2. ARM Peripheral Bus (APB)

Later ARM introduced another bus design called the ARM High
performance Bus (AHB).
Using AMBA

1. Peripheral designers can reuse the same design on multiple projects

2. A Peripheral can simply be bolted on the On Chip bus without

having to redesign an interface for different processor architecture.

This plug-and-play interface for hardware developers improves

availability and time to market.

AHB provides higher data throughput than ASB because it is based on

centralized multiplexed bus scheme rather than the ASB bidirectional bus
design. This change allows the AHB bus to run at widths of 64 bits and
128 bits

ARM introduced two variations on the AHB bus

1. Multi-layer AHB

2. AHB-Lite

In contrast to the original AHB, which allows a single bus master to be

active on the bus at any time, the Multi-layer AHB bus allows multiple
active bus masters.

AHB-Lite is a subset of the AHB bus and it is limited to a single bus

master. This bus was developed for designs that do not require the full
features of the standard AHB bus.

AHB and Multiple-layer AHB support the same protocol for master and
slave but have different interconnects. The new interconnects in Multi-
layer AHB are good for systems with multiple processors. They permit
operations to occur in parallel and allow for higher throughput rates.

Memory
Memory Width: Memory width is the number of bits the memory returns
on each access-typically 8, 16, 32, or 64 bits. The memory width has a
direct effect on the overall performance and cost ratio. Following table
covers fetching instructions from memory.

Instruction size 8 bit memory 16 bit memory 32 bit memory

ARM 32 bit 4 cycles 2 cycles 1 cycle

Thumb 16 bit 2 cycles 1 cycle 1 cycle

Memory types

ROM: Read-only memory (ROM) is the least flexible of all memory types
because it contains an image that is permanently set at production time
and cannot be reprogrammed. Devices use a ROM to hold boot code Its
main use is for holding the device firmware or storing long-term data that
needs to be preserved after power is off.

DRAM: Dynamic random access memory (DRAM) is the most commonly

used RAM for devices. It has the lowest cost per megabyte compared with
other types of RAM. DRAM is dynamic- it needs to have its storage cells
refreshed and given a new electronic charge every few milliseconds, so
you need to set up a DRAM controller before using the memory.

SRAM: Static random access memory (SRAM) is faster than the more
traditional DRAM, but requires more silicon area. SRAM is static-the
RAM does not require refreshing.
SDRAM: SDRAM stands for Synchronous Dynamic Random Access
Memory. It is one of the DRAM type. It runs at high clock speed compare
to conventional memory. It gets synchronize with processor bus as
SDRAM is clocked.

Memory Controllers

Memory controllers connect different types of memory to the processor

bus. On power-up a memory controller is configured in hardware to
allow certain memory devices to be active. These memory devices allow
the initialization code to be executed. Some memory devices must be set
up by software; for example, when using DRAM, you first have to set up
the memory timings and refresh rate before it can be accessed.

Interrupt Controllers

There are two types of interrupt controller available for the ARM
processor:

Standard interrupt controller: The interrupt handler determines which

device requires servicing by reading a device bitmap register in the
interrupt controller.

vector interrupt controller (VIC) : Prioritizes interrupts and simplifies the

determination of which device caused the interrupt. After associating a
priority and a handler address with each interrupt, the VIC only asserts
an interrupt signal to the core if the priority of a new interrupt is higher
than the currently executing interrupt handler.

EMBEDDED SYSTEM SOFTWARE

An embedded system needs software to drive it. Below figure shows four
typical software components required to control an embedded device.

 The initialization code is the first code executed on the board and is
specific to a particular target or group of targets. It sets up the
minimum parts of the board before handing control over to the
operating system.

 The operating system provides an infrastructure to control

applications and manage hardware system resources.

 The device drivers are the third component shown in figure. They
provide a consistent software interface to the peripherals on the
hardware device.
 Finally, an application performs one of the tasks required for a
device. For example, a mobile phone might have a diary application.
There may be multiple applications running on the same device,
controlled by the operating system.

INITIALIZATION CODE
 Initialization code (or boot code) takes the processor from the reset
state to a state where the operating system can run. The initialization
code handles a number of administrative tasks prior to handing control
over to an operating system image.

We can group these different tasks into three phases: initial hardware
configuration, diagnostics, and booting.

Initial hardware configuration involves setting up the target platform so

it can boot an image. Hardware bootloader performs the essential
initialization including programming the clocks, stacks, interrupt set up
etc.

Diagnostics are often embedded in the initialization code. Diagnostic

code tests the system by exercising the hardware target to check if the
target is in working order. The primary purpose of diagnostic code is fault
identification and isolation.

Booting involves loading an image and handing control over to that

image. Booting an image is the final phase, but first you must load the
image. Loading an image involves anything from copying an entire
program including code and data into RAM, to just copying a data area
containing volatile variables into RAM. Once booted, the system hands
over control by modifying the program counter to point into the start of
the image.
Sometimes, to reduce the image size, an image is compressed. The image
is then decompressed either when it is loaded or when control is handed
over to it.

Example of Initialization code

Initializing or organizing memory is an important part of the initialization

code because many operating systems expect a known memory layout
before they can start.
Below Fig shows memory before and after reorganization. It is common
for ARM-based embedded systems to provide for memory remapping
because it allows the system to start the initialization code from ROM at
power-up. The initialization code then redefines or remaps the memory
map to place RAM at address 0x00000000—an important step because
then the exception vector table can be in RAM and thus can be
reprogrammed.

OPERATING SYSTEM

The initialization process prepares the hardware for an operating system

to take control. An operating system organizes the system resources: the
peripherals, memory, and processing time. With an operating system
controlling these resources, they can be efficiently used by different
applications running within the operating system environment.

ARM processors support over 50 operating systems. We can divide

operating systems into two main categories: real-time operating systems
(RTOSs) and platform operating systems.

 RTOSs provide guaranteed response times to events. Different

operating systems have different amounts of control over the
system response time. A hard real-time application requires a
guaranteed response to work at all. In contrast, a soft real-time
application requires a good response time, but the performance
 degrades more gracefully if the response time overruns. Systems
running an RTOS generally do not have secondary storage.

 Platform operating systems require a memory management unit to

manage large, non-real-time applications and tend to have
secondary storage. The Linux operating system is a typical example
of a platform operating system.

These two categories of operating system are not mutually exclusive:

there are operating systems that use an ARM core with a memory
management unit and have real-time characteristics. ARM has developed
a set of processor cores that specifically target each category.

APPLICATIONS

The operating system schedules applications (code dedicated to

handling a particular task). An application implements a processing task;
the operating system controls the environment. An embedded system can
have one active application or several applications running
simultaneously.

ARM processors are found in numerous market segments, including

networking, automotive, mobile and consumer devices, mass storage,
and imaging. Within each segment ARM processors can be found in
multiple applications.

For example, the ARM processor is found in networking applications like

home gateways, DSL modems for high-speed Internet communication,
and 802.11 wireless communication.

The mobile device segment is the largest application area for ARM
processors because of mobile phones. ARM processors are also found in
mass storage devices such as hard drives and imaging products such as
inkjet printers—applications that are cost sensitive and high volume.