Documenti di Didattica
Documenti di Professioni
Documenti di Cultura
Microelectronics Journal
journal homepage: www.elsevier.com/locate/mejo
A R T I C L E I N F O A B S T R A C T
Keywords: In this paper we present a System on Chip (SoC) that implements a Hall Effect Sensor along with its readout
Hall sensor circuits and calibration support. The sensor is designed for use in Hall effect based current sensors. The SoC was
Read out ICs implemented in 0.18u CMOS technology and integrates Hall sense elements, preamplifiers as well as a delta sigma
Digital sensor calibration
ADC, a DAC and a digital calibration. The SoC achieves 11 V/T gain and 0.76% RMS accuracy over a range of
Hall sensor based current sensors
Sensor SoC
300 mT and 30 kHz signal bandwidth. The SoC integrates a digital correction unit that implements a polynomial
Integrated silicon sensor computation algorithm for calibrating out the current sensor’s magnetic core induced nonlinearities. Offset
temperature drift of the sensor is 6.81μT per degrees over 40 C to 85 C range. A current sensor is built using
the SoC. It can measure currents from 10 A to 10 A and achieve 1.67% RMS measurement accuracy.
1. Introduction rise to a magnetic flux within the magnetic core. The flux is, nominally,
linearly proportional to the magnetic field and thus current [7]. However
Hall effect based magnetic field sensors are easily built using mixed as the current and magnetic field increase, due to the magnetization of
signal CMOS processes. Therefore they are commonly used whenever the used ferrite magnetic core, the flux within the core displays a
there is need for a low cost magnetic field sensor with moderate per- nonlinear transfer curve, as well as saturation and hysteresis. This
formance. Their applications range from consumer to automotive appli- magnetization is mainly due to the material and geometric properties of
cations. These sensors are often packaged with magnetic cores, rotators ferrite cores. Therefore the nonlinear dependence of the flux density (as
etc. to realize different types of sensors that can measure parameters such well as Hall effect sensor output) to the current is a major source of
as current, rotational speed, angle, position etc. [1]. measurement error for open loop current sensors. The overall impact of
One very common use of magnetic field sensors is in current mea- the nonlinearity on the current sensor transfer function is illustrated also
surements where the magnetic field due to the current is used to deter- in Fig. 1.
mine current. Also called open loop current sensors, these devices use a In literature the nonlinearity-induced error has been dealt in multiple
gapped ferrite magnetic core around the current flow and amplify the ways. In the first group, there are sensors that utilize magnetic cores 2-3x
induced magnetic field and confines the field lines [1,2]. Such a use is larger than necessary. These cores are used such that the maximum
illustrated in Fig. 1. The magnetic flux density (B in [T]) is the quantity magnetic flux due to the current is well below the saturation level, which
measured by the Hall effect sensor. For this type of current sensors there is impacted by the core geometry. That is the operational flux levels are
are two main types of errors. 30–40% of the maximum (saturation) magnetic flux [8]. Therefore larger
The first type of errors come from the offset and gain shift of the Hall sized (than necessary) magnetic cores are used. As the second group of
effect sensor element. More often than not this is the main type of error sensors there is a secondary winding around the core to generate a
against which currently used Hall effect based magnetic field sensors are counter magnetic field and keep the equivalent flux within the core near
calibrated. These sensors often implement calibration by adjusting the neutral level. This approach is called a closed loop Hall Effect based
readout preamplifier gain and offset [3–6]. Currently on-chip support sensor [2]. Closed loop sensors have higher costs and power consump-
exists for correcting the Hall sense element offset and gain errors. tion, as they require secondary windings and buffers to drive the sec-
The second type of errors arise during the generation of magnetic flux ondary windings. As the third group of nonlinearity mitigation the
within the magnetic core [1]. To understand these errors it should be nonlinearities are corrected by post processing the sensor outputs using a
noted that, the current to be measured relates linearly to the magnetic microcontroller [9,10]. Implementing these microcontroller based algo-
field (H in [A/m]) inside the magnetic core. This magnetic field also gives rithms require the use of additional computational resources from an
* Corresponding author.
E-mail addresses: girginal@itu.edu.tr (A. Girgin), bilmez@itu.edu.tr (M. Bilmez), amin@itu.edu.tr (H.Y. Amin), tufan.karalar@itu.edu.tr (T.C. Karalar).
https://doi.org/10.1016/j.mejo.2019.04.020
Received 22 December 2018; Received in revised form 12 April 2019; Accepted 24 April 2019
Available online 2 May 2019
0026-2692/© 2019 Elsevier Ltd. All rights reserved.
A. Girgin et al. Microelectronics Journal 90 (2019) 12–18
2. Architecture
The SoC architecture is shown in Fig. 2. Through the signal path the
Hall sensor converts the magnetic field to a Voltage. This is amplified
using a Programmable Gain Amplifier (PGA). The amplifier comprised of
two cascaded PGA’s. The amplifier output is digitized by using a Delta
Sigma Modulator ADC and its decimation filter (A/D). The digital sensor
output is calibrated using the integrated digital correction module. The
calibrated signal converted back to analog using a Delta Sigma modu-
Fig. 1. Hall effect based current sensor illustration (b) Vout-Imeas relation lated DAC (D/A). The DAC output is driven out by a voltage buffer, which
illustration. improves the current driving capability of the Analog output. This analog
output signal ensures the compatibility of the sensor to existing Hall
external device (such as a microcontroller) as well as its additional power Sensor interfaces. The sensor device is designed so that it houses most of
consumption. The requirement of external devices also increases the size the auxiliary blocks for self sufficient operation. Aside from the signal
of the overall current sensor. path components listed above the SoC includes a Band Gap Reference
By integrating the digital calibration functions on the same die as the Voltage as well as bias current generation (BG/REF). Moreover the
Hall effect sensor a compact and lower power current sensor can be oscillator for clock generation (CLK) as well as Power on Reset (POR)
designed. In this work we present a System on Chip (SoC) that imple- generation capabilities are included on chip. Finally a Serial Parallel
ments a Hall effect based magnetic field sensor and its associated readout Interface (SPI) is included for configuring the SoC from an external host
and calibration circuits. It is used along with a gapped ferrite magnetic computer.
core to build an open loop current sensor.
Novelty of our design comes from the fact that our SoC includes
2.1. Hall Sensor
digital correction capability against the magnetic core induced non-
linearities. Therefore outputs of the current sensor built using our SoC
The Integrated Hall sensor is implemented as a planar 4 terminal
would need no post processing to correct these nonlinearities. Thereby
device in an N-well. The N-Well is octagonally shaped and measures
offering a chance to reduce system complexity.
120 μm across. Its output voltage is nominally a linear function of the
In this paper we present a novel magnetic field sensor with integrated
magnetic flux density (B) and the bias current (Ibias) [1]. The Hall
digital polynomial calibration block implemented using floating-point
element is designed to handle maximum flux density of 300 mT with a
representations. The main focus was on integration and functionality
1 mA bias current. The sensor is assumed to respond to the vertical
VREF
100kHz CCMFB
5MHz
k1I0 k2I0 k3I0
Vout
Fig. 3. Feed-forward preamplifier architecture (left) schematic for last stage (5 MHz) integrator of preamp (right).
13
A. Girgin et al. Microelectronics Journal 90 (2019) 12–18
component of the applied magnetic fields. The expected maximum signal DAC feedback [12]. The Quantization results are shuffled with Dynamic
is 10 mV. Element Matching before feedback to reduce DAC nonlinearities [13].
The sensor has an output offset due to doping variations [1]. Using The Cascaded integrators are built using standard folded cascode am-
EM simulators this offset is estimated around 5Vrms. Using switches and plifiers [12]. The Feedback DAC’s are cascoded NMOS current sources
applying the sensor bias in four different directions spins the sensor bias with PMOS loads to prevent common mode shift.
currents. Averaging measurements from different bias current can cancel ADC outputs are obtained by filtering the modulator outputs through
offsets and allow reducing the sensor measurement offsets [1]. a decimation filter consisting of three cascaded sinc filters [12]. The
decimated ADC outputs are available to the calibration block or to an
2.2. Preamplifier external host through the serial interface. ADC power consumption is
5.7 mA.
The preamplifier (preamp) used after the sensor is comprised of two
cascaded amplifiers each utilizing feed-forward paths [11]. The pream- 2.4. Calibration block
plifier has a bandwidth of 100 kHz. With 50 dB amplifier gain needed due
to the 10 mV hall element full-scale signal. A single stage amplifier would Currently in most Hall Sensor IC’s calibration is performed as gain
require a 300 MHz unity gain frequency and about 100 dB of loop gain at and offset correction [2]. On the contrary, a more sophisticated cali-
DC. For design using slower and lower gain sub stages a feed forward bration is performed in our project using a digital calibration block. This
architecture is selected. The design does not use switched capacitor based block assumes that the nonlinearity of the current sensor transfer func-
integrators [5] as preamplifiers to keep the amplifier bandwidth re- tion (from input current to sensor output including the magnetic core
quirements relatively low. This potentially can allow power savings. nonlinearity) can be approximated by a 5th (or lower) order polynomial.
However we did not optimize our design to reap the benefits of this Current Sensor transfer function nonlinearity is due to hysteresis and
potential. The architecture and bandwidth of each feed forward stage is saturation during the generation of the magnetic flux within the mag-
shown in Fig. 3. Fully differential transistor level design of the last stage netic core. This generation is usually modeled after the hyperbolic
of the preamplifiers is shown in Fig. 3. The preamplifier can be pro- tangent function in earlier models [14]. The fifth order model is chosen
grammed to have gain values within 0–65 dB with roughly 5 dB steps. as a polynomial approximation to this hyperbolic tangent function.
The second amplifier has more relaxed specifications in terms of offset as During operation the current sensor digital output is corrected by
well as noise and potentially can consume less power. Preamplifiers draw calculating a polynomial function for the sensor output voltage. Unlike
a current of 3.7 mA together and target to achieve more than 60 dB of other available current sensors the gain and offset are calibrated out as
linearity. The chopping reduces the preamp offset to 50μV while intro- part of this polynomial computation as well. Moreover the necessary
ducing glitches to the output and summing junctions. RC low pass filters circuit for this calibration is integrated on-chip. The resulting imple-
are used at the input and output of the first stage to filter such glitches. mentation uses 2100 gates and occupies 82000 μm2 silicon area in our
0.18 μm process.
2.3. ADC The calibrated result is obtained by calculating a fifth order poly-
nomial function of the ADC output. The input and output of this cali-
For performing digital calibration, the output of the preamplifier is bration are 12-bit fixed-point signals with values between 1 and 1. The
digitized using a Continuous time Delta Sigma Modulator (DSM). The coefficients were stored as custom floating-point numbers with 5-bit
ADC is clocked at 12.5 MHz and at 100 kHz bandwidth the oversampling exponents and 7-bit mantissa. The fixed-point representation was not
ratio is 62.5. The target resolution is 12 bits. A 12 –bit resolution from the chosen, as the coefficients would have needed to be 40-bits wide. Due to
ADC ensures that the ADC does not create a performance bottleneck. A the floating-point nature, calibration first encodes the incoming fixed-
Continuous time DSM was selected to allow use of slower amplifiers than point data into the custom floating-point representation. Next the com-
a discrete time implementation. A 3rd order loop with 17 levels of putations for the 5th degree polynomial are executed. Finally the
quantization is determined to yield the target performance. floating-point result is converted back to fixed point. During this con-
The ADC is implemented using a cascade of integrators with Current version the necessary clipping and saturation operations are carried out.
14
A. Girgin et al. Microelectronics Journal 90 (2019) 12–18
2.3mm integration on the sensor SoC are the main novelties of our design.
2.5. DAC
A block diagram of this block is illustrated in Fig. 4. The calibration block 3. Implementation
can be bypassed for debugging purposes. It can be used to implement
lower order calibration polynomials when higher order calibration co- Hall Effect SoC has been manufactured in 0.18u CMOS 5 V compliant
efficients are forced to zero. process. It operates off of a 5 V supply, which was chosen for compati-
The calibration coefficients are computed during manufacturing after bility with existing mainstream sensors. Its micrograph is shown in Fig. 5.
the sensor is mounted into the final form factor. During the It has dimensions of 2.3 mm 2.3 mm. Each block was implemented to
manufacturing tests a current ramp is applied to the sensor as input. have dedicated regulators to reduce power supply noise coupling be-
Reading the ADC outputs through the serial interface against the input tween blocks. The regulator outputs are nominally at 3.8 V.This is the
current values, a polynomial regression can be executed externally. As main supply voltage for the blocks. The main focus was on integration
the result of this regression calibration polynomial coefficients are and functionality rather than power minimization.
determined. The speed of this conversion is mainly determined by the There are five different types of Hall elements they are placed along a
calibration current values. To speed up this calibration as few as 6 current vertical line. These five sensors can be used to compare their various
values can be used. However to improve the accuracy more calibration performance metrics against each other. For the results in our measure-
values and longer calibrations would be necessary. ments the 3rd sensor was found to yield the largest sensor outputs. The
When the 5th order polynomial cannot achieve optimum approxi- SoC is almost completely self-contained including clocks; voltage and
mation due to resolution constraints, a lower order polynomial can be current references as well as an on chip reset generation. Only the
helpful to reduce the error across the signal range. Then such a low order configuration data needed to be provided. Once the chip is powered up
polynomial would be realized by setting the fifth order (and if necessary all configuration bits, calibration coefficient numbers need to be down-
the fourth order) term to zero. The computed coefficients are kept in local loaded through the serial port.
memory and need to be loaded through the serial interface every time the The SoC was not packaged but rather placed and wire bonded directly
sensor is powered up. If a flash memory were added to the device at a on a printed circuit board (PCB) using chip on board methodology. The
later time the boot loading of the calibration coefficients from an external PCB is inserted in the magnetic core cap as shown in Fig. 6 The input
memory would not be necessary. current has 6 turns around the gapped core to increase the magnetic field
The use of the high order polynomial calibration algorithm and its induced within the magnetic core. The Hall sensor is visible within the
gap of the magnetic core.
Fig. 6. C-frame Electromagnet used for magnetic sensor tests (Left), Current Sensor Built from Hall Sensor SoC (Right). The SoC is tested in three configurations.
15
A. Girgin et al. Microelectronics Journal 90 (2019) 12–18
-1
-2
-3
Fig. 7. Hall Sensor curve showing the Magnetic field to output voltage (Vout) relation.
16
A. Girgin et al. Microelectronics Journal 90 (2019) 12–18
-0.3
measured data
polynomial fit
-0.35
-0.4
-0.45
-0.5
-0.55
-0.6
-0.65
-0.7
-0.75
-0.8
-10 -8 -6 -4 -2 0 2 4 6 8 10
5. Conclusion
In this paper a Hall Effect based magnetic field sensor SoC has been
presented. The SoC is used to build a current sensor. The SoC has a novel
feature that implements a nonlinear polynomial calibration with an in-
Fig. 9. Sensor, preamplifier, ADC and DAC readout chain output performance at tegrated digital computation block. This calibration corrects the non-
30 kHz input. linearities generated by the magnetic core used in the current sensor. The
SoC includes a magnetic field sensor readout section that includes a feed-
forward multipath preamp with programmable gain. It also includes a
delta sigma ADC and a delta sigma modulated DAC. The sensor system
3. For the current sensor, magnetization due to the 10 A current input
achieves a 300 mT range with a gain of 11 V/T and offset drift of
level covers about 10% of its full -scale magnetic input range. For such
6.81μT/C. It achieves 0.76% magnetic field measurement accuracy over
magnetic field levels the core does not display “saturation induced
30 kHz bandwidth. Using this SoC a current sensor was realized. This
nonlinearity” that would necessitate the use of a 5th order calibration
current sensor achieved 1.67% measurement accuracy using a 5th order
polynomial. This is visible in Fig. 8. However a high order calibration
polynomial calibration.
polynomial is beneficial as it can reduce the RMS error from 1.9%
when using a linear calibration.
Acknowledgment
In the third configuration, the AC responses of the preamplifier, ADC
This project was funded by the Scientific and Technological Research
and DAC lineup is tested. For this purpose a sinusoidal signal, which is
Council of Turkey TUBITAK research grant 115C053. Assoc. Prof.
generated with an Agilent 81150 A function generator, is injected into
Hüseyin Kurt is acknowledged for his assistance in magnetic sensor
the preamplifier test input. During the test the preamplifier gain is set to
characterization. ITU VLSI Laboratories is acknowledged for the SoC
unity. The sensor signal chain was characterized using a 30 kHz sinu-
characterization.
soidal input. The input signal includes a 1.75 V DC component as well.
The output signal, shown in Fig. 9 has 40 dB of second harmonic
17
A. Girgin et al. Microelectronics Journal 90 (2019) 12–18
References [9] I. Jedlicska, R. Weiss, R. Weigel, Linearizing the output characteristic of GMR
current sensors through hysteresis modeling, IEEE Trans. Ind. Electron. 57 (2010)
1728–1734.
[1] E. Ramsden, Hall Effect Sensors Theory and Applications, Elsevier Inc, UK, 2006.
[10] F. Xie, R.J. Weiss, R. Weigel, Hysteresis compensation based on controlled current
[2] D. Jobling, Advances in ASICs for open loop Hall-effect based current transducers,
pulses for magnetoresistive sensors, IEEE Trans. Ind. Electron. 62 (2015)
Bodos Power Syst. (2012) 66–68.
7804–7809.
[3] A. Ajbl, M. Pastre, M. Kayal, A fully integrated Hall sensor microsystem for
[11] A. Thomsen, D. Kasha, W. Lee, A five stage chopper stabilized instrumentation
contactless current measurement, IEEE Sens. J. 13 (2013) 2271–2278.
amplifier using feedforward compensation, in: VLSI Circuits, 1998. Digest of
[4] H. Heidari, E. Bonizzoni, U. Gatti, F. Maloberti, A 0.18-um CMOS current-mode Hall
Technical Papers. 1998 Symposium on, IEEE, 1998, pp. 220–223.
magnetic sensor with very low bias current and high sensitive front-end, in: IEEE
[12] S. Pavan, R. Schreier, G.C. Temes, Understanding Delta-Sigma Data Converters,
SENSORS 2014 Proceedings, 2014, pp. 1467–1470.
John Wiley & Sons, 2017.
[5] H. Heidari, E. Bonizzoni, U. Gatti, F. Maloberti, A CMOS current-mode magnetic
[13] T. Kwan, R. Adams, R. Libert, A stereo multi-bit/spl Sigma//spl Delta/ D/A with
Hall sensor with integrated front-end, IEEE Trans. Circuits Syst. -I Reg. Pap. 62
asynchronous master-clock interface, in: 1996 IEEE International Solid-State
(2015) 1270–1278.
Circuits Conference. Digest of TEchnical Papers, ISSCC, 1996, pp. 226–227.
[6] J. Jiang, K.A.A. Makinwa, A multi-path CMOS Hall sensor with integrated ripple
[14] M.C. Williams, R.S. Vogelsong, K.S. Kundert, Simulation and modeling of nonlinear
reduction loops, in: 2015 IEEE Asian Solid-State Circuits Conference (A-SSCC),
magnetics, in: Proceedings of ISCAS’95-International Symposium on Circuits and
2015, pp. 1–4.
Systems, IEEE, 1995, pp. 736–739.
[7] R.W. Erickson, D. Maksimovic, Fundamentals of Power Electronics, Springer
[15] R. Adams, K.Q. Nguyen, A 113-dB SNR oversampling DAC with segmented noise-
Science & Business Media, 2007.
shaped scrambling, IEEE J. Solid State Circuits 33 (1998) 1871–1878.
[8] L.I. SA, Datasheet: digital current transducer HLSR-PW series IP N ¼ 16 … 50 A, in:
[16] A. Girgin, T.C. Karalar, Output offset in silicon Hall effect based magnetic field
LEM International SA, 2018.
sensors, Sensor Actuator A Phys. 288 (2019) 177–181.
18