Lenovo M30-70 S410 (Compal LA-A321P) PDF

A B C D E
Compal Confidential
Model Name : ZIUS6/S7
File Name : LA-A321PR01
1 1
BOM P/N:4319OP38L5x -- ZIUS7

4319OP38L0x -- ZIUS6
Compal Confidential
2 2
ZIUS6/S7 M/B Schematics Document

Intel SharyBay ULT Processor + AMD SUN Pro
3 2013-03-14 3
REV:0.2
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.

2011/06/24 2012/07/12 Title
Issued Date Deciphered Date Cover Page
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-A321PR02
Date: Thursday, March 14, 2013 Sheet 1 of 46
A B C D E
A B C D E
Compal confidential
File Name :ZIUS6/ZIUS7
AMD SUN Pro

VRAM 256X16, PCIE x4 204pin DDR3L-SO-DIMM X1
128X16 Memory BUS
1
page 15 1
DDR3 x 4
page 16~22 1.35V DDR3L 1333/1600
eDP to LVDS translator eDP x1

LVDS Conn Realtek RTD2132R SATA 3.0 SATA3.0 HDD CONN
page 29
page 29
page 27
SATA 3.0
SATA3.0 HDD (SSD)
page 27
2.97GT/s
HDMI Conn. HDMI x 4 lanes DDI x1 Intel Haswell ULT
page 30
2 1168pin BGA 2
port 3
LAN( 10/100/GbE) PCIe 2.0 5GT/s PCIE x1 page 04~14 USB 3.0 USB 3.0 USB 2.0 CMOS
Realtek RTL8111GUS
RJ45 Conn /RTL8106 EUS page 24 conn x1 conn x2 Camera
page 24
port (Left) port (Right) port
page 28 IO/B page 29
2Channel Speaker USB 2.0x8
Combo Jack(HP, MIC) AUDIO CODEC HD Audio

IO/B Realtek ALC233 WLAN+BT Card Reader
PCIE x1 (Mini Card) GENESYS GL834L
page 23
port IO/B port
Single Digital MIC
IO/B page 28
SYS BIOS ROM 8M SPI Card Reader

3 3
WINBOND W25Q64FVSSIQ Conn. IO/B
page 7
LPC BUS
CLK=24MHz
KBC
ENE KB9012 A4
page 25
PS/2
Sub-borad
Touch Pad Int.KBD Thermal Sensor
4
EMC1403-2-AIZL-TR 4
POWER BOARD page 31 page 31 page 31
LED BOARD
Issued Date 2011/07/21 Deciphered Date 2012/12/31 Title
IO Board THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MB Block Diagram
A B C D E
1 2 3 4 5
Voltage Rails BOM Structure Table

SIGNAL BTO Item BOM Structure
STATE SLP_S0# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
Connector * ME@
+5VS Full ON HIGH HIGH HIGH HIGH ON ON ON ON 45 LEVEL 45@
+3VS Unpop @
power S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF
plane +1.5VS CPU OPTION CPU1@
+1.05VS_VTT S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF INTEL UMA UMA@
+5VALW +CPU_CORE AMD SUN Pro PX@
A S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF A
B+ +1.35V +0.675VS VRAM Option S1G@ M1G@ H1G@
+3VALW S2G@ M2G@
+VGA_CORE(PX)
+0.95VS_VGA(PX)
LAN RTL8111GUS 8111@ SWR@
State LAN RTL8106EUS 8106@ SWR@
+3.3VS_VGA(PX)
BOARD ID Table USB3.0 USB3@
+1.8VS_VGA(PX)
EMI PART EMI@
+1.5VS_VGA(PX) Board ID PCB Revision
ESD PART ESD@
0
*
1
S0 2
O O O O 0.2
3 0.1
S3 4
O O O X
5
S5 S4/AC 6
O O X X
7
S5 S4/ Battery only
X X X X
S5 S4/AC & Battery
B
don't exist
X X X X USB 2.0 Port Table USB 3.0 Port Table
B
3 External PCIE Port Table

USB 2.0 Port USB Port Port
0 USB 2.0 Port (I/O Board) 1
EC SM Bus1 address EC SM Bus2 address Port Lane
1 USB 3.0/2.0 Port (MB) 2 USB 3.0 Port (MB)
2 USB 2.0 Port (I/O Board) 3 1
Device Address Device Address
Smart Battery Thermal Sensor EMC1403-2-AIZL-TR 1001_101xb
3 Card Reader 4 2 LAN
Charger Panel - eDP to LVDS translator 4 Touch Screen (reserve) 3 WLAN
SharkBay ULT
AMD SUN Pro 5 Camera 4
6 Mini Card (WLAN/BT) 0
7 SATA Port Table 1
5 GPU
2
CPU SM Bus address CPU SML0 Bus address Port
3
3 0
Device Address Device Address
DDR DIMM0 0XA0
2 1
WALN
6
Touch Pad
1 mSATA SSD 2
C
0 HDD 3 C
CPU part
U1 CPU1@ U1 CPU2@ U1 CPU3@ U1 CPU4@ U1 CPU5@
SMBUS Control Table I5_3317U 1.7G I3-4010U 1.7G I3-4100U 1.8G I5-4250U 1.3G I5-4200U 1.6G
PANEL SA00006FY20 SA00006SX20 SA00006SU20 SA00006NM40 SA00006SM20
sensor Thermal VGA

CPU Touch Security NFC U1 CPU6@ U1 CPU7@
HOST VGA BATT KB9012 SODIMM WLAN ADM1032 sensor sensor
EMC1403 ADM1032 Sensor Pad ROM
EC_SMB_CK1
EC_SMB_DA1
KB9012
+3VLP
X V
+3VLP
X X X X X X X X X X I7-4550U 1.5G
SA00006SJ30
I7-4500U 1.8G
SA00006SL20
EC_SMB_CK2
V X X X X V V V V X X X
V0.2
KB9012
EC_SMB_DA2 +3VS +3VS +3VS +3VS +3VS +3VALW
SMBCLK
SMBDATA
CPU
+3VALW
X X X V
+3VS
V
+3VS
X X X X V
+3VS
V
+3VS
V
+3VS
PCB part VRAM
ZZZ3 ZZZ7 ZZZ6 ZZZ4 ZZZ8
SML0CLK
X X X X X X X X X X X X
ZZZ5
CPU
D SML0DATA +3VALW D
SML1CLK
SML1DATA
KB9012
+3VS
X X V
+3VS
X X X X X V
+3VALW
X X X PCB 0R LA-A321P REV0 M/B
DA600104000
Samsung
S2G@
X7641338L34
MICRON
M2G@
X7641338L35
Samsung
S1G@
X7641338L31
MICRON
M1G@
X7641338L32
Hunix
H1G@
X7641338L33
K4W4G1646B-HC11 MT41K256M16HA-107G:E K4W2G1646E-BC1A MT41J128M16JT-093G:K Hynix 128x16 Vram H5TC2G63FFR-11C
Security Classification Compal Secret Data

Title
Compal Electronics, Inc.
Issued Date 2011/07/12 Deciphered Date 2012/07/01
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Notes List
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Date:
LA-A321PR02
Thursday, March 14, 2013 Sheet 3 of 46
1 2 3 4 5
5 4 3 2 1
D D
U1A HASWELL_MCP_E
C54 C45
C55 DDI1_TXN0 EDP_TXN0 B46 EDP_TXN0 <29>
B58 DDI1_TXP0 EDP_TXP0 A47 EDP_TXP0 <29>
C58 DDI1_TXN1 EDP_TXN1 B47
CRT B55 DDI1_TXP1 EDP_TXP1
A55 DDI1_TXN2 C47
A57 DDI1_TXP2 EDP_TXN2 C46
eDP
B57 DDI1_TXN3 EDP_TXP2 A49
DDI1_TXP3 DDI EDP EDP_TXN3 B49
C46 1 2 0.1U_0402_16V7K CPU_DP2_N0 C51 EDP_TXP3
<30> HDMI_TX2-_CK 1 2 C50 DDI2_TXN0 A45
C47 0.1U_0402_16V7K CPU_DP2_P0 EDP_AUXN <29>
<30> HDMI_TX2+_CK 1 2 CPU_DP2_N1 C53 DDI2_TXP0 EDP_AUXN B45
HDMI C48 0.1U_0402_16V7K EDP_AUXP <29>
<30> HDMI_TX1-_CK 1 2 B54 DDI2_TXN1 EDP_AUXP
C55 0.1U_0402_16V7K CPU_DP2_P1
<30> HDMI_TX1+_CK 1 2 CPU_DP2_N2 C49 DDI2_TXP1 D20 EDP_COMP R1 1 2 24.9_0402_1%
C56 0.1U_0402_16V7K +VCCIOA_OUT
<30> HDMI_TX0-_CK 1 2 CPU_DP2_P2 B50 DDI2_TXN2 EDP_RCOMP A43 CPU_INV_PWM 1 2
C68 0.1U_0402_16V7K
<30> HDMI_TX0+_CK 1 2 CPU_DP2_N3 A53 DDI2_TXP2 EDP_DISP_UTIL INVPWM <29,8>
C72 0.1U_0402_16V7K R31 @ 0_0402_5%
<30> HDMI_CLK-_CK 1 2 CPU_DP2_P3 B53 DDI2_TXN3
C74 0.1U_0402_16V7K
<30> HDMI_CLK+_CK DDI2_TXP3
EDP_COMP:
Trace width=20 mils,Spacing=25mil,Max length=100mils
1 OF 19 Rev1p2
@
C C
U1B HASWELL_MCP_E
T111 @ D61
T2 @ K61 PROC_DETECT MISC
N62 CATERR J62
<25> H_PECI PECI PRDY K62
1 R2 2 R3 JTAG
PREQ E60 XDP_TCK @ T16
+1.05VS_VTT PROC_TCK
62_0402_5% 56_0402_5% E61 XDP_TMS @ T17
1 2 H_PROCHOT#_R K63 PROC_TMS E59 XDP_TRST# @ T22
<25,33> H_PROCHOT# PROCHOT PROC_TRST
THERMAL F63 XDP_TDI @ T23
PROC_TDI F62 XDP_TDO @ T24
PROC_TDO
R6 1 2 10K_0402_5% H_CPUPWRGD C61
PROCPWRGD PWR
J60
BPM#0 H60
DDR3 Compensation Signals BPM#1 H61
BPM#2 H62
B R9 1
2 200_0402_1% SM_RCOMP0 AU60 BPM#3 K59 B
R10 1
2 120_0402_1% SM_RCOMP1 AV60 SM_RCOMP0 DDR3 BPM#4 H63
R11 1
2 100_0402_1% SM_RCOMP2 AU61 SM_RCOMP1 BPM#5 K60
DIMM_DRAMRST#AV15 SM_RCOMP2 BPM#6 J61
DDR3 Compensation Signals: DDR_PG_CTRL AV61 SM_DRAMRST BPM#7
20mils to comp signals <15> DDR_PG_CTRL SM_PG_CNTL1
25mils to non-comp signals 2 OF 19 Rev1p2

Chklist 1.0
500mil for Max trace length SM_RCOMP1 -->120 ohm 1%
ESD H_CPUPWRGD
+1.35V
1
1
R29
470_0402_5% ESD@ C2222
100P_0402_50V8J
2
2
DIMM_DRAMRST#
DIMM_DRAMRST# <15>
A A

2011/12/13 2012/12/13 Title
Issued Date Deciphered Date HSW MCP(1/11) DDI,MSIC,XDP
LA-A321PR02
5 4 3 2 1
5 4 3 2 1
D D
U1C HASWELL_MCP_E
U1D HASWELL_MCP_E
DDR_A_D0 AH63 AU37

DDR_A_D1 AH62 SA_DQ0 SA_CLK#0 AV37 SA_CLK_DDR#0 <15>
AK63 SA_DQ1 SA_CLK0 AW36 SA_CLK_DDR0 <15> AY31 AM38
DDR_A_D2
DDR_A_D3 AK62 SA_DQ2 SA_CLK#1 AY36 SA_CLK_DDR#1 <15> AW31 SB_DQ0 SB_CK#0 AN38
DDR_A_D4 AH61 SA_DQ3 SA_CLK1 SA_CLK_DDR1 <15> AY29 SB_DQ1 SB_CK0 AK38
DDR_A_D5 AH60 SA_DQ4 AU43 AW29 SB_DQ2 SB_CK#1 AL38
AK61 SA_DQ5 SA_CKE0 AW43 DDRA_CKE0_DIMMA <15> AV31 SB_DQ3 SB_CK1
DDR_A_D6
DDR_A_D7 AK60 SA_DQ6 SA_CKE1 AY42 DDRA_CKE1_DIMMA <15> AU31 SB_DQ4 AY49
DDR_A_D8 AM63 SA_DQ7 SA_CKE2 AY43 AV29 SB_DQ5 SB_CKE0 AU50
DDR_A_D9 AM62 SA_DQ8 SA_CKE3 AU29 SB_DQ6 SB_CKE1 AW49
DDR_A_D10 AP63 SA_DQ9 AP33 AY27 SB_DQ7 SB_CKE2 AV50
AP62 SA_DQ10 SA_CS#0 AR32 DDRA_CS0_DIMMA# <15> AW27 SB_DQ8 SB_CKE3
DDR_A_D11
DDR_A_D12 AM61 SA_DQ11 SA_CS#1 DDRA_CS1_DIMMA# <15> AY25 SB_DQ9 AM32
DDR_A_D13 AM60 SA_DQ12 AP32 DDRA_ODT0 @ T4 AW25 SB_DQ10 SB_CS#0 AK32
DDR_A_D14 AP61 SA_DQ13 SA_ODT0 AV27 SB_DQ11 SB_CS#1
DDR_A_D15 AP60 SA_DQ14 AY34 AU27 SB_DQ12 AL32
DDR_A_D16 AP58 SA_DQ15 SA_RAS AW34 DDR_A_RAS# <15> AV25 SB_DQ13 SB_ODT0
DDR_A_D17 AR58 SA_DQ16 SA_WE AU34 DDR_A_WE# <15> AU25 SB_DQ14 AM35
AM57 SA_DQ17 SA_CAS DDR_A_CAS# <15> AM29 SB_DQ15 SB_RAS AK35
DDR_A_D18
DDR_A_D19 AK57 SA_DQ18 AU35 AK29 SB_DQ16 SB_WE AM33
DDR_A_D20 AL58 SA_DQ19 SA_BA0 AV35 DDR_A_BS0 <15> AL28 SB_DQ17 SB_CAS
AK58 SA_DQ20 SA_BA1 AY41 DDR_A_BS1 <15> AK28 SB_DQ18 AL35
DDR_A_D21
AR57 SA_DQ21 SA_BA2 DDR_A_BS2 <15> AR29 SB_DQ19 SB_BA0 AM36
DDR_A_D22
DDR_A_D23 AN57 SA_DQ22 3 OF 19 AU36 DDR_A_MA0 AN29 SB_DQ20 SB_BA1 AU49
DDR_A_D24 AP55 SA_DQ23 SA_MA0 AY37 DDR_A_MA1 AR28 SB_DQ21 4 OF 19 SB_BA2
C DDR_A_D25 AR55 SA_DQ24 SA_MA1 AR38 DDR_A_MA2 AP28 SB_DQ22 AP40 C
DDR_A_D26 AM54 SA_DQ25 SA_MA2 AP36 DDR_A_MA3 AN26 SB_DQ23 SB_MA0 AR40
DDR_A_D27 AK54 SA_DQ26 SA_MA3 AU39 DDR_A_MA4 AR26 SB_DQ24 SB_MA1 AP42
DDR_A_D28 AL55 SA_DQ27 SA_MA4 AR36 DDR_A_MA5 AR25 SB_DQ25 SB_MA2 AR42
DDR_A_D29 AK55 SA_DQ28 SA_MA5 AV40 DDR_A_MA6 AP25 SB_DQ26 SB_MA3 AR45
DDR_A_D30 AR54 SA_DQ29 SA_MA6 AW39 DDR_A_MA7 AK26 SB_DQ27 SB_MA4 AP45
DDR_A_D31 AN54 SA_DQ30 SA_MA7 AY39 DDR_A_MA8 AM26 SB_DQ28 SB_MA5 AW46
DDR_A_D32 AY58 SA_DQ31 SA_MA8 AU40 DDR_A_MA9 AK25 SB_DQ29 SB_MA6 AY46
DDR_A_D33 AW58 SA_DQ32 SA_MA9 AP35 DDR_A_MA10 AL25 SB_DQ30 SB_MA7 AY47
DDR_A_D34 AY56 SA_DQ33 SA_MA10 AW41 DDR_A_MA11 AY23 SB_DQ31 SB_MA8 AU46
DDR_A_D35 AW56 SA_DQ34 DDR CHANNEL A SA_MA11 AU41 DDR_A_MA12 AW23 SB_DQ32 SB_MA9 AK36
DDR_A_D36 AV58 SA_DQ35 SA_MA12 AR35 DDR_A_MA13 AY21 SB_DQ33 DDR CHANNEL B SB_MA10 AV47
DDR_A_D37 AU58 SA_DQ36 SA_MA13 AV42 DDR_A_MA14 AW21 SB_DQ34 SB_MA11 AU47
DDR_A_D38 AV56 SA_DQ37 SA_MA14 AU42 DDR_A_MA15 AV23 SB_DQ35 SB_MA12 AK33
DDR_A_D39 AU56 SA_DQ38 SA_MA15 AU23 SB_DQ36 SB_MA13 AR46
DDR_A_D40 AY54 SA_DQ39 AJ61 DDR_A_DQS#0 AV21 SB_DQ37 SB_MA14 AP46
DDR_A_D41 AW54 SA_DQ40 SA_DQSN0 AN62 DDR_A_DQS#1 AU21 SB_DQ38 SB_MA15
DDR_A_D42 AY52 SA_DQ41 SA_DQSN1 AM58 DDR_A_DQS#2 AY19 SB_DQ39 AW30
DDR_A_D43 AW52 SA_DQ42 SA_DQSN2 AM55 DDR_A_DQS#3 AW19 SB_DQ40 SB_DQSN0 AV26
DDR_A_D44 AV54 SA_DQ43 SA_DQSN3 AV57 DDR_A_DQS#4 <15> DDR_A_D[0..63] AY17 SB_DQ41 SB_DQSN1 AN28
DDR_A_D45 AU54 SA_DQ44 SA_DQSN4 AV53 DDR_A_DQS#5 AW17 SB_DQ42 SB_DQSN2 AN25
AV52 SA_DQ45 SA_DQSN5 AL43 DDR_A_DQS#6 <15> DDR_A_MA[0..15] AV19 SB_DQ43 SB_DQSN3 AW22
DDR_A_D46
DDR_A_D47 AU52 SA_DQ46 SA_DQSN6 AL48 DDR_A_DQS#7 AU19 SB_DQ44 SB_DQSN4 AV18
AK40 SA_DQ47 SA_DQSN7 <15> DDR_A_DQS#[0..7] AV17 SB_DQ45 SB_DQSN5 AN21
DDR_A_D48
DDR_A_D49 AK42 SA_DQ48 AJ62 DDR_A_DQS0 AU17 SB_DQ46 SB_DQSN6 AN18
DDR_A_D50 AM43 SA_DQ49 SA_DQSP0 AN61 DDR_A_DQS1 <15> DDR_A_DQS[0..7] AR21 SB_DQ47 SB_DQSN7
DDR_A_D51 AM45 SA_DQ50 SA_DQSP1 AN58 DDR_A_DQS2 AR22 SB_DQ48 AV30
DDR_A_D52 AK45 SA_DQ51 SA_DQSP2 AN55 DDR_A_DQS3 AL21 SB_DQ49 SB_DQSP0 AW26
DDR_A_D53 AK43 SA_DQ52 SA_DQSP3 AW57 DDR_A_DQS4 AM22 SB_DQ50 SB_DQSP1 AM28
DDR_A_D54 AM40 SA_DQ53 SA_DQSP4 AW53 DDR_A_DQS5 AN22 SB_DQ51 SB_DQSP2 AM25
DDR_A_D55 AM42 SA_DQ54 SA_DQSP5 AL42 DDR_A_DQS6 AP21 SB_DQ52 SB_DQSP3 AV22
DDR_A_D56 AM46 SA_DQ55 SA_DQSP6 AL49 DDR_A_DQS7 AK21 SB_DQ53 SB_DQSP4 AW18
B DDR_A_D57 AK46 SA_DQ56 SA_DQSP7 AK22 SB_DQ54 SB_DQSP5 AM21 B
DDR_A_D58 AM49 SA_DQ57 AP49 AN20 SB_DQ55 SB_DQSP6 AM18
DDR_A_D59 AK49 SA_DQ58 SM_VREF_CA AR51 SM_DIMM_VREFCA <15> AR20 SB_DQ56 SB_DQSP7
DDR_A_D60 AM48 SA_DQ59 SM_VREF_DQ0 AP51 SA_DIMM_VREFDQ <15> AK18 SB_DQ57
DDR_A_D61 AK48 SA_DQ60 SM_VREF_DQ1 AL18 SB_DQ58
DDR_A_D62 AM51 SA_DQ61 AK20 SB_DQ59
DDR_A_D63 AK51 SA_DQ62 AM20 SB_DQ60
SA_DQ63 AR18 SB_DQ61
AP18 SB_DQ62
SB_DQ63
Rev1p2
Rev1p2
A A

2011/12/13 2012/12/13 Title
Issued Date Deciphered Date HSW MCP(2/11) DDRIII
LA-A321PR02
5 4 3 2 1
5 4 3 2 1
PCH_RTCX1 JME2 Short PAD placement to Bottom side.

1 2 PCH_RTCX2
R33 10M_0402_5%
ME CMOS U1E HASWELL_MCP_E

Y1
1 2 +RTCVCC
1
2
D 32.768KHZ 12.5PF 9H03200031 +RTCVCC C2 JME1 2/4 PCH_RTCX1 AW5 D
V0.2 1U_0603_10V6K PCH_RTCX2 AY5 RTCX1
SHORT PADS
1
2 R35 1 2 1M_0402_5% SM_INTRUDER# AU6 RTCX2 J5
@ INTRUDER RTC SATA_RN0/PERN6_L3 SATA_PRX_DTX_N0 <27>
1 1 R36 20K_0402_1% PCH_INTVRMEN AV7 H5
INTVRMEN SATA_RP0/PERP6_L3 SATA_PRX_DTX_P0 <27>
C3 C4 1 2 PCH_SRTCRST# AV6 B15 HDD
1 2 AU7 SRTCRST SATA_TN0/PETN6_L3 A15 SATA_PTX_DRX_N0 <27>
PCH_RTCRST#
RTCRST SATA_TP0/PETP6_L3 SATA_PTX_DRX_P0 <27>
15P_0402_50V8J 15P_0402_50V8J R37 20K_0402_1%
2 2 J8
1 SATA_RN1/PERN6_L2 SATA_PRX_DTX_N1 <27>
2
H8
SATA_RP1/PERP6_L2 SATA_PRX_DTX_P1 <27>
C5 JME2 2/4 A17 mSATA
SATA_TN1/PETN6_L2 B17 SATA_PTX_DRX_N1 <27>
1U_0603_10V6K SHORT PADS SATA_PTX_DRX_P1 <27>
1
2 CMOS SATA_TP1/PETP6_L2
@
HDA_BIT_CLK AW8 J6
HDA_SYNC AV11 HDA_BCLK/I2S0_SCLK SATA_RN2/PERN6_L1 H6
+RTCVCC HDA_RST# AU8 HDA_SYNC/I2S0_SFRM SATA_RP2/PERP6_L1 B14
HDA_SDIN0 AY10 HDA_RST/I2S_MCLK SATA_TN2/PETN6_L1 C15
<23> HDA_SDIN0 HDA_SDI0/I2S0_RXD SATA_TP2/PETP6_L1
AU12 AUDIO SATA
PCH_INTVRMEN R39 1 2 330K_0402_5% HDA_SDOUT AU11 HDA_SDI1/I2S1_RXD F5
R40 1 @ 2 330K_0402_5% AW10 HDA_SDO/I2S0_TXD SATA_RN3/PERN6_L0 E5
AV10 HDA_DOCK_EN/I2S1_TXD SATA_RP3/PERP6_L0 C17
：： AY8 HDA_DOCK_RST/I2S1_SFRM SATA_TN3/PETN6_L0 D17

INTVRMEN (+1.05VA)
I2S1_SCLK SATA_TP3/PETP6_L0
* H Integrated VRM enable
L Integrated VRM disable
5 OF 19 V1 EC_SMI#
SATA0GP/GPIO34 EC_SMI# <25> +1.05VS_ASATA3PLL
U1 PCH_GPIO35
SATA1GP/GPIO35 PCH_GPIO35 <9>
V6 PCH_GPIO36
SATA2GP/GPIO36 AC1 PCH_GPIO37 PCH_GPIO36 <9>
SATA3GP/GPIO37 PCH_GPIO37 <9>
@ T108 PCH_JTAG_RST# AU62
PCH_JTAG_TCK AE62 PCH_TRST A12
@ T118 PCH_JTAG_TDI AD61 PCH_TCK SATA_IREF L11
@ T113 PCH_JTAG_TDO AE61 PCH_TDI RSVD K10
PCH_TDO RSVD within 500 mils
@ T119 PCH_JTAG_TMS AD62 JTAG C12 SATA_RCOMP R43 1 2 3.01K_0402_1%
C AL11 PCH_TMS SATA_RCOMP U3 PCH_SATALED# C
AC4 RSVD SATALED PCH_SATALED# <9>
@ T106 PCH_TCK_JTAGX AE63 RSVD
AV2 JTAGX
RTC Battery RSVD
SMT
W=20mils W=20mils
Rev1p2
+RTCVCC +RTCBATT
R107 1 @ 2 0_0402_5%
1 2/4
C179
1U_0402_6.3V6K Safty suggestion remove EE side ,Keep PWR side
2
+3VALW_PCH
B B
1 2 HDA_SDOUT
R1239 @ 1K_0402_5% EMI +3VS
HDA_SDOUT RP14 EMI@

1 8 HDA_SDOUT
<23> HDA_SDOUT_AUDIO
ME debug mode,this signal has a weak internal PD 2 7 HDA_SYNC R99 1 2 10K_0402_5% EC_SMI#
<23> HDA_SYNC_AUDIO
* Low = Disabled (Default) 3 6 HDA_RST#
<23> HDA_RST_AUDIO#
High = Enabled [Flash Descriptor Security Overide] 4 5 HDA_BIT_CLK
<23> HDA_BITCLK_AUDIO
9/28
1 33_8P4R_5%
C5205 @
RF 68P_0402_50V8J
2
1 2 PCH_JTAG_TCK R53 1 @ 2 0_0402_5%

<25> ME_FLASH
R86 @ 51_0402_5%
SMT
A A

2011/12/13 2012/12/13 Title
Issued Date Deciphered Date HSW MCP(3/11) RTC,SATA,XDP
LA-A321PR02
5 4 3 2 1
5 4 3 2 1
XTAL24_IN
U1F HASWELL_MCP_E
2 1 XTAL24_OUT
1M_0402_5% R87
Y2 24MHZ_12PF_7V24000020
C43 A25 XTAL24_IN
C42 CLKOUT_PCIE_N0 XTAL24_IN B25 XTAL24_OUT 1 3
PCH_GPIO18 U2 CLKOUT_PCIE_P0 XTAL24_OUT 1 3
<9> PCH_GPIO18 PCIECLKRQ0/GPIO18 GND GND
K21 V0.2 1 1
CLK_PCIE_LAN# B41 RSVD M21 C6 C7
<24> CLK_PCIE_LAN# CLK_PCIE_LAN A41 CLKOUT_PCIE_N1 RSVD C26 XCLK_BIASREF 1 2 3.01K_0402_1% 2 4
GLAN R91 +1.05VS_AXCK_LCPLL
<24> CLK_PCIE_LAN Y5 CLKOUT_PCIE_P1 DIFFCLK_BIASREF
<24> LAN_CLKREQ# 15P_0402_50V8J
D PCIECLKRQ1/GPIO19 C35 R92 1 2 10K_0402_5% 2 2 D
CLK_PCIE_WLAN# C41 CLOCK TESTLOW_C35 C34 R93 1 2 10K_0402_5% 15P_0402_50V8J
<28> CLK_PCIE_WLAN# CLK_PCIE_WLAN B42 CLKOUT_PCIE_N2 TESTLOW_C34 AK8 1 2
R100 10K_0402_5%
<28> CLK_PCIE_WLAN AD1 CLKOUT_PCIE_P2 SIGNALS TESTLOW_AK8 AL8 1 2
WLAN <28> WLAN_CLKREQ# R95 10K_0402_5%
PCIECLKRQ2/GPIO20 TESTLOW_AL8
B38 AN15 CLKOUT_LPC0 R96 2 1 22_0402_5%
C37 CLKOUT_PCIE_N3 CLKOUT_LPC_0 AP15 CK_LPC_KBC <25>
PCH_GPIO21 N1 CLKOUT_PCIE_P3 CLKOUT_LPC_1
PCIECLKRQ3/GPIO21 B35 CLK_BCLK_ITP# @ T21
CLK_PEG_VGA# A39 CLKOUT_ITPXDP_N A35 CLK_BCLK_ITP @ T26
<16> CLK_PEG_VGA# CLKOUT_PCIE_N4 CLKOUT_ITPXDP_P 1
CLK_PEG_VGA B39
<16> CLK_PEG_VGA 1 2 VGA_CLKREQ#_R U5 CLKOUT_PCIE_P4 SMT
dGPU C5207 @
<17> VGA_CLKREQ#
R184 @ 0_0402_5%
B37
PCIECLKRQ4/GPIO22
RF 2
68P_0402_50V8J
A37 CLKOUT_PCIE_N5 6 OF 19
PCH_GPIO23 T2 CLKOUT_PCIE_P5
<9> PCH_GPIO23 PCIECLKRQ5/GPIO23
+3VS Rev1p2 SMBus :SPD/PCIe/Security/TP

FootPrint :DMN66D0LDW-7_SOT363-6
+3VS
1
RP3 +3VS
R101
10K_0402_5% 1 8
2 7 R132 2.2K_0402_5%
UMA@
2
3 6 @ 1 2
+3VS
2
4 5
VGA_CLKREQ#_R SMBDATA 6 1
PCH_SMB_DATA <15,28,31>
10K_8P4R_5%
2
2N7002KDWH_SOT363-6
R1443 Q3A
10K_0402_5% R133 2.2K_0402_5%
5
C U1G HASWELL_MCP_E 1 2 C
PX@ @ +3VS
1
LPC_AD0 AU14 AN2 SMBCLK 3 4

<25> LPC_AD0 AW12 LAD0 SMBALERT/GPIO11 AP2 PCH_GPIO11 <9> PCH_SMB_CLK <15,28,31>
LPC_AD1 SMBCLK
<25> LPC_AD1 LPC_AD2 AY12 LAD1 LPC SMBCLK AH1 SMBDATA Q3B 2N7002KDWH_SOT363-6
<25> LPC_AD2 LPC_AD3 AW11 LAD2 SMBDATA AL2 PCH_GPIO60
<25> LPC_AD3 AV12 LAD3 SMBUS SML0ALERT/GPIO60 AN1 PCH_GPIO60 <9>
LPC_FRAME# SML0CLK V0.2
<25> LPC_FRAME# LFRAME SML0CLK AK1 1 2
SML0DATA SMBDATA @ PCH_SMB_DATA
SML0DATA AU4 PCH_GPIO73 R157 0_0402_5%
EMI EMI@
SML1ALERT/PCHHOT/GPIO73
SML1CLK/GPIO75
AU3
AH3
SML1CLK
SML1DATA
PCH_GPIO73 <9> SMBCLK 1
R158
@ 2 PCH_SMB_CLK
0_0402_5%
PCH_SPI_CLK_R0 R106 1 2 PCH_SPI_CLK AA3 SML1DATA/GPIO74
15_0402_5% PCH_SPI_CS0# Y7 SPI_CLK AF2 @ T18
Y4 SPI_CS0 CL_CLK AD2 @ T19
PCH_SPI_MOSI
AC2
AA2
SPI_CS1
SPI_CS2
SPI C-LINK CL_DATA
CL_RST
AF4 @ T20 SML1 Bus :EC/Sensors
FootPrint :DMN66D0LDW-7_SOT363-6
1 SPI_MOSI
C5206 1K_0402_1% PCH_SPI_MISO AA4
68P_0402_50V8J R127 1 2 PCH_SPI_WP# Y6 SPI_MISO +3VS
RF 2
@
R128 1 2 PCH_SPI_HOLD#
AF1 SPI_IO2
SPI_IO3
+3VALW_PCH
2
1K_0402_1% @ PU 2.2K at EC side (+3VS)
Rev1p2 SML1CLK 6 1
EC_SMB_CK2 <17,25,29,31>
7 OF 19 2N7002KDWH_SOT363-6
Q2417A
5
@
CHKLIST1.0 SML1DATA 3 4 EC_SMB_DA2 <17,25,29,31>
B
2 SPI Device = 33 ohm B
Q2417B 2N7002KDWH_SOT363-6
1 SPI Device = 15 ohm
RP4
PCH_SPI_MOSI_0 1 8 PCH_SPI_MOSI SML1CLK 1 @ 2 EC_SMB_CK2
PCH_SPI_WP0# 2 7 PCH_SPI_WP# R160 0_0402_5%
3 6 SML1DATA 1 @ 2 EC_SMB_DA2
PCH_SPI_HOLD0# 4 5 PCH_SPI_HOLD# R161 0_0402_5%
15_8P4R_5% V0.2
SPI1 ROM ( 8MByte )

@
RP13
SMBCLK 1 8
+3VALW_PCH
SMBDATA 2 7
+3VALW_PCH SML1DATA 3 6
SML1CLK 4 5
U10 2.2K_0804_8P4R_5%
PCH_SPI_CS0# 1 8 SML0CLK R122 1 2 2.2K_0402_5%
PCH_SPI_MISO R108 1 2 PCH_SPI_MISO_0 2 CS# VCC 7 PCH_SPI_HOLD0# SML0DATA R123 1 2 2.2K_0402_5%
DO(IO1) HOLD#(IO3) 1
PCH_SPI_WP0# 3 6 PCH_SPI_CLK_R0 C8
15_0402_5% 4 WP#(IO2) CLK 5 PCH_SPI_MOSI_0 0.1U_0402_16V4Z
GND DI(IO0)
W25Q64FVSSIQ_SO8 2
RA39 2 @ 1
SPI ROM 8MB 33_0402_5%
CA80
1st: SA000039A30 - Winbond 22P_0402_50V8J
@
A A
<25> PCH_SPI_MISO
PCH_SPI_MISO
PCH_SPI_MOSI_0
EMI
<25> PCH_SPI_MOSI_0 PCH_SPI_CLK_R0
<25> PCH_SPI_CLK_R0
PCH_SPI_CS0#
<25> PCH_SPI_CS0#

2011/12/13 2012/12/13 Title
Issued Date Deciphered Date HSW MCP(4/11) CLK,SPI,SMBUS
LA-A321PR02
5 4 3 2 1
5 4 3 2 1
Note: SUSACK# and SUSWARN# can be tied together if

EC does not want to involve in the handshake mechanism
* LH：
DPWROK: Tired toghter with RSMRST# DSWODVREN - On Die DSW VR Enable
：Enable(DEFAULT)
for the Deep Sleep state entry and exit
that do not support Deep Sx
Disable
CAN be NC ,if not support Deep Sx +RTCVCC
U1H HASWELL_MCP_E
T117 R134 1 2 330K_0402_5%

@ R139 1 @ 2 330K_0402_5%
PCH_PWROK 1 @ 2 APWROK_R SYSTEM POWER MANAGEMENT
D R146 0_0402_5% R135 1 @ 2 0_0402_5% SUSACK#_R AK2 AW7 DSWODVREN D
<9> PCH_GPIO30 SUSACK DSWVRMEN
SYS_RESET# AC3 AV5 DPWROK R148 1 @ 2 0_0402_5% EC_RSMRST#
<9> SYS_RESET# SYS_RESET DPWROK
V0.2 SYS_PWROK AG2 AJ5 PCH_PCIE_WAKE#
<25> SYS_PWROK SYS_PWROK WAKE PCH_PCIE_WAKE# <28,9>
PCH_PWROK AY7
<25> PCH_PWROK PCH_PWROK
ESD@ APWROK_R AB5
C2223 2 1 100P_0402_50V8J PLT_RST# AG7 APWROK V5 PCH_GPIO32
ESD 1 2
PLTRST CLKRUN/GPIO32
SUS_STAT/GPIO61
AG4
AE6 SUSCLK
PCH_GPIO32 <9>
PCH_GPIO61 <9>
SUSCLK/GPIO62 AP5 PM_SLP_S5# SUSCLK <25>
R149 10K_0402_5%
AW6 SLP_S5/GPIO63 PM_SLP_S5# <25>
<25> EC_RSMRST# EC_RSMRST# T114
+3VALW_PCH PCH_GPIO30 AV4 RSMRST @ T115 T116
PBTN_OUT# AL7 SUSWARN/SUSPWRDNACK/GPIO30 AJ6 PM_SLP_S4# @ @
<25> PBTN_OUT# PWRBTN SLP_S4 PM_SLP_S4# <25>
AC_PRESENT_R AJ8 AT4 PM_SLP_S3#
ACPRESENT/GPIO31 SLP_S3 PM_SLP_S3# <25>
1
PCH_GPIO72 AN4 AL5 PM_SLP_A# @ T120
<9> PCH_GPIO72 BATLOW/GPIO72 SLP_A
R643 AF3 AP4 @ T110
200K_0402_5% PCH_GPIO29 AM5 SLP_S0 SLP_SUS AJ7 @ T112
<9> PCH_GPIO29 SLP_WLAN/GPIO29 SLP_LAN
T109@
D2
2
1 2 AC_PRESENT_R
<17,25,33,35> ACIN
PCH_BATLOW# Need pull high to VCCDSW3_3 Rev1p2
RB751V-40_SOD323-2 BIOS (If no deep Sx , connect to VCCSUS3_3)
8 OF 19
U1I HASWELL_MCP_E
C C
+3VS
0_0402_5%
R150 1 2 EDP_BKCTL B8 B9 @
<29,4> INVPWM A9 EDP_BKLCTL DDPB_CTRLCLK C9 DDI1_CTRL_DATA DDI1_CTRL_DATA 1 2
<25> PCH_ENBKL C6 EDP_BKLEN eDP SIDEBAND DDPB_CTRLDATA D9 DDI2_CTRL_CK R310 2.2K_0402_5%
<29> PCH_ENVDD EDP_VDDEN DDPC_CTRLCLK D11 DDI2_CTRL_DATA DDI2_CTRL_CK <30>
DDPC_CTRLDATA DDI2_CTRL_DATA <30>
U6
<28,9> WLBT_OFF_5# P4 PIRQA/GPIO77 C5
<18,25,40,41> DGPU_PWR_EN N4 PIRQB/GPIO78 DISPLAY DDPB_AUXN B6 DDPB_CTRLDATA: Port B Detected
<16> DGPU_HOLD_RST# N2 PIRQC/GPIO79 DDPC_AUXN B5 DDPC_CTRLDATA: Port C Detected
<28,9> WLBT_OFF_51# AD4 PIRQD/GPIO80 DDPB_AUXP A6
T27 @
PME DDPC_AUXP
GPIO * 1: Port B or C is detected
TS_ON U7 0: Port B or C is not detected
<29,9> TS_ON L1 GPIO55
<9> PCH_GPIO52 PCH_GPIO52 (Have internal PD)
PCH_GPIO54 L3 GPIO52 C8
<9> PCH_GPIO54 GPIO54 DDPB_HPD
R5 A8
<9> PCH_GPIO51 GPIO51 DDPC_HPD DDI2_HDMI_HPD <30>
PCH_GPIO53 L4 D6
<9> PCH_GPIO53 GPIO53 EDP_HPD EDP_HPD <29>
9 OF 19 Rev1p2
B B
R155 2 @ 1 0_0402_5%
V0.2
+3VS
5
U5
PLT_RST# 2
P
B 4
1 Y PLT_RST_BUF# <16,24,25,28>
A
1
R159
3
100K_0402_5%
U74AHC1G08G-AL5-R_SOT353-5
A A

2011/12/13 2012/12/13 Title
Issued Date Deciphered Date HSW MCP(5/11) PM,GPIO,DDI
LA-A321PR02
5 4 3 2 1
5 4 3 2 1
+1.05VS_VTT
1
U1J HASWELL_MCP_E
R179
1K_0402_1%
2
PCH_GPIO76 P1 D60 H_THERMTRIP#
D PCH_GPIO8 AU2 BMBUSY/GPIO76 THERMTRIP V4 D
PCH_GPIO12 AM7 GPIO8 RCIN/GPIO82 T4 SERIRQ KB_RST# <25>
@ SERIRQ <25>
1 R295 2 PCH_GPIO15 AD6 LAN_PHY_PWR_CTRL/GPIO12 CPU/ SERIRQ AW15 PCH_OPIRCOMP 1 2
<25> EC_LID_OUT# Y1 GPIO15 MISC PCH_OPI_RCOMP AF20
PCH_GPIO16 R185
0_0402_5% DGPU_PWROK T3 GPIO16 RSVD AB21 49.9_0402_1%
<41> DGPU_PWROK AD5 GPIO17 RSVD
PCH_GPIO24
PCH_GPIO27 AN5 GPIO24
<24> PCH_GPIO27 PCH_GPIO28 AD7 GPIO27
PCH_GPIO26 AN3 GPIO28
GPIO26 R6 PCH_GPIO83
PCH_GPIO56 AG6 GSPI0_CS/GPIO83 L6 V0.2
+3VS PCH_GPIO57 AP1 GPIO56 GSPI0_CLK/GPIO84 N6
PCH_GPIO58 AL4 GPIO57 GSPI0_MISO/GPIO85 L8 PCH_GPIO86 ESD
PCH_GPIO59 AT5 GPIO58 GSPI0_MOSI/GPIO86 R7 DGPU_PRSNT# ESD@
PCH_GPIO44 AK4 GPIO59 GSPI1_CS/GPIO87 L5 H_THERMTRIP# C1313 1 2 100P_0402_50V8J
1 8 PCH_GPIO39 PCH_GPIO47 AB6 GPIO44 GPIO GSPI1_CLK/GPIO88 N7
2 7 PCH_GPIO48 U4 GPIO47 GSPI1_MISO/GPIO89 K2
PCH_GPIO51 <8> GPIO48 GSPI_MOSI/GPIO90
3 6 PCH_GPIO83 PCH_GPIO49 Y3 J1
4 5 P3 GPIO49 UART0_RXD/GPIO91 K3
PCH_GPIO32 <8> GPIO50 UART0_TXD/GPIO92
PCH_GPIO71 Y2 J2
RP21 10K_8P4R_5% PCH_GPIO13 AT3 HSIOPC/GPIO71 10 OF 19 LPIO UART0_RTS/GPIO93 G1
PCH_GPIO14 AH4 GPIO13 UART0_CTS/GPIO94 K4
1 8 PCH_GPIO25 AM4 GPIO14 UART1_RXD/GPIO0 G2
WLBT_OFF_51# <28,8> GPIO25 UART1_TXD/GPIO1
2 7 PCH_GPIO76 PCH_GPIO45 AG5 J3
3 6 PCH_GPIO46 AG3 GPIO45 UART1_RST/GPIO2 J4
PCH_GPIO23 <7> GPIO46 UART1_CTS/GPIO3
4 5 F2
V0.2 PCH_GPIO9 AM3 I2C0_SDA/GPIO4 F3
RP22 10K_8P4R_5% EC_SCI# AM2 GPIO9 I2C0_SCL/GPIO5 G4 PCH_GPIO6
<25> EC_SCI# P2 GPIO10 I2C1_SDA/GPIO6 F1
PCH_GPIO33 PCH_GPIO7
C4 DEVSLP0/GPIO33 I2C1_SCL/GPIO7 E3
1 8 PCH_GPIO38 L2 SDIO_POWER_EN/GPIO70 SDIO_CLK/GPIO64 F4 PCH_GPIO65
PCH_GPIO53 <8> DEVSLP1/GPIO38 SDIO_CMD/GPIO65
2 7 PCH_GPIO39 N5 D3 PCH_GPIO66
C PCH_GPIO36 <6> DEVSLP2/GPIO39 SDIO_D0/GPIO66 C
3 6 PCH_GPIO71 SPKR V2 E4 PCH_GPIO67
4 5 <23> SPKR SPKR/GPIO81 SDIO_D1/GPIO67 C3
PCH_GPIO35 <6> SDIO_D2/GPIO68 E2
RP23 10K_8P4R_5% SDIO_D3/GPIO69
Rev1p2
1 8
PCH_GPIO18 <7>
2 7 PCH_GPIO48
3 6 PCH_GPIO16
4 5 PCH_GPIO49
RP24 10K_8P4R_5%
1 8
TS_ON <29,8>
2 7 Need confirm PU value when support I2C TS.
WLBT_OFF_5# <28,8>
3 6 SERIRQ +3VS
4 5 PCH_GPIO67
RP25 10K_8P4R_5% +3VALW_PCH

1 2 PCH_GPIO6 +3VS
1 8 PCH_GPIO33 R114 10K_0402_5%
2 7 1 8 PCH_GPIO28
PCH_GPIO52 <8>
3 6 2 7 PCH_GPIO26 1 2 PCH_GPIO7
PCH_SATALED# <6>
4 5 KB_RST# 3 6 R115 10K_0402_5% PCH_GPIO86 R710 1 @ 2 1K_0402_1%
PCH_GPIO61 <8>
4 5 PCH_GPIO45 R711 1 2 1K_0402_1%
RP26 10K_8P4R_5% 1 2 PCH_GPIO65
RP37 10K_8P4R_5% R116 10K_0402_5%
R105 1 @ 2 10K_0402_5%
PCH_GPIO54 <8> R98 1 2 10K_0402_5% GSPI0_MOSI / GPIO86 : Boot BIOS Strap
V0.2 PCH_GPIO11 <7>
B
1: LPC BUS B
0: SPI BUS (Have internal PD)

VRAM ( X76 BOM )
1GHz -> stuff
*
+3VS
900 Hz -> un-stuff
+3VALW_PCH PCH_GPIO66 R189 1 @ 2 1K_0402_1%
+3VALW_PCH +3VS +3VALW_PCH 1 2 PCH_GPIO38

1 8 R193 @ 10K_0402_5%
PCH_GPIO30 <8>
2 7 SDIO_D0 / GPIO66 : Top-Block Swap Override
PCH_GPIO43 <10>
3 6
PCH_GPIO73 <7>
4 5 PCH_GPIO59
1: DISABLED
RP29 10K_8P4R_5% 1 8
PCH_GPIO29 <8>
2 7 0: ENABLED (Have internal PD)
1 8 PCH_GPIO46 3 6
PCH_GPIO37 <6>
SYS_RESET# <8> +3VS 1 UMA *
2 7 EC_SCI# 4 5 PCH_GPIO24
3 6
PCH_GPIO42 <10>
0 DIS
2
4 5 PCH_GPIO14 RP33 10K_8P4R_5% +3VALW_PCH
R707
RP32 10K_8P4R_5% 1 8 10K_0402_5% R712 1 @ 2 PCH_GPIO15
PCH_GPIO72 <8>
2 7 PCH_GPIO27 1K_0402_1%
UMA@
1 8 PCH_GPIO57 3 6 PCH_GPIO25
1
2 7 4 5 PCH_GPIO12 DGPU_PRSNT# GPIO15 : TLS Confidentiality
PCH_GPIO41 <10>
3 6 PCH_GPIO13
2
4 5 PCH_GPIO8 RP15 10K_8P4R_5%
R708 1: Intel ME TLS with confidentiality
RP27 10K_8P4R_5% 1 8 PCH_GPIO56 10K_0402_5%
2 7 PCH_GPIO58 0: Intel ME TLS with no confidentiality
1 8
USB_OC0# <10,26,28>
3 6 PCH_GPIO44
PX@
*
1
2 7 4 5 (Have internal PD)
A PCH_GPIO60 <7> PCH_PCIE_WAKE# <28,8> A
3 6 PCH_GPIO9
4 5 PCH_GPIO47 RP31 10K_8P4R_5%
RP30 10K_8P4R_5%

2011/12/13 2012/12/13 Title
Issued Date Deciphered Date HSW MCP(6/11) GPIO,LPIO
LA-A321PR02
5 4 3 2 1
5 4 3 2 1
D D
U1K HASWELL_MCP_E
<16> PCIE_CRX_GTX_N0 PCIE_CRX_GTX_N0 F10 AN8 USB20_N0

E10 PERN5_L0 USB2N0 AM8 USB20_N0 <26>
<16> PCIE_CRX_GTX_P0 PCIE_CRX_GTX_P0 USB20_P0 USB2 IO (Sub Board)
PERP5_L0 USB2P0 USB20_P0 <26>
CC250 1 PX@2 0.1U_0402_16V7K PCIE_PTX_DRX_N5_L0 C23 AR7 USB20_N1
<16> PCIE_CTX_GRX_N0 CC243 1 PX@2 0.1U_0402_16V7K PCIE_PTX_DRX_P5_L0 C22 PETN5_L0 USB2N1 AT7 USB20_N1 <28>
<16> PCIE_CTX_GRX_P0 USB20_P1 USB2/3 IO (Main Board)
PETP5_L0 USB2P1 USB20_P1 <28>
PCIE_CRX_GTX_N1 F8 AR8 USB20_N2
<16> PCIE_CRX_GTX_N1 PCIE_CRX_GTX_P1 E8 PERN5_L1 USB2N2 AP8 USB20_P2 USB20_N2 <26>
<16> PCIE_CRX_GTX_P1 PERP5_L1 USB2P2 USB20_P2 <26> USB2 IO (Sub Board)
CC245 1 PX@2 0.1U_0402_16V7K PCIE_PTX_DRX_N5_L1 B23 AR10 USB20_N3
<16> PCIE_CTX_GRX_N1 CC247 1 PX@2 0.1U_0402_16V7K PCIE_PTX_DRX_P5_L1 A23 PETN5_L1 USB2N3 AT10 USB20_P3 USB20_N3 <26>
dGPU <16> PCIE_CTX_GRX_P1 PETP5_L1 USB2P3 USB20_P3 <26> Card Reader
PCIE_CRX_GTX_N2 H10 AM15 USB20_N4
<16> PCIE_CRX_GTX_N2 PCIE_CRX_GTX_P2 G10 PERN5_L2 USB2N4 AL15 USB20_P4 USB20_N4 <29>
<16> PCIE_CRX_GTX_P2 PERP5_L2 USB2P4 USB20_P4 <29> Touch Screen
CC249 1 PX@2 0.1U_0402_16V7K PCIE_PTX_DRX_N5_L2 B21 AM13 USB20_N5
<16> PCIE_CTX_GRX_N2 CC244 1 PX@2 0.1U_0402_16V7K PCIE_PTX_DRX_P5_L2 C21 PETN5_L2 USB2N5 AN13 USB20_P5 USB20_N5 <29>
<16> PCIE_CTX_GRX_P2 PETP5_L2 USB2P5 USB20_P5 <29> Camera
C PCIE_CRX_GTX_N3 E6 AP11 USB20_N6 C
<16> PCIE_CRX_GTX_N3 PCIE_CRX_GTX_P3 F6 PERN5_L3 USB2N6 AN11 USB20_P6 USB20_N6 <28>
<16> PCIE_CRX_GTX_P3 PERP5_L3 USB2P6 USB20_P6 <28> Mini Card(WLAN+BT)
CC246 1 PX@2 0.1U_0402_16V7K PCIE_PTX_DRX_N5_L3 B22 AR13
<16> PCIE_CTX_GRX_N3 CC248 1 PX@2 0.1U_0402_16V7K PCIE_PTX_DRX_P5_L3 A21 PETN5_L3 USB2N7 AP13
<16> PCIE_CTX_GRX_P3 PETP5_L3 11 OF 19 USB2P7
PCIE_PRX_DTX_N3 G11
<28> PCIE_PRX_DTX_N3 PERN3
PCIE_PRX_DTX_P3 F11 G20
<28> PCIE_PRX_DTX_P3 PERP3 USB3RN1 H20
C29 1 2 0.1U_0402_16V7K PCIE_PTX_DRX_N3 C29 USB3.0 P1 USB3RP1
WLAN <28> PCIE_PTX_C_DRX_N3
C30 1 2 0.1U_0402_16V7K PCIE_PTX_DRX_P3 B30 PETN3 PCIe USB C33
<28> PCIE_PTX_C_DRX_P3 PETP3 USB3TN1 B34
F13 USB3TP1
G13 PERN4 E18
PERP4 USB3RN2 USB3_RX2_N <28>
F18
USB3RP2 USB3_RX2_P <28>
B29 USB3.0 P2
USB2/3 (Main Board)
A29 PETN4 B33
PETP4 USB3TN2 A33 USB3_TX2_N <28>
G17 USB3TP2 USB3_TX2_P <28>
F17 PERN1/USB3RN3
PERP1/USB3RP3
C30 USB3.0 P3 / PCIE P1
C31 PETN1/USB3TN3 AJ10 USBRBIAS R233 1 2 22.6_0402_1%
PETP1/USB3TP3 USBRBIAS CAD note:
AJ11
PCIE_PRX_DTX_N2 F15 USBRBIAS AN10 Route single-end 50-ohms and max 450-mils length.
<24> PCIE_PRX_DTX_N2 PERN2/USB3RN4 RSVD Avoid routing next to clock pins or under stitching capacitors.
PCIE_PRX_DTX_P2 G15 AM10
<24> PCIE_PRX_DTX_P2 PERP2/USB3RP4 RSVD
USB3.0 P4 / PCIE P2 Recommended minimum spacing to other signal traces is 15 mils
LAN C856 1 2 0.1U_0402_16V7K PCIE_PTX_DRX_N2 B31
<24> PCIE_PTX_C_DRX_N2 PETN2/USB3TN4
C857 1 2 0.1U_0402_16V7K PCIE_PTX_DRX_P2 A31
<24> PCIE_PTX_C_DRX_P2 PETP2/USB3TP4 AL3 USB_OC0#
OC0/GPIO40 AT1 PCH_GPIO41 USB_OC0# <26,28,9>
+1.05VS_AUSB3PLL OC1/GPIO41 AH2 PCH_GPIO42 PCH_GPIO41 <9>
B E15 OC2/GPIO42 AV3 PCH_GPIO42 <9> B
PCH_GPIO43
E13 RSVD OC3/GPIO43 PCH_GPIO43 <9>
R235 1 2 3.01K_0402_1% PCIE_RCOMP A27 RSVD
B27 PCIE_RCOMP
PCIE_IREF
Rev1p2
A A

2011/12/13 2012/12/13 Title
Issued Date Deciphered Date HSW MCP(7/11) PCIE,USB
LA-A321PR02
5 4 3 2 1
5 4 3 2 1
+CPU_CORE
U1L HASWELL_MCP_E
L59 C36
+1.35V J58 RSVD VCC C40
RSVD VCC C44
AH26 VCC C48
AJ31 VDDQ VCC C52
AJ33 VDDQ VCC C56
AJ37 VDDQ VCC E23
AN33 VDDQ VCC E25
AP43 VDDQ VCC E27
AR48 VDDQ VCC E29
AY35 VDDQ VCC E31
D +1.05VS_VTT AY40 VDDQ VCC E33 D
AY44 VDDQ VCC E35
+CPU_CORE AY50 VDDQ VCC E37
VDDQ VCC
1
E39
R286 F59 VCC E41
T87 N58 VCC VCC E43
10K_0402_5% RSVD VCC
@ AC58 E45
RSVD VCC E47
2
VCCSENSE E63 VCC E49
VCCST_PG_EC T38 @ AB23 VCC_SENSE VCC E51
<25> VCCST_PG_EC RSVD VCC
+VCCIO_OUT_R A59 E53
E20 VCCIO_OUT VCC E55
+VCCIOA_OUT VCCIOA_OUT VCC
Define EC OD pin, need double confirm. AD23 E57
AA23 RSVD 12 OF 19 VCC F24
AE59 RSVD VCC F28
RSVD VCC F32
H_CPU_SVIDALRT# L62 VCC F36
V0.2 VR_SVID_CLK N63 VIDALERT VCC F40
<42> VR_SVID_CLK L63 VIDSCLK VCC F44
H_CPU_SVIDDATA
ESD VCCST_PG_EC B59 VIDSOUT HSW ULT POWER VCC F48
F60 VCCST_PWRGD VCC F52
1 2 100P_0402_50V8J <42> VR_ON C59 VR_EN VCC F56
C1314 <42> VGATE VR_READY VCC G23
D63 VCC G25
ESD@ VSS VCC
CPU_PWR_DEBUG H59 G27
P62 PWR_DEBUG VCC G29
T39 @ P60 VSS VCC G31
T40 @ P61 RSVD_TP VCC G33
RF T41
T42
@
@
N59
N61
RSVD_TP
RSVD_TP
VCC
VCC
G35
G37
VR_SVID_CLK T43 @ T59 RSVD_TP VCC G39
T44 @ AD60 RSVD VCC G41
C T45 @ AD59 RSVD VCC G43 C
1 RSVD VCC
T46 @ AA59 G45
C5212 @ T47 @ AE60 RSVD VCC G47
68P_0402_50V8J T48 @ AC59 RSVD VCC G49
2 T49 @ AG58 RSVD VCC G51
SVID ALERT +1.05VS_VTT T50 @ U59 RSVD
RSVD
VCC
VCC
G53
T51 @ V59 G55
RSVD VCC G57
+1.05VS_VTT AC22 VCC H23
AE22 VCCST VCC J23
Place the PU +CPU_CORE
VCCST VCC
AE23 K23
resistors close to CPU VCCST VCC
1
K57
R252 AB57 VCC L22
75_0402_5% AD57 VCC VCC M23
AG57 VCC VCC M57
R254 C24 VCC VCC P57
2
43_0402_1% +1.05VS_VTT C28 VCC VCC U57

2 1 H_CPU_SVIDALRT# C32 VCC VCC W57
<42> VR_SVID_ALRT# R253: CPU_PWR_DEBUG VCC VCC
CRB mount Rev1p2
2
Check list ,XDP use only

R253 V0.2 V0.2
@
SVID DATA 150_0402_1%
ESD +1.05VS_VTT ESD +CPU_CORE
+1.35V
1
+1.05VS_VTT
Place the PU CPU_PWR_DEBUG VDDQ DECOUPLING
resistors close to CPU BOT TOP
1
1 1 1 1
R256 R255 @ @ C91 @ C84 C77 C79
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
110_0402_5% 10K_0402_5%
C35
C36
C37
C38
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
B B
1 1 1 1 1 1 1 1 1 1 2 2 2 2
2
C39
C40
C41
C42
C43
C45
R257
2 1 H_CPU_SVIDDATA
<42> VR_SVID_DAT 2 2 2 2 2 2 2 2 2 2
@ 0_0402_5%
R256:
CRB r0.7 changed from 130 Ohms to
110 Ohms CRB: ESD@ ESD@
+1.35V : 470UF/2V/7343 *2 (Un-mount)
10UF/6.3V/0603 * 6 V0.2
2.2UF/6.3V/0402 * 4 ESD
+CPU_CORE +CPU_CORE +1.05VS_VTT
@
C80 1 2 22U_0603_6.3V6M
1
@
R12 C83 1 2 22U_0603_6.3V6M
100_0402_1%
2
VCCSENSE
CAD Note: PU resistor should be close to CPU
<42> VCCSENSE V0.2 ESD
+3VS
+1.05VS_VTT
@
C119 1 2 22U_0603_6.3V6M
VSSSENSE
A <13,42> VSSSENSE CAD Note: PD resistor should be close to CPU @ A
C118 1 2 22U_0603_6.3V6M
1
R13
100_0402_1%
2

2011/12/13 2012/12/13 Title
Issued Date Deciphered Date HSW MCP(8/11) Power
LA-A321PR02
5 4 3 2 1
5 4 3 2 1
D D
Close to N8
Check Power Source C53 @1
@ 2 1U_0402_6.3V6K
+1.05VS_VTT
+1.05VS_VTT +1.05VS_AUSB3PLL
L11 2 C58 1 2 1U_0402_6.3V6K 18mA

C59 1 2 100U_1206_6.3V6M
2.2UH_LQM2MPN2R2NG0L_30%
U1M HASWELL_MCP_E
+1.05VS_ASATA3PLL K9
+1.05VS_VTT VCCHSIO
L10
VCCHSIO +3VALW_PCH
M9
L21 2 C63 1 2 1U_0402_6.3V6K N8 VCCHSIO mPHY AH11 C51 1 2 1U_0402_6.3V6K
+1.05VS_VTT VCC1_05 RTC VCCSUS3_3
C65 1 2 100U_1206_6.3V6M P9 AG10
VCC1_05 VCCRTC +RTCVCC +3VALW_PCH
2.2UH_LQM2MPN2R2NG0L_30% B18 AE7
+1.05VS_AUSB3PLL VCCUSB3PLL DCPRTC
B11 +VCCRTCEXT C52 1 2 0.1U_0402_16V4Z Share ROM
+1.05VS_APLLOPI +1.05VS_ASATA3PLL VCCSATA3PLL
Y20 SPI Y8 C57 1 2 0.1U_0402_16V4Z

C69 1 2 1U_0402_6.3V6K AA21 RSVD OPI VCCSPI @ +1.05VS_VTT
+1.05VS_APLLOPI VCCAPLL
L31 2 C70 @1
@ 2 100U_1206_6.3V6M W21
C 2.2UH_LQM2MPN2R2NG0L_30% VCCAPLL AG14 C
VCCASW AG13
+1.05VS_AXCK_DCB VCCASW
USB3
+1.05VS_VTT
T91 @ J13
DCPSUS3 J11 1 2 10U_0603_6.3V6M
VCC1_05
C60 658mA
C116 1 2 1U_0402_6.3V6K H11 C61 1 2 1U_0402_6.3V6K
L4 1 2 C117 1 2 100U_1206_6.3V6M AH14 AXALIA/HDA VCC1_05 H15 C62 1 2 1U_0402_6.3V6K
+3VALW_PCH VCCHDA VCC1_05
2.2UH_LQM2MPN2R2NG0L_30% AE8 C64
VCC1_05 AF22 1U_0402_6.3V6K +1.05VS_VTT
T94 @ AH13 VRM/USB2/AZALIA VCC1_05 AG19 +PCH_VCCDSW 1 2
+1.05VS_AXCK_LCPLL DCPSUS2 CORE DCPSUSBYP AG20
DCPSUSBYP AE9
C85 1 2 1U_0402_6.3V6K 13 OF 19 VCCASW AF9 C66 1@ 2 22U_0603_6.3V6M
L5 1 2 C86 1 2 100U_1206_6.3V6M AC9 VCCASW AG8 C67 1 2 1U_0402_6.3V6K
+3VALW_PCH VCCSUS3_3 VCCASW
2.2UH_LQM2MPN2R2NG0L_30% AA9 AD10
AH10 VCCSUS3_3 DCPSUS1 AD8 T95 @
V8 VCCDSW3_3 GPIO/LCC DCPSUS1 T90 @
+3VS VCC3_3
W9
VCC3_3 J15 +RTCVCC
VCCTS1_5 +1.5VS
THERMAL SENSOR K14
VCC3_3 +3VS
K16 C71 1 2 0.1U_0402_16V4Z
VCC3_3
1U_0402_6.3V6K
J18 1
+1.05VS_AXCK_DCB VCCCLK
K19 SDIO/PLSS U8
VCCCLK VCCSDIO +3VS
C54
A20 T9 C73 1 2 1U_0402_6.3V6K
+1.05VS_AXCK_LCPLL VCCACLKPLL VCCSDIO
J17
+1.05VS_VTT VCCCLK 2
R21
+1.05VS_VTT VCCCLK LPT LP POWER
T21
K18 VCCCLK SUS OSCILLATOR AB8
M20 RSVD DCPSUS4
V21 RSVD T89 @
B AE20 RSVD AC20 B
+3VALW_PCH VCCSUS3_3 RSVD
AE21 AG16
Close to K9,M9 VCCSUS3_3 USB2 VCC1_05 AG17
+1.05VS_VTT
C49 1 2 1U_0402_6.3V6K VCC1_05 C76 1 2 1U_0402_6.3V6K
C50 1 2 1U_0402_6.3V6K
+1.05VS_VTT
Rev1p2
Close to AH10
C81 1 2 1U_0402_6.3V6K
+3VALW_PCH
@
Close to AC9/AA9/AE20/AE21
C78 1 2 22U_0603_6.3V6M
+3VALW_PCH
Close to V8
C82 1 2 22U_0603_6.3V6M
+3VS
Close to J17
C87 1 2 1U_0402_6.3V6K
+1.05VS_VTT
Close to R21
A C88 1 2 1U_0402_6.3V6K A
+1.05VS_VTT
Close to AH14
C75 2 1 1U_0402_6.3V4Z
+3VALW_PCH

2011/12/13 2012/12/13 Title
Issued Date Deciphered Date HSW MCP(9/11) Power
LA-A321PR02
5 4 3 2 1
5 4 3 2 1
D D
U1N HASWELL_MCP_E U1O HASWELL_MCP_E U1P HASWELL_MCP_E

H17
A11 AJ35 AP22 AV59 D33 VSS H57
A14 VSS VSS AJ39 AP23 VSS VSS AV8 D34 VSS VSS J10
A18 VSS VSS AJ41 AP26 VSS VSS AW16 D35 VSS VSS J22
A32 VSS VSS AJ47 AP31 VSS VSS AW35 D39 VSS VSS K1
A36 VSS VSS AJ50 AP38 VSS VSS AW37 D41 VSS VSS K12
A40 VSS VSS AJ52 AP39 VSS VSS AW4 D42 VSS VSS L13
AA1 VSS VSS AJ63 AR11 VSS VSS AW50 D49 VSS VSS L58
AA58 VSS VSS AK23 AR15 VSS VSS AW51 D5 VSS VSS L61
AB10 VSS VSS AK3 AR17 VSS VSS AW59 D50 VSS VSS L7
AB20 VSS VSS AK52 AR23 VSS VSS AW60 D51 VSS VSS M22
AB22 VSS VSS AL10 AR31 VSS VSS AY11 D53 VSS VSS N10
AB7 VSS VSS AL13 AR33 VSS VSS AY16 D54 VSS VSS N3
C AC61 VSS VSS AL17 AR39 VSS VSS AY18 D55 VSS VSS P59 C
AD21 VSS VSS AL20 AR43 VSS VSS AY22 D57 VSS VSS P63
AD3 VSS VSS AL22 AR49 VSS VSS AY24 D59 VSS VSS R10
AD63 VSS VSS AL23 AR5 VSS VSS AY26 D62 VSS VSS R22
AE10 VSS VSS AL26 AR52 VSS VSS AY30 D8 VSS VSS R8
AE5 VSS VSS AL29 AT13 VSS VSS AY33 E11 VSS 16 OF 19 VSS T1
AE58 VSS 14 OF 19 VSS AL31 AT35 VSS 15 OF 19 VSS AY4 E17 VSS VSS T58
AF11 VSS VSS AL33 AT37 VSS VSS AY51 F20 VSS VSS U20
AF17 VSS VSS AL45 AT46 VSS VSS AY6 F38 VSS VSS V10
AF18 VSS VSS AL46 AT49 VSS VSS B20 F42 VSS VSS V3
AG1 VSS VSS AL51 AT61 VSS VSS B24 F46 VSS VSS V7
AG11 VSS VSS AL52 AT62 VSS VSS B26 F50 VSS VSS W20
AG21 VSS VSS AL54 AT63 VSS VSS B28 F54 VSS VSS W22
AG23 VSS VSS AL57 AU1 VSS VSS B32 F58 VSS VSS Y10
AG60 VSS VSS AL60 AU16 VSS VSS B36 F61 VSS VSS Y59
AG61 VSS VSS AL61 AU18 VSS VSS B4 G18 VSS VSS Y63
AG62 VSS VSS AM1 AU20 VSS VSS B40 G22 VSS VSS
AG63 VSS VSS AM17 AU22 VSS VSS B44 G3 VSS
AH17 VSS VSS AM23 AU24 VSS VSS B48 G5 VSS V58
AH19 VSS VSS AM31 AU26 VSS VSS B52 G6 VSS VSS AH46
AH20 VSS VSS AM52 AU28 VSS VSS B56 G8 VSS VSS V23
AH22 VSS VSS AN17 AU30 VSS VSS B60 H13 VSS VSS E62
AH24 VSS VSS AN23 AU33 VSS VSS C11 VSS VSS_SENSE AH16 VSSSENSE <11,42>
AH28 VSS VSS AN31 AU51 VSS VSS C14 Rev1p2 VSS
AH30 VSS VSS AN32 AU53 VSS VSS C18
AH38 VSS VSS AN40 AV14 VSS VSS C38
B AH40 VSS VSS AN42 AV16 VSS VSS C39 B
AH42 VSS VSS AN43 AV20 VSS VSS C57
AH44 VSS VSS AN45 AV24 VSS VSS D12
AJ13 VSS VSS AN60 AV41 VSS VSS D25
AJ25 VSS VSS AP10 AV49 VSS VSS D29
VSS VSS VSS Rev1p2 VSS
Rev1p2
A A

2011/12/13 2012/12/13 Title
Issued Date Deciphered Date HSW MCP(10/11) GND
LA-A321PR02
5 4 3 2 1
1
U1Q HASWELL_MCP_E U1R HASWELL_MCP_E
DC_TEST_AY2_AW2 AY2 A3 DC_TEST_A3_B3 N23

DC_TEST_AY3_AW3 AY3 DAISY_CHAIN_NCTF_AY2 DAISY_CHAIN_NCTF_A3 A4 @ T52 RSVD R23
T105 @ AY60 DAISY_CHAIN_NCTF_AY3 DAISY_CHAIN_NCTF_A4 RSVD T23
DAISY_CHAIN_NCTF_AY60 AT2 RSVD
DC_TEST_AY61_AW61 AY61 A60 @ T96 RSVD U10
DAISY_CHAIN_NCTF_AY61 DAISY_CHAIN_NCTF_A60 AU44 RSVD
DC_TEST_AY62_AW62 AY62 A61 DC_TEST_A61_B61 RSVD
DAISY_CHAIN_NCTF_AY62 DAISY_CHAIN_NCTF_A61 AV44
T61 @ B2 A62 @ T62 RSVD
DAISY_CHAIN_NCTF_B2 DAISY_CHAIN_NCTF_A62 D15
DC_TEST_A3_B3 B3 AV1 @ T93 RSVD AL1
DC_TEST_A61_B61 B61 DAISY_CHAIN_NCTF_B3 DAISY_CHAIN_NCTF_AV1 AW1 @ T66 RSVD AM11
DC_TEST_B62_B63 B62 DAISY_CHAIN_NCTF_B61 DAISY_CHAIN_NCTF_AW1 AW2 DC_TEST_AY2_AW2 RSVD AP7
DAISY_CHAIN_NCTF_B62 DAISY_CHAIN_NCTF_AW2 F22 RSVD
B63 AW3 DC_TEST_AY3_AW3 RSVD AU10
DAISY_CHAIN_NCTF_B63 DAISY_CHAIN_NCTF_AW3 H22 RSVD
DC_TEST_C1_C2 C1 AW61 DC_TEST_AY61_AW61 RSVD AU15
DAISY_CHAIN_NCTF_C1 DAISY_CHAIN_NCTF_AW61 J21 RSVD
C2 AW62 DC_TEST_AY62_AW62 RSVD AW14
DAISY_CHAIN_NCTF_C2 DAISY_CHAIN_NCTF_AW62 AW63 @ T75 RSVD AY14
DAISY_CHAIN_NCTF_AW63
Rev1p2 RSVD
17 OF 19 18 OF 19
Rev1p2
U1S HASWELL_MCP_E
T92 @ CFG0 AC60 AV63

T104 @ CFG1 AC62 CFG0 RSVD_TP AU63
T67 @ CFG2 AC63
AA63
CFG1
CFG2
RSVD_TP CFG Straps for Processor
T68 @ CFG3
T69 @ CFG4 AA60 CFG3 C63
T103 @ CFG5 Y62 CFG4 RSVD_TP C62
T86 @ CFG6 Y61 CFG5 RSVD_TP B43
T88 @ CFG7 Y60 CFG6 RSVD CFG3
T73 @ CFG8 V62 CFG7 A51
CFG8 RSVD_TP
1
T74 @ CFG9 V61 B51
T76 @ CFG10 V60 CFG9 RSVD_TP R273
A T77 @ CFG11 U60 CFG10
CFG11 RSVD_TP
L60 1K_0402_1% A
T78 @ CFG12 T63 RESERVED @
T79 @ CFG13 T62 CFG12 N60
2
T80 @ CFG14 T61 CFG13 RSVD
T81 @ CFG15 T60 CFG14 W23
CFG15 RSVD Y22
T82 @ CFG16 AA62 RSVD AY15 OPI_COMP
T83 @ CFG18 U63 CFG16 PROC_OPI_RCOMP
T84 @ CFG17 AA61 CFG18 AV62
T85 @ CFG19 U62 CFG17 19 OF 19 RSVD D58
CFG19 RSVD Physical Debug Enable (DFX Privacy)
CFG_RCOMP V63 P22
CFG_RCOMP VSS N21
VSS 1: DISABLED
A5 CFG3
RSVD P20
RSVD 0: ENABLED; SET DFX ENABLED BIT
E1 R20
D1 RSVD RSVD IN DEBUG INTERFACE MSR
J20 RSVD
H18 RSVD
TD_IREF B12 RSVD CFG4
TD_IREF
1
Rev1p2
R274
1K_0402_1%
2
2 1 CFG_RCOMP
R275 49.9_0402_1%
2 1 OPI_COMP
R276 49.9_0402_1%
2 1 TD_IREF Display Port Presence Strap
R277 8.2K_0402_5%
1 : Disabled; No Physical Display Port

CFG4 attached to Embedded Display Port
0 : Enabled; An external Display Port device is

connected to the Embedded Display Port

2011/12/13 2012/12/13 Title
Issued Date Deciphered Date HSW MCP(11/11) RSVD
LA-A321PR02
A B C D E
+1.35V
+1.35V +1.35V
JDIMM1
1
+V_DDR_REFA 1 2
3 VREF_DQ VSS 4 DDR_A_D9
All VREF traces should
R278 DDR_A_D13 5 VSS DQ4 6 DDR_A_D12 have 10 mil trace width
1.8K_0402_1% DDR_A_D8 7 DQ0 DQ5 8
R279 9 DQ1 VSS 10 DDR_A_DQS#1
2
1 2 11 VSS DQS0# 12 DDR_A_DQS1
<5> SA_DIMM_VREFDQ DM0 DQS0
2_0402_1% 13 14
1
VSS VSS
0.022U_0402_16V7K
C107
C92
2.2U_0402_6.3V6M
0.1U_0402_16V4Z
C89
1 1 DDR_A_D14 15 16 DDR_A_D15
DDR_A_D10 17 DQ2 DQ6 18 DDR_A_D11
1
@ 19 DQ3 DQ7 20
1 2
DDR_A_D29 21 VSS VSS 22 DDR_A_D25
R282 2 2 DDR_A_D28 23 DQ8 DQ12 24 DDR_A_D24
R4 1.8K_0402_1% 25 DQ9 DQ13 26
1 VSS VSS 1
24.9_0402_1% DDR_A_DQS#3 27 28
2
V0.2 DDR_A_DQS3 29 DQS1# DM1 30 DIMM_DRAMRST#
DQS1 RESET# DIMM_DRAMRST# <4>
31 32
2
DDR_A_D30 33 VSS VSS 34 DDR_A_D27 C115 0.1U_0402_16V4Z
DDR_A_D31 35 DQ10 DQ14 36 DDR_A_D26 1 2
37 DQ11 DQ15 38
DDR_A_D44 39 VSS VSS 40 DDR_A_D45 @
CRB1.0 0.1uF *1 /2.2uF *1 DDR_A_D41 41 DQ16 DQ20 42 DDR_A_D40
Follow PDG1.0 2.2uF (reserved) 43 DQ17 DQ21 44
VSS VSS DDR_A_DQS#[0..7] <5>
DDR_A_DQS#5 45 46
DDR_A_DQS5 47 DQS2# DM2 48
+1.35V DQS2 VSS DDR_A_DQS[0..7] <5>
49 50 DDR_A_D42
DDR_A_D43 51 VSS DQ22 52 DDR_A_D46
DQ18 DQ23 DDR_A_D[0..63] <5>
DDR_A_D47 53 54
55 DQ19 VSS 56 DDR_A_D52
VSS DQ28 DDR_A_MA[0..15] <5> +1.35V
1U_0402_6.3V6K
C93
1U_0402_6.3V6K
C94
1U_0402_6.3V6K
C95
1U_0402_6.3V6K
C96
DDR_A_D51 57 58 DDR_A_D53
DDR_A_D50 59 DQ24 DQ29 60
1 1 1 1 DQ25 VSS
61 62 DDR_A_DQS#6
VSS DQS3# +5VALW +5VS
0.1U_0402_16V4Z
63 64 DDR_A_DQS6
65 DM3 DQS3 66
VSS VSS 1
2 2 2 2 DDR_A_D49 67 68 DDR_A_D54
DQ26 DQ30
C90
R290
R291
71 DQ27 DQ31 72
VSS VSS 2
1
V0.2
+1.35V
220K_0402_5%
220K_0402_5%
<5> DDRA_CKE0_DIMMA DDRA_CKE0_DIMMA 73 74 DDRA_CKE1_DIMMA DDRA_CKE1_DIMMA <5> U7 @
+1.35V 75 CKE0 CKE1 76 1 5
77 VDD VDD 78 DDR_A_MA15 NC VCC Q9
1
DDR_A_BS2 79 NC A15 80 DDR_A_MA14 2 D
<5> DDR_A_BS2 BA2 A14 <4> DDR_PG_CTRL A
81 82 4 2 LBSS138LT1G_SOT-23-3
VDD VDD Y
1U_0402_6.3V6K
C123
1U_0402_6.3V6K
C125
1U_0402_6.3V6K
C121
1U_0402_6.3V6K
C124
DDR_A_MA12 83 84 DDR_A_MA11 3 G 1 2 SA_ODT0

DDR_A_MA9 85 A12/BC# A11 86 DDR_A_MA7 GND R281 66.5_0402_1%
1 1 1 1 S
3
2 87 A9 A7 88 M_A_B_DIMM_ODT 1 2 SA_ODT1 2
DDR_A_MA8 89 VDD VDD 90 DDR_A_MA6 R285 66.5_0402_1%
A8 A6 74AUP1G07GW_TSSOP5
DDR_A_MA5 91 92 DDR_A_MA4
2 2 2 2 93 A5 A4 94
VDD VDD DDR_VTT_PG_CTRL <37>
V0.2 DDR_A_MA3 95 96 DDR_A_MA2
DDR_A_MA1 97 A3 A2 98 DDR_A_MA0
99 A1 A0 100
SA_CLK_DDR0 101 VDD VDD 102 SA_CLK_DDR1
<5> SA_CLK_DDR0 CK0 CK1 SA_CLK_DDR1 <5>
<5> SA_CLK_DDR#0 SA_CLK_DDR#0 103 104 SA_CLK_DDR#1 SA_CLK_DDR#1 <5>
105 CK0# CK1# 106
+1.35V DDR_A_MA10 107 VDD VDD 108 DDR_A_BS1 +1.35V
A10/AP BA1 DDR_A_BS1 <5>
<5> DDR_A_BS0 DDR_A_BS0 109 110 DDR_A_RAS# DDR_A_RAS# <5>
111 BA0 RAS# 112
1
DDR_A_WE# 113 VDD VDD 114 DDRA_CS0_DIMMA#
<5> DDR_A_WE# WE# S0# DDRA_CS0_DIMMA# <5>
10U_0603_6.3V6M
C97
10U_0603_6.3V6M
C98
10U_0603_6.3V6M
C99
10U_0603_6.3V6M
C100
<5> DDR_A_CAS# DDR_A_CAS# 115 116 SA_ODT0

117 CAS# ODT0 118 R287
1 1 1 1 VDD VDD
DDR_A_MA13 119 120 SA_ODT1 1.8K_0402_1%
DDRA_CS1_DIMMA# 121 A13 ODT1 122
<5> DDRA_CS1_DIMMA#
2
123 S1# NC 124 R288
2 2 2 2 125 VDD VDD 126 +VREF_CA 1 2
TEST VREF_CA SM_DIMM_VREFCA <5>
127 128 2_0402_1%
DQ32 DQ36
1
2.2U_0402_6.3V6M
0.1U_0402_16V4Z
C106
0.022U_0402_16V7K
C114
DQ33 DQ37
C105
133 134 1 1
DDR_A_DQS#0 135 VSS VSS 136 @ R289
1 2
DDR_A_DQS0 137 DQS4# DM4 138 1.8K_0402_1%
139 DQS4 VSS 140 DDR_A_D3
2
+1.35V DDR_A_D2 141 VSS DQ38 142 DDR_A_D7 2 2 R5
DDR_A_D6 143 DQ34 DQ39 144 24.9_0402_1%
145 DQ35 VSS 146 DDR_A_D18
2
DQ40 DQ45
10U_0603_6.3V6M
C101
10U_0603_6.3V6M
C102
10U_0603_6.3V6M
C103
1 DDR_A_D20 149 150 V0.2

DQ41 VSS
C104
1 1 1 151 152 DDR_A_DQS#2

3 + @ 153 VSS DQS5# 154 DDR_A_DQS2 3
155 DM5 DQS5 156
VSS VSS CRB1.0 0.1uF *1 /2.2uF *1
100U_B2_6.3VM_R45M
@ DDR_A_D17 157 158 DDR_A_D22

2 2 2 2 DDR_A_D16 159 DQ42 DQ46 160 DDR_A_D23 2.2uF (reserved)
161 DQ43 DQ47 162
DDR_A_D33 165 DQ48 DQ52 166 DDR_A_D32
167 DQ49 DQ53 168
DDR_A_DQS#4 169 VSS VSS 170
DDR_A_DQS4 171 DQS6# DM6 172
173 DQS6 VSS 174 DDR_A_D35
Layout Note: DDR_A_D38 177 DQ50 DQ55 178
Place near JDIMM1 179 DQ51 VSS 180 DDR_A_D63
Everage by each side DDR_A_D58 183 DQ56 DQ61 184
185 DQ57 VSS 186 DDR_A_DQS#7
187 VSS DQS7# 188 DDR_A_DQS7
189 DM7 DQS7 190
CRB1.0 10uF *8 /1uF *8 DDR_A_D60 191 VSS VSS 192 DDR_A_D56
DDR_A_D61 193 DQ58 DQ62 194 DDR_A_D57
195 DQ59 DQ63 196
197 VSS VSS 198
199 SA0 EVENT# 200 PCH_SMB_DATA
+0.675VS +3VS VDDSPD SDA PCH_SMB_DATA <28,31,7>
201 202 PCH_SMB_CLK PCH_SMB_CLK <28,31,7>
203 SA1 SCL 204
+0.675VS VTT VTT +0.675VS
205 206
1
GND1 GND2
10U_0603_6.3V6M
C120
1U_0402_6.3V6K
C108
1U_0402_6.3V6K
C109
1U_0402_6.3V6K
C110
1U_0402_6.3V6K
C111
C112
0.1U_0402_16V4Z
2.2U_0402_6.3V6M
C113
1 1 207 208
R259 R258 BOSS1 BOSS2
1 1 1 1 1
0_0402_5% 0_0402_5% LCN_DAN06-K4406-0103
@ @ ME@
2 2
2
4
2 2 2 2 2 4
CHANNEL A /TYPE :Reverse / H:4mm
V0.2
CRB1.0 0.1uF *1 /2.2uF *1
CHA SPD ADDRESS IS OxA0
Layout Note: CHA TS ADDRESS IS Ox30
Place near JDIMM1.203,204 Security Classification Compal Secret Data Compal Electronics, Inc.
PN:SP07000LT00 Issued Date 2011/12/13 Deciphered Date 2012/12/13 Title
DDRIII DIMMA
CRB1.0 10uF *1 /1uF *4 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Custom 0.2
LA-A321PR02
A B C D E
1 2 3 4 5
PX@
U666A
PCIE_CRX_GTX_P[3..0]
PCIE_CTX_GRX_P[3..0] PCIE_CRX_GTX_P[3..0] <10>
<10> PCIE_CTX_GRX_P[3..0]
A PCIE_CRX_GTX_N[3..0] A
PCIE_CTX_GRX_N[3..0] PCIE_CRX_GTX_N[3..0] <10>
<10> PCIE_CTX_GRX_N[3..0]
PCIE_CTX_GRX_P0 AF30 AH30 PCIE_GTX_ARX_P0 0.1U_0402_16V7K 2 1 PX@ C5187 PCIE_CRX_GTX_P0

PCIE_CTX_GRX_N0 AE31 PCIE_RX0P PCIE_TX0P AG31 PCIE_GTX_ARX_N0 0.1U_0402_16V7K 2 1 PX@ C5188 PCIE_CRX_GTX_N0
PCIE_RX0N PCIE_TX0N
PCIE_CTX_GRX_P1 AE29 AG29 PCIE_GTX_ARX_P1 0.1U_0402_16V7K 2 1 PX@ C5189 PCIE_CRX_GTX_P1

PCIE_CTX_GRX_N1 AD28 PCIE_RX1P PCIE_TX1P AF28 PCIE_GTX_ARX_N1 0.1U_0402_16V7K 2 1 PX@ C5190 PCIE_CRX_GTX_N1
PCIE_RX1N PCIE_TX1N
PCIE_CTX_GRX_P2 AD30 AF27 PCIE_GTX_ARX_P2 0.1U_0402_16V7K 2 1 PX@ C5191 PCIE_CRX_GTX_P2

PCIE_CTX_GRX_N2 AC31 PCIE_RX2P PCIE_TX2P AF26 PCIE_GTX_ARX_N2 0.1U_0402_16V7K 2 1 PX@ C5192 PCIE_CRX_GTX_N2
PCIE_RX2N PCIE_TX2N
PCIE_CTX_GRX_P3 AC29 AD27 PCIE_GTX_ARX_P3 0.1U_0402_16V7K 2 1 PX@ C5193 PCIE_CRX_GTX_P3

PCIE_CTX_GRX_N3 AB28 PCIE_RX3P PCIE_TX3P AD26 PCIE_GTX_ARX_N3 0.1U_0402_16V7K 2 1 PX@ C5194 PCIE_CRX_GTX_N3
PCIE_RX3N PCIE_TX3N
No Use GPU Display Port outpud
AB30 AC25
AA31 PCIE_RX4P PCIE_TX4P AB25 PX@
PCIE_RX4N PCIE_TX4N U666F
AA29 Y23
Y28 PCIE_RX5P PCIE_TX5P Y24
PCIE_RX5N PCIE_TX5N AB11
VARY_BL AB12
Y30 AB27 DIGON
W31 PCIE_RX6P PCIE_TX6P AB26
PCIE_RX6N PCIE_TX6N
W29 Y27 AL15

V28 PCIE_RX7P PCIE_TX7P Y26 TXCAP_DPA3P AK14
PCIE_RX7N PCIE_TX7N TXCAM_DPA3N
B B
AH16
V30 W24 TX0P_DPA2P AJ15
U31 NC#V30 NC#W24 W23 TX0M_DPA2N
NC#U31 NC#W23 AL17
TX1P_DPA1P AK16
U29 V27 TX1M_DPA1N
T28 NC#U29 NC#V27 U26 AH18
NC#T28 NC#U26 TX2P_DPA0P AJ17
TX2M_DPA0N
PCI EXPRESS INTERFACE

T30 U24 AL19
R31 NC#T30 NC#U24 U23 NC_TXOUT_L3P AK18
NC#R31 NC#U23 NC_TXOUT_L3N
R29 T26 TMDP

P28 NC#R29 NC#T26 T27
NC#P28 NC#T27 AH20
TXCBP_DPB3P AJ19
P30 T24 TXCBM_DPB3N
N31 NC#P30 NC#T24 T23 AL21
NC#N31 NC#T23 TX3P_DPB2P AK20
TX3M_DPB2N
N29 P27 AH22
M28 NC#N29 NC#P27 P26 TX4P_DPB1P AJ21
NC#M28 NC#P26 TX4M_DPB1N
AL23
M30 P24 TX5P_DPB0P AK22
L31 NC#M30 NC#P24 P23 TX5M_DPB0N
NC#L31 NC#P23 AK24
NC_TXOUT_U3P AJ23
L29 M27 NC_TXOUT_U3N
K30 NC#L29 NC#M27 N26
NC#K30 NC#N26
216-0841018 A0 SUN PRO S3

C CLOCK C
CLK_PEG_VGA AK30
<7> CLK_PEG_VGA PCIE_REFCLKP
CLK_PEG_VGA# AK32
<7> CLK_PEG_VGA# PCIE_REFCLKN +0.95VS_VGA
CALIBRATION
Y22 R5159 1 PX@ 2 1.69K_0402_1%
PCIE_CALR_TX
R1400 1 PX@ 2 1K_0402_5% N10 AA22 R717 1 PX@ 2 1K_0402_1%
TEST_PG PCIE_CALR_RX
GPU_RST# AL27
PERSTB
+3VS_VGA
V0.2
216-0841018 A0 SUN PRO S3
R104 1 @ 2 10K_0402_5% DGPU_HOLD_RST#
V0.2
+3VS V0.2
U6 PX@
5
PLT_RST_BUF# 2
P
<24,25,28,8> PLT_RST_BUF# B 4 GPU_RST#

DGPU_HOLD_RST# 1 Y
<8> DGPU_HOLD_RST# A
G
1
1
3
R109 R163
V0.2 10K_0402_5% 100K_0402_5%
D D
@ PX@
2
U74AHC1G08G-AL5-R_SOT353-5

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SUN_PCIE/DP
Custom 0.2
Date:
LA-A321PR02
1 2 3 4 5
1 2 3 4 5
+3VS_VGA
PX@ Resistor Divider Lookup Lable

U666B +1.8VS_VGA
U? PS_0[3:1]=001 Strap Name :
1
PX@ PX@ R_pu (ohm) R_pd (ohm) Bitd [3:1] PS_0[5:4]=11
1
R327 R328 PS_0[1] ROM_CONFIG[0]
G
10K_0402_5% 10K_0402_5% AF2 PX@
NC#AF2 AF4 R5165
NC 4.75k 000 PS_0[2] ROM_CONFIG[1]
2
NC#AF4 8.45K_0402_1%
EC_SMB_DA2 6 1 VGA_SMB_DA3 1 N9 AG3 8.45k 2k 001 PS_0[3] ROM_CONFIG[2]
S
<25,29,31,7> EC_SMB_DA2 T201
2
1 L9 DBG_DATA16 NC#AG3 AG5 PS_0
D
T202 DBG_DATA15 NC#AG5
Q2416A 1 AE9 DPA 4.53k 2k 010 PS_0[4] N/A
T203 DBG_DATA14
1
PX@ 1 Y11 AH3
G
T204 1 AE8 DBG_DATA13 NC#AH3 AH1
6.98k 4.99k 011 PX@ PS_0[5] AUD_PORT_CONN_PINSTRAP[0]
T205 DBG_DATA12 NC#AH1
1 AD9 C=NC R5166
A T206 DBG_DATA11 A
1 AC10 AK3 4.53k 4.99k 100 2K_0402_1%
T207 DBG_DATA10 NC#AK3
EC_SMB_CK2 3 4 VGA_SMB_CK3 1 AD7 AK1
S
<25,29,31,7> EC_SMB_CK2 T208
2
1 AC8 DBG_DATA9 NC#AK1
D
Q2416B
T209 1 AC7 DBG_DATA8 DVO
AK5
3.24k 5.62k 101
PX@ 1 AB9 AM3 3.4k 10k 110
T211 DBG_DATA6 NC#AM3
1 AB8
T212 DBG_DATA5
1 AB7 AK6 4.75k NC 111
1 AB4 AM5
T214 DBG_DATA3 NC#AM5
1 AB2 X76 @
T215
1 Y8 DBG_DATA2 DPB
AJ7
0402 1% resistors are equired +1.8VS_VGA
T216
1 Y7 DBG_DATA1 NC#AJ7 AH6
PS_1[3:1]=000 Strap Name :
V0.2 T217 DBG_DATA0 NC#AH6
PS_1[5:4]=11
1
AK8 PS_1[1] STRAP_BIF_GEN3_EN_A
NC#AK8 AL7 @
NC#AL7 R5167
Capacitor Divider Lookup Lable 8.45K_0402_1%
PS_1[2] TRAP_BIF_CLK_PM_EN
W6 PS_1[3] N/A
2
V6 NC#W6 PS_1
NC#V6 V4
Cap (nF) Bitd [5:4]
NC#V4 PS_1[4] STRAP_TX_CFG_DRV_FULL_SWING
1
AC6 U5
AC5 NC#AC5 NC#U5 PX@
NC#AC6 W3
680nF 00 R5168
PS_1[5] STRAP_TX_DEEMPH_EN
AA5 NC#W3 V2
C=NC 4.75K_0402_1%
AA6 NC#AA5 NC#V2 82nF 01
DPC
2
NC#AA6 Y4
NC#Y4 W5
10nF 10
NC#W5
U1 AA3
NC 11
W1 NC#U1 NC#AA3 Y2
U3 NC#W1 NC#Y2
Y6 NC#U3 J8
AA1 NC#Y6 NC#J8 +1.8VS_VGA
NC#AA1 PS_2[3:1]=000 Strap Name :
PS_2[5:4]=01
PS_2[1] N/A
R=NC
I2C PS_2[2] N/A
B R1 B
R3 SCL PS_2
PS_2[3] STRAP_BIOS_ROM_EN
SDA
PS_2[4] STRAP_BIF_VGA_DIS
1
AM26 1
R AK26 @ PX@
GPU_GPIO0 U6
GENERAL PURPOSE I/O AVSSN#AK26 C5203 R5164
PS_2[5] N/A
<41> GPU_GPIO0 GPIO_0
U10 AL25 0.082U_0402_16V6K 4.75K_0402_1%
T10 GPIO_1 G AJ25 2
2
VGA_SMB_DA3 U8 GPIO_2 AVSSN#AJ25
+3VS_VGA VGA_SMB_CK3 U7 SMBDATA AH24
1 @ 2 GPU_GPIO5 T9 SMBCLK B AG25
<25,33,35,8> ACIN GPIO_5_AC_BATT AVSSN#AG25
R165 0_0402_5% T8
RP34 @ 1 PX@ 2 T7 GPIO_6 DAC1 AH26
<25> VGA_AC_BATT GPIO_7_BLON HSYNC
1 8 JTAG_TRSTB R166 0_0402_5% V0.2 P10 AJ27
2 7 JTAG_TDI P4 GPIO_8_ROMSO VSYNC
3 6 JTAG_TMS P2 GPIO_9_ROMSI +1.8VS_VGA
4 5 JTAG_TCK VGA_AC__BATT N6 GPIO_10_ROMSCK
GPIO_11 RSET
AD22
PS_3[3:1]=000 Strap Name :
N5 PS_3[5:4]=11
pull up GPIO_12
1
10K_8P4R_5% N3 AG24 PS_3[1] BOARD_CONFIG[0] (Memory ID)
Y9 GPIO_13 AVDD AE22 @
GPU_VID1 N1 GPIO_14_HPD2 AVSSQ R5174
<41> GPU_VID1
M4 GPIO_15_PWRCNTL_0 AE23 8.45K_0402_1%
PS_3[2] BOARD_CONFIG[1] (Memory ID)
R6 GPIO_16 VDD1DI AD23 PS_3[3] BOARD_CONFIG[2] (Memory ID)
2
W10 GPIO_17_THERMAL_INT VSS1DI PS_3
R1439 1 PX@ 2 TESTEN T29 @ GPIO19_CTF M2 GPIO_18
GPIO_19_CTF FutureASIC/SEYMOUR/PARK PS_3[4] AUD_PORT_CONN_PINSTRAP[1]
1
1K_0402_5% GPU_VID2 P8 AM12
<41> GPU_VID2 P7 GPIO_20_PWRCNTL_1 CEC_1
GPU_VID5 @ PS_3[5] AUD_PORT_CONN_PINSTRAP[2]
<41> GPU_VID5 GPIO_21
N8 C=NC R5169
GPU_VID4 AK10 GPIO_22_ROMCSB AK12 2K_0402_1%
<41> GPU_VID4 GPIO_29 RSVD#AK12
GPU_VID3 AM10 AL11
<41> GPU_VID3
2
VGA_CLKREQ# N7 GPIO_30 RSVD#AL11 AJ11
<7> VGA_CLKREQ# CLKREQB RSVD#AJ11
JTAG_TRSTB L6 X76 @
JTAG_TDI L5 JTAG_TRSTB
JTAG_TCK L3 JTAG_TDI
1 JTAG_TCK
JTAG_TMS L1 AL13
XTALIN R349 1 2 PX@ XTALOUT C5213 @ T70 1 JTAG_TDO K4 JTAG_TMS GENLK_CLK AJ13
C
10M_0402_5% RF 68P_0402_50V8J
2 PAD
TESTEN K7
AF24
JTAG_TDO
TESTEN
GENLK_VSYNC
C
NC#AF24 AG13
Y6 PX@ SWAPLOCKA AH12
4 3 AB13 SWAPLOCKB
NC OSC W8 GENERICA
1 2 W9 GENERICB Memory ID Memory Type Configuration Size
OSC NC W7 GENERICC AC19 PS_0
27MHZ 16PF +-30PPM X3G027000FG1H-HX AD10 GENERICD PS_0
2 2
PX@
C341
SJ100009700 PX@
C350
AJ9
AL9
GENERICE
NC#AJ9 PS_1
AD19 PS_1 (default) 000 SA000068U00 Samsung K4W2G1646E-BC1A 1GB
8.2P_0402_50V8B 8.2P_0402_50V8B NC#AL9 AE17 PS_2
1 1 AC14 PS_2
V0.2 1 AB16 HPD1 AE20 PS_3 001 SA000067500 Micron MT41J128M16JT-093G:K 1GB
T218 PX_EN PS_3
AE19 010 SA00006H400 Hynix H5TC2G63FFR-11C 1GB

1 AC16 TS_A
T221 DBG_VREFG
011 SA000068R10 Samsung K4W4G1646B-HC11 2GB
DDC/AUX
AE6 100 SA000065D20 Micron MT41K256M16HA-107G:E 2GB
PLL/CLOCK DDC1CLK AE5
DDC1DATA
AD2
AUX1P AD4
AUX1N
AC11
DDC2CLK AC13
DDC2DATA
XTALIN AM28 AD13
XTALOUT AK28 XTALIN AUX2P AD11
XTALOUT AUX2N
1 AC22 AD20
T219 XO_IN NC#AD20
R1442 1 PX@ 2 10K_0402_5% 1 AB22 AC20
T220 XO_IN2 NC#AC20
Enable MLPS AE16
NC#AE16 AD16
D NC#AD16 D
SEYMOUR/FutureASIC AC1
+1.8VS_VGA T4 DDCVGACLK AC3
L54 PX@ T2 DPLUS THERMAL DDCVGADATA
1 2 13mA DMINUS
BLM15BD121SN1D_0402
GPIO28 R5
C414 2 PX@1 10U_0603_6.3V6M +TSVDD AD17 GPIO28_FDO
AC17 TSVDD
C421 2 PX@1 1U_0402_6.3V4Z TSVSS
C438 2 PX@1 0.1U_0402_10V6K Security Classification Compal Secret Data

Title
216-0841018 A0 SUN PRO S3 Issued Date 2013/01/11 Deciphered Date 2013/12/31 SUN_MSIC
Custom 0.2
Date:
LA-A321PR02
Thursday, March 14, 2013Sheet 17 of 46
1 2 3 4 5
1 2 3 4 5
+3VS to +3VSG (60mA)

PX@
+1.5V to +1.5VSG (2.096A) U666E U?
+3VS 60mA J13 @
1U_0402_6.3V6K
1 U4103
C4111
1 14 1 2 +3VS_VGA
2 VIN1 VOUT1 13 AA27 A3
VIN1 VOUT1 No Use GPU Display Port outpud GND GND
0.1U_0402_16V7K
PAD-OPEN 4x4m 1 AB24 A30
2 PX@ +1.8VS_VGA GND GND
C4124
DGPU_PWR_EN 3 12 C4112 1 2 PX@ AB32 AA13
ON1 CT1 220P_0402_50V7K V0.2 0_0603_5% 20mA PX@ AC24 GND GND AA16
4 11 R319 1 @ 2 +DP_VDDR U666G AC26 GND GND AB10
+5VL U?
VBIAS GND 2 PX@ AC27 GND GND AB15
A A
DGPU_PWR_EN 5 10 C4126 1 2 PX@ AD25 GND GND AB6
C446
C447
DP POWER NC/DP POWER
ON2 CT2 2200P_0402_50V7K AD32 GND GND AC9
J12 @ 1 1 GND GND
6 9 AG15 AE11 AE27 AD6
7 VIN2 VOUT2 8 1 2 AG16 DP_VDDR#AG15 NC#AE11 AF11 AF32 GND GND AD8
VIN2 VOUT2 +1.5VS_VGA DP_VDDR#AG16 NC#AF11 GND GND
AF16 AE13 AG27 AE7
1U_0402_6.3V4Z
0.1U_0402_10V6K
2 2 DP_VDDR#AF16 NC#AE13 GND GND
0.1U_0402_25V6
15 1756mA PAD-OPEN 4x4m 1 AG17 AF13 AH32 AG12
GPAD DP_VDDR#AG17 NC#AF13 GND GND
C4125
+1.5VS AG18 AG8 K28 AH10
TPS22966DPUR_SON14_2X3 AG19 DP_VDDR#AG18 NC#AG8 AG10 K32 GND GND AH28
DP_VDDR#AG19 NC#AG10 GND GND
1U_0402_6.3V6K
1 PX@ AF14 L27 B10

2 PX@ DP_VDDR#AF14 GND GND
C4123
M32 B12
N25 GND GND B14
Need to check power sequence GND GND
N27 B16
2 PX@ P25 GND GND B18
AG20 AF6 P32 GND GND B20
AG21 DP_VDDC#AG20 NC#AF6 AF7 R27 GND GND B22
+0.95VS_VGA AF22 DP_VDDC#AG21 NC#AF7 AF8 T25 GND GND B24
0_0603_5% 16mA AG22 DP_VDDC#AF22 NC#AF8 AF9 T32 GND GND B26
R320 1 @ 2 +DP_VDDC AD14 DP_VDDC#AG22 NC#AF9 U25 GND GND B6
DP_VDDC#AD14 U27 GND GND B8
V32 GND GND C1
C450
C451
W25 GND GND C32
1 1 GND GND
AG14 AE1 W26 E28
AH14 DP_VSSR NC#AE1 AE3 W27 GND GND F10
AM14 DP_VSSR NC#AE3 AG1 Y25 GND GND F12
1U_0402_6.3V4Z
0.1U_0402_10V6K
2 2 AM16 DP_VSSR NC#AG1 AG6 Y32 GND GND F14
AM18 DP_VSSR NC#AG6 AH5 GND GND F16
AF23 DP_VSSR NC#AH5 AF10 GND F18
AG23 DP_VSSR NC#AF10 AG9 GND F2
AM20 DP_VSSR NC#AG9 AH8 GND F20
AM22 DP_VSSR NC#AH8 AM6 M6 GND F22
AM24 DP_VSSR NC#AM6 AM8 N13 GND GND F24
AF19 DP_VSSR NC#AM8 AG7 N16 GND GND F26
AF20 DP_VSSR NC#AG7 AG11 N18 GND GND F6
B
+1.8VALW to +1.8VSG (818mA) AE14 DP_VSSR
DP_VSSR
NC#AG11 N21
P6
GND
GND
GND
GND
GND
F8
G10 B
P9 GND GND G27
R12 GND GND G31
AF17 AE10 R15 GND GND G8
DPAB_CALR NC#AE10 R17 GND GND H14
R20 GND GND H17
T13 GND GND H2
+1.8VS_VGA T16 GND GND H20
216-0841018 A0 SUN PRO S3 GND GND
T18 H6
T21 GND GND J27
T6 GND GND J31
U15 GND GND K11
GND GND
2
U17 K2
GND GND
10U_0603_6.3V6M
1U_0402_6.3V4Z
1 1 U20 K22
GND GND
C4106
C4107
R4102 U9 K6
10_0603_5% V13 GND GND
PX@ V16 GND
31
2 2@ V18 GND
Y10 GND
Y15 GND
5 DGPU_PWR_EN# Y17 GND
Y20 GND
Q4101B R11 GND A32
4
ME2N7002DKW-G 2N_SOT363-6 T11 GND VSS_MECH AM1

PX@ AA11 GND VSS_MECH AM32
M12 GND VSS_MECH
N11 GND
V11 GND
GND
216-0841018 A0 SUN PRO S3

?
C C
+0.95VALW to +0.95VSG (4.016A)
+0.95VS_VGA +5VALW
+VGA_CORE
2
R4113
2
100K_0402_5% R4114
10U_0603_6.3V6M
1U_0402_6.3V4Z
1 1 PX@ 470_0603_5%
C4114
C4115
R4107 PX@
3 1
ME2N7002DKW-G 2N_SOT363-6
10_0603_5% DGPU_PWR_EN#
6 1
PX@
6 1
2 2@
<25,40,41,8> DGPU_PWR_EN DGPU_PWR_EN 5

2 DGPU_PWR_EN#
1
2 DGPU_PWR_EN# Q4105B
4
PX@ R4115 PX@ Q4105A
1
Q4101A 100K_0402_5% PX@
1
PX@
2
D D

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SUN_Power/GND
Custom 0.2
Date:
LA-A321PR02
Tuesday, March 19, 2013 Sheet 18 of 46
1 2 3 4 5
1 2 3 4 5
+1.5VS_VGA
A A
+VGA_CORE 10uF 1uF 0.1uF
C365
C367
C375
C370
C371
C372
C373
C374
1 1 1 1 1 1 1 1
VDDC TBD 5 (1@) 10 (2@) 0 PX@ +PCIE_PVDD:
+1.8VS_VGA
U666D U? 100mA (PCIE3.0)
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2 2 2 2 2 2 2 2
PX@
PX@
PX@
AM30
VDDCI 3.5A 1 3 0 1A PCIE_PVDD
PX@
PX@
PX@
PX@
PX@
MEM I/O
PCIE
C380
C387
C394
H13 AB23 1 1 1
H16 VDDR1 NC#AB23 AC23
H19 VDDR1 NC#AC23 AD24
J10 VDDR1 NC#AD24 AE24
10U_0603_6.3V6M
0.1U_0402_10V6K
1U_0402_6.3V4Z
J23 VDDR1 NC#AE24 AE25 2 2 2
+0.95VS_VGA 10uF 1uF 0.1uF VDDR1 NC#AE25
PX@
PX@
PX@
J24 AE26
J9 VDDR1 NC#AE26 AF25
K10 VDDR1 NC#AF25 AG26
K23 VDDR1 NC#AG26
PCIE_VDDC 2.5A 2 (1@) 5 (1@) 0 K24 VDDR1
K9 VDDR1 L23
C389
C390
C391
C381
C392
C3719
C3720
C3721
C3722
C3723
0.01U_0402_16V7K
0.01U_0402_16V7K
0.01U_0402_16V7K
0.01U_0402_16V7K
0.01U_0402_16V7K
L11 VDDR1 PCIE_VDDC L24
2 2 2 2 2 1 1 1 1 1 VDDR1 PCIE_VDDC
L12 L25
BIF_VDDC 1.4A 0 0 0 L13 VDDR1 PCIE_VDDC L26 +PCIE_VDDC:
VDDR1 PCIE_VDDC +0.95VS_VGA
L20 M22 2.5A (PCIE3.0)
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
1 1 1 1 1 2 2 2 2 2 VDDR1 PCIE_VDDC
PX@
PX@
PX@
PX@
PX@
L21 N22
VDDR1 PCIE_VDDC
PX@
PX@
PX@
PX@
PX@
L22 N23
SPLL_VDDC 100mA 1 1 1 VDDR1 PCIE_VDDC N24
PCIE_VDDC R22
PCIE_VDDC T22
C384
C386
C398
C399
C383
C403
C388
C3724
C3725
+1.8VS_VGA 13mA LEVEL PCIE_VDDC U22 1 1 1 1 1 1 1 1 1
1U_0402_6.3V6K
1U_0402_6.3V6K
L56 PX@ TRANSLATION PCIE_VDDC V22
1 2 +VDD_CT AA20 PCIE_VDDC
+1.5VS_VGA 10uF 1uF 0.1uF BLM15BD121SN1D_0402 AA21 VDD_CT
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
AB20 VDD_CT AA15 2 2 2 2 2 2 2 2 2
C404
C405
C422
B VDD_CT CORE VDDC B
PX@
PX@
PX@
PX@
PX@
PX@
PX@
@
@
1 1 1 AB21 N15
VDD_CT VDDC N17
VDDR1 1.5A 3 5 5 +3VS_VGA VDDC R13
L24PX@ 25mA I/O VDDC R16
10U_0603_6.3V6M
0.1U_0402_10V6K
1U_0402_6.3V4Z
2 2 2 1 2 +VDDR3 AA17 VDDC R18
VDDR3 VDDC
PX@
PX@
PX@
BLM15BD121SN1D_0402 AA18 Y21
AB17 VDDR3 VDDC T12
C410
C428
C429
AB18 VDDR3 VDDC T15 +VGA_CORE
+1.8VS_VGA 10uF 1uF 0.1uF 0 ohm P/N 1 1 1 VDDR3 VDDC T17
V12 VDDC T20 18A
Y12 VDDR4 VDDC U13
1U_0402_6.3V4Z
1U_0402_6.3V4Z
0.1U_0402_10V6K
2 2 2 U12 VDDR4 VDDC U16
PCIE_PVDD 100mA 1 1 1 VDDR4 VDDC
PX@
PX@
@
U18
VDDC V21 VDDC + VDDCI(Merged)
VDDC V15
VDDC V17 PRO (DDR3) S3 : 21A
MPLL_PVDD 130mA 1 1 1 VDDC V20
VDDC
POWER
Y13
VDDC Y16
VDDC Y18
SPLL_PVDD 75mA 1 1 1 VDDC AA12
VDDC M11
VDDC N12
VDDC U11
VDDR4 (300mA) 0 0 0 VDDC
+1.8VS_VGA
L47 PX@ 90mA PLL
1 2 +MPLL_PVDD
VDD_CT 13mA 1 1 1 MBK1608221YZF_2P +0.95VS_VGA
C406
C407
C433
1 1 1
1.4A R398
R21 +BIF_VDDC 1 2
BIF_VDDC U21
+TSVDD 13mA 1 1 1 BIF_VDDC 0_0805_5%
10U_0603_6.3V6M
0.1U_0402_10V6K
1U_0402_6.3V4Z
2 2 2 L8 @
+1.8VS_VGA MPLL_PVDD
PX@
PX@
PX@
C C
L48 PX@ 75mA +VGA_CORE
+DP_VDDR 0 0 0 1 2 +SPLL_PVDD
ISOLATED
CORE I/O
3.5A (DDR3)
BLM15BD121SN1D_0402 M13
C408
C409
C434
H7 VDDCI M15
1 1 1 SPLL_PVDD VDDCI M16
+DP_VDDC 0 0 0 VDDCI M17
+0.95VS_VGA VDDCI M18
100mA
10U_0603_6.3V6M
0.1U_0402_10V6K
1U_0402_6.3V4Z
2 2 2 L53 PX@ VDDCI M20

VDDCI
PX@
PX@
PX@
1 2 +SPLL_VDDC H8 M21
BLM15BD121SN1D_0402 SPLL_VDDC VDDCI N20
C411
C412
C435
J7 VDDCI
+3VS_VGA 10uF 1uF 0.1uF 1 1 1 SPLL_PVSS
10U_0603_6.3V6M
0.1U_0402_10V6K
1U_0402_6.3V4Z
2 2 2
VDDR3 25mA 0 2 (1@) 1 216-0841018 A0 SUN PRO S3
PX@
PX@
PX@
D D

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SUN_Power
Custom 0.2
Date:
LA-A321PR02
1 2 3 4 5
1 2 3 4 5
M_DA[63..0]
<21,22> M_DA[63..0]
M_MA[15..0]
<21,22> M_MA[15..0]
M_DQM[7..0]
<21,22> M_DQM[7..0]
M_DQS[7..0]
<21,22> M_DQS[7..0]
A A
M_DQS#[7..0]
<21,22> M_DQS#[7..0]
PX@
U666C U?
GDDR5/DDR3 GDDR5/DDR3
M_DA0 K27 K17 M_MA0
M_DA1 J29 DQA0_0 MAA0_0/MAA_0 J20 M_MA1
M_DA2 H30 DQA0_1 MAA0_1/MAA_1 H23 M_MA2
M_DA3 H32 DQA0_2 MAA0_2/MAA_2 G23 M_MA3
M_DA4 G29 DQA0_3 MAA0_3/MAA_3 G24 M_MA4
M_DA5 F28 DQA0_4 MAA0_4/MAA_4 H24 M_MA5
M_DA6 F32 DQA0_5 MAA0_5/MAA_5 J19 M_MA6
+1.5VS_VGA +1.5VS_VGA M_DA7 F30 DQA0_6 MAA0_6/MAA_6 K19 M_MA7
M_DA8 C30 DQA0_7 MAA0_7/MAA_7 G20 M_MA13
M_DA9 F27 DQA0_8 MAA0_8/MAA_13 L17 M_MA15
M_DA10 A28 DQA0_9 MAA0_9/MAA_15
DQA0_10
1
1 M_DA11 C28
DQA0_11 MAA1_0/MAA_8
J14 M_MA8
PX@ PX@ M_DA12 E27 K14 M_MA9
R363 R365 M_DA13 G26 DQA0_12 MAA1_1/MAA_9 J11 M_MA10
40.2_0402_1% 40.2_0402_1% M_DA14 D26 DQA0_13 MAA1_2/MAA_10 J13 M_MA11
M_DA15 F25 DQA0_14 MAA1_3/MAA_11 H11 M_MA12
2
M_DA16 A25 DQA0_15 MAA1_4/MAA_12 G11 M_BA2

DQA0_16 MAA1_5/MAA_BA2 M_BA2 <21,22>
+MVREFDA +MVREFSA M_DA17 C25 J16 M_BA0
DQA0_17 MAA1_6/MAA_BA0 M_BA0 <21,22>
M_DA18 E25 L15 M_BA1
DQA0_18 MAA1_7/MAA_BA1 M_BA1 <21,22>
M_DA19 D24 G14 M_MA14
DQA0_19 MAA1_8/MAA_14
1
1 1 M_DA20 E23 L16
MEMORY INTERFACE
PX@ PX@ PX@ PX@ M_DA21 F23 DQA0_20 MAA1_9/RSVD
R364 C467 R457 C514 M_DA22 D22 DQA0_21 E32 M_DQM0
100_0402_1% 1U_0402_6.3V4Z 100_0402_1% 1U_0402_6.3V4Z M_DA23 F21 DQA0_22 WCKA0_0/DQMA0_0 E30 M_DQM1
2 2 M_DA24 E21 DQA0_23 WCKA0B_0/DQMA0_1 A21 M_DQM2
2
M_DA25 D20 DQA0_24 WCKA0_1/DQMA0_2 C21 M_DQM3

M_DA26 F19 DQA0_25 WCKA0B_1/DQMA0_3 E13 M_DQM4
B
M_DA27 A19 DQA0_26 WCKA1_0/DQMA1_0 D12 M_DQM5 B
M_DA28 D18 DQA0_27 WCKA1B_0/DQMA1_1 E3 M_DQM6
M_DA29 F17 DQA0_28 WCKA1_1/DQMA1_2 F4 M_DQM7
M_DA30 A17 DQA0_29 WCKA1B_1/DQMA1_3
M_DA31 C17 DQA0_30 H28 M_DQS0
M_DA32 E17 DQA0_31 EDCA0_0/QSA0_0 C27 M_DQS1
M_DA33 D16 DQA1_0 EDCA0_1/QSA0_1 A23 M_DQS2
M_DA34 F15 DQA1_1 EDCA0_2/QSA0_2 E19 M_DQS3
M_DA35 A15 DQA1_2 EDCA0_3/QSA0_3 E15 M_DQS4
M_DA36 D14 DQA1_3 EDCA1_0/QSA1_0 D10 M_DQS5
PX@ PX@ M_DA37 F13 DQA1_4 EDCA1_1/QSA1_1 D6 M_DQS6
R5160 R455 M_DA38 A13 DQA1_5 EDCA1_2/QSA1_2 G5 M_DQS7
49.9_0402_1% 10_0402_1% M_DA39 C13 DQA1_6 EDCA1_3/QSA1_3
1 2 2 1 DRAM_RST M_DA40 E11 DQA1_7 H27 M_DQS#0
<21,22> DRAM_RST# DQA1_8 DDBIA0_0/QSA0_0B
M_DA41 A11 A27 M_DQS#1
M_DA42 C11 DQA1_9 DDBIA0_1/QSA0_1B C23 M_DQS#2
DQA1_10 DDBIA0_2/QSA0_2B
1
1 1 M_DA43 F11 C19 M_DQS#3

PX@ PX@ PX@ M_DA44 A9 DQA1_11 DDBIA0_3/QSA0_3B C15 M_DQS#4
C469 R5161 C5186 M_DA45 C9 DQA1_12 DDBIA1_0/QSA1_0B E9 M_DQS#5
120P_0402_50V8J 5.1K_0402_1% 68P_0402_50V8J M_DA46 F9 DQA1_13 DDBIA1_1/QSA1_1B C5 M_DQS#6
2 2 M_DA47 D8 DQA1_14 DDBIA1_2/QSA1_2B H4 M_DQS#7
2
M_DA48 E7 DQA1_15 DDBIA1_3/QSA1_3B

M_DA49 A7 DQA1_16 L18 VRAM_ODT0
DQA1_17 ADBIA0/ODTA0 VRAM_ODT0 <21>
M_DA50 C7 K16 VRAM_ODT1
DQA1_18 ADBIA1/ODTA1 VRAM_ODT1 <22>
M_DA51 F7
M_DA52 A5 DQA1_19 H26 M_CLK0
DQA1_20 CLKA0 M_CLK0 <21>
M_DA53 E5 H25 M_CLK#0
DQA1_21 CLKA0B M_CLK#0 <21>
M_DA54 C3
M_DA55 E1 DQA1_22 G9 M_CLK1
Place close to GPU (within 25mm) M_DA56 G7 DQA1_23 CLKA1 H9 M_CLK#1
M_CLK1 <22>
DQA1_24 CLKA1B M_CLK#1 <22>
and place componment close to each other M_DA57 G6
DQA1_25
M_DA58 G1 G22 M_RAS#0
DQA1_26 RASA0B M_RAS#0 <21>
M_DA59 G3 G17 M_RAS#1
DQA1_27 RASA1B M_RAS#1 <22>
M_DA60 J6
M_DA61 J1 DQA1_28 G19 M_CAS#0
C C
DQA1_29 CASA0B M_CAS#0 <21>
M_DA62 J3 G16 M_CAS#1
DQA1_30 CASA1B M_CAS#1 <22>
M_DA63 J5
DQA1_31 H22 M_CS#0
CSA0B_0 M_CS#0 <21>
+MVREFDA K26 J22
+MVREFSA J26 MVREFDA CSA0B_1
MVREFSA G13 M_CS#1
CSA1B_0 M_CS#1 <22>
J25 K13
R5162 1 PX@ 2 120_0402_1% K25 NC#J25 CSA1B_1
MEM_CALRP0 K20 M_CKE0
CKEA0 M_CKE0 <21>
J17 M_CKE1
CKEA1 M_CKE1 <22>
G25 M_WE#0
WEA0B M_WE#0 <21>
DRAM_RST L10 H10 M_WE#1
DRAM_RST WEA1B M_WE#1 <22>
1 K8
T222 CLKTESTA
1 L7
T223 CLKTESTB
216-0841018 A0 SUN PRO S3
D D

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SUN_MEM
Custom 0.2
Date:
LA-A321PR02
1 2 3 4 5
1 2 3 4 5
Memory Partition A - Lower 32 bits

M_DA[63..0]
<20,22> M_DA[63..0]
M_MA[15..0]
<20,22> M_MA[15..0]
M_DQM[7..0]
<20,22> M_DQM[7..0]
M_DQS[7..0]
<20,22> M_DQS[7..0]
M_DQS#[7..0]
<20,22> M_DQS#[7..0]
+1.5VS_VGA +1.5VS_VGA
A A
1
PX@ PX@
R452 R463
4.99K_0402_1% U1406 4.99K_0402_1% U1407
2
+FBA_VREF0 M8 E3 M_DA17 +FBA_VREF1 M8 E3 M_DA30
H1 VREFCA DQL0 F7 M_DA23 H1 VREFCA DQL0 F7 M_DA27
VREFDQ DQL1 F2 M_DA21 VREFDQ DQL1 F2 M_DA31
DQL2 DQL2
1
1 M_MA0 N3 F8 M_DA22 1 M_MA0 N3 F8 M_DA24
PX@ PX@ M_MA1 P7 A0 DQL3 H3 M_DA18 PX@ PX@ M_MA1 P7 A0 DQL3 H3 M_DA29
R453 C472 M_MA2 P3 A1 DQL4 H8 M_DA19 R464 C540 M_MA2 P3 A1 DQL4 H8 M_DA26
4.99K_0402_1% 0.1U_0402_10V6K M_MA3 N2 A2 DQL5 G2 M_DA16 4.99K_0402_1% 0.1U_0402_10V6K M_MA3 N2 A2 DQL5 G2 M_DA28
2 M_MA4 P8 A3 DQL6 H7 M_DA20 2 M_MA4 P8 A3 DQL6 H7 M_DA25
2
M_MA5 P2 A4 DQL7 M_MA5 P2 A4 DQL7
M_MA6 R8 A5 M_MA6 R8 A5
M_MA7 R2 A6 D7 M_DA5 M_MA7 R2 A6 D7 M_DA8
M_MA8 T8 A7 DQU0 C3 M_DA3 M_MA8 T8 A7 DQU0 C3 M_DA14
M_MA9 R3 A8 DQU1 C8 M_DA4 M_MA9 R3 A8 DQU1 C8 M_DA9
M_MA10 L7 A9 DQU2 C2 M_DA1 M_MA10 L7 A9 DQU2 C2 M_DA12
M_MA11 R7 A10/AP DQU3 A7 M_DA6 M_MA11 R7 A10/AP DQU3 A7 M_DA10
M_MA12 N7 A11 DQU4 A2 M_DA0 M_MA12 N7 A11 DQU4 A2 M_DA15
M_MA13 T3 A12 DQU5 B8 M_DA7 M_MA13 T3 A12 DQU5 B8 M_DA11
M_MA14 T7 A13 DQU6 A3 M_DA2 M_MA14 T7 A13 DQU6 A3 M_DA13
M_MA15 M7 A14 DQU7 M_MA15 M7 A14 DQU7
A15/BA3 +1.5VS_VGA A15/BA3 +1.5VS_VGA
M_BA0 M2 B2 M_BA0 M2 B2
<20,22> M_BA0 BA0 VDD BA0 VDD
M_BA1 N8 D9 M_BA1 N8 D9
M_BA2 M3 G7 M_BA2 M3 G7
K2 K2
VDD K8 VDD K8
VDD N1 VDD N1
M_CLK0 J7 VDD N9 M_CLK0 J7 VDD N9
B <20> M_CLK0 CK VDD CK VDD B
M_CLK#0 K7 R1 M_CLK#0 K7 R1
<20> M_CLK#0 CK VDD CK VDD
M_CKE0 K9 R9 M_CKE0 K9 R9
<20> M_CKE0 CKE/CKE0 VDD +1.5VS_VGA CKE/CKE0 VDD +1.5VS_VGA
VRAM_ODT0 K1 A1 VRAM_ODT0 K1 A1
<20> VRAM_ODT0 ODT/ODT0 VDDQ ODT/ODT0 VDDQ
M_CS#0 L2 A8 M_CS#0 L2 A8
<20> M_CS#0 CS/CS0 VDDQ CS/CS0 VDDQ
M_RAS#0 J3 C1 M_RAS#0 J3 C1
<20> M_RAS#0 RAS VDDQ RAS VDDQ
M_CAS#0 K3 C9 M_CAS#0 K3 C9
<20> M_CAS#0 CAS VDDQ CAS VDDQ
M_WE#0 L3 D2 M_WE#0 L3 D2
<20> M_WE#0 WE VDDQ WE VDDQ
E9 E9
VDDQ F1 VDDQ F1
M_DQS2 F3 VDDQ H2 M_DQS3 F3 VDDQ H2
M_DQS0 C7 DQSL VDDQ H9 M_DQS1 C7 DQSL VDDQ H9
DQSU VDDQ DQSU VDDQ
M_DQM2 E7 A9 M_DQM3 E7 A9
M_DQM0 D3 DML VSS B3 M_DQM1 D3 DML VSS B3
DMU VSS E1 DMU VSS E1
VSS G8 VSS G8
M_DQS#2 G3 VSS J2 M_DQS#3 G3 VSS J2
M_DQS#0 B7 DQSL VSS J8 M_DQS#1 B7 DQSL VSS J8
DQSU VSS M1 DQSU VSS M1
VSS M9 VSS M9
VSS P1 VSS P1
T2 VSS P9 DRAM_RST# T2 VSS P9
<20,22> DRAM_RST# RESET VSS RESET VSS
T1 T1
L8 VSS T9 L8 VSS T9
ZQ/ZQ0 VSS ZQ/ZQ0 VSS
1
1
J1 B1 J1 B1
M_CLK0 PX@ L1 NC/ODT1 VSSQ B9 PX@ L1 NC/ODT1 VSSQ B9
M_CLK#0 R454 J9 NC/CS1 VSSQ D1 R456 J9 NC/CS1 VSSQ D1
243_0402_1% L9 NC/CE1 VSSQ D8 243_0402_1% L9 NC/CE1 VSSQ D8
NCZQ1 VSSQ E2 NCZQ1 VSSQ E2
2
2
VSSQ VSSQ
1
C E8 E8 C
R5171 R5170 VSSQ F9 VSSQ F9
40.2_0402_1% 40.2_0402_1% VSSQ G1 VSSQ G1
PX@ PX@ VSSQ G9 VSSQ G9
VSSQ VSSQ
2
96-BALL 96-BALL
SDRAM DDR3 SDRAM DDR3
K4W1G1646E-HC12_FBGA96 K4W1G1646E-HC12_FBGA96
1 @ @
PX@
C506
0.01U_0402_16V7K
2 +1.5VS_VGA
+1.5VS_VGA
U1406 side
U1407 side
C491
C512
C511
C519
C510
C521
C532
C520
C480
C481
C482
C485
C483
C531
C486
C490
C496
C497
C498
C499
C518
C533
C516
C474
C475
C476
C477
C478
C534
C479
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
10U_0603_6.3V6M
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
@
10U_0603_6.3V6M
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
@
@
D D

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SUN_VRAM
Size Document Number
A Lower Rev
Custom 0.2
Date:
LA-A321PR02
1 2 3 4 5
1 2 3 4 5
Memory Partition A - Upper 32 bits
+1.5VS_VGA
+1.5VS_VGA
1
1
PX@
PX@ R461
R458 4.99K_0402_1% U1409
4.99K_0402_1% U1408
2
A M_DA[63..0] +FBA_VREF3 M8 E3 M_DA49 A
<20,21> M_DA[63..0]
2
+FBA_VREF2 M8 E3 M_DA38 H1 VREFCA DQL0 F7 M_DA53
M_MA[15..0] H1 VREFCA DQL0 F7 M_DA36 VREFDQ DQL1 F2 M_DA51
<20,21> M_MA[15..0] VREFDQ DQL1 DQL2
1
F2 M_DA37 1 M_MA0 N3 F8 M_DA54
DQL2 A0 DQL3
1
M_DQM[7..0] 1 M_MA0 N3 F8 M_DA35 PX@ PX@ M_MA1 P7 H3 M_DA50
<20,21> M_DQM[7..0] A0 DQL3 A1 DQL4
PX@ PX@ M_MA1 P7 H3 M_DA39 R462 C539 M_MA2 P3 H8 M_DA55
M_DQS[7..0] R459 C473 M_MA2 P3 A1 DQL4 H8 M_DA32 4.99K_0402_1% 0.1U_0402_10V6K M_MA3 N2 A2 DQL5 G2 M_DA48
<20,21> M_DQS[7..0] A2 DQL5 2 A3 DQL6
4.99K_0402_1% 0.1U_0402_10V6K M_MA3 N2 G2 M_DA34 M_MA4 P8 H7 M_DA52
2
M_DQS#[7..0] 2 M_MA4 P8 A3 DQL6 H7 M_DA33 M_MA5 P2 A4 DQL7
<20,21> M_DQS#[7..0]
2
M_MA5 P2 A4 DQL7 M_MA6 R8 A5
M_MA6 R8 A5 M_MA7 R2 A6 D7 M_DA60
M_MA7 R2 A6 D7 M_DA41 M_MA8 T8 A7 DQU0 C3 M_DA59
M_MA8 T8 A7 DQU0 C3 M_DA44 M_MA9 R3 A8 DQU1 C8 M_DA63
M_MA9 R3 A8 DQU1 C8 M_DA43 M_MA10 L7 A9 DQU2 C2 M_DA56
M_MA10 L7 A9 DQU2 C2 M_DA45 M_MA11 R7 A10/AP DQU3 A7 M_DA62
M_MA11 R7 A10/AP DQU3 A7 M_DA42 M_MA12 N7 A11 DQU4 A2 M_DA57
M_MA12 N7 A11 DQU4 A2 M_DA46 M_MA13 T3 A12 DQU5 B8 M_DA61
M_MA13 T3 A12 DQU5 B8 M_DA40 M_MA14 T7 A13 DQU6 A3 M_DA58
M_MA14 T7 A13 DQU6 A3 M_DA47 M_MA15 M7 A14 DQU7
M_MA15 M7 A14 DQU7 A15/BA3 +1.5VS_VGA
A15/BA3 +1.5VS_VGA
M_BA0 M2 B2
M_BA0 M2 B2 M_BA1 N8 BA0 VDD D9
M_BA1 N8 D9 M_BA2 M3 G7
M_BA2 M3 G7 K2
<20,21> M_BA2 BA2 VDD VDD
K2 K8
VDD K8 VDD N1
VDD N1 M_CLK1 J7 VDD N9
M_CLK1 J7 VDD N9 M_CLK#1 K7 CK VDD R1
<20> M_CLK1 CK VDD CK VDD
M_CLK#1 K7 R1 M_CKE1 K9 R9
<20> M_CLK#1 CK VDD CKE/CKE0 VDD +1.5VS_VGA
M_CKE1 K9 R9
<20> M_CKE1 CKE/CKE0 VDD +1.5VS_VGA
VRAM_ODT1 K1 A1
VRAM_ODT1 K1 A1 M_CS#1 L2 ODT/ODT0 VDDQ A8
<20> VRAM_ODT1 ODT/ODT0 VDDQ CS/CS0 VDDQ
M_CS#1 L2 A8 M_RAS#1 J3 C1
B <20> M_CS#1 CS/CS0 VDDQ RAS VDDQ B
M_RAS#1 J3 C1 M_CAS#1 K3 C9
<20> M_RAS#1 RAS VDDQ CAS VDDQ
M_CAS#1 K3 C9 M_WE#1 L3 D2
<20> M_CAS#1 CAS VDDQ WE VDDQ
M_WE#1 L3 D2 E9
<20> M_WE#1 WE VDDQ VDDQ
E9 F1
VDDQ F1 M_DQS6 F3 VDDQ H2
M_DQS4 F3 VDDQ H2 M_DQS7 C7 DQSL VDDQ H9
M_DQS5 C7 DQSL VDDQ H9 DQSU VDDQ
DQSU VDDQ
M_DQM6 E7 A9
M_DQM4 E7 A9 M_DQM7 D3 DML VSS B3
M_DQM5 D3 DML VSS B3 DMU VSS E1
DMU VSS E1 VSS G8
VSS G8 M_DQS#6 G3 VSS J2
M_DQS#4 G3 VSS J2 M_DQS#7 B7 DQSL VSS J8
M_DQS#5 B7 DQSL VSS J8 DQSU VSS M1
DQSU VSS M1 VSS M9
VSS M9 VSS P1
M_CLK1 VSS P1 DRAM_RST# T2 VSS P9
M_CLK#1 DRAM_RST# T2 VSS P9 RESET VSS T1
<20,21> DRAM_RST# RESET VSS VSS
T1 L8 T9
L8 VSS T9 ZQ/ZQ0 VSS
ZQ/ZQ0 VSS
1
1
R5173 R5172 J1 B1
NC/ODT1 VSSQ
1
40.2_0402_1% 40.2_0402_1% J1 B1 PX@ L1 B9

PX@ PX@ PX@ L1 NC/ODT1 VSSQ B9 R444 J9 NC/CS1 VSSQ D1
R410 J9 NC/CS1 VSSQ D1 243_0402_1% L9 NC/CE1 VSSQ D8
2
243_0402_1% L9 NC/CE1 VSSQ D8 NCZQ1 VSSQ E2
2
NCZQ1 VSSQ E2 VSSQ E8
2
VSSQ E8 VSSQ F9
VSSQ F9 VSSQ G1
1 VSSQ VSSQ
PX@ G1 G9
C507 VSSQ G9 VSSQ
0.01U_0402_16V7K VSSQ 96-BALL
2 96-BALL SDRAM DDR3
C SDRAM DDR3 K4W1G1646E-HC12_FBGA96 C
K4W1G1646E-HC12_FBGA96 @
@
+1.5VS_VGA +1.5VS_VGA
U1408 side U1409 side

C495
C525
C524
C526
C513
C527
C536
C528
C504
C508
C505
C509
C529
C535
C530
C492
C501
C502
C503
C500
C523
C538
C522
C487
C484
C488
C489
C493
C537
C494
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
10U_0603_6.3V6M
10U_0603_6.3V6M
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
@
@
D D

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SUN_VRAM
Size Document Number
A Upper Rev
Custom 0.2
Date:
LA-A321PR02
1 2 3 4 5
5 4 3 2 1
+3VS +3VDD_CODEC +IOVDD_CODEC +3VDD_CODEC
R1529 R1530
0_0603_5% 0_0603_5%
1 @ 2 1 @ 2
1U_0402_6.3V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1 1
1
C1226
C1227
C1228
@
2
2 2
D D
Place near Pin1 Place near Pin9
600ohms @100MHz 2A
P/N: SM01000EE00
@ Place near Pin25
R1531
1 2 +5VS_PVDD
+5VS
0.1U_0402_16V4Z
0.1U_0402_16V4Z
4.7U_0603_6.3V6K
0_0805_5% 2 1 1
+5VDDA_CODEC
C1235
C1236
+5VS
C1234
1 2 2
Place near Pin26
1 2
+IOVDD_CODEC L37 0_0603_5%
0.1U_0402_16V4Z
4.7U_0603_6.3V6K
+3VDD_CODEC +1.5VS
1 1
R1559 @
C1231
C1230
1 2
0_0402_5%
1
C1232 2 2
1U_0402_6.3V6K
2 +3VLP
41
46
26
40
1
9
UA1 V0.2
Place near Pin40
DVDD
DVDD-IO
PVDD1
PVDD2
AVDD1
AVDD2
+3VS
1
100K_0402_5%
EXT_MIC_SLEEVE
R182
22
LINE1-L(PORT-C-L)
6
21 43 SPK_L-
C LINE1-R(PORT-C-R) SPK-OUT-L- C
2N7002KDWH_SOT363-6
42 SPK_L+
24 SPK-OUT-L+ R183 @
Q5A
2
23 LINE2-L(PORT-E-L) 45 SPK_R+ 100K_0402_5% 2
LINE2-R(PORT-E-R) SPK-OUT-R+ 44 SPK_R-
2
SPK-OUT-R-
3
17
<26> EXT_MIC_RING2
1
EXT_MIC_SLEEVE 18 MIC2-L(PORT-F-L) /RING2
<26> EXT_MIC_SLEEVE MIC2-R(PORT-F-R) /SLEEVE
2N7002KDWH_SOT363-6
Q5B
32 HP_OUTL <26>
31 HPOUT-L(PORT-I-L) 33 HDA_RST_AUDIO# 1 2 5
LINE1-VREFO-L HPOUT-R(PORT-I-R) HP_OUTR <26>
30 R102
LINE1-VREFO-R 10 HDA_SYNC_AUDIO 10K_0402_5%
HDA_SYNC_AUDIO <6> 1
4
SYNC
1U_0402_6.3V6K
C122
DMIC_DATA 2 6 HDA_BITCLK_AUDIO
<26> DMIC_DATA GPIO0/DMIC-DATA BCLK HDA_BITCLK_AUDIO <6>
1 2 DMIC_CLK_R 3 @
<26> DMIC_CLK GPIO1/DMIC-CLK
1 L21 EMI@ SBY100505T-301Y-N GNDA
2
RA15 1 2 0_0402_5% PDB 47 5 HDA_SDOUT_AUDIO
C1254
<25> EC_MUTE#
ALC283-CG HDA_SDOUT_AUDIO <6>
22P_0402_50V8J
HDA_RST_AUDIO# 11 PDB SDATA-OUT 8 RA16 1 EMI@ 2 33_0402_5%

2 <6> HDA_RST_AUDIO# RESETB SDATA-IN HDA_SDIN0 <6>
@ 48
PC_BEEP 12 SPDIF-OUT/GPIO2
RA18 1 2 39.2K_0402_1% 13
PCBEEP
ALC233-CG MONO-OUT
16
MIC2-VREFO
<26> PLUG_IN# SENSE A MIC2-VREFO <26>
14
SENSE B 29
37 MIC2-VREFO CA22 2 1 4.7U_0603_6.3V6K
CA23 2 1 1U_0402_6.3V6K 35 CBP 7 LDO3
CBN LDO3-CAP 39 LDO2 CA24 2 1 4.7U_0603_6.3V6K
LDO2-CAP 27
36 LDO1-CAP LDO1 CA25 2 1 4.7U_0603_6.3V6K
+3VS CPVDD
CA26 2 1 4.7U_0603_6.3V6K
28 CA27 1 2 1U_0402_6.3V6K
20 VREF
CPVREF 15 JDREF RA20 1 2 20K_0402_1%
CA28 2 1 4.7U_0603_6.3V6K 19 JDREF 34 CPVEE
MIC-CAP CPVEE
B
RA21 1 @ 2 0_0402_5% 4
DVSS
2 wide 40MIL JSPK1
B
RA21 pop on ALC283, NC on ALC233 49 25 CA30 SPK_R+ R1553 1 EMI@ 2 0_0603_5% SPK_R+_CONN 4 6
Thermal PAD AVSS1 38 SPK_R- R1555 1 EMI@ 2 0_0603_5% SPK_R-_CONN 3 4 G2 5
AVSS2 1U_0402_6.3V6K 3 G1
1 SPK_L+ R1554 1 EMI@ 2 0_0603_5% SPK_L+_CONN 2
SPK_L- R1556 1 EMI@ 2 0_0603_5% SPK_L-_CONN 1 2
ALC233-CG_MQFN48_6X6 1
1000P_0402_50V7K
1000P_0402_50V7K
1000P_0402_50V7K
1000P_0402_50V7K
1 1 1 1 ACES_88266-04001
SP02000K200
C1248
C1249
C1250
C1251
ME@
SE074102K80
2 2 2 2
EMI@ EMI@ EMI@ EMI@
R194 1 EMI@ 2 0_0402_5% PC Beep

SPK_R+_CONN SPK_L-_CONN
R195 1 EMI@ 2 0_0402_5% EMI SPK_R-_CONN SPK_L+_CONN
EC Beep 1 2
<25> BEEP#
R196 1 EMI@ 2 0_0402_5% C1252 0.1U_0402_16V4Z
2
C44
1 2 HDA_BITCLK_AUDIO R1557
R197 1 @ 2 0_0402_5% PCH Beep <9> SPKR 1 2PC_BEEP1 1 2 1 2 PC_BEEP @ @
R1552 @ 27_0402_5% C1253 0.1U_0402_16V4Z 1K_0402_5%
1 D38 D39
0.1U_0402_16V7K
1
PACDN042Y3R_SOT23-3 PACDN042Y3R_SOT23-3
1
C1247 @
@ 33P_0402_50V8J R1558
2 10K_0402_5%
GND GNDA
2
A Reserve for ESD request. A

HD Audio Codec_ALC259Q-VC
Custom 0.2
LA-A321PR02
5 4 3 2 1
5 4 3 2 1
+3_LAN Rising time (10%~90%) >1mS and <100mS
+3VALW +3V_LAN
W=60mils J15 @
1 2
370mA
1 2
JUMP_43X39
Layout Notice : Place as close

chip as possible.
D D
LDO@ +3V_LAN
+3V_LAN R1240 1 2 0_0603_5%
W=60mils +LAN_VDD10
L34 SWR@
+LAN_REGOUT 1 2
W=60mils 2.2UH +-5% NLC252018T-2R2J-N
C1263
0.1U_0402_16V4Z
C1200
0.1U_0402_16V4Z
C1199
0.1U_0402_16V4Z
C1198
0.1U_0402_16V4Z
C1197
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C1190
C1189
0.1U_0402_16V4Z
@
1
2
1 2 @ 1 1 1 1 1 1
1
C1201
1U_0402_16V6K
C1195 SWR@ C1196 SWR@
4.7U_0603_6.3V6K 0.1U_0402_16V4Z LDO@ C1184 SWR@ SWR@
2
1 4.7U_0603_6.3V6K C1182
2
2 1 0.1U_0402_10V6K 2 2 2 2 2 2
close to pin 22
These caps close to U11 : Pin 23 ( Should be place within 200 mils ) These caps close to U11 : Pin 11,32
These components close to U11 : Pin 24 DVDD33 +3V_LAN
These components close to U11 : Pin 3,8,22,30
LDO mode SWR mode
1uF reserved on Pin 22
EC pin29 implement Internal PU
R2220 1 2 10K_0402_5% LAN_WAKE#
V0.2
C C
C1204 V0.2
15P_0402_50V8J
These caps close to U11
1 2 XTLI_R XTLI MDI0+ 1 17 PCIE_PRX_C_DTX_P2 C1183 1 2 0.1U_0402_16V7K PCIE_PRX_DTX_P2
MDIP0 HSOP PCIE_PRX_DTX_P2 <10>
1 MDI0- 2 18 PCIE_PRX_C_DTX_N2 C1186 1 2 0.1U_0402_16V7K PCIE_PRX_DTX_N2
MDIN0 HSON PCIE_PRX_DTX_N2 <10>
+LAN_VDD10 3 19 PLT_RST_BUF#
AVDD10 PERSTB PLT_RST_BUF# <16,25,28,8>
Y4 MDI1+ 4 20 ISOLATEB R1514 1 2 1K_0402_5% +3VS
1 MDIP1 ISOLATEB
25MHZ_12PF_7V25000012 MDI1- 5 21 LAN_WAKE# R1508 1 2 0_0402_5%
MDIN1 LANWAKEB EC_PME# <25>
2 MDI2+ 6 22 +LAN_VDD10
GND MDI2- 7 MDIP2 DVDD10 23 +3V_LAN R1509 @1
@ 2 0_0402_5%
MDIN2 VDDREG PCH_GPIO27 <9>
+LAN_VDD10 8 24 +LAN_REGOUT
MDI3+ 9 AVDD10 REGOUT 25 1
MDIP3 LED2 T225
4 MDI3- 10 26
GND MDIN3 LED1/GPIO LAN_PWRDN <25>
+3V_LAN 11 27 1
AVDD33 LED0 T224
LAN_CLKREQ# 12 28 XTLO ISOLATEB
3 <7> LAN_CLKREQ# CLKREQB CKXTAL1
13 29 XTLI
<10> PCIE_PTX_C_DRX_P2 HSIP CKXTAL2
1
C1205 14 30 +LAN_VDD10 R1513
3 <10> PCIE_PTX_C_DRX_N2 HSIN AVDD10
15P_0402_50V8J 15 31 LAN_RSET 1 2 R1516
<7> CLK_PCIE_LAN REFCLK_P RSET
1 2 XTLO 16 32 +3V_LAN 2.49K_0402_1% 15K_0402_5%
<7> CLK_PCIE_LAN# REFCLK_N AVDD33 33
GND
2
U11
8111@
U11
8106@ RTL8111GUS-CG_QFN32_4X4
SA00006ML00 JRJ1 ME@
RTL8106 EUS
SA00006N900 12
GND
11
GND
B B
@ 10
D34 MDO0+ 1 GND
T71 AZC099-04S.R7G_SOT23-6 PR1+ 9
MDI2+ 1 4 MDI3+ MDO0- 2 GND
MDI3+ 1 16 MDO3+ I/O1 I/O3 PR1-
MDI3- 2 TD+ TX+ 15 MDO3- MDO1+ 3
3 TD- TX- 14 MCT3 PR2+
4 CT CT 13 2 5 MDO2+ 4 CHASSIS1_GND
5 NC NC 12 GND VDD PR3+
6 NC NC 11 MCT2 MDO2- 5
MDI2+ 7 CT CT 10 MDO2+ PR3-
MDI2- 8 RD+ RX+ 9 MDO2- R1521 EMI@ MDI3- 3 6 MDI2- MDO1- 6
RD- RX- 1 2 1 2 I/O2 I/O4 PR2-
75_0805_5% CHASSIS1_GND MDO3+ 7
MHPC_NS681612A C1206 PR4+
SP050007T00 10P_0603_50V8-J Place Close to T71 MDO3- 8
8111@ PR4-
Place Close to T1,T2
2 1
T72 SANTA_130460-3
DL2 DC231112261
MDI0+ 1 16 MDO0+ BS4200N-C-LV_SMB-F2
MDI0- 2 TD+ TX+ 15 MDO0- EMI@ @
3 TD- TX- 14 MCT0 D35
CT CT SCV00001D00 AZC099-04S.R7G_SOT23-6
4 13
5 NC NC 12 MDI1+ 1 4 MDI0+
6 NC NC 11 MCT1 I/O1 I/O3
MDI1+ 7 CT CT 10 MDO1+
MDI1- 8 RD+ RX+ 9 MDO1-
RD- RX- 2 5
GND VDD
MHPC_NS681612A
SP050007T00
A
1
C1207
D34/D35 MDI0- 3
I/O2 I/O4
6 MDI1-
A
2
0.01U_0402_16V7K
1'S PN:SC300001G00
2'S PN:SC300002E00 Place Close to T72

LAN-RTL8111GUS/8106EUS
Custom 0.2
LA-A321PR02
Date: Tuesday, March 19, 2013 Sheet 24 of 46
5 4 3 2 1
Vcc 3.3V +/- 5%
R1562 100K +/- 5%
Board ID R1564 VAD_BID min V AD_BID typ VAD_BID max
+3VLP +3VALW_EC +EC_VCCA
L38
0_0603_5% FBM-11-160808-601-T_0603
0 0 0 V 0 V 0 V MP
R331 1 @ 2 1 2
1 8.2K +/- 5% 0.216 V 0.250 V 0.289 V PVT
1
C1262 V0.2
0.1U_0402_16V4Z
2 18K +/- 5% 0.436 V 0.503 V 0.538 V DVT
V0.1
2 3 33K +/- 5% 0.712 V 0.819 V 0.875 V EVT
1 1 1 1 ECAGND
0.1U_0402_16V4Z
C1255
0.1U_0402_16V4Z
C1256
0.1U_0402_16V4Z
C1257
0.1U_0402_16V4Z
C1258
2 2 2 2 +3VALW_EC
2
111
125
U51
22
33
96
67
9
R1562
100K_0402_1%
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/AVCC
EC_VDD0
1
BRDID
2
1 21
KB_RST# 2 GATEA20/GPIO00 GPIO0F 23 BEEP#
<9> KB_RST# KBRST#/GPIO01 BEEP#/GPIO10 BEEP# <23> 18K_0402_5%
SERIRQ 3 26 NOVO# V0.2
<9> SERIRQ SERIRQ GPIO12 NOVO# <26> R1564
LPC_FRAME# 4 27 ACOFF
<7> LPC_FRAME# LPC_FRAME# ACOFF/GPIO13 ACOFF <35>
LPC_AD3 5
<7> LPC_AD3
1
LPC_AD2 7 LPC_AD3
<7> LPC_AD2 LPC_AD2 PWM Output
LPC_AD1 8 63 BATT_TEMP
<7> LPC_AD1 LPC_AD1 BATT_TEMP/GPIO38 BATT_TEMP <33,34>
LPC_AD0 10 64
<7> LPC_AD0 LPC_AD0LPC & MISC GPIO39 65 ADP_I
ADP_I/GPIO3A ADP_I <34,35>
CK_LPC_KBC 12 AD Input 66 BATT_OUT
<7> CK_LPC_KBC CLK_PCI_EC GPIO3B BATT_OUT <34,35>
PLT_RST_BUF# 13 75 BRDID
<16,24,28,8> PLT_RST_BUF# PCIRST#/GPIO05 GPIO42
1 2 EC_RST# 37 76
+3VALW_EC EC_RST# IMON/GPIO43
R1563 47K_0402_5% EC_SCI# 20
<9> EC_SCI# EC_SCII#/GPIO0E
2 BATT_LEN# 38
<34> BATT_LEN# GPIO1D 68 EC_WL_WAKE#
C1264 DAC_BRIG/GPIO3C 70 EC_WL_WAKE# <28>
0.1U_0402_16V4Z EN_DFAN1/GPIO3D 71
1 DA Output IREF/GPIO3E
KSI0 55 72
KSI1 56 KSI0/GPIO30 CHGVADJ/GPIO3F
KSI2 57 KSI1/GPIO31
KSI3 58 KSI2/GPIO32 83 EC_MUTE#
KSI3/GPIO33 EC_MUTE#/GPIO4A EC_MUTE# <23>
KSI4 59 84 USB_ON#
KSI4/GPIO34 USB_EN#/GPIO4B USB_ON# <26,28>
KSI5 60 85 +5VALW
KSO[0..15] KSI6 61 KSI5/GPIO35 CAP_INT#/GPIO4C 86 V0.2
<31> KSO[0..15] KSI6/GPIO36 PS2 Interface EAPD/GPIO4D
KSI7 62 87 TP_CLK R1566
KSI[0..7] KSI7/GPIO37 TP_CLK/GPIO4E TP_CLK <31>
KSO0 39 88 TP_DATA USB_ON# 1 @ 2
<31> KSI[0..7] KSO0/GPIO20 TP_DATA/GPIO4F TP_DATA <31>
KSO1 40
KSO2 41 KSO1/GPIO21 10K_0402_5%
KSO3 42 KSO2/GPIO22 97
KSO4 43 KSO3/GPIO23 CPU1.5V_S3_GATE/GPXIOA00 98
KSO5 44 KSO4/GPIO24 WOL_EN/GPXIOA01 99 ME_FLASH
KSO6 45 KSO5/GPIO25 Int. K/B HDA_SDO/GPXIOA02 109 NTC_V
ME_FLASH <6>
KSO7 46 KSO6/GPIO26 Matrix VCIN0_PH/GPXIOD00 NTC_V <34>
KSO7/GPIO27 SPI Device Interface
KSO8 47
KSO9 48 KSO8/GPIO28 119 EC_SPI_MISO_0 R1510 1 2 0_0402_5% PCH_SPI_MISO
KSO9/GPIO29 SPIDI/GPIO5B PCH_SPI_MISO <7>
+3VALW_EC KSO10 49 120 EC_SPI_MOSI_0 R1511 1 2 0_0402_5% PCH_SPI_MOSI_0
KSO10/GPIO2A SPIDO/GPIO5C PCH_SPI_MOSI_0 <7>
KSO11 50 SPI Flash ROM 126 EC_SPI_CLK_R0 R1512 1 EMI@ 2 33_0402_5% PCH_SPI_CLK_R0
KSO11/GPIO2B SPICLK/GPIO58 PCH_SPI_CLK_R0 <7>
KSO12 51 128 EC_SPI_CS0# R1515 1 2 0_0402_5% PCH_SPI_CS0#
KSO12/GPIO2C SPICS#/GPIO5A PCH_SPI_CS0# <7>
KSO13 52
KSO14 53 KSO13/GPIO2D
KSO15 54 KSO14/GPIO2E 73 PCH_ENBKL
KSO15/GPIO2F ENBKL/GPIO40 PCH_ENBKL <8>
81 74
R5118 1 @ 2 10K_0402_5% EC_WL_WAKE# 82 KSO16/GPIO48 PECI_KB930/GPIO41 89
KSO17/GPIO49 FSTCHG/GPIO50 SPOK <36>
90 BATT_CHG_LED#
BATT_CHG_LED#/GPIO52 BATT_CHG_LED# <26>
R1565 1 2 10K_0402_5% EC_MUTE# 91 CAPS_LED#
CAPS_LED#/GPIO53 CAPS_LED# <31>
EC_SMB_CK1 77 GPIO 92 PWR_LED#
<34,35> EC_SMB_CK1 EC_SMB_CK1/GPIO44 PWR_LED#/GPIO54 PWR_LED# <26>
R1640 1 2 100K_0402_5% LID_SW# EC_SMB_DA1 78 93 BATT_LOW_LED#
<34,35> EC_SMB_DA1 EC_SMB_DA1/GPIO45 BATT_LOW_LED#/GPIO55 BATT_LOW_LED# <26>
EC_SMB_CK2 79 SM Bus 95 SYSON
<17,29,31,7> EC_SMB_CK2 EC_SMB_CK2/GPIO46 SYSON/GPIO56 SYSON <32,37>
R1580 1 @ 2 47K_0402_5% Turbo_V EC_SMB_DA2 80 121 SYS_PWROK
<17,29,31,7> EC_SMB_DA2 EC_SMB_DA2/GPIO47 VR_ON/GPIO57 SYS_PWROK <8>
127 PM_SLP_S4# PM_SLP_S4# <8>
PM_SLP_S4#/GPIO59
PM_SLP_S3# 6 100 EC_RSMRST#

<8> PM_SLP_S3# PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXIOA03 EC_RSMRST# <8>
PM_SLP_S5# 14 101 EC_LID_OUT#
<8> PM_SLP_S5# PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXIOA04 EC_LID_OUT# <9>
EC_SMI# 15 102 Turbo_V
<6> EC_SMI# EC_SMI#/GPIO08 PROCHOT_IN/GPXIOA05 Turbo_V <34>
+3VS CMOS_ON# 16 103 H_PROCHOT#_EC
<29> CMOS_ON# GPIO0A H_PROCHOT#_EC/GPXIOA06 H_PROCHOT#_EC <34>
R1517 1 @ 2 0_0402_5% LAN_PWRDN_R 17 104 MAINPWON
<24> LAN_PWRDN GPIO0B VCOUT0_PH/GPXIOA07 MAINPWON <36>
VCCST_PG_EC 18 GPO 105 BKOFF#
<11> VCCST_PG_EC GPIO0C BKOFF#/GPXIOA08 BKOFF# <29>
RP36 RF_OFF# 19 GPIO 106 PBTN_OUT#
<28> RF_OFF# GPIO0D PBTN_OUT#/GPXIOA09 PBTN_OUT# <8>
5 4 EC_SMB_CK1 25 107 DGPU_PWR_EN V0.2
EC_INVT_PWM/GPIO11 PCH_APWROK/GPXIOA10 DGPU_PWR_EN <18,40,41,8>
6 3 EC_SMB_DA1 EC_TACH 28 108 VGA_AC_BATT
<28> EC_TACH FAN_SPEED1/GPIO14 SA_PGOOD/GPXIOA11 VGA_AC_BATT <17>
7 2 EC_SMB_CK2 EC_PME# 29
<24> EC_PME# EC_PME#/GPIO15
8 1 EC_SMB_DA2 EC_TX 30
<28> EC_TX EC_TX/GPIO16
EC_RX 31 110 ACIN
<28> EC_RX EC_RX/GPIO17 AC_IN/GPXIOD01 ACIN <17,33,35,8>
2.2K_0804_8P4R_5% PCH_PWROK 32 112 EC_ON
<8> PCH_PWROK PCH_PWROK/GPIO18 EC_ON/GPXIOD02 EC_ON <36>
EC_FAN_PWM 34 114 ON/OFF <26>
<28> EC_FAN_PWM SUSP_LED#/GPIO19 ON/OFF/GPXIOD03
36 GPI 115 LID_SW#
NUM_LED#/GPIO1A LID_SW#/GPXIOD04 LID_SW# <26>
R1567 1 2 2.2K_0402_5% TP_CLK 116 SUSP#
SUSP#/GPXIOD05 SUSP# <32,37,38,39>
117 VCCST_PWRGD <39>
R1569 1 2 2.2K_0402_5% TP_DATA GPXIOD06 118 PECI_KB9012 1 2
PECI_KB9012/GPXIOD07 H_PECI <4>
122 AGND/AGND R1584 43_0402_1%
R1581 1 2 10K_0402_5% EC_TACH 123 XCLKI/GPIO5D 124 +V18R
GND/GND
GND/GND
GND/GND
GND/GND
<8> SUSCLK XCLKO/GPIO5E V18R

1
GND0
1
C1270
1
4.7U_0603_6.3V6K
R1587 @ C1271 @ 2
11
24
35
94
113
69
100K_0402_5% 20P_0402_50V8
2
2
ECAGND
VR_HOT# 1 2 H_PROCHOT# <33,4>
<42> VR_HOT#
R2239 1 2 10K_0402_5% PCH_PWROK KB9012QF A4 LQFP 128P_14X14 R1579 @ 0_0402_5%
1 2
1
R2217 1 2 100K_0402_5% PCH_ENBKL L39 0_0603_5% D
H_PROCHOT#_EC 2 1
G @
Q82 S C1269
3
2N7002H_SOT23-3 47P_0402_50V8J
2

BIOS & EC I/O Port
Custom 0.2
LA-A321PR02
I/O Board CONN.
Connector: 0.3A / pin +3VLP
V0.2 2A/Active Low
2
+5VALW +USB2_VCCA
R1592
@ 100K_0402_5% C1320 U55 W=80mils
0.1U_0402_16V7K 1 8
1 2 2 GND VOUT 7
1
D40 3 VIN VOUT 6
NOVO# 2 4 VIN VOUT 5
<25> NOVO# <25,28> USB_ON# EN FLG USB_OC0# <10,28,9>
1 NOVO_BTN#
ON/OFF 3 G547I2P81U_MSOP8 EMI@ 1 C1321
<25> ON/OFF
470P_0402_50V7K
DAN202UT106_SC70-3
2
+3VLP
2
R1593
100K_0402_5%
ON/OFFBTN#
1
@
J16
R1596
1 2 2 1 ON/OFF
SHORT PADS 0_0402_5%
Power Board
+3VALW
+5VALW
JPWR1 ME@
8
7 8 10
NOVO_BTN#
PWR_LED#
6
5
4
7
6
5
G2
G1
9
EMI
<25> PWR_LED# 4
<25> LID_SW# LID_SW# 3 WCM-2012-900T_4P
ON/OFFBTN# 2 3
1 2 USB20_P0 3 4 USB20_P0_R USB20_P0 1 @ 2 USB20_P0_R
1 <10> USB20_P0 3 4 R173 0_0402_5%
SM070000K00
NOVO_BTN# USB20_N0 2 1 USB20_N0_R USB20_N0 1 @ 2 USB20_N0_R
<10> USB20_N0 2 1
ON/OFFBTN# R174 0_0402_5%
ACES_51524-0080N-001 EMI@
L50
SP01001A900
3
WCM-2012-900T_4P
USB20_P2 3 4 USB20_P2_R USB20_P2 1 @ 2 USB20_P2_R
<10> USB20_P2 3 4
D43 @ R175 0_0402_5%
PJSOT24C 3P C/A SOT-23 SM070000K00
USB20_N2 2 1 USB20_N2_R USB20_N2 1 @ 2 USB20_N2_R
<10> USB20_N2
1
2 1 R176 0_0402_5%
L51 EMI@
WCM-2012-900T_4P
USB20_P3 3 4 USB20_P3_R USB20_P3 1 @ 2 USB20_P3_R

<10> USB20_P3 3 4 R177 0_0402_5%
SM070000K00
USB20_N3 2 1 USB20_N3_R USB20_N3 1 @ 2 USB20_N3_R
<10> USB20_N3 2 1 R178 0_0402_5%
L52 EMI@
+USB2_VCCA +3VS
+3VS +USB2_VCCA
IO Board
C1306
C1307
0.1U_0402_10V6K
0.1U_0402_10V6K
1 1
W=80mils
@ @ W=40mils JCR1 ME@
2 2 1
2 1
3 2
4 3
USB20_P0_R 5 4
USB20_N0_R 6 5
7 6
USB20_P2_R 8 7
USB20_N2_R 9 8
10 9
USB20_P3_R 11 10
USB20_N3_R 12 11
13 12
LED Board <23> DMIC_CLK
DMIC_CLK 14 13
14
DMIC_DATA 15
<23> DMIC_DATA 15
16
17 16
18 17
+5VALW PLUG_IN# 19 18
<23> PLUG_IN# 19
HP_OUTL 20
<23> HP_OUTL 20
HP_OUTR 21
<23> HP_OUTR 22 21
JLED1 ME@
6 8 40 mils 23 22
6 G2 7 <23> EXT_MIC_SLEEVE 23
5 40 mils 24
5 G1 <23> EXT_MIC_RING2 24
PWR_LED# 4
BATT_LOW_LED# 3 4 R1594 1 2 2.2K_0402_5% 25
<25> BATT_LOW_LED# 3 <23> MIC2-VREFO GND1
BATT_CHG_LED# 2 26
<25> BATT_CHG_LED# 2 GND2
1 R1595 1 2 2.2K_0402_5%
1
ACES_88514-02401-071
SP010015W00
ACES_51524-0060N-001
SP010014M10

2011/06/15 2012/07/11 Title
Issued Date Deciphered Date ROM/KBD/PWR/CR/LED/TP Conn.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 0.2
LA-A321PR02
A B C D E F G H
mSATA CONN.
+3VS +3VS_SSD
J14
1 2
1 2
JUMP_43X79
@
JSSD1 ME@
1 2
3 WAKE# 3.3V 4
5 NC GND 6
7 NC 1.5V 8
1 1
9 CLKREQ# NC 10
11 GND NC 12
13 REFCLK- NC 14
15 REFCLK+ NC 16
17 GND NC 18
19 NC GND 20
21 NC NC 22
C1278 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_P1 23 GND PERST# 24
<6> SATA_PRX_DTX_P1 C1279 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_N1 25 PERn0 +3.3Vaux 26
<6> SATA_PRX_DTX_N1 27 PERp0 GND 28
29 GND +1.5V 30
C1275 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_N1 31 GND SMB_CLK 32
<6> SATA_PTX_DRX_N1 PETn0 SMB_DATA
<6> SATA_PTX_DRX_P1 C1276 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_P1 33 34
35 PETp0 GND 36
37 GND USB_D- 38
+3VS_SSD 39 NC USB_D+ 40
41 NC GND 42
43 NC LED_WWAN# 44
45 NC LED_WLAN# 46
47 NC LED_WPAN# 48
49 NC +1.5V 50
51 NC GND 52
NC +3.3V
+3VS_SSD 53 54
GND GND
0.1U_0402_16V4Z 10U_0603_6.3V6M
BELLW_80019-1021
1 1 1 1 DC040004X00
@
C1176 C1177 C1178 C1179
2 2 2 2
10U_0603_6.3V6M
2 2
0.01U_0402_16V7K
SATA HDD CONN.
JHDD1 ME@
1 23
SATA_PTX_DRX_P0 C1223 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_P0 2 GND PTH 24
3 <6> SATA_PTX_DRX_P0 3
SATA_PTX_DRX_N0 C1273 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_N0 3 A+ PTH
<6> SATA_PTX_DRX_N0 A-
4 25
SATA_PRX_DTX_N0 C1217 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_N0 5 GND NPTH 26
<6> SATA_PRX_DTX_N0 SATA_PRX_DTX_P0 C1216 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_P0 6 B- NPTH
<6> SATA_PRX_DTX_P0 7 B+
GND
8
C1222 @ 9 3.3V
+3VS 3.3V
2 1 10
11 3.3V
0.1U_0402_16V4Z 12 GND
13 GND
R1526 @ 0_0805_5% 14 GND
1 2 +5VS_HDD 15 V5
+5VS V5
16
17 V5
18 GND
19 RSVD
20 GND
21 V12
22 V12
V12
SANTA_192701-1
DC010006J00
+5VS_HDD 10U
1 1 1
1
EMI@ C1218 C1219 C1220 @ C1221
1000P_0402_50V7K 0.1U_0402_16V4Z 1U_0402_6.3V6K 10U_0603_6.3V6M
2
2 2 2
4 4

HDD/ODD/BT Connector
Custom 0.2
LA-A321PR02
A B C D E F G H
A B C D E
USB 3.0 Charger & Conn. FAN CONN.

+5VALW
Intel_PCH_USB2.0
C1331 @
1000P_0402_50V7K 2A/Active Low
2 1
+USB3_VCCA WCM-2012-900T_4P
1 2 U2DP2
<10> USB20_P1 1 2
C1308 U52 W=80mils
1 0.1U_0402_16V7K 1 8 SM070000K00 1
1 2 2 GND VOUT 7 4 3 U2DN2
VIN VOUT <10> USB20_N1 4
3 6 EMI@ 3
4 VIN VOUT 5 L43
<25,26> USB_ON# EN FLG USB_OC0# <10,26,9>
G547I2P81U_MSOP8
FAN1 Conn
1
+USB3_VCCA
+ C1311 Intel_PCH_USB3.0
220U_6.3V_M WCM-2012-900T_4P +5VS
PCB Footprint = C_MP6VLPS220MC4R2 1 2 U3RXDN2 W=80mils
2 <10> USB3_RX2_N
SM070001S00
1 2
JUSB1
LP2 1
R1525
@
0_0603_5%
2 +5VS_FAN 1
JFAN1
4 3 U3RXDP2 U3TXDP2 9 2 1
<10> USB3_RX2_P 4 3 SSTX+ <25> EC_TACH 2
USB3@ 1 <25> EC_FAN_PWM 3
L44 U3TXDN2 8 VBUS 4 3
U2DP2 3 SSTX- 5 4
1 D+ 2 G1
C1225 7 6
1000P_0402_50V7K U2DN2 2 GND 10 C1215 G2
@ D44 ESD@ U3RXDP2 6 D- GND 11
D45 SSRX+ GND 10U_0603_6.3V6M
U3RXDN2 9 10 1U3RXDN2 @ 2 4 12 1 ACES_85204-04001
1 GND GND
3 6 U2DN2 C1309 U3RXDN2 5 13 SP02000CW00
U3RXDP2 8 2U3RXDP2 I/O2 I/O4 0.1U_0402_16V7K WCM-2012-900T_4P SSRX- GND ME@
9 2
+USB3_VCCA 1 2 U3TXDN2_L 1 2 U3TXDN2 TAITW_PUBAU1-09FNLSCNN4H0 10U
<10> USB3_TX2_N 1 2
U3TXDN2 7 7 4 4U3TXDN2 USB3@ ME@
2 5 SM070001S00
U3TXDP2 6 5U3TXDP2 GND VDD 1 2 U3TXDP2_L 4 3 U3TXDP2
6 5 <10> USB3_TX2_P 4 3
USB3@ 0308 Add for ESD request
3 3 C1310 L45 USB3@
U2DP2 1 4 0.1U_0402_16V7K
8 I/O1 I/O3
AZC099-04S.R7G_SOT23-6
2 2
YSCLAMP0524P_SLP2510P8-10-9 Place TX AC coupling Cap (C843~C850). Close to connector
Mini-Express Card for WLAN(Half)
+3VS_WLAN +1.5VS +1.5VS_WLAN +3VS +3VS_WLAN
R1518
1 1 2 1
@
1
R1505 1 2 0_0402_5% EC_WL_WAKE#_R 1 2 C1172 @ C1173 @ @ 0_0805_5% 1 1@
<25> EC_WL_WAKE# PCH_PCIE_WAKE# <8,9>
R1520 @ 0_0402_5% R1488 0.1U_0402_16V4Z 0.1U_0402_16V4Z C1170 C1171
2 2
0_0603_5%
@ 0.1U_0402_16V4Z 0.1U_0402_16V4Z
JWLAN1 ME@ 2 2
2
1 2
3 WAKE# 3.3V 4
R1490 1 @ 2 0_0402_5% BT_DISABLE_R 5 NC GND 6 +1.5VS_WLAN
<8,9> WLBT_OFF_5# NC 1.5V
<7> WLAN_CLKREQ# WLAN_CLKREQ# 7 8
9 CLKREQ# NC 10
11 GND NC 12
3 3
<7> CLK_PCIE_WLAN# REFCLK- NC
13 14
<7> CLK_PCIE_WLAN REFCLK+ NC
15 16
17 GND NC 18
19 NC GND 20 R1492 1 @ 2 0_0402_5%
NC NC RF_OFF# <25>
21 22 WL_RST# 2 1 PLT_RST_BUF#
GND PERST# PLT_RST_BUF# <16,24,25,8>
23 24 R1493 @ 0_0402_5%
<10> PCIE_PRX_DTX_N3 PERn0 +3.3Vaux
25 26 R1495 1 @ 2 0_0402_5% +3VS_WLAN
<10> PCIE_PRX_DTX_P3 PERp0 GND
27 28
29 GND +1.5V 30 PCH_SMB_CLK_WLAN R1496 1 2 0_0402_5% @ PCH_SMB_CLK
GND SMB_CLK PCH_SMB_CLK <15,31,7>
31 32 PCH_SMB_DATA_WLAN R1497 1 2 0_0402_5% @ PCH_SMB_DATA PCH_SMB_DATA <15,31,7>
<10> PCIE_PTX_C_DRX_N3 PETn0 SMB_DATA
33 34
<10> PCIE_PTX_C_DRX_P3 PETp0 GND
35 36 USB20_N6
+3VS_WLAN GND USB_D- USB20_N6 <10>
37 38 USB20_P6
NC USB_D+ USB20_P6 <10>
39 40
41 NC GND 42
43 NC LED_WWAN# 44
45 NC LED_WLAN# 46
47 NC LED_WPAN# 48
EC_TX R1498 1 2 0_0402_5% 49 NC +1.5V 50
<25> EC_TX NC GND
EC_RX R1499 1 2 0_0402_5% 51 52
<25> EC_RX NC +3.3V
1 2 53 54
<8,9> WLBT_OFF_51# GND GND
R1523 1K_0402_5%
BELLW_80019-1021
DC040004X00
2
For EC to detect
R1501
debug card insert. 100K_0402_5%
1
4 4
Note: The real behavior of BT_DISABLE are

BT_DISABLE=LOW, BT=OFF
BT_DISABLE=HIGH, BT=ON

Mini-Card
0.2
LA-A321PR02
A B C D E
5 4 3 2 1
RTD2132R LDO MODE +3VS +3VS_PS

@
+SWR_V12 1 RT13 2 +SWR_LX RT1
0_0805_5%
80mil 1 @ 2
80mil
+3VS_PS 0_0805_5%
UT2
19 LVDS_ACLK MIIC_SDA Close to Pin3
LT1 2 1 +DP_V33 3 TXEC+ 20 LVDS_ACLK#
40mil DP_V33 TXEC- 0 1
FBMA-L11-201209-221LMA30T MIIC_SCL +DP_V33
60mil 13 SWR_VDD TXE2+
21 LVDS_A2
Power
10U_0603_6.3V6M
0.1U_0402_16V7K
0.1U_0402_16V7K
LT2 2 1 +SWR_VDD 18 22 LVDS_A2#
LVDS
FBMA-L11-201209-221LMA30T PVCC TXE2-
D
+SWR_V12 LT3 1 2 +SWR_LX 20mil 12 23 LVDS_A1
0 X EC CODE 1 1 1 D
SWR_LX TXE1+
CT13
CT14
CT15
4.7UH_PG031B-4R7MS_1.1A_20% 60mil 11 SWR_VCCK TXE1-
24 LVDS_A1#
27
7 VCCK 25 LVDS_A0
1 Internal ROM EEPROM 2 2 2
DP_V12 TXE0+ 26 LVDS_A0#
TXE0-
RTD2132S TL_ENVDD need 60 mil if use for LVDS power on R version

CTL1 1 2 0.1U_0402_16V7K EDP_AUXP_C 2
<4> EDP_AUXP AUX_P
DP-IN
CTL2 1 2 0.1U_0402_16V7K EDP_AUXN_C 1 14 TL_INVT_PWM
GPIO
<4> EDP_AUXN AUX_N GPIO(PWM OUT) +3VS_PS
15 TL_ENVDD
CTL3 1 2 0.1U_0402_16V7K EDP_TXP0_C 5 GPIO(Panel_VCC) 16 INVPWM
<4> EDP_TXP0 LANE0P GPIO(PWM IN) Close to pin11 Close to Pin18
CTL4 1 2 0.1U_0402_16V7K EDP_TXN0_C 6 17 RTD_ENBKL EDID_DATA RT9 1 2 4.7K_0402_5%
<4> EDP_TXN0 LANE0N GPIO(BL_EN) +SWR_VDD
EDID_CLK RT10 1 2 4.7K_0402_5%
10U_0603_6.3V6M
0.1U_0402_16V7K
10U_0603_6.3V6M
0.1U_0402_16V7K
0.1U_0402_16V7K
9 LVDS 29 EDID_CLK
<17,25,31,7> EC_SMB_CK2 CIICSCL1 MIICSCL1
I2C address=0XA8 10 28 EDID_DATA 1 1 1 1 1
<17,25,31,7> EC_SMB_DA2 CIICSDA1 EDID MIICDA1
Other
CT16
CT5
CT6
CT7
CT8
R1560
<8> EDP_HPD 1 2 32 ROM 31 MIIC_SCL
1K_0402_5% HPD MIICSCL0 30 MIIC_SDA +3VS_PS +3VS_PS 2 2 2 2 2
8 MIICSDA0
DP_REXT
1
4 33
DP_GND GND
2
2
@
R1473 RT4 RT6
100K_0402_5% RT8 RTD2132R-VE-CG_QFN32_5X5 4.7K_0402_5% 4.7K_0402_5% Close to Pin13
12K_0402_1%
2
1
MIIC_SCL MIIC_SDA Close to LT3
+SWR_V12
2
@
C C
10U_0603_6.3V6M
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
RT5 RT12
4.7K_0402_5% 4.7K_0402_5% 1 1 1 1
CT9
CT10
CT11
CT12
1
1
2 2 2 2
Close to
LCD POWER CIRCUIT Pin27
Close to Pin7
+3VS W=60mils W=60mils +LCDVDD_CONN

U46
1 +LCDVDD_CONN @
5 VOUT RTD_ENBKL R1468 1 2 0_0402_5% DISPOFF# +LEDVDD
4.7U_0603_6.3V6K
VIN
2 VGA LCD/PANEL BD. Conn.
C613
GND 1
4 R1466 1 2 0_0402_5% JLVDS2 ME@
SS <25> BKOFF#
1
3 2 1 41
1 EN 2 2 G1
+LEDVDD B+ LVDSP3 3 42
3 G2
2
C614 APL3512ABI-TRG_SOT23-5 V0.2 @ LVDSP4 4 43
1500P_0402_50V7K R1467 R1460 LVDSP5 5 4 G3 44
2 100K_0402_1% 1 2 LCD_PROT# 6 5 G4 45
APL3512_EN 1 2 TL_ENVDD DISPOFF# 7 6 G5 46
1 1 7 G6
R1471 0_0402_5% C1158 0_0805_5% INVT_PWM 8
1
1 @ 2 680P_0402_50V7K C1159 9 8
PCH_ENVDD <8> 4.7U_0805_25V6-K 9
R1470 0_0402_5% @ LVDS_ACLK 10
2 2 LVDS_ACLK# 11 10
12 11
B B
+LCDVDD_CONN LVDS_A2 13 12
13
1
W=60mils LVDS_A2# 14
JLVDS1 ME@ LVDS_A1 15 14
R939 1 LVDS_A1# 16 15
100K_0402_5% 2 1 LVDS_A0 17 16
TL_ENVDD @ R940
@1 2 0418 Add to protect DISPOFF# damage LVDSP3 3 2 LVDS_A0# 18 17
2
0_0805_5% LVDSP4 4 3 EDID_DATA 19 18

LVDSP5 5 4 EDID_CLK 20 19
R1479 2 1 @ LCD_PROT# 6 5 21 20
6 +3VS 21
0_0402_5% DISPOFF# 7 +LCDVDD_CONN 22
R1463 1 @ 2 0_0402_5% INVT_PWM 8 7 23 22
<4,8> INVPWM 8 (60 MIL) 23
9 24
RTD2132R Internal load switch for +LCD_VCC LVDS_ACLK 10 9 +3VS
LVDSP25 25 24
TL_INVT_PWM R1465 1 2 0_0402_5% LVDS_ACLK# 11 10 26 25
11 +3VS_CMOS 26
12 USB20_P5_R 27
12 27
1
LVDS_A2 13 USB20_N5_R 28
R1474 LVDS_A2# 14 13 29 28
R1475 LVDS_A1 15 14 30 29
100K_0402_5% 100K_0402_5% LVDS_A1# 16 15 USB20_P4 31 30
16 <10> USB20_P4 31
LVDS_A0 17 CMOS <10> USB20_N4 USB20_N4 32
2
+3VS LVDS_A0# 18 17 33 32
CMOS Camera (20 MIL)
EDID_DATA
EDID_CLK
19
20
18
19 1 @ 2 TS_RST#
34
35
33
34
20 <8,9> TS_ON 35
CMOS@ +3VS_CMOS +3VS 21 R721 0_0402_5% 36
Q70 22 21 37 36
PMV65XP_SOT23-3~D EMI 1 +LCDVDD_CONN
(60 MIL) 23 22
23
38 37
38
0_0603_5% (20 MIL) 680P_0402_50V7K +3VS 24 39
3 24 39
S
1 2 @ 1R1456 10U C1160@ LVDSP25 25 31 +3VS 40

1 @ 2 2 26 25 GND1 32 40
1 1 +3VS_CMOS 26 GND2
CMOS@ R180 0_0402_5% USB20_P5_R 27 33 STARC_107K40-000001-G2
C1152 C1153 @ USB20_N5_R 28 27 GND3 34
G
SP01000XE00
2
0.1U_0402_16V4Z 10U_0603_6.3V6M 29 28 GND4 35

WCM-2012-900T_4P 29 GND5
2 2 30 36
USB20_P5 3 4 USB20_P5_R 30 GND6
A
R1458CMOS@
<10> USB20_P5 3 4 CMOS A
150K_0402_5% SM070000K00 STARC_107K30-000001-G2
<10> USB20_N5 USB20_N5 2 1 USB20_N5_R SP010011S00
<25> CMOS_ON# R296 for CMOS shake issue reserve 2 1
1 L55 EMI@
C1155 CMOS@
0.1U_0402_16V4Z 1 @ 2
2 R181 0_0402_5%
LVDS/CAMERA
Custom 0.2
LA-A321PR02
5 4 3 2 1
5 4 3 2 1
+5VS +5VS_HDMI
UH1
3
OUT
1 1
+3VS IN C1161
2
D GND 0.1U_0402_16V4Z D
2
1
2
EMI@ AP2330W-7_SC59-3
R1469 C1224
1M_0402_5% Q74 1000P_0402_50V7K
2
2
G
2N7002H_SOT23-3
1
JHDMI1 ME@
3 1 HDMI_DET 19
<8> DDI2_HDMI_HPD 18 HP_DET
D
+5VS_HDMI +5V
17
HDMIDAT_R 16 DDC/CEC_GND
SDA
1
HDMICLK_R 15
14 SCL
R1472 13 Reserved
100K_0402_5% HDMI_CLK-_CK R153 1 @ 2 0_0402_5% HDMI_CLK-_CONN 12 CEC 20
<4> HDMI_CLK-_CK CK- GND
11 21
2
HDMI_CLK+_CKR154 1 @ 2 0_0402_5% HDMI_CLK+_CONN 10 CK_shield GND 22
<4> HDMI_CLK+_CK CK+ GND
<4> HDMI_TX0-_CK HDMI_TX0-_CK R167 1 @ 2 0_0402_5% HDMI_TX0-_CONN 9 23
8 D0- GND
HDMI_TX0+_CKR168 1 @ 2 0_0402_5% HDMI_TX0+_CONN 7 D0_shield
+3VS +5VS_HDMI <4> HDMI_TX0+_CK D0+
HDMI_TX1-_CK R169 1 @ 2 0_0402_5% HDMI_TX1-_CONN 6
<4> HDMI_TX1-_CK D1-
5
RHP3 HDMI_TX1+_CKR170 1 @ 2 0_0402_5% HDMI_TX1+_CONN 4 D1_shield
<4> HDMI_TX1+_CK D1+
2.2K_0804_8P4R_5% HDMI_TX2-_CK R171 1 @ 2 0_0402_5% HDMI_TX2-_CONN 3
<4> HDMI_TX2-_CK D2-
1 8 HDMICLK_R 2
2 7 HDMIDAT_R HDMI_TX2+_CK R172 1 @ 2 0_0402_5% HDMI_TX2+_CONN 1 D2_shield
<4> HDMI_TX2+_CK D2+
3 6 DDI2_CTRL_CK
4 5 DDI2_CTRL_DATA CONCR_099ATAC19NBLCNF
DC232001K00
C C
Q75A
Change Symbol to main source 02/24
2
2N7002DW-T/R7_SOT363-6
Close to HDMI connector
<8> DDI2_CTRL_CK
1 6 HDMICLK_R ESD
5
D1 @
HDMI_TX2+_CONN 1 9 HDMI_TX2+_CONN
4 3 HDMIDAT_R
<8> DDI2_CTRL_DATA
HDMI_TX2-_CONN 2 8 HDMI_TX2-_CONN
Q75B
HDMI_TX0+_CONN 4 7 HDMI_TX0+_CONN 680 +-5% 8P4R
2N7002DW-T/R7_SOT363-6 HDMI_CLK-_CONN 5 4
HDMI_TX0-_CONN 5 6 HDMI_TX0-_CONN HDMI_CLK+_CONN 6 3
HDMI_TX1-_CONN 7 2
L30 EMI@ HDMI_TX1+_CONN 8 1 SD309680080
HDMI_CLK+_CK 1 2 HDMI_CLK+_CONN
1 2 3 RP1 S ROW RES 1/16W 680 +-5% 8P4R
HDMI_CLK-_CK 4 3 HDMI_CLK-_CONN TVWDF1004AD0_DFN9 Main: SC300002800 680 +-5% 8P4R
4 3 HDMI_TX0-_CONN 5 4
2nd: SC300001Y00
WCM-2012HS-900T HDMI_TX0+_CONN 6 3
HDMI_TX2-_CONN 7 2
L31 EMI@ HDMI_TX2+_CONN 8 1
HDMI_TX0+_CK 1 2 HDMI_TX0+_CONN D3 @ +3VS
1 2 HDMI_TX1+_CONN 1 9 HDMI_TX1+_CONN RP2
1
D
HDMI_TX0-_CK 4 3 HDMI_TX0-_CONN HDMI_TX1-_CONN 2 8 HDMI_TX1-_CONN 2
4 3 G
WCM-2012HS-900T HDMI_CLK+_CONN 4 7 HDMI_CLK+_CONN S Q76
3
B L32 EMI@ HDMI_CLK-_CONN 5 6 HDMI_CLK-_CONN 2N7002H_SOT23-3 B
HDMI_TX1+_CK 1 2 HDMI_TX1+_CONN
1 2
HDMI_TX1-_CK 4 3 HDMI_TX1-_CONN 3
4 3
WCM-2012HS-900T TVWDF1004AD0_DFN9
L33 EMI@
HDMI_TX2+_CK 1 2 HDMI_TX2+_CONN
1 2
HDMI_TX2-_CK 4 3 HDMI_TX2-_CONN
4 3
WCM-2012HS-900T
D69
6 3 HDMICLK_R
+5VS_HDMI I/O4 I/O2
5 2
+5VALW VDD GND
HDMI_DET 4 1 HDMIDAT_R
I/O3 I/O1
YSUSB2.0-5_SOT23-6
@
Main: SC300001400
2nd: SC300001G00
A A

HDMI CONN
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-A321PR02 0.2
5 4 3 2 1
5 4 3 2 1
SMSC thermal sensor

Close to DDR
Close U49 placed near by VRAM +3VS
REMOTE1+
1
1
REMOTE1+ C
1 @ C1210 2 Q79
1
100P_0402_50V8J B MMST3904-7-F_SOT323-3
C1211 +3VS R1527 2 E
3
2200P_0402_50V7K 10K_0402_5% REMOTE1-
2 REMOTE1- @
U49
2
D D
1 10 EC_SMB_CK2
VDD SMCLK EC_SMB_CK2 <17,25,29,7>
REMOTE2+
REMOTE1+ 2 9 EC_SMB_DA2 REMOTE2+
Under mSSD
1 DP1 SMDATA EC_SMB_DA2 <17,25,29,7>
2 1
1
C1213 @ REMOTE1- 3 8 C
2200P_0402_50V7K C1212 DN1 ALERT# @ C1214 2 Q80
2 REMOTE2- 0.1U_0402_16V4Z REMOTE2+ 4 7 100P_0402_50V8J B MMST3904-7-F_SOT323-3
1 DP2 THERM# 2 E
3
REMOTE2- 5 6 REMOTE2-
DN2 GND
EMC1403-2-AIZL-TR_MSOP10
P/N:SA000029210
REMOTE1,2+/-:
Trace width/space:10/10 mil
Address 1001_101xb F75303M P/N:SA000046C00 Trace length:<8"
28
KSI[0..7] GND1 27
KSI[0..7] <25> GND2
KSI1 26
KSO[0..15] KSI7 25 26
KSO[0..15] <25> 25
KSI6 24
C
KSO9 23 24 C
KSI4 22 23
KSI5 21 22
KSO0 20 21
+3VS KSI2 19 20
KSI3 18 19
KSO5 17 18
KSO1 16 17
JTP1 ME@ KSI0 15 16
C1301 KSO2 14 15
8 KSO4 13 14
0.1U_0402_16V4Z 7 GND KSO7 12 13
GND KSO8 11 12
6 KSO6 10 11
TP_CLK 5 6 KSO3 9 10
<25> TP_CLK 5 9
TP_DATA 4 KSO12 8
<25> TP_DATA 4 8
1 1 @ 0_0402_5% 3 KSO13 7
R1600 2 1 PCH_SMB_CLK_TP 2 3 KSO14 6 7
<15,28,7> PCH_SMB_CLK 2 6
@ C1302 C1303 @ 2 1 PCH_SMB_DATA_TP 1 KSO11 5
<15,28,7> PCH_SMB_DATA 1 5
100P_0402_50V8J 100P_0402_50V8J R1601 0_0402_5% KSO10 4
2 2 @ KSO15 3 4
3
3
ACES_88514-00601-071 R94 1 2 300_0402_5% +5VS_CAPLED 2

C1304
C1305
+5VS
0.1U_0402_10V6K
0.1U_0402_10V6K
SP010014M00 CAPS_LED# 1 2
1 1 <25> CAPS_LED# 1
@ D42
PSOT24C_SOT23-3 @ @ JKB1
2 2 ACES_88514-02601-071
1
2
ME@
D36
YSDA0502C 3P C/A SOT-23
@
V0.2
1
ESD
B B
R
H25 H17
HOLEA HOLEA
1
H9 H6 H10 H11 H7 H8 H13 H15

HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA H29 H_2P5X3P1N H_2P5X3P1N
HOLEA FD1 FD2 FD3 FD4
0418 Add for LAN screw hole
E
1
1
H_2P5 CHASSIS1_GND H26 H27
H_2P5 H_2P5 H_2P5 H_2P5 H_2P5 H_2P5N
橢橢橢橢橢橢
H_3P0 HOLEA HOLEA
H_4P0 R
H14 H16 H12
A HOLEA HOLEA HOLEA
M/B M/B KB
1
2P5 * 9 pcd
1
H_1P5N H_1P5N
H18 H19 H20 H21 H22 H23 H24

H_5P4X2P5
F G
HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA H_5P4X2P5 H_5P9X3P0
A A
1
CHASSIS1_GND
H_4P0 H_4P0 H_4P0 H_3P3 H_3P3 H_3P3 H_3P3
B CPU C GPU D LAN Security Classification Compal Secret Data Compal Electronics, Inc.
AMP/Volume IC/FAN/screw
Fintek-Thermal Control
Custom 0.2
LA-A321PR02
Date: Tuesday, March 19, 2013 Sheet 31 of 46
5 4 3 2 1
A B C D E
+5VALW TO +5VS +3VALW TO +3VALW(PCH AUX Power)

+3VALW TO +3VS +5VALW TO +5VALW(PCH AUX Power)
1 1
+5VALW +5VS
U2301 J510
1 14 5VS 2 1
2 VIN1 VOUT1 13 2 1
VIN1 VOUT1
C2307
10U_0805_10V4Z
C2308
0.1U_0402_16V7K
C2322 @ JUMP_43X79
5VS_GATE 3 12 1 2 220P_0402_50V7K 1 1
<25,37,38,39> SUSP# +5VL ON1 CT1 +3VALW +3VALW_PCH
V0.2
4 11
VBIAS GND C2309 @
3VS_GATE 5 10 1 2 470P_0402_50V7K 2 2 1 2
ON2 CT2 R435 0_0805_5%
10mil 6 9 3VS
+3VALW 7 VIN2 VOUT2 8
VIN2 VOUT2
15 +3VS
GPAD
TPS22966DPUR_SON14_2X3 J511
2 1
2 1
C2324
10U_0603_6.3V6M
C2323
0.1U_0402_16V7K
@ JUMP_43X79
1 1
+3VALW +5VALW
Need to check power sequence @

2 2
C2318
10U_0603_6.3V6M
C2305
10U_0603_6.3V6M
0.1U_0402_16V7K
0.1U_0402_16V7K
1 1 1 1
C2316
C2306
2 2
@ @
2 2 2 2
+0.675VS +1.05VS_VTT
+5VALW
1
1
R627 R628 V0.2
@ @
1
470_0402_5% 470_0402_5%
2
@ R620
100K_0402_5%
2
SUSP
1
3 D 3
SUSP# 2 Q45
G SSM3K7002BFU_SC70-3
1
Q47 D Q48 D
S
3
1
@ SUSP 2 @ SUSP 2 @
R622 G G
10K_0402_5% S S
3
SSM3K7002BFU_SC70-3 SSM3K7002BFU_SC70-3
@
2
+5VALW
+1.35V
1
1
R629
@
@ R619 470_0402_5%
100K_0402_5%
2
2
SYSON#
6
Q44B
Q44A @
@ 2N7002DW-T/R7_SOT363-6
2 SYSON# 5
<25,37> SYSON
2N7002DW-T/R7_SOT363-6
1
4
1
4 4
R621
10K_0402_5% @
2

DC Interface
Custom 0.2
LA-A321PR02
A B C D E
5 4 3 2 1
VIN
@ JDCIN1 PF101 PL101

ACES_87302-0401-003 7A_24VDC_429007.WRML SMB3025500YA_2P
1 APDIN 1 2 APDIN1 1 2
1
2
2
1000P_0402_50V7K
1000P_0402_50V7K
100P_0402_50V8J
100P_0402_50V8J
3
3
1
D 4 D
4
5
2
GND
PC101
PC102
PC103
PC104
6
GND
+5VS
+3VALW
2
<25,4> H_PROCHOT#
47K_0402_1%
PR106
10K_0402_1%
L2N7002DW1T1G_SC88-6
PU101A
PR108
AS393MTR-E1 SO 8P OP
8
<25,34> BATT_TEMP
PC105 3
P
+
PQ101A
2 2 1 1
1N4148WS-7-F_SOD323-2
1
O 2
-
G
1.5M_0402_5%
0.022U_0402_16V7K
100K_0402_1%
100P_0402_50V8J
4
1
PR104
PD105
PR109
PC107
C C
2
+3VLP
1
+5VS
+CHGRTC
1
- JRTC2 + PR131
560_0603_5%
PR132
560_0603_5%
PD109
RB751V-40_SOD323-2
PR127
0_0402_5% H_PROCHOT#
47K_0402_1%
2 1 1 2 1 2 2 1 +RTCBATT @
PR107
3
@ MAXEL_ML1220T10 1 2
RTCVREF
8
PD108 PC106 5
P
+
PQ101B
RB751V-40_SOD323-2 5 2 1 7
O 6
1N4148WS-7-F_SOD323-2
RTC Battery -
G
0.022U_0402_16V7K ACIN <17,25,35,8>
1.5M_0402_5%
PU101B
4
PD104
PR105
2
1
B B
A A

PWR DCIN
5 4 3 2 1
5 4 3 2 1
JBATT1 Just for 13.3"

JBATT2 Just for 14"
VMB2 VMB
PF201 PL201
JBATT1 12A_65V_451012MRL SMB3025500YA_2P
1 1 2 1 2
1 2 BATT+
2 3 EC_SMCA
3 4 EC_SMDA
4 5
5 6
1
D D
6 7
1
PC201 PC202
7 8
100_0402_1%
100_0402_1%
1000P_0402_50V7K 0.01U_0402_50V7K
2
GND 9
@ GND
PR201
PR202
SUYIN_200082GR007G201ZR 2
PH1 under CPU botten side :

JBATT2
1 EC_SMB_CK1 <25,35> CPU thermal protection at 93 +-3 degree C 65W(UMA) : PR205=1.65K(SD034165180)
1 2
2 3 Recovery at 56 +-3 degree C
3 4 EC_SMB_DA1 <25,35>
4 5
5 6 1 2
6 7 +3VALW
7 8
@PR203
@ PR203
6.49K_0402_1%
+EC_VCCA
GND 9 <25,35> ADP_I
GND
2
1.65K_0402_1%
12.7K_0402_1%
@ 1 2
+3VLP
1
SUYIN_200082GR007G201ZR PR208
PR205
PR206
6.49K_0402_1%
A/D
@
1 2 PR212
BATT_TEMP <25,33>
1
PR204 <25> H_PROCHOT#_EC 2 1
2
10K_0402_5% <25> NTC_V
C 10K_0402_1% C
100K_0402_1%_NCP15WF104F03RC
+5VL +3VALW
<25> Turbo_V
PH201
2
10K_0402_1%
1
PR211
2
+5VL PR215
1
PC204 PR217 100K_0402_1%
2
1
6 1
1
0.01U_0402_25V7K 100K_0402_1%
BATT_OUT <25,35>
PR223 PR214
2
1
2
75K_0402_1% 47K_0402_1% ECAGND

PQ202A
OR 2 L2N7002DW1T1G_SC88-6
2
3
PC208
1
1
8
0.068U_0402_16V7K
BATT_TEMP 3 PQ202B
P
+ 1 1 2 5 L2N7002DW1T1G_SC88-6
2 O
-
G
1N4148WS-7-F_SOD323-2
PU201A 4
4
2
PD201
PR218 PR219 OR
1
100K_0402_1%
1
PC209 1.5M_0402_5%
100P_0402_50V8J
1
+3VLP
1
D
2 PQ208 2
B +5VL G @2N7002KW_SOT323-3 B
S PR221
3
VMB 100K_0402_1%
1
1
D
75K_0402_1%
@ PR213
2
47K_0402_1% 2 PQ206
<25> BATT_LEN#
@ PR207
G 2N7002KW_SOT323-3
8
+3V_LDO @ PC210
@PC210 S
2
3
5 0.068U_0402_16V7K~N
P
+ 7 1 2
1
6 O
-
G
2
100K_0402_1%
100P_0402_50V8J
4
1
PU201B
1N4148WS-7-F_SOD323-2
@ PR216
@ PC213
PD203
@ PR220
1
1.5M_0402_5%
@
+5VALW
22U_0603_6.3V6M
@ PU202 +3V_LDO
1
@ PC212
1 5
IN OUT
2
2
GND
3 4
SHDN# BYP
G9191-330T1U_SOT23-5
1
A A
@ PC211
1U_0402_16V6K
2

PWR-BATTERY CONN/OTP
5 4 3 2 1
5 4 3 2 1
P3
B+
P2
PQ301 PQ302
AO4407AL_SO8 AO4423L_SO8
8 1 1 8 PR302
VIN 7 2 2 7 0.01_1206_1% CHG_B+
6 3 3 6
SH00000MW00
5 5 1 4 1 2 PQ303
AO4407AL_SO8
2 3 PL301 1 8
4
1UH_NRS4018T1R0NDGJ_3.2A_30% 2 7
3 6
2200P_0402_50V7K
PQ304 5
10U_0805_25V6K
10U_0805_25V6K
D D
1 2
47K_0402_5%
1
2
200K_0402_1%
0.1U_0603_25V7K
PC307
4
1
PR301
PC305
PC306
DTA144EUA_SC70-3 PC304 DISCHG_G
PC301
PR303
5600P_0402_25V7K
1
PR304
@ 200K_0402_1%
2
2
2 1 2
2
ACN VIN
2ACOFF-1
1SS355_SOD323-2
2
1
PR305
1DISCHG_G-1
47K_0402_1%
1
2
PD301
ACP
P2-1 PR306
0.1U_0603_25V7K
1
2 200K_0402_1%
V1 PQ305 PQ306
1
PC308 PC309 DTC115EUA_SC70-3
1
DTC115EUA_SC70-3
PR307 1 2 2 1 PD302
3
20K_0402_1% 1SS355_SOD323-2
0.1U_0603_25V7K 2 1 2
1 2
6
PQ308
1
150K_0402_1% D 2N7002KW _SOT323-3 PC310 PQ309

PR308
PQ307A 2
2 BATT_OUT <25,34>
L2N7002DW 1T1G_SC88-6 G 0.1U_0603_25V7K P2 2N7002W -T/R7_SOT323-3
1
D
0.1U_0603_25V7K
S
3
2 1 2 PACIN
1
1
PC311
VIN G
S
3
ACPRN
390K_0603_1%
2
1
P2-2
PACIN2
10_1206_5%
2
5
6
7
8
C PR314 C
PR319
MDS1525URH 1N SO8
3
PQ307B
ACOK
CMPIN
CMPOUT
ACP
ACN
PR318 <25,34> ADP_I 0_0402_5%
2
PQ310
47K_0402_1% PR317 21 PR325
1
PACIN 1 2 5 1 2 6 TP 2 1 4
ACDET PC313
1
60.4K_0603_1% PC312 20 BQ24727VCC1 2

4
PC370 1 2 7 VCC
IOUT PR320
0.1U_0603_25V7K
2
3
2
1
1U_0603_25V6K
1
PQ311 100P_0603_50V8 19 PL302 0.01_1206_1%

PHASE
DTC115EUA_SC70-3
<25,34> EC_SMB_DA1
8
SDA
PU301 10UH_PCMB063T-100MS_4A_20%
1 2CHG 1 4
BATT+
S IC BQ24737RGRR VQFN 20P LX_CHG
PR321 18 DH_CHG
HIDRV
5
6
7
8
1 2ACOFF-12 9 2 3
<25> ACOFF SCL SA00004RZ00
1
<25,34> EC_SMB_CK1
PQ312
10K_0402_5% PR324 PC314
4.7_1206_5%
MDS1521URH 1N SO8
PR322
PR323 2.2_0603_5% 0.047U_0603_25V7M
1 2 10 17 BST_CHG 1 2 2 1 SRP SRN
10U_0805_25V6K
10U_0805_25V6K
ILIM BTST
1
16251_SN
+3VALW 316K_0402_1%
PD303
3
4 @
LODRV
1
16 2 1
PC371
PC372
PR326
GND
SRN
SRP
REGN
BM
100K_0402_1%
2
2
PQ313 RB751V-40_SOD323-2
680P_0603_50V7K
11
1 12
13
14
15
3
2
1
1
1
D
PC377
10_0603_5%
6.8_0603_5%
2
BATT_OUT2
PR328
PC376 BQ24737VDD
2N7002W-T/R7_SOT323-3
PR327
G 1U_0603_25V6K
2
S @
3
2
2 PC373 DL_CHG
B 0.1U_0603_25V7K B
2 1
1
1
PC374
0.1U_0603_25V7K @ PC375
2
0.1U_0603_25V7K
2
BQ24737VDD
PR337
10K_0402_1%
1
1 2
ACIN <17,25,33,8>
PR336
PR335 10K_0402_1%
47K_0402_1%
PACIN
2
2N7002KW_SOT323-3
PQ316
1
D PR339
ACPRN 2
G 12K_0402_1%
2
S
3
A A
For disable pre-charge circuit.

CHARGER
0.2
LA-A321PR01
5 4 3 2 1
A B C D E
0_0402_5%
PR410
3VALW_EN 2 1 3V5V_EN
4.7U_0402_6.3V6M
PC432 @
1
2
1 1
PR402
499K_0402_1%
ENLDO_3V5V 2 1
B+
1
150K_0402_1%
1U_0603_25V6K
1
PR403
PU401
B+ PL401 7 1 3VALW_EN
EN2 EN1
PC407
HCB2012KF-121T50_0805 PC427 PR416
2
1 2 3V_VIN 8 3 1 2 1 2
2
IN FB PR401 PC402 1K_0402_1%
2200P_0402_50V7K
10U_0805_25V6K
0.1U_0402_25V6
6 BST_3V 1 2 1 2 0.01U_0402_25V7K
BS 0_0603_5%
PC403
0.1U_0603_25V7K
1
1
PC404
PC406
PL402
10 LX_3V 1 2
@ LX +3VALWP
2
2
9 4 1.5UH_PCMC063T-1R5MN_9A_20%
GND OUT
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
1
1
4.7_1206_5%
2 5
PG LDO +3VLP
PC408
PC409
PC410
PC411
PC412
<25> SPOK
PR404
SY8208BQNC_QFN10_3X3
2
1
1
100K_0402_1%
100K_0402_1%
PC414
13V_SN
PR428
PR414
4.7U_0603_6.3V6M @
680P_0603_50V7K
PC415 @
@
2
2 2
2
+3VLP +3VALWP
PC419
B+ PL403 6800P_0402_25V7K
HCB2012KF-121T50_0805 PU402 1 2 1 2
1 2 5V_VIN 8 1 3V5V_EN PR413
IN EN1
2200P_0402_50V7K
10U_0805_25V6K
0.1U_0402_25V6
1K_0402_1%
3 PR405 PC421
FB 0_0603_5% 0.1U_0603_25V7K
1
1
PC420
PC417
PC418
6 BST_5V 1 2 1 2
BS
PL404
2
@ 1.5UH_PCMC063T-1R5MN_9A_20% @PJ401
@ PJ401
9 10 LX_5V 1 2 +5VALWP +3VALWP 1 2 +3VALW
GND LX 1 2
5V_VCC 5 4 JUMP_43X118
VCC OUT
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
680P_0603_50V7K 4.7_1206_5%
1
2 7 PR406 @
PG LDO +5VL
1
PC422
PC423
PC424
PC425
PC426
PC428
4.7U_0603_6.3V6M
SY8208CQNC_QFN10_3X3
2
1 5V_SN
@PJ402
@ PJ402
2
2
1
PC430
4.7U_0603_6.3V6M
@ +5VALWP 1 2 +5VALW
3 1 2 3
PC429 @
JUMP_43X118
2
22uF*3
PR407
2.2K_0402_5%
2 1
<25> EC_ON
@ PR408
1 2
<25> MAINPWON
0_0402_5%
3V5V_EN
1M_0402_1%
4.7U_0402_6.3V6M
1
1
PR409
PC431
2
2
4 4

+3VALW/+5VALW
A B C D E
A B C D
PL501
1.35V_B+ 1 2 B+
HCB2012KF-121T50_0805
2200P_0402_50V7K
STATE S3 S5 1.5VP VTT_REFP 0.75VSP
10U_0805_25V6K
0.1U_0402_25V6
4.7U_0805_25V6-K
PC516
AON7408L 1N DFN
1
PC515
PC509
PC501
S0 Hi Hi On On On
5
@
Off
2
@
S3 Lo Hi On On (Hi-Z) +1.35VP
PQ503
PR511 0_0402_5%
UG_1.35V 1 2 UG_1.35V-1 4
S4/S5 Lo Lo Off Off Off
LX_1.35V
3
2
1
1 1
Note: S3 - sleep ; S5 - power off

PR507 PC502 PL502
2.2_0603_5% 0.1U_0603_25V7K 1UH_PCMC063T-1R0MN_11A_20%
BST_1.35V 1 2 BST_1.35V-1 1 2 1 2
+0.675VSP +1.35VP
10U_0805_25V6K
10U_0805_25V6K
1
FDMC7692S_MLP8-5
5
20
19
18
17
16
1
1
PC506
PC504
PU501 PR506 @
4.7_1206_5%
VTT
VLDOIN
BOOT
UGATE
PHASE
21
220U_6.3V_M
1
2
PAD
PQ502
1 15 4 +
PC521
LG_1.35V
VTTGND LGATE
1
PC510 @
2 14 680P_0402_50V7K 2
2
VTTSNS PGND PR505
3
2
1
8.06K_0402_1%
3 13 2 1
GND RT8207MZQW _W QFN20_3X3 CS
4 12
+VTT_REFP VTTREF VDDP
5 11 2 1
+1.35VP VDDQ VDD
+5VALW
PGOOD
PR502
1 5.1_0603_5%
1U_0603_10V6K
TON
PR513 PC507
FB
S3
S5
1_0402_1% 0.033U_0402_16V7K
2
1
<15> DDR_VTT_PG_CTRL 1 2
PC503
2 2
S3_1.35V 7
S5_1.35V 8
10
PC511
1U_0603_10V6K
2
@ PR503
49.9K_0402_5%
<25,32,38,39> SUSP# 1 2
PR501
PR504
@ 0_0402_5% 887K_0402_1%
<25,32> SYSON 1 2 2 1 1.35V_B+
1
@ PC512 @ PC508 1
0.1U_0402_16V6K 0.1U_0402_16V7K 1 PR510 2 8.06K_0402_1%
2
1
@ PC513
100P_0402_25V8K
1 2
PR508
10K_0402_1%
2
FB=0.75V
To GND = 1.5V
To VDD = 1.8V PJ505
2 1 +1.35V
+1.35VP 2 1
@ JUMP_43X118
3 3
PJ507
1 2
+0.675VSP 1 2 +0.675VS
JUMP_43X39
@
4 4

PWR-+1.5VP/+1.8VSP
Custom 0.2
LA-A321PR01
A B C D
5 4 3 2 1
PR615
200K_0402_1%
2 1
SUSP# <25,32,37,39>
D D
1
PR610 PC632
1M_0402_1% 0.01UF_0402_25V7K
2
1
@ PR617 @ PC624
4.7_1206_5% 680P_0603_50V7K
PL601 VGA@ 1 2SNB_1.5V_VRAM 1 2 +1.5VSP PJ601
HCB2012KF-121T50_0805 PU601 2 1 +1.5VS
2 1
B+ 1 2 B+_1.5V_VRAM 8
IN EN
1 PR618
0_0603_5%
PC627
0.1U_0603_25V7K @ JUMP_43X118
0.1U_0402_25V6
10U_0805_25V6K
6BST_1.5V_VRAM
1 2 1 2 PL602 Vo=1.503V
2200P_0402_50V7K
BS
1
1.5UH_PCMC063T-1R5MN_9A_20%
PC631
PC628
9 10 LX_1.5V_VRAM 1 2
+1.5VSP
PC629
GND LX
2
@
30.1K_0402_1%
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
1
330P_0402_50V7K
1
1
4
PR616
FB
PC626
PC630
PC622
PC621
@ PC620
3 7 FB=0.6V
+3VALW
2
ILMT BYP
4.7U_0603_6.3V6K
2
2 5
4.7U_0603_6.3V6K
PG LDO
PC623
1
SY8208DQNC_QFN10_3X3
PC625
1
2
PR612
20K_0402_1%
2
C C
@ PU602 PL603
PJ602 1UH_NRS4018T1R0NDGJ_3.2A_30%
EMI
+3VALW 1 2 8032_VIN 4
IN LX
3 8032_LX 1 2 +1.5VSP_UMA
5 2
PAD-OPEN 3x3m PG GND
4.7_1206_5%
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
1
PR613 @
6 1
FB EN
1
1
PC634
PC615
PC616
@ PC617
22U_0805_6.3V6M
SY8032ABC_SOT23-6
2
2
2
8032_FB
8032_SNUB
PC633
22P_0402_50V8J PR627
B B
2 1 40.2K_0402_1%
2
8032_1.5V_EN 1 SUSP#
1000P_0603_50V7K
PC612 @
1
0.1U_0402_25V6
2
PR619
47K_0402_1%
15K_0402_1%
PR622
PC614
2
1 2
2
@
1
2
PR620
10K_0402_1% +1.5VSP_UMA PJ603
2 1 +1.5VS
2 1
1
@ JUMP_43X118
A A

+1.5VSP(VRAM)
C 0.2
LA-A321PR01
5 4 3 2 1
5 4 3 2 1
D D
+5VALW
0.01U_0402_16V7K
1
PC451
@
PR415
0_0402_5%
2
1 2
@ PR411
+1.05VS_VTTP 0_0402_5%
2
PC448
2.2U_0402_6.3V6M
EMI Part (47.1)
1 2
PL407
2
HCB2012KF-121T50_0805
PR424 1 2
0_0402_5% B+
23
22
21
20
19
18
17
16
15
PU403
10U_0805_25V6K
10U_0805_25V6K
2200P_0402_50V7K
1
0.1U_0402_25V6
SLEW
V5
GND
VIN
VIN
VIN
GSNS
VSNS
TRIP
PC449
1
1
24
PC447
PC442
PC455
REFIN2
1
14
@ PR425 PGND
2
95.3K_0402_1% 25 @
C REFIN 13 C
PGND
2
26
VREF
1
TPS51362RVER_QFN28_4P5X3P5 12
PC444 PGND
1U_0402_6.3V6K 27
PR423 2 RA 11
33K_0402_1% PGND
1 2 28
<25,32,37,38> SUSP# EN 10
PGND
PGOOD
MODE
29 +1.05VS_VTTP
BST
TP
1
LP#
SW
SW
SW
SW
PC443
NC
0.1U_0402_16V6K
PL408
2
9
0.68UH_PCMC063T-R68MN_15.5A_20%
1 2
1
@ PR427
0_0402_5% PR421 PC453
5.1_0603_5% 0.1U_0603_25V7K @ PR422
1 2 1 2 4.7_0805_5%
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
PR429
2
100K_0402_5%
PC446
PC452
@ PC450
1 2
2
1
+3VS @ PC445
680P_0402_50V7K
B B
<25> VCCST_PWRGD
2
@ PJ403
EMI Part (47.1)
1 2
+1.05VS_VTTP 1 2 +1.05VS_VTT
JUMP_43X118
A A

PWR +1.05VS_VCCPP/
Custom 0.2
LA-A321PR01
Date: Friday, March 15, 2013 Sheet 39 of 46
5 4 3 2 1
A B C D
EMI
1.8V controller (35.15), Support component (35.16)

1 1
VGA@
PU180
SY8003DFC_DFN8_2X2
@ PJ453 4 5 PL182
PGND NC
1UH_NRS4018T1R0NDGJ_3.2A_30%
1 2 3 6 1.8V_LX 1 2
+3VALW 1 2 IN LX +1.8VSP
22U_0603_6.3V6M
1
2 7
100K_0402_1%
22P_0402_50V8J
JUMP_43X79 PG EN
1
@ PR182
4.7_0402_1%
PC181
1
1 8
PR181
PC182
FB SGND 9
22U_0603_6.3V6M
22U_0603_6.3V6M
2
2
PGND
22U_0805_6.3V6M
2
1
680P_0402_50V7K
PC184
PC185
@ PC183
PC187
1.8V_FB
1 2
FB=0.6V
2
1
PR183 Note:Iload(max)=3A
49.9K_0402_1%
47K_0402_1% @
<18,25,41,8> DGPU_PWR_EN 1 2
PR184
2
2
1
1
1M_0402_5%
PR185
PC186
EMI Part (47.1)
2
2
0.1U_0402_16V7K 2
2
@ PJ451
1 2
+1.8VSP 1 2 +1.8VS_VGA
JUMP_43X79
800mA,40mils ,Via NO.=2)
PR420
200K_0402_1%
1 2 DGPU_PW R_EN
1
PC454
1M_0402_1% 0.033U_0402_16V7K
2
PR417
2
3 3
@ PR419 @ PC437
4.7_1206_5% 680P_0603_50V7K
PL406 VGA@ 1 2 SNB_0.95V 1 2 +0.95VSP PJ1
HCB2012KF-121T50_0805 PU400 1 2
1 2 +0.95VS_VGA
B+ 1 2 B+_0.95V 8
IN EN
1 PR426
0_0603_5%
PC433
0.1U_0603_25V7K JUMP_43X118 @
10U_0805_25V6K
6BST_0.95V 1 2 1 2
2200P_0402_50V7K
0.1U_0402_25V6
BS
1
1
PC438
PL405
+0.95VSP
PC405
9 10 LX_0.95V 1 2
GND LX
@ PC441
2
1.5UH_PCMC063T-1R5MN_9A_20%
66.5K_0402_1%
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1
330P_0402_50V7K
1
4
PR412
FB
1
PC436
PC435
PC416
PC401
PC440
3 7 FB=0.6V
+3VALW
2
ILMT BYP
2
2 5 @
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
PG LDO
1
1
PC439
PC434
SY8208DQNC_QFN10_3X3
1
2
PR418
100K_0402_1%
2
4 4

+1.8VSP/+0.95VSP
Custom 0.2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-A321PR01
A B C D
A B C D
+3VS_VGA
10K_0402_1%
10K_0402_1%
10K_0402_1%
10K_0402_1%
10K_0402_1%
2
2
PR813
@ 0_0402_5%
<17> GPU_GPIO0 2 1
1
PR802
PR803
PR810
PR805
PR812
1
1
<17>
PR814
<17>
<17>
<17>
<17>
GPU_VID4
GPU_VID3
GPU_VID5
GPU_VID1
GPU_VID2
0_0402_5%
GPU_VID5
GPU_VID4
GPU_VID3
GPU_VID2
GPU_VID1
2 1 +VGA_B+
<18,25,40,8> DGPU_PWR_EN
PL801
1
HCB4532KF-800T90_1812 1
1 2
B+
100P_0402_50V8J
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
2200P_0402_50V7K
0.1U_0402_25V6
1
PC802
1
PC803
PC804
PC805
PC806
PC808
+5VS
2
@
2
@
2
PR818
10_0603_1%
MDU1516URH_POWERDFN56-8-5
5
+3VS +3VS_VGA
1
3211_EN
1
PC807
1
1U_0603_16V6K 4
PQ801
100K_0402_1%
100K_0402_1%
3211_VCC
PR833
PR821
V0.2 2
32
31
30
29
28
27
26
25
@
VID0
VID1
VID2
VID3
VID4
VID5
VID6
EN
2
3
2
1
PR820 24 PR822 PC809
<9> DGPU_PWROK VCC
47K_0402_1% 1 0_0603_5% 0.22U_0603_25V7K
1 2 PWRGD 23 GPU_BOOST 1 2GPU_BOOST-1
1 2
2 BST PL802
IMON 22 3211_DRVH 1 2 0.36UH_PCMB104T-R36MH1R105_30A_20%
3 DRVH
PC810 CLKEN# PR823
21 3211_SW 0_0603_5% 1 4
1 2 4 SW PR832 +VGA_CORE
FBRTN
1
PC811 ADP3211AMNR2G_QFN32_5X5 20 1 2 2 3
PVCC +5VS
5
1 2 3211_FB 5 0_0402_5% @ PR824
1000P_0402_50V7K FB VGA@ PU801 19 3211_DRVL 2 1 4.7_1206_5%
470P_0402_50V7K PC813 3211_COMP 6 DRVL
MDU1511RH_POWERDFN56-8-5
47P_0402_50V8J COMP 18 PC812
2 2
2
PC814 7
3211_VCC PGND 2.2U_0603_10V6K
1 2 3211_COMP-1 2 1 GPU 17 4
AGND
1
1 2 3211_ILIM 8
PQ802
CSCOMP
470P_0402_50V8J PR826 ILIM 33 @ PC815
CSREF
AGND
RAMP
LLINE
CSFB
PR825 26.1K_0402_1% 680P_0603_50V7K
IREF
RPM
2
1K_0402_1%
RT
3
2
1
9
10
11
12
13
14
15
16
1
PR827
3211_IREF
3211_RAMP
4.12K_0402_1%
3211_CSFB
3211_CSCOMP
3211_RT
3211_RPM
2
@ PH801
220K_0402_5%_ERTJ0EV224J
80.6K_0402_1%
2
3211_CSCOMP
2 1
2
@ PR841 @ PR840
PR828
300K_0402_1%
237K_0402_1%~N
1
0_0402_5% 0_0402_5%
PR831
220K_0402_1%
PR830
1
1 2
PR829
1
422K_0402_1%
2
2
1
1
PR835
PR834
0_0402_5%
PC816 PC817
close to IC side
2
1000P_0402_50V7K 560P_0402_50V7K
2
1
PR837 2 1
1K_0402_1%
+VGA_CORE 2 1 3211_RAMP-1 PR836
+VGA_B+
200K_0603_1%
1
3
PC818 PC819 3
1000P_0402_50V7K 1000P_0402_50V7K
2
+VGA_CORE
@ PR839
0_0402_5%
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
GPIO21 GPIO29 GPIO30 GPIO20 GPIO15 2 1
1
VDDC
PC820
PC821
PC822
PC823
PC824
PC825
PC826
PC827
PC828
PC829
PC830
PC831
PC832
PC833
PC834
PC835
VID5 VID4 VID3 VID2 VID1
0 1 1 1 0 1.15V 2
2
+VGA_CORE
1
0 1 1 1 1 1.125V
PR838
1 0 0 0 0 1.100V 0_0402_5%
1 0 0 0 1 1.075V 1 1 1
330U_D2_2V_Y
330U_D2_2V_Y
2
560U_D2_2VM_R4.5M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
22U_0603_6.3V6M
22U_0603_6.3V6M
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
1 0 0 1 0 1.050V + + +
PC836
PC837
PC838
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1
1
3211_CSCOMP
1 0 0 1 1 1.025V
PC840
PC841
PC842
PC843
PC844
PC845
PC846
PC847
PC848
PC849
PC850
PC851
PC852
PC853
PC854
PC855
2 2 2
1 0 1 0 0 1.000V
2
2
1 0 1 0 1 0.975V
1 0 1 1 0 0.950V
1 0 1 1 1 0.925V
1 1 0 0 0 0.900V Default
4
1 1 0 0 1 0.875V 4
1 1 0 1 0 0.850V
1 1 0 1 1 0.825V
1 1 1 0 0 0.800V
1 1 1 0 1 0.775V
PWR-VGA_CORE
C 0.2
LA-A321PR01
A B C D
5 4 3 2 1
PC902
0.1U_0402_25V6
1 2
PR902
54.9_0402_1%
1 2
@ PR903
75_0402_5%
1 2
D +1.05VS_VTT D
PR904
110_0402_1%
1 2
<11> VR_SVID_DAT B+
@ PR905
+1.05VS_VTT <11> VR_SVID_ALRT# 1 2 VGATE <11> EMI
PR906 0_0402_5%
1
1K_0402_1% Acoustic RF request

1 2 PL901
@ PR901
<11> VR_SVID_CLK +1.05VS_VTT HCB2012KF-121T50_0805
75_0402_5% CPU_B+ 1 2
@ PR907
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
2
<25> VR_HOT# 1 2 1 1
2200P_0402_50V7K
33U_25V_M
33U_25V_M
1 1
1
1
4VR_SVID_ALRT#
+ +
0.1U_0402_25V6
0_0402_5% PR909
PC903
PC905
PC906
PC907
PC904
PC908
15U_D2_25VM_R90
15U_D2_25VM_R90
1
1
3VR_SVID_DAT
5VR_SVID_CLK
+ +
2VRHOT#_CPU
6VR_RDY_CPU
PC909
PC901 @ PR908 1K_0402_1%
PC926
PC927
PC910
7VRMP_CPU
1 2 1 2 CPU_B+
47P_0402_50V8J <11> VR_ON EMI
2
2
2@ 2
1EN_CPU
2
1
0_0402_5% 2@ 2@
PC912 1 2 4 4 @
0.01U_0402_25V7K PR910
2
0_0603_5%
C C
VR_HOT#
ALERT#
SDIO
ENABLE
SCLK
VR_RDY
VRMP
PQ904
PQ901
Acoustic
3
2
1
3
2
1
PR911 29 PR912 PC913
2.2_0402_5% AGND 2.2_0603_5% 0.22U_0603_16V7K +CPU_CORE
1 2 VCC_CPU 28 8 BST_CPU 1 2 BST_CPU-1 1 2 @ PL902
+5VALW VSP_CPU 27 VCC
VSP
BST
HG
9 DH_CPU 0.36UH_PDME104T-R36MS0R825_37A_20%
1
VSN_CPU 26 10 LX_CPU 4 1
PC914 DIFFOUT_CPU 25 VSN SW 11
DIFFOUT PGND
1
1U_0603_10V6K FB_CPU 24 12 DL_CPU SW N1 3 2 CSN1
2
COMP_CPU 23 FB LG 13 TSNS_CPU PC915

COMP TSENSE
100K_0402_1%_TSM0B104F4251RZ
@ PR913 ROSC_CPU 22 14 VBOOT_CPU 680P_0603_50V7K
2
ROSC VBOOT
1
5
1 2
CSCOMP
<11> VCCSENSE
1
PR914
CSSUM
CSREF
1SNB_SW3
1
PVCC
0_0402_5% 15K_0402_1% PR915
IMAX
IOUT
ILIM
25W@ PQ902
PQ903
69.8K_0402_1% PR917
1
PR916 10_0402_5%
PH902
2
PU901 PC916 PR919 4 4 47K_0603_1%

21
20
19
18
17
16
15
2
NCP81101_QFN28_4X4 .01U_0402_16V7K 13K_0402_1%
2
2
2
1
PR920
CSSUM_CPU
IMAX_CPU
+5VALW
IOUT_CPU
CSREF_CPU
CSCOMP_CPU
ILIM_CPU
PC917 4.7_1206_5%
CSSUM_CPU
CSREF_CPU
3
2
1
3
2
1
1000P_0402_50V7K
2
2
PR918
1 2
0_0402_5%
PVCC_CPU
@ PR922
1
<11,13> VSSSENSE 1 2
B PC918 PR925 B
0_0402_5% 1000P_0402_50V7K 165K_0402_1%
2
1
PR926 PC920 1 2
1
49.9_0402_1% 330P_0402_50V7K PC921
560P_0402_50V7K
1500P_0402_50V7K
1 2 1 2 4.7U_0603_10V6K
75K_0402_1%
2
1
PR924
1
PR928 100K_0402_1% PH901
PR927
PC922
PC923
1K_0402_1% 220K_0402_5%_ERTJ0EV224J
2
1 2 Close to choke
2
PR929
2
PC924 15.4K_0402_1%
1
10P_0402_50V8J ILIM_CPU 1 2 CSCOMP_CPU

1
FB_CPU 1 2
PC919 PR923 Close to IC side
@ PC925 PR930 470P_0402_50V7K 24K_0402_1%
2
1500P_0402_50V7K 7.5K_0402_1%
2
1 2 1 2
PR931
0_0402_5%
1 2
A A

PWR-CPU_CORE
0.2
5 4 3 2 1
5 4 3 2 1
+CPU_CORE
30 X 22u/0805
RF request
D D
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1 1 1 1 1
1
1
PC1001
PC1002
PC1003
PC1004
PC1005
PC1006
PC1007
PC1008
PC1009
PC1010
2
2
2 2 2 2 2
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1 1 1 1
1
1
PC1014
PC1015
PC1016
PC1017
PC1018
PC1019
PC1020
PC1021
PC1022
PC1023
2
2
2 2 2 2
C C
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1
1 1 1 1
1
1
+
PC1024
PC1025
PC1026
PC1027
PC1028
PC1029
PC1030
PC1031
PC1032
PC1033
@ PC1034
330U_D2_2VM_R9M
2
2
2 2 2 2 2
Reserve
B B
A A

PWR-PROCESSOR DECOUPLING
0.2
5 4 3 2 1
5 4 3 2 1
Version change list (P.I.R. List) Page 1 of 1

for PWR
Item Modify List PG# Reason for change Date Phase
1 For HW sequence 44 ADD PR821 100K ohm pull high +VS_VGA

3/11 SDV
D
2 For HW sequence 37 Remove PC512 0.1U_0402 3/11 SDV D
3 For HW sequence 39 Change PC443 to 0.1U_0402 3/11 SDV
4 For HW sequence 40 Change PC186 to 0.1uf 2/7 SDV
5
For HW sequence 40 Change PC454 to 0.033uf 2/7 SDV
6 For HW sequence 40 Change PR183 to 47K ohm 2/7 SDV

7
C C
9
10
11
12
13
14
B B
15
16
17
A A

PIR (PWR)
Custom 0.2
C38-AMD KABINI Schematic
5 4 3 2 1
1 2 3 4 5
Version change list (P.I.R. List) Page 1 of 1

for HW
Item Reason for change PG# Modify List Date Phase
1
2
A
3 A
6
7
10
11
B B
12
13
14
C C
15
16
17
D D

Title
PIR (EE)
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-A321P 0.2
1 2 3 4 5
5 4 3 2 1
[AC Mode] [DC Mode]

AC_IN BATT+
AC_PRESENT AC_PRESENT
B+ B+
+3VLP/+VL +3VLP/+VL
D EN_5V/EN_3V ON/OFFBTN# D
+5VALW/+3VALW EN_5V/EN_3V T=10ms Moniter ON/OFFBTN#
ON/OFFBTN# +5VALW/+3VALW
T=10ms Moniter ON/OFFBTN# rising edge
EC_RSMRST# EC_RSMRST# T=10ms Moniter ON/OFFBTN# and EN_3/5V both of risgin edge
SUSCLK
SUSCLK
PBTN_OUT# 20ms
T=110ms Moniter ON/OFFBTN# rising edge PBTN_OUT# 20ms T=110ms Moniter ON/OFFBTN# rising edge
PM_SLP_S5# Montier PBTN_OUT# falling edge.
PM_SLP_S4#
C C
PM_SLP_S3#
DDR_VTT_PG_CTRL
+0.675VS
SYSON T=10ms After PM_SLP_S4# moniter PBTN_OUT# immediately, After PM_SLP_S4# falling edge
+1.35V
SUSP# T=10ms After PM_SLP_S3# moniter SYSON rising edge. immediately, After PM_SLP_S3# falling edge
+5VS
+3VS
+1.5VS
+1.05VS
B B
VCCST_PG_PWR (VCCST Powr Good from PWR IC)
VCCST_PG_EC (ALL_SYS_PWRGD,non CPU code VR) immediately, After SUSP# falling edge
VR_ON
+CPU_CORE Vboot
VGATE
PCH_PWROK T=10ms After VCCST_PG_EC rising edge immediately, After SUSP# falling edge
H_CPUPWRGD
SYS_PWROK T=99ms After VCCST_PG_EC assertion immediately, After SUSP# falling edge
PCH_PLTRST#
After CPUPWRGD/PCH_PWRGD/SYS_PWROK assertion
A A

Power Sequence
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.2
5 4 3 2 1
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A B C D E

BOM P/N:4319OP38L5x -- ZIUS7

ZIUS6/S7 M/B Schematics Document

Security Classification Compal Secret Data Compal Electronics, Inc.

AMD SUN Pro

eDP to LVDS translator eDP x1

2Channel Speaker USB 2.0x8

Combo Jack(HP, MIC) AUDIO CODEC HD Audio

SYS BIOS ROM 8M SPI Card Reader

Voltage Rails BOM Structure Table

3 External PCIE Port Table

sensor Thermal VGA

Security Classification Compal Secret Data

25mils to non-comp signals 2 OF 19 Rev1p2

Security Classification Compal Secret Data Compal Electronics, Inc.

DDR_A_D0 AH63 AU37

Security Classification Compal Secret Data Compal Electronics, Inc.

PCH_RTCX1 JME2 Short PAD placement to Bottom side.

ME CMOS U1E HASWELL_MCP_E

：： AY8 HDA_DOCK_RST/I2S1_SFRM SATA_TN3/PETN6_L0 D17

HDA_SDOUT RP14 EMI@

1 2 PCH_JTAG_TCK R53 1 @ 2 0_0402_5%

Security Classification Compal Secret Data Compal Electronics, Inc.

+3VS Rev1p2 SMBus :SPD/PCIe/Security/TP

LPC_AD0 AU14 AN2 SMBCLK 3 4

SPI1 ROM ( 8MByte )

Security Classification Compal Secret Data Compal Electronics, Inc.

Note: SUSACK# and SUSWARN# can be tied together if

T117 R134 1 2 330K_0402_5%

Security Classification Compal Secret Data Compal Electronics, Inc.

RP25 10K_8P4R_5% +3VALW_PCH

0: SPI BUS (Have internal PD)

+3VALW_PCH +3VS +3VALW_PCH 1 2 PCH_GPIO38

Security Classification Compal Secret Data Compal Electronics, Inc.

<16> PCIE_CRX_GTX_N0 PCIE_CRX_GTX_N0 F10 AN8 USB20_N0

Security Classification Compal Secret Data Compal Electronics, Inc.

43_0402_1% +1.05VS_VTT C28 VCC VCC U57

Check list ,XDP use only

Security Classification Compal Secret Data Compal Electronics, Inc.

L11 2 C58 1 2 1U_0402_6.3V6K 18mA

Y20 SPI Y8 C57 1 2 0.1U_0402_16V4Z

Security Classification Compal Secret Data Compal Electronics, Inc.

U1N HASWELL_MCP_E U1O HASWELL_MCP_E U1P HASWELL_MCP_E

Security Classification Compal Secret Data Compal Electronics, Inc.

U1Q HASWELL_MCP_E U1R HASWELL_MCP_E

DC_TEST_AY2_AW2 AY2 A3 DC_TEST_A3_B3 N23

T92 @ CFG0 AC60 AV63

1 : Disabled; No Physical Display Port

0 : Enabled; An external Display Port device is

Security Classification Compal Secret Data Compal Electronics, Inc.

DDR_A_MA12 83 84 DDR_A_MA11 3 G 1 2 SA_ODT0

<5> DDR_A_CAS# DDR_A_CAS# 115 116 SA_ODT0

1 DDR_A_D20 149 150 V0.2

1 1 1 151 152 DDR_A_DQS#2

@ DDR_A_D17 157 158 DDR_A_D22

PCIE_CTX_GRX_P0 AF30 AH30 PCIE_GTX_ARX_P0 0.1U_0402_16V7K 2 1 PX@ C5187 PCIE_CRX_GTX_P0

PCIE_CTX_GRX_P1 AE29 AG29 PCIE_GTX_ARX_P1 0.1U_0402_16V7K 2 1 PX@ C5189 PCIE_CRX_GTX_P1

PCIE_CTX_GRX_P2 AD30 AF27 PCIE_GTX_ARX_P2 0.1U_0402_16V7K 2 1 PX@ C5191 PCIE_CRX_GTX_P2

PCIE_CTX_GRX_P3 AC29 AD27 PCIE_GTX_ARX_P3 0.1U_0402_16V7K 2 1 PX@ C5193 PCIE_CRX_GTX_P3

W29 Y27 AL15

PCI EXPRESS INTERFACE

R29 T26 TMDP

216-0841018 A0 SUN PRO S3