PD - 94962

IRF530NPbF
HEXFET® Power MOSFET
l Advanced Process Technology
l Ultra Low On-Resistance D
VDSS = 100V
l Dynamic dv/dt Rating
l 175°C Operating Temperature
l Fast Switching RDS(on) = 90mΩ
G
l Fully Avalanche Rated
l Lead-Free ID = 17A
S
Description
Advanced HEXFET® Power MOSFETs from International
Rectifier utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This benefit,
combined with the fast switching speed and ruggedized
device design that HEXFET power MOSFETs are well
known for, provides the designer with an extremely efficient
and reliable device for use in a wide variety of applications.

The TO-220 package is universally preferred for all

commercial-industrial applications at power dissipation
levels to approximately 50 watts. The low thermal
resistance and low package cost of the TO-220 contribute TO-220AB
to its wide acceptance throughout the industry.

Absolute Maximum Ratings

Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 17
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 12 A
IDM Pulsed Drain Current  60
PD @TC = 25°C Power Dissipation 70 W
Linear Derating Factor 0.47 W/°C
VGS Gate-to-Source Voltage ± 20 V
IAR Avalanche Current 9.0 A
EAR Repetitive Avalanche Energy 7.0 mJ
dv/dt Peak Diode Recovery dv/dt ƒ 7.4 V/ns
TJ Operating Junction and -55 to + 175
TSTG Storage Temperature Range °C
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
Mounting torque, 6-32 or M3 srew 10 lbf•in (1.1N•m)

Thermal Resistance
Parameter Typ. Max. Units
RθJC Junction-to-Case ––– 2.15
RθCS Case-to-Sink, Flat, Greased Surface 0.50 ––– °C/W
RθJA Junction-to-Ambient ––– 62
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Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 100 ––– ––– V VGS = 0V, ID = 250µA
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.11 ––– V/°C Reference to 25°C, ID = 1mA
RDS(on) Static Drain-to-Source On-Resistance ––– ––– 90 mΩ VGS = 10V, ID = 9.0A „
VGS(th) Gate Threshold Voltage 2.0 ––– 4.0 V VDS = VGS, ID = 250µA
gfs Forward Transconductance 12 ––– ––– S VDS = 50V, ID = 9.0A„
––– ––– 25 VDS = 100V, VGS = 0V
IDSS Drain-to-Source Leakage Current µA
––– ––– 250 VDS = 80V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– ––– 100 VGS = 20V
IGSS nA
Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -20V
Qg Total Gate Charge ––– ––– 37 ID = 9.0A
Qgs Gate-to-Source Charge ––– ––– 7.2 nC VDS = 80V
Qgd Gate-to-Drain ("Miller") Charge ––– ––– 11 VGS = 10V, See Fig. 6 and 13
td(on) Turn-On Delay Time ––– 9.2 ––– VDD = 50V
tr Rise Time ––– 22 ––– ID = 9.0A
ns
td(off) Turn-Off Delay Time ––– 35 ––– RG = 12Ω
tf Fall Time ––– 25 ––– VGS = 10V, See Fig. 10 „
Between lead, D
LD Internal Drain Inductance ––– 4.5 –––
6mm (0.25in.)
nH
from package G

LS Internal Source Inductance ––– 7.5 –––

and center of die contact S

Ciss Input Capacitance ––– 920 ––– VGS = 0V

Coss Output Capacitance ––– 130 ––– VDS = 25V
Crss Reverse Transfer Capacitance ––– 19 ––– pF ƒ = 1.0MHz, See Fig. 5
EAS Single Pulse Avalanche Energy‚ ––– 340… 93† mJ IAS = 9.0A, L = 2.3mH

Source-Drain Ratings and Characteristics

Parameter Min. Typ. Max. Units Conditions
IS Continuous Source Current MOSFET symbol D

––– ––– 17
(Body Diode) showing the
A
ISM Pulsed Source Current integral reverse G

––– ––– 60
(Body Diode) p-n junction diode. S

VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 9.0A, VGS = 0V „
trr Reverse Recovery Time ––– 93 140 ns TJ = 25°C, IF = 9.0A
Qrr Reverse Recovery Charge ––– 320 480 nC di/dt = 100A/µs „
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

Notes:
 Repetitive rating; pulse width limited by „ Pulse width ≤ 400µs; duty cycle ≤ 2%.
max. junction temperature. (See fig. 11) … This is a typical value at device destruction and represents
‚ Starting TJ = 25°C, L = 2.3mH operation outside rated limits.
RG = 25Ω, IAS = 9.0A, VGS=10V (See Figure 12) † This is a calculated value limited to TJ = 175°C .
ƒ ISD ≤ 9.0A, di/dt ≤ 410A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C

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 IRF530NPbF

100 100
VGS VGS
TOP 15V TOP 15V
10V 10V
8.0V 8.0V

I D , Drain-to-Source Current (A)

I D , Drain-to-Source Current (A)

7.0V 7.0V
6.0V 6.0V
5.5V 5.5V
5.0V 5.0V
BOTTOM 4.5V BOTTOM 4.5V

4.5V
10 4.5V 10

20µs PULSE WIDTH 20µs PULSE WIDTH

TJ = 25 °C TJ = 175 ° C
1 1
0.1 1 10 100 0.1 1 10 100
VDS , Drain-to-Source Voltage (V) VDS , Drain-to-Source Voltage (V)

Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics

100 3.5
ID = 15A
RDS(on) , Drain-to-Source On Resistance
I D , Drain-to-Source Current (A)

3.0
TJ = 25 ° C
2.5
(Normalized)

TJ = 175 ° C 2.0

1.5

1.0

0.5
V DS = 50V
20µs PULSE WIDTH VGS = 10V
10 0.0
4.0 5.0 6.0 7.0 8.0 -60 -40 -20 0 20 40 60 80 100 120 140 160 180
VGS , Gate-to-Source Voltage (V) TJ , Junction Temperature ( °C)

Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance

Vs. Temperature
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 IRF530NPbF

1600 20
VGS = 0V, f = 1MHz ID = 9.0A
Ciss = Cgs + Cgd , Cds SHORTED
Crss = Cgd VDS = 80V

VGS , Gate-to-Source Voltage (V)

Coss = Cds + Cgd VDS = 50V
16
VDS = 20V
1200
C, Capacitance (pF)

Ciss

12

800

Coss 8

400
4
Crss
FOR TEST CIRCUIT
SEE FIGURE 13
0 0
1 10 100 0 10 20 30 40
VDS , Drain-to-Source Voltage (V) QG , Total Gate Charge (nC)

Fig 5. Typical Capacitance Vs. Fig 6. Typical Gate Charge Vs.

Drain-to-Source Voltage Gate-to-Source Voltage

100
1000
OPERATION IN THIS AREA
LIMITED BY R DS(on)
ISD , Reverse Drain Current (A)

ID, Drain-to-Source Current (A)

TJ = 175 ° C
100
10

10
100µsec

1
1msec
1
TJ = 25 ° C
Tc = 25°C
Tj = 175°C 10msec
V GS = 0 V Single Pulse
0.1 0.1
0.2 0.4 0.6 0.8 1.0 1.2 1.4
1 10 100 1000
VSD ,Source-to-Drain Voltage (V)
VDS , Drain-toSource Voltage (V)

Fig 7. Typical Source-Drain Diode Fig 8. Maximum Safe Operating Area

Forward Voltage
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 IRF530NPbF

20
RD
VDS

VGS
16 D.U.T.
RG
ID , Drain Current (A)

+
-VDD
12
V GS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
8

Fig 10a. Switching Time Test Circuit

4
VDS
90%
0
25 50 75 100 125 150 175
TC , Case Temperature ( ° C)
10%
VGS
Fig 9. Maximum Drain Current Vs.
td(on) tr t d(off) tf
Case Temperature
Fig 10b. Switching Time Waveforms

10
Thermal Response (Z thJC )

D = 0.50
1

0.20

0.10
0.05 PDM
0.1 0.02 SINGLE PULSE
0.01 (THERMAL RESPONSE) t1
t2

Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJC + TC
0.01
0.00001 0.0001 0.001 0.01 0.1
t1 , Rectangular Pulse Duration (sec)

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

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IRF530NPbF

200
ID

EAS , Single Pulse Avalanche Energy (mJ)

15V
TOP 3.7A
6.4A
160 BOTTOM 9.0A
L DRIVER
VDS

RG D.U.T + 120
V
- DD
IAS A
20V
VGS
tp 0.01Ω
80

Fig 12a. Unclamped Inductive Test Circuit

40
V(BR)DSS
tp
0
25 50 75 100 125 150 175
Starting TJ , Junction Temperature ( °C)

Fig 12c. Maximum Avalanche Energy

Vs. Drain Current
I AS

Fig 12b. Unclamped Inductive Waveforms

Current Regulator
Same Type as D.U.T.

50KΩ

12V .2µF
QG .3µF

VGS +
V
D.U.T. - DS
QGS QGD
VGS
VG 3mA

IG ID
Charge Current Sampling Resistors

Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit

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 IRF530NPbF
Peak Diode Recovery dv/dt Test Circuit

+ Circuit Layout Considerations

D.U.T* • Low Stray Inductance
• Ground Plane
ƒ
• Low Leakage Inductance
Current Transformer
-

+
‚
„
- +
-


RG • dv/dt controlled by RG +
• ISD controlled by Duty Factor "D" VDD
-
• D.U.T. - Device Under Test
VGS

* Reverse Polarity of D.U.T for P-Channel

Driver Gate Drive

P.W.
Period D=
P.W. Period

[VGS=10V ] ***

D.U.T. ISD Waveform

Reverse
Recovery Body Diode Forward
Current Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
[VDD]
Re-Applied
Voltage Body Diode Forward Drop
Inductor Curent

Ripple ≤ 5% [ISD ]

*** VGS = 5.0V for Logic Level and 3V Drive Devices

Fig 14. For N-channel HEXFET® power MOSFETs

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IRF530NPbF

TO-220AB Package Outline

Dimensions are shown in millimeters (inches)
10.54 (.415) 3.78 (.149) -B-
2.87 (.113) 10.29 (.405) 3.54 (.139) 4.69 (.185)
2.62 (.103) 4.20 (.165)
-A- 1.32 (.052)
1.22 (.048)
6.47 (.255)
6.10 (.240)
4
15.24 (.600)
14.84 (.584)
LEAD ASSIGNMENTS
1.15 (.045) LEAD ASSIGNMENTS
MIN HEXFET IGBTs, CoPACK
1 - GATE
1 2 3 2 - DRAIN
1- GATE 1- GATE
2- DRAIN
3 - SOURCE 2- COLLECTOR
3- SOURCE
4 - DRAIN 3- EMITTER
4- DRAIN 4- COLLECTOR
14.09 (.555)
13.47 (.530) 4.06 (.160)
3.55 (.140)

0.93 (.037) 0.55 (.022)

3X 3X
0.69 (.027) 0.46 (.018)
1.40 (.055)
3X
1.15 (.045) 0.36 (.014) M B A M 2.92 (.115)
2.64 (.104)
2.54 (.100)
2X
NOTES:
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB.
2 CONTROLLING DIMENSION : INCH 4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.

TO-220AB Part Marking Information

E XAMPL E : T HIS IS AN IR F 1010
LOT CODE 1789
AS S E MB L E D ON WW 19, 1997 INT E R NAT IONAL PAR T NU MB E R
IN T H E AS S E MB L Y LINE "C" R E CT IF IE R
L OGO
Note: "P" in assembly line
position indicates "Lead-Free" DAT E CODE
YE AR 7 = 1997
AS S E MB L Y
L OT CODE WE E K 19
L INE C

Data and specifications subject to change without notice.

This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.01/04
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Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/