EEC 3111 - D IGITAL E LECTRONICS IN

C OMMUNICATION S YSTEMS

Dr. Hussein Seleem, PhD

Electronics Engineering and Electrical Communications Department
Faculty of Engineering, Tanta University, Tanta, Egypt

Lecture 1: Combainational Logic Ciruicts

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O UTLINE

1 C OURSE I NFORMATION

2 I NTRODUCTION AND R EVISION

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 C OURSE I NFORMATION

C OURSE T EACHING M ATERIALS

Look at the course information and syllabus in pdf format

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 I NTRODUCTION AND R EVISION

I NTRODUCTION AND R EVISION

R EVISION : C H 3 AND C H 4 - C OMBINATIONAL L OGIC C IRCUITS
1 Boolean constants and variables
2 Truth tables
3 Logic gates (OR, AND, Not, NAND, NOR)
4 Describing logic circuits algebraically
5 Implementing circuits from Boolean expressions
6 Boolean theorems
7 DeMorgan’s theorems
8 Universality of NAND and NOR gates
9 Propagation delay
10 Sum of Product (SOP) and Product of Sum (POS) forms
11 Simplifying logic circuits
12 Combinational logic circuit Design
13 Karnaugh map

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 I NTRODUCTION AND R EVISION

B OOLEAN C ONSTANTS AND VARIABLES

B OOLEAN VARIABLE :
A quantity that may, at different times, be equal to either 0 or 1.
It is often used to represent the voltage level present on a wire.
In digital systems, value of 0 might be assigned to any voltage in the range 0 :
0.8 V, while value of 1 might be assigned to any voltage in the range 2 : 5 V.

B OOLEAN ALGEBRA ALLOWS ONLY TWO VALUES —0 AND 1.

Logic 0: can be: false, off, low, no, open switch.
Logic 1: can be: true, on, high, yes, closed switch.

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 I NTRODUCTION AND R EVISION

T RUTH TABLE
T RUTH TABLE
Describes relationship between input & output of a logic circuit.
Number of entries = 2No of inputs

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 I NTRODUCTION AND R EVISION

L OGIC G ATES

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 I NTRODUCTION AND R EVISION

D ESCRIBING LOGIC CIRCUITS ALGEBRAICALLY

Three basic operations (OR, AND,
NOT) can describe any logic circuit.

RULES OF EVALUATING THE OUTPUT

Perform all inversions of single
terms.
Perform all operations within
parenthesis.
Perform AND operation before
OR operation unless
parenthesis indicate otherwise.
If an expression has a bar over
it, perform operations inside the
expression, and then invert the
result.

Best way to analyze a circuit is to use

a truth table.
Inversely you can implement logic
circuits From Boolean Expressions

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 I NTRODUCTION AND R EVISION

B OOLEAN AND D E M ORGAN ’ S THEORIES

S INGLE VARIABLE THEORIES AND D UALITY

x + 0 = x (0: identity element on "+") x • 1 = x (1: identity element on "•")

x + x̄ = 1 (x̄: is the complement of x) x • x̄ = 0
x +x =x x •x =x
x +1=1 x •0=0

MULTI - VARIABLE THEORIES

x + y = y + x (commutative) x •y =y •x
x + (y + z) = (x + y ) + z (associative) x(yz) = (xy )z = xyz
x(y + z) = xy + xz (distributive) x + (yz) = (x + y )(x + z)
x + xy = x x(x + y ) = x
x̄ + xy = x̄ + y x̄(x + y ) = x̄y

D E M ORGAN ’ S THEORY

x + y = x̄ • ȳ x • y = x̄ + ȳ

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 I NTRODUCTION AND R EVISION

U NIVERSALITY OF NAND AND NOR GATES

NAND or NOR gates can be used to create the three basic logic
expressions.

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 I NTRODUCTION AND R EVISION

U NIVERSALITY OF NAND AND NOR GATES

NAND or NOR gates can be used to create the three basic logic
expressions.

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 I NTRODUCTION AND R EVISION

P ROPAGATION DELAY
P ROPAGATION DELAY
It is the time it takes for a system to produce output after it receives an input.
Speed of a logic circuit is related to propagation delay.
Parts to implement logic circuits have a data sheet that states value of prop. delay.
Used to assure that the circuit can operate fast enough for the application.

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 I NTRODUCTION AND R EVISION

S UM OF P RODUCT (SOP) & P RODUCT OF S UM (POS)

SOP & POS

The output of any logic circuit can be written as a function of its
inputs and this function may be written as POS or SOP.
SOP expression will appear as two or more AND terms ORed
together.
POS form consists of two or more OR terms (sums) ANDed
together.

SOP
F 1 = ABC + ĀB C̄

POS
F 2 = (A + B̄ + C)(A + C)

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 I NTRODUCTION AND R EVISION

S IMPLIFYING LOGIC CIRCUITS

Logic circuits can be simplified using Boolean algebra and K-mapping or any other method.

E XAMPLE

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 I NTRODUCTION AND R EVISION

C OMBINATIONAL LOGIC CIRCUIT D ESIGN

C OMBINATIONAL VS . S EQUENTIAL C IRCUIT

Combinational: The output at any time is determined only by the present inputs and it doesn’t
depends on previous inputs.
Sequential: It employ memory element in addition to the combinational circuit and its output is a
function of current inputs and the state of the memory input.

T O SOLVE ANY LOGIC DESIGN PROBLEM :

Interpret the problem and set up its truth table.
Write the AND (product) term for each case where output = 1.
Combine the terms in SOP form.
Simplify the output expression if possible.
Implement the circuit for the final, simplified expression.

E XAMPLE
Design a logic circuit with three inputs, A, B, and C. Output to be HIGH only when a majority
inputs are HIGH.

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 I NTRODUCTION AND R EVISION

C OMBINATIONAL LOGIC CIRCUIT D ESIGN

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 I NTRODUCTION AND R EVISION

K ARNAUGH MAP (K- MAP )

A graphical method of simplifying logic equations or truth tables.

Theoretically can be used for any number of inputs — practically limited to 5 or 6 variables.
Adjacent K map square differ in only one variable both horizontally and vertically.
A SOP expression can be obtained by ORing all squares that contain a 1.
Looping 1s in adjacent groups of 2, 4, or 8 will result in further simplification.
When largest possible groups is reached, only common terms are placed in final expressio
Looping may also be wrapped between top, bottom, and sides.

C OMPLETE K MAP SIMPLIFICATION PROCESS :

Construct the K map, place 1s as indicated in the truth table.

Loop 1s that are not adjacent to any other 1s.
Loop 1s that are in pairs.
Loop 1s in octets even if they have already been looped.
Loop quads that have one or more 1s not already looped.
Loop any pairs necessary to include 1st not already looped.
Form the OR sum of terms generated by each loop.
When a variable appears in both complemented and uncomplemented form within a loop, that variable is eliminated from
the expression.
Variables that are the same for all squares of the loop must appear in the final expression.

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