Wearable Healthcare Monitoring System(WHMS)

Individual Project
under
SMDP-C2SD

Department of Electronics and Communication Engineering

National Institute of Technology Nagaland

SMDP-C2SD 2 November 2016

Outline
 Introduction
 Objective
 Block diagram of WHMS
 Sensor Module specifications
 ADC specifications
 Processor specifications
 RF Module specifications
 External Memory specifications
 Display specifications
 Current Project Status
 Timeline and Work plan of WHMS

2 SMDP-C2SD 2 November 2016

Introduction
 The Proposed WHMS project will be able to measure the
heart rate, electrodermal activity, along with temperature
and humidity of the human body.
 A bracelet with all the required sensors the Measuring
unit will be placed around a human arm.
 The gathered information from the sensors will be
received by the Base station with the help of radio
transceivers

3 SMDP-C2SD 2 November 2016

Objective
 Knowing the limits of a human body can help improve
performance and avoid extortion scenarios.
 The Proposed project aims at developing a low cost
prototype of a Wearable Healthcare Monitoring System.
 The motivation behind choosing this project is to
facilitate the societies in the remote locations of
northeast regions in getting healthcare services which
might not be possible otherwise due to the very low
doctor-to- patient ratio.

4 SMDP-C2SD 2 November 2016

Block diagram of WHMS

Basic building block of the proposed WHMS(Measuring

I/OUnit)
PORT

Basic building block of the proposed WHMS(Base Station)

5 SMDP-C2SD 2 November 2016
Sensor Module specifications
Skin Heart Rate Temperature and Humidity
Parameters
(GSR sensor) (PAH8001EI-2G) (SHT31)

NTC (Temp.)
Sensor type Resistive Optical Sensor
Capacitive (Humidity)

30 – 210
Range 40° to +125°C
0.1 – 1000 micro siemens bpm
0 - 100% RH

Supply Voltage 3.3 V 3.3 V 3.3V

Power
Low power (mW) 4.95 mW 2.6 mW
consumption

0.001 micro Siemens

0.015°C
Resolution Sensitivity adjustable via a High sensitivity
0.01 %RH
potentiometer

Body Temperature and

Constraint Skin conductance Heart Rate Detection
Humidity
Operating Temperature -40 to 80°C -40 to 60°C -40 to125°C
Interface NA I2C,SPI(1 Mbit/s) I2C(speeds 1MHZ)
Output Analog Digital Digital
Compatible Programmable Standard
Standard MCUs/FPGA Standard MCUs/FPGA
Boards (CPB) MCU/FPGA

6 SMDP-C2SD 2 November 2016

ADC Specification
Parameters AD7991
Supply Voltage, Vdd 2.7V to 5.5V
Number of Bits 12 ADC with fast conversion time: 1
μs typical
Channels 4 analog input channels/3 analog
input channels with reference input
Interface I2C compatible serial interface
supports standard, fast, and High-
speed modes
Power consumption 1.38mW(Fully operational)
Positive reference voltage, Vref+ 2.5V
Type SAR
Clock frequency 3.4 MHz
Operating temperature −40°C to 125°C

7 SMDP-C2SD 2 November 2016

Measuring Unit: Processor Specification
Parameters Ardunio Nano
(ATmega328/P)
I-V ratings Operating Voltage: 1.8 - 5.5V
Temperature Range: -40°C to 105°C
Power Consumption at 1MHz, 1.8V, 25°C
Active Mode: 0.2mA
Power-down Mode: 0.1μA
Power-save Mode: 0.75μA
Architecture Advanced RISC Architecture
131 Powerful Instructions
Most Single Clock Cycle Execution
32 x 8 General Purpose Working Registers
Fully Static Operation
Up to 20 MIPS Throughput at 20MHz
On-chip 2-cycle Multiplier
Frequency Speed Grade:
0 - 4MHz @ 1.8 - 5.5V
0 - 10MHz @ 2.7 - 5.5V
0 - 20MHz @ 4.5 - 5.5V
Memory 32KBytes of In-System Self-Programmable Flash program Memory
1KBytes EEPROM – 2KBytes Internal SRAM – Write/Erase
Cycles: 10,000 Flash/100,000 EEPROM
I/O Pins 23 Programmable I/O Lines – 28-pin PDIP
Peripheral 6-channel 10-bit ADC in PDIP Package
Two Master/Slave SPI Serial Interface
One Programmable Serial USART
One Byte-oriented 2-wire Serial Interface
Programmable Watchdog Timer with Separate On-chip Oscillator

8 SMDP-C2SD 2 November 2016

Base Station: Processor Specification
Parameters Basys 3 Artix-7 FPGA Board Zed Board
(XC7A35T-1CPG236C) Zynq-7000 ARM/FPGA
XC7Z020-CLG484
I-V ratings (Voltage/Current) (Voltage/Current)
FPGA Board-5V(External) FPGA Board-12V(External)
FPGA I/O,USB Ports,Clocks,Flash,PMODS-3.3V, 2A/0.1 to 1.5A FPGA I/O,USB Ports,Clocks,Flash,PMODS-3.3V,2A/0.1 to 1.5A
FPGA Core-1.0V, FPGA Core-1.0V,
2A/0.2 to 1.3A 2A/0.2 to 1.3A
FPGA Auxiliary and Ram-1.8V, FPGA Auxiliary and Ram-1.8V,
300mA/ 0.05 to 0.15A 300mA/ 0.05 to 0.15A
Architecture 33,280 Logic Cells 215,360 Logic Cells
5,200 Slices CLBs 33,650 Slices CLBs
400 Distributed RAM 2,888 Distributed RAM
90 DSP Slices 740 DSP Slices
5 CMT(each with 1MMCM and 1PLL) 10 CMT(each with 1MMCM and 1PLL)
1 XADC 1 XADC
5 I/O Banks 10 I/O Banks
250 Max user I/O 500 Max user I/O
Frequency 100 MHz 33.333MHz (PS)
Internal clock speeds exceeding 450MHz 100 MHz (PL)
Memory 100(18kb)Block RAM 18Kb(730) Block RAM
50 (36kb)Block RAM 36Kb(365)Block RAM
1,800 Max(Kb) 13,140 Max(Kb)
I/O Pins 1 XADC 1 XADC
5 I/O Banks 7 I/O Banks
250 Max user I/O 7 Max user I/O

9 SMDP-C2SD 2 November 2016

RF Module Specification
Parameters Specification
Supply voltage 3.3V
Frequency 2.4GHz
Supports Zigbee and MiWi
Network Standard
protocols
Date rate Up to 650kbps
Interface 4-wire SPI
Modulation For low power density
Transmitting Power 60mW
To have good noise rejection
Receiver Sensitivity
property
Distance 90 meter
Antenna Type Whip antenna

10 SMDP-C2SD 2 November 2016

External Memory and Display
Specification
Parameters Specification
Supply Voltage 2.7V to 3.6V
Size 1GB / 2GB
Interface SPI mode
Speed Default Mode: Variable clock rate
0-25MHz, up to 12.5MB/sec
High Speed Mode : Variable clock
rate 0-50MHz, up to 25MB/sec
External Memory Specification

Parameters Specification
Supply Voltage 3.3V
16×2 character LCD with parallel
Type and Interface
interface
192 predefined characters including
Number of character 93 ASCII characters
Up to 8 user-definable characters
Power Consumption Low power operation
Display Specification
11 SMDP-C2SD 2 November 2016
Current Project Status
 Finalization and detailed specification of the hardware
resources to be utilized for the individual FPGA board
level SMDP-C2SD project.
 Procurement of Hardware Resources is in process.
 Finalization of the overall block diagram and sub-modules
to be implemented.

12 SMDP-C2SD 2 November 2016

Timeline and Work plan of WHMS

13 SMDP-C2SD 2 November 2016