Idsp FFT PDF

IMPLEMENTATION OF DSP 1 IMPLEMENTATION OF DSP 2
FFT BASICS + FFT PIPLELINES April 6, 2018 FFT BASICS + FFT PIPLELINES April 6, 2018
TOPICS
• Discrete Fourier Transform
PIPELINE IMPLEMENTATIONS OF THE
• Fast Fourier Transform
FAST FOURIER TRANSFORM (FFT) – Decimation in time
– Decimation in frequency
• FFT pipelines:
– Radix-2 multi-path delay commutator
– Radix-2 single-path delay feedback
• Consulted work: – Delay buffer implementation
Chiueh, T.D. and P.Y. Tsai, OFDM Baseband Receiver Design for Wireless – Radix-4 algorithms
Communications, John Wiley and Sons Asia, (2007).
Second edition of 2012 available as e-book via UT Library.
© Sabih H. Gerez, University of Twente, The Netherlands © Sabih H. Gerez, University of Twente, The Netherlands

DISCRETE FOURIER TRANSFORM (DFT) INVERSE DFT (IDFT)

• Consider a block of N samples of a (possibly complex-valued) • The inverse DFT is almost the same computation as the DFT:
data stream:
• The discrete Fourier transform of this block is given by:
TWIDDLE FACTORS MATRIX REPRESENTATION OF DFT

• Define: • The DFT can be expressed in matrix form:
• Then DFT becomes:
• is called a twiddle factor (it is a number on the unit circle

in the complex plane).
• Multiplying with a twiddle factor is a vector rotation. How to • Number of complex multiplications involved (including trivial
implement? ones with 1, j, etc.):

DFT VISUALIZATION FAST FOURIER TRANSFORM

• The DFT basically matches frequencies. • Reduces the number of calculations in a DFT from ଶ
to
• The following picture originates from Wikipedia (entry: “DFT
matrix”): • First published by Cooley and Tukey in 1965.
• Check e.g. Wikipedia page for historical background dating
back to Gauss in 1805 (earlier than Fourier!).
• Two variants:
– Decimation in time
– Decimation in frequency.
DECIMATION-IN-TIME FFT (1) DECIMATION-IN-TIME FFT (2)

• Split odd and even terms in DFT definition: • Consider first half of outputs:
• Rewrite, using :


• DFT has been expressed in terms of half-size DFTs: • Now consider second half of outputs:
DFT of even
samples
DFT of odd
samples

• Make use of the following identities: • The expression for the second half becomes the same as for
the first except for a minus sign:

DECIMATION-IN-TIME FFT (7) DECIMATION-IN-TIME BUTTERFLY

• elementary FFT operation with two inputs and two outputs
• consisting of one complex multiplication, one complex addition
N/2-point and one complex subtraction:
DFT
N/2-point
DFT
DECIMATION-IN-TIME FFT (8) 8-POINT DECIMATION-IN-TIME FFT

• One decimation-in-time step defines an N-point DFT in terms of
two N/2-point DFTs. They are combined by means of
butterflies.
• Applying the principle recursively, results in a computation that
consists of butterflies only.

COMPLEXITY REDUCTION IMPLEMENTATION ISSUES

• Buffering of input is needed because of block-based nature.
• Number of computations has been reduced:
– From for the DFT • One could e.g. use a ping-pong memory:
– While the input is filling one memory, the FFT could consume samples of
the other memory.
– To for the FFT
– After processing one block of samples, the memories change roles.
• Note the bit reversal of the addresses:
– Address order can be found from increasing binary addresses read in
reverse order 4 = 1002 e.g. becomes 1 = 0012.
DECIMATION-IN-FREQUENCY FFT (1) DECIMATION-IN-FREQUENCY FFT (2)

• Split input block in first and second half and consider the • Shift index in second sum:
outputs with even index:

• Using simplification rules mentioned earlier: • This is a half-size DFT applied to an input stream consisting of
pairs of the original input stream:

• Now consider the outputs with odd index:
• With the usual type of simplifications:
• This is a half-size DFT applied on a sequence obtained by

taking the difference of pairs of the input and multiplying them
with factor .

DECIMATION-IN-FREQUENCY FFT (7) DECIMATION-IN-FREQ. BUTTERFLY

• Similar to the decimation-in-time butterfly, but location of
multiplication is now at the output side.
N/2-point
DFT Decimation in time Decimation in frequency
N/2-point
DFT
8-POINT DECIMATION-IN-FREQ. FFT SUMMARY FFT BASICS

• Decimation-in-time (DIT) FFT:
– “Divide and conquer” approach to DFT, based on
grouping even and odd inputs in DFT definition
– Butterfly: multiply before add/subtract
• Decimation-in-frequency (DIF) FFT:
– “Divide and conquer” approach based on grouping
even and odd outputs
– Butterfly: multiply after add/subtract
• Both are of radix-2 type: problem size is
reduced by 2 at each stage

FFT IMPLEMENTATIONS RADIX-2 MULTI-PATH DELAY

• FFTs can be realized on all kind of platforms: COMMUTATOR (R2MDC)
– Programmable processors
– Dedicated hardware • Pipeline solution:
• Here attention is paid to one type of implementation, viz. the – “Stream-like” processing of block-based algorithm.
FFT pipelines. An FFT pipeline transforms a computation with a • Examples based on 8-point FFT:
block processing nature into one of a streaming nature. – solutions scale for higher powers of 2.
• Issues of concern:
– Area
• Originally proposed in:
– Speed
– Power Rabiner, L.R. and B. Gold, Theory and Application of Digital Signal
Processing, Prentice-Hall, Englewood Cliffs, New Jersey, (1975).
– Memory access
R2MDC FOR 8-POINT FFT R2MDC STEP-BY-STEP

A
• Consists of
Butterfly
Butterfly
Butterfly
– Commutators, switches that send the data either straight ahead or 4D 2D 1D
crisscross
– Butterfly blocks (either for DIT or DIF)
2D 1D
– Delay buffers
B
Butterfly
Butterfly
Butterfly
4D 2D 1D
2D 1D
RADIX-2 SINGLE-PATH DELAY R2SDF ELEMENT

FEEDBACK (R2SDF)
• Element:
– Either shifts first half of input in
delay buffer and second half of
Delay line
• Alternative pipeline solution, with optimized memory size output out of delay buffer (blue);
– Or shifts second half of input into
butterfly together with first half from
Butterfly
delay buffer, first half of output to
• Originally proposed in: next stage and second half output
Groginsky, H.L. and G.A. Works, A Pipeline Fast Fourier Transform, IEEE into delay buffer (red).
Transactions on Computers, Vol.C-19(11), pp. 1015-1019, (November
1970).

SYMBOLILC REPRESENTATION OF R2SDF FOR 8-POINT FFT

R2SDF ELEMENT
Delay line
feedback 4D 2D 1D
Delay line
Butterfly
Butterfly
Butterfly
Butterfly
Butterfly
single path single path
R2SDF STEP-BY-STEP R2SDF EFFICIENCY

B
A 4D 2D 1D • It needs to operate at same speed as input sample rate.
E F
• Hardware utilization is 50%.
Butterfly
Butterfly
Butterfly
• Number of delay elements for N-point FFT:
C D G H
– R2SDF:
E: . . . . . . 0 1 2 3 4 5 6 7 – R2MDC:
A: . . . . 0 1 2 3 4 5F:6 .7 . . . 0 1 2 3 4 5 6 7
B: 0 1 2 3 4 5 6 7 G: . . . . 0 1 2 3 4 5 6 7
• R2SDF and R2MDC have the same number of (complex)
C: 0 1 2 3 4 5 6 7 H: . . . . . . 0 1 2 3 4 5 6 7
adders and multipliers.
D: . . . . 0 1 2 3 4 5 6 7

DELAY-BUFFER IMPLEMENTATION DUAL-PORT RAM DELAY BUFFER

• The straightforward implementation of a delay buffer in
hardware would be a shift register. • Dual-port RAM:
– One read port with its own
• Such an implementation is not convenient (think of e.g. a 1024- data and address
point FFT): – One write port with its own
Dual-port RAM
– Memory elements implemented by D-flipflops are large! data and address Write Write
– Shifting all data at every clock cycle consumes a lot of energy! • Cyclic buffer: L+1 locations addr. data
to store L items.
+1 Read Read
• Much better idea to keep the data in RAM and shift the address
pointer(s) instead. addr. data
DELAY BUFFER WITH TWO SINGLE- SPECIAL-PURPOSE RAMS

PORT RAMS input
WL-1 • Replace address decoder of RAM by single-bit shift register.
• Idea is to WL-1
• Only one D-flipflop has output 1.
alternatively read • Not much switching activity in shift-register (no waste of power).
from and write to the
two RAMs. Addr. Addr.
• Two single-port
wen
wen
RAMs are cheaper 1 1
+1
than one dual-port
RAM1 RAM2
RAM.
• Use LSB of address
WL
to connect to “write
enable” (wen). output

RADIX-4 FFT RADIX-4 DIF (1)

• Has both “decimation in time” as “decimation in frequency”
variants.
• Idea is to express DFT as the combination of 4 DFTs whose
sizes are one fourth of the original DFT.
• Takes advantage of the following symmetries:
• This leads to a reduction of the number of multipliers

(multiplication by j can be performed without multiplier).
RADIX-4 DIF (2) RADIX-4 DIF BUTTERFLY
Scaling with +1, -1, +j, -j


MULTIPLIER & ADDER COMPLEXITY RADIX-22 BUTTERFLY

• Radix-2 decomposition:
– Number of stages:
– Complex multiplications per stage: in total:
– Complex additions per stage: in total:
• Radix-4 decomposition:
– Number of stages:
– Complex multiplications per stage: in total:
– Complex additions per stage: in total:
RADIX-22 BUTTERFLY EVALUATION RADIX-4 MULTI-PATH DELAY

COMMUTATOR (R4MDC) PIPELINE FOR
• Radix-22 has the same number of multipliers as radix-4.
• It has fewer additions:
16-POINT FFT
• In a similar way, a radix-8 butterfly can be decomposed in a 12D 3D

radix-23 butterfly.
Butterfly
Butterfly
8D 1D 2D
4D 2D 1D
3D

RADIX-4 SINGLE-PATH DELAY EVALUATION RADIX-4 PIPELINES

FEEDBACK (R4SDF) PIPELINE FOR • The multi-path structure:
16-POINT FFT – Has a high memory overhead;
– Has 100% multiplier utilization;
4D 1D – Can operate at one quarter of sample frequency.
4D 1D
• The single-path structure:
4D 1D – Has minimal memory;
– Has a 75% multiplier utilization (multiplier drawn outside butterfly!)
Butterfly
Butterfly
– Operates at sample frequency.

Idsp FFT PDF

Caricato da

Informazioni sul documento

Titolo originale

Copyright

Formati disponibili

Condividi questo documento

Condividi o incorpora il documento

Opzioni di condivisione

Hai trovato utile questo documento?

Questo contenuto è inappropriato?

Copyright:

Formati disponibili

Idsp FFT PDF

Caricato da

Copyright:

Formati disponibili

IMPLEMENTATION OF DSP 1 IMPLEMENTATION OF DSP 2

IMPLEMENTATION OF DSP 3 IMPLEMENTATION OF DSP 4

DISCRETE FOURIER TRANSFORM (DFT) INVERSE DFT (IDFT)

• The discrete Fourier transform of this block is given by:

TWIDDLE FACTORS MATRIX REPRESENTATION OF DFT

• Then DFT becomes:

• is called a twiddle factor (it is a number on the unit circle

IMPLEMENTATION OF DSP 7 IMPLEMENTATION OF DSP 8

DFT VISUALIZATION FAST FOURIER TRANSFORM

DECIMATION-IN-TIME FFT (1) DECIMATION-IN-TIME FFT (2)

IMPLEMENTATION OF DSP 11 IMPLEMENTATION OF DSP 12

DECIMATION-IN-TIME FFT (3) DECIMATION-IN-TIME FFT (4)

DECIMATION-IN-TIME FFT (5) DECIMATION-IN-TIME FFT (6)

IMPLEMENTATION OF DSP 15 IMPLEMENTATION OF DSP 16

DECIMATION-IN-TIME FFT (7) DECIMATION-IN-TIME BUTTERFLY

DECIMATION-IN-TIME FFT (8) 8-POINT DECIMATION-IN-TIME FFT

IMPLEMENTATION OF DSP 19 IMPLEMENTATION OF DSP 20

COMPLEXITY REDUCTION IMPLEMENTATION ISSUES

DECIMATION-IN-FREQUENCY FFT (1) DECIMATION-IN-FREQUENCY FFT (2)

IMPLEMENTATION OF DSP 23 IMPLEMENTATION OF DSP 24

DECIMATION-IN-FREQUENCY FFT (3) DECIMATION-IN-FREQUENCY FFT (4)

DECIMATION-IN-FREQUENCY FFT (5) DECIMATION-IN-FREQUENCY FFT (6)

• This is a half-size DFT applied on a sequence obtained by

IMPLEMENTATION OF DSP 27 IMPLEMENTATION OF DSP 28

DECIMATION-IN-FREQUENCY FFT (7) DECIMATION-IN-FREQ. BUTTERFLY

8-POINT DECIMATION-IN-FREQ. FFT SUMMARY FFT BASICS

IMPLEMENTATION OF DSP 31 IMPLEMENTATION OF DSP 32

FFT IMPLEMENTATIONS RADIX-2 MULTI-PATH DELAY

R2MDC FOR 8-POINT FFT R2MDC STEP-BY-STEP

RADIX-2 SINGLE-PATH DELAY R2SDF ELEMENT

IMPLEMENTATION OF DSP 39 IMPLEMENTATION OF DSP 40

SYMBOLILC REPRESENTATION OF R2SDF FOR 8-POINT FFT

single path single path

R2SDF STEP-BY-STEP R2SDF EFFICIENCY

IMPLEMENTATION OF DSP 43 IMPLEMENTATION OF DSP 44

DELAY-BUFFER IMPLEMENTATION DUAL-PORT RAM DELAY BUFFER

DELAY BUFFER WITH TWO SINGLE- SPECIAL-PURPOSE RAMS

IMPLEMENTATION OF DSP 47 IMPLEMENTATION OF DSP 48

RADIX-4 FFT RADIX-4 DIF (1)

• This leads to a reduction of the number of multipliers

RADIX-4 DIF (2) RADIX-4 DIF BUTTERFLY

Scaling with +1, -1, +j, -j

IMPLEMENTATION OF DSP 51 IMPLEMENTATION OF DSP 52

MULTIPLIER & ADDER COMPLEXITY RADIX-22 BUTTERFLY

RADIX-22 BUTTERFLY EVALUATION RADIX-4 MULTI-PATH DELAY

• In a similar way, a radix-8 butterfly can be decomposed in a 12D 3D

IMPLEMENTATION OF DSP 55 IMPLEMENTATION OF DSP 56

RADIX-4 SINGLE-PATH DELAY EVALUATION RADIX-4 PIPELINES

– Operates at sample frequency.

Potrebbero piacerti anche