IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, VOL. 57, NO.
1, JANUARY 2008
A Miniaturized Low-Cost 60–1000-MHz PCB
Spectrum Analyzer
Christopher E. Rehorn and N. Scott Barker, Member, IEEE
Abstract—This paper presents the development of a printed-
circuit-board (PCB) spectrum analyzer for analyzing the radio
frequency (RF) input power in a spectral range of 60–1000 MHz.
The architecture is based on a standard superheterodyne receiver
and is implemented on a low-cost, four-layer, FR-4 PCB. The
design uses a frequency-hopped superheterodyning technique to
prevent strong local-oscillator harmonics from causing spurs in
the spectrum output. The system has a minimum detectable signal
of −98 dBm and fits on a PCB with a form factor equivalent to
a half-size PCI card. The resolution bandwidth is 7 kHz, and the
dynamic range varies from 30 dB at 30-kHz offset to > 62 dB for
over 30-MHz offsets. This RF PCB spectrum analyzer is entirely
constructed of commercial off-the-shelf components, enabling the
design to be low-cost and low-power (3.66-W dc).
Index Terms—Printed circuits, printed circuit layout, radio
spectrum management, spectrum analysis.
I. I NTRODUCTION
T HROUGHOUT the history of microwave and radio
frequency (RF) circuit engineering, the products devel-
oped by the industry were available only in expensive military
communication, radar, and navigation equipment. In recent
years, however, the ubiquitous use of cellular-phone technology
and 802.11 standards for wireless Internet access has promoted
the widespread development of low-cost, high-performance,
off-the-shelf RF components. Because of the high demand
for these products, a new industry of RF- and microwave-
component suppliers has emerged, allowing system designers
to have much flexibility in designing high-performance, low-
cost RF systems.
This paper presents the specification, design, and im-
plementation of a miniaturized and low-cost 60–1000-MHz
spectrum analyzer implemented for use on a peripheral-
component-interconnect (PCI) card using commercial off-
the-shelf (COTS) components. The system was implemented
with COTS components to enable large-scale and low-cost
manufacturing. The hardware is designed to fit into a desktop
personal computer (PC) for use in an integrated security device
and is based on a superheterodyne receiver with a tunable local
Manuscript received August 29, 2006; revised September 6, 2007. This work
was supported by a U.S. Air Force SBIR Contract.
C. E. Rehorn was with the Charles L. Brown Department of Electrical and
Computer Engineering, University of Virginia, Charlottesville, VA 22904-4160
USA. He is now with Agilent Technologies, Colorado Springs, CO 80901 USA.
N. S. Barker is with the Charles L. Brown Department of Electrical and
Computer Engineering, University of Virginia, Charlottesville, VA 22904-
4160 USA.
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TIM.2007.908605
0018-9456/$25.00 © 2008 IEEE
205
TABLE I
DESIGN PARAMETERS FOR THE MINIATURIZED
PCB SPECTRUM ANALYZER
oscillator (LO) in the upconversion stage of the receiver. Its
parallel port interface allows this small and low-power design
to be used with any PC. An algorithm is used along with the
hardware to establish a means by which the miniaturized spec-
trum analyzer can obtain a usable input range of 60–1000 MHz
with a minimal number of low-power spurs. Such a system
may have many applications including low-cost instrumenta-
tion for instructional labs in which the PCI spectrum analyzer
is simply an additional card placed within a benchtop computer.
In addition, the embedded security systems could use such
a small and low-cost spectrum analyzer for RF-identification
applications [1].
The motivation for this printed-circuit-board (PCB) spectrum
analyzer is for implementation in an embedded security system
on a PCI platform. The goal is to develop a technique to finger-
print a PC based on its idiosyncratic RF spectral content within
the computer housing. This requires embedding a spectrum
analyzer onto a PCI card that permanently fits inside a PC.
Based on this requirement, an Advantest R3131A spectrum
analyzer was used to repeatedly analyze the RF spectrum in
120 identical PCs. The spectrum was captured with a quarter-
wave monopole antenna centered at 750 MHz. The results
obtained from this experiment provided the specification for the
spectrum analyzer and are shown in Table I [2].
After obtaining the design specification for the spectrum
analyzer, a suitable architecture for the design was created
by balancing between part minimization and maintenance of
the suitable performance. The final architecture is shown in
Fig. 1. The remainder of this paper discusses the circuit design,
layout, control, and performance testing of the PCB spectrum
analyzer.
II. D ESIGN I MPLEMENTATION
The architecture of the PCB spectrum analyzer is based
on a standard superheterodyne receiver but includes several
important differences in order to facilitate miniaturization on
a PCB and to ensure a low-cost solution. This section describes
the implementation of the design in more detail.
206 IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, VOL. 57, NO. 1, JANUARY 2008
Fig. 1. PCB-spectrum-analyzer block diagram.
TABLE II
RF-CIRCUITRY-COMPONENT LISTING
A. RF Circuitry
The primary RF circuitry of the spectrum analyzer is shown
in Fig. 1, with the specific components used in the design
provided in Table II. The antenna is the same quarter-wave
monopole centered at 750 MHz, which was used in the
data collection mentioned earlier. The input from the antenna
(60–1000 MHz) is fed to a low-pass filter (LPF) with a 3-dB
cutoff frequency of 1500 MHz to block the high-frequency
input signals from mixing into the first bandpass filter
(BPF 1 in Fig. 1) centered at 2140 MHz. The output of the
LPF 1 is fed to the IF port of a surface-mount M/A-COM
CSM5T broadband-frequency mixer driven by LO1 which is
tunable from 2200 to 3140 MHz to mix the RF input signal up
to 2140 MHz.
An EPCOS B7712 SAW filter is used for the BPF 1 be-
cause of its small size and advantageous frequency-band char-
acteristics. The center frequency was chosen at 2140 MHz
because this is a common wideband code-division multiple-
access wireless-handset frequency, making the filters in this
band commercially available and relatively inexpensive. The
output of the BPF 1 is fed to the RF input of a Mini-Circuits
ADE-30 mixer: the MXR 2. This mixer is pumped by the LO2
which is fixed at 2070 MHz, resulting in a final IF fixed at
70 MHz. The resulting image frequency at the input to the
second mixer is therefore 2000 MHz. The EPCOS B7712 has
TABLE III
GAIN AND BANDWIDTH OR NOISE FIGURE OF EACH COMPONENT
IN THE R ECEIVER C HAIN S HOWN IN F IG . 1
40 dB of rejection at 2000 MHz [3], and although this is not
an optimal image rejection for a standard spectrum analyzer, it
meets the requirement for this design due to the low dynamic-
range specification (see Table I).
The output of the MXR 2 is fed to an LPF, known as the
LPF 2, that acts as a blocking element for the strong LO signals
that leak through the system. Because there is a large amount
of gain at the back end of the instrument, the strong LO signals
must be greatly attenuated.
Two Sirenza SGA-4586 SiGe gain blocks (the AMP 1 and 2),
each with +27-dB gain and a 1.9-dB noise figure at 70 MHz,
limit the noise figure for the system. The minimum detectable
signal (MDS) can be estimated based upon the insertion loss
of the filters and mixers, along with the gain and noise fig-
ure of the first amplifier and the bandwidth of the final IF
filter, using the formula for a cascaded system [4] as given
in (1), shown at the bottom of the next page. The values of
gain, noise figure, and bandwidth for each component in the
signal path up to the first amplifier are given in Table III.
Based upon these data, the estimated system noise figure is
19.1 dB.
The passband characteristic of the final IF crystal filter
with LC matching circuits is shown in Fig. 2. This filter sets
the noise bandwidth of the system, which is approximately
REHORN AND BARKER: MINIATURIZED LOW-COST 60–1000-MHz PCB SPECTRUM ANALYZER
Fig. 2. Measured passband S-parameters of the final IF crystal filter with LC
matching circuits on the input and output. The maximum out-of-band rejection
provided by this filter is seen to be 50 dB.
B = 22 kHz. At To = 293 K, this results in a noise power
of kTo B = −130.5 dBm, where k is the Boltzmann con-
stant. Therefore, the estimated MDS level is kTo BFreceiver =
−111.4 dBm.
An Analog Devices AD8309 logarithmic amplifier/detector
is used to measure the power in the 70-MHz IF bandwidth. This
amplifier requires very few external connections and minimal
board real estate. The output of the AD8309 is a dc level that
linearly varies between 400 mV and 2.4 V, representing the
RF input power to the amplifier in dBm. This dc voltage is
then digitized using a low-power LTC1096 analog-to-digital
converter from Linear Tech.
B. PLL1: The Hybrid Synthesizer
For the spectrum analyzer to be frequency agile in a super-
heterodyne implementation, the first LO in the system must be
able to tune in very precise frequency increments. This can be
accomplished by using a very small phase/frequency-detector
(PFD) frequency inside the PLL phase/frequency-synthesizer
IC. However, this requires a large frequency divider value
(denoted as “N ”) which, in turn, increases the phase noise of
the LO output [5].
Another way to accomplish this task is to use a “hybrid
synthesizer.” Applications requiring high output frequencies
with very small step sizes commonly use hybrid synthe-
sizer techniques [6]. This methodology is used to steer the
LO frequency by adjusting both the “N ” frequency divisor
and the reference input frequency to the PLL phase/frequency
synthesizer. By using a direct digital synthesizer (DDS) as the
reference frequency source, the reference signal frequency can
be changed in frequency increments as small as a few hertz
FMix1 − 1 FBPF1 − 1
Freceiver = FLPF1 + + +
GLPF1 GLPF1 GMix1
FLPF2 − 1
+ +
GLPF1 GMix1 GBPF1 GMix2 GLPF1 GMix1 GBPF1 GMix2 GLPF2
207
TABLE IV
PLL1-CIRCUITRY-COMPONENT LISTING
[7]. This small change in the reference frequency is multiplied
by the “N ” divisor in the phase/frequency-synthesizer IC and
results in a specific frequency tuning step at the LO output.
To reduce the LO phase noise, the PFD frequency should
be maximized. For this design, the PFD frequency is set to
1.3375 MHz. The DDS is centered at 21.4 MHz and is filtered
by a BPF with a bandwidth of 15 kHz. Table IV presents the
component listing for the hybrid synthesizer used for the LO1.
C. PLL2
The circuit for the generation of the LO2 signal is based on
an Analog Devices ADF4360-2-integrated voltage-controlled
oscillator (VCO)/PLL. Used with an external reference, this
IC contains all the circuitry for the PLL. A 16-MHz FOX801BE
TCXO is used as the frequency reference. The ADF4360-2 is
nominally programmed to output a signal at 2070 MHz, but this
can be adjusted in 2-MHz frequency steps within the operation
bandwidth of the device (1850–2150 MHz).
D. Digital Control
The system is controlled through a PC parallel-port interface.
The 74HC-series noninverting line buffers are used to con-
vert the LPT TTL levels from the parallel port to +3.3-V logic.
An 8-b converter is used to digitize the RF power level. This
provides approximately 0.24-dB resolution over 62 dB of dy-
namic range, which is more than adequate for the intended
application. The output of the LTC1096 A/D converter is an
8-b serial output word that is read into the parallel port and is
processed.
III. PCB L AYOUT
The proper layout of components and traces is critical to
the performance of the PCB spectrum analyzer due to the
high integration of RF and microwave components used in
the design and the potential for unwanted coupling between
various sections of the board. Prior to moving forward with
the component layout, a suitable floor plan was devised to
help isolate each section of the design, as shown in Fig. 3. The
digital control is isolated on the left of the board since it must
FMix2 − 1
GLPF1 GMix1 GBPF1
FAMP1 − 1
(1)
208 IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, VOL. 57, NO. 1, JANUARY 2008
Fig. 3. PCB floor plan for the spectrum analyzer. The LO1 and LO2 circuitries
are placed physically far apart from each other.
Fig. 4. PCB stack-up for the PCB spectrum analyzer. The two copper ground
planes shown on layers 2 and 4 provide shielding for layer 3 (POWER).
communicate with the LO circuitry and the power-detection
circuitry. The LO1 and LO2 circuitries generate very strong
RF signals (+10 dBm) and must be physically isolated to
prevent leakage from one circuit to the next. The power-
detection circuitry is placed in the center of the board to reduce
copper trace length from the second mixer to the final IF filter.
Critical to the PCB layout is the board stack-up. This system
was implemented on a low-cost, FR-4 substrate with four
copper layers, as shown in Fig. 4. The stack-up defines two
copper ground planes on layers 2 and 4 that shield the third
layer (labeled “POWER” in Fig. 4). Layer 3 is useful for routing
VCO tuning voltage lines and other noise-sensitive signals.
Layer 2 provides a microstrip ground plane for all traces routed
on layer 1 (“TOP,” as shown in Fig. 4).
Vias are used throughout the system to decouple noise from
power-supply lines and to provide a low-impedance connec-
tion to the true RF ground plane on layer 2. A 3-D model
of the via structure used throughout the design was created
in Ansoft’s Q3D Extractor.1 The extracted series inductance
associated with the via is nonnegligible (1.15 nH) and presents
an impedance of j25 Ω at 3 GHz. For this reason, many vias
are placed in parallel to ensure low-impedance connections to
ground.
Another critical aspect in the board layout is the method used
for routing dc power to the various components in the system.
Traditional power planes used on embedded designs can behave
as patch antennas in the RF systems causing crosstalk in the
various sections of the design [8]. To avoid this problem,
star routing techniques commonly used in 802.11a/g systems
were employed throughout the design [9]. An example of this
routing scheme is shown in Fig. 5. These long and thin traces
1 Ansoft Corporation, 225 West Station Square Drive, Suite 200, Pittsburgh,
PA 15219 USA.
Fig. 5. Example of star routing used to supply dc power to the DDS IC. The
parasitic inductance of the long and thin traces adds additional isolation from
high-frequency noise floating on the power nets.
Fig. 6. Completed PCB spectrum analyzer. Sections of the board have been
labeled for comparison with the floor-plan layout shown in Fig. 3. The cavity
shield is removed to show the detail.
are avoided in digital power-routing schemes because of the
parasitic inductance associated with the traces. However, this
inductance is advantageous in RF designs because it adds
additional isolation from high-frequency-noise signals.
A photograph of the finalized design is shown in Fig. 6.
Notice the cavity fencing used to isolate the various stages in
the design. The cavity shield lid is shown in the bottom right-
hand corner of Fig. 6.
IV. F REQUENCY -H OPPED S UPERHETERODYNE
S PECTRUM A NALYZER
Upon testing the spectrum analyzer hardware, spurious sig-
nals were noticed at the output of the system while loading the
input with a matched impedance of 50 Ω. Through experimen-
tation on a prototype board, it was determined that these signals
were by-products of the LO harmonics in the first and sec-
ond mixers. These harmonics are generated inside the mixers
themselves at approximately 40 dB down from the fundamental
output. This is obviously detrimental to the operation of the
PCB spectrum analyzer; however, it is advantageous that these
spurs are related to the LO frequencies because predicting their
locations in the frequency domain is trivial.
Using some simple mathematics, one can understand how
the LO harmonics cause problems in the final IF band of the
REHORN AND BARKER: MINIATURIZED LOW-COST 60–1000-MHz PCB SPECTRUM ANALYZER 209

instrument. Consider the following equations:

fharmonic = |nfLO1 − mfLO2 |

fLO1 = fRF + fIF1 (2)

where n is the integer value of the LO1 harmonic, m is the

integer value of the LO2 harmonic, fRF is the frequency the
system is tuned to at the RF input, and fIF1 and fIF2 are the first
and second intermediate frequencies, respectively. Although
the LO signals fall outside the passband of the IF filters, the
LO signals used in the system are very strong (+10 dBm) in
order to pump the mixers. Thus, the LO harmonics are greatly
attenuated by the filters but cause problems nonetheless. It is
clear from (2) that if fharmonic is equivalent to the final IF of
the system (70 MHz), then the power detector will detect power,
even if no power exists at the RF input frequency fRF .
A novel solution was developed to prevent powerful mixing
products from interfering with the output power spectrum of
the instrument. This technique has been dubbed “frequency-
hopped superheterodyning,” and its success relies on the ability
to move the IF frequencies of the receiver on the fly by taking
advantage of the bandwidth of the BPF1.
Frequency-hopped superheterodyning relies on the fact that
the spurious signals seen at the instrument output are due to
the LO harmonics mixing into the final IF band of the system.
Consider the equation for the second IF

fIF2 = fIF1 − fLO2 . (3)

The first IF stage in the design uses an upconversion mixer

to convert the incoming RF wave to the first intermediate Fig. 7. Spectrum output of the PCB spectrum analyzer (a) with the fixed
frequency and is given by superheterodyne technique and (b) while using the frequency-hopped super-
heterodyne algorithm. The performance gains of the frequency-hopped imple-
fIF1 = fLO1 − fRF . (4) mentation are substantial. The remaining spurs in the output are a result of the
noise from the PC’s switching power supply.

Therefore
fIF2 = (fLO1 − fRF ) − fLO2 .
Now, consider what happens if fLO1 and fLO2 are increased by
a frequency equal to ∆f
fIF2 = [(fLO1 + ∆f ) − fRF ] − (fLO2 + ∆f ).
The result is that (6) is equivalent to (3). This means that if both
LO frequencies are incremented by ∆f , then the final IF of the
system remains unchanged.
On the other hand, consider what happens to the higher order
mixing terms after incrementing the LO1 and LO2 frequencies
by ∆f . Recalling (2) and inserting the ∆f terms, fharmonic
becomes
fharmonic = |nfLO1 − mfLO2 + ∆f (n − m)| .
For this system, the LO2 has a minimum frequency step of
2 MHz; thus, this is the value chosen for ∆f . The performance
(5)
gains due to the frequency-hopped superheterodyne scheme are
significant. Fig. 7 shows the output spectrum of the PCB spec-
trum analyzer before and after implementing the frequency-
hopped algorithm. The remaining spurs in Fig. 7(b) are believed
(6) to be due to the switching power supply that was used to power
the spectrum analyzer board. In Fig. 7(a), a benchtop supply
was used, and thus, these spurs are not present.
V. P ERFORMANCE OF THE PCB S PECTRUM A NALYZER
Extensive testing was done to characterize the performance
of the PCB spectrum analyzer. These tests reflect the standard
metrics used for characterizing a benchtop laboratory instru-
ment based upon Bryant’s text [10] on microwave measurement
(7) techniques.

Now, when (2) evaluates to 70 MHz, the mixing products of the

LO harmonics will no longer fall within the final IF passband,
as long as n = m. For the case where n = m, the mixing prod-
ucts from the LOs and their harmonics all lie above 130 MHz
and, therefore, are not a problem.
A. Resolution Bandwidth
To best characterize resolution bandwidth, two signals are
coupled into the instrument and are spaced spectrally close, as
shown in Fig. 8. During the measurement, the higher frequency
210 IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, VOL. 57, NO. 1, JANUARY 2008

Fig. 8. Two signals are coupled into the instrument and spaced (a) very close
in the frequency domain and (b) such that the valley created by the peak
crossover is 3 dB down from the peak.

signal is brought progressively closer to the first tone at

500 MHz until the crossover difference between the signal
peaks is only 3 dB, as shown in Fig. 8(b). The signal crossover
point is actually 6 dB, which is down from the peak tone,
but because of the signal overlap, it appears to be only 3 dB.
The resolution bandwidth is measured from the 3-dB crossover
point to the 6-dB point on the outside of the tone. This mea-
surement indicates a resolution bandwidth of 7 kHz and is set
by the IF crystal filter (see Fig. 2). This resolution bandwidth
is a tradeoff between the performance and cost in the IF filter.
Higher resolution can be achieved with significantly higher
cost in the IF filter or by adding an additional downconversion Fig. 9. Measurement of the dynamic range for two input signals at 850 and
852 MHz. (a) Both signals are −95 dBm. (b) The 852-MHz signal is increased
stage with narrower filtering. However, for many applications, to −50 dBm, and the 850-MHz signal is still visible. (c) The 852-MHz signal
a 7-kHz resolution bandwidth is more than adequate. is increased to −40 dBm, and the 850-MHz signal is completely masked by
power leaking through and increasing the noise floor.

intermodulation distortion but by the limited isolation of the

B. Dynamic Range
The performance specification for a spectrum analyzer’s
dynamic range is the spurious-free dynamic range (SFDR).
Typically, this is measured by injecting two strong signals and
increasing the power level until the third-order intermodulation
product is just observed. This methodology, however, does not
apply to this design. The PCB spectrum analyzer is designed
for low-power signals and, therefore, is not limited by the
filters.
To understand how the dynamic range is limited, consider
the case when two signals are simultaneously injected into the
input. For very low power levels at the input, no intermodula-
tion distortion products are detected, and both signals rise above
the noise floor. If the high-frequency signal power is further in-
creased, however, the “noise floor” begins to change, as shown
in Fig. 9. This phenomenon is observed because of the RF-filter
REHORN AND BARKER: MINIATURIZED LOW-COST 60–1000-MHz PCB SPECTRUM ANALYZER
Fig. 10. When the strong signal is moved to 890 MHz, the two signals do not
simultaneously pass through the first IF filter. The result is that the 850-MHz
signal is still detectable. Notice the asymmetric stopband characteristic of the
final IF filter.
properties. The first BPF, known as the BPF 1, has a band-
width of 60 MHz around its center frequency of 2140 MHz.
The strong signal at 852 MHz freely passes through this filter
because it falls well within this ±30-MHz bandwidth, even
when the system is tuned to 850 MHz. Therefore, the IF filter
at 70 MHz must attenuate this signal; however, it does not
provide a perfect attenuation outside its passband. Indeed, from
Fig. 2, it is clear that the final IF filter provides only 50 dB
of isolation. Thus, strong signals that are within 30 MHz of
the center frequency but lie outside the passband of the final
IF filter will cause the apparent noise floor to rise up due to
the limited isolation. This is the limiting factor of the dynamic
range for offsets between 300 kHz and 30 MHz in the PCB
spectrum analyzer, as is clearly shown in Fig. 9(c), where the
second tone in the RF spectrum is strong enough to raise the
noise floor above the level of the first tone.
If the signal at 852 MHz is moved outside the passband of
the BPF 1, the dynamic range greatly increases. For example,
if this tone is moved to 890 MHz, the 850- and 890-MHz
tones no longer simultaneously pass through the BPF 1. This
provides additional attenuation which prevents the strong tone
from interfering with the 850-MHz signal measurement, as
shown in Fig. 10.
The dynamic-range specifications are defined by detecting a
3-dB change in the noise-floor level due to a powerful tone at
a given offset. Using this technique, the dynamic-range mea-
surements were gathered with a fundamental tone at 500 MHz.
A 50-Ω load was first placed on the input, and the noise floor
was measured. After measuring the noise floor, the signal gen-
erator was attached, and the noise floor was again measured at
various offsets from the 500-MHz input tone. The input power
of the signal was increased until a 3-dB change in the noise-
floor power level at each given offset was detected. Table V
presents the dynamic range for the measured offsets.
The dynamic-range specification for the intended computer
security application (see Table I) is 20 dB, and thus, this design
has traded off dynamic-range performance for low cost by using
an inexpensive surface acoustic-wave filter for the BPF 1. Much
greater dynamic range can be achieved with a larger and more
211
TABLE V
DYNAMIC RANGE OF THE PCB SPECTRUM ANALYZER
MEASURED AT 500 MHz
TABLE VI
PERFORMANCE METRICS FOR THE PCB SPECTRUM ANALYZER
expensive filter that can provide an increased isolation and a
more narrow passband.
C. Performance Results
Image response, harmonic distortion, and dc power con-
sumption were also measured for the instrument. The full
performance results for the PCB spectrum analyzer are detailed
in Table VI.
VI. C ONCLUSION
The advent of high-performance and low-cost wireless tech-
nologies has created a large market for inexpensive microwave
and RF components. This paper has focused on implementing a
1-GHz spectrum analyzer on a PCB while taking advantage of
the availability of low-cost COTS components. This paper has
shown that it is possible to use low-cost components to fabricate
a low-power 1-GHz spectrum analyzer using the inexpensive
PCB manufacturing techniques.
The PCB spectrum analyzer achieved the performance goals
as set forth at the beginning of the design specification. Fur-
thermore, the design was miniaturized to the size of a standard
half-size PCI card. Dissipating only 3.7 W of dc power, the
system is easily integrated into a standard PCI bus and meets
the power limitations as defined by the PCI implementation
protocol. The system designed during this project shows that
an architecture based on heterodyning can be implemented on
a PCB to allow 1 GHz of spectral coverage. Other miniatur-
ized architectures are not able to achieve this bandwidth and
maintain low power dissipation. An example is the National
212 IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, VOL. 57, NO. 1, JANUARY 2008
Instruments PXI-5660 RF vector signal analyzer. This analyzer
is designed for operation up to 2.7 GHz with an SFDR of
70 dB and a noise floor of −130 dBm. However, this unit
requires nearly 40 W of dc power and has dimensions of
21.6 × 13 × 8 cm [11].
Future work on this device includes increasing its dynamic
range and its input range. The control voltage applied to the
VCO that is used in the LO1 is currently limited to 13 V by
the PCI bus; however, the available tuning range for the VCO
extends to 20 V. A dc-to-dc converter can be used to allow the
current design to operate up to 1860 MHz. A better filter in the
first stage of the design would help increase the dynamic range.
A higher-Q IF filter in the final stage would also help improve
the dynamic range of the device.
Other works might include the implementation of the device
on a substrate that is more suitable for microwave and RF circuit
designs. Because the dielectric constant of the FR-4 varies with
frequency, it is not optimal for the microwave and RF circuit
designs. A substrate such as the Rogers 4350 between the
first and second copper layers on the PCB would reduce the
electromagnetic interference and loss of the RF traces; however,
this will also greatly increase the board cost.
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[3] EPCOS AG, SAW Components—Data Sheet B7712, 2004, Munich,
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[4] D. M. Pozar, Microwave Engineering, 3rd ed. Reading, MA: Addison-
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[7] AD9850—CMOS, 125 MHz Complete DDS Synthesizer—Data Sheet,
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[10] G. H. Bryant, Principles of Microwave Measurements. London, U.K.:
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[11] National Instruments, 2.7 GHz RF Signal Analyzer, 2004.
Christopher E. Rehorn received the B.S. and M.S.
degrees in electrical engineering from the Univer-
sity of Virginia, Charlottesville, in 2004 and 2006,
respectively.
He has been with Agilent Technologies, Colorado
Springs, CO, since June 2006. His work at Agi-
lent Technologies is focused on full-custom high-
speed analog application-specified integrated-circuit
design.
N. Scott Barker (S’94–M’99) received the
B.S.E.E. degree from the University of Virginia,
Charlottesville, in 1994 and the M.S.E.E. and
Ph.D. degrees in electrical engineering from the
University of Michigan, Ann Arbor, in 1996 and
1999, respectively.
From 1999 to 2000, he was a Staff Scientist with
the Naval Research Laboratory. In January 2001,
he joined the Charles L. Brown Department of
Electrical and Computer Engineering, University of
Virginia, where he is currently an Associate Pro-
fessor. His research interests include applying MEMS to the development of
microwave and millimeter-wave circuits and components. He is also interested
in micromachining techniques for submillimeter-wave circuits and RF system
and circuit design.
Prof. Barker is the recipient of the 2003 NSF CAREER Award, the 2000
IEEE Microwave Prize, and the First and Second Place, respectively, in the
1999 and 1997 Student Paper Competition of the IEEE MTT-S International
Microwave Symposium.