MC14052BPC Comutator

MC14051B, MC14052B,
MC14053B
Analog
Multiplexers/Demultiplexers
The MC14051B, MC14052B, and MC14053B analog multiplexers
are digitally−controlled analog switches. The MC14051B effectively http://onsemi.com
implements an SP8T solid state switch, the MC14052B a DP4T, and
the MC14053B a Triple SPDT. All three devices feature low ON MARKING
impedance and very low OFF leakage current. Control of analog DIAGRAMS
signals up to the complete supply voltage range can be achieved.
16
PDIP−16
Features MC140xxBCP
P SUFFIX
AWLYYWW
• Triple Diode Protection on Control Inputs
CASE 648
1
• Switch Function is Break Before Make
• Supply Voltage Range = 3.0 Vdc to 18 Vdc 16
• Analog Voltage Range (VDD − VEE) = 3.0 to 18 V SOIC−16 140xxB
Note: VEE must be VSS D SUFFIX AWLYWW
CASE 751B
• Linearized Transfer Characteristics
1
• Low−noise − 12 nV/√Cycle, f ≥ 1.0 kHz Typical
• Pin−for−Pin Replacement for CD4051, CD4052, and CD4053
• For 4PDT Switch, See MC14551B 16
14
TSSOP−16
• For Lower RON, Use the HC4051, HC4052, or HC4053 High−Speed DT SUFFIX 0xxB
CMOS Devices CASE 948F ALYW
• Pb−Free Packages are Available* 1
MAXIMUM RATINGS (Voltages Referenced to VSS) 16

Symbol Parameter Value Unit SOEIAJ−16
MC140xxB
VDD DC Supply Voltage Range −0.5 to V F SUFFIX
AWLYWW
(Referenced to VEE, VSS ≥ VEE) +18.0 CASE 966
Vin, Input or Output Voltage Range −0.5 to VDD V 1
Vout (DC or Transient) (Referenced to VSS for + 0.5
Control Inputs and VEE for Switch I/O)
xx = Specific Device Code
Iin Input Current (DC or Transient) per Control Pin +10 mA
A = Assembly Location
ISW Switch Through Current ± 25 mA WL, L = Wafer Lot
PD Power Dissipation per Package (Note 1) 500 mW YY, Y = Year
WW, W = Work Week
TA Ambient Temperature Range −55 to +125 °C
Tstg Storage Temperature Range −65 to +150 °C
TL Lead Temperature (8−Second Soldering) 260 °C
ORDERING INFORMATION
Maximum ratings are those values beyond which device damage can occur. See detailed ordering and shipping information in the package
Maximum ratings applied to the device are individual stress limit values (not dimensions section on page 9 of this data sheet.
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
1. Temperature Derating: Plastic “P and D/DW” Packages: – 7.0 mW/C From
65C To 125C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high−impedance circuit. For proper operation, Vin and Vout should be constrained to
*For additional information on our Pb−Free strategy
the range VSS (Vin or Vout) VDD. and soldering details, please download the
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either ON Semiconductor Soldering and Mounting
VSS, VEE or VDD). Unused outputs must be left open. Techniques Reference Manual, SOLDERRM/D.
 Semiconductor Components Industries, LLC, 2005 1 Publication Order Number:

February, 2005 − Rev. 6 MC14051B/D
MC14051B, MC14052B, MC14053B
MC14051B MC14052B MC14053B

8−Channel Analog Dual 4−Channel Analog Triple 2−Channel Analog
Multiplexer/Demultiplexer Multiplexer/Demultiplexer Multiplexer/Demultiplexer
6 INHIBIT 6 INHIBIT 6 INHIBIT

11 A CONTROLS 10 A 11 A X 14
CONTROLS X 13 CONTROLS
10 B 9 B 10 B
9 C 12 X0 9 C
13 X0 14 X1 12 X0 Y 15 COMMONS
COMMONS
14 X1 15 X2 13 X1 OUT/IN
X 3 OUT/IN
15 X2 SWITCHES 11 X3 SWITCHES 2 Y0
COMMON
SWITCHES 12 X3 IN/OUT 1 Y0 IN/OUT 1 Y1
OUT/IN Y 3 Z 4
IN/OUT 1 X4 5 Y1 5 Z0
5 X5 2 Y2 3 Z1
2 X6 4 Y3
4 X7
VDD = PIN 16 VDD = PIN 16 VDD = PIN 16

VSS = PIN 8 VSS = PIN 8 VSS = PIN 8
VEE = PIN 7 VEE = PIN 7 VEE = PIN 7
Note: Control Inputs referenced to VSS, Analog Inputs and Outputs reference to VEE. VEE must be ≤ VSS.
PIN ASSIGMENT
MC14051B MC14052B MC14053B
X4 1 16 VDD Y0 1 16 VDD Y1 1 16 VDD
X6 2 15 X2 Y2 2 15 X2 Y0 2 15 Y
X 3 14 X1 Y 3 14 X1 Z1 3 14 X
X7 4 13 X0 Y3 4 13 X Z 4 13 X1
X5 5 12 X3 Y1 5 12 X0 Z0 5 12 X0
INH 6 11 A INH 6 11 X3 INH 6 11 A
VEE 7 10 B VEE 7 10 A VEE 7 10 B
VSS 8 9 C VSS 8 9 B VSS 8 9 C
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2
MC14051B, MC14052B, MC14053B
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎ
ELECTRICAL CHARACTERISTICS
ÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎ ÎÎÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎÎ ÎÎÎ
ÎÎ
ÎÎÎÎÎ
− 55C 25C 125C
ÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎ
Characteristic Symbol VDD Test Conditions Min Max Min Typ Max Min Max Unit
ÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎ ÎÎÎ
ÎÎÎ ÎÎ
ÎÎÎ
ÎÎÎ
ÎÎ
(Note 2)
ÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎ
SUPPLY REQUIREMENTS (Voltages Referenced to VEE)
VDD – 3.0 ≥ VSS ≥ VEE
ÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ ÎÎ
ÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ
ÎÎÎ ÎÎ
ÎÎÎ ÎÎ
ÎÎÎ
Power Supply Voltage VDD − 3.0 18 3.0 − 18 3.0 18 V
Range
ÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎ
ÎÎÎ
ÎÎÎ
Quiescent Current Per
ÎÎÎ
ÎÎÎÎÎ
ÎÎÎ
ÎÎ ÎÎÎ
ÎÎ
IDD 5.0 Control Inputs: − 5.0 − 0.005 5.0 − 150 A
ÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎ ÎÎÎ ÎÎÎ
ÎÎÎ
ÎÎ
Package 10 Vin = VSS or VDD, − 10 − 0.010 10 − 300
Switch I/O: VEE VI/O
ÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎ ÎÎÎ
ÎÎÎ ÎÎ
ÎÎÎ
ÎÎÎ
ÎÎ
15 − 20 − 0.015 20 − 600
VDD, and Vswitch
ÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎ ÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ ÎÎÎ ÎÎ
ÎÎÎ
500 mV (Note 3)
ÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎ
Total Supply Current ID(AV) 5.0 TA = 25C only (The A
(0.07 A/kHz) f + IDD
ÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎ
(Dynamic Plus 10 channel component,
Typical (0.20 A/kHz) f + IDD
Quiescent, Per Package 15 (Vin – Vout)/Ron, is
(0.36 A/kHz) f + IDD
ÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎ
not included.)
ÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎ
CONTROL INPUTS — INHIBIT, A, B, C (Voltages Referenced to VSS)
ÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎ
Low−Level Input Voltage VIL 5.0 Ron = per spec, − 1.5 − 2.25 1.5 − 1.5 V
10 Ioff = per spec − 3.0 − 4.50 3.0 − 3.0
ÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ ÎÎ
ÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎ ÎÎ
ÎÎÎ 15 − 4.0 − 6.75 4.0 − 4.0
ÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎÎÎ ÎÎÎ
ÎÎÎ ÎÎÎÎÎÎÎÎ
ÎÎÎ ÎÎ
ÎÎ ÎÎÎ
ÎÎÎ ÎÎÎ
High−Level Input Voltage
ÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎ ÎÎÎ
ÎÎÎ ÎÎ
ÎÎÎ
VIH
ÎÎ
5.0
10
15
Ron = per spec,
Ioff = per spec
3.5
7.0
11
−
−
−
3.5
7.0
11
2.75
5.50
8.25
−
−
−
3.5
7.0
11
−
−
−
V
ÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎ
ÎÎÎ
ÎÎÎ
Input Leakage Current
ÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎ
Iin
15 Vin = 0 or VDD − ± 0.1 − ± 0.00001 ± 0.1 − 1.0 A
ÎÎÎÎÎÎÎÎ
ÎÎÎ
Input Capacitance
ÎÎÎ ÎÎ
ÎÎ ÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎ ÎÎÎ
ÎÎÎ ÎÎ
ÎÎÎ
Cin
ÎÎ
−
SWITCHES IN/OUT AND COMMONS OUT/IN — X, Y, Z (Voltages Referenced to VEE)
− − − 5.0 7.5 − − pF
ÎÎÎÎÎÎÎÎ
ÎÎÎ
Recommended
ÎÎÎ ÎÎ
ÎÎÎ
ÎÎ
ÎÎÎ ÎÎÎÎÎ
ÎÎÎ
ÎÎÎÎÎ
ÎÎÎ
Peak−to−Peak Voltage ÎÎÎ
ÎÎÎ ÎÎ
VI/O
ÎÎ
ÎÎÎ
− Channel On or Off 0 VDD 0 − VDD 0 VDD VPP
ÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎ
Into or Out of the Switch
ÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎ ÎÎÎ
ÎÎÎ ÎÎ
ÎÎÎ
ÎÎÎ
ÎÎ
Recommended Static or Vswitch − Channel On 0 600 0 − 600 0 300 mV
Dynamic Voltage Across
ÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ ÎÎ
ÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ
ÎÎÎ
ÎÎÎÎÎ
ÎÎÎ ÎÎ
ÎÎÎ
the Switch (Note 3)
ÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎ
ÎÎÎ
ÎÎÎ ÎÎ
ÎÎÎ
ÎÎÎ
ÎÎ
(Figure 5)
V
ÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎ
Output Offset Voltage VOO − Vin = 0 V, No Load − − − 10 − − −
Vswitch 500 mV
ÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎ ÎÎÎ
ÎÎÎ ÎÎ
ÎÎÎ
ÎÎÎ
ÎÎ
ON Resistance Ron 5.0 − 800 − 250 1050 − 1200
10 (Note 3) Vin = VIL or VIH − 400 − 120 500 − 520
ÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ ÎÎ
ÎÎÎ ÎÎÎ ÎÎ
ÎÎÎ
15 (Control), and Vin = − 220 − 80 280 − 300
ÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎ
0 to VDD (Switch)
ON Resistance Between Ron
ÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎ ÎÎÎ
ÎÎÎ ÎÎ
ÎÎÎ
ÎÎÎ
ÎÎ
5.0 − 70 − 25 70 − 135
Any Two Channels in the 10 − 50 − 10 50 − 95
ÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ ÎÎ
ÎÎÎ ÎÎÎ ÎÎ
ÎÎÎ
Same Package 15 − 45 − 10 45 − 65
ÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎ
Off−Channel Leakage Ioff 15 Vin = VIL or VIH − ± 100 − ± 0.05 ± 100 − ± 1000 nA
Current (Figure 10) (Control) Channel to
ÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎ
ÎÎ ÎÎÎ
ÎÎÎ
ÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎ
ÎÎ
Channel or Any One
ÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ ÎÎ
ÎÎÎ
ÎÎÎ
Channel
ÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎ
Capacitance, Switch I/O CI/O − Inhibit = VDD − − − 10 − − − pF
ÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎ
Capacitance, Common O/I CO/I − Inhibit = VDD pF
(MC14051B) − − − 60 − − −
ÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎ
ÎÎÎ ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ ÎÎ
ÎÎÎ
ÎÎ ÎÎÎ
ÎÎÎ ÎÎ
ÎÎÎ
(MC14052B) − − − 32 − − −
ÎÎ ÎÎ
(MC14053B) − − − 17 − − −
ÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎ
Capacitance, Feedthrough CI/O − Pins Not Adjacent − − − 0.15 − − − pF
(Channel Off) − Pins Adjacent − − − 0.47 − − −
2. Data labeled “Typ” is not to be used for design purposes, but is intended as an indication of the IC’s potential performance.
3. For voltage drops across the switch (Vswitch) > 600 mV ( > 300 mV at high temperature), excessive VDD current may be drawn, i.e. the
current out of the switch may contain both VDD and switch input components. The reliability of the device will be unaffected unless the
Maximum Ratings are exceeded. (See first page of this data sheet.)
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MC14051B, MC14052B, MC14053B
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
ELECTRICAL CHARACTERISTICS (Note 4) (CL = 50 pF, TA = 25C) (VEE VSS unless otherwise indicated)
ÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
Characteristic Symbol VDD – VEE Typ (Note 5) Max Unit
ÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
Vdc All Types
Propagation Delay Times (Figure 6) tPLH, tPHL ns
MC14051
ÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎÎ ÎÎÎÎ
ÎÎÎÎÎ ÎÎÎ
Switch Input to Switch Output (RL = 10 k)
ÎÎÎÎÎ ÎÎÎÎ
ÎÎÎ
tPLH, tPHL = (0.17 ns/pF) CL + 26.5 ns 5.0 35 90
ÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
tPLH, tPHL = (0.08 ns/pF) CL + 11 ns 10 15 40
ÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
tPLH, tPHL = (0.06 ns/pF) CL + 9.0 ns 15 12 30
MC14052 ns
ÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎ ÎÎÎ
tPLH, tPHL = (0.17 ns/pF) CL + 21.5 ns
ÎÎÎÎÎ ÎÎÎÎ
ÎÎÎ
5.0
10
15
30
12
10
75
30
25
ÎÎÎÎÎ
MC14053
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ
ÎÎÎÎÎ ÎÎÎÎÎ
ÎÎÎÎÎ ÎÎÎ
ÎÎÎÎ
ÎÎÎ
tPLH, tPHL = (0.17 ns/pF) CL + 16.5 ns 5.0 25 65
ns
ÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
tPLH, tPHL = (0.08 ns/pF) CL + 4.0 ns 10 8.0 20
tPLH, tPHL = (0.06 ns/pF) CL + 3.0 ns 15 6.0 15
ÎÎÎÎÎ
ÎÎÎÎÎ ÎÎÎ
Inhibit to Output (RL = 10 k, VEE = VSS)
ÎÎÎÎ
ÎÎÎ
Output “1” or “0” to High Impedance, or
High Impedance to “1” or “0” Level
tPHZ, tPLZ,
tPZH, tPZL
ns
ÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
MC14051B 5.0 350 700
ÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
10 170 340
15 140 280
ÎÎÎÎÎ
MC14052B
ÎÎÎÎÎ ÎÎÎ
ÎÎÎÎ
ÎÎÎ
5.0
10
15
300
155
125
600
310
250
ns
ÎÎÎÎÎ
MC14053B
ÎÎÎÎÎ ÎÎÎ
ÎÎÎÎ
ÎÎÎ
5.0
10
275
140
550
280
ns
ÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
15 110 220
ÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
Control Input to Output (RL = 10 k, VEE = VSS) tPLH, tPHL ns
MC14051B 5.0 360 720
ÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
10 160 320
15 120 240
ÎÎÎÎÎ
MC14052B
ÎÎÎÎÎ ÎÎÎ
ÎÎÎÎ
ÎÎÎ
5.0
10
325
130
650
260
ns
ÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
15 90 180
ÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
MC14053B 5.0 300 600 ns
10 120 240
ÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
15 80 160
ÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
Second Harmonic Distortion − 10 0.07 − %
(RL = 10K, f = 1 kHz) Vin = 5 VPP
ÎÎÎÎÎ
Bandwidth (Figure 7)
ÎÎÎÎÎ ÎÎÎ
ÎÎÎÎ
ÎÎÎ
(RL = 1 k, Vin = 1/2 (VDD−VEE) p−p, CL = 50pF
BW 10 17 − MHz
ÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
20 Log (Vout/Vin) = − 3 dB)
ÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
Off Channel Feedthrough Attenuation (Figure 7) − 10 – 50 − dB
RL = 1K, Vin = 1/2 (VDD − VEE) p−p
ÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
fin = 4.5 MHz — MC14051B
fin = 30 MHz — MC14052B
ÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎ
fin = 55 MHz — MC14053B
ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ
ÎÎÎÎ
Channel Separation (Figure 8)
ÎÎÎ
− 10 – 50 − dB
ÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
(RL = 1 k, Vin = 1/2 (VDD−VEE) p−p,
fin = 3.0 MHz
ÎÎÎÎÎ
ÎÎÎÎÎ
(R1 = 1 k, RL = 10 k ÎÎÎ
Crosstalk, Control Input to Common O/I (Figure 9)
ÎÎÎÎ
ÎÎÎ
Control tTLH = tTHL = 20 ns, Inhibit = VSS)
− 10 75 − mV
4. The formulas given are for the typical characteristics only at 25C.
5. Data labelled “Typ” is not lo be used for design purposes but In intended as an indication of the IC’s potential performance.
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MC14051B, MC14052B, MC14053B
VDD VDD VDD

IN/OUT OUT/IN
VEE
VDD
LEVEL
CONVERTED
IN/OUT OUT/IN
CONTROL
CONTROL
VEE
Figure 1. Switch Circuit Schematic
TRUTH TABLE 16 VDD

Control Inputs
INH6 BINARY TO 1−OF−8
Select ON Switches A11 LEVEL
DECODER WITH
C* B A MC14051B MC14052B MC14053B B10 CONVERTER
Inhibit
C9 INHIBIT
0 0 0 0 X0 Y0 X0 Z0 Y0 X0
0 0 0 1 X1 Y1 X1 Z0 Y0 X1 8 VSS 7 VEE
0 0 1 0 X2 Y2 X2 Z0 Y1 X0 X013
0 0 1 1 X3 Y3 X3 Z0 Y1 X1 X114
0 1 0 0 X4 Z1 Y0 X0 X215
0 1 0 1 X5 Z1 Y0 X1 X312 3X
0 1 1 0 X6 Z1 Y1 X0 X41
0 1 1 1 X7 Z1 Y1 X1 X55
1 x x x None None None X62
*Not applicable for MC14052 X74
x = Don’t Care
Figure 2. MC14051B Functional Diagram
16 VDD
16 VDD
INH6 BINARY TO 1−OF−4
LEVEL
A10 DECODER WITH INH6 BINARY TO 1−OF−2
CONVERTER A11 LEVEL
B9 INHIBIT DECODER WITH
B10 CONVERTER
C9 INHIBIT
8 VSS 7 VEE
X012 8 VSS 7 VEE
X114
13X
X215 X012
14X
X311 X113
Y01 Y02
15Y
Y15 Y11
3Y
Y22 Z05
4Z
Y34 Z13
Figure 3. MC14052B Functional Diagram Figure 4. MC14053B Functional Diagram
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MC14051B, MC14052B, MC14053B
TEST CIRCUITS
ON SWITCH
CONTROL A
PULSE
SECTION B
GENERATOR
OF IC C
LOAD Vout
V CL
INH RL
SOURCE
VDD VEE VEE VDD
Figure 5. V Across Switch Figure 6. Propagation Delay Times,

Control and Inhibit to Output
A, B, and C inputs used to turn ON

or OFF the switch under test.
A RL
B A
C B ON
Vout
C
VSS INH RL CL = 50 pF
INH OFF
Vout
Vin RL CL = 50 pF
VDD − VEE
2 VDD − VEE Vin
2
Figure 7. Bandwidth and Off−Channel Figure 8. Channel Separation

Feedthrough Attenuation (Adjacent Channels Used For Setup)
OFF CHANNEL UNDER TEST

VDD
VEE
A CONTROL
B SECTION OTHER
C CHANNEL(S)
Vout OF IC VEE
INH RL CL = 50 pF VDD
R1
VEE
COMMON
VDD
Figure 9. Crosstalk, Control Input to Figure 10. Off Channel Leakage

Common O/I
NOTE: See also Figures 7 and 8 in the MC14016B data sheet.
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MC14051B, MC14052B, MC14053B
VDD KEITHLEY 160

DIGITAL
MULTIMETER
10 k
1 k
VDD RANGE X−Y
PLOTTER
VEE = VSS
Figure 11. Channel Resistance (RON) Test Circuit
TYPICAL RESISTANCE CHARACTERISTICS

350 350
300 300
R ON , ON" RESISTANCE (OHMS)

250 250
200 200
150 150 TA = 125°C

TA = 125°C
100 100 25°C
25°C
−55 °C −55 °C
50 50
0 0
−10 −8.0 −6.0 −4.0 −2.0 0 0.2 4.0 6.0 8.0 10 −10 −8.0 −6.0 −4.0 −2.0 0 0.2 4.0 6.0 8.0 10
Vin, INPUT VOLTAGE (VOLTS) Vin, INPUT VOLTAGE (VOLTS)
Figure 12. VDD = 7.5 V, VEE = − 7.5 V Figure 13. VDD = 5.0 V, VEE = − 5.0 V
700 350
TA = 25°C
600 300
RON , ON" RESISTANCE (OHMS)
500 250 VDD = 2.5 V
400 200
300 150
TA = 125°C 5.0 V
200 100
25°C 7.5 V
100 −55 °C 50
0 0
−10 −8.0 −6.0 −4.0 −2.0 0 0.2 4.0 6.0 8.0 10 −10 −8.0 −6.0 −4.0 −2.0 0 0.2 4.0 6.0 8.0 10
Vin, INPUT VOLTAGE (VOLTS) Vin, INPUT VOLTAGE (VOLTS)
Figure 14. VDD = 2.5 V, VEE = − 2.5 V Figure 15. Comparison at 25°C, VDD = − VEE
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7
MC14051B, MC14052B, MC14053B
APPLICATIONS INFORMATION
Figure A illustrates use of the on−chip level converter peak. If voltage transients above VDD and/or below VEE are
detailed in Figures 2, 3, and 4. The 0−to−5 V Digital Control anticipated on the analog channels, external diodes (Dx) are
signal is used to directly control a 9 V p−p analog signal. recommended as shown in Figure B. These diodes should be
The digital control logic levels are determined by VDD small signal types able to absorb the maximum anticipated
and VSS. The VDD voltage is the logic high voltage; the VSS current surges during clipping.
voltage is logic low. For the example, VDD = + 5 V = logic The absolute maximum potential difference between
high at the control inputs; V SS = GND = 0 V = logic low. VDD and VEE is 18.0 V. Most parameters are specified up to
The maximum analog signal level is determined by V DD 15 V which is the recommended maximum difference
and VEE. The VDD voltage determines the maximum between VDD and VEE.
recommended peak above VSS. The VEE voltage Balanced supplies are not required. However, VSS must
determines the maximum swing below VSS. For the be greater than or equal to VEE. For example, VDD = + 10
example, VDD − VSS = 5 V maximum swing above V SS ; V, VSS = + 5 V, and VEE – 3 V is acceptable. See the Table
VSS − VEE = 5 V maximum swing below VSS. The example below.
shows a ± 4.5 V signal which allows a 1/2 volt margin at each
+5 V −5 V
VDD VSS VEE
+ 4.5 V
+5 V 9 Vp−p SWITCH
ANALOG SIGNAL I/O COMMON 9 Vp−p
GND
MC14051B O/I ANALOG SIGNAL
MC14052B
EXTERNAL MC14053B
CMOS −4.5 V
DIGITAL
CIRCUITRY 0−TO−5 V DIGITAL INHIBIT,
CONTROL SIGNALS A, B, C
Figure A. Application Example
VDD VDD
DX DX
ANALOG COMMON
I/O O/I
DX DX
VEE VEE
Figure B. External Germanium or Schottky Clipping Diodes
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
POSSIBLE SUPPLY CONNECTIONS
ÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎ
Control Inputs
VDD VSS VEE Logic High/Logic Low Maximum Analog Signal Range
ÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎ
In Volts In Volts In Volts In Volts In Volts
ÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎ
+8 0 –8 + 8/0 + 8 to – 8 = 16 Vp–p
ÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎ
+5 0 – 12 + 5/0 + 5 to – 12 = 17 Vp–p
ÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎ
+5 0 0 + 5/0 + 5 to 0 = 5 Vp–p
ÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎ ÎÎÎÎ
+5
ÎÎÎÎÎ ÎÎÎÎÎÎÎ
ÎÎÎÎ
+ 10 ÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎ
0
ÎÎÎÎÎÎÎÎÎ
+5
–5
–5
+ 5/0
+ 10/ + 5
+ 5 to – 5 = 10 Vp–p
+ 10 to – 5 = 15 Vp–p
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8
MC14051B, MC14052B, MC14053B
ORDERING INFORMATION
Device Package Shipping†
MC14051BCP PDIP−16 500 Units / Rail
MC14051BCPG PDIP−16 500 Units / Rail
(Pb−Free)
MC14051BD SOIC−16 48 Units / Rail
MC14051BDG SOIC−16 48 Units / Rail
(Pb−Free)
MC14051BDR2 SOIC−16 2500 / Tape & Reel
MC14051BDR2G SOIC−16 2500 / Tape & Reel
(Pb−Free)
MC14051BDTR2 TSSOP−16* 2500 / Tape & Reel
MC14051BF SOEIAJ−16 50 Units / Rail
MC14051BFEL SOEIAJ−16 2000 / Tape & Reel
MC14051BFELG SOEIAJ−16 2000 / Tape & Reel
(Pb−Free)

(Pb−Free)
(Pb−Free)
(Pb−Free)
(Pb−Free)

(Pb−Free)
(Pb−Free)
(Pb−Free)
MC14053BFG SOEIAJ−16 50 Units / Rail
(Pb−Free)
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*This package is inherently Pb−Free.
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9
MC14051B, MC14052B, MC14053B
PACKAGE DIMENSIONS
PDIP−16
P SUFFIX
PLASTIC DIP PACKAGE
CASE 648−08
ISSUE T
−A− NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
16 9
3. DIMENSION L TO CENTER OF LEADS
B WHEN FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE
1 8 MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
F C
INCHES MILLIMETERS
L DIM MIN MAX MIN MAX
A 0.740 0.770 18.80 19.55
S B 0.250 0.270 6.35 6.85
C 0.145 0.175 3.69 4.44
SEATING
−T− PLANE
D 0.015 0.021 0.39 0.53
F 0.040 0.70 1.02 1.77
K M G 0.100 BSC 2.54 BSC
H J H 0.050 BSC 1.27 BSC
G J 0.008 0.015 0.21 0.38
D 16 PL K 0.110 0.130 2.80 3.30
L 0.295 0.305 7.50 7.74
0.25 (0.010) M T A M
M 0 10 0 10
S 0.020 0.040 0.51 1.01
SOIC−16
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751B−05
ISSUE J
NOTES:
−A− 1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
16 9 MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
−B− PER SIDE.
P 8 PL
5. DIMENSION D DOES NOT INCLUDE DAMBAR
1 8
0.25 (0.010) M B S PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
MILLIMETERS INCHES
G
DIM MIN MAX MIN MAX
A 9.80 10.00 0.386 0.393
B 3.80 4.00 0.150 0.157
F C 1.35 1.75 0.054 0.068
K R X 45 D 0.35 0.49 0.014 0.019
F 0.40 1.25 0.016 0.049
C G 1.27 BSC 0.050 BSC
J 0.19 0.25 0.008 0.009
−T− SEATING K 0.10 0.25 0.004 0.009
PLANE J M 0 7 0 7
M
P 5.80 6.20 0.229 0.244
D 16 PL R 0.25 0.50 0.010 0.019
0.25 (0.010) M T B S A S
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10
MC14051B, MC14052B, MC14053B
PACKAGE DIMENSIONS
TSSOP−16
DT SUFFIX
PLASTIC TSSOP PACKAGE
CASE 948F−01
ISSUE A
16X K REF NOTES:

1. DIMENSIONING AND TOLERANCING PER
0.10 (0.004) M T U S V S ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
0.15 (0.006) T U S 3. DIMENSION A DOES NOT INCLUDE MOLD
ÇÇÇ
ÉÉ
K FLASH. PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
K1
ÇÇÇ
ÉÉ
EXCEED 0.15 (0.006) PER SIDE.
16 4. DIMENSION B DOES NOT INCLUDE
9
INTERLEAD FLASH OR PROTRUSION.
ÇÇÇ
ÉÉ
2X L/2 J1 INTERLEAD FLASH OR PROTRUSION SHALL
NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE
B SECTION N−N DAMBAR PROTRUSION. ALLOWABLE
L −U− DAMBAR PROTRUSION SHALL BE 0.08
J (0.003) TOTAL IN EXCESS OF THE K
PIN 1 DIMENSION AT MAXIMUM MATERIAL
IDENT. CONDITION.
1 8 6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
N 7. DIMENSION A AND B ARE TO BE
0.25 (0.010) DETERMINED AT DATUM PLANE −W−.
0.15 (0.006) T U S
MILLIMETERS INCHES
A M
DIM MIN MAX MIN MAX
−V− A 4.90 5.10 0.193 0.200
N B 4.30 4.50 0.169 0.177
C −−− 1.20 −−− 0.047
F D 0.05 0.15 0.002 0.006
F 0.50 0.75 0.020 0.030
G 0.65 BSC 0.026 BSC
DETAIL E H 0.18 0.28 0.007 0.011
J 0.09 0.20 0.004 0.008
J1 0.09 0.16 0.004 0.006
K 0.19 0.30 0.007 0.012
C −W− K1 0.19 0.25 0.007 0.010
L 6.40 BSC 0.252 BSC
M 0 8 0 8
0.10 (0.004)
−T− SEATING H DETAIL E
PLANE D G
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11
MC14051B, MC14052B, MC14053B
PACKAGE DIMENSIONS
SOEIAJ−16
F SUFFIX
PLASTIC EIAJ SOIC PACKAGE
CASE 966−01
ISSUE O
NOTES:
16 9 LE 1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
Q1 2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS D AND E DO NOT INCLUDE
MOLD FLASH OR PROTRUSIONS AND ARE
E HE M MEASURED AT THE PARTING LINE. MOLD FLASH
OR PROTRUSIONS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
1 8 L 4. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
5. THE LEAD WIDTH DIMENSION (b) DOES NOT
DETAIL P INCLUDE DAMBAR PROTRUSION. ALLOWABLE
Z DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
D TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
VIEW P RADIUS OR THE FOOT. MINIMUM SPACE
e A BETWEEN PROTRUSIONS AND ADJACENT LEAD
c TO BE 0.46 ( 0.018).
MILLIMETERS INCHES
DIM MIN MAX MIN MAX
A −−− 2.05 −−− 0.081
A1 A1 0.05 0.20 0.002 0.008
b b 0.35 0.50 0.014 0.020
c 0.18 0.27 0.007 0.011
0.13 (0.005) M 0.10 (0.004) D 9.90 10.50 0.390 0.413
E 5.10 5.45 0.201 0.215
e 1.27 BSC 0.050 BSC
HE 7.40 8.20 0.291 0.323
L 0.50 0.85 0.020 0.033
LE 1.10 1.50 0.043 0.059
M 0 10 0 10
Q1 0.70 0.90 0.028 0.035
Z −−− 0.78 −−− 0.031
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
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and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
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12
This datasheet has been download from:
www.datasheetcatalog.com
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MC14051B, MC14052B,

MAXIMUM RATINGS (Voltages Referenced to VSS) 16

 Semiconductor Components Industries, LLC, 2005 1 Publication Order Number:

MC14051B MC14052B MC14053B

6 INHIBIT 6 INHIBIT 6 INHIBIT

VDD = PIN 16 VDD = PIN 16 VDD = PIN 16

VDD VDD VDD

Figure 1. Switch Circuit Schematic

TRUTH TABLE 16 VDD

Figure 3. MC14052B Functional Diagram Figure 4. MC14053B Functional Diagram

VDD VEE VEE VDD

Figure 5. V Across Switch Figure 6. Propagation Delay Times,

A, B, and C inputs used to turn ON

Figure 7. Bandwidth and Off−Channel Figure 8. Channel Separation

OFF CHANNEL UNDER TEST

Figure 9. Crosstalk, Control Input to Figure 10. Off Channel Leakage

NOTE: See also Figures 7 and 8 in the MC14016B data sheet.

VDD KEITHLEY 160

Figure 11. Channel Resistance (RON) Test Circuit

TYPICAL RESISTANCE CHARACTERISTICS

R ON , ON" RESISTANCE (OHMS)

150 150 TA = 125°C

500 250 VDD = 2.5 V

VDD VSS VEE

Figure A. Application Example

Figure B. External Germanium or Schottky Clipping Diodes

MC14052BCP PDIP−16 500 Units / Rail

MC14053BCP PDIP−16 500 Units / Rail

16X K REF NOTES:

PUBLICATION ORDERING INFORMATION

Datasheets for electronics components.

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R ON , ON" RESISTANCE (OHMS)