Compal La-9371p r0.3 Schematics

A B C D E
1 1
2
Compal Confidential 2
Intel Haswell rPGA Processor with Lynx Point-H

Afterburn MXM
LA-9371P
3 3
2012-11-12
REV : 0.3
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2012/06/11 Deciphered Date 2013/06/11 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Page
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-9371P
Date: Monday, November 12, 2012 Sheet 1 of 56
A B C D E
A B C D E
Compal Confidential
Model Name : Afterburn
File Name : LA-9371P
1 1
DDR3-SO-DIMM2, 3
Ch B BANK 0, 1, 2, 3 Page 12
eDP MUX
eDP Panel Conn. PS8321 eDP
Page 22
Page 36 Intel DDR3-SO-DIMM0, 1
Ch A BANK 0, 1, 2, 3 Page 11
DPC eDPF Haswell DDR3L 1333MHz 1.35V
DP Switch
PI3VDP124 rPGA Processor
Page 36 MXM3.0 Conn
PEGx16 rPGA947
Dock Conn DPD NVidia: Port 1
Page 33 37.5mm*37.5mm Docking x 1
DPE Page 4,5,6,7,8,9,10 Page 33
Page 35
DP Conn CRT FDI x2 DMI x4 Port 2,5,6

USB conn x 3 (For I/O) daughter board
100MHz 100MHz
sub/B Page 6 CRT page 39
2 Dock Conn VGA Switch 2.7GT/s 5GT/s 2
ThunderBolt Page 33
2 to 2 Port 0,11
Mini DP Conn. Cactus Ridge Docking x 2
CRT MAX14885EETL CRT USB 3.0 x4
sub/B Page 4 sub/B Page 2,3,4 VGA Conn Page 33
daughter board Page 36 Page 36 Intel Port 1,4,5,9
USB 2.0 x 11 USB conn x 4(For I/O)
Port 3,4 X4 Lynx Point page 39
PCI-Express x 8 (ARD PCIE2.0 2.5GT/s) 100MHz daughter board
PCH
Digital MIC Port 6
SATAx4 100MHz
695pin BGA Page 22
Expresscard
HD Audio HDA Codec sub/B Page 7
Port 8 Port 6 Port 5 Port 7 Port 1 Port 2 Port 4 Port 0 20mm*20mm
IDT 92HD91 Combo Jack Smart card Controller
(GEN1 1.5Gb/S Page 13,14,15,16,17,18,19,20,21 Page 26 Port 7
LS-9373P Page 4
GEN2 3Gb/S AU9540A51 Page 37
SPI
GEN3 6Gb/S)
daughter board SPK conn Port 8 FPR
LPC BUS
SATA HDD Page 27 Validity VFM471Page
Card Reader GLAN Intel WLAN ODD mSATA SATA HDD BIOS SPI ROM x1, 28
Realtek RTS5237 Clarkville Expresscard (MINI card) Conn. Conn. Conn. Conn. 16 MB
Page 16 Port 10
LS-9373P Page 4 Page 23 Page 23 (Secondary) (primary) Webcam
Page 29 sub/B Page 7 Page 25 Page 23 Page 23 Page 22
33MHz
3 Port 6 Port 13 Port 12
3
WWAN SIM Card

Lan Switch USB 2.0 Bus Page 25 Page 25
SD/MMC Slot
LS-9373P Page 4 PI3L500 Port 13
daughter board Page 29
WLAN
Dock Conn RJ45 Conn.

Page 33 Page 29
Super I/O TPM1.2
KBC EC ROM
Docking connector:
SMSC LPC47N217 Infineon SLB9656 2MB Page
Page 28
SMSC MES1132 SPI(PCH) 30
RJ45
Page 32
Accelerometer Page 30
ST HP3DC2 USB30*1
PS2
Page 28 USB20*1
DP*2
FAN conn. SMBus (PCH) Int.KBD Parallel port
Page 24 Touch Pad
Page 38 Page 38 Serial port
4 PS/2 4
RTC CKT. Page 13 Line in/Line out

SATAx2
Power On/Off CKT. VGA
LS-9376P Page 4
2012/06/11 2013/06/11 Title
DC/DC interface CKT.
Page 34
Issued Date Deciphered Date
Block Diagrams
Custom 0.3
LA-9371P
A B C D E
5 4 3 2 1
( O MEANS ON X MEANS OFF )

Voltage Rails Symbol Note :
+RTCVCC B+ +5VDS +1.35V +5VS
+3VDS +0.675VS +3VS
D
+1.5VS : means Digital Ground D
power
plane +VCC_CORE
+1.05VS
+1.05VM : means Analog Ground
@ : means just reserve , no build
State AMT@ : means just install for support iAMT

CONN@ : means ME part.
L Layout Notes
07/24 update
S0
O O O O O : Question Area Mark.(Wait check)
S1
C
O O O O O C
S3
O O O O X Install below 45 level BOM structure for ver. 0.1
S5 S4/AC 45@ : means just put it in the BOM of 45 level.
O O O X X
S5 S4/ Battery only
O O X X X
S5 S4/AC & Battery
don't exist
O X X X X Install below 43 level BOM structure for ver. 0.1
DEBUG@ : means just build when PCIE port 80 CARD function enable.Remove before MP
SMBUS Control Table
2nd
SOURCE BATT XDP SODIMM G-SENSOR TP NIC NFC EC MXM
BATT
B I2C_MAIN_CLK
I2C_MAIN_DAT
SMSC1126
V X X X X X X X X X B
I2C_BAY_CLK
I2C_BAY_DAT
SMSC1126
X V X X X X X X X X
MEM_SMBCLK
MEM_SMBDATA
Haswell
X X V V V V X X X X
LAN_SMBCLK
LAN_SMBDATA
Haswell
X X X X X X V V X X
SML1_SMBCLK
SML1_SMBDATA Haswell
X X X X X X X X V V
Stapping Options Flash
GPIO 51 GPIO 19 Boot BIOS Destination

Bit 1 Bit 0
A
0 0 Reserved A
0 1 RSVD
1 0 SPI
1 1 LPC
Notes List
Custom 0.3
LA-9371P
5 4 3 2 1
5 4 3 2 1
+VCCIOA_OUT
PEG_COMP 2 1
D 24.9_0402_1% RC1 D
CAD Note:
Trace width=12 mils ,Spacing=15mil
Max length= 400 mils.
PEG_CRX_GTX_P[0..15]
Haswell rPGA EDS PEG_CRX_GTX_P[0..15] <35>
JCPU1A CONN@
PEG_CRX_GTX_N[0..15]
PEG_CRX_GTX_N[0..15] <35>
E23 PEG_COMP
PEG_RCOMP M29 PEG_CRX_GTX_N0 PEG_CTX_GRX_P[0..15]
DMI_CRX_PTX_N0 D21 PEG_RXN_0 K28 PEG_CRX_GTX_N1 PEG_CTX_GRX_P[0..15] <35>
<14> DMI_CRX_PTX_N0 DMI_RXN_0 PEG_RXN_1
DMI_CRX_PTX_N1 C21 M31 PEG_CRX_GTX_N2 PEG_CTX_GRX_N[0..15]
<14> DMI_CRX_PTX_N1 DMI_RXN_1 PEG_RXN_2 PEG_CTX_GRX_N[0..15] <35>
DMI_CRX_PTX_N2 B21 L30 PEG_CRX_GTX_N3
<14> DMI_CRX_PTX_N2 DMI_RXN_2 PEG_RXN_3
DMI_CRX_PTX_N3 A21 M33 PEG_CRX_GTX_N4
<14> DMI_CRX_PTX_N3 DMI_RXN_3 PEG_RXN_4 L32 PEG_CRX_GTX_N5
DMI_CRX_PTX_P0 D20 PEG_RXN_5 M35 PEG_CRX_GTX_N6
<14> DMI_CRX_PTX_P0
PEG
DMI_CRX_PTX_P1 C20 DMI_RXP_0 PEG_RXN_6 L34 PEG_CRX_GTX_N7
<14> DMI_CRX_PTX_P1 DMI_RXP_1 PEG_RXN_7
DMI_CRX_PTX_P2 B20 E29 PEG_CRX_GTX_N8
<14> DMI_CRX_PTX_P2 DMI_RXP_2 PEG_RXN_8
DMI_CRX_PTX_P3 A20 D28 PEG_CRX_GTX_N9
<14> DMI_CRX_PTX_P3
DMI
DMI_RXP_3 PEG_RXN_9 E31 PEG_CRX_GTX_N10
DMI_CTX_PRX_N0 D18 PEG_RXN_10 D30 PEG_CRX_GTX_N11
<14> DMI_CTX_PRX_N0 DMI_CTX_PRX_N1 C17 DMI_TXN_0 PEG_RXN_11 E35 PEG_CRX_GTX_N12 PEG_CTX_GRX_C_P0 2 1 0.22U_0402_6.3V6K PEG_CTX_GRX_P0
CC1
<14> DMI_CTX_PRX_N1 DMI_CTX_PRX_N2 B17 DMI_TXN_1 PEG_RXN_12 D34 PEG_CRX_GTX_N13 PEG_CTX_GRX_C_N0 2 1 0.22U_0402_6.3V6K PEG_CTX_GRX_N0
CC2
<14> DMI_CTX_PRX_N2 DMI_CTX_PRX_N3 A17 DMI_TXN_2 PEG_RXN_13 E33 PEG_CRX_GTX_N14
<14> DMI_CTX_PRX_N3 DMI_TXN_3 PEG_RXN_14 E32 PEG_CRX_GTX_N15 PEG_CTX_GRX_C_P1 2 1 0.22U_0402_6.3V6K PEG_CTX_GRX_P1
CC3
DMI_CTX_PRX_P0 D17 PEG_RXN_15 L29 PEG_CRX_GTX_P0 PEG_CTX_GRX_C_N1 CC4 2 1 0.22U_0402_6.3V6K PEG_CTX_GRX_N1
<14> DMI_CTX_PRX_P0 DMI_CTX_PRX_P1 C18 DMI_TXP_0 PEG_RXP_0 L28 PEG_CRX_GTX_P1
<14> DMI_CTX_PRX_P1 DMI_CTX_PRX_P2 B18 DMI_TXP_1 PEG_RXP_1 L31 PEG_CRX_GTX_P2 PEG_CTX_GRX_C_P2 2 1 0.22U_0402_6.3V6K PEG_CTX_GRX_P2
CC5
C <14> DMI_CTX_PRX_P2 DMI_CTX_PRX_P3 A18 DMI_TXP_2 PEG_RXP_2 K30 PEG_CRX_GTX_P3 PEG_CTX_GRX_C_N2 2 1 0.22U_0402_6.3V6K PEG_CTX_GRX_N2 C
CC6
<14> DMI_CTX_PRX_P3 DMI_TXP_3 PEG_RXP_3 L33 PEG_CRX_GTX_P4
PEG_RXP_4 K32 PEG_CRX_GTX_P5 PEG_CTX_GRX_C_P3 CC7 2 1 0.22U_0402_6.3V6K PEG_CTX_GRX_P3
PEG_RXP_5 L35 PEG_CRX_GTX_P6 PEG_CTX_GRX_C_N3 CC8 2 1 0.22U_0402_6.3V6K PEG_CTX_GRX_N3
PEG_RXP_6 K34 PEG_CRX_GTX_P7
PEG_RXP_7 F29 PEG_CRX_GTX_P8 PEG_CTX_GRX_C_P4 CC9 2 1 0.22U_0402_6.3V6K PEG_CTX_GRX_P4
FDI_CSYNC H29 PEG_RXP_8 E28 PEG_CRX_GTX_P9 PEG_CTX_GRX_C_N4 CC10 2 1 0.22U_0402_6.3V6K PEG_CTX_GRX_N4
<14> FDI_CSYNC
FDI
FDI_INT J29 FDI_CSYNC PEG_RXP_9 F31 PEG_CRX_GTX_P10
<14> FDI_INT DISP_INT PEG_RXP_10 E30 PEG_CRX_GTX_P11 PEG_CTX_GRX_C_P5 CC11 2 1 0.22U_0402_6.3V6K PEG_CTX_GRX_P5
PEG_RXP_11 F35 PEG_CRX_GTX_P12 PEG_CTX_GRX_C_N5 CC12 2 1 0.22U_0402_6.3V6K PEG_CTX_GRX_N5
PEG_RXP_12 E34 PEG_CRX_GTX_P13
PEG_RXP_13 F33 PEG_CRX_GTX_P14 PEG_CTX_GRX_C_P6 CC13 2 1 0.22U_0402_6.3V6K PEG_CTX_GRX_P6
PEG_RXP_14 D32 PEG_CRX_GTX_P15 PEG_CTX_GRX_C_N6 CC14 2 1 0.22U_0402_6.3V6K PEG_CTX_GRX_N6
PEG_RXP_15 H35 PEG_CTX_GRX_C_N0
PEG_TXN_0 H34 PEG_CTX_GRX_C_N1 PEG_CTX_GRX_C_P7 CC15 2 1 0.22U_0402_6.3V6K PEG_CTX_GRX_P7
PEG_TXN_1 J33 PEG_CTX_GRX_C_N2 PEG_CTX_GRX_C_N7 CC16 2 1 0.22U_0402_6.3V6K PEG_CTX_GRX_N7
PEG_TXN_2 H32 PEG_CTX_GRX_C_N3
PEG_TXN_3 J31 PEG_CTX_GRX_C_N4 PEG_CTX_GRX_C_P8 CC17 1 2 0.22U_0402_6.3V6K PEG_CTX_GRX_P8
PEG_TXN_4 G30 PEG_CTX_GRX_C_N5 PEG_CTX_GRX_C_N8 CC18 1 2 0.22U_0402_6.3V6K PEG_CTX_GRX_N8
PEG_TXN_5 C33 PEG_CTX_GRX_C_N6
PEG_TXN_6 B32 PEG_CTX_GRX_C_N7 PEG_CTX_GRX_C_P9 CC19 1 2 0.22U_0402_6.3V6K PEG_CTX_GRX_P9
PEG_TXN_7 B31 PEG_CTX_GRX_C_N8 PEG_CTX_GRX_C_N9 CC20 1 2 0.22U_0402_6.3V6K PEG_CTX_GRX_N9
PEG_TXN_8 A30 PEG_CTX_GRX_C_N9
PEG_TXN_9 B29 PEG_CTX_GRX_C_N10 PEG_CTX_GRX_C_P10 CC21 1 2 0.22U_0402_6.3V6K PEG_CTX_GRX_P10
PEG_TXN_10 A28 PEG_CTX_GRX_C_N11 PEG_CTX_GRX_C_N10 CC22 1 2 0.22U_0402_6.3V6K PEG_CTX_GRX_N10
PEG_TXN_11 B27 PEG_CTX_GRX_C_N12
PEG_TXN_12 A26 PEG_CTX_GRX_C_N13 PEG_CTX_GRX_C_P11 CC23 1 2 0.22U_0402_6.3V6K PEG_CTX_GRX_P11
PEG_TXN_13 B25 PEG_CTX_GRX_C_N14 PEG_CTX_GRX_C_N11 CC24 1 2 0.22U_0402_6.3V6K PEG_CTX_GRX_N11
PEG_TXN_14 A24 PEG_CTX_GRX_C_N15
PEG_TXN_15 J35 PEG_CTX_GRX_C_P0 PEG_CTX_GRX_C_P12 CC25 1 2 0.22U_0402_6.3V6K PEG_CTX_GRX_P12
PEG_TXP_0 G34 PEG_CTX_GRX_C_P1 PEG_CTX_GRX_C_N12 CC26 1 2 0.22U_0402_6.3V6K PEG_CTX_GRX_N12
PEG_TXP_1 H33 PEG_CTX_GRX_C_P2
B PEG_TXP_2 G32 PEG_CTX_GRX_C_P3 PEG_CTX_GRX_C_P13 CC27 1 2 0.22U_0402_6.3V6K PEG_CTX_GRX_P13 B
PEG_TXP_3 H31 PEG_CTX_GRX_C_P4 PEG_CTX_GRX_C_N13 CC28 1 2 0.22U_0402_6.3V6K PEG_CTX_GRX_N13
PEG_TXP_4 H30 PEG_CTX_GRX_C_P5
PEG_TXP_5 B33 PEG_CTX_GRX_C_P6 PEG_CTX_GRX_C_P14 CC29 1 2 0.22U_0402_6.3V6K PEG_CTX_GRX_P14
PEG_TXP_6 A32 PEG_CTX_GRX_C_P7 PEG_CTX_GRX_C_N14 CC30 1 2 0.22U_0402_6.3V6K PEG_CTX_GRX_N14
PEG_TXP_7 C31 PEG_CTX_GRX_C_P8
PEG_TXP_8 B30 PEG_CTX_GRX_C_P9 PEG_CTX_GRX_C_P15 CC31 1 2 0.22U_0402_6.3V6K PEG_CTX_GRX_P15
PEG_TXP_9 C29 PEG_CTX_GRX_C_P10 PEG_CTX_GRX_C_N15 CC32 1 2 0.22U_0402_6.3V6K PEG_CTX_GRX_N15
PEG_TXP_10 B28 PEG_CTX_GRX_C_P11
PEG_TXP_15
1 OF 9
INTEL_HASWELL_HASWELL
A A

DMI,PEG
Custom 0.3
LA-9371P
5 4 3 2 1
5 4 3 2 1
+VCCIO_OUT
SM_DRAMPWROK with DDR Power Gating Topology
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1 1
+VCCIO_OUT +VCCIO_OUT
CC33
CC34
CXDP@ CXDP@
+1.35VS
+5VDS 2 2 JXDP1
1 2
GND0 GND1
1
CC35 XDP_PREQ# 3 4 CFG17
1 2 XDP_PRDY# 5 OBSFN_A0 OBSFN_C0 6 CFG16 CFG17 <8>
RC5
7 OBSFN_A1 OBSFN_C1 8 CFG16 <8>
1.8K_0402_1% GND2 GND3
0.1U_0402_10V6K Place near JXDP1 CFG0 9 10 CFG8
<8> CFG0 11 OBSDATA_A0 OBSDATA_C0 12 CFG8 <8>
20120923 HP's request UC1 CFG1 CFG9
2
<8> CFG1 OBSDATA_A1 OBSDATA_C1 CFG9 <8>
5
20120810 HP's request 13 14
1 CFG2 15 GND4 GND5 16 CFG10
P
<30,31,46> PWR_GD B 4 <8> CFG2 17 OBSDATA_A2 OBSDATA_C2 18 CFG10 <8>
PM_DRAM_PWRGD_CPU CFG3 CFG11
D
2 O <8> CFG3 19 OBSDATA_A3 OBSDATA_C3 20 CFG11 <8> D
<14> PM_DRAM_PWRGD A GND6 GND7
G
XDP_OBS0 21 22 CFG19
OBSFN_B0 OBSFN_D0 CFG19 <8>
1
1 2 74AHC1G09GW_TSSOP5 XDP_OBS1 23 24 CFG18
+3VS
3
25 OBSFN_B1 OBSFN_D1 26 CFG18 <8>
RC9 100K_0402_1% Part Number = SA00003Y000 RC10
3.3K_0402_1% CFG4 27 GND8 GND9 28 CFG12
<8> CFG4 29 OBSDATA_B0 OBSDATA_D0 30 CFG12 <8>
CFG5 CFG13
<8> CFG5 31 OBSDATA_B1 OBSDATA_D1 32 CFG13 <8>
2
CFG6 33 GND10 GND11 34 CFG14
<8> CFG6 CFG7 35 OBSDATA_B2 OBSDATA_D2 36 CFG15 CFG14 <8>
<8> CFG7 37 OBSDATA_B3 OBSDATA_D3 38 CFG15 <8> 20121104 HP's request
RC5 need to close to JCPU1 GND12 GND13
H_CPUPWRGD RC13 1 CXDP@ 2 1K_0402_1% H_CPUPWRGD_XDP 39 40 CLK_XDP RH1 2 @ 1 0_0402_5%
41 PWRGOOD/HOOK0 ITPCLK/HOOK4 42 CLK_BCLK_ITP <15>
<13,14,30> ON/OFFBTN#
CLK_XDP# RH2 2 @ 1 0_0402_5%
43 HOOK1 ITPCLK#/HOOK5 44 CLK_BCLK_ITP# <15>
VCC_OBS_AB VCC_OBS_CD CXDP@
45 46 XDP_RST#_R 2 1 PLT_RST#
<9> CPU_PWR_DEBUG HOOK2 RESET#/HOOK6 PLT_RST# <13,14,25,28,29,30,35,37,39>
RC1071 CXDP@ 2 0_0402_5% PM_PWROK_XDP 47 48 XDP_DBRESET# RC16 1K_0402_1%
<14,30> PM_PWROK 49 HOOK3 DBR#/HOOK7 50
20121020 Delete QC1, RC12 as HP's request 20120925 HP's request GND14 GND15
51 52 XDP_TDO
<11,12,13,16,28,38> DDR_XDP_WAN_SMBDAT SDA TD0
0.1U_0402_16V4Z
53 54 XDP_TRST#
<11,12,13,16,28,38> DDR_XDP_WAN_SMBCLK 55 SCL TRST# 56 XDP_TDI
TCK1 TDI 1
XDP_TCLK 57 58 XDP_TMS
TCK0 TMS
CH103
59 60 2 1 CFG3
GND16 GND17 RC105 CXDP@ 1K_0402_1% 2
SAMTE_BSH-030-01-L-D-A CONN@
KBC_PROC_HOT_R
<24,46> KBC_PROC_HOT_R
+VCCIO_OUT
#4/16 change by HP requirement
Haswell rPGA EDS 1 @ 2

JCPU1B CONN@ RC22 0_0402_5%
1 2
RC23 62_0402_5% PAD T120 @ CPU_DETECT# AP32 MISC AP3 SM_RCOMP0
SKTOCC SM_RCOMP_0 AR3 SM_RCOMP1 BSS138W-7-F_SOT323-3
SM_RCOMP_1
DDR3
THERMAL
PAD T118 @ H_CATERR# AN32 AP2 SM_RCOMP2 QC2
CATERR SM_RCOMP_2
D
<30> H_PECI H_PECI AR27 AN3 DDR3_DRAMRST#_CPU DDR3_DRAMRST#_CPU 3 1
AK31 PECI SM_DRAMRST CPU_DRAM_RST# <11>
PAD T1 @
KBC_PROC_HOT RC26 1 2 56_0402_5% KBC_PROC_HOT_R AM30 FC_AK31 AR29 XDP_PRDY#
PROCHOT PRDY
4.99K_0402_1%
RC27 1 2 390_0402_1% H_THERMTRIP# AM35 AT29 XDP_PREQ#
G
<18,24,35> PCH_THERMTRIP#_R
2
C
THERMTRIP PREQ AM34 XDP_TCLK C
TCK
1
1
D AN33 XDP_TMS
20120911 Delete RC30 as HP's request TMS
RC28
2 AM33 XDP_TRST#
JTAG
24,30> KBC_PROC_HOT# TRST
G Q59 <14> H_PM_SYNC H_PM_SYNC AT28 AM31 XDP_TDI 20120725 for S3 resume as HP's request
PWR
H_CPUPWRGD AL34 PM_SYNC TDI AL33 XDP_TDO
S <18> H_CPUPWRGD
3
PM_DRAM_PWRGD_CPU AC10 PWRGOOD TDO AP33 XDP_DBRESET# RC25 1 2 3.3K_0402_5%
2
2N7002KW_SOT323-3 AT26 SM_DRAMPWROK DBR XDP_DBRESET# <13,14> DDR_RST_EN <16>
<18> CPU_PLTRST# CPU_PLTRST#
PLTRSTIN AR30 XDP_OBS0
BPM_N_0 AN31 XDP_OBS1
BPM_N_1
1
G28 AN29 XDP_OBS2_R
<15> CLK_CPU_DPLL# DPLL_REF_CLKN BPM_N_2 @
PAD T152
CLOCK
H28 AP31 XDP_OBS3_R RC108
<15> CLK_CPU_DPLL DPLL_REF_CLKP BPM_N_3 @
PAD T153
1
<15> CLK_CPU_SSC_DPLL#
F27 AP30 XDP_OBS4_R 10K_0402_5%
SSC_DPLL_REF_CLKN BPM_N_4 @
PAD T154
E27 AN28 XDP_OBS5_R D QC3 @
<15> CLK_CPU_SSC_DPLL SSC_DPLL_REF_CLKP BPM_N_5 @
PAD T155
<15> CLK_CPU_DMI#
D26 AP29 XDP_OBS6_R @ <30,44> KBC_DS3_EN
2
2
E26 BCLKN BPM_N_6 AP28 XDP_OBS7_R PAD T156 20121012 Reserve RC108
<15> CLK_CPU_DMI @ G
BCLKP BPM_N_7 PAD T157
S 2N7002K_SOT23-3 201220 Change RC108 to 10K as HP's request
For ESD concern, please place close to CPU
3
2 OF 9
INTEL_HASWELL_HASWELL 20121109 ESD request 20121020 Uninstall QC3 as HP's request
PU/PD for JTAG signals

+3VS
SSC CLOCK TERMINATION, IF NOT USED, stuff RC20,RC21 XDP_DBRESET# RC52 2 1 1K_0402_1%
+1.05VS
H_CPUPWRGD
1
CRB Rev 0.7 no pull up
RC55
B B
10K_0402_1%
XDP_TDO RC57 2 1 51_0402_1%
DDR3 COMPENSATION SIGNALS
2
CRB Rev 0.7 is depop
SM_RCOMP0 RC59 1 2 100_0402_1% XDP_TCLK RC60 2 1 51_0402_1%
CAD Note: SM_RCOMP1 RC61 1 2 75_0402_1% XDP_TRST# RC62 2 1 51_0402_1%
Avoid stub in the PWRGD path
SM_RCOMP2 RC65 1 2 100_0402_1%
20120911 Delete RC66 as HP's request
while placing resistors RC25 & RC130
CAD Note:
Trace width=12~15 mil, Spcing=20 mils
Max trace length= 500 mil
A A

PM,XDP,CLK
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize Document Number Rev
Custom 0.3
LA-9371P
5 4 3 2 1
5 4 3 2 1
D D
Haswell rPGA EDS

CONN@ JCPU1C Haswell rPGA EDS
JCPU1D CONN@
<11> DDR_A_D[0..63] <12> DDR_B_D[0..63]
DDR_A_D0 AR15 AC7
DDR_A_D1 AT14 SA_DQ_0 RSVD U4 M_CLK_A_DDR#0 DDR_B_D0 AR18 AG8 @ T3 PAD~D
SA_DQ_1 SA_CK_N_0 M_CLK_A_DDR#0 <11> SB_DQ_0 RSVD
DDR_A_D2 AM14 V4 M_CLK_A_DDR0 DDR_B_D1 AT18 Y4 M_CLK_B_DDR#0
SA_DQ_2 SA_CK_P_0 M_CLK_A_DDR0 <11> SB_DQ_1 SB_CKN0 M_CLK_B_DDR#0 <12>
DDR_A_D3 AN14 AD9 DDR_CKE0_DIMMA DDR_B_D2 AM17 AA4 M_CLK_B_DDR0
SA_DQ_3 SA_CKE_0 DDR_CKE0_DIMMA <11> SB_DQ_2 SB_CK0 M_CLK_B_DDR0 <12>
DDR_A_D4 AT15 U3 M_CLK_A_DDR#1 DDR_B_D3 AM18 AF10 DDR_CKE0_DIMMB
SA_DQ_4 SA_CK_N_1 M_CLK_A_DDR#1 <11> SB_DQ_3 SB_CKE_0 DDR_CKE0_DIMMB <12>
DDR_A_D5 AR14 V3 M_CLK_A_DDR1 DDR_B_D4 AR17 Y3 M_CLK_B_DDR#1
DDR_A_D6 AN15 AC9 DDR_CKE1_DIMMA DDR_B_D5 AT17 AA3 M_CLK_B_DDR1
DDR_A_D7 AM15 U2 M_CLK_A_DDR#2 DDR_B_D6 AN17 AG10 DDR_CKE1_DIMMB
DDR_A_D8 AM9 V2 M_CLK_A_DDR2 DDR_B_D7 AN18 Y2 M_CLK_B_DDR#2
DDR_A_D9 AN9 AD8 DDR_CKE2_DIMMA DDR_B_D8 AT12 AA2 M_CLK_B_DDR2
DDR_A_D10 AM8 U1 M_CLK_A_DDR#3 DDR_B_D9 AR12 AG9 DDR_CKE2_DIMMB
DDR_A_D11 AN8 V1 M_CLK_A_DDR3 DDR_B_D10 AN12 Y1 M_CLK_B_DDR#3
DDR_A_D12 AR9 AC8 DDR_CKE3_DIMMA DDR_B_D11 AM11 AA1 M_CLK_B_DDR3
DDR_A_D13 AT9 DDR_B_D12 AT11 AF9 DDR_CKE3_DIMMB
SA_DQ_13 SB_DQ_12 SB_CKE_3 DDR_CKE3_DIMMB <12>
DDR_A_D14 AR8 M7 DDR_CS0_DIMMA# DDR_B_D13 AR11
SA_DQ_14 SA_CS_N_0 DDR_CS0_DIMMA# <11> SB_DQ_13
DDR_A_D15 AT8 L9 DDR_CS1_DIMMA# DDR_B_D14 AM12 P4 DDR_CS0_DIMMB#
SA_DQ_15 SA_CS_N_1 DDR_CS1_DIMMA# <11> SB_DQ_14 SB_CS_N_0 DDR_CS0_DIMMB# <12>
DDR_A_D16 AJ9 M9 DDR_CS2_DIMMA# DDR_B_D15 AN11 R2 DDR_CS1_DIMMB#
DDR_A_D17 AK9 M10 DDR_CS3_DIMMA# DDR_B_D16 AR5 P3 DDR_CS2_DIMMB#
DDR_A_D18 AJ6 M8 M_A_ODT0 M_A_ODT0 <11> DDR_B_D17 AR6 P1 DDR_CS3_DIMMB#
SA_DQ_18 SA_ODT_0 SB_DQ_17 SB_CS_N_3 DDR_CS3_DIMMB# <12>
DDR_A_D19 AK6 L7 M_A_ODT1 M_A_ODT1 <11> DDR_B_D18 AM5
DDR_A_D20 AJ10 SA_DQ_19 SA_ODT_1 L8 M_A_ODT2 DDR_B_D19 AM6 SB_DQ_18 R4 M_B_ODT0
SA_DQ_20 SA_ODT_2 M_A_ODT2 <11> SB_DQ_19 SB_ODT_0 M_B_ODT0 <12>
DDR_A_D21 AK10 L10 M_A_ODT3 M_A_ODT3 <11> DDR_B_D20 AT5 R3 M_B_ODT1 M_B_ODT1 <12>
DDR_A_D22 AJ7 SA_DQ_21 SA_ODT_3 V5 DDR_A_BS0 DDR_B_D21 AT6 SB_DQ_20 SB_ODT_1 R1 M_B_ODT2
SA_DQ_22 SA_BS_0 DDR_A_BS0 <11> SB_DQ_21 SB_ODT_2 M_B_ODT2 <12>
DDR_A_D23 AK7 U5 DDR_A_BS1 DDR_B_D22 AN5 P2 M_B_ODT3 M_B_ODT3 <12>
SA_DQ_23 SA_BS_1 DDR_A_BS1 <11> SB_DQ_22 SB_ODT_3
DDR_A_D24 AF4 AD1 DDR_A_BS2 DDR_B_D23 AN6 R7 DDR_B_BS0
C SA_DQ_24 SA_BS_2 DDR_A_BS2 <11> SB_DQ_23 SB_BS_0 DDR_B_BS0 <12> C
DDR_A_D25 AF5 DDR_B_D24 AJ4 P8 DDR_B_BS1
SA_DQ_25 SB_DQ_24 SB_BS_1 DDR_B_BS1 <12>
DDR_A_D26 AF1 V10 DDR_B_D25 AK4 AA9 DDR_B_BS2
SA_DQ_26 VSS SB_DQ_25 SB_BS_2 DDR_B_BS2 <12>
DDR_A_D27 AF2 U6 DDR_A_RAS# DDR_B_D26 AJ1
SA_DQ_27 SA_RAS DDR_A_RAS# <11> SB_DQ_26
DDR_A_D28 AG4 U7 DDR_A_WE# DDR_B_D27 AJ2 R10
SA_DQ_28 SA_WE DDR_A_WE# <11> SB_DQ_27 VSS
DDR_A_D29 AG5 U8 DDR_A_CAS# DDR_B_D28 AM1 R6 DDR_B_RAS#
SA_DQ_29 SA_CAS DDR_A_CAS# <11> SB_DQ_28 SB_RAS DDR_B_RAS# <12>
DDR_A_D30 AG1 DDR_B_D29 AN1 P6 DDR_B_WE#
SA_DQ_30 DDR_A_MA[0..15] <11> SB_DQ_29 SB_WE DDR_B_WE# <12>
DDR_A_D31 AG2 V8 DDR_A_MA0 DDR_B_D30 AK2 P7 DDR_B_CAS#
SA_DQ_31 SA_MA_0 SB_DQ_30 SB_CAS DDR_B_CAS# <12>
DDR_A_D32 J1 AC6 DDR_A_MA1 DDR_B_D31 AK1
SA_DQ_32 SA_MA_1 SB_DQ_31 DDR_B_MA[0..15] <12>
DDR_A_D33 J2 V9 DDR_A_MA2 DDR_B_D32 L2 R8 DDR_B_MA0
DDR_A_D34 J5 SA_DQ_33 SA_MA_2 U9 DDR_A_MA3 DDR_B_D33 M2 SB_DQ_32 SB_MA_0 Y5 DDR_B_MA1
DDR_A_D35 H5 SA_DQ_34 SA_MA_3 AC5 DDR_A_MA4 DDR_B_D34 L4 SB_DQ_33 SB_MA_1 Y10 DDR_B_MA2
DDR_A_D36 H2 SA_DQ_35 SA_MA_4 AC4 DDR_A_MA5 DDR_B_D35 M4 SB_DQ_34 SB_MA_2 AA5 DDR_B_MA3
DDR_A_D37 H1 SA_DQ_36 SA_MA_5 AD6 DDR_A_MA6 DDR_B_D36 L1 SB_DQ_35 SB_MA_3 Y7 DDR_B_MA4
DDR_A_D38 J4 SA_DQ_37 SA_MA_6 AC3 DDR_A_MA7 DDR_B_D37 M1 SB_DQ_36 SB_MA_4 AA6 DDR_B_MA5
DDR_A_D39 H4 SA_DQ_38 SA_MA_7 AD5 DDR_A_MA8 DDR_B_D38 L5 SB_DQ_37 SB_MA_5 Y6 DDR_B_MA6
DDR_A_D40 F2 SA_DQ_39 SA_MA_8 AC2 DDR_A_MA9 DDR_B_D39 M5 SB_DQ_38 SB_MA_6 AA7 DDR_B_MA7
DDR_A_D41 F1 SA_DQ_40 SA_MA_9 V6 DDR_A_MA10 DDR_B_D40 G7 SB_DQ_39 SB_MA_7 Y8 DDR_B_MA8
DDR_A_D42 D2 SA_DQ_41 SA_MA_10 AC1 DDR_A_MA11 DDR_B_D41 J8 SB_DQ_40 SB_MA_8 AA10 DDR_B_MA9
DDR_A_D43 D3 SA_DQ_42 SA_MA_11 AD4 DDR_A_MA12 DDR_B_D42 G8 SB_DQ_41 SB_MA_9 R9 DDR_B_MA10
DDR_A_D44 D1 SA_DQ_43 SA_MA_12 V7 DDR_A_MA13 DDR_B_D43 G9 SB_DQ_42 SB_MA_10 Y9 DDR_B_MA11
DDR_A_D45 F3 SA_DQ_44 SA_MA_13 AD3 DDR_A_MA14 DDR_B_D44 J7 SB_DQ_43 SB_MA_11 AF7 DDR_B_MA12
DDR_A_D46 C3 SA_DQ_45 SA_MA_14 AD2 DDR_A_MA15 DDR_B_D45 J9 SB_DQ_44 SB_MA_12 P9 DDR_B_MA13
DDR_A_D47 B3 SA_DQ_46 SA_MA_15 DDR_B_D46 G10 SB_DQ_45 SB_MA_13 AA8 DDR_B_MA14
DDR_A_D48 B5 SA_DQ_47 DDR_B_D47 J10 SB_DQ_46 SB_MA_14 AG7 DDR_B_MA15
SA_DQ_48 DDR_A_DQS#[0..7] <11> SB_DQ_47 SB_MA_15
DDR_A_D49 E6 AP15 DDR_A_DQS#0 DDR_B_D48 A8
DDR_A_D50 A5 SA_DQ_49 SA_DQS_N_0 AP8 DDR_A_DQS#1 DDR_B_D49 B8 SB_DQ_48
SA_DQ_50 SA_DQS_N_1 SB_DQ_49 DDR_B_DQS#[0..7] <12>
DDR_A_D51 D6 AJ8 DDR_A_DQS#2 DDR_B_D50 A9 AP18 DDR_B_DQS#0
DDR_A_D52 D5 SA_DQ_51 SA_DQS_N_2 AF3 DDR_A_DQS#3 DDR_B_D51 B9 SB_DQ_50 SB_DQS_N_0 AP11 DDR_B_DQS#1
DDR_A_D53 E5 SA_DQ_52 SA_DQS_N_3 J3 DDR_A_DQS#4 DDR_B_D52 D8 SB_DQ_51 SB_DQS_N_1 AP5 DDR_B_DQS#2
DDR_A_D54 B6 SA_DQ_53 SA_DQS_N_4 E2 DDR_A_DQS#5 DDR_B_D53 E8 SB_DQ_52 SB_DQS_N_2 AJ3 DDR_B_DQS#3
DDR_A_D55 A6 SA_DQ_54 SA_DQS_N_5 C5 DDR_A_DQS#6 DDR_B_D54 D9 SB_DQ_53 SB_DQS_N_3 L3 DDR_B_DQS#4
DDR_A_D56 E12 SA_DQ_55 SA_DQS_N_6 C11 DDR_A_DQS#7 DDR_B_D55 E9 SB_DQ_54 SB_DQS_N_4 H9 DDR_B_DQS#5
SA_DQ_56 SA_DQS_N_7 DDR_A_DQS[0..7] <11> SB_DQ_55 SB_DQS_N_5
DDR_A_D57 D12 AP14 DDR_A_DQS0 DDR_B_D56 E15 C8 DDR_B_DQS#6
DDR_A_D58 B11 SA_DQ_57 SA_DQS_P_0 AP9 DDR_A_DQS1 DDR_B_D57 D15 SB_DQ_56 SB_DQS_N_6 C14 DDR_B_DQS#7
SA_DQ_58 SA_DQS_P_1 SB_DQ_57 SB_DQS_N_7 DDR_B_DQS[0..7] <12>
B DDR_A_D59 A11 AK8 DDR_A_DQS2 DDR_B_D58 A15 AP17 DDR_B_DQS0 B
DDR_A_D60 E11 SA_DQ_59 SA_DQS_P_2 AG3 DDR_A_DQS3 DDR_B_D59 B15 SB_DQ_58 SB_DQS_P_0 AP12 DDR_B_DQS1
DDR_A_D61 D11 SA_DQ_60 SA_DQS_P_3 H3 DDR_A_DQS4 DDR_B_D60 E14 SB_DQ_59 SB_DQS_P_1 AP6 DDR_B_DQS2
DDR_A_D62 B12 SA_DQ_61 SA_DQS_P_4 E3 DDR_A_DQS5 DDR_B_D61 D14 SB_DQ_60 SB_DQS_P_2 AK3 DDR_B_DQS3
DDR_A_D63 A12 SA_DQ_62 SA_DQS_P_5 C6 DDR_A_DQS6 DDR_B_D62 A14 SB_DQ_61 SB_DQS_P_3 M3 DDR_B_DQS4
AM3 SA_DQ_63 SA_DQS_P_6 C12 DDR_A_DQS7 DDR_B_D63 B14 SB_DQ_62 SB_DQS_P_4 H8 DDR_B_DQS5
+SM_VREF_CA SM_VREF SA_DQS_P_7 SB_DQ_63 SB_DQS_P_5
+DIMM01_VREF_DQ F16 C9 DDR_B_DQS6
F13 SA_DIMM_VREFDQ SB_DQS_P_6 C15 DDR_B_DQS7
+DIMM23_VREF_DQ SB_DIMM_VREFDQ SB_DQS_P_7
20120710 Change by HP request 4 OF 9
3 OF 9 INTEL_HASWELL_HASWELL
+SM_VREF_CA +DIMM01_VREF_DQ +DIMM23_VREF_DQ
1 1 1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
CC85
CC84
CC86
2 2 2
20120802 HP's request

L Layout Notes
A A
Place CC84,CC85,CC86 close to JCPU1
20120710 Change by HP request

DDRIII
Custom 0.3
LA-9371P
5 4 3 2 1
5 4 3 2 1
D D
COMPENSATION PU FOR eDP

+VCCIOA_OUT
EDP_COMP 2 1
24.9_0402_1% RC77
CAD Note:Trace width=20 mils ,Spacing=25mil,

Max length=100 mils.
Haswell rPGA EDS CONN@ JCPU1H
T28 M27 EDP_CPU_C_AUX# C126 1 2 0.1U_0402_25V6

U28 DDIB_TXBN_0 EDP_AUXN N27 EDP_CPU_AUX# <36>
EDP_CPU_C_AUX C127 1 2 0.1U_0402_25V6
T30 DDIB_TXBP_0 EDP_AUXP P27 EDP_HPD EDP_CPU_AUX <36>
C U30 DDIB_TXBN_1 eDP
EDP_HPD E24 EDP_COMP C
U29 DDIB_TXBP_1 EDP_RCOMP R27 T119@ PAD
V29 DDIB_TXBN_2 EDP_DISP_UT IL
U31 DDIB_TXBP_2
V31 DDIB_TXBN_3
DDIB_TXBP_3 P35 EDP_CPU_C_LANE_N0 C128 1 2 0.1U_0402_25V6
T34 EDP_TXN_0 R35 1 2 EDP_CPU_LANE_N0 <36>
EDP_CPU_C_LANE_P0 C129 0.1U_0402_25V6
U34 DDIC_TXCN_0 EDP_TXP_0 N34 1 2 EDP_CPU_LANE_P0 <36>
EDP_CPU_C_LANE_N1 C130 0.1U_0402_25V6
U35 DDIC_TXCP_0 EDP_TXN_1 P34 EDP_CPU_C_LANE_P1 1 2 EDP_CPU_LANE_N1 <36>
C131 0.1U_0402_25V6
V35 DDIC_TXCN_1 EDP_TXP_1 P33 FDI_CTX_PRX_N0 EDP_CPU_LANE_P1 <36>
U32 DDIC_TXCP_1 FDI_TXN_0 R33 FDI_CTX_PRX_P0 FDI_CTX_PRX_N0 <14>
T32 DDIC_TXCN_2 FDI_TXP_0 N32 FDI_CTX_PRX_P0 <14>
FDI_CTX_PRX_N1
U33 DDIC_TXCP_2 FDI_TXN_1 P32 FDI_CTX_PRX_N1 <14>
FDI_CTX_PRX_P1
V33 DDIC_TXCN_3 FDI_TXP_1 FDI_CTX_PRX_P1 <14>
DDIC_TXCP_3
P29
R29 DDID_TXDN_0
N28 DDID_TXDP_0
P28 DDID_TXDN_1 DDI
P31 DDID_TXDP_1
R31 DDID_TXDN_2
N30 DDID_TXDP_2
P30 DDID_TXDN_3
DDID_TXDP_3
8 OF 9
+VCCIO_OUT
1
RC78
HPD INVERSION FOR EDP 10K_0402_5%
B B
2
20120807 Change RC78 to 10K as HP's request
EDP_HPD
1
D
2 QH1
<36> CPU_EDP_HPD#
G BSS138W-7-F_SOT323-3
S SB000002X00
3
100K_0402_5%
1
RC79
2
A A

CPU-FDI,eDP,DDI
Custom 0.3
LA-9371P
5 4 3 2 1
5 4 3 2 1
CFG STRAPS for CPU

CFG2
1K_0402_1%
1
RC80
D D
2
PEG Static Lane Reversal - CFG2 is for the 16x
1:(Default) Normal Operation; Lane #
CFG2 definition matches socket pin map definition
0:Lane Reversed
Haswell rPGA EDS
JCPU1I
CFG4
AT1
RSVD_TP
1K_0402_1%
AT2 C23
RSVD_TP RSVD_TP
1
AD10 B23
RSVD RSVD_TP
RC81
D24
A34 RSVD_TP D23
A35 RSVD_TP RSVD_TP
RSVD_TP
2
@ T15 PAD~D W29
@ T12 PAD~D W28 RSVD_TP AT31 CFG_RCOMP
H_CPU_RSVD G26 RSVD_TP CFG_RCOMP AR21 CFG16
TESTLO_G26 CFG_16 CFG16 <5>
W33 AR23 CFG18
RSVD CFG_18 CFG18 <5>
@ T16 PAD~D AL30 AP21 CFG17
RSVD CFG_17 CFG17 <5>
@ T17 PAD~D AL29 AP23 CFG19
C
+VCC_CORE
F25 RSVD CFG_19 CFG19 <5> Display Port Presence Strap C
VCC
C35 AR33
B35 RSVD_TP RSVD G6 1 : Disabled; No Physical Display Port
RSVD_TP FC_G6 AM27
AL25 RSVD AM26 CFG4 attached to Embedded Display Port
RSVD_TP RSVD F5
@ T26 PAD~D W30 RSVD AM2 0 : Enabled; An external Display Port device is
@ T28 PAD~D W31 RSVD_TP RSVD K6
H_CPU_TESTLO W34 RSVD_TP RSVD connected to the Embedded Display Port
TESTLO E18
CFG0 AT20 RSVD
<5> CFG0 CFG_0
CFG1 AR20 U10 CFG6
<5> CFG1 CFG_1 RSVD
CFG2 AP20 P10
<5> CFG2 CFG_2 RSVD
CFG3 AP22 CFG5
<5> CFG3 CFG_3
1K_0402_1%
CFG4 AT22 B1
<5> CFG4 CFG_4 NC
1
1K_0402_1%
CFG5 AN22 A2
<5> CFG5 CFG_5 RSVD
@ RC82
@ RC83
CFG6 AT25 AR1
<5> CFG6 CFG_6 RSVD_TP
CFG7 AN23
<5> CFG7 CFG_7
CFG8 AR24 E21
<5> CFG8 CFG_8 RSVD_TP
CFG9 AT23 E20
<5> CFG9
2
CFG10 AN20 CFG_9 RSVD_TP
<5> CFG10 CFG_10
CFG11 AP24 AP27
<5> CFG11 CFG_11 RSVD
CFG12 AP26 AR26
<5> CFG12 CFG_12 RSVD
CFG13 AN25
<5> CFG13 CFG_13
CFG14 AN26 AL31
<5> CFG14 CFG_14 VSS
CFG15 AP25 AL32
<5> CFG15 CFG_15 VSS
20120710 Delete RC106/RC107 PCIE Port Bifurcation Straps
9 OF 9
2 1 H_CPU_TESTLO 11: (Default) x16 - Device 1 functions 1 and 2 disabled
RC84 49.9_0402_1%
B 2 1 CFG_RCOMP 10: x8, x8 - Device 1 function 1 enabled ; function 2 B
RC85 49.9_0402_1% CONN@
2 1 H_CPU_RSVD CFG[6:5] disabled
RC86 49.9_0402_1% 01: Reserved - (Device 1 function 1 disabled ; function
2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
CFG9
CFG7
1
1K_0402_1%
@ RC106
1
1K_0402_1%
@ RC87
2
2
2012/09/21 For a Intel Sighting
PEG DEFER TRAINING

1: (Default) PEG Train immediately
CFG7 following xxRESETB de assertion
0: PEG Wait for BIOS for training
A A

CPU-RSVD,CFG
Custom 0.3
LA-9371P
5 4 3 2 1
5 4 3 2 1
+1.35VS Source
B+ QC4 +1.35VS +VCC_CORE
Haswell rPGA EDS
+1.35V AON7408L_DFN8-5 JCPU1E CONN@
1
2 AA26
VCC
1
5 3 AA28
VCC
2
K27 AA34
RC88 RC89 L27 RSVD VCC AA30
100K_0402_5% 470_0603_5% T27 RSVD VCC AA32
4
V27 RSVD VCC AB26
2
D
RSVD VCC AB29 D
1
RUN_ON_CPU1.5VS3 +1.35VS VCC AB25
VCC
6
AB27
VCC AB28
3
VCC
1
1 CC38 2 1 0.1U_0402_10V6K AB11 AB30
2 DMN66D0LDW-7_SOT363-6 AB2 VDDQ VCC AB31
<34,48> SLP_S3 QC5A VDDQ VCC
CC40 2 1 0.1U_0402_10V6K AB5 AB33
RC92 CC39 5 SLP_S3 AB8 VDDQ VCC AB34
1
330K_0402_5% 2 0.1U_0402_25V6 AE11 VDDQ VCC AB32
QC5B
2
AE2 VDDQ VCC AC26
4
DMN66D0LDW-7_SOT363-6 VDDQ VCC
AE5 AB35
AE8 VDDQ VCC AC28
AH11 VDDQ VCC AD25
K11 VDDQ VCC AC30
N11 VDDQ VCC AD28
N8 VDDQ VCC AC32
RUN_ON_CPU1.5VS3 <11,12> VDDQ VCC
T11 AD31
T2 VDDQ VCC AC34
20121020 HP's request T5 VDDQ VCC AD34
20121104 Remove R6 & change T8 VDDQ VCC AD26
connection from KBC_PWR_ON# to W11 VDDQ VCC AD27
SLP_S3 as HP's request W2 VDDQ VCC AD29
W5 VDDQ VCC AD30
W8 VDDQ VCC AD32
VDDQ VCC AD33
N26 VCC AD35
K26 RSVD VCC AE26
+VCC_CORE VCC VCC
AL27 AE32
AK27 RSVD VCC AE28
RSVD VCC AE30
VCC AG28
VCC AG34
VCC AE34
VCC AF25
VCC AF26
C
SVID ALERT VCCSENSE AL35
E17 VCC_SENSE
RSVD
VCC
VCC
VCC
AF27
AF28
C
+VCCIO_OUT AN35 AF29

A23 VCCIO_OUT VCC AF30
@ T54 PAD~D RSVD VCC
CAD Note: Place the PU resistors close to CPU +VCCIOA_OUT F22 AF31
W32 VCOMP_OUT VCC AF32
RC60 close to CPU 300 - 1500mils AL16 RSVD VCC AF33
J27 RSVD VCC AF34
AL13 RSVD VCC AF35
20120725 HP's request RSVD VCC AG26
VCC AH26
RESISTOR STUFFING OPTIONS ARE VCC
<46> VR_SVID_ALRT# VR_SVID_ALRT# AM28 AH29
PROVIDED FOR TESTING PURPOSES VR_SVID_CLK AM29 VIDALERT VCC AG30
<46> VR_SVID_CLK VIDSCLK VCC
<46> VR_SVID_DAT VR_SVID_DAT AL28 AG32
+1.05VS VIDSOUT VCC AH32
SVID DATA <5> CPU_PWR_DEBUG
AP35
H27 VSS
VCC
VCC
AH35
AH25
AP34 PWR_DEBUG VCC AH27
CAD Note: Place the PU resistors close to CPU VSS VCC
1
AT35 AH28
RC63 close to CPU 300 - 1500mils RC98 @ T50 PAD~D AR35 RSVD_TP VCC AH30
@ T51 PAD~D AR32 RSVD_TP VCC AH31
150_0402_1% RSVD_TP VCC
@ T52 PAD~D AL26 AH33
@ T53 PAD~D AT34 RSVD_TP VCC AH34
2
AL22 VSS VCC AJ25
AT33 VSS VCC AJ26
CPU_PWR_DEBUG AM21 VSS VCC AJ27
AM25 VSS VCC AJ28
AM22 VSS VCC AJ29
AM20 VSS VCC AJ30
AM24 VSS VCC AJ31
AL19 VSS VCC AJ32
+VCC_CORE AM23 VSS VCC AJ33
AT32 VSS VCC AJ34
VCC_SENSE VSS VCC
VCC
AJ35
100_0402_1%
B G25 B
VCC
1
H25
VCC
RC101
J25
VCC K25
+VCC_CORE VCC L25
VCC M25
CAD Note: RC102 SHOULD BE PLACED CLOSE TO CPU
2
+1.35VS Y25 VCC N25

VDDQ DECOUPLING Y26 VCC VCC P25
VCCSENSE Y27 VCC VCC R25
<46> VCCSENSE VCC VCC
Y28 T25
Y29 VCC VCC
VCC
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
330U_D2_2V_Y
20120911 Delete RC102, RC103 as HP's request Y30 U25
330U_D2_2V_Y
1 1 VCC VCC
1 1 1 1 1 1 1 1 1 1 Y31 U26
+ + Y32 VCC VCC V25
CC41
VCC VCC
CC87
CC42
CC43
CC44
CC45
CC46
CC47
CC48
CC49
CC50
CC51
<10,46> VSSSENSE VSSSENSE Y33 V26
Y34 VCC VCC
2 2 2 2 2 2 2 2 2 2 2 2 Y35 VCC W26
@ VCC VCC
1
100_0402_1%
W27
CAD Note: RC103 SHOULD BE PLACED CLOSE TO CPU 5 OF 9 VCC
20120806 Add CC87 as Intel's reply
RC104
2
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
1 1 1 1 1 1 1 1 1 1 1
CH1
CH2
CH3
CH4
CH5
CH6
CH7
CH8
CH9
CH10
CH11
2 2 2 2 2 2 2 2 2 2 2
A A

CPU- PWR
Custom 0.3
LA-9371P
5 4 3 2 1
5 4 3 2 1
D D
Haswell rPGA EDS JCPU1F CONN@ Haswell rPGA EDS JCPU1G CONN@
A10 AK34 B34 K10

A13 VSS VSS AK5 B4 VSS VSS K2
A16 VSS VSS AL1 B7 VSS VSS K29
A19 VSS VSS AL10 C1 VSS VSS K3
A7 VSS VSS AL21 C28 VSS VSS L11
AA11 VSS VSS AL23 C30 VSS VSS L26
AA25 VSS VSS E22 C32 VSS VSS L6
AA27 VSS VSS AL3 C34 VSS VSS M11
AB1 VSS VSS AL6 D10 VSS VSS M30
AB10 VSS VSS AL7 D13 VSS VSS M32
AA33 VSS VSS AL8 D16 VSS VSS M34
AA35 VSS VSS AL9 D19 VSS VSS M6
AB3 VSS VSS AM10 D22 VSS VSS N1
AC25 VSS VSS AM13 D25 VSS VSS N10
AB6 VSS VSS E25 D31 VSS VSS N3
C VSS VSS VSS VSS C
AD11 AN10 D7 N4
AC29 VSS VSS AN13 E1 VSS VSS N5
AD7 VSS VSS AN21 E4 VSS VSS P11
AE1 VSS VSS AN24 E7 VSS VSS P26
AE10 VSS VSS AN27 F10 VSS VSS P5
AE25 VSS VSS AN30 F11 VSS VSS R11
AE35 VSS VSS AP1 F17 VSS VSS R32
AE7 VSS VSS AP16 F21 VSS VSS T1
AE9 VSS VSS AP19 F23 VSS VSS T10
AF11 VSS VSS AP4 F24 VSS VSS T29
AF6 VSS VSS AP7 F26 VSS VSS T3
AF8 VSS VSS W25 F28 VSS VSS T31
AG11 VSS VSS AR10 F30 VSS VSS T33
AE31 VSS VSS AR16 F34 VSS VSS T4
AE33 VSS VSS AR2 F6 VSS VSS T7
AH1 VSS VSS AR25 F8 VSS VSS U11
AH10 VSS VSS AR28 F9 VSS VSS U27
AH2 VSS VSS AR31 G1 VSS VSS V11
AG27 VSS VSS AR34 G11 VSS VSS V28
AG29 VSS VSS AR4 G2 VSS VSS V30
AH3 VSS VSS AR7 G27 VSS VSS V32
B VSS VSS VSS VSS B
AG33 AT10 G29 V34
AG35 VSS VSS AT13 G3 VSS VSS W1
AH4 VSS VSS AT16 G31 VSS VSS W10
AH9 VSS VSS AT3 H10 VSS VSS W7
AJ11 VSS VSS AT30 H26 VSS VSS W9
AJ5 VSS VSS AT4 H6 VSS VSS Y11
AK11 VSS VSS AT7 H7 VSS VSS H11
AK25 VSS VSS B10 J11 VSS VSS AL24
AK26 VSS VSS B13 J26 VSS VSS F19
AK28 VSS VSS B16 J28 VSS VSS T26
AK29 VSS VSS B19 J30 VSS VSS AK35
AK30 VSS VSS B2 J32 VSS VSS_SENSE AK33 VSSSENSE <46,9>
AK32 VSS VSS B22 J34 VSS RSVD
E19 VSS VSS J6 VSS
VSS K1 VSS
VSS
6 OF 9 7 OF 9
INTEL_HASWELL_HASWELL INTEL_HASWELL_HASWELL
A A

CPU-VSS
Custom 0.3
LA-9371P
5 4 3 2 1
5 4 3 2 1
Populate RD1, De-Populate RD7 for Intel DDR3

VREFDQ multiple methods M1
JDIMM3 H=4.0mm BOT
JDIMM1 H=5.2 mm TOP
<12,9> RUN_ON_CPU1.5VS3 +1.35V +DIMM_A_DQ
+1.35V +1.35V
2
G
QD1 JDIMM3
1
+DIMM_A_DQ
1K_0402_5%
2N7002KW _SOT323-3 1 2
3 1 +1.35V +1.35V 3 VREF_DQ VSS1 4 DDR_A_D4
+DIMM01_VREF_DQ VSS2 DQ4
RD2
2.2U_0402_6.3V6M
0.1U_0402_16V4Z
JDIMM1 DDR_A_D0 5 6 DDR_A_D5
D
1 2 1 2 DDR_A_D1 7 DQ0 DQ5 8
D +1.35V VREF_DQ VSS 1 1 DQ1 VSS3 D
RD24 1K_0402_1% 3 4 DDR_A_D4 9 10 DDR_A_DQS#0
2
VSS DQ4 VSS4 DQS#0
2.2U_0402_6.3V6M
0.1U_0402_16V4Z
CD1
CD2
DDR_A_D0 5 6 DDR_A_D5 11 12 DDR_A_DQS0
DDR_A_D1 7 DQ0 DQ5 8
All VREF traces should 13 DM0 DQS0 14
1 1 DQ1 VSS VSS5 VSS6
1
have 10 mil trace width 2 2
1K_0402_1%
9 10 DDR_A_DQS#0 <12> DDR3_DRAMRST#_R 1 2 DDR_A_D2 15 16 DDR_A_D6
VSS DQS0# CPU_DRAM_RST# <5> DQ2 DQ6
CD3
CD4
11 12 DDR_A_DQS0 DDR_A_D3 17 18 DDR_A_D7
All VREF traces should DM0 DQS0 RD6 33_0402_5% DQ3 DQ7
RD23
13 14 19 20
2 2 VSS VSS VSS7 VSS8
have 10 mil trace width DDR_A_D2 15
DQ2 DQ6
16 DDR_A_D6 DDR_A_D8 21
DQ8 DQ12
22 DDR_A_D12
DDR_A_D3 17 18 DDR_A_D7 DDR_A_D9 23 24 DDR_A_D13
2
19 DQ3 DQ7 20 20120802 Change RD6 to 33Ohm as HP's request 25 DQ9 DQ13 26
DDR_A_D8 21 VSS VSS 22 DDR_A_D12 DDR_A_DQS#1 27 VSS9 VSS10 28
DDR_A_D9 23 DQ8 DQ12 24 DDR_A_D13 DDR_A_DQS1 29 DQS#1 DM1 30 DDR3_DRAMRST#_R
25 DQ9 DQ13 26 31 DQS1 RESET# 32
DDR_A_DQS#1 27 VSS VSS 28 DDR_A_D10 33 VSS11 VSS12 34 DDR_A_D14
<6> DDR_A_D[0..63] DQS1# DM1 DQ10 DQ14
DDR_A_DQS1 29 30 DDR3_DRAMRST#_R DDR_A_D11 35 36 DDR_A_D15
31 DQS1 RESET# 32 37 DQ11 DQ15 38
<6> DDR_A_DQS[0..7] 33 VSS VSS 34 39 VSS13 VSS14 40
DDR_A_D10 DDR_A_D14 DDR_A_D16 DDR_A_D20
DDR_A_D11 35 DQ10 DQ14 36 DDR_A_D15 DDR_A_D17 41 DQ16 DQ20 42 DDR_A_D21
<6> DDR_A_DQS#[0..7] 37 DQ11 DQ15 38 43 DQ17 DQ21 44
DDR_A_D16 39 VSS VSS 40 DDR_A_D20 DDR_A_DQS#2 45 VSS15 VSS16 46
<6> DDR_A_MA[0..15] 41 DQ16 DQ20 42 47 DQS#2 DM2 48
DDR_A_D17 DDR_A_D21 DDR_A_DQS2
43 DQ17 DQ21 44 49 DQS2 VSS17 50 DDR_A_D22
DDR_A_DQS#2 45 VSS VSS 46 DDR_A_D18 51 VSS18 DQ22 52 DDR_A_D23
DDR_A_DQS2 47 DQS2# DM2 48 DDR_A_D19 53 DQ18 DQ23 54
49 DQS2 VSS 50 DDR_A_D22 55 DQ19 VSS19 56 DDR_A_D28
DDR_A_D18 51 VSS DQ22 52 DDR_A_D23 DDR_A_D24 57 VSS20 DQ28 58 DDR_A_D29
Layout Note: DDR_A_D19 53 DQ18 DQ23 54 DDR_A_D25 59 DQ24 DQ29 60
DQ19 VSS DQ25 VSS21
Place near JDIMM1 55
VSS DQ28
56 DDR_A_D28 61
VSS22 DQS#3
62 DDR_A_DQS#3
DDR_A_D24 57 58 DDR_A_D29 63 64 DDR_A_DQS3
DDR_A_D25 59 DQ24 DQ29 60 65 DM3 DQS3 66
61 DQ25 VSS 62 DDR_A_DQS#3 DDR_A_D26 67 VSS23 VSS24 68 DDR_A_D30
63 VSS DQS3# 64 DDR_A_DQS3 DDR_A_D27 69 DQ26 DQ30 70 DDR_A_D31
65 DM3 DQS3 66 71 DQ27 DQ31 72
+1.35V DDR_A_D26 67 VSS VSS 68 DDR_A_D30 VSS25 VSS26
DDR_A_D27 69 DQ26 DQ30 70 DDR_A_D31
71 DQ27 DQ31 72
VSS VSS DDR_CKE2_DIMMA 73 74 DDR_CKE3_DIMMA
<6> DDR_CKE2_DIMMA CKE0 CKE1 DDR_CKE3_DIMMA <6>
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
C 75 76 C
DDR_CKE0_DIMMA 73 74 DDR_CKE1_DIMMA 77 VDD1 VDD2 78 DDR_A_MA15
1 1 1 1 <6> DDR_CKE0_DIMMA CKE0 CKE1 DDR_CKE1_DIMMA <6> NC1 A15
75 76 DDR_A_BS2 79 80 DDR_A_MA14
VDD VDD BA2 A14
CD5
CD6
CD7
CD8
77 78 DDR_A_MA15 81 82
DDR_A_BS2 79 NC A15 80 DDR_A_MA14 DDR_A_MA12 83 VDD3 VDD4 84 DDR_A_MA11
2 2 2 2 <6> DDR_A_BS2 BA2 A14 A12/BC# A11
81 82 DDR_A_MA9 85 86 DDR_A_MA7
DDR_A_MA12 83 VDD VDD 84 DDR_A_MA11 87 A9 A7 88
DDR_A_MA9 85 A12/BC# A11 86 DDR_A_MA7 DDR_A_MA8 89 VDD5 VDD6 90 DDR_A_MA6
87 A9 A7 88 DDR_A_MA5 91 A8 A6 92 DDR_A_MA4
DDR_A_MA5 91 A8 A6 92 DDR_A_MA4 DDR_A_MA3 95 VDD7 VDD8 96 DDR_A_MA2
93 A5 A4 94 DDR_A_MA1 97 A3 A2 98 DDR_A_MA0
DDR_A_MA1 97 A3 A2 98 DDR_A_MA0 M_CLK_A_DDR2 101 VDD9 VDD10 102 M_CLK_A_DDR3
+1.35V A1 A0 <6> M_CLK_A_DDR2 CK0 CK1 M_CLK_A_DDR3 <6>
99 100 M_CLK_A_DDR#2 103 104 M_CLK_A_DDR#3
VDD VDD <6> M_CLK_A_DDR#2 CK0# CK1# M_CLK_A_DDR#3 <6>
M_CLK_A_DDR0 101 102 M_CLK_A_DDR1 105 106
<6> M_CLK_A_DDR0 CK0 CK1 M_CLK_A_DDR1 <6> VDD11 VDD12
M_CLK_A_DDR#0 103 104 M_CLK_A_DDR#1 DDR_A_MA10 107 108 DDR_A_BS1
<6> M_CLK_A_DDR#0 CK0# CK1# M_CLK_A_DDR#1 <6> A10/AP BA1
105 106 DDR_A_BS0 109 110 DDR_A_RAS#
VDD VDD BA0 RAS#
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
DDR_A_MA10 107 108 DDR_A_BS1 111 112

A10/AP BA1 DDR_A_BS1 <6> VDD13 VDD14
DDR_A_BS0 109 110 DDR_A_RAS# DDR_A_WE# 113 114 DDR_CS2_DIMMA#
<6> DDR_A_BS0 BA0 RAS# DDR_A_RAS# <6> WE# S0# DDR_CS2_DIMMA# <6>
1 111 112 DDR_A_CAS# 115 116 M_A_ODT2
VDD VDD CAS# ODT0 M_A_ODT2 <6>
1 1 1 1 1 1 1 @ DDR_A_W E# 113 114 DDR_CS0_DIMMA# 117 118
<6> DDR_A_W E# WE# S0# DDR_CS0_DIMMA# <6> VDD15 VDD16
CD9
CD10
CD11
CD12
CD13
CD14
CD15
+ CD16 DDR_A_CAS# 115 116 M_A_ODT0 DDR_A_MA13 119 120 M_A_ODT3 +DIMM_VREF_CA
<6> DDR_A_CAS# CAS# ODT0 M_A_ODT0 <6> A13 ODT1 M_A_ODT3 <6>
330U_B2_2.5VM_R15M 117 118 DDR_CS3_DIMMA# 121 122
119 VDD VDD 120 +DIMM_VREF_CA <6> DDR_CS3_DIMMA# 123 S1# NC2 124
DDR_A_MA13 M_A_ODT1 M_A_ODT1 <6>
2 2 2 2 2 2 2 2 DDR_CS1_DIMMA# 121 A13 ODT1 122 125 VDD17 VDD18 126
<6> DDR_CS1_DIMMA# 123 S1# NC 124 127 NCTEST VREF_CA 128
VDD VDD VSS27 VSS28
2.2U_0402_6.3V6M
0.1U_0402_16V4Z
125 126 1 2 DDR_A_D32 129 130 DDR_A_D36
TEST VREF_CA +1.35V DQ32 DQ36
127 128 RD26 1K_0402_1% DDR_A_D33 131 132 DDR_A_D37
VSS VSS DQ33 DQ37
2.2U_0402_6.3V6M
0.1U_0402_16V4Z
SGA00004400 DDR_A_D32 129 130 DDR_A_D36 133 134 1 1
DQ32 DQ36 VSS29 VSS30
CD17
CD18
DDR_A_D33 131 132 DDR_A_D37 DDR_A_DQS#4 135 136
1
DQ33 DQ37 DQS#4 DM4
1K_0402_1%
133 134 1 3 DDR_A_DQS4 137 138
S
VSS VSS 1 1 +SM_VREF_CA DQS4 VSS31
CD19
CD20
DDR_A_DQS#4 135 136 139 140 DDR_A_D38
DQS4# DM4 VSS32 DQ38 2 2
RD25
DDR_A_DQS4 137 138 QD2 DDR_A_D34 141 142 DDR_A_D39
139 DQS4 VSS 140 DDR_A_D38 DDR_A_D35 143 DQ34 DQ39 144
2N7002KW_SOT323-3
G
2
DDR_A_D34 141 VSS DQ38 142 DDR_A_D39 2 2 145 DQ35 VSS33 146 DDR_A_D44
2
DDR_A_D35 143 DQ34 DQ39 144 RUN_ON_CPU1.5VS3 DDR_A_D40 147 VSS34 DQ44 148 DDR_A_D45
145 DQ35 VSS 146 DDR_A_D44 DDR_A_D41 149 DQ40 DQ45 150
B VSS DQ44 DQ41 VSS35 B
DDR_A_D40 147 148 DDR_A_D45 151 152 DDR_A_DQS#5
DDR_A_D41 149 DQ40 DQ45 150 153 VSS36 DQS#5 154 DDR_A_DQS5
Layout Note: 151 DQ41 VSS 152 DDR_A_DQS#5 155 DM5 DQS5 156
Place near JDIMM1.203,204 153 VSS DQS5# 154 DDR_A_DQS5 DDR_A_D42 157 VSS37 VSS38 158 DDR_A_D46
155 DM5 DQS5 156 DDR_A_D43 159 DQ42 DQ46 160 DDR_A_D47
DDR_A_D42 157 VSS VSS 158 DDR_A_D46 161 DQ43 DQ47 162
DDR_A_D43 159 DQ42 DQ46 160 DDR_A_D47 DDR_A_D48 163 VSS39 VSS40 164 DDR_A_D52
161 DQ43 DQ47 162 DDR_A_D49 165 DQ48 DQ52 166 DDR_A_D53
DDR_A_D48 163 VSS VSS 164 DDR_A_D52 167 DQ49 DQ53 168
DDR_A_D49 165 DQ48 DQ52 166 DDR_A_D53 DDR_A_DQS#6 169 VSS41 VSS42 170
167 DQ49 DQ53 168 DDR_A_DQS6 171 DQS#6 DM6 172
DDR_A_DQS#6 169 VSS VSS 170 173 DQS6 VSS43 174 DDR_A_D54
+0.675VS DDR_A_DQS6 171 DQS6# DM6 172 DDR_A_D50 175 VSS44 DQ54 176 DDR_A_D55
173 DQS6 VSS 174 DDR_A_D54 DDR_A_D51 177 DQ50 DQ55 178
DDR_A_D50 175 VSS DQ54 176 DDR_A_D55 179 DQ51 VSS45 180 DDR_A_D60
DDR_A_D51 177 DQ50 DQ55 178 DDR_A_D56 181 VSS46 DQ60 182 DDR_A_D61
DQ51 VSS DQ56 DQ61
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
179 180 DDR_A_D60 DDR_A_D57 183 184

DDR_A_D56 181 VSS DQ60 182 DDR_A_D61 185 DQ57 VSS47 186 DDR_A_DQS#7
1 1 1 1 DQ56 DQ61 VSS48 DQS#7
DDR_A_D57 183 184 187 188 DDR_A_DQS7
DQ57 VSS DM7 DQS7
CD21
CD22
CD23
CD24
185 186 DDR_A_DQS#7 189 190

187 VSS DQS7# 188 DDR_A_DQS7 DDR_A_D58 191 VSS49 VSS50 192 DDR_A_D62
2 2 2 2 189 DM7 DQS7 190 DDR_A_D59 193 DQ58 DQ62 194 DDR_A_D63
DDR_A_D58 191 VSS VSS 192 DDR_A_D62 +3VS 195 DQ59 DQ63 196
DDR_A_D59 193 DQ58 DQ62 194 DDR_A_D63 197 VSS51 VSS52 198
+3VS 195 DQ59 DQ63 196 199 SA0 EVENT# 200 DDR_XDP_WAN_SMBDAT
197 VSS VSS 198 201 VDDSPD SDA 202 DDR_XDP_WAN_SMBCLK
SA0 EVENT# SA1 SCL
0.1U_0402_16V4Z
2.2U_0402_6.3V6M
199 200 1 203 204
VDDSPD SDA DDR_XDP_W AN_SMBDAT <12,13,16,28,38,5> +0.675VS VTT1 VTT2 +0.675VS
201 202 1
SA1 SCL DDR_XDP_W AN_SMBCLK <12,13,16,28,38,5>
0.1U_0402_16V4Z
2.2U_0402_6.3V6M
CD26
1 203 204 205 206
+0.675VS VTT VTT +0.675VS GND1 GND2
CD25
1 2
CD28
205 206 FOX_AS0A626-U4S6-7H

GND1 GND2 2
CD27
207 208 CONN@

2 BOSS1 BOSS2
2
LCN_DAN06-K4406-0103
A
CONN@
Standard A
Reverse
DDRIII DIMM1&2
Custom 0.3
LA-9371P
5 4 3 2 1
5 4 3 2 1

Populate RD8, De-Populate RD4 for Intel DDR3 <11,9> RUN_ON_CPU1.5VS3
JDIMM4 H=4.0mm BOT
VREFDQ multiple methods M3 JDIMM2 H=9.2mm TOP
2
G
QD3
2N7002KW_SOT323-3 +DIMM_B_DQ
3 1 +1.35V JDIMM4 +1.35V
+DIMM23_VREF_DQ
D
+DIMM_B_DQ 1 2 1 2
+1.35V VREF DQ Vss
+1.35V +1.35V RD27 1K_0402_1% 3 4 DDR_B_D4
Vss DQ4
2.2U_0402_6.3V6M
JDIMM2 DDR_B_D0 5 6 DDR_B_D5
DQ0 DQ5
0.1U_0402_16V4Z
1 2 DDR_B_D1 7 8
1
VREF_DQ VSS1 DQ1 Vss
1K_0402_1%
3 4 DDR_B_D4 1 1 9 10 DDR_B_DQS#0
D VSS2 DQ4 Vss DQS0# D
CD29
2.2U_0402_6.3V6M
DDR_B_D0 5 6 DDR_B_D5 11 12 DDR_B_DQS0
DQ0 DQ5 DM0 DQS0
RD28
CD30
13 14
0.1U_0402_16V4Z
DDR_B_D1 7 8
DQ1 VSS3 DDR_B_D2 15 Vss Vss 16 DDR_B_D6
1 1 9 10 DDR_B_DQS#0
VSS4 DQS#0 2 2 DQ2 DQ6
CD31
11 12 DDR_B_DQS0 DDR_B_D3 17 18 DDR_B_D7
2
DM0 DQS0 DQ3 DQ7
All VREF traces should
CD32
13 14 19 20
VSS5 VSS6 DDR_B_D8 21 Vss Vss 22 DDR_B_D12
DDR_B_D2 15 16 DDR_B_D6
All VREF traces should 2 2 DDR_B_D3 17 DQ2 DQ6 18 DDR_B_D7 have 10 mil trace width DDR_B_D9 23 DQ8 DQ12 24 DDR_B_D13
DQ3 DQ7 DQ9 DQ13
have 10 mil trace width 19
VSS7 VSS8
20 25
Vss Vss
26
DDR_B_D8 21 22 DDR_B_D12 20120710 Change by HP's request DDR_B_DQS#1 27 28
23 DQ8 DQ12 24 DDR_B_DQS1 29 DQS1# DM1 30 DDR3_DRAMRST#_R
DDR_B_D9 DDR_B_D13
DQ9 DQ13 31 DQS1 RESET# 32
25 26
<6> DDR_B_D[0..63] VSS9 VSS10 DDR_B_D10 33 Vss Vss 34 DDR_B_D14
DDR_B_DQS#1 27 28
DQS#1 DM1 DDR_B_D11 35 DQ10 DQ14 36 DDR_B_D15
DDR_B_DQS1 29 30 DDR3_DRAMRST#_R
<6> DDR_B_DQS[0..7] DQS1 RESET# DDR3_DRAMRST#_R <11> DQ11 DQ15
31 32 37 38
33 VSS11 VSS12 34 DDR_B_D16 39 Vss Vss 40 DDR_B_D20
DDR_B_D10 DDR_B_D14
<6> DDR_B_DQS#[0..7] DQ10 DQ14 DDR_B_D17 41 DQ16 DQ20 42 DDR_B_D21
DQ11 DQ15 43 DQ17 DQ21 44
37 38
<6> DDR_B_MA[0..15] VSS13 VSS14 DDR_B_DQS#2 45 Vss Vss 46
DQ16 DQ20 DDR_B_DQS2 47 DQS2# DM2 48
43 DQ17 DQ21 44 49 DQS2 Vss 50 DDR_B_D22
VSS15 VSS16 DDR_B_D18 51 Vss DQ22 52 DDR_B_D23
DDR_B_DQS#2 45 46
DQS#2 DM2 DDR_B_D19 53 DQ18 DQ23 54
DDR_B_DQS2 47 48
DQS2 VSS17 55 DQ19 Vss 56 DDR_B_D28
49 50 DDR_B_D22
VSS18 DQ22 DDR_B_D24 57 Vss DQ28 58 DDR_B_D29
Layout Note: DDR_B_D19 53 DQ18 DQ23 54 DDR_B_D25 59 DQ24 DQ29 60
DQ19 VSS19 DQ25 Vss
Place near JDIMM2 55
VSS20 DQ28
56 DDR_B_D28 61
Vss DQS3#
62 DDR_B_DQS#3
DDR_B_D24 57 58 DDR_B_D29 63 64 DDR_B_DQS3
DQ24 DQ29 65 DM3 DQS3 66
DDR_B_D25 59 60
61 62 DDR_B_DQS#3
63 VSS22 DQS#3 64 DDR_B_D27 69 DQ26 DQ30 70 DDR_B_D31
DDR_B_DQS3
DM3 DQS3 71 DQ27 DQ31 72
65 66
VSS23 VSS24 Vss Vss
DDR_B_D27 69 DQ26 DQ30 70 DDR_B_D31
+1.35V 71 DQ27 DQ31 72
VSS25 VSS26 DDR_CKE2_DIMMB 73 74 DDR_CKE3_DIMMB
<6> DDR_CKE2_DIMMB CKE0 CKE1 DDR_CKE3_DIMMB <6>
75 76
77 VDD VDD 78 DDR_B_MA15
C NC A15 C
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
DDR_CKE0_DIMMB 73 74 DDR_CKE1_DIMMB DDR_B_BS2 79 80 DDR_B_MA14

<6> DDR_CKE0_DIMMB CKE0 CKE1 DDR_CKE1_DIMMB <6> BA2 A14
1 1 1 1 75 76 81 82
77 VDD1 VDD2 78 DDR_B_MA12 83 VDD VDD 84 DDR_B_MA11
DDR_B_MA15
NC1 A15 A12/BC# A11
CD33
CD34
CD35
CD36
DDR_B_BS2 79 80 DDR_B_MA14 DDR_B_MA9 85 86 DDR_B_MA7

<6> DDR_B_BS2 BA2 A14 87 A9 A7 88
81 82
2 2 2 2 VDD3 VDD4 DDR_B_MA8 89 VDD VDD 90 DDR_B_MA6
DDR_B_MA12 83 84 DDR_B_MA11
A12/BC# A11 DDR_B_MA5 91 A8 A6 92 DDR_B_MA4
87 A9 A7 88 93 A5 A4 94
VDD5 VDD6 DDR_B_MA3 95 VDD VDD 96 DDR_B_MA2
A8 A6 DDR_B_MA1 97 A3 A2 98 DDR_B_MA0
A5 A4 99 A1 A0 100
93 94
VDD7 VDD8 M_CLK_B_DDR2 101 VDD VDD 102 M_CLK_B_DDR3
DDR_B_MA3 95 96 DDR_B_MA2 M_CLK_B_DDR3 <6>
A3 A2 <6> M_CLK_B_DDR2 103 CK0 CK1 104
DDR_B_MA1 97 98 DDR_B_MA0 M_CLK_B_DDR#2 M_CLK_B_DDR#3 M_CLK_B_DDR#3 <6>
+1.35V A1 A0 <6> M_CLK_B_DDR#2 CK0# CK1#
99 100 105 106
VDD9 VDD10 DDR_B_MA10 107 VDD VDD 108 DDR_B_BS1
M_CLK_B_DDR0 101 102 M_CLK_B_DDR1
<6> M_CLK_B_DDR0 CK0 CK1 M_CLK_B_DDR1 <6> 109 A10/AP BA1 110
M_CLK_B_DDR#0 103 104 M_CLK_B_DDR#1 DDR_B_BS0 DDR_B_RAS#
<6> M_CLK_B_DDR#0 CK0# CK1# M_CLK_B_DDR#1 <6> BA0 RAS#
105 106 111 112
VDD11 VDD12 VDD VDD
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
DDR_B_MA10 107 108 DDR_B_BS1 DDR_B_WE# 113 114 DDR_CS2_DIMMB#

A10/AP BA1 DDR_B_BS1 <6> WE# S0# DDR_CS2_DIMMB# <6>
DDR_B_BS0 109 110 DDR_B_RAS# DDR_B_CAS# 115 116 M_B_ODT2
<6> DDR_B_BS0 BA0 RAS# DDR_B_RAS# <6> CAS# ODT0 M_B_ODT2 <6>
111 112 117 118
1 VDD13 VDD14 VDD VDD +DIMM_VREF_CA
@ DDR_B_W E# 113 114 DDR_CS0_DIMMB# DDR_B_MA13 119 120 M_B_ODT3
1 1 1 1 1 1 1 <6> DDR_B_W E# WE# S0# DDR_CS0_DIMMB# <6> A13 ODT1 M_B_ODT3 <6>
CD37
CD38
CD39
CD40
CD41
CD42
CD43
+ CD44 DDR_B_CAS# 115 116 M_B_ODT0 DDR_CS3_DIMMB# 121 122

<6> DDR_B_CAS# CAS# ODT0 M_B_ODT0 <6> <6> DDR_CS3_DIMMB# 123 S1# NC 124
330U_B2_2.5VM_R15M 117 118
VDD15 VDD16 +DIMM_VREF_CA 125 VDD VDD 126
DDR_B_MA13 119 120 M_B_ODT1
2 2 2 2 2 2 2 2 A13 ODT1 M_B_ODT1 <6> 127 TEST VREF CA 128
DDR_CS1_DIMMB# 121 122
<6> DDR_CS1_DIMMB# S1# NC2 Vss Vss
2.2U_0402_6.3V6M
0.1U_0402_16V4Z
123 124 DDR_B_D32 129 130 DDR_B_D36
VDD17 VDD18 DDR_B_D33 131 DQ32 DQ36 132 DDR_B_D37
125 126
127 NCTEST VREF_CA 128 133 DQ33 DQ37 134
VSS27 VSS28 Vss Vss 1 1
CD45
CD46
2.2U_0402_6.3V6M
0.1U_0402_16V4Z
DDR_B_D32 129 130 DDR_B_D36 DDR_B_DQS#4 135 136
DDR_B_D33 131 132 DDR_B_D37
DQ33 DQ37 139 DQS4 Vss 140 DDR_B_D38
133 134 1 1
VSS29 VSS30 Vss DQ38 2 2
CD47
CD48
DDR_B_DQS#4 135 136 DDR_B_D34 141 142 DDR_B_D39
137 DQS#4 DM4 138 DDR_B_D35 143 DQ34 DQ39 144
DDR_B_DQS4
DQS4 VSS31 145 DQ35 Vss 146 DDR_B_D44
139 140 DDR_B_D38
VSS32 DQ38 2 2 DDR_B_D40 147 Vss DQ44 148 DDR_B_D45
DDR_B_D34 141 142 DDR_B_D39
DQ34 DQ39 DDR_B_D41 149 DQ40 DQ45 150
DDR_B_D35 143 144
Layout Note: 145 DQ35 VSS33 146 DDR_B_D44 151 DQ41 Vss 152 DDR_B_DQS#5
B VSS34 DQ44 Vss DQS5# B
Place near JDIMM2.203,204 DDR_B_D40 147
DQ40 DQ45
148 DDR_B_D45 153
DM5 DQS5
154 DDR_B_DQS5
DDR_B_D41 149 150 155 156
151 152 DDR_B_DQS#5
VSS36 DQS#5 DDR_B_D43 159 DQ42 DQ46 160 DDR_B_D47
153 154 DDR_B_DQS5
DM5 DQS5 161 DQ43 DQ47 162
155 156
157 VSS37 VSS38 158 DDR_B_D48 163 Vss Vss 164 DDR_B_D52
DDR_B_D42 DDR_B_D46
DQ42 DQ46 DDR_B_D49 165 DQ48 DQ52 166 DDR_B_D53
DDR_B_D43 159 160 DDR_B_D47
DQ43 DQ47 167 DQ49 DQ53 168
161 162
VSS39 VSS40 DDR_B_DQS#6 169 Vss Vss 170
+0.675VS DDR_B_D48 163 164 DDR_B_D52
DDR_B_D49 165 166 DDR_B_D53
167 DQ49 DQ53 168 173 DQS6 Vss 174 DDR_B_D54
VSS41 VSS42 DDR_B_D50 175 Vss DQ54 176 DDR_B_D55
DDR_B_DQS#6 169 170
DQS#6 DM6 DDR_B_D51 177 DQ50 DQ55 178
DDR_B_DQS6 171 172
DQS6 VSS43 DQ51 Vss
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
173 174 DDR_B_D54 179 180 DDR_B_D60

VSS44 DQ54 DDR_B_D56 181 Vss DQ60 182 DDR_B_D61
1 1 1 1 DDR_B_D50 175 176 DDR_B_D55
177 DQ50 DQ55 178 DDR_B_D57 183 DQ56 DQ61 184
DDR_B_D51
DQ51 VSS45 DQ57 Vss
CD49
CD50
CD51
CD52
179 180 DDR_B_D60 185 186 DDR_B_DQS#7

VSS46 DQ60 187 Vss DQS7# 188 DDR_B_DQS7
DDR_B_D56 181 182 DDR_B_D61
2 2 2 2 DQ56 DQ61 189 DM7 DQS7 190
DDR_B_D57 183 184
185 186 DDR_B_DQS#7
187 VSS48 DQS#7 188 DDR_B_D59 193 DQ58 DQ62 194 DDR_B_D63
DDR_B_DQS7
DM7 DQS7 +3VS 195 DQ59 DQ63 196
189 190
VSS49 VSS50 197 Vss Vss 198
DDR_B_D58 191 192 DDR_B_D62
DQ58 DQ62 199 SA0 EVENT# 200 DDR_XDP_WAN_SMBDAT
DDR_B_D59 193 194 DDR_B_D63
+3VS DQ59 DQ63 201 VDD SPD SDA 202 DDR_XDP_WAN_SMBCLK
195 196
VSS51 VSS52 SA1 SCL
0.1U_0402_16V4Z
2.2U_0402_6.3V6M
197 198 203 204
SA0 EVENT# +0.675VS Vtt Vtt +0.675VS
199 200 1 1
VDDSPD SDA DDR_XDP_W AN_SMBDAT <11,13,16,28,38,5>
CD54
201 202 205 206
SA1 SCL DDR_XDP_W AN_SMBCLK <11,13,16,28,38,5> GND GND
CD53
0.1U_0402_16V4Z
2.2U_0402_6.3V6M
203 204
+0.675VS VTT1 VTT2 +0.675VS
1 1 2 2
CD56
205 206 FOX_AS0A626-U4RN-7F

G1 G2
CD55
CONN@
LCN_DAN06-K4806-0103
2 2 CONN@
A
Reverse A
Reverse

DDRIII DIMM3&4
Custom 0.3
LA-9371P
5 4 3 2 1
5 4 3 2 1
+RTCVCC <17,25>
<17>
WWANSSD_M12DET
USB_OC1#_R
WWANSSD_M12DET
USB_OC1#_R
PXDP@
PXDP@
RH4
RH5
1
1
2
2
33_0402_5%
33_0402_5%
XDP_FN0
XDP_FN1 PCH XDP
USB_OC2# PXDP@ RH7 1 2 33_0402_5% XDP_FN2 +3V_PCH
<17> USB_OC2# JXDP2
330K_0402_5%
USB_OC3# PXDP@ RH8 1 2 33_0402_5% XDP_FN3
1 2
1
<17> USB_OC3# 1 2
USB_OC4#_R PXDP@ RH3 33_0402_5% XDP_FN4 +3V_PCH GND0 GND1
<17> USB_OC4#_R 3 4 XDP_FN16
RH6
dGPU_HPD_INTR PXDP@ RH9 1 2 33_0402_5% XDP_FN5 OBSFN_A0 OBSFN_C0
<17,35> dGPU_HPD_INTR 5 6 XDP_FN17
LED_LINK_LAN#_R PXDP@ RH10 1 2 33_0402_5% XDP_FN6 OBSFN_A1 OBSFN_C1
0.1U_0402_16V4Z
<17,29> LED_LINK_LAN#_R 7 8
USB_OC7# PXDP@ RH11 1 2 33_0402_5% XDP_FN7 GND2 GND3
<17> USB_OC7# 1 XDP_FN0 9 10 XDP_FN8
2 SG_IN PXDP@ RH12 1 2 33_0402_5% XDP_FN8 OBSDATA_A0 OBSDATA_C0
XDP_FN1 11 12 XDP_FN9
FN9 PXDP@ RH13 1 2 33_0402_5% XDP_FN9 OBSDATA_A1 OBSDATA_C1
CH12
13 14
PXDP@
mSATA_DET# PXDP@ RH14 1 2 33_0402_5% XDP_FN10 GND4 GND5
PCH_INTVRMEN <23,32> mSATA_DET# XDP_FN2 15 16 XDP_FN10
PCH_GPIO37 PXDP@ RH15 1 2 33_0402_5% XDP_FN11 2 OBSDATA_A2 OBSDATA_C2
<18> PCH_GPIO37 XDP_FN3 17 18 XDP_FN11
KBL_DET# PXDP@ RH17 1 2 33_0402_5% XDP_FN12 OBSDATA_A3 OBSDATA_C3
<18,38> KBL_DET# 19 20
DGPU_PRSNT# PXDP@ RH18 1 2 33_0402_5% XDP_FN13 GND6 GND7
<18,35> DGPU_PRSNT# 21 22
FN14 PXDP@ RH19 1 2 33_0402_5% XDP_FN14 OBSFN_B0 OBSFN_D0
<15> FN14 23 24
INTVRMEN - INTEGRATED SUS 1.05V VRM FN15 PXDP@ RH20 1 2 33_0402_5% XDP_FN15 OBSFN_B1 OBSFN_D1
<15> FN15 25 26
PCH_GPIO8 PXDP@ RH21 1 2 33_0402_5% XDP_FN16 GND8 GND9
ENABLE <18> PCH_GPIO8 XDP_FN4 27 28 XDP_FN12
PCH_GPIO36 PXDP@ RH22 1 2 33_0402_5% XDP_FN17 OBSDATA_B0 OBSDATA_D0
<18> PCH_GPIO36 XDP_FN5 29 30 XDP_FN13
High - Enable Internal VRs <14,30> PM_RSMRST#
PM_RSMRST# PXDP@ RH23 1 2 1K_0402_1% RSMRST#_XDP
31 OBSDATA_B1 OBSDATA_D1 32
PLT_RST# PXDP@ RH25 1 2 1K_0402_1% RESET_OUT#_R GND10 GND11
Low - Enable External VRs XDP_FN6 33 34 XDP_FN14
XDP_FN7 35 OBSDATA_B2 OBSDATA_D2 36 XDP_FN15
37 OBSDATA_B3 OBSDATA_D3 38
D #4/18 change by HP requirement RSMRST#_XDP 39 GND12 GND13 40
D
PWRGOOD/HOOK0 ITPCLK/HOOK4 +1.05VS
1 PXDP@ 2 ON/OFFBTN#_XDP 41 42
<14,30,5> ON/OFFBTN# 43 HOOK1 ITPCLK#/HOOK5 44
RH24 0_0402_5% +3V_PCH
+3VS 45 VCC_OBS_AB VCC_OBS_CD 46 RESET_OUT#_R
47 HOOK2 RESET#/HOOK6 48 XDP_DBRESET#
49 HOOK3 DBR#/HOOK7 50 XDP_DBRESET# <14,5>
RH26 0_0402_5%
1 2 HDA_SPKR 1 PXDP@ 2 DDR_XDP_WAN_SMBDAT_R2 51 GND14 GND15 52 PCH_JTAG_TDO
@ RH29 10K_0402_5% <11,12,16,28,38,5> DDR_XDP_WAN_SMBDAT SDA TD0
1 PXDP@ 2 DDR_XDP_WAN_SMBCLK_R2 53 54
<11,12,16,28,38,5> DDR_XDP_WAN_SMBCLK 55 SCL TRST# 56 PCH_JTAG_TDI
RH27 0_0402_5%
PCH_JTAG_TCK 57 TCK1 TDI 58 PCH_JTAG_TMS
TCK0 TMS
NO REBOOT STRAP 59
GND16 GND17
60
DISABLED WHEN LOW (DEFAULT) PCH_RTCX1 SAMTE_BSH-030-01-L-D-A CONN@

ENABLED WHEN HIGH <30,39> BAT_GRNLED# PLT_RST# <14,25,28,29,30,35,37,39,5> 1 2 PCH_RTCX2
RH28 10M_0402_5%
5
+3V_PCH YH1
QH11B 20121028 Move RH37,RH38 close to PCH side
G
QH11A 1 2
1 2 1 6 4 3 HDA_SDOUT 32.768KHZ_12.5PF_Q13FC1350000500
S
D
RH30 2.2K_0402_5%
1 2 HDD_HALTLED
18P_0402_50V8J
@
RH33 100K_0402_5% MESS84DW-G_SC88-6 MESS84DW-G_SC88-6
20120709 Change by HP request 1 1
CH13 CH14
20120919 Change QH11 to PMOS 18P_0402_50V8J
FLASH DESCRIPTOR SECURITY OVERRIDE 20121026 HP's request
20120802 HP's request 2 2
LOW = DESABLED (DEFAULT)
LPT_PCH_M_EDS
HIGH = ENABLED UH1A REV = 5
BC8 SATA_PRX_DTX_N0
SATA_RXN_0 SATA_PRX_DTX_N0 <23>
PCH_RTCX1 B5 BE8 SATA_PRX_DTX_P0
RTCX1 SATA_RXP_0 SATA_PRX_DTX_P0 <23>
HDD_Primary
PCH_RTCX2 B4 AW8 SATA_PTX_DRX_N0
RTCX2 SATA_TXN_0 SATA_PTX_DRX_N0 <23>
AY8 SATA_PTX_DRX_P0
RTC
SATA_TXP_0 SATA_PTX_DRX_P0 <23>
+RTCVCC RH34 1 2 20K_0402_5% SRTCRST# B9
SRTCRST# BC10 SATA_PRX_DTX_N1
SATA_RXN_1 SATA_PRX_DTX_N1 <23>
RH35 1 2 1M_0402_5% INTRUDER# A8 BE10 SATA_PRX_DTX_P1
INTRUDER# SATA_RXP_1 SATA_PRX_DTX_P1 <23>
ODD
1 2 PCH_INTVRMEN G10 AV10 SATA_PTX_DRX_N1
<25> WWAN_DET# INTVRMEN SATA_TXN_1 SATA_PTX_DRX_N1 <23>
RH230 0_0402_5% AW10 SATA_PTX_DRX_P1
SATA_TXP_1 SATA_PTX_DRX_P1 <23>
RH36 1 2 20K_0402_5% PCH_RTCRST# D9
RTCRST#
SATA
CMOS_CLR1 CMOS setting SATA_RXN_2
BB9 SATA_PRX_DTX_N2
SATA_PRX_DTX_N2 <33>
BD9 SATA_PRX_DTX_P2
SATA_RXP_2 SATA_PRX_DTX_P2 <33>
Shunt Clear CMOS <14> PCH_RTCRST# HDA_BIT_CLK B25
HDA_BCLK DOCK_SATA2
AY13 SATA_PTX_DRX_N2
SATA_TXN_2 SATA_PTX_DRX_N2 <33>
Open Keep CMOS 1
1 2
2 1
1 2
2 HDA_SYNC A22
HDA_SYNC SATA_TXP_2
AW13 SATA_PTX_DRX_P2
SATA_PTX_DRX_P2 <33>
C HDA_SPKR AL10 BC12 SATA_PRX_DTX_N3 C
<26> HDA_SPKR SPKR SATA_RXN_3 SATA_PRX_DTX_N3 <33>
ME_CLR1 TPM setting SATA_RXP_3
BE12 SATA_PRX_DTX_P3
SATA_PRX_DTX_P3 <33>
@ @ HDA_RST# C24
HDA_RST# DOCK_SATA3
Shunt Clear ME RTC Registers ME1 SHORT PADS CMOS1 SHORT PADS
SATA_TXN_3
AR13 SATA_PTX_DRX_N3
SATA_PTX_DRX_N3 <33>
1 2 1 2 L22 AT13
AZALIA
HDA_SDI0 SATA_PTX_DRX_P3
<26> HDA_SDI0 HDA_SDI0 SATA_TXP_3 SATA_PTX_DRX_P3 <33>
Open Keep ME RTC Registers CH15 1U_0402_6.3V6K CH16 1U_0402_6.3V6K
CMOS place near DIMM K22
HDA_SDI1 BD13 SATA_PRX_DTX_N4
G22 SATA_RXN4/PERN1 BB13 SATA_PRX_DTX_N4 <23>
SATA_PRX_DTX_P4 HDD_Secondary
HDA_SDI2 SATA_RXP4/PERP1 SATA_PRX_DTX_P4 <23>
F22 AV15 SATA_PTX_DRX_N4
HDA_SDI3 SATA_TXN4/PETN1 AW15 SATA_PTX_DRX_N4 <23>
SATA_PTX_DRX_P4
A24 SATA_TXP4/PETP1 SATA_PTX_DRX_P4 <23>
HDA_SDOUT
HDA_SDO BC14 SATA_PRX_DTX_N5
HDD_HALTLED B17 SATA_RXN5/PERN2 BE14 SATA_PRX_DTX_P5 SATA_PRX_DTX_N5 <23>
20120703 <39> HDD_HALTLED DOCKEN#/GPIO33 SATA_RXP5/PERP2 SATA_PRX_DTX_P5 <23>
+3V_PCH ISO_PREP# C22 AP15 SATA_PTX_DRX_N5
mSATA +3VS
HDA_SYNC Isolation Circuit +5VS
<33,36> ISO_PREP# HDA_DOCK_RST#/GPIO13 SATA_TXN5/PETN2
SATA_TXP5/PETP2
AR15 SATA_PTX_DRX_P5
SATA_PTX_DRX_N5
SATA_PTX_DRX_P5
<23>
<23>
1
AY5 SATA_COMP R463 1 2 10K_0402_5% 10K_0402_5%
SATA_RCOMP +3VS
2
R7
G
#4/18 change by
QH2 HP requirement AP3 SATA_ACT#
SATA_ACT# <33,39>
2
HDA_SYNC_R 3 1 HDA_SYNC SATALED#
SG_IN <22>
RH39 2 1 51_0402_1% PCH_JTAG_TCK AB3 AT1 SG_IN
S
@ JTAG_TCK SATA0GP/GPIO21
SB000002X00
1
BSS138W-7-F_SOT323-3 RH40 1 2 PCH_JTAG_TMS AD1 AU2 FN9
@ JTAG_TMS SATA1GP/GPIO19
200_0402_5% PAD~D T72 @
10K_0402_5%
2
RH41 1 2 PCH_JTAG_TDI AE2 BD4 SATA_IREF 1 2 UMA@
JTAG
@ JTAG_TDI SATA_IREF +1.5VS R8
RH43 200_0402_5% RH42 0_0402_5%
1M_0402_5% RH44 1 @ 2 PCH_JTAG_TDO AD3 BA2
2
200_0402_5% JTAG_TDO TP9
1 2 PCH_TP25 F8 BB2
RH237
1
TP25 TP8
100_0402_1%
100_0402_1%
100_0402_1%
RH45 0_0402_5%
1
C26 1 2
TP22 +3VS
RH46
RH47
RH48
AB6 10K_0402_5%
TP20
1
D Q70
2
@ @ @ 1 OF 11 PLT_RST# 2 2N7002KW _SOT323-3

2012/09/21 HP's request LYNXPOINT_BGA695 G
SATA Impedance Compensation S
3
RTC Circuit +1.5VS
SATA_COMP 1 2
+RTCVCC +3VDS +BATT1.1 7.5K_0402_1% RH49
1 2 HDA_SYNC_R
<26> HDA_SYNC_AUDIO
RH51 33_0402_5%
RP13 CAD note:
D40
B 2 4 5 Place the resistor within 500 mils of the PCH. Avoid B
1 3 6 HDA_RST#
RH233 JBATT1 <26> HDA_RST_AUDIO# 2 7 HDA_SDOUT routing next to clock pins.
W=20mils 3 +BATT_D 1 2 1 <26> HDA_SDOUT_AUDIO
W=20mils 2 1 1 8 HDA_BIT_CLK
W=20mils W=20mils 2
<26> HDA_BITCLK_AUDIO
1 CH102 DAN202U_SC70 1K_0402_5% 3
27P_0402_50V8J
4 G1 33_8P4R_5%
@ CH17
1U_0603_10V4Z G2 1
20121015
2 Place ACES_50273-0020N-001
near PCH CONN@
2
A A

Issued Date 2012/06/11 2013/06/11 Title
Deciphered Date
PCH-RTC,HDA,SATA,XDP
Custom 0.3
LA-9371P
5 4 3 2 1
5 4 3 2 1
+3V_PCH
1 2 SUS_PWR_ACK +3VDS
RH63 10K_0402_5%
1 2 PCH_PCIE_WAKE# JME1 +RTCVCC
<13,5> XDP_DBRESET# 1 2 SYS_RESET# 1
RH64 10K_0402_5%
RH54 0_0402_5% 1
330K_0402_5%
1 2 PCH_RI# SLP_S3# 2 +3VS
2
2
RH72 10K_0402_5% 3
3
RH55
1 2 BT_OFF SLP_S5# 4
SLP_S4# 5 4
RH75 10K_0402_5% 5 DSWODVREN - ON DIE DSW VR ENABLE RP16
1 2 PCH_GPIO72 SIO_SLP_A# 6 PCI_PIRQC# 8 1
7 6 16 7 2
RH248 10K_0402_5% PCI_PIRQA#
HIGH = ENABLED (DEFAULT)
1
8 7 G2 15 6 3
PCI_PIRQB#
8 G1
+3VS 20121020 Add PU for bring up issue
<13> PCH_RTCRST# PCH_RTCRST# 9
9 LOW = DISABLED PCI_PIRQD# 5 4
10
ON/OFFBTN# 11 10 DSWODVREN 20121015
1 2 PM_CLKRUN# 8.2K_8P4R_5%
D 12 11 PWRSV_SEL# 2 1 D
RH78 8.2K_0402_5% 12
1 2 SLP_LAN# SYS_RESET# 13 10K_0402_5% RH62
14 13 DGPU_HOLD_RST# 2 1
RH70 200K_0402_5% 14
20121025 HP's request 10K_0402_5% RH66
FCI_10051922-1410ELF DGPU_PWR_EN 2 1
CONN@ A16 SWAP OVERRIDE STRAP 10K_0402_5% RH69
PCH_DPWROK 1 2 PM_RSMRST# ODD_DA# 2 1
RH67 0_0402_5% 10K_0402_5% RH71
+3VDS STP_A16OVR LOW = A16 SWAP OVERRIDE NMI_SMI_DBG# 2 1
20120920 Add ME debug circuit for HP's request HIGH = DEFAULT 100K_0402_5% RH74
PCH_CRT_DDC_CLK 2 1
2.2K_0402_5% RH76
5
PCH_CRT_DDC_DAT 2 1
2.2K_0402_5% RH77
VCC
RH246 1 2 200K_0402_5% 1 RP14
+3VDS @ IN1 DGPU_SELECT# 2 1
4 8 1
OUT 10K_0402_5% RH80
1 2 2 7 2 PCH_CRT_BLU
2 1
GND
IN2 Camera_ON
CH113 @ 0.1U_0402_16V4Z 6 3 PCH_CRT_GRN
10K_0402_5% RH82
5 4 PCH_CRT_RED
ACCEL_INT_R# 2 1
UH6 @ 20121015 8.2K_0402_5% RH83
3
20120810 HP's request <43> 3VDS_PG MC74VHC1G08DFT2G_SC70-5 150_0804_8P4R_1%

TBT_RR_GPIO# 2 1
20121012 Delete RH246. Add UH6, CH113 1 2 ENVDD_PCH 10K_0402_5% RH245
20121016 HP's request RH101 100K_0402_5%
20121020 Install RH246,CH113,UH6 as HP's request 20120723 HP's request
20121023 Uninstall RH246,CH113,UH6 as HP's request
20121104 Change connection of RH246 to 3VDS_PG as HP's request
LPT_PCH_M_EDS
UH1B REV = 5
LPT_PCH_M_EV
UH1E REV = 5
<4> DMI_CTX_PRX_N0 DMI_CTX_PRX_N0 AW22
DMI_CTX_PRX_N1 AR20 DMI_RXN_0
<4> DMI_CTX_PRX_N1 DMI_RXN_1 PCH_CRT_BLU T45 R40
AJ35 FDI_CTX_PRX_N0 FDI_CTX_PRX_N0 <7> <36> PCH_CRT_BLU VGA_BLUE DDPB_CTRLCLK
DMI_CTX_PRX_N2 AP17 FDI_RXN_0
<4> DMI_CTX_PRX_N2 DMI_RXN_2 PCH_CRT_GRN U44 R39
<4> DMI_CTX_PRX_N3 DMI_CTX_PRX_N3 AV20 AL35 FDI_CTX_PRX_N1 FDI_CTX_PRX_N1 <7> <36> PCH_CRT_GRN VGA_GREEN DDPB_CTRLDATA
DMI_RXN_3 FDI_RXN_1
PCH_CRT_RED V45 R35
<4> DMI_CTX_PRX_P0 DMI_CTX_PRX_P0 AY22 AJ36 FDI_CTX_PRX_P0 FDI_CTX_PRX_P0 <7> <36> PCH_CRT_RED VGA_RED DDPC_CTRLCLK
C DMI_CTX_PRX_P1 AP20 DMI_RXP_0 FDI_RXP_0 C
<4> DMI_CTX_PRX_P1 DMI_RXP_1 FDI PCH_CRT_DDC_CLK M43 R36
AL36 FDI_CTX_PRX_P1 FDI_CTX_PRX_P1 <7> <36> PCH_CRT_DDC_CLK VGA_DDC_CLK DDPC_CTRLDATA
DMI_CTX_PRX_P2 AR17 FDI_RXP_1
<4> DMI_CTX_PRX_P2 DMI_RXP_2 PCH_CRT_DDC_DAT M45 N40
CRT
<4> DMI_CTX_PRX_P3 DMI_CTX_PRX_P3 AW20 DMI AV43 <36> PCH_CRT_DDC_DAT VGA_DDC_DATA DDPD_CTRLCLK
DMI_RXP_3 TP16
1 2 HSYNC N42 N38
DMI_CRX_PTX_N0 BD21 AY45 <36> PCH_CRT_HSYNC VGA_HSYNC DDPD_CTRLDATA
<4> DMI_CRX_PTX_N0 DMI_TXN_0 TP5 RH84 20_0402_1%
DMI_CRX_PTX_N1 BE20
<4> DMI_CRX_PTX_N1 DMI_TXN_1 1 2 VSYNC N44
AV45 <36> PCH_CRT_VSYNC VGA_VSYNC
TP15 RH85 20_0402_1% H45
DMI_CRX_PTX_N2 BD17 DDPB_AUXN
<4> DMI_CRX_PTX_N2 DMI_TXN_2 1 2 CRT_IREF U40
DMI_CRX_PTX_N3 BE18 AW44 DAC_IREF
<4> DMI_CRX_PTX_N3 DMI_TXN_3 TP10 RH87 649_0402_1% K43
U39 DDPC_AUXN
DMI_CRX_PTX_P0 BB21 AL39 FDI_CSYNC
DISPLAY
<4> DMI_CRX_PTX_P0 FDI_CSYNC <4> VGA_IRTN J42
DMI_CRX_PTX_P1 BC20 DMI_TXP_0 FDI_CSYNC
<4> DMI_CRX_PTX_P1 DDPD_AUXN
DMI_TXP_1 AL40 FDI_INT
FDI_INT FDI_INT <4> BKL_PWM_PCH N36 H43
DMI_CRX_PTX_P2 BB17 <35> BKL_PWM_PCH EDP_BKLTCTL DDPB_AUXP
<4> DMI_CRX_PTX_P2
LVDS
DMI_CRX_PTX_P3 BC18 DMI_TXP_2 AT45 FDI_IREF 1 2
<4> DMI_CRX_PTX_P3 DMI_TXP_3 FDI_IREF +1.5VS K36 K45
RH86 0_0402_5% <35> PANEL_BKEN_PCH EDP_BKLTEN DDPC_AUXP
+1.5VS
1 2 DMI_IREF BE16 AU42
DMI_IREF TP17 ENVDD_PCH G36 J44
RH88 0_0402_5% <35> ENVDD_PCH EDP_VDDEN DDPD_AUXP
AW17 AU44
TP12 TP13 K40
RH90 PCI_PIRQA# H20 DDPB_HPD
+1.5VS
1 2 AV17 AR44 FDI_RCOMP 2 1 +1.5VS PIRQA#
TP7 FDI_RCOMP K38
7.5K_0402_1% 7.5K_0402_1% RH89 DDPC_HPD
RH247 PCI_PIRQB# L20
DMI_RCOMP AY17 PIRQB#
PM_RSMRST# 1 @ 2 DMI_RCOMP H39
PCI_PIRQC# K17 DDPD_HPD
2
B
20121016 HP's request 10K_0402_5% PIRQC#

20121020 HP's request 20120911 HP's request 20120705 Correct net name to follow GPIO table
20121023 HP's request PCI_PIRQD# M20
3 1 SUSACK# R6 C8 DSWODVREN PIRQD# PCI
<30> PLT_DET SUSACK# DSWVRMEN G17 PWRSV_SEL#
E
PIRQE#/GPIO2 PWRSV_SEL# <37>

Q176 @ System Power DGPU_HOLD_RST# A12
SYS_RESET# AM1 L13 PCH_DPWROK <35> DGPU_HOLD_RST# GPIO50
MMBT3904_SOT23-3 SYS_RESET# Management DPWROK F17 ODD_DA# ODD_DA# <23>
DGPU_SELECT# B13 PIRQF#/GPIO3
<30,5> PM_PWROK RH92 1 2 0_0402_5% SYS_PWROK_R AD7 K3 PCH_PCIE_WAKE# PCH_PCIE_WAKE# <25> <35,36> DGPU_SELECT# GPIO52
SYS_PWROK WAKE# L15 NMI_SMI_DBG# NMI_SMI_DBG# <30>
DGPU_PWR_EN C12 PIRQG#/GPIO4
RH93 1 2 0_0402_5% PCH_PWROK F10 AN7 PM_CLKRUN# PM_CLKRUN# <28,30,32> <15,35> DGPU_PWR_EN GPIO54
<31> PCH_PWROK_R PWROK CLKRUN# M15 ACCEL_INT_R# 2 1
B 1 2 PIRQH#/GPIO5 ACCEL_INT# <28> B
+3VS PCH_GPIO51 C10 0_0402_5% RH96
<30,31> PM_APWROK RH221 1 2 0_0402_5% PM_APWROK_R AB7 U7 BT_OFF GPIO51
APWROK SUS_STAT#/GPIO61 BT_OFF <25> RH147 100K_0402_5% AD10 @ T87 PAD~D
20120911 HP request Camera_ON 20120920 A10 PME#
RH94 1 2 PM_DRAM_PWRGD_R H3 Y6 SUSCLK_KBC SUSCLK_KBC <30> <22> Camera_ON GPIO53
<5> PM_DRAM_PWRGD DRAMPWROK SUSCLK/GPIO62 Y11 PLTRST#
0_0402_5% PLTRST#
TBT_RR_GPIO# AL6
<13,30> PM_RSMRST# 1 2 PCH_RSMRST#_R J2 Y7 SLP_S5# T85 PAD~D@ <39> TBT_RR_GPIO# GPIO55
RH95 0_0402_5% RSMRST# SLP_S5#/GPIO63 5 OF 11
T86 PAD~D @
1 2 ME_SUS_PWR_ACK_R J4 C6 SLP_S4#
<30> SUS_PWR_ACK SUSWARN#/SUSPWRNACK/GPIO30 SLP_S4# SLP_S4# <44> 20120723 LYNXPOINT_BGA695
RH97 0_0402_5%
ON/OFFBTN# K1 H1 SLP_S3# 20121023 HP's request
<13,30,5> ON/OFFBTN# PWRBTN# SLP_S3# SLP_S3# <30,31,34,39,44>
+3V_PCH
<30,35> AC_PRES_OUT AC_PRES_OUT E6 F3 SIO_SLP_A#
ACPRESENT/GPIO31 SLP_A# SIO_SLP_A# <30,31,45> CH20
T88 PAD~D @ 1 2
PCH_GPIO72 K7 F1 SIO_SLP_SUS# 20120810 HP's request
BATLOW#/GPIO72 SLP_SUS# SIO_SLP_SUS# <30>
T89 PAD~D @ 0.1U_0402_16V4Z
20120911 Change BT_OFF to GPIO61 PCH_RI# N4 AY3 H_PM_SYNC
RI# PMSYNCH H_PM_SYNC <5>
AB10 G5 SLP_LAN#_R 1 2 SLP_LAN#
5
@ T90 PAD~D TP21 SLP_LAN# SLP_LAN# <29,30> UH3
RH249 10K_0402_5%
VCC
DDR3_SET D2
<44> DDR3_SET SLP_WLAN#/GPIO29 PLTRST# 1
20121025 HP's request IN1 4PLT_RST#
2 OF 11 OUT PLT_RST# <13,25,28,29,30,35,37,39,5>
2
GND
LYNXPOINT_BGA695 IN2
1
@ CH107
MC74VHC1G08DFT2G_SC70-5
3
22P_0402_50V8J
2
Boot BIOS Strap 20120713 Add for ESD's request
PCH_GPIO51 SATA1GP/
GPIO19 Boot BIOS Location 20120718 Add QH12 to invertion PCH_GPIO56 signal
20120723 Delete QH12 as HP's request
A A
0 0 LPC
20120913 Delete UH7, RH235. Move RH236, CH106 to page 31 0 1 Reserved (NAND)
1 0 PCI
1 1 SPI
PCH -DMI,FDI,PM,DP,CRT
Custom 0.3
LA-9371P
5 4 3 2 1
5 4 3 2 1
+3V_PCH
2
10K_0402_5%
RH106
1
GFX_CLK_REQ#
D D
FN14
<13> FN14
FN15
<13> FN15
20121106 Change back to CLKOUT pair 1 as HP's request LPT_PCH_M_EDS

UH1C REV = 5
20121104 Move to CLKOUT pair 0 to follow ME ICC setting as HP's request
Y43 AB35 CLK_PCIE_VGA# DGPU_PWR_EN <14,35>

CLKOUT_PCIE_N_0 CLKOUT_PEG_A CLK_PCIE_VGA# <35>
2
Y45 AB36 CLK_PCIE_VGA
G
CLKOUT_PCIE_P_0 CLKOUT_PEG_A_P CLK_PCIE_VGA <35>
2N7002KW_SOT323-3
RH104 2 1 10K_0402_5% AB1 AF6 GFX_CLK_REQ# 1 3
+3V_PCH PCIECLKRQ0#/GPIO73 PEGA_CLKRQ#/GPIO47 PEG_CLK_REQ# <35>
S
20120911 HP's request CLK_PCIE_CR# AA44 Y39 20120703 Follow HP's GPIO table
<39> CLK_PCIE_CR# CLKOUT_PCIE_N_1 CLKOUT_PEG_B
CLK_PCIE_CR AA42 RH109
<39> CLK_PCIE_CR 2 1 10K_0402_5% CLKOUT_PCIE_P_1 Q55
+3VS RH105 Y38 2 1
CLKOUT_PEG_B_P +3V_PCH
RH203 2 1 0_0402_5% FN14 AF1
<39> CR_CLK_REQ# PCIECLKRQ1#/GPIO18 10K_0402_5%
U4 WLAN_TRAMSIT_OFF#
CLK_TB_REFCLK#AB43 PEGB_CLKRQ#/GPIO56 WLAN_TRAMSIT_OFF# <25>
<39> CLK_TB_REFCLK# CLKOUT_PCIE_N_2 AF39 CLK_CPU_DMI#
CLKOUT_DMI CLK_CPU_DMI# <5>
CLK_TB_REFCLK AB45
<39> CLK_TB_REFCLK CLKOUT_PCIE_P_2 AF40 CLK_CPU_DMI
CLKOUT_DMI_P CLK_CPU_DMI <5>
RH113 2 1 10K_0402_5% FN15 AF3
+3VS PCIECLKRQ2#/GPIO20/SMI#
RH205 2 1 0_0402_5% AJ40 CLK_CPU_SSC_DPLL#
<39> TB_CLKREQ# CLKOUT_DP CLK_CPU_SSC_DPLL# <5>
AD43 AJ39 CLK_CPU_SSC_DPLL
C CLKOUT_PCIE_N_3 CLKOUT_DP_P CLK_CPU_SSC_DPLL <5> C
AD45
RH118 2 1 10K_0402_5% T3 CLKOUT_PCIE_P_3 AF35 CLK_CPU_DPLL#
+3V_PCH PCIECLKRQ3#/GPIO25 CLKOUT_DPNS CLK_CPU_DPLL# <5>
AF36 CLK_CPU_DPLL
CLKOUT_DPNS_P CLK_CPU_DPLL <5>
AF43
AF45 CLKOUT_PCIE_N_4 AY24 CLK_BUF_DMI#
RH121 2 1 10K_0402_5% V3 CLKOUT_PCIE_P_4 CLKIN_DMI AW24 CLK_BUF_DMI
+3V_PCH PCIECLKRQ4#/GPIO26 CLKIN_DMI_P
20120911 HP's request CLK_PCIE_EXP# AE44 AR24 CLK_BUF_BCLK#
<39> CLK_PCIE_EXP# CLKOUT_PCIE_N5 CLKIN_GND
CLK_PCIE_EXP AE42 AT24 CLK_BUF_BCLK
<39> CLK_PCIE_EXP CLKOUT_PCIE_P_5 CLKIN_GND_P
CLKREQ_EXP# AA2
<39> CLKREQ_EXP# 2 1 10K_0402_5% PCIECLKRQ5#/GPIO44 H33 CLK_BUF_DOT96#
+3V_PCH RH125
CLK_PCIE_LAN# AB40 CLKIN_DOT96N G33 CLK_BUF_DOT96
<29> CLK_PCIE_LAN# CLKOUT_PCIE_N_6 CLKIN_DOT96P
CLK_PCIE_LAN AB39
<29> CLK_PCIE_LAN 20120911 HP's request CLK_PCIE_LAN_REQ1# AE4 CLKOUT_PCIE_P_6 BE6 CLK_BUF_CKSSCD#
<29> CLK_PCIE_LAN_REQ1# 2 1 10K_0402_5% PCIECLKRQ6#/GPIO45 CLKIN_SATA BC6 CLK_BUF_CKSSCD
+3V_PCH RH128
CLK_PCIE_MINI1# AJ44 CLKIN_SATA_P
<25> CLK_PCIE_MINI1# CLKOUT_PCIE_N_7
20120911 HP's request F45 CLK_PCH_14M
CLK_PCIE_MINI1 AJ42 REFCLK14IN D17 CLK_PCI_LOOPBACK
<25> CLK_PCIE_MINI1 CLKOUT_PCIE_P_7 CLKIN_33MHZLOOPBACK
RH131 2 1 10K_0402_5%
+3V_PCH
MINI1_CLKREQ# Y3 AM43 XTAL25_IN
<25> MINI1_CLKREQ# PCIECLKRQ7#/GPIO46 XTAL25_IN AL44 XTAL25_OUT 1 2
CLK_BCLK_ITP# AH43 XTAL25_OUT RH132 1M_0402_5%
<5> CLK_BCLK_ITP# CLKOUT_ITPXDP C40 20120807 Corret pin name as Intel's specification
20121104 HP's request CLKOUTFLEX0/GPIO64
CLK_BCLK_ITP AH45 PAD~D T91 @
<5> CLK_BCLK_ITP 2 1 10_0402_5% CLKOUT_ITPXDP_P F38 YH2
<30> CLK_PCI_KBC RH135 SIO_14M RH136 2 1 22_0402_5%
CLK_SIO_14M <32>
RH137 2 1 10_0402_5% CLK_PCI0 D44 CLKOUTFLEX1/GPIO65 3 1
<32> CLK_PCI_SIO CLKOUT_33MHZ0 OUT IN
F36
CLK_PCI_LOOPBACK RH138 2 1 22_0402_5% PCI_LOOPBACKOUT E44 CLKOUTFLEX2/GPIO66 PAD~D T92 @ 4 2
CLKOUT_33MHZ1 NC NC
F39
RH139 2 1 22_0402_5% CLK_PCI2 B42 CLKOUTFLEX3/GPIO67
<28> CLK_PCI_TPM 25MHZ_20PF_5YEA2500020BIF50Q3
CLKOUT_33MHZ2 AM45 ICLK_IREF 1 2
ICLK_IREF +1.5VS
F41 0_0402_5% RH140 1 1
B CLKOUT_33MHZ3 AD39 B
RH141 2 1 22_0402_5% CLK_PCI4 A40 TP19 AD38 CH21 CH22
<25> CLK_PCI_DEBUG CLKOUT_33MHZ4 TP18
27P_0402_50V8J 27P_0402_50V8J
RH234 2 1 22_0402_5% AN44 PCH_CLK_BIASREF 1 2 2 2
<30> CLK_PCI_DEBUG_KBC DIFFCLK_BIASREF +1.5VS
CLOCK SIGNAL 7.5K_0402_1% RH142
LYNXPOINT_BGA695 2 OF 11
PCIECLK REQ Pull UP Power Rail:

SUS Rail : 0 3 4 5 6 7 CLK_BUF_DMI 1
RP15
8
Core Rail: 1 2 CLK_BUF_DMI#
CLK_BUF_BCLK
2
3
7
6
CLK_BUF_BCLK# 4 5
10K_8P4R_5% 20121015
CLK_BUF_DOT96# RH1151 2 10K_0402_5%

CLK_BUF_DOT96 RH1171 2 10K_0402_5%
CLK_BUF_CKSSCD# RH1191 2 10K_0402_5%

CLK_BUF_CKSSCD RH1201 2 10K_0402_5%
CLK_PCH_14M RH1231 2 10K_0402_5%
A A
CLOCK TERMINATION for FCIM and need close to PCH

PCH- CLK
Custom 0.3
LA-9371P
5 4 3 2 1
5 4 3 2 1
+3V_PCH
FPR_OFF 2 1
10K_0402_5% RH143
MEM_SMBCLK 2 1
2.2K_0402_5% RH144
MEM_SMBDATA 2 1
2.2K_0402_5% RH146
DDR_RST_EN 2 1 20120807 Change RH148 to 2.2K as HP's request
@
2.2K_0402_5% RH148 20121020 Uninstall RH148 as HP's request
NFC_RST# 2 1
10K_0402_5% RH149
SML1_SMBCLK 1 2
20120703 Add RH149 for NFC
2.2K_0402_5% RH150
SML1_SMBDATA 1 2
D 2.2K_0402_5% RH151 D
+3VM_LAN
LAN_SMBCLK 2 1
2.2K_0402_5% RH152
LAN_SMBDATA 2 1 20121011 HP's request
+3VS 2.2K_0402_5% RH153 20121101 HP's request
+3VS
1 2 SIRQ
RH145 10K_0402_5% DDR_XDP_WAN_SMBDAT 2 1
+3VS 10K_0402_5% RH37
LPT_PCH_M_EDS
DDR_XDP_WAN_SMBCLK 2 1
UH1D REV = 5 10K_0402_5% RH38
2
N7 FPR_OFF
SMBALERT#/GPIO11 FPR_OFF <28>
LPC_LAD0 A20
<25,28,30,32> LPC_LAD0 LAD_0
SMBus R10 MEM_SMBCLK MEM_SMBCLK 6 1
SMBCLK DDR_XDP_WAN_SMBCLK <11,12,13,28,38,5>
LPC_LAD1 C20
<25,28,30,32> LPC_LAD1 LAD_1 DMN66D0LDW-7_SOT363-6
U11 MEM_SMBDATA QH3A
SMBDATA
5
LPC_LAD2 A18
LPC
<25,28,30,32> LPC_LAD2 LAD_2 N8 DDR_RST_EN
SML0ALERT#/GPIO60 DDR_RST_EN <5>
LPC_LAD3 C18 MEM_SMBDATA 3 4
<25,28,30,32> LPC_LAD3 LAD_3 DDR_XDP_WAN_SMBDAT <11,12,13,28,38,5>
U8 LAN_SMBCLK
SML0CLK LAN_SMBCLK <29> DMN66D0LDW-7_SOT363-6
LPC_LFRAME# B21 QH3B
<25,28,30,32> LPC_LFRAME# LFRAME# R7 LAN_SMBDATA
SML0DATA LAN_SMBDATA <29>
D21
<32> LPC_LDRQ0# LDRQ0# +3VS
H6 NFC_RST#
SML1ALERT#/PCHHOT#/GPIO74 NFC_RST# <39>
G20
C LDRQ1#/GPIO23 K6 SML1_SMBCLK
C
SIRQ AL11 SML1CLK/GPIO58 20120703 Add for NFC

<28,30,32> SIRQ SERIRQ N11 SML1_SMBDATA
SML1DATA/GPIO75 @ RH238
5
QH10B 2 1
@ +3VS
AF11 CL_CLK1 2.2K_0402_5%
CL_CLK CL_CLK1 <25> LAN_SMBCLK 3 4
PCH_SPI_CLK 1 2 PCH_SPI_CLK_R AJ11 NFC_3S_SMBCLK <39>
SPI
<30> PCH_SPI_CLK SPI_CLK
RH154 4.99_0402_1% AF10 CL_DATA1 DMN66D0LDW-7_SOT363-6
C-Link CL_DATA CL_DATA1 <25> @ RH239
PCH_SPI_CS0# 1 2 PCH_SPI_CS0#_R AJ7
2
<30> PCH_SPI_CS0# SPI_CS0# 2 1
RH155 4.99_0402_1% AF7 CL_RST1# +3VS
CL_RST# CL_RST1# <25>
AL7 2.2K_0402_5%
SPI_CS1# LAN_SMBDATA 6 1
NFC_3S_SMBDAT <39>
AJ10 QH10A DMN66D0LDW-7_SOT363-6
SPI_CS2# BA45
TP1 @
<30> PCH_SPI_SI PCH_SPI_SI 2 1 PCH_SPI_SI_R AH1
RH156 4.99_0402_1% SPI_MOSI BC45
PCH_SPI_SO 2 1 PCH_SPI_SO_R AH3 Thermal TP2 20120703 Add for NFC
<30> PCH_SPI_SO SPI_MISO
RH157 4.99_0402_1% BE43 20120920 Uninstall QH10, RH238, RH239
PCH_SPI_WP# 2 1 PCH_SPI_WP#_R AJ4 TP4
<30> PCH_SPI_WP# 15_0402_5% SPI_IO2 DMN66D0LDW-7_SOT363-6
RH243 BE44
PCH_SPI_HOLD# 2 1 PCH_SPI_HOLD#_R AJ2 TP3 QH9A
<30> PCH_SPI_HOLD# RH244 SPI_IO3 SML1_SMBCLK 1 6
15_0402_5% AY43 PCH_TD_IREF 1 2 PCH_KBC_I2CLK <30,35>
TD_IREF RH158 8.2K_0402_1%
20120726 HP's request +3V_PCH
2
4 OF 11 QH9B
LYNXPOINT_BGA695 SML1_SMBDATA 4 3
PCH_KBC_I2CDAT <30,35>
DMN66D0LDW-7_SOT363-6
+3V_PCH
5
B B
Screw Hole Stand Off CPU Bracket Keyboard

H3 H5 H17 H18 H19 H9 H10 H20 H21 H33 H11 H12 H13 H14 H32 H26
H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P3 H_3P3 H_3P3 H_3P3 H_3P3 H_4P0 H_3P7 H_4P0 H_4P0 H_6P0 H_6P0
HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA
@ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @
1
1
1
1
1
1
1
1
H27 H24 H28 H38 H42 H1 H4 H6 H8 H7 H37 H41 H46
H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P8 H_3P8 H_3P8 H_3P8 H_3P8 H_2P1N H_3P5N H_2P6X2P1N
HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA
20120709 Delete by HP's request

@ @ @ @ @ @ @ @ @ @ @ @ @ Travel BATT
1
1
1
1
FD1 FD2
FIDUCIAL_C40M80 FIDUCIAL_C40M80 H44 H45
H15 H30 H39 H_3P0N H_3P0N
H43 H47 H34 H_3P8 H_3P8 H_3P8
ZZZ1 H_3P0 H_3P0 H_6P0X7P5
@ @ HOLEA HOLEA
HOLEA HOLEA HOLEA
1
HOLEA HOLEA HOLEA
A FD3 FD4 A
@ @
1
1
@ @ @ FIDUCIAL_C40M80 FIDUCIAL_C40M80
1
1
1
@ @ @
1
1
PCB
MB @ @
1
PCH - SPI, SMBUS,LPC
Custom 0.3
LA-9371P
5 4 3 2 1
5 4 3 2 1
D D
LPT_PCH_M_EDS
UH1I REV = 5
PCIE_PRX_DTX_N1 AW31 B37 USBP0-

<39> PCIE_PRX_DTX_N1 PERN1/USB3RN3 USB2N0 USBP0- <33>
<39> PCIE_PRX_DTX_P1
PCIE_PRX_DTX_P1 AY31
PERP1/USB3RP3 USB2P0
D37 USBP0+
USBP0+ <33>
----->Docking USB 3.0
A38 USBP1-
USB2N1 USBP1- <39>
<39> PCIE_PTX_C_DRX_N1
CH108 1 2 0.1U_0402_10V7K PCIE_PTX_DRX_N1 BE32
PETN1/USB3TN3 USB2P1
C38 USBP1+
USBP1+ <39>
----->USB 3.0 Walkup port 1
CH109 1 2 0.1U_0402_10V7K PCIE_PTX_DRX_P1 BC32 A36
<39> PCIE_PTX_C_DRX_P1 PETP1/USB3TP3 USB2N2
USB2P2
C36 ----->NA
PCIE_PRX_DTX_N2 AT31 A34
<39> PCIE_PRX_DTX_N2 PERN2/USB3RN4 USB2N3
<39> PCIE_PRX_DTX_P2
PCIE_PRX_DTX_P2 AR31
PERP2/USB3RP4 USB2P3
C34 ----->NA
B33 USBP4-
USB2N4 USBP4- <39>
<39> PCIE_PTX_C_DRX_N2 CH110 1 2 0.1U_0402_10V7K PCIE_PTX_DRX_N2 BD33
PETN2/USB3TN4 USB2P4
D33 USBP4+
USBP4+ <39>
<39> PCIE_PTX_C_DRX_P2 CH111 1 2 0.1U_0402_10V7K PCIE_PTX_DRX_P2 BB33 F31 USBP5-
PETP2/USB3TP4 USB2N5 USBP5- <39>
20120718 HP's request USB2P5
G31 USBP5+
USBP5+ <39>
K31 USBP6-
ThunderBolt <39> PCIE_PRX_DTX_N3
PCIE_PRX_DTX_N3 AW33
PERN_3
USB2N6
USB2P6
L31 USBP6+ USBP6-
USBP6+
<39>
<39>
----->Express card slot
PCIE_PRX_DTX_P3 AY33 G29 USBP7-
<39> PCIE_PRX_DTX_P3 PERP_3 USB2N7 USBP7- <37>
USB2P7
H29 USBP7+
USBP7+ <37>
----->Smart card reader
CH27 1 2 0.1U_0402_10V7K PCIE_PTX_DRX_N3 BE34 A32 USBP8-
<39> PCIE_PTX_C_DRX_N3 PETN_3 USB2N8 USBP8- <28>
<39> PCIE_PTX_C_DRX_P3
CH28 1 2 0.1U_0402_10V7K PCIE_PTX_DRX_P3 BC34
PETP_3 USB2P8
C32 USBP8+
USBP8+ <28> ----->Finger Print Reader
A30 USBP9-
USB2N9 USBP9- <39>
<39> PCIE_PRX_DTX_N4
PCIE_PRX_DTX_N4 AT33
PERN_4 USB2P9
C30 USBP9+
USBP9+ <39>
----->Walkup USB 2.0/ USB Charging port
PCIE_PRX_DTX_P4 AR33 B29 USBP10-
<39> PCIE_PRX_DTX_P4 PERP_4 USB2N10 USBP10- <22>
C USB2P10
D29 USBP10+
USBP10+ <22>
----->USB Camera C
<39> PCIE_PTX_C_DRX_N4 CH29 1 2 0.1U_0402_10V7K PCIE_PTX_DRX_N4 BE36 A28 USBP11-
PETN_4 USB2N11 USBP11- <33>
<39> PCIE_PTX_C_DRX_P4 CH30 1 2 0.1U_0402_10V7K PCIE_PTX_DRX_P4 BC36
PETP_4 USB2P11
C28 USBP11+
USBP11+ <33>
----->Docking USB 2.0 port
G26 USBP12-
USBP12- <25>
PCIe
USB2N12
<39> PCIE_PRX_EXPTX_N5 PCIE_PRX_EXPTX_N5 AW36 F26 USBP12+ ----->WWAN
USB
PCIE_PRX_EXPTX_P5 AV36 PERN_5 USB2P12 F24 USBP13- USBP12+ <25>
<39> PCIE_PRX_EXPTX_P5 PERP_5 USB2N13 USBP13- <25>
Express card slot USB2P13
G24 USBP13+
USBP13+ <25> ----->BT/WLAN Combo
CH1001 2 0.1U_0402_10V7K PCIE_PTX_EXPRX_N5_CBD37
<39> PCIE_PTX_EXPRX_N5 PETN_5
CH99 1 2 0.1U_0402_10V7K PCIE_PTX_EXPRX_P5_C BB37
<39> PCIE_PTX_EXPRX_P5 PETP_5 AR26 USB3RN1 USBRBIAS
USB3RN1 USB3RN1 <33>
PCIE_PRX_DTX_N6 AY38
PERN_6 USB3RP1
AP26 USB3RP1
USB3RP1
----->Docking USB 3.0
<33>
22.6_0402_1%
PCIE_PRX_DTX_P6 AW38 BE24 USB3TN1
<29> PCIE_PRX_DTX_P6 PERP_6 USB3TN1 USB3TN1 <33>
1
BD23 USB3TP1
GIGA LAN USB3TP1 USB3TP1 <33>
RH159
<29> PCIE_PTX_C_DRX_N6 CH31 1 2 0.1U_0402_10V7K PCIE_PTX_DRX_N6 BC38 AW26 USB3RN2
PETN_6 USB3RN2 USB3RN2 <39>
<29> PCIE_PTX_C_DRX_P6 CH32 1 2 0.1U_0402_10V7K PCIE_PTX_DRX_P6 BE38
PETP_6 USB3RP2
AV26 USB3RP2
USB3RP2
<39>
BD25 USB3TN2
PCIE_PRX_DTX_N7 AT40 USB3TN2 BC24 USB3TP2 USB3TN2 <39>
<25> PCIE_PRX_DTX_N7 USB3TP2 <39>
2
PCIE_PRX_DTX_P7 AT39 PERN_7 USB3TP2 AW29 USB3RN5
<25> PCIE_PRX_DTX_P7 PERP_7 USB3RN5 USB3RN5 <39>
WLAN USB3RP5
AV29 USB3RP5
USB3RP5
<39>
CH33 1 2 0.1U_0402_10V7K PCIE_PTX_DRX_N7 BE40 BE26 USB3TN5
<25> PCIE_PTX_C_DRX_N7 1 2 0.1U_0402_10V7K PCIE_PTX_DRX_P7 BC40 PETN_7 USB3TN5 BC26 USB3TP5 USB3TN5 <39>
CH34
<25> PCIE_PTX_C_DRX_P7 PETP_7 USB3TP5 AR29 USB3RN6 USB3TP5 <39>
AN38 USB3RN6 AP29 USB3RN6 <39>
PCIE_PRX_DTX_N8 USB3RP6 CAD NOTE:
PCIE_PRX_DTX_P8 AN39 PERN_8 USB3RP6 BD27 USB3TN6 USB3RP6 ----->USB 3.0 Walkup port 6
<39>
<39> PCIE_PRX_DTX_P8 PERP_8 USB3TN6 BE28 USB3TP6
USB3TN6 <39> Route single-end 50-ohms and max 500-mils length.
Card Reader CH35 1 2 0.1U_0402_10V7K PCIE_PTX_DRX_N8 BD42 USB3TP6 USB3TP6 <39> Avoid routing next to clock pins or under stitching capacitors.
<39> PCIE_PTX_C_DRX_N8 PETN_8
<39> PCIE_PTX_C_DRX_P8 CH36 1 2 0.1U_0402_10V7K PCIE_PTX_DRX_P8 BD41 K24 USBRBIAS Recommended minimum spacing to other signal traces is 15 mils.
PETP_8 USBRBIAS# K26
USBRBIAS
1 2 PCH_PCIE_IREF BE30 M33 20121106 HP's request
+1.5VS PCIE_IREF TP24 +3V_PCH
RH160 0_0402_5% L33
TP23
BC30 P3 WWANSSD_M12DET RPH1
B TP11 OC0#/GPIO59 WWANSSD_M12DET <13,25> WWANSSD_M12DET4 5 B
V1 USB_OC1#_R
OC1#/GPIO40 USB_OC1#_R <13> dGPU_HPD_INTR 3 6
U2 USB_OC2#
OC2#/GPIO41 USB_OC2# <13> USB_OC2# 2 7
BB29 P1 USB_OC3#
TP6 OC3#/GPIO42 USB_OC3# <13> USB_OC1#_R 1 8
M3 USB_OC4#_R
OC4#/GPIO43 USB_OC4#_R <13>
T1 dGPU_HPD_INTR 20120911 For DB1-R
OC5#/GPIO9 dGPU_HPD_INTR <13,35>
1 2 PCH_PCIE_RCOMP BD29 N2 10K_8P4R_5% platform ID
+1.5VS PCIE_RCOMP OC6#/GPIO10 LED_LINK_LAN#_R <13,29>
RH164 7.5K_0402_1% M1 USB_OC7#_R RH1651 @ 2 0_0402_5% 20121109
OC7#/GPIO14 USB_OC7# <13> RPH2
9 OF 11 RH2421 2 0_0402_5% USB_OC4#_R 4 5
TB_HOT_PLUG# <39>
LYNXPOINT_BGA695 USB_OC7#_R 3 6
20120718 HP's request LED_LINK_LAN#_R 2 7
USB_OC3# 1 8
10K_8P4R_5%
20120702 Swap for layout routing
A A

PCH-PCIE,USB
Custom 0.3
LA-9371P
5 4 3 2 1
5 4 3 2 1
+3VS 2N7002KW_SOT323-3 Q58
1
D +3VS
2 1 PCH_GPIO0 2
RH167 10K_0402_5% <30> OCP_PWM_OUT
G A20GATE 2 1
2 1 OCP_OC# S UH1F LPT_PCH_M_EDS REV = 5 10K_0402_5% RH166
3
RH169 100K_0402_5% RCIN# 2 1
2 1 THERM_SCI# PCH_GPIO0 AT8 10K_0402_5% RH168
RH240 10K_0402_5% BMBUSY#/GPIO0
2 1 ODD_EN 20120705 Add PU resistor
OCP_OC# F13
RH171 10K_0402_5% TACH1/GPIO1
1 2 DGPU_PWROK
EC_SCI# A14
RH175 10K_0402_5% <30>
20121107 Change RH175 to 10K Ohm as HP's request EC_SCI# TACH2/GPIO6
1 2 DOCK_ID0 CPU/Misc
RH177 10K_0402_5% THERM_SCI# G15
TACH3/GPIO7
1 2 DOCK_ID1
RH172 10K_0402_5% PCH_GPIO8 Y1
<13> PCH_GPIO8 GPIO8
D 1 2 KBC_SIO_RST# D
RH173 10K_0402_5% LAN_DIS# K13
<29> LAN_DIS# LAN_PHY_PWR_CTRL/GPIO12
1 2 EC_SCI# AN10 A20GATE
PCH_GPIO15 AB11 TP14
RH178 10K_0402_5% GPIO15 AY1 PAD~D T104 @
2 1 WWAN_TRANSMIT_OFF# PECI
KBL_DET# AN2
RH241 10K_0402_5% 20120705 Add PU resistor <13,38> KBL_DET# SATA4GP/GPIO16 AT6 RCIN#
DGPU_PWROK C14 GPIO RCIN#
2 1 FPR_LOCK# <35> DGPU_PWROK TACH0/GPIO17
RH176 10K_0402_5% AV3 H_CPUPWRGD +1.05VS
PROCPWRGD H_CPUPWRGD <5>
20121024 HP's request WWAN_TRANSMIT_OFF# BB4
<25> WWAN_TRANSMIT_OFF# SCLOCK/GPIO22 AV1 PCH_THERMTRIP#_R 2 1
PCH_GPIO24 Y10 THRMTRIP#
+3VDS RH179 100_0402_1%
GPIO24
0.1U_0402_16V4Z
AU4 CPU_PLTRST#
2 1 LANWAKE# PLTRST_PROC# CPU_PLTRST# <5>
LANWAKE# R11 1 20121028 HP's request
RH250 100K_0402_5% <29> LANWAKE# GPIO27 N10
20121025 Install RH250 as HP's request VSS
CH37
+3V_PCH PCH_GPIO28 AD11 PCH_THERMTRIP#_R PCH_THERMTRIP#_R <24,35,5>
20121026 HP's request GPIO28
PCH_GPIO34 AN6 2
2 1 PCH_GPIO24 20120801 HP's request GPIO34
RH182 10K_0402_5%
2 1 PCH_GPIO8 PCH_GPIO35 AP1
GPIO35/NMI#
RH183 10K_0402_5%
2 1 LAN_DIS# PCH_GPIO36 AT3
@ <13> PCH_GPIO36 SATA2GP/GPIO36
RH184 10K_0402_5%
2 1 NFC_INT PCH_GPIO37 AK1
<13> PCH_GPIO37 SATA3GP/GPIO37
RH185 10K_0402_5%
DOCK_ID0 AT7
SLOAD/GPIO38
+3V_PCH 20120703 Change for NFC DOCK_ID1 AM3 A2
20121024 Install RH185 as HP's request SDATAOUT0/GPIO39 VSS A41
FPR_LOCK# AN4 VSS A43
2
<28> FPR_LOCK# SDATAOUT1/GPIO48 VSS

4.7K_0402_5%
A44
DGPU_PRSNT# AK3 VSS B1
<13,35> DGPU_PRSNT# SATA5GP/GPIO49 VSS
RH193
B2
NFC_INT U12 VSS B44
<39> NFC_INT GPIO57 VSS B45
1
C 20120703 Change for NFC ODD_EN C16 VSS BA1 C

PCH_GPIO28 <23> ODD_EN TACH4/GPIO68 VSS BC1
20120705 Correct net name to follow GPIO table VSS
@ T140 PAD D3E_WAKE# D13 BD1
TACH5/GPIO69 VSS BD2
1
VSS
1K_0402_1%
KBC_SIO_RST# G13 BD44

<30,32> KBC_SIO_RST# TACH6/GPIO70 VSS
@RH194
@
BD45
VSS
RH194
GPS_XMIT_OFF# H15 BE2

<25> GPS_XMIT_OFF# TACH7/GPIO71 VSS BE3
VSS D1
2
BE41 VSS E1
BE5 VSS NCTF VSS E45
C45 VSS VSS A4
A5 VSS VSS
VSS
PLL ON DIE VR ENABLE
6 OF 11
ENABLED - HIGH(DEFAULT) LYNXPOINT_BGA695
DISABLED - LOW
2 1 PCH_GPIO36
RH198 10K_0402_5%
2 1 PCH_GPIO37 20120801 HP's request
RH200 10K_0402_5%
SATA2GP/GPIO36 , SATA3GP/GPIO37 SAMPLED AT RISING EDGE OF PWROK.

B
WEAK INTERNAL PULL-DOWN.(WEAK INTERNAL PULL-DOWN IS DISABLED AFTER B
PLRST_N DE-ASSERTS).
NOTE: THIS SIGNAL SHOLD NOT BE PULLED HIGH WHEN STRAP IS SAMPLED.
+3VS
1 2 KBL_DET#
Config GPIO16,49 RH197 10K_0402_5%
2 1 DGPU_PRSNT#
RH199 10K_0402_5% 1 2 PCH_GPIO15 GPIO15
USB X4,PCIEX8,SATAX6 11 RH181 1K_0402_1%
1 2 PCH_GPIO34 GPIO34
RH170 100K_0402_5%
USB X6,PCIEX8,SATAX4 01 +3VS 1 2 PCH_GPIO35 GPIO35
RH180 10K_0402_5%
20120802 Delete RH201/RH202 as HP's request BRD_ID1 BRD_ID2 BRD_ID3 BRD_ID4

Board ID
GPIO15 GPIO34 GPIO35 GPIO40
DB0 0 0 0 0
DB1 0 0 0 1
DB2 0 0 1 0
SI1 0 1 0 0
SI1B 0 1 0 1
A SI2 0 1 1 0 A
PV1 1 0 0 0
MV 1 1 0 0

PCH -GPIO,MISC,NTFC
Custom 0.3
LA-9371P
5 4 3 2 1
5 4 3 2 1
D D
LH1
+VCCADAC 2 1
+1.5VS
BLM18PG181SN1D_2P
0.01U_0402_16V7K
0.1U_0402_16V4Z
10U_0603_6.3V6M
1 1 1
CH40
CH41
CH42
2 2 2
LPT_PCH_M_EDS
UH1G REV = 5
+1.5VS
+1.05VS P45
VCCADAC1_5
AA24 P43
VCC CRT DAC VSS +1.05VS
10U_0603_6.3V6M
AA26
VCC
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0603_6.3V6M
1 1 1 1 AD20 M31 1
VCC VCCADACBG3_3 +3VS
1U_0402_6.3V6K
AD22 @
VCC
CH38
CH39
CH43
CH44
CH45
C AD24 C
VCC 1
AD26 BB44
2 2 2 2 VCC VCCVRM +3VS 2
CH46
AD28
AE18 VCC FDI
AN34
AE20 VCC VCCIO 2
AE22 VCC AN35
VCC VCCIO +3V_PCH
0.1U_0402_16V4Z
AE24
AE26 VCC R30
VCC HVCMOS VCC3_3_R30 1
AG18 R32
VCC VCC3_3_R32
0.1U_0402_16V4Z
CH47
AG20
AG22 VCC Y12 +PCH_USB_DCPSUS1
VCC DCPSUS1 T142 1 2
AG24
VCC
CH48
Y26 AJ30
VCC VCCSUS3_3
Core
AJ32
VCCSUS3_3 2
+1.05VM AJ26 +PCH_USB_DCPSUS3 +1.5VS
USB3 DCPSUS3 T143
+PCH_VCCDSW U14 AJ28
AA18 DCPSUSBYP DCPSUS3 AK20
VCCASW VCCIO +1.05VS
U18 AK26
VCCASW VCCVRM +1.5VS
22U_0805_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0603_6.3V6M
U20 AK28 1
U22 VCCASW VCCVRM @
1 1 1 VCCASW
CH52
U24 BE22
VCCASW VCCVRM
CH49
CH50
CH51
V18 PCIe/DMI
VCCASW +1.5VS 2
10U_0603_6.3V6M
V20 AK18 1
2 2 2 VCCASW VCCIO +1.05VS
V22 @
VCCASW
CH53
V24 AN11
Y18 VCCASW VCCVRM
VCCASW SATA 2
10U_0603_6.3V6M
Y20 AK22 1
Y22 VCCASW VCCIO +1.05VS @
VCCASW
CH54
AM18
VCCIO AM20
VCCIO AM22 2
B VCCMPHY VCCIO AP22 B
VCCIO
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0603_6.3V6M
AR22 1 1 1 1 1
VCCIO AT22
VCCIO
CH55
CH56
CH57
CH58
CH59
7 OF 11
LYNXPOINT_BGA695 2 2 2 2 2
1 2 +PCH_VCCDSW
RH204 5.11_0402_1%~D
+PCH_VCCDSW_R
1U_0402_6.3V6K
1
CH61
A A
20120720 Delete CH60, CH62, CH63 as HP's request

PCH- Power
Custom 0.3
LA-9371P
5 4 3 2 1
5 4 3 2 1
D D
+3V_PCH
2 1
UH1H LPT_PCH_M_EDS REV = 5 0_0402_5% RH208
0.1U_0402_10V6K
2 1 +3VDS
+3V_PCH +3V_PCH @
0_0402_5% RH209
1
CH64
R24 R20 CH104 20121020 HP's request
R26 VCCSUS3_3 VCCSUS3_3 R22 1 2
VCCSUS3_3 VCCSUS3_3 20121023 HP's request
0.1U_0402_10V6K
R28
+1.05VS U26 VCCSUS3_3 GPIO/LPC 0.1U_0402_10V6K 2
1 VCCSUS3_3 A16 +PCH_VCCDSW3_3
VCCDSW3_3
CH65
M24
VSS AA14 +PCH_VCCSST 1 2 +3VS
2 +3VS DCPSST
0.1U_0402_10V6K
U35 CH66 0.1U_0402_10V6K

VCCUSBPLL AE14
1
USB
L24 VCC3_3 AF12
VCC3_3 VCC3_3
CH67
0.01U_0402_16V7K_X7R
AG14
VCC3_3 +3V_PCH
0.1U_0402_10V6K
U30 1
2 VCCIO
CH69
1 +1.05VS V28
VCCIO
CH68
V30 U36 +1.05VS

Y30 VCCIO VCCIO
VCCIO +3V_PCH 2
20120720 Delete CH101 as HP's request
2
0.1U_0402_10V6K
0.1U_0402_10V7K~D
+1.5VS T144 S2 Y35 Azalia
DCPSUS2 A26
1 VCCSUSHDA 1
AF34
VCCVRM
CH70
CH71
+RTCVCC
10U_0603_6.3V6M
1U_0402_6.3V6K
1 +1.05VS_VCC AP45 K8 1
2 VCC VCCSUS3_3 2
CH72
CH73
+PCH_VCCCLK Y32 A6
VCCCLK VCCRTC
C 2 RTC 2 C
0.1U_0402_10V6K
0.1U_0402_10V6K
1U_0402_6.3V6K
+PCH_VCCCLK3_3 M29 P14
+PCH_DCPRTC
VCCCLK3_3 DCPRTC P16 CH74 1 2 0.1U_0402_10V7K~D
DCPRTC 1 1 1
L29 +1.05VS
VCCCLK3_3
CH75
CH76
CH77
CH105 1 2 0.1U_0402_10V6K
L26 AJ12 CH83 1 2 0.1U_0402_10V6K
M26 VCCCLK3_3 V_PROC_IO AJ14 CH84 1 2 1U_0402_6.3V6K 2 2 2
CPU
VCCCLK3_3 V_PROC_IO
U32
V32 VCCCLK3_3 AD12
ICC
VCCCLK3_3 SPI VCCSPI +3V_PCH
+PCH_VCCCLK AD34
VCCCLK 20120911 Delete RH226 HP's request
1U_0402_6.3V6K
P18 +3VS
AA30 VCC P20
VCCCLK VCC
1U_0402_6.3V6K
AA32 1
VCCCLK L17
Fuse VCCASW +1.05VM 1
CH79
AD35
+1.05VS +1.05VS_VCC VCCCLK
CH92
R18
LH2 AG30 VCCASW 2
1 2 +1.05VS_VCC AG32 VCCCLK 2
4.7UH_LQM18FN4R7M00D_20% VCCCLK AW40
VCCVRM +1.5VS
AD36
VCCCLK AK30 +3VS
VCC3_3
10U_0603_6.3V6M
1U_0402_6.3V6K
1 1 AE30 Thermal
AE32 VCCCLK AK32
VCCCLK VCC3_3
CH80
CH81
0.1U_0402_10V6K
2 2 8 OF 11 1
CH85
LYNXPOINT_BGA695
2
B B
+1.05VS +PCH_VCCCLK
1 2
RH213 0_0805_5%
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0603_6.3V6M
1 1 1 1 1 1
CH87
CH88
CH89
CH90
CH91
@
CH86
2 2 2 2 2 2
Place near pin AP45 Place near pin Y32,AA30,AA32 Place near pin AD34 Place near pin AD35,AD36 Place near pin AG30,AG32,AE30,AE32
+3VS +PCH_VCCCLK3_3
1 2
RH216 0_0805_5%
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1 1 1 1
CH93
CH94
CH95
CH96
2 2 2 2
A A
Place near pin M29 Place near pin L29 Place near pin L26,M26 Place near pin U32,V32

PCH - Power
Custom 0.3
LA-9371P
5 4 3 2 1
5 4 3 2 1
D D
UH1J LPT_PCH_M_EDS UH1K LPT_PCH_M_EDS
REV = 5
AL34 K39 AA16 REV = 5 B19
AL38 VSS VSS L2 AA20 VSS VSS B23
AL8 VSS VSS L44 AA22 VSS VSS B27
AM14 VSS VSS M17 AA28 VSS VSS B31
AM24 VSS VSS M22 AA4 VSS VSS B35
AM26 VSS VSS N12 AB12 VSS VSS B39
AM28 VSS VSS N35 AB34 VSS VSS B7
AM30 VSS VSS N39 AB38 VSS VSS BA40
AM32 VSS VSS N6 AB8 VSS VSS BD11
AM16 VSS VSS P22 AC2 VSS VSS BD15
AN36 VSS VSS P24 AC44 VSS VSS BD19
AN40 VSS VSS P26 AD14 VSS VSS AY36
AN42 VSS VSS P28 AD16 VSS VSS AT43
AN8 VSS VSS P30 AD18 VSS VSS BD31
AP13 VSS VSS P32 AD30 VSS VSS BD35
AP24 VSS VSS R12 AD32 VSS VSS BD39
AP31 VSS VSS R14 AD40 VSS VSS BD7
AP43 VSS VSS R16 AD6 VSS VSS D25
C AR2 VSS VSS R2 AD8 VSS VSS AV7 C
AK16 VSS VSS R34 AE16 VSS VSS F15
AT10 VSS VSS R38 AE28 VSS VSS F20
AT15 VSS VSS R44 AF38 VSS VSS F29
AT17 VSS VSS R8 AF8 VSS VSS F33
AT20 VSS VSS T43 AG16 VSS VSS BC16
AT26 VSS VSS U10 AG2 VSS VSS D4
AT29 VSS VSS U16 AG26 VSS VSS G2
D42 VSS VSS U38 AJ16 VSS VSS G8
AV13 VSS VSS U42 AJ18 VSS VSS H10
AV22 VSS VSS U6 AJ20 VSS VSS H13
AV24 VSS VSS V14 AJ22 VSS VSS H17
BB25 VSS VSS V43 AJ38 VSS VSS H26
AV40 VSS VSS W2 AJ6 VSS VSS H31
AV6 VSS VSS W44 AJ8 VSS VSS H36
AW2 VSS VSS Y14 AK14 VSS VSS H40
F43 VSS VSS Y16 AK24 VSS VSS H7
AY10 VSS VSS Y24 AK43 VSS VSS K10
AY15 VSS VSS Y28 AK45 VSS VSS K15
AY20 VSS VSS Y34 AL12 VSS VSS K20
AY26 VSS VSS Y36 AL2 VSS VSS K29
AY29 VSS VSS Y40 BC22 VSS VSS K33
AY7 VSS VSS Y8 BB42 VSS VSS BC28
B11 VSS VSS VSS VSS
B15 VSS
VSS 11 OF 11
10 OF 11 LYNXPOINT_BGA695
B LYNXPOINT_BGA695 B
A A

PCH - GND
Custom 0.3
LA-9371P
5 4 3 2 1
5 4 3 2 1
LCD POWER CIRCUIT

D D
INVPWR_B+ L1 B+
W=60mils FBMA-L11-201209-221LMA30T_0805
Place closed to JEDP1 2 1
R490 2 1 100K_0402_5% U44 +LCDVDD L2
FBMA-L11-201209-221LMA30T_0805
ENAVDD 3 2 1
<35> ENAVDD 09/26 Change C497 to 4.7u. Install R490 ON
1 7
W=60mils
+3VS +LCDVDD 1 1 1 1
VIN VOUT C2 C3 C4 C5 SM010014520 3000ma
2 8 680P_0402_50V7K 68P_0402_50V8J
1 C367 1 C1 VIN VOUT
C8 C368 220ohm@100mhz
10U_0603_6.3V6M 0.1U_0402_16V4Z
1 1 2 2 2 2 DCR 0.04
18P_0402_50V8J
4.7U_0603_6.3V6K
0.1U_0402_16V4Z
18P_0402_50V8J
@
@
2 2 4
+5VDS VBIAS 2 2
5
6
CT
GND
GND
9 eDP PANEL Conn.
1
TPS22965DSGR_SON8_2X2 W=60mils W=60mils
C7
20120719 RF's request 4700P_0402_16V7K 20120719 RF's request
2
07/06 Change for eDP MUX JEDP1

1
C 2 1 C
20121026 Change LCDVDD power rail solution. <36> EDP_SW_D3N
3 2
Delete R9,R10,R11,C6,Q12,Q20 <36> EDP_SW_D3P
4 3
5 4
<36> EDP_SW_D2N 5
6
<36> EDP_SW_D2P 6
7
8 7
<36> EDP_SW_D1N 8
9
<36> EDP_SW_D1P 9
10
11 10
ENABLT R12 1 2 <36> EDP_SW_D0N 11
<35> ENABLT 12
2K_0402_5% <36> EDP_SW_D0P 12
13
14 13
1
<36> EDC_SW_AUX 15 14
R13 <36> EDC_SW_AUX# 16 15
100K_0402_5% +LCDVDD 16
2
1 2 17 +5VS
R179 R178 18 17
100K_0402_5% 100K_0402_5% 19 18
2
20 19
21 20
+3VS
1
22 21
4.7U_0603_6.3V6K
1U_0402_6.3V6K
<13> SG_IN 23 22
EDP_SW_HPD
D3 <36> EDP_SW_HPD ENABLT_R 24 23
RB751V-40_SOD323-2 24 1 1
INV_PWM 25
C84
C81
<35> INV_PWM +3VS 25
26
1 2 ENABLT_R 26
<30,39> LID_SW# D_MIC_CLK 27
<26> D_MIC_CLK 28 27 2 2
D_MIC_DATA
<26> D_MIC_DATA 28
1
1 29
R491 C83 30 29
31 30
20120731 Delete KB LOGO circuit 100K_0402_5% 0.1U_0402_16V4Z <14> Camera_ON 31
32
2 +5VS 32 20121025
33
2
B USB20_P10_R 34 33 B
@ 35 34
USB20_N10_R
R15 1 2 0_0402_5% 35
36 41
37 36 G1 42
L3 38 37 G2 43
1 2 USB20_P10_R INVPWR_B+ 38 G3
<17> USBP10+ 1 2 39 44
40 39 G4 45
40 G5
4 3 USB20_N10_R C22 2 1 680P_0402_50V7K INV_PWM
<17> USBP10- 4 3 ACES_50398-04071-001
CONN@
WCM-2012-900T_4P
1 R16 2 0_0402_5%
20120911 Change JEDP1's footprint
@
20120913 Modify pin assignment
A A

eDP/LVDS CONN & Camera
0.3
LA-9371P
5 4 3 2 1
5 4 3 2 1
SATA Second HDD CONN. Place caps.

SATA Primary HDD CONN.
Place caps. CONN@ JHDD2 near HDD
JHDD1 CONN@ near HDD 1 CONN.
GND
CONN.
D 2 SATA_PTX_C_DRX_P4 0.01U_0402_16V7K_X7R 1 2 C68 D
A+ SATA_PTX_DRX_P4 <13>
1 3 SATA_PTX_C_DRX_N4 0.01U_0402_16V7K_X7R 1 2 C133
GND A- SATA_PTX_DRX_N4 <13>
2 SATA_PTX_C_DRX_P0 0.01U_0402_16V7K_X7R 1 2 C41 4
A+ SATA_PTX_DRX_P0 <13> GND
3 SATA_PTX_C_DRX_N0 0.01U_0402_16V7K_X7R 1 2 C42 5 SATA_PRX_C_DTX_N4 0.01U_0402_16V7K_X7R 1 2 C134
A- SATA_PTX_DRX_N0 <13> B- SATA_PRX_DTX_N4 <13>
4 6 SATA_PRX_C_DTX_P4 0.01U_0402_16V7K_X7R 1 2 C113
GND 5 B+ SATA_PRX_DTX_P4 <13>
SATA_PRX_C_DTX_N0 0.01U_0402_16V7K_X7R 1 2 C43 7
B- 6 SATA_PRX_C_DTX_P0 0.01U_0402_16V7K_X7R 1 2 C44 SATA_PRX_DTX_N0 <13> GND
B+ 7 SATA_PRX_DTX_P0 <13>
GND 8
V33 9
8 V33 10 +5VS
V33 9 +5VS V33 11
V33 10 GND 12 100mils
V33 GND
GND
11 100mils GND
13
12 14
10U_0805_10V4Z
1U_0402_6.3V4Z
0.1U_0402_16V4Z
1000P_0402_50V7K
GND 13 V5 15
GND V5
10U_0805_10V4Z
1U_0402_6.3V4Z
0.1U_0402_16V4Z
1000P_0402_50V7K
14 16 1 1 1 1
+5VS
C135
C119
C132
C112
V5 15 V5 17
1 1 1 1
V5 GND
C45
C46
C47
C48
16 18
V5 +5VS Reserved
17 19
GND GND 2 2 2 2
18 20
23 Reserved 19 2 2 2 2 23 V12 21
24 GND GND 20 24 GND V12 22
GND V12 21 25 GND V12
V12 22 26 NPTH
Placea caps. near
V12
Placea caps. near NPTH
HDD CONN.
SANTA_199201-1 HDD CONN. SANTA_197502-1
20120715 Correct JHDD1's footprint

C 20121024 Update JHDD2's footprint C
SATA ODD CONN. Place caps.

mSATA Conn. CONN@ JODD1 near ODD
+3VS +3VS
1 CONN.
JMINI1 CONN@ GND 2 SATA_PTX_C_DRX_P1 0.01U_0402_16V7K_X7R 1 2 C49
1 2 A+ SATA_PTX_DRX_P1 <13>
1 2 3 SATA_PTX_C_DRX_N1 0.01U_0402_16V7K_X7R 1 2 C50
3 4 A- SATA_PTX_DRX_N1 <13>
3 4 1 1 4
5 6 C59 C60 GND 5 SATA_PRX_C_DTX_N1 0.01U_0402_16V7K_X7R 1 2 C51
7 5 6 8 B- SATA_PRX_DTX_N1 <13>
7 8 6 SATA_PRX_C_DTX_P1 0.01U_0402_16V7K_X7R 1 2 C52
4.7U_0603_6.3V6K
SATA_PRX_DTX_P1 <13>
0.1U_0402_16V4Z
9 10 B+ 7
11 9 10 12 2 2 GND
13 11 12 14
13 14 +5V_ODD
15 16 8 R56 1 2 @ 0_0402_5%
15 16 DP 9
14 V5 10
10U_0805_10V4K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
17 18 GND V5 +5V_ODD 1
17 18 15 11 C53
19 20 GND MD ODD_DA# <14>
16 12
C55
C56
C57
C58
21 19 20 22 GND GND 1 1 1 1
B 21 22 17 13 @ 0.1U_0402_10V6K B
C61 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_P5 23 24 GND GND 2
<13> SATA_PRX_DTX_P5 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_N5 25 23 24 26
C62
<13> SATA_PRX_DTX_N5 27 25 26 28 SANTA_204603-1 2 2 2 2
29 27 28 30
C63 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_N5 31 29 30 32
<13> SATA_PTX_DRX_N5 31 32
C64 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_P5 33 34
<13> SATA_PTX_DRX_P5 33 34
35 36
37 35
37
36
38
38
20121024 Update JODD1's footprint +5VS +5V_ODD
Placea caps. near
20120801 Change to Port 5 as HP's request +3VS
39
41 39 40
40
42 1 2 ODD CONN.
43 41 42 44 @ R55 0_0805_5%
45 43 44 46
47 45 46 48
49 47 48 50
49 50 3 1
S
mSATA_DET# 51 52
D
<13,32> mSATA_DET# 53 51 52 54
G1 G2 +5VS
1U_0402_6.3V6K
CC52
1 2 1 Q24
+3VS
G
2
R1316 10K_0402_5% SI2305CDS-T1-GE3_SOT23-3
BELLW_80003-2021
1
2
R57
20120705 Change R1316 to 10K
100K_0402_5%
20120801 Delete Q48 as HP's request
20121026 Delete R1353 as HP's request
2
R1336
ODD_EN# 1 2
100K_0402_5%
0.1U_0402_10V6K
1
1
C54
D
ODD_EN 2 Q25
A <18> ODD_EN A
G 2N7002K_SOT23-3 @
S 2
20120705 Correct net name to follow GPIO table
3
20120711 Change to +5VS and add R58 as HP's request
+5VS

IBEX-M(1/6)-HDA/JTAG/SATA
Custom LA-9371P 0.3
5 4 3 2 1
5 4 3 2 1
PWM Fan Control circuit +5VS
<30> TACH_FAN_IN +5VS JFAN1
5
U3 1
1 22_0402_5% 2 1
P
<30> FAN_PWM B 4 1 2 3 2
D4
2 1 2 Y R60 C65 4 3
<30,5> KBC_PROC_HOT# A 4
G
D 2 1 5 D
G5
1
RB751V-40_SOD323-2 TC7SET00FU_SSOP5 6
3
@ 0.1U_0402_10V6K G6
+VCCIO_OUT R133
ACES_50273-0040N-001
4.7K_0402_5%
CONN@
1 2
C R166
R17 1 2 2 Q65 1 2
+5VS
2K_0402_5% B MMBT3904_SOT23-3 20120709 Correct pin assignment
E 47K_0402_5%
3
<46,5> KBC_PROC_HOT_R Notes:
Place Q65 close CPU side
C C
28K_0402_1%
+3VS
U38 R1315
R61
1 1 2
1 2 +3VS_TH 5 SET
VCC 2
4 GND
150_0402_1% HYST 3 R492 1 2 0_0402_5%
OT# PCH_THERMTRIP#_R <18,35,5>
2
0.1U_0402_16V4Z C66
GMT G708T1U 20120801
1 20121020 Install R492 and connect to PCH_THERMTRIP#_R
B B
A A

Sandy(2/7) PM,XDP,Thermal
Custom LA-9371P 0.3
5 4 3 2 1
A B C D E
+3V_WWAN
WWAN 1
JMINI3 CONN@
+3V_WWAN
WLAN
<13> WWAN_DET# GND (Presence)
3 2
0.01U_0402_16V7K
0.1U_0402_10V6K
4.7U_0805_10V4Z
5 GND 3P3VAUX 4 R1374
C72
C73
C74
7 GND 3P3VAUX 6 WWAN_FULL_PWR 2 1 1 1 1
<17> USBP12+ +3V_WWAN 20121016 Delete R64 as HP's request
9 USB_D+ FULL_CARD_PWR_OFF# 8 M_WXMIT_OFF#
<17> USBP12- USB_D- W_DISABLE1# 10K_0402_5%
11 10 WW_LED#
GND LED1#
20120908 Add PU as HP's request 2 2 2
12 10K_0402_5% R65 +3V_AOAC
WLAN +3V_AOAC
WWANSSD_M12DET 13 AUDIO0 14 2 1 +3VS
<13,17> WWANSSD_M12DET GND_WWAN AUDIO1 +3VS
1 WLAN_WAKE# 15 16 1
R1375 1 2 10K_0402_5% WWAN_RSVD2 17 RSV (WAKE# /OD)) AUDIO2 18 JMINI2 CONN@
+3V_WWAN RSV(DPR) AUDIO3 (W_DISABLE#2) GPS_XMIT_OFF# <18>
19 20 R671 @ 2 0_0402_5% WLAN_WAKE# 1 2
20120908 Add PU as HP's request <14> PCH_PCIE_WAKE# 1 2
2
21 GND IUM_RFU 22 +3V_WWAN 1 2 3 4
G
UIM_RST <29,30> KBC_WAKE# @
20121016 Install R1354 as HP's request 23 USB3_TX- UIM_RESET 24 UIM_CLK R1355 0_0402_5% 5 3 4 6
20121024 Delete R1354 as HP's request 25 USB3_TX+ UIM_CLK 26 UIM_DATA 1 3 20120807 HP's request 7 5 6 8 LPC_LFRAME#
GND UIM_DATA <15> MINI1_CLKREQ# 7 8 LPC_LFRAME# <16,28,30,32>
27 28 UIM_PWR 9 10 LPC_LAD3
@ 39P_0402_50V8J
@ 39P_0402_50V8J
@ 39P_0402_50V8J
S
USB3RX- UIM_PWR 9 10 LPC_LAD3 <16,28,30,32>
29 30 11 12 LPC_LAD2
C69
C70
C71
USB3RX+ DEVSLP <15> CLK_PCIE_MINI1# 11 12 LPC_LAD2 <16,28,30,32>
31 32 Q69 13 14 LPC_LAD1
GND GNSS0 1 1 1 <15> CLK_PCIE_MINI1 13 14 LPC_LAD1 <16,28,30,32>
33 34 2N7002KW_SOT323-3 15 16 LPC_LAD0
PETn0/SATA_B+ GNSS1 15 16 LPC_LAD0 <16,28,30,32>
35 36
37 PETn0/SATA_B- GNSS2 38
39 GND GNSS3 40 2 2 2 PLT_RST# 17 18 D10 RB751V-40_SOD323-2
41 PERn0/SATA_A- GNSS4 42 CLK_PCI_DEBUG 19 17 18 20 2 1
PERn0/SATA_A+ PERST# <15> CLK_PCI_DEBUG 19 20 WLAN_TRAMSIT_OFF# <15>
43 44 21 22 PLT_RST# <13,14,28,29,30,35,37,39,5>
45 GND CLKREQ# 46 23 21 22 24
REFCLKN PEWake# <17> PCIE_PRX_DTX_N7 23 24
47 48 <17> PCIE_PRX_DTX_P7 25 26
REFCLKP Config_0 T146 @ PAD 27 25 26 28
49 50
GND Config_1 T147 @ PAD 29 27 28 30
PAD @
@T148
T148 51 52 20120807 Add test point as HP's request
53 ANTCTL0 COEX3 54 31 29 30 32
PAD @
@T149
T149 ANTCTL1 COEX2 <17> PCIE_PTX_C_DRX_N7 31 32
55 56 R1352 @ 33 34
ANTCTL2 COEX1 <17> PCIE_PTX_C_DRX_P7 33 34
57 58 SIM_DET 2 1 35 36
20120807 Add test point as HP's request ANTCTL3 SIM_DET UIM_PWR 35 36 USBP13- <17>
PLT_RST# 59 60 37 38
RESET# SUSCLK 100K_0402_5% 37 38 USBP13+ <17>
NGFF_WWAN_PEDET 61 62 39 40
PAD @
@T134
T134 PEDET 3P3VAUX 39 40
63 64 20120730 41 42
65 GND 3P3VAUX 66 20121107 Change R1352 to 100K Ohm and pull high to 43 41 42 44 WL_LED#
43 44 WLAN_TRAMSIT_OFF#
NGFF_WWAN_USB3_OC 67 GND 3P3VAUX UIM_PWR as HP's request R1394 1 2 0_0402_5% CL_CLK1_R 45 46
PAD @
@T135
T135 OC_USB3 <16> CL_CLK1 R1395 1 45 46
2 0_0402_5% CL_DATA1_R 47 48
<16> CL_DATA1 47 48
69 68 R1396 1 2 0_0402_5% CL_RST1#_R 49 50 1
GND2 GND1 <16> CL_RST1# 49 50
51 52 @ C364
53 51 52 54
LOTES_APCI0018-P002A 22P_0402_50V8J
+3V_AOAC G1 G2
20121024 HP's request 2
2 2
BELLW_80003-1023
1
20120713 Add for ESD's request
R85
D8 10K_0402_5%
U5 <18> WWAN_TRANSMIT_OFF# 1 2 M_WXMIT_OFF#
2
1 6 BT_ON
CH1 CH4 RB751V-40_SOD323-2
2 5 +3V_WWAN
Vn Vp +3VDS
1
3 4 D
CH2 CH3
2 Q28
@ S DIO(BR) NUP4301MR6T1 TSOP-6 +3V_WWAN <14> BT_OFF
G 2N7002K_SOT23-3
2
R81 S
D9
3
@ DAN217T146_SC59-3
JSIM1 CONN@ 3 10K_0402_5% WLAN&BT Combo module circuits
5 1 UIM_PWR 1
UIM_VPP 6 GND VCC 2 UIM_RST 2 BT BT
<39> UIM_VPP
1
UIM_DATA 7 VPP RST 3 UIM_CLK on module on module
SIM_DET 4 I/O CLK
NC 1 04/23 HP Enable Disable
18P_0402_50V8J
C76
3
S
R84 G
1 2 2 Q27
4.7U_0805_10V4Z
0.1U_0402_10V6K
<30> WWAN_DISABLE
2 BT_CRTL HI LO
C77
C78
9 SI2305CDS-T1-GE3_SOT23-3
1 1
0.1U_0402_10V6K
GND 8 220K_0402_1%
+3V_WWAN
C79
GND
1
02/13 HP 1
R83
D
BT_ON# LO HI
1
@ 47K_0402_5% @ 2 2
+3VDS @
2 7W
2
HB_5680629-SICR11
3 3
+3VDS
UIM_PWR 20120719 HP's request
R457 200K_0402_5% R458
Mini Card Power Rating 1 2 1 2
WLAN_DISABLE <30>
Power Primary Power (mA) Auxiliary Power (mA) 0_0402_5%
Peak Normal Normal
1
+3VS 1000 750 R90
1K_0402_5% +3VDS
20121025 Delete R89 as HP's request +3V 330 250 250 (wake enable)
2
+1.5VS 500 375 5 (Not wake enable) 1 2
+3V_AOAC
2
@C85
@ C85 0.047U_0402_16V7K
+3VS
G
WL/BT_LED# 20120719 HP's request
WL/BT_LED# <39> 1 3 +3VDS
S
0.1U_0402_16V4Z
6
1
3
47K C86
Q29 Q4A Q30
DTA114YKAGZT146_SOT23-3 BT_ON 2 DMN66D0LDW-7_SOT363-6 AO3413L_SOT23-3
2 2 20120801 Change to uninstall as HP's request
WL_LED# 10K
20121106 Delete Q68 & R459 and change R458 to 0 Ohm as HP's request
1

20120731 HP's request 20121025 HP's request
3
1
Q4B
WL_LED 5
4 4
4
1
WW_LED# 2 10K
WL_LED R94 1 2 100K_0402_5% Security Classification Compal Secret Data
Title
Compal Electronics, Inc.
2012/06/11 2013/06/11
47K
Q31 Issued Date Deciphered Date
3
DTA114YKAGZT146_SOT23-3
WWAN/NAND mini
+3VS DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-9371P 0.3
A B C D E
5 4 3 2 1
Notes:
Keep PVDD supply and speaker traces routed on the DGND plane.
Keep away from AGND and other analog signals
+3VS +AVDD_CODEC If Sense_A total length is greater than

+3VS
PLACE CLOSE TO U1 PIN 13 6 inches, chagne C12 to 0.1uF
Place AVDD ,PVDD,and DVDD capacitor close to Codec
+5VS
D D
RA3 1 2 2.49K_0402_1% +AVDD_CODEC
CA8,CA10 near UA5 PIN45
0.1U_0402_25V6
0.1U_0402_25V6 2 1 1 1 SENSE_A CA1 1 2 1000P_0402_50V7K
0.1U_0402_25V6
1U_0402_6.3V6K
1U_0402_6.3V6K
CA9,CA21 near UA5 PIN39
CA4
1 1
CA3
CA6
CA7
CA2 CA5
10U_0603_6.3V UA1
1 2 2 2 SENSE_B RA4 1 2 2.49K_0402_1%
10U_0603_6.3V6M
10U_0603_6.3V6M
0.1U_0402_25V6
0.1U_0402_25V6
2 2 +AVDD_CODEC
1 27 1 1 1 1
DVDD_CORE AVDD1 38
CA9
CA10
AVDD2 1 2 1000P_0402_50V7K
CA11
CA12
CA13 If Sense_B is un-used, then pull high
3 45
DVDD_IO PVDD1 39 2 2 2 2
PLACE CLOSE TO U1 PIN 14 @ Sense_B to AVDD by 10Kohm resistor
PVDD2
CA8 9 13 SENSE_A
DVDD SENSE_A SENSE_A <27>
22P_0402_50V8J 14 SENSE_B
SENSE_B SENSE_B <27>
HDA_BITCLK_AUDIO 1 RA9 2 1 2
28
HP0_PORTA_L DOCK_HP_L_CODEC <27>
@ 33_0402_5% @ 29 External MIC
HP0_PORTA_R DOCK_HP_R_CODEC <27>
23
HDA_BITCLK_AUDIO 6 VREFOUT_A
<13> HDA_BITCLK_AUDIO HDA_BITCLK 31 HP_OUT_L
Combo Jack
HP1_PORTB_L HP_OUT_L <39>
<13> HDA_SDOUT_AUDIO HDA_SDOUT_AUDIO 5 32 HP_OUT_R Headphone
HDA_SDO HP1_PORTB_R HP_OUT_R <39>
<13> HDA_SYNC_AUDIO HDA_SYNC_AUDIO 10 19

HDA_SYNC PORTC_L EXT_MIC_L <39>
20
PORTC_R EXT_MIC_JACK <27,39>
HDA_SDI0 2 1 SDIN_CODEC 8 24
<13> HDA_SDI0 HDA_SDI VREFOUT_C/GPIO4 VREFOUT_MIC_JACK <27> 20120702 Delete MIC_SENSE# circuit
33_0402_5% RA11
<13> HDA_RST_AUDIO# HDA_RST_AUDIO# 11 15
HDA_RST# PORTE_L 16
C DH1 1 2 EAPD_L PORTE_R C
<30> EC_MUTE#
17 DOCK_LI_L_CODEC
PORTF_L DOCK_LI_L_CODEC <27>
RB751V-40_SOD323-2 18 DOCK_LI_R_CODEC
PORTF_R DOCK_LI_R_CODEC <27>
+3VS RA27 1 2 10K_0402_5% 47
EAPD 40 SPKL+
SPK_PORTD_+L SPKL+ <27>
<22> D_MIC_CLK
D_MIC_CLK RA12 2 1 100_0402_5% D_MIC_CLK_L_C 2 41 SPKL-
DMIC_CLK/GPIO1 SPK_PORTD_-L SPKL- <27>
<22> D_MIC_DATA
D_MIC_DATA RA14 2 1 0_0402_5% D_MIC_DATA_C 4 Internal SPKR(front stereo speaker)
DMIC0/GPIO2 44 SPKR+
SPK_PORTD_+R SPKR+ <27>
REC_MUTE_LED_CTRL 48 43 SPKR-
SPDIFOUT0/GPIO3 SPK_PORTD_-R SPKR- <27>
<39> MUTE_LED_CNTR MUTE_LED_CNTR 46
DMIC1/GPIO0/SPDIFOUT1 25
MONO_OUT
36 12 MONO_INR 2 1 MONO_IN
CAP+ PCBEEP
2
1 CA14 0.1U_0402_25V6
RA16 CA15
4.7U_0603_6.3V6K 21
10K_0402_5% VREFFILT 22
2 35 CAP2 34
1
CAP- V- 37
VREG(+2.5V)
7
10U_0603_6.3V6M
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
+3VS DVSS
1 1 1 1
1U_0402_6.3V6K
42 26
CA16
CA21
PVSS AVSS1 30
CA18
AVSS2 20120702 Delete MUTE circuit
49 33
CA19
PAD AVSS3 2 2 2 2
1
RA13 @ 92HD91B2X5NLGXWCX8_QFN48_7X7
4.7K_0402_5%
B B
Place C209,C210,CA87,CA89 close to Codec
2
HDA_RST_AUDIO#
1 20120920 HP's request

+AVDD_CODEC
CA20 @
0.01U_0402_16V7K
2
1
RA17 +AVDD_CODEC
10K_0402_5%
+5VS UA2
REC_MUTE_CTRL_KB <38> 5
RA18 W=40Mil
2
CA22 1 VOUT
1 2 1 2 MONO_IN VIN
4
CA23 @1 2 0.1U_0402_25V6 0.1U_0402_25V6 100K_0402_5% 1 2 3 BYPASS
2N7002KW_SOT323-3
0.1U_0402_25V6
EN
1
D RA20 1
CA24 @1 2 0.1U_0402_25V6 2
CA28
2 2
680P_0603_50V7K
REC_MUTE_LED_CTRL 10K_0402_5% GND
1
G 1 C87
1
CA25 @1 2 0.1U_0402_25V6 D
S 1 1 HPA01085DBVR SOT23 5P CA29
QA1
1
HDA_SPKR 2 RA19 2
3
Q171 <13> HDA_SPKR C88 10U_0805_10V6K
2
CA27 @1 2 0.1U_0402_25V6 G CA26 1
2
2N7002KW_SOT323-3 CA31
S 10K_0402_5%
SB Beep 0.01U_0402_16V7K 680P_0603_50V7K 0.1U_0402_25V6
3
2
CA30 @1 2 0.1U_0402_25V6 RA28 2
2
10K_0402_5%
A RA21 1 2 0_0805_5% A
1
GND GNDA Security Classification Compal Secret Data Compal Electronics, Inc.
RA53 need under or near UA1 Audio IDT 92HD91
Custom 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-XXXXP
5 4 3 2 1
5 4 3 2 1
RA22
Speaker Connector <26> VREFOUT_MIC_JACK

JSPKR1
6 2.2K_0402_5%
5 G6 LA3
SPKR+ 4 G5 2 1 EXT_MIC_L2
<26,39> EXT_MIC_JACK
1U_0402_6.3V6K
<26> SPKR+ 3 4 EXT_MIC_L2 <39>
SPKR-
<26> SPKR- 3
SPKL+ 2 1 BLM18AG601SN1D_2P
<26> SPKL+ 1 2
SPKL-
<26> SPKL- 1 C89
ACES_50273-0040N-001 1
2
2200P_0402_50V7K
2200P_0402_50V7K
2200P_0402_50V7K
2200P_0402_50V7K
CONN@
1 1 1 1 CA36
220P_0402_50V7K
2
CA32
CA33
CA34
CA35
D D
2 2 2 2
20120713 Delete DA1 for ESD
2
3
2
1
1
DA2 @
@ DA3
3.3_0402_5%
3.3_0402_5%
3.3_0402_5%
3.3_0402_5%
RA25
RA23
RA26
RA24
YSDA0502C C/A SOT-23
1
1
1
20120713 Change P/N for ESD's request
2
2
YSDA0502C C/A SOT-23
Need place near Audio Codec (UA5)
20120713 Move to S/B

DOCK Audio
C C
20120702 Change C91/C94 to 2.2uF as specified.

20121025 Change C91/C94 to 150uF as IDT's request
C91 LA6
R97
1 2 1 2 2 1
+
<26> DOCK_HP_L_CODEC DLINE_OUT_L <33>

30_0402_1%
BLM18AG601SN1D_2P
150U_B2_6.3VM_R45M
C94 LA7
R98
1 2 1 2 2 1
+
<26> DOCK_HP_R_CODEC DLINE_OUT_R <33>

30_0402_1%
BLM18AG601SN1D_2P
150U_B2_6.3VM_R45M
20121011 IDT's suggestion 1 1
1
CA39 CA40
220P_0402_50V7K 220P_0402_50V7K
20K_0402_1% 20K_0402_1% 2 2
R100 R101
2
CC53 R102
<26> DOCK_LI_L_CODEC 1 2 1 2 DOCK_LINE_IN_L
DOCK_LINE_IN_L <33>
2.2U_0402_6.3V6M 6.2K_0402_1%
B CC54 B
R104
<26> DOCK_LI_R_CODEC 1 2 1 2 DOCK_LINE_IN_R
DOCK_LINE_IN_R <33>
2.2U_0402_6.3V6M 6.2K_0402_1%
1
20121102 Move to S/B

@ R106 R107 @
2K_0402_5% 2K_0402_5%
2
20121011 IDT's suggestion
R167
1 2 SENSE_B <26>
<39> HP_SENSE# SENSE_A <26>
20K_0402_1%
1
R108
39.2K_0402_1% 20K_0402_1%
R109
20121102 for N.O. type
6 2
3 2
20121011 IDT's suggestion Q6A Q6B

2 DMN66D0LDW-7_SOT363-6 5
<33> DOCK_HPS# <33> LINE_IN_SENSE DMN66D0LDW-7_SOT363-6
1
1
1
100K_0402_5% 100K_0402_5%
R110 R111
2
A A
20121011 IDT's suggestion 20121011 IDT's suggestion

Audio SPK Conn/Jack/MIC
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 0.3
LA-9371P
5 4 3 2 1
5 4 3 2 1
+3VS +3VS +3VDS
TPM1.2 ACCELEROMETER
1
+3VS
1
1
9656@ 9656@ R113 R114
R112 0_0402_5% 0_0402_5%
0.1U_0402_16V4Z R1357 9656@ 9635@
1
0_0402_5% 0_0402_5%
1 1 1
2
C98 C99 C100 RH219
2
2
20120810 1 Base I/O Address 10K_0402_5%
0.1U_0402_16V4Z HP's request C101 0 = 02Eh +3VS
2 2 2 for * 1 = 04Eh
2
0.1U_0402_16V4Z ST33TPM12 0.1U_0402_16V4Z
24
19
10
1
U8 2
R115 +3VS ACCEL_INT#
VDD
VDD
VDD
VDD
D ACCEL_INT# <14> D
9635@
4.7K_0402_5% 20121024 HP's request
LPC_LAD0 26 28 LPC_PD#_TPM U9
<16,25,30,32> LPC_LAD0
2
LPC_LAD1 23 LAD0 NC 9 BADD 1 9 +3VS
<16,25,30,32> LPC_LAD1 LPC_LAD2 20 LAD1 TESTB1/LRESET# 8 Vdd_IO INT2 11
<16,25,30,32> LPC_LAD2 LAD2 TEST1 INT1
1
LPC_LAD3 17 R116 4 14
<16,25,30,32> LPC_LAD3 LAD3 <11,12,13,16,38,5> DDR_XDP_WAN_SMBCLK 6 SCL/SPC VDD
@ 4.7K_0402_5%
<11,12,13,16,38,5> DDR_XDP_WAN_SMBDAT SDA/SDI/SDO
1
14 TPM_XTALO R117 7 5
NC 13 TPM_XTALI 2 1 8 SDO/SA0 GND 12
SLB9656TT1.2 NC 9635@
+3VS
R118 10K_0402_5% CS GND 10
2
21 4.7K_0402_5% RES 13
<15> CLK_PCI_TPM LCLK RES 1 1
1
22 2 2 15 C103
<16,25,30,32> LPC_LFRAME# T108 PAD @
2
PLT_RST# 16 LFRAME# NC 6 R121 3 NC RES 16 C104
<13,14,25,29,30,35,37,39,5> PLT_RST# 27 LRESET# GPIO T109 PAD @ NC RES
0_0402_5% 0.1U_0402_16V7K 10U_0603_6.3V6M
<16,30,32> SIRQ PM_CLKRUN#_TPM 15 SERIRQ 1 2 2
C102 HP3DC2
1 2 7 TEST NC 3 22P_0402_50V8J
+3VS
2
R119 PP NC 12 CLK_PCI_TPM 1 R120 2 1 2
GND
GND
GND
GND
NC
1
@ 4.7K_0402_5%
1
1
R122 @ 33_0402_5% @
@ R123 SLB9656TT1.2_TSSOP28 R124
4
11
18
25
0_0402_5% 0_0402_5%
0_0402_5%
2
20120810 HP's request for ST33TPM12

@
1
2
2
20120706
R1358 9635@ 18P_0402_50V8J
+3VS TPM_XTALI C105 1 2
0_0402_5%
1
9656@
2
1
2
@ R127
R126 9635@ Y1 9635@
4.7K_0402_5% 32.768KHZ_12.5PF_FC-135
1
C C
2
TPM_XTALO C106 1 2 9635@

LPC_PD#_TPM 10M_0402_5%
18P_0402_50V8J
9656@ 20120703 Delete LED1

PLT_RST# R129 2 1 0_0402_5% BADD
R177
Finger printer
1 2 PM_CLKRUN#_TPM +3VS
<14,30,32> PM_CLKRUN#
0_0402_5%
1
9635@ C107
0.1U_0402_16V4Z
2
JFP1
1 2
R131 20_0402_5%1
0_0402_5% USB20_N8_R 3 1 2 4
<17> USBP8- 3 4
<17> USBP8+ R130 20_0402_5%1
0_0402_5% USB20_P8_R 5 6
7 5 6 8
FPR_LOCK# 9 7 8 10
<18> FPR_LOCK# FPR_OFF 11 9 10 12
TPM BOM Option (Not Install) <16> FPR_OFF 11 12
3
B ACES_85203-0602N-10 B
SLB9635 R112, R113, R129
D11 CONN@
SLB9656 R114, R115, R117, R126, R177, C105, C106, Y1 20120907 Change JFP1's footprint
SCA00000U10
R113, R129,R114, R115, R117, R126, R177, R1357,
ST33TPM12 R1358,R127,R122,R116,R120, C102, C101, C105, C106, Y1 YSLC05CH_SOT23-3
1
20120713 Change P/N for ESD's request
A A

TPM/Gsensor
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-9371P 0.3
5 4 3 2 1
1 2 3 4 5
+3VM_LAN +3VM_LAN
Q34 +3VDS
W=60mils
2N7002K_SOT23-3
2
R157
R128 LED_LINK_LAN#_R 1 3 1 2 DOCK_LED_LINK_LAN# 20121026 HP's request
1
D
S
10U_0603_10V6M
22U_0603_6.3V6M
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1U_0402_6.3V6K
4.7K_0402_5%
1 1 1 1 1 0_0402_5% R376 +3VM_LAN
C109
C108
C110
C370
2 1
C369
G
10K_0402_5%
20120719 Change R128 to 4.7K as HP's request
0.1U_0402_16V4Z
B
0.1U_0402_16V4Z
2
2
2 2 2 2
R1397 1 1
SLP_LAN
C426
1 2 1 3 LANWAKE#_R <34> SLP_LAN
<18> LANWAKE#
C425
C
E
0_0402_5% LAN_DIS#
Q177
6
20120719 HP's request @ R1356 MMBT3904_SOT23-3 +3VM_LAN 2 2
AMT@
1 2
<25,30> KBC_WAKE# Q7A
A A
0_0402_5% 20121025 HP's request 2
<14,30> SLP_LAN# DMN66D0LDW-7_SOT363-6
20121108 follow Viper
4/6 U10 footprint need check
56
50
38
27
18
10
1
4
U43
VDD6
VDD5
VDD4
VDD3
VDD2
VDD1
VDD0
U10 48 DOCK_MDI0-
0B1 47 DOCK_MDI0+
LAN_MDIN0 2 1B1
48 13 LAN_MDIP0 A0 43 DOCK_MDI1-
<15> CLK_PCIE_LAN_REQ1# 36 CLK_REQ_N MDI_PLUS0 14 2B1
<13,14,25,28,30,35,37,39,5> PLT_RST# LAN_MDIN0 LAN_MDIP0 3 42 DOCK_MDI1+
PE_RST_N MDI_MINUS0 A1 3B1
<15> CLK_PCIE_LAN
44 17 LAN_MDIP1 37 DOCK_MDI2-
45 PE_CLKP MDI_PLUS1 18 LAN_MDIN1 4B1
<15> CLK_PCIE_LAN# PE_CLKN MDI_MINUS1 LAN_MDIN1 7 36 DOCK_MDI2+
PCIE
A2 5B1
MDI
C115 1 2 0.1U_0402_10V7K PCIE_PRX_DTX_P6_C 38 20 LAN_MDIP2 LAN_MDIP1 8 32 DOCK_MDI3-
<17> PCIE_PRX_DTX_P6 PETp MDI_PLUS2 A3 6B1
C116 1 2 0.1U_0402_10V7K PCIE_PRX_DTX_N6_C 39 21 LAN_MDIN2 31 DOCK_MDI3+
<17> PCIE_PRX_DTX_N6 PETn MDI_MINUS2 7B1
<17> PCIE_PTX_C_DRX_P6
41 23 LAN_MDIP3 LAN_MDIN2 11 22 DOCK_LAN_ACT#
42 PERp MDI_PLUS3 24 LAN_MDIN3 A4 0LED1 DOCK_LAN_ACT# <33>
<17> PCIE_PTX_C_DRX_N6 PERn MDI_MINUS3 23 DOCK_LED_LINK_LAN# DOCK_LED_LINK_LAN# <33>
LAN_MDIP2 12 1LED1 52
6 20120711 HP's request A5 2LED1
SVR_EN_N
46 MB_MDI0-
1 1 2 LAN_MDIN3 14 0B2 45 MB_MDI0+
RSVD1_VCC3P3 +3VM_LAN
SMBUS
LAN_SMBCLK 28 47K_0402_5% A6 1B2
<16> LAN_SMBCLK 31 SMB_CLK 5
LAN_SMBDATA R145 LAN_MDIP3 15 41 MB_MDI1-
<16> LAN_SMBDATA SMB_DATA VDD3P3_IN A7 2B2
20120807 HP's request 40 MB_MDI1+
20121016 HP's request 4 3B2
LANWAKE#_R 2 VDD3P3_4 15
LANWAKE_N VDD3P3_15 <33,36> DOCK_ID DOCK_ID 17 35 MB_MDI2-
19 SEL 4B2 34 MB_MDI2+
LAN_DIS# 3 VDD3P3_19 29 C117 1 2 1000P_0402_50V7K 5B2
<18> LAN_DIS# LAN_DISABLE_N VDD3P3_29
20120711 HP's request LAN_ACT# 19 30 MB_MDI3-
20121026 HP's request LED_LINK_LAN#_R 20 LED0 6B2 29 MB_MDI3+
LED_LINK_LAN#_R 26 8 54 LED1 7B2
<13,17> LED_LINK_LAN#_R 27 LED0 VDD0P9_8 11 LED2
LAN_ACT# 25 MB_LAN_ACT#
LED
B 25 LED1 VDD0P9_11 16 0LED2 B
LED2 VDD0P9_16 5 26 MB_LED_LINK_LAN#
+1.05VM_LAN NOTE: L : A-->B1 (DOCK) NC 1LED2 51
22 57 2LED2
32 VDD0P9_22 H: A-->B2 (M/B) PAD_GND
T110 JTAG_TDI
GND10
GND11
GND12
GND13
34 37
GND0
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
T111
JTAG
R154 1 @ 2 10K_0402_5% LAN_JTAG_TMS 33 JTAG_TDO VDD0P9_37
+3VM_LAN JTAG_TMS
R155 1 @ 2 10K_0402_5% LAN_JTAG_TCK 35 40
JTAG_TCK VDD0P9_40 43
VDD0P9_43 PI3L500-AZFEX_TQFN56_11X5
1
6
9
13
16
21
24
28
33
39
44
49
53
55
46
XTAL2 9 VDD0P9_46 47
XTAL1 XTAL_OUT VDD0P9_47
XTAL1 10
XTAL_IN
XTAL2
L15
R158 1 2 1K_0402_5% 30 7 1 2
TEST_EN CTRL_0P9 4.7UH +-5% NLC252018T-4R7J-N
R159 1 2 3.01K_0402_1% 12 49
10U_0402_6.3V6M
47U_0805_6.3V6M
RBIAS CTRL_0P9
0.1U_0402_16V4Z
1 1 @ 1 DOCK_ID R1401 1 2 10K_0402_5%
+3VM_LAN
C428
1
C350
C351
C124 1 1 CLARKVILLE WGI217LM
C125 20121106 HP's request
IN
NC OUT
33P_0402_50V8J 33P_0402_50V8J 2 2 2 20121108 Install R1401 HP's request

Y2
2 2
NC

25MHZ 18PF_CRG3202518
2
20120927
TS1
MB_MDI0+ 1 24 MB_MDO0+
TD1+ TX1+
+3VM_LAN
MB_MDI0- 2 23 MB_MDO0-
TD1- TX1-
+V_MB_DAC 3
TDCT1 TXCT1
22 R160
R161
1
1
2
2
75_0402_5%
75_0402_5% RJ-45 CONN.
1
10K_0402_5%
R136
C C
+V_MB_DAC 4 21 R162 1 2 75_0402_5%
TDCT2 TXCT2 R163 1 2 75_0402_5%
C371 1 2 0.1U_0402_16V4Z
MB_MDI1+ 5 20 MB_MDO1+
TD2+ TX2+ JRJ45 CONN@
C120 1 2 0.01U_0402_16V7K 20120719 HP's request 10
MB_MDI1- 6 19 MB_MDO1- +3VM_LAN
2
TD2- TX2- 2 Orange LED+
C121
C372 1 2 0.1U_0402_16V4Z MB_MDI2+ 7 18 MB_MDO2+ SE120102K90 MB_LAN_ACT# R138 1 2 300_0603_5% MB_LAN_ACT#_R 9
TD3+ TX3+ Orange LED- 13
1000P_1808_3KV SHLD1
C373 1 2 0.1U_0402_16V4Z MB_MDI2- 8 17 MB_MDO2- 1 MB_MDO3- 8
TD3- TX3- 1 2 PR4-
3
1 1 @ 680P_0402_50V7K C114 MB_MDO3+ 7

C374 1 2 1U_0402_6.3V6K +V_MB_DAC 9 16 C122 C123 PR4+
TDCT3 TXCT3
D13 @ 6
1
20120719 HP's request +V_MB_DAC 10 15 0.1U_0402_16V4Z 4.7U_0603_6.3V6K MB_MDO1-

TDCT4 TXCT4 2 2 PR2-
SCA00000U10 L16
MB_MDI3+ 11 14 MB_MDO3+ MB_MDO2- 5
TD4+ TX4+ PR3-
YSLC05CH_SOT23-3
MB_MDI3- 12 13 MB_MDO3- MB_MDO2+ 4
TD4- TX4- PR3+
100UH_SSC0301101MCF_0.18A_20%
2
MB_MDO1+ 3
1
PR2+
MHPC_NS692417
20120713 Change P/N for ESD's request MB_MDO0- 2
TS2 PR1-
DOCK_MDI0+ 1 24 DOCK_MDO0+
TD1+ TX1+ DOCK_MDO0+ <33> MB_MDO0+ 1
R144 1 2 10K_0402_5% PR1+ 14
DOCK_MDI0- 2 23 DOCK_MDO0- +3VM_LAN SHLD2
TD1- TX1- DOCK_MDO0- <33> 12
+3VM_LAN Green LED+
+V_DOCK_DAC 3 22 R1402 1 2 75_0402_5%
TDCT1 TXCT1 MB_LED_LINK_LAN# R150 1 2 300_0603_5% MB_LED_LINK_LAN#_R 11
R1403 1 2 75_0402_5% Green LED-
+V_DOCK_DAC 4 21 R1404 1 2 75_0402_5%
TDCT2 TXCT2 1 2 SUYIN_100065HR012M212ZL
R1405 1 2 75_0402_5%
2
C429 1 2 0.1U_0402_16V4Z @ 680P_0402_50V7K C118
TD2+ TX2+ DOCK_MDO1+ <33>
C430 1 2 0.01U_0402_16V7K D12 @
DOCK_MDI1- 6 19 DOCK_MDO1- 2
TD2- TX2- DOCK_MDO1- <33>
C432 SCA00000U10
C431 1 2 0.1U_0402_16V4Z DOCK_MDI2+ 7 18 DOCK_MDO2+ SE120102K90
D TD3+ TX3+ DOCK_MDO2+ <33> YSLC05CH_SOT23-3 D
1000P_1808_3KV
C433 1 2 0.1U_0402_16V4Z DOCK_MDI2- 8 17 DOCK_MDO2- 1
TD3- TX3- DOCK_MDO2- <33>
3
1 1
2 1U_0402_6.3V6K
1
C434 1 +V_DOCK_DAC 9 16 C435 C436
TDCT3 TXCT3
D50 @ 20120713 Change P/N for ESD's request
1
+V_DOCK_DAC 10 15 0.1U_0402_16V4Z 4.7U_0603_6.3V6K

TDCT4 TXCT4 L35 2 2
SCA00000U10
TD4+ TX4+ DOCK_MDO3+ <33>
DOCK_MDI3- 12
TD4- TX4-
13 DOCK_MDO3-
DOCK_MDO3- <33>
YSLC05CH_SOT23-3 Security Classification Compal Secret Data Compal Electronics, Inc.
100UH_SSC0301101MCF_0.18A_20% Issued Date 2012/06/11 Deciphered Date 2013/06/11 Title
2
1
MHPC_NS692417 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Intel 82566 Nineveh
LA-9371P 0.3
20121108 Add 2nd transformer for Docking as HP's request MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
1 2 3 4 5
1 2 3 4 5
20120713 Change by HP request +3VDS
+3VDS
20120912 Change RP1 and RP2 to 100K ohms. +RTCVCC 20120908 Delete R216
LPC Debug Port
Layout note: Close to PIN106


20120709 Add by HP request.
20120718 Install R215/Uninstall R216 20120710 Change R537 to 10K
RP1
8 1 20121016 Connect R215.2 to GND 20120803 Change R537 to 4.7K as HP's request B+
KSI1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C179
C180
C181
C182
C183
C184
C185
7 2 KSI0 1 1 1 1 1 1 1 20120925 Delete R537, Q73, D21 as HP's request
6 3 KSI3 JTAG_RST# 1 2
5 4 KSI2 R215 100K_0402_5%
100K_0804_8P4R_5% 2 2 2 2 2 2 2
JP6
RP2 20120713 Change by HP request 1
1 8 KSI7 2 Ground
<15> CLK_PCI_DEBUG_KBC 3 LPC_PCI_CLK
2 7 KSI6
3 6 KSI5 +RTCVCC LPC_LFRAME# 4 Ground
4 5 KSI4 SIRQ 5 LPC_FRAME#
6 +V3S
<13,14,25,28,29,35,37,39,5> PLT_RST# LPC_RESET#
A 100K_0804_8P4R_5% NMI_SMI_DBG# 7 A
+V3S
106
119
20120912 Delete R543 Layout note: 2vias to GND LPC_LAD0 8
68
58
84
14
37
49
20121016 Delete R218 U17 20121016 Delete C186 LPC_LAD1 9 LPC_AD0
20120718 Install R218/Uninstall R219 PCH_SPI_SI 128 15 C187 1 2 4.7U_0603_10V6K LPC_LAD2 10 LPC_AD1
+3VDS
*VBAT
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
*JTAG_RST#
<16> PCH_SPI_SI 127 FLDATAOUT CAP 11 LPC_AD2
20120908 Delete R219 PVT_MOSI LPC_LAD3
PCH_SPI_CS0# 97 *PVT_MOSI/GPIO54 93 SIO_SLP_A# 20120725 HP's request 12 LPC_AD3
R496 1 2 10K_0402_5% KSO0 <16> PCH_SPI_CS0# FLCS0# *GPIO145 SIO_SLP_A# <14,31,45> VCC_3VA
PVT_CS# 96 100mA 2mA 98 R222 1 2 0_0402_5% TX_STBY_LED# 13
R497 1 2 10K_0402_5% KSO1 *PVT_CS0#/GPIO146 *GPIO157/BC_CLK SUS_PWR_ACK <14> PWR_LED#
PCH_SPI_SO 95 99 AC_PRES_OUT 8051RX_CAPLED# 14
R498 1 2 10K_0402_5% KSO2 <16> PCH_SPI_SO FLDATAIN *GPIO160/BC_DAT AC_PRES_OUT <14,35> CAPS_LED#
PVT_MISO 94 100 KBC_PWR_ON 8051_RECOVER#/_NUM_LOCK_LED# 15
R499 1 2 10K_0402_5% KSO3 *PVT_MISO/GPIO164 *GPIO161/BC_INT# KBC_PWR_ON <34,43> VCC1_PWRGD_SUS# NUM_LED#
126 KBC_WAKE# R1389 1 2 4.7K_0402_5% 16
PAD T121 @ KSO4 20120713 Change by HP request *GPIO24/I2C3_CLK0 KBC_WAKE# <25,29> VCC1_PWRGD
KSO5
125 CHRG_RST KSO0 R237 1 @ 2 15_0402_5% 17
PAD T122 @ <38> KSO[0..13] *GPIO25/I2C3_DAT0 CHRG_RST <42> SPI_CLK
KSO0 21 20121016 Rename to KBC_WAKE#
& CHRG_RST KSO1 R235 1 2 15_0402_5% 18
KSO0 @ SPI_CS#
KSO1 20 124 R227 1 2 10K_0402_5% 20121016 Change R227 to 10K Ohm KSO3 R234 1 2 15_0402_5% 19
19 KSO1 *GPIO66 NMI_SMI_DBG# <14> @ SPI_SI
KSO2 20121023 R1392 1 @
2 4.7K_0402_5% KSO2 R233 1 2 15_0402_5% 20
18 KSO2 123 SIO_SLP_SUS# <14> 1 @ 2 15_0402_5% 21 SPI_SO
+3VS KSO3 FET_A JTAG_RST# R231
D44 KSO3 *GPIO44 FET_A <50> @ SPI_HOLD#
KSO4 17 122 KBRST# D21 1 2 RB751V-40_SOD323-2 22
+3VS 3 KSO4 *GPIO135/KBRST PM_APWROK <14,31> +3VDS Reserved
Keyboard/Mouse Interface
PS2_CLK KSO5 16 121 FAN_PWM 20121016 HP's request 20120925 HP's request 23
4.7K_0804_8P4R_5% 13 KSO5 *GPIO34/TACH2PWM_OUT 120 FAN_PWM <24> 24 Reserved
KSO6 BAT_GRNLED# 20121016 HP's request
1 8 TP_CLK 1 KSO6 *GPIO133/PWM0 BAT_GRNLED# <13,39> Reserved
General Purpose I/O Interface

KSO7 12 118 KBD_PWM_LED
2 7 KSO7 *GPIO136/PWM2 KBD_PWM_LED <38>
SMSC_1322-NU_TQFP-128P
TP_DATA KSO8 10
3 6 SP_CLK 2 PS2_DATA KSO9 9 KSO8 107 CPPWR_EN 20120713 Delete R236
ACES_87216-2404_24P
4 5 SP_DATA KSO10 8 KSO9 *GPIO30 79 CPPWR_EN <39>
+1.05VS CONN@
KSO11 7 KSO10 VREF_PCEI 80 H_PECI_R R238 1 2 43_0402_1%
RP3 BAT54CW_SOT323-3 KSO11 *GPIO131/PECI_DATA H_PECI <5>
KSO12 6 81 SLP_S3#
5 *KSO12/GPIO5 *GPIO7/KSO14 83 SLP_S3# <14,31,34,39,44>
D45 KSO13 8051_RECOVER#/_NUM_LOCK_LED#
4.7K_0804_8P4R_5% *KSO13/GPIO6 *GPIO10/KSO15 8051_RECOVER#/_NUM_LOCK_LED# <38>
3 KBD_DATA
20121020 R1388 1 2 470_0402_5%
PM_RSMRST# <13,14>
PLT_SEL R252 1 2 10K_0402_5%
1 8 PS2_CLK 85 20120719 Install R541 and R542 for NFC function
<38> KSI[0..7]
RSMRST#_EC R1348 1 @ 2 0_0402_5%
2 7 PS2_DATA KSI0 29 OUT1/RSMRST# 86 NFC_UART_RX_R R541 1 2 0_0402_5% PCH_SPI_WP# <16> 20120725 add R1348 & R1349 for Quad I/O SPI support CHRG_RST R243 1 2 100K_0402_5%
3 6 KBD_DATA 1 KSI0 *GPIO162/RXD NFC_UART_RX <39> 20120818 Delete R1348 & R1349 and Add R541 and R542
KSI1 28 87 PLT_SEL R542 1 2 0_0402_5%
4 5 KBD_CLK KSI1 *GPIO165/TXD/HSD_CS1# NFC_UART_TX <39> 20121016 HP's request
KSI2 27 R1349 1 @ 2 0_0402_5%
2 KBD_CLK KSI2 PCH_SPI_HOLD# <16>
KSI3 26 88 PCH_KBC_I2CDAT
RP4 25 KSI3 *GPIO23/I2C1_DAT0 89 PCH_KBC_I2CDAT <16,35> +3VDS
KSI4 PCH_KBC_I2CLK
KSI5 24 KSI4 *GPIO22/I2C1_CLK0 90 KBC_PROC_HOT# 20121016 Delete R239,R240 PCH_KBC_I2CLK <16,35>
BAT54CW_SOT323-3 KBC_PROC_HOT# <24,5>
KSI6 23 KSI5 *GPIO21/I2C2_DAT0 91 EC_MUTE# 20120908 Delete R241, R242
20120720 for HP's request
KSI7 22 KSI6 *GPIO20/I2C2_CLK0 92 MAIN_BAT_DET# EC_MUTE# <26> KBC_WAKE# R245 1 2 100K_0402_5%
+RTCVCC
KSI7 *GPIO105/FAN_TACH1 101 TACH_FAN_IN
MAIN_BAT_DET# <41> ADP_EN R246 1 2 10K_0402_5%
*GPIO140/TACH2PWM_IN 102 PLT_DET TACH_FAN_IN <24>
20120713 Change by HP request TP_CLK 35 *GPIO45/A20M/PVT_CS#1 PLT_DET <14> VCC1_PWRGD_SUS# R248 1 2 200K_0402_5%
B <38> TP_CLK *IMCLK/GPIO51 20121016 HP's request B
103 KBD_CLK 8051TX_STBYLED# R1347 1 2 10K_0402_5%
61 *GPIO53/PS2CLK 105 KBD_CLK <33>
SP_CLK KBD_DATA
<38> SP_CLK SP_DATA 62 *GPIO50/KCLK *GPIO152/PS2DAT 4 ON/OFFBTN# KBD_DATA <33> TX_STBY_LED# R255 1 2 100K_0402_5%
1 <38> SP_DATA *GPIO65/KDAT *GPIO11/KSO16 ON/OFFBTN# <13,14,5> 20120725 HP's request 8051RX_CAPLED# R257 1 2 100K_0402_5%
PS2_CLK 66 74 ADP_PRES
<33> PS2_CLK PS2_DATA 67 *GPIO46/EMCLK *GPIO130 ADP_PRES <34,49> KBD_PWM_LED R259 1 2 10K_0402_5%
C188 <33> PS2_DATA *GPIO47/EMDAT KBC_PWR_ON R263 1 2 100K_0402_5%
1U_0402_6.3V6K
2
111 I2C_MAIN_DAT ON/OFFBTN_KBC# R268 1 2 10K_0402_5%
*I2C0_DATA0 112 I2C_MAIN_CLK I2C_MAIN_DAT <41,42> CHRG_ADP_DET R439 1 2 10K_0402_5%
*I2C0_CLK0 I2C_MAIN_CLK <41,42> PCH_KBC_I2CDAT R440 1 2 10K_0402_5%
Access Bus Interface PCH_KBC_I2CLK R441 1 2 10K_0402_5%
PM_CLKRUN# 55 109 I2C_BAY_DAT
<14,28,32> PM_CLKRUN# SIRQ 57 CLKRUN# *I2C0_DATA1 110 I2C_BAY_CLK I2C_BAY_DAT <41> LID_SW# R442 1 2 10K_0402_5%
<16,28,32> SIRQ
CLK_PCI_KBC 54 SER_IRQ *I2C0_CLK1 I2C_BAY_CLK <41> MAIN_BAT_DET# R443 1 2 10K_0402_5%
EC_XCLK2 <15> CLK_PCI_KBC
EC_SCI# 76 PCI_CLK Power Mgmt/SIRQ 73 ON/OFFBTN_KBC# TRAVEL_BAT_DET# R444 1 2 10K_0402_5%
<18> EC_SCI# EC_SCI# *GPIO110 ON/OFFBTN_KBC# <33,38> TACH_FAN_IN R445 1 2 10K_0402_5%
EC_XCLK1
108 KSO17 20120912 Delete R249,R251 ON/OFFBTN# R295 1 2 100K_0402_5%
Y4 @ *GPIO12/KSO17 KSO17 <39>
LPC_LAD3 51 59 OCP_PWM_OUT
1 2 <16,25,28,32> LPC_LAD3 LAD[3] *ADC_TO_PWM_OUT/GPIO41 OCP_PWM_OUT <18> 8051_RECOVER#/_NUM_LOCK_LED# R493 1 2 100K_0402_5%
LPC_LAD2 50 75 KBC_DS3_EN
<16,25,28,32> LPC_LAD2 48 LAD[2] *GPIO13 60 KBC_DS3_EN <44,5> PVT_CS# R546 1 2 100K_0402_5%
LPC_LAD1 PM_PWROK
Miscellaneous
<16,25,28,32> LPC_LAD1 LPC_LAD0 46 LAD[1] *nRESET_OUT#/GPIO121 78 ADP_ID_CHK PM_PWROK <14,5>
132.768KHZ_12.5PF_FC-135 1 <16,25,28,32> LPC_LAD0 LAD[0] LPC *GPIO141/PWM3 ADP_ID_CHK <49> 20120719 Change to ADP_ID_CHK as HP's request 20120718 HP's request
77 VCC1_PWRGD_SUS# 20120908 Delete R253
LPC_LFRAME# 52 Bus VCC1_RST# 38 EN_P1V5 20120912 Delete R256
C423 @ C424 @ <16,25,28,32> LPC_LFRAME# LFRAME# *ADC4/GPIO62 EN_P1V5 <33,39,43,44> +3VDS
10P_0402_25V8J KBC_SIO_RST# 53
10P_0402_25V8J <18,32> KBC_SIO_RST# LRESET#
2 2 69 EC_XCLK2 R500 1 2 0_0402_5%
*XTAL2 SUSCLK_KBC <14> 4.7K_0804_8P4R_5%
20120908 Delete R258/Uninstall R500 I2C_MAIN_CLK 1 8
70
*VSS_VBAT 20121020 Install R500 I2C_MAIN_DAT 2 7
EC_XCLK1 71 116 FET_B
20120908 HP's request *XTAL1 *GPIO163 113 FET_B <50> I2C_BAY_CLK 3 6
20120908 Delete R266 AMBER_BATLED#
20121020 Uninstall Y4,C423,C424 20120908 Delete R264 &R262 *nBAT_LED#/GPIO154 115 TX_STBY_LED# AMBER_BATLED# <39> I2C_BAY_DAT 4 5
20120718 Uninstall R266 *nPWR_LED#/GPIO156
A_GND
2 2200P_0402_50V7K C189 1 114
2 39 1 *GPIO155 8051RX_CAPLED# <38> RP5
<42> VOLTAGE_ADC *ADC3/GPIO61 20121016 Change R1378 to 100K and rename to iSCT_LED#
<50> LATCHED_ALARM 300_0402_5% 1
R267 iSCT_LED# <39>
PVT_SCLK 2 *GPIO36 41 iSCT_LED# R1378 1 2 100K_0402_5%
*PVT_SCLK/GPIO153 *GPIO206 +3VDS CPPWR_EN R274 1 2 10K_0402_5%
PCH_SPI_CLK R437 1 2 33_0402_5% PCH_SPI_CLK_EC 3 42 R270 1 2 300_0402_5% PM_PWROK R275 1 2 10K_0402_5%
<16> PCH_SPI_CLK WLAN_DISABLE 30 *SHD_SCLK/GPIO122 *ADC2/GPIO60 65 TRAVEL_BAT_DET# ADP_A_ID <49>
<25> WLAN_DISABLE *GPIO31 GPIO33 TRAVEL_BAT_DET# <41> RSMRST#_EC R276 1 2 10K_0402_5%
31 64 LID_SW# ADP_ID_CHK R278 1 2 10K_0402_5%
<42> CHRG_ADP_DET TP_DATA 32 *GPIO127 *GPIO27 63 ADP_EN LID_SW# <22,39>
C 20120713 Change by HP request 20120908 Delete R271 FET_A R279 1 2 100K_0402_5% C
<38> TP_DATA WWAN_DISABLE 33 *IMDAT/GPIO52 GPIO35 40 ADP_EN <42>
<25> WWAN_DISABLE +3VDS FET_B R280 1 2 100K_0402_5%
*PWRGD
SLP_LAN# 34 GPIO147 AVCC

<14,29> SLP_LAN# GPIO151 KBC_PROC_HOT# R446 1 2 100K_0402_5%
R272 1 2 300_0402_5% 43
AVSS
<42> CURRENT_ADC OCP_PWM_OUT R447 1 2 10K_0402_5%

VSS
VSS
VSS
VSS
VSS
VSS
VSS
R273 1 2 300_0402_5% 44 *ADC1/GPIO57

<49> OCP_A_IN *ADC0/ADC_TO_PWM_IN/GPIO56 KBC_DS3_EN R265 1 2 100K_0402_5%
PLT_DET R1390 1 2 470K_0402_1%
MEC1322-NU_VTQFP128_14X14
72
11
47
56
104
82
117
36
45

+3VDS 20121020 HP's request
PWR_GD 8051TX_STBYLED# <33,38,39>

<31,46,5> PWR_GD
PCH_SPI_CLK_EC
1
20120912 Delete R277 20120711 Change C322 to 100pF as HP's request R269
6
20120810 HP's request 20121016 Delete C322 as HP's request 100K_0402_5%
1 A_GND
33P_0402_50V8J C190 1 2 2200P_0402_50V7K C191 1 2 2200P_0402_50V7K Q172A
2
@ 2
2
C192 1 2 2200P_0402_50V7K 1 2
1
R281 0_0402_5%
Layout note: ADC nets are spaced at least 20mils from any high speed switching signals to prevent cross talk that could add noise TX_STBY_LED# 5
20120718 EMI's request
Q172B
4
SPI ROM (16MByte ) 20120725 HP's request
+3VDS
PVT ROM
20120713 Delete RH220
+3VDS UH5 CONN@
(IN)
8 4 +3VDS
2MB
20120713 Change power rail from +3V_SPI to +3VDS VCC VSS &UH1 45@ R282
PCH_SPI_WP# 3 1 2
@ RH222 1 2 PCH_SPI_CS0# W
D 3.3K_0402_5% 10K_0402_5% &UH2 45@ D
PCH_SPI_HOLD# 7 U18 CONN@
0.1U_0402_16V4Z
RH223 1 2 PCH_SPI_WP# HOLD 20mils 8 4
3.3K_0402_5% PCH_SPI_CS0# 1 VCC VSS
S 1
1 2 PCH_SPI_HOLD#
C193
RH224 128M W25Q128FVSIQ SOIC8P 3
3.3K_0402_5% PCH_SPI_CLK 6 W
C 1 R438 2 7
+3VDS
1
+3VDS +3VDS PCH_SPI_SI 5 2 PCH_SPI_SO_R_1 2 1 PCH_SPI_SO 2 10K_0402_5% HOLD 16M W25Q16DVSSIQ SOIC 8P
R1343 D Q R283 4.99_0402_1% PVT_CS# 1
S
20mils 0_0402_5% 128M W25Q128FVSIG SOIC8P R1391
1 1 1 @ PVT_SCLK 1 2 PVT_SCLK_R 6
@ C
CH97 Security Classification Compal Secret Data Compal Electronics, Inc.
2
0.1U_0402_16V4Z CH98 @ CH112 15_0402_5% PVT_MOSI 5 2 PVT_MISO

22P_0402_50V8J 1 D Q Issued Date 2012/06/11 2013/06/11 Title
2 22P_0402_50V8J 2 C375 Deciphered Date
2
33P_0402_50V8J
@
16M W25Q16CVSSIG SOIC 8P
KBC1126
20120803 RF's request 2 20121016 Add R1391 HP's request 20120725 HP's request AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
20120709 Delete UH6 as HP's request 20120722 for EMI's request DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-9371P 0.3
1 2 3 4 5
+3VS
2
1 R285
C194 R284 1 2
1
40.2K_0402_1% 1M_0402_5%
3300P_0402_25V7K @ R286
2 +5VDS 10K_0402_5%
1
1 2 20120818 HP's request
2
+5VS
8
R288 76.8K_0402_1% U19A
1 2 1 2 3
P
+0.675VS +
R289 11.5K_0402_1% R290 10K_0402_5% 1 PWR_GD
1 2 1 2 2 O PWR_GD <30,46,5>
<48> 1.5VS_PG 1.07VREF
+5VL -
G
R1340 3.3K_0402_5% R291 105K_0402_1%
LM393DR2G_SO8
4
D41
R1337
1
1 2 2
<14,30,34,39,44> SLP_S3#
31.6K_0402_1% 1
3.3K_0402_5% C195
1
R292 1000P_0402_50V7K
R1338
PM_APWROK 1 2 3
2
2
3.3K_0402_5%
BAW56W_SOT323-3
R294
1 2
1M_0402_5%
1 2 +5VDS
+1.35VS
R1339 30.9K_0402_1%
8
U19B
1 2 1 2 5
P
+3VS +
R297 76.8K_0402_1% R296 10K_0402_5% 7
1.07VREF 6 O
-
G
1 2
+1.05VS
R293 24.3K_0402_1% LM393DR2G_SO8
4
1
1 20120711 HP's request
C196 R299
73.2K_0402_1% 20120718 HP's request
3300P_0402_25V7K 20120723 Change R286 to 10K as HP's request
2
R304
1 2
+5VL
88.7K_0402_1%
+3VDS
1
1000P_0402_50V7K
20121101 HP's request 1 +3V_PCH

C197 35.7K_0402_1%
2
R306
2 R175
1
R309
2
3.3K_0402_5% RH236
1 2
1M_0402_5% 4.7K_0402_5%
1
+5VDS
2
R1379
R311
8
U20B 1 2
R310 1 2 20.5K_0402_1% 1 2 5
P
+3VM_LAN + 1M_0402_5%
7
<45> 1.05VM_PG R1341 1 2 3.3K_0402_5%
10K_0402_5% 6 O PM_APWROK <14,30>
- +5VDS
G
1
1 LM393DR2G_SO8
4
19.1K_0402_1%
1
8
D43 U20A
R1342 R313 3300P_0402_25V7K R307 3
P
1 2 2 2 <46> VGATE +
<14,30,45> SIO_SLP_A# 1K_0402_5% 1
2
2 O PCH_PWROK_R <14>
3.3K_0402_5% -
G
1
2
1 LM393DR2G_SO8
4
3 CH106
R301 0.1U_0402_16V4Z
1 2
1M_0402_5% 2
BAW56W_SOT323-3
C198
1 2
0.068U_0402_10V6K
20120913 Modify power ok circuit

POK CKT
1 2 3 4 5
Parallel Port +5VS
2
TO LPC47N217N
D27
RB751V-40_SOD323-2 +3VS
RP6
1
DSR#1 8 1
CTS#1 7 2
+5VS_PRN RI#1 6 3
LPTINIT# R476 1 2 4.7K_0402_5% DCD#1 5 4
A A
RP7 4.7K_0804_8P4R_5% 20121015

LPTACK# 8 1
LPTERR# 7 2
LPTAFD# 6 3 RXD1 R323 1 2 1K_0402_5%
LPTSTB# 5 4
U22
9 LPC_LAD0
4.7K_0804_8P4R_5% LAD0 LPC_LAD0 <16,25,28,30>
11 LPC_LAD1
54 LAD1 12 LPC_LAD1 <16,25,28,30>
RP8 <33> RXD1 RXD1 LPC_LAD2
TXD1 55 RXD1 LAD2 13 LPC_LAD3 LPC_LAD2 <16,25,28,30>
LPD7 8 1
SERIAL I/F
<33> TXD1 DSR#1 56 TXD1 LAD3 LPC_LAD3 <16,25,28,30>
LPTSLCT 7 2
<33> DSR#1 RTS#1 1 DSR1# 14 LPC_LFRAME#
LPTPE 6 3
<33> RTS#1 2 RTS1# LFRAME# 15 LPC_LFRAME# <16,25,28,30>
LPTBUSY 5 4 CTS#1 LPC_LDRQ0#
<33> CTS#1 DTR#1 3 CTS1# LDRQ# LPC_LDRQ0# <16>
<33> DTR#1
LPC I/F
RI#1 4 DTR1# 16 KBC_SIO_RST#
4.7K_0804_8P4R_5% <33> RI#1 RI1# PCI_RESET# KBC_SIO_RST# <18,30>
DCD#1 5 17 LPCPD#_SIO
<33> DCD#1 DCD1# LPCPD#
RP9 +3VS
LPD3 8 1 18 PM_CLKRUN#
CLKRUN# 19 CLK_PCI_SIO PM_CLKRUN# <14,28,30>
LPD4 7 2
35 PCI_CLK 20 CLK_PCI_SIO <15>
LPD5 6 3 <33> LPTINIT# LPTINIT# SIRQ LPCPD#_SIO R325 1 2 4.7K_0402_5%
LPTSLCTIN# 36 INIT# SER_IRQ 6 SIO_PME# 1 2 SIRQ <16,28,30>
LPD6 5 4 <33> LPTSLCTIN# +3VS
LPD0 37 SLCTIN# IO_PME# R324 10K_0402_5%
<33> LPD0 PD0
4.7K_0804_8P4R_5% LPD1 39 8 CLK_SIO_14M
<33> LPD1 PD1 CLK14 CLK_SIO_14M <15>
LPD2 40 CLOCK
<33> LPD2 PD2
RP10 LPD3 41
<33> LPD3 PD3
LPTSLCTIN# 8 1 LPD4 42 21 SIO_GPIO41
PARALLEL I/F
<33> LPD4 PD4 GPIO41
LPD0 7 2 LPD5 43 22 SIO_GPIO42
LPD1 6 3 LPD6 44 24 SIO_GPIO43
LPD2 5 4 LPD7 45 25 SIO_GPIO44 CLK_PCI_SIO CLK_SIO_14M
GPIO
LPTSLCT 47 26 mSATA_DET#
20121015 <33> LPTSLCT SLCT GPIO45 mSATA_DET# <13,23>
1
4.7K_0804_8P4R_5% LPTPE 48 27 SIO_GPIO46
B <33> LPTPE LPTBUSY 49 PE GPIO46 28 SER_SHD_GPIO47
20121026 HP's request B
<33> LPTBUSY R332 R333 @
LPTACK# 50 BUSY GPIO47 29 SIO_GPIO10
<33> LPTACK# 33_0402_5% 10_0402_5%
LPTERR# 51 ACK# GPIO10 30 SYSOPT
<33> LPTERR# ERROR# GPIO11/SYSOPT
1
LPTAFD# 52 31 SIO_GPIO12
<33> LPTAFD# ALF# GPIO12/IO_SMI#
1 2
2
LPTSTB# 53 32 SIO_IRQ
<33> LPTSTB# STROBE# GPIO13/IRQIN1 1
33 R327 C205
GPIO14/IRQIN2 34 SIO_GPIO23 10K_0402_5%
82P 50V J NPO 0402 C206 @
GPIO23
R554 10P_0402_25V8K
2
1 2
2
SIO_GPIO44 7 2
+3VS VTR
4.7K_0402_5% 10
+3VS 23 VCC 57
RP12 VCC POWER EPAD 20121105 RF's request
8 1 SIO_IRQ 38
46 VCC
7 2 SIO_GPIO12 VCC
6 3 SIO_GPIO10
C201
C202
C203
C204
5 4 SIO_GPIO46 LPC47N217N-ABZJ_QFN56_8X8
1 1 1 1
4.7K_0804_8P4R_5%
20121015
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
4.7U_0805_10V4Z
20121026
+3VS 2 2 2 2
R331 1 2 10K_0402_5% SYSOPT
R328 1 2 10K_0402_5% SIO_GPIO23
+3VS
R483 1 2 10K_0402_5% SIO_GPIO43

C R1360 1 @ 2 10K_0402_5% SIO_GPIO42 C
R329 1 2 10K_0402_5% SIO_GPIO41
R1361 1 @ 2 4.7K_0402_5% SIO_GPIO43

R330 1 2 4.7K_0402_5% SIO_GPIO42
R1362 1 @ 2 4.7K_0402_5% SIO_GPIO41
20120720 System ID for HP's request

20120731 System ID for HP's request
20120821 Add R for 2DIMM & 4DIMM option
D D

SUPER I/O LPC47N217N-ABZJ
1 2 3 4 5
1 2 3 4 5
VA
DOCK CONN. 184PIN DOCKING CONNECT +5VS +3V_PCH
VA_ON#
1
C207
C209
(1) PCI Express x1 channels 1
(2) PS/2 Interfaces DOCK_ID R334 1 @ 2 10K_0402_5%
(2) USB 2.channels +5VS ISO_PREP# R337 1 2 10K_0402_5% R335 C208
1 1
(2)
(2)
SATA Channels
Display Port Channels
VIN VA 1K_0402_5%
2
0.1U_0402_16V4Z
2
(1) Serial Port L27 20121108 Uninstall R334 as HP's request
(1) Parallel Port 2 2 HCB2012KF-121T50_0805 ON/OFFBTN_KBC#
C210
C211
C212
C213
(1) Line In 1 2 1
0.1U_0603_50V4Z
0.1U_0603_50V4Z
10U_0805_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
(1) Line Out C299
(1) RJ45 (10/100/1000) 1 1 1 1 0.01U_0402_16V7K
5A
1
(1) VGA L28
A (1) 2 LAN indicator LED's 2 A
D42 HCB2012KF-121T50_0805 20120911 Delete R336 as HP's request
(1) Power Button 1 2 2 2 2 2
(1) I2C interface L30ESD24VC3-2_SOT23-3
@ JDOCK1B
R168
100K_0402_5%
1 2 143 46
142 143 46 47
20120713 ESD's request 142 47
DPB_HPD 141 48 DCK1_HPD
VA <36> DPB_HPD 141 48 DCK1_HPD <35>
JDOCK1A 140 49 ON/OFFBTN_KBC#
2
<30,39,43,44> EN_P1V5 140 49 ON/OFFBTN_KBC# <30,38>
ADP_SIGNAL ADP_SIGNAL 139 50 VA_ON#
12A 190 189 DPB_AUX R339 1 2 0_0402_5% DPB_AUX_R 138 139 50 51 MXM_R_DCK_AUX R340 1 2 0_0402_5% MXM_DCK_AUX
P1 G1 DPB_AUX# R341 1 2 0_0402_5% DPB_AUX#_R 137 138 51 52 MXM_R_DCK_AUX# R342 1 2 0_0402_5% MXM_DCK_AUX#
136 137 52 53
135 136 53 54
188 1 134 135 54 55
187 188 1 2 133 134 55 56
<29> DOCK_MDO3+ 187 2 DOCK_MDO1+ <29> 133 56
186 3 132 57
<29> DOCK_MDO3- 186 3 DOCK_MDO1- <29> 132 57
185 4 <32> LPTSTB# LPTSTB# 131 58 D_DDCDATA
185 4 131 58 D_DDCDATA <36>
184 5 <32> LPTAFD# LPTAFD# 130 59 D_DDCCLK
<29> DOCK_MDO2+ 184 5 DOCK_MDO0+ <29> 130 59 D_DDCCLK <36>
183 6 <32> LPTERR# LPTERR# 129 60
<29> DOCK_MDO2- 183 6 DOCK_MDO0- <29> 129 60 D_VSYNC <36>
182 7 LPTACK# 128 61
182 7 <32> LPTACK# 128 61 D_HSYNC <36>
<32> LPTBUSY LPTBUSY 127 62
LPTPE 126 127 62 63 R_DOCK_RED
20120912 <32> LPTPE 126 63 R_DOCK_RED <36>
DETECT 181 8 <32> LPTSLCT LPTSLCT 125 64
181 8 DOCK_LED_LINK_LAN# <29> 125 64
180 9 LPD7 124 65 R_DOCK_GRN R_DOCK_GRN <36>
180 9 DOCK_LAN_ACT# <29> <32> LPD7 124 65
179 10 LPD6 123 66 R_DOCK_BLU
+5VS 179 10 +5VS <32> LPD6 123 66 R_DOCK_BLU <36>
178 11 20120912 LPD5 122 67
178 11 <32> LPD5 122 67
177 12 LPD4 121 68 DCD#1
177 12 <32> LPD4 121 68 DCD#1 <32>
176 13 USB3TN1 LPD3 120 69 RI#1
176 13 USB3TN1 <17> <32> LPD3 120 69 RI#1 <32>
175 14 USB3TP1 LPD2 119 70 DTR#1
175 14 USB3TP1 <17> <32> LPD2 119 70 DTR#1 <32>
174 15 LPD1 118 71 CTS#1
174 15 <32> LPD1 118 71 CTS#1 <32>
173 16 USB3RN1 LPD0 117 72 RTS#1
173 16 USB3RN1 <17> <32> LPD0 117 72 RTS#1 <32>
172 17 USB3RP1 LPTSLCTIN# 116 73 DSR#1
172 17 USB3RP1 <17> <32> LPTSLCTIN# 116 73 DSR#1 <32>
171 18 LPTINIT# 115 74 TXD1
171 18 <32> LPTINIT# 115 74 TXD1 <32>
170 19 STB_LED#_R 114 75 RXD1
B 170 19 USBP0- <17> 114 75 RXD1 <32> B
169 20 SATA_ACT# 113 76
169 20 USBP0+ <17> <13,39> SATA_ACT# 113 76
168 21 DOCK_ID 112 77
168 21 <29,36> DOCK_ID 112 77
167 22 ISO_PREP# 111 78
167 22 <13,36> ISO_PREP# 111 78
166 23 110 79
165 166 23 24 109 110 79 80
165 24 <13> SATA_PTX_DRX_P3 109 80
164 25 108 81 KBD_DATA
164 25 <13> SATA_PTX_DRX_N3 108 81 KBD_DATA <30>
163 26 107 82 KBD_CLK
163 26 107 82 KBD_CLK <30>
162 27 106 83 PS2_DATA
162 27 <13> SATA_PRX_DTX_P3 106 83 PS2_DATA <30>
161 28 105 84 PS2_CLK
161 28 <13> SATA_PRX_DTX_N3 105 84 PS2_CLK <30>
160 29 104 85
160 29 104 85 LINE_IN_SENSE <27>
159 30 USBP11- 103 86 DOCK_HPS#
159 30 <17> USBP11- 103 86 DOCK_HPS# <27>
<36> DPB_TXP0 158 31 USBP11+ 102 87
158 31 MXM_DCK_LANE_P0 <35> <17> USBP11+ 102 87
<36> DPB_TXN0 157 32 101 88
157 32 MXM_DCK_LANE_N0 <35> 101 88 DOCK_LINE_IN_L <27>
156 33 <13> SATA_PTX_DRX_P2 100 89
156 33 100 89 DOCK_LINE_IN_R <27>
<36> DPB_TXP1 155 34 <13> SATA_PTX_DRX_N2 99 90
155 34 MXM_DCK_LANE_P1 <35> 99 90
154 35 98 91 DLINE_OUT_L
<36> DPB_TXN1 154 35 MXM_DCK_LANE_N1 <35> 98 91 DLINE_OUT_L <27>
153 36 97 92 DLINE_OUT_R
Quick SW
<36> DPB_TXP2 152 153 36 37 GPU <13> SATA_PRX_DTX_P2
96 97 92 93
DLINE_OUT_R <27>
152 37 MXM_DCK_LANE_P2 <35> <13> SATA_PRX_DTX_N2 96 93
<36> DPB_TXN2 151 38 95 94 DETECT
151 38 MXM_DCK_LANE_N2 <35> 95 94
150 39
149 150 39 40 20120801 Change to Port 2 as HP's request
<36> DPB_TXP3 149 40 MXM_DCK_LANE_P3 <35>
<36> DPB_TXN3 148 41
148 41 MXM_DCK_LANE_N3 <35>
147 42
DPB_AUX 146 147 42 43 MXM_DCK_AUX 192 191
<36> DPB_AUX 146 43 MXM_DCK_AUX <35> G2 G1
DPB_AUX# 145 44 MXM_DCK_AUX# 194 193
<36> DPB_AUX# 145 44 MXM_DCK_AUX# <35> G4 G3
144 45 196 195
144 45 198 G6 G5 197
200 G8 G7 199
FOX_QL0094L-D26601-8H G10 G9
FOX_QL0094L-D26601-8H
C C
R_DOCK_RED R343 1 2 150_0402_1%

+5VDS R_DOCK_GRN R344 1 2 150_0402_1%
R_DOCK_BLU R345 1 2 150_0402_1%
1
R346
10K_0402_5%
2
R_DOCK_RED C214 1 2 @ 0.1U_0402_16V4Z
STB_LED#_R R_DOCK_GRN C215 1 2 @ 0.1U_0402_16V4Z
R_DOCK_BLU C216 1 2 @ 0.1U_0402_16V4Z
1
D Q35
2 2N7002K_SOT23-3
<30,38,39> 8051TX_STBYLED#
G
S
3
D D
IN NC<-->COM NO<-->COM Security Classification Compal Secret Data Compal Electronics, Inc.
L ON OFF
DOCK CONN
H OFF ON DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom LA-9371P 0.3
1 2 3 4 5
A B C D E
+3VALW TO +3VALW(PCH AUX Power) +5VALW to +5VS Transfer +3VALW to +3VS Transfer
Short J1 for PCH VCCSUS3.3 +5VDS B+ +3VDS +3VS
+5VS U25
U24 AON7408L_DFN8-5
+3VDS J1 @ +3V_PCH AON7408L_DFN8-5
4.5A 1
6.5A
1 2
1
1 2 1 2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
10U_0603_6.3V6M
2 1 5 3
JUMP_43X79
C223
C219
5 3 R354 1 1
40mil
C221
1 1 1 330K_0402_5% C218
1 C222 10U_0603_6.3V6M 1
4
C226 10U_0805_10V4Z 2
3 1 Q40
4
2 2
D
10U_0805_10V4Z
2 2 2 RUNON
2
AO3413L_SOT23-3 @
1 1
10U_0603_6.3V6M
C225
1U_0603_25V6
C220
1
1
2
C224 R355
J2 R357
20120705 470_0603_5% RUNON SHORT PADS R356
1
10U_0603_6.3V6M 2 2 0_0402_5%
6 2
820K_0402_5%
3 1
2 R489
1K_0402_5%
2
Q18B 1
Q9A C227
0.01U_0402_16V7K
2
SLP_S3 2
R455
B+
5 KBC_PWR_ON#
DMN66D0LDW-7_SOT363-6 +1.05VM to +1.05VS Transfer DMN66D0LDW-7_SOT363-6
2
3
4
KBC_PWR_ON# 1 2
<45> KBC_PWR_ON# +1.05VM +1.05VS
200K_0402_5% Q9B
Q41 5
R1398 <30,49> ADP_PRES DMN66D0LDW-7_SOT363-6
2 1 AO4430L_SO8 6A
8 1
4
7 2
6
100K_0402_5%
C233
10U_0805_10V4Z
C234
0.1U_0402_16V4Z
6 3
1 1 5
C235
10U_0805_10V4Z
C232
330U_B2_2VM_R15M
2 DMN66D0LDW-7_SOT363-6 1
<30,43> KBC_PWR_ON Q18A 1
4
+
2 2
1
@
2 2
2 2
R375
20121012 Change R455 to 47K. Add Q18A, C431, R1387. Modify circuit RUNON 1 2
20121016 Delete Q67,C431 as HP's request
20121016 Delete Q177, Change R1387 to 4.7K Ohm as HP's request 0_0402_5%
20121023 Delete R1387 as HP's request
20121025 Change R455 to 200K and Add R1398 as HP's request
20121001 Change +1.05VS power circuit.
+3VDS
+3VALW to +3VM_LAN Transfer
1
R363
AMT@ 4.7K_0402_5%
+3VDS Q36 +3VM_LAN
07/10 Change R363 to 4.7K
2
AO3413L_SOT23-3
3 1
1.5A <48,9> SLP_S3
SLP_S3
S
0.1U_0402_16V4Z
1
D
G
C230
1 1 2
1 2
4/25 change by <14,30,31,39,44> SLP_S3#

AMT@ C229 G
HP requirement AMT@ S
1U_0402_6.3V6K
3
1
R488 Q39
2 2
1K_0402_5% 2N7002KW_SOT323-3
R368
100K_0402_5%
2
3 3
2
SLP_LAN
<29> SLP_LAN 20120720 Delete C231 as HP's request
Discharge circuit-1 Discharge circuit-2 for V-M

+3VS +5VS +3VM_LAN
+1.05VS
+5VS +5VDS +3VDS +3VS
1
1
R369 R370 R373 R360

470_0402_5% 220_0402_5% 470_0402_5% 470_0402_5%
68P_0402_50V8J
68P_0402_50V8J
2
68P_0402_50V8J
68P_0402_50V8J
68P_0402_50V8J
68P_0402_50V8J
68P_0402_50V8J
68P_0402_50V8J
68P_0402_50V8J
1 1 1 1 1 1 1 1 1
2
@ @ @ @ @ @ @ @ @
3
C404 C405 C406 C407 C408 C409 C410 C411 C412

6
2 2 2 2 2 2 2 2 2
Q173B Q7B
1
D
Q173A DMN66D0LDW-7_SOT363-6 SLP_LAN 5
SLP_S3 2 SLP_S3 2 SLP_S3 5 DMN66D0LDW-7_SOT363-6
G DMN66D0LDW-7_SOT363-6
4
S
3
Q174
2N7002KW_SOT323-3 20120809 RF's request
4 4

DC/DC Circuits
A B C D E
5 4 3 2 1
PEG_CTX_GRX_P[0..15]
<4> PEG_CTX_GRX_P[0..15]
PEG_CTX_GRX_N[0..15]
<4> PEG_CTX_GRX_N[0..15]
PEG_CRX_GTX_P[0..15]
<4> PEG_CRX_GTX_P[0..15]
PEG_CRX_GTX_N[0..15]
<4> PEG_CRX_GTX_N[0..15]
B+ B+
PCH_THERMTRIP#_R PCH_THERMTRIP#_R <18,24,5> PEX_RST
AC_PRES_OUT AC_PRES_OUT <14,30> JMXM1A CONN@ JMXM1B CONN@

1 2
3 PWR_SRC PWR_SRC 4 158 159
D PWR_SRC PWR_SRC GND GND D
2
CV1 1 2 0.22U_0402_6.3V6KPEG_CRX_GTX_N12
G
5 6 PEG_CTX_GRX_N12 160 161 PEG_CRX_GTX_C_N12
7 PWR_SRC PWR_SRC 8 PEG_CTX_GRX_P12 162 PEX_TX3# PEX_RX3# 163 PEG_CRX_GTX_C_P12 CV2 1 2 0.22U_0402_6.3V6KPEG_CRX_GTX_P12
9 PWR_SRC PWR_SRC 10 3 1 164 PEX_TX3 PEX_RX3 165
2
AC_PRES_OUT
11 PWR_SRC PWR_SRC 12 166 GND GND 167
D
13 PWR_SRC PWR_SRC 14 R137 PEG_CRX_GTX_N13 0.22U_0402_6.3V6K 1 2 CV3 PEG_CRX_GTX_C_N13 168 GND GND 169 PEG_CTX_GRX_N13
15 PWR_SRC PWR_SRC 16 Q61 PEG_CRX_GTX_P13 0.22U_0402_6.3V6K 1 2 CV4 PEG_CRX_GTX_C_P13 170 PEX_RX2# PEX_TX2# 171 PEG_CTX_GRX_P13
PWR_SRC PWR_SRC 4.7K_0402_5% PEX_RX2 PEX_TX2
17 18 2N7002KW_SOT323-3 172 173
PWR_SRC PWR_SRC GND GND
1
19 20 PEG_CRX_GTX_N14 0.22U_0402_6.3V6K 1 2 CV5 PEG_CRX_GTX_C_N14 174 175 PEG_CTX_GRX_N14
21 PWR_SRC PWR_SRC 22 PEG_CRX_GTX_P14 0.22U_0402_6.3V6K 1 2 CV6 PEG_CRX_GTX_C_P14 176 PEX_RX1# PEX_TX1# 177 PEG_CTX_GRX_P14
23 GND GND 24 178 PEX_RX1 PEX_TX1 179
25 GND GND 26 PEG_CRX_GTX_N15 0.22U_0402_6.3V6K 1 2 CV7 PEG_CRX_GTX_C_N15 180 GND GND 181 PEG_CTX_GRX_N15
27 GND GND 28 PEG_CRX_GTX_P15 0.22U_0402_6.3V6K 1 2 CV8 PEG_CRX_GTX_C_P15 182 PEX_RX0# PEX_TX0# 183 PEG_CTX_GRX_P15
2
GND GND PEX_RX0 PEX_TX0
B
29 30 184 185
31 GND GND 32 186 GND GND 187
33 GND GND 34 MXM_THERMTRIP# 3 1 PCH_THERMTRIP#_R <15> CLK_PCIE_VGA# 188 PEX_REFCLK# PEX_CLK_REQ# 189 PEG_CLK_REQ# <15>
PEX_RST
GND GND <15> CLK_PCIE_VGA PEX_REFCLK PEX_RST#
C
+5VS 35 36 190 191
GND GND Q62 GND VGA_DDC_DAT GPU_VGA_DDC_DAT <36>
37 38 192 193
GND GND 20121020 Change R137 to 4.7K as HP's request RSVD VGA_DDC_CLK GPU_VGA_DDC_CLK <36>
39 40 MMBT3904_SOT23-3 194 195
41 GND GND 42 20121025 Change Q62 and Delete R137 as HP's request 196 RSVD VGA_VSYNC 197 GPU_VGA_VSYNC <36>
DGPU_PRSNT#
43 5V PRSNT_R# 44 DGPU_PRSNT# <13,18> 20121028 Change Q61B to RB-751V as HP's request 198 RSVD VGA_HSYNC 199 GPU_VGA_HSYNC <36>
45 5V WAKE# 46 DGPU_PWROK 20121106 Add Q62 & R137 as HP's request 200 RSVD GND 201
47 5V
5V
PWR_GOOD
PWR_EN
48 DGPU_PWR_EN
DGPU_PWROK
DGPU_PWR_EN
<18>
<14,15>
202 RSVD
LVDS_UCLK#
VGA_RED
VGA_GREEN
203
RED_R
GREEN_R
<36>
<36>
CRT
+3VS
49 50 20120927 HP's request 204 205
51 5V RSVD 52 20121020 Change R1382,R1383,R1384 to 4.7K as HP's request 206 LVDS_UCLK VGA_BLUE 207 BLUE_R <36>
53 GND RSVD 54 208 GND GND 209
GND RSVD LVDS_UTX3# LVDS_LCLK# U37
5
55 56 10K_0402_5% 1 2 R1382
+3VS 210 211
57 GND RSVD 58 212 LVDS_UTX3 LVDS_LCLK 213 R93 R92 R91
VCC
59 GND PWR_LEVEL 60 214 GND GND 215 150_0402_1%
150_0402_1%150_0402_1% 1
PEX_STD_SW# TH_OVERT# LVDS_UTX2# LVDS_LTX3# IN1 DGPU_HOLD_RST# <14>
DGPU_PWR_EN R487 1 @ 2 4.7K_0402_5% 61 62 DGPU_PWROK 216 217 4
VGA_DISABLE# TH_ALERT# 300_0402_5% 1 2 R1383 20121028 HP's request LVDS_UTX2 LVDS_LTX3 OUT
ENAVDD_G 63 64 +3VS 218 219 2
GND
PLT_RST# <13,14,25,28,29,30,37,39,5>
1
BL_EN_G 65 PNL_PWR_EN TH_PWM 66 220 GND GND 221 IN2
4.7K_0402_5% 1 2 R1384 +3VS PCH_KBC_I2CDAT <16,30>
PNL_BL_EN GPIO0 LVDS_UTX1# LVDS_LTX2#
2
BL_PWM_G 67 68 222 223
69 PNL_BL_PWM GPIO1 70 224 LVDS_UTX1 LVDS_LTX2 225 MC74VHC1G08DFT2G_SC70-5
3
71 HDMI_CEC GPIO2 72 MXM_PCH_KBC_I2CDAT 1 6 226 GND GND 227
PCH_KBC_I2CLK <16,30>
R63 2 1 100K_0402_5% 73 DVI_HPD SMB_DAT 74 MXM_PCH_KBC_I2CLK 228 LVDS_UTX0# LVDS_LTX1# 229
+3VS @ LVDS_DDC_DAT SMB_CLK Q60A LVDS_UTX0 LVDS_LTX1
75 76 230 231
77 LVDS_DDC_CLK GND 78 DMN66D0LDW-7_SOT363-6 0.1U_0402_10V7K~D 2 1 C24 MXM_eDP_C_LANE_N0 232 GND GND 233 20120828 Change U37 to non OD part to solve MXM issue
GND OEM <36> MXM_eDP_LANE_N0 DP_C_L0# LVDS_LTX0#
5
C 20121107 HP's request 79 80 Q60B 0.1U_0402_10V7K~D 2 1 C25 MXM_eDP_C_LANE_P0 234 235 C
81 OEM OEM 82 <36> MXM_eDP_LANE_P0 236 DP_C_L0 LVDS_LTX0 237
83 OEM OEM 84 0.1U_0402_10V7K~D 2 1 C26 MXM_eDP_C_LANE_N1 238 GND GND 239
4 3 <36> MXM_eDP_LANE_N1 MXM_SYS_LANE_N0 <36>
85 OEM OEM 86 0.1U_0402_10V7K~D 2 1 C27 MXM_eDP_C_LANE_P1 240 DP_C_L1# DP_D_L0# 241
OEM GND <36> MXM_eDP_LANE_P1 DP_C_L1 DP_D_L0 MXM_SYS_LANE_P0 <36>
87 88 PEG_CTX_GRX_N0 DMN66D0LDW-7_SOT363-6 242 243
PEG_CRX_GTX_N0 CV9 2 1 0.22U_0402_6.3V6K PEG_CRX_GTX_C_N0 89 GND PEX_TX15# 90 PEG_CTX_GRX_P0 0.1U_0402_10V7K~D 2 1 C28 MXM_eDP_C_LANE_N2 244 GND GND 245
PEX_RX15# PEX_TX15 <36> MXM_eDP_LANE_N2 DP_C_L2# DP_D_L1# MXM_SYS_LANE_N1 <36>
PEG_CRX_GTX_P0 CV10 2 1 0.22U_0402_6.3V6K PEG_CRX_GTX_C_P0 91 92 0.1U_0402_10V7K~D 2 1 C29 MXM_eDP_C_LANE_P2 246 247
93 PEX_RX15 GND 94 <36> MXM_eDP_LANE_P2 248 DP_C_L2 DP_D_L1 249 MXM_SYS_LANE_P1 <36>
PEG_CTX_GRX_N1
PEG_CRX_GTX_N1 CV11 2 1 0.22U_0402_6.3V6K PEG_CRX_GTX_C_N1 95 GND
PEX_RX14#
PEX_TX14#
PEX_TX14
96 PEG_CTX_GRX_P1 EDP <36> MXM_eDP_LANE_N3
0.1U_0402_10V7K~D 2 1 C30 MXM_eDP_C_LANE_N3 250 GND
DP_C_L3#
GND
DP_D_L2#
251
MXM_SYS_LANE_N2 <36>
PEG_CRX_GTX_P1 CV12 2 1 0.22U_0402_6.3V6K PEG_CRX_GTX_C_P1 97
99 PEX_RX14
GND
GND
PEX_TX13#
98
100 PEG_CTX_GRX_N2
<36> MXM_eDP_LANE_P3
0.1U_0402_10V7K~D 2 1 C31 MXM_eDP_C_LANE_P3 252
254 DP_C_L3
GND
DP_D_L2
GND
253
255
MXM_SYS_LANE_P2 <36> SWITCH
PEG_CRX_GTX_N2 CV13 2 1 0.22U_0402_6.3V6K PEG_CRX_GTX_C_N2 101 102 PEG_CTX_GRX_P2 0.1U_0402_10V7K~D 2 1 C32 GPU_C_AUX# 256 257
PEX_RX13# PEX_TX13 <36> GPU_AUX# DP_C_AUX# DP_D_L3# MXM_SYS_LANE_N3 <36>
PEG_CRX_GTX_P2 CV14 2 1 0.22U_0402_6.3V6K PEG_CRX_GTX_C_P2 103 104 0.1U_0402_10V7K~D 2 1 C33 GPU_C_AUX 258 259
PEX_RX13 GND <36> GPU_AUX DP_C_AUX DP_D_L3 MXM_SYS_LANE_P3 <36>
105 106 PEG_CTX_GRX_N3 260 261
PEG_CRX_GTX_N3 CV15 2 1 0.22U_0402_6.3V6K PEG_CRX_GTX_C_N3 107 GND PEX_TX12# 108 PEG_CTX_GRX_P3 262 RSVD GND 263
PEX_RX12# PEX_TX12 RSVD DP_D_AUX# MXM_SYS_AUX# <36>
PEG_CRX_GTX_P3 CV16 2 1 0.22U_0402_6.3V6K PEG_CRX_GTX_C_P3 109 110 264 265
111 PEX_RX12 GND 112 266 RSVD DP_D_AUX 267 MXM_SYS_AUX <36>
PEG_CTX_GRX_N4
GND PEX_TX11# RSVD DP_C_HPD GPU_HPD <36>
PEG_CRX_GTX_N4 CV17 2 1 0.22U_0402_6.3V6K PEG_CRX_GTX_C_N4 113 114 PEG_CTX_GRX_P4 268 269 R450 1 2 10K_0402_5% DCK1_SYS_HPD
PEX_RX11# PEX_TX11 RSVD DP_D_HPD DCK1_SYS_HPD <36>
117 PEX_RX11 GND 118 PEG_CTX_GRX_N5 272 RSVD RSVD 273
PEG_CRX_GTX_N5 CV19 2 1 0.22U_0402_6.3V6K PEG_CRX_GTX_C_N5 119 GND PEX_TX10# 120 PEG_CTX_GRX_P5 274 RSVD RSVD 275
PEG_CRX_GTX_P5 CV20 2 1 0.22U_0402_6.3V6K PEG_CRX_GTX_C_P5 121 PEX_RX10# PEX_TX10 122 20121011 Swap DP port as HP's request 276 RSVD RSVD 277
123 PEX_RX10 GND 124 PEG_CTX_GRX_N6 278 RSVD GND 279
GND PEX_TX9# RSVD DP_B_L0# MXM_DCK_LANE_N0 <33>
PEG_CRX_GTX_N6 CV21 2 1 0.22U_0402_6.3V6K PEG_CRX_GTX_C_N6 125 126 PEG_CTX_GRX_P6 280 281
PEX_RX9# PEX_TX9 RSVD DP_B_L0 MXM_DCK_LANE_P0 <33>
129 PEX_RX9 GND 130 PEG_CTX_GRX_N7 284 RSVD GND 285
GND PEX_TX8# GND DP_B_L1# MXM_DCK_LANE_N1 <33>
PEG_CRX_GTX_N7 CV23 2 1 0.22U_0402_6.3V6K PEG_CRX_GTX_C_N7 131 132 PEG_CTX_GRX_P7 0.1U_0402_10V7K~D 2 1 C34 MXM_TB_C_LANE_N0 286 287
PEX_RX8# PEX_TX8 <39> MXM_TB_LANE_N0 DP_A_L0# DP_B_L1 MXM_DCK_LANE_P1 <33>
PEG_CRX_GTX_P7 CV24 2 1 0.22U_0402_6.3V6K PEG_CRX_GTX_C_P7 133 134 0.1U_0402_10V7K~D 2 1 C35 MXM_TB_C_LANE_P0 288 289
PEX_RX8 GND <39> MXM_TB_LANE_P0 DP_A_L0 GND
135 136 PEG_CTX_GRX_N8 290 291
PEG_CRX_GTX_N8
PEG_CRX_GTX_P8
CV25 2
CV26 2
1 0.22U_0402_6.3V6K
1 0.22U_0402_6.3V6K
PEG_CRX_GTX_C_N8
PEG_CRX_GTX_C_P8
137
139
GND
PEX_RX7#
PEX_TX7#
PEX_TX7
138
140
PEG_CTX_GRX_P8
<39> MXM_TB_LANE_N1
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
2
1 C36
1 C37
MXM_TB_C_LANE_N1
MXM_TB_C_LANE_P1
292
294
GND
DP_A_L1#
DP_B_L2#
DP_B_L2
293
295
MXM_DCK_LANE_N2
MXM_DCK_LANE_P2
<33>
<33> Dock
141 PEX_RX7 GND 142 <39> MXM_TB_LANE_P1 296 DP_A_L1 GND 297
PEG_CTX_GRX_N9
GND PEX_TX6# MXM_DCK_LANE_N3 <33>
PEG_CRX_GTX_N9
PEG_CRX_GTX_P9
CV27 2
CV28 2
1 0.22U_0402_6.3V6K
1 0.22U_0402_6.3V6K
PEG_CRX_GTX_C_N9
PEG_CRX_GTX_C_P9
143
145 PEX_RX6# PEX_TX6
144
146
PEG_CTX_GRX_P9 Thunder Bolt <39> MXM_TB_LANE_N2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
2
1 C38
1 C39
MXM_TB_C_LANE_N2
MXM_TB_C_LANE_P2
298
300
GND
DP_A_L2#
DP_B_L3#
DP_B_L3
299
301
MXM_DCK_LANE_P3 <33>
PEX_RX6 GND <39> MXM_TB_LANE_P2 DP_A_L2 GND
147 148 PEG_CTX_GRX_N10 302 303
GND PEX_TX5# GND DP_B_AUX# MXM_DCK_AUX# <33>
PEG_CRX_GTX_N10 CV29 2 1 0.22U_0402_6.3V6K PEG_CRX_GTX_C_N10 149 150 PEG_CTX_GRX_P10 0.1U_0402_10V7K~D 2 1 C40 MXM_TB_C_LANE_N3 304 305
PEX_RX5# PEX_TX5 <39> MXM_TB_LANE_N3 DP_A_L3# DP_B_AUX MXM_DCK_AUX <33>
PEG_CRX_GTX_P10 CV30 2 1 0.22U_0402_6.3V6K PEG_CRX_GTX_C_P10 151 152 0.1U_0402_10V7K~D 2 1 C67 MXM_TB_C_LANE_P3 306 307 R448 1 2 10K_0402_5% DCK1_HPD
153 PEX_RX5 GND 154 <39> MXM_TB_LANE_P3 308 DP_A_L3 DP_B_HPD 309 DCK1_HPD <33>
PEG_CTX_GRX_N11 R449 1 2 10K_0402_5% TB_HPD
B GND PEX_TX4# GND DP_A_HPD TB_HPD <39> 20121011 Swap DP port as HP's request B
PEG_CRX_GTX_N11 CV31 2 1 0.22U_0402_6.3V6K PEG_CRX_GTX_C_N11 155 156 PEG_CTX_GRX_P11 MXM_TB_AUX# 310 311
+3VS
PEX_RX4# PEX_TX4 <39> MXM_TB_AUX# DP_A_AUX# 3V3
PEG_CRX_GTX_P11 CV32 2 1 0.22U_0402_6.3V6K PEG_CRX_GTX_C_P11 157 MXM_TB_AUX 312 313
PEX_RX4 <39> MXM_TB_AUX DP_A_AUX 3V3 20120709 HP's request
314 C347 C348 C349
316 PRSNT_L# 315
GND GND
10U_0603_6.3V6M
0.1U_0402_16V4Z
0.1U_0402_16V4Z
318 317
1
2
GND GND 1 1 1
JAE_MM70-314B2-1-R500 R170 100K_0402_5%
JAE_MM70-314B2-1-R500
100K_0402_5%
R169 2 2 2
2
1
+3VS
+3VS dGPU_HPD_INTR
<13,17> dGPU_HPD_INTR
U34
ENAVDD_G 3 5
1 Y0 VCC 4
<14> ENVDD_PCH Y1 Z ENAVDD <22>
6 2
<14,36> DGPU_SELECT# S GND
74LVC1G3157GW_SC-88-6
2N7002KW_SOT323-3
1
D D D
DCK1_SYS_HPD 2 TB_HPD 2 Q52 DCK1_HPD 2 Q53
G Q51 G G
1
1
S S 2N7002KW_SOT323-3 S 2N7002KW_SOT323-3
3
+3VS R451 R452 R453
U35 100K_0402_5% 100K_0402_5% 100K_0402_5%
BL_EN_G 3 5
1 Y0 VCC 4
<14> PANEL_BKEN_PCH ENABLT <22>
2
2
DGPU_SELECT# 6 Y1 Z 2
S GND
74LVC1G3157GW_SC-88-6 S Z
A A
LO Y0
+3VS
U36
BL_PWM_G 3 5
<14> BKL_PWM_PCH
1 Y0
Y1
VCC
Z
4
INV_PWM <22>
HI Y1
DGPU_SELECT# 6 2
S GND
74LVC1G3157GW_SC-88-6
MXM
5 4 3 2 1
1 2 3 4 5
eDP MUX CC72 1

CC73 1
2 0.1U_0402_16V4Z
2 0.01U_0402_16V7K_X7R
+3VS
54
31
U42
VDD 47 SEL
DP Switch
VDD SW_AUX
28
OUT_AUXp_SCL EDC_SW_AUX <22>
27 +3VS
OUT_AUXn_SDA CC70 EDC_SW_AUX# <22>
IN2_PEQ 49
IN1_PEQ 50 IN2_PEQ/SDA_CTL 30 EDC_SW_C_AUX 1 2 0.1U_0402_16V4Z
IN1_AEQ# 3 IN1_PEQ/SCL_CTL AC_AUXp 29 EDC_SW_C_AUX# 1 2 0.1U_0402_16V4Z
IN2_AEQ# 51 IN1_AEQ# AC_AUXn CC71
IN2_AEQ# Place close to U42
C239
1U_0402_6.3V4Z
C240
0.1U_0402_16V4Z
C238
0.1U_0402_16V4Z
C241
0.1U_0402_16V4Z
1 1 1 1
37 I2C_CTL_EN T145
A EDP_CPU_LANE_P0 52 I2C_CTL_EN A
<7> EDP_CPU_LANE_P0 IN1_D0p
<7> EDP_CPU_LANE_N0 EDP_CPU_LANE_N0 53
EDP_CPU_LANE_P1 55 IN1_D0n 34 CFG_OUTPUT 2 2 2 2 U26
<7> EDP_CPU_LANE_P1 IN1_D1p CFG_OUTPUT
<7> EDP_CPU_LANE_N1 EDP_CPU_LANE_N1 56 12 42 DPA_TXN0 C324 1 2 0.1U_0402_16V7K
1 IN1_D1n 44 VDD D0-A MB_DPA_TXN0 <39>
R516 1 2 1M_0402_5% 21 41 DPA_TXP0 C323 1 2 0.1U_0402_16V7K
2 IN1_D2p CA_DET VDD D0+A MB_DPA_TXP0 <39>
34 40 DPA_TXN1 C326 1 2 0.1U_0402_16V7K
IN1_D2n VDD D1-A MB_DPA_TXN1 <39>
From CPU 4
5 IN1_D3p 42 EDP_SW_C_D0P CC75 1 2 0.1U_0402_16V4Z D1+A
39 DPA_TXP1 C325 1 2 0.1U_0402_16V7K
MB_DPA_TXP1 <39>
EDP_SW_D0P <22> 38 DPA_TXN2 C328 1 2 0.1U_0402_16V7K
IN1_D3n OUT_D0p 41 EDP_SW_C_D0N CC76 1 2 0.1U_0402_16V4Z D2-A MB_DPA_TXN2 <39>
EDP_SW_D0N <22> DPSW_SEL 2 37 DPA_TXP2 C327 1 2 0.1U_0402_16V7K
EDP_CPU_AUX 24 OUT_D0n 39 EDP_SW_C_D1P CC77 1 2 0.1U_0402_16V4Z GPU_SEL D2+A MB_DPA_TXP2 <39>
3 36 DPA_TXN3 C330 1 2 0.1U_0402_16V7K
<7>
<7>
EDP_CPU_AUX
EDP_CPU_AUX#
EDP_CPU_AUX# 23 IN1_AUXp OUT_D1p 38 EDP_SW_C_D1N CC78 1 2 0.1U_0402_16V4Z
EDP_SW_D1P
EDP_SW_D1N
<22>
<22>
<35> MXM_SYS_LANE_N0
4 D0- D3-A 35 DPA_TXP3 C329 1 2 0.1U_0402_16V7K
MB_DPA_TXN3 <39> M/B DP
20 IN1_AUXn OUT_D1n 36 EDP_SW_C_D2P CC79 1 2 0.1U_0402_16V4Z <35> MXM_SYS_LANE_P0 D0+ D3+A MB_DPA_TXP3 <39>
EDP_SW_D2P <22>
6 24
19 IN1_SCL OUT2_D2p 35 EDP_SW_C_D2N CC80 1 2 0.1U_0402_16V4Z <35> MXM_SYS_LANE_N1 D1- AUX-A MB_DPA_AUX# <39>
EDP_SW_D2N <22> 7 23
IN1_SDA OUT2_D2n 33 EDP_SW_C_D3P CC81 1 2 0.1U_0402_16V4Z <35> MXM_SYS_LANE_P1 D1+ AUX+A MB_DPA_AUX <39>
EDP_SW_D3P <22> 8 16
OUT_D3p 32 2 0.1U_0402_16V4Z <35> MXM_SYS_LANE_N2 D2- HPD_A MB_DP_HPD <39>
EDP_SW_C_D3N CC82 1 9
OUT_D3n EDP_SW_D3N <22> <35> MXM_SYS_LANE_P2 D2+
<35> MXM_eDP_LANE_P0 MXM_eDP_LANE_P0 7 10 33
MXM_eDP_LANE_N0 8 IN2_D0p <35> MXM_SYS_LANE_N3 D3- D0-B DPB_TXN0 <33>
<35> MXM_eDP_LANE_N0 11 32
MXM_eDP_LANE_P1 10 IN2_D0n <35> MXM_SYS_LANE_P3 D3+ D0+B DPB_TXP0 <33>
<35> MXM_eDP_LANE_P1 31
11 IN2_D1p 48 D1-B DPB_TXN1 <33>
<35> MXM_eDP_LANE_N1 MXM_eDP_LANE_N1 SEL 30
MXM_eDP_LANE_P2 13 IN2_D1n SW_ML/I2C_ADDR D1+B DPB_TXP1 <33>
13 29
From GPU <35>
<35>
MXM_eDP_LANE_P2
MXM_eDP_LANE_N2 MXM_eDP_LANE_N2 14 IN2_D2p <35> MXM_SYS_AUX#
14 AUX- D2-B 28
DPB_TXN2 <33>
MXM_eDP_LANE_P3 15 IN2_D2n 46 CFG_HPD <35> MXM_SYS_AUX AUX+ D2+B DPB_TXP2 <33>
<35> MXM_eDP_LANE_P3 DPSW_SEL 5 27
MXM_eDP_LANE_N3 16 IN2_D3p CFG_HPD 43 AUX_HPD_SEL D3-B DPB_TXN3 <33>
18 26
<35> MXM_eDP_LANE_N3 IN2_D3n OUT_HPD EDP_SW_HPD <22> <35> DCK1_SYS_HPD HPD D3+B 19
DPB_TXP3 <33> Docking
GPU_AUX 26 AUX-B DPB_AUX# <33>
<35> GPU_AUX 1 20
GPU_AUX# 25 IN2_AUXp 18 GND AUX+B DPB_AUX <33>
<35> GPU_AUX# 17 15
22 IN2_AUXn REXT 17 GND HPD_B DPB_HPD <33>
22
21 IN2_SCL CEXT 43 GND 25 R503 1 2 10K_0402_5%
IN2_SDA +3VS
1
CC74 R505 HGND OE
1
2.2U_0402_6.3V6M
4.99K_0402_1%
45 PI3VDP12412ZHEX_TQFN42_9X3P5~D
CPU_EDP_HPD# 6 GND 12
<7> CPU_EDP_HPD# IN1_HPD GND
<35> GPU_HPD GPU_HPD 9 57
IN2_HPD Epad 40 2
+3VS
2
PD
PS8321QFN56GTR-A0_QFN56_7X7
2
+3VS
R462
1
+3VS
B B
10K_0402_5%
R506 R507 R508 R509 R510 R511 100K_0402_5%
1
@ R504
1
4.7K_0402_5%
4.7K_0402_5%
4.7K_0402_5%
4.7K_0402_5%
4.7K_0402_5%
4.7K_0402_5%
SEL
R416
1
2N7002KW_SOT323-3 10K_0402_5%
1
D
2
2
<14,35> DGPU_SELECT#
G
DPSW_SEL
2
@ @ @ @ @ @ S
3
Q63
IN1_AEQ# 2N7002KW_SOT323-3
1
IN2_AEQ# D
IN1_PEQ 2
IN2_PEQ ISO_PREP# <13,33>
G
CFG_HPD
S
3
CFG_OUTPUT Q54
20120723
@R512
@R512 @ R513 @R514
@R514 @R515
@R515 SW_ML/SW_AUX
1
1
4.7K_0402_5%
4.7K_0402_5%
4.7K_0402_5%
4.7K_0402_5%
0 GPU
2
1 CPU
+5VS +RCRT_VCC
+CRTVDD
C F1 D49 C
1 2 2
1
1.1A_8V_SMD1812P110TF 3 W=40mils
RB491D_SOT23-3 1
+3VS +5VS
C413
0.1U_0402_10V6K
VGA_DDCCLK R501 1 2 10K_0402_5% 10/17 HP 2
1 1 1 1 1 1
VGA_DDCDATA R502 1 2 10K_0402_5% JVGA1
L29 09/30 HP 6
CC60 CC61 CC62 CC63 CC64 CC65 39NH_CS0805-39NJ-S_5% L32110NH_CS0805-R11J-S_5% 11
U28 +3VS 2 2 2 2 2 2 1 2 1 2 R1363 1 2 R1364 1 2 0_0805_5% 1
VGA_RED DAC_RE DAC_R VGA_RE VGA_R
10U_0603_6.3V6M 10U_0603_6.3V6M 0.1U_0402_16V4Z L30 7 G 16
<14> PCH_CRT_RED 7
17 REDA
MAX14885E VCC
29 10U_0603_6.3V6M 0.1U_0402_16V4Z 0.1U_0402_16V4Z
VGA_GRN
39NH_CS0805-39NJ-S_5%
1 2 DAC_GR
L31110NH_CS0805-R11J-S_5%
1 2 DAC_G R1365 1
0_0805_5%
2 VGA_GR R1366 1 2 0_0805_5% VGA_G

12
2 G
17
<35> RED_R REDB 21 1 L33 0_0805_5% 8
8 VCC 39NH_CS0805-39NJ-S_5% L34110NH_CS0805-R11J-S_5%
<14> PCH_CRT_GRN 13
18 GRNA 11 CC66
<35> GREEN_R VGA_BLU 1 2 DAC_BL 1 2 DAC_B R1367 1 2 VGA_BL R1368 1 2 0_0805_5% VGA_B 3
GRNB VL
@ 10P_0402_50V8J
@ 10P_0402_50V8J
@ 10P_0402_50V8J
1 R1369
1 R1371
0.1U_0402_16V4Z 9
1 R1370
0_0805_5%
9 2
18P_0402_50V8J
18P_0402_50V8J
18P_0402_50V8J
<14> PCH_CRT_BLU 14
19 BLUA
C420
C421
C414
18P_0402_50V8J
18P_0402_50V8J
18P_0402_50V8J
C418
C415
C419
<35> BLUE_R 1 1 1 1 1 1 4
BLUB 33 VGA_RED
C422
C416
C417
1 1 1 10
5 RED1 24 R_DOCK_RED
<14> PCH_CRT_DDC_CLK R_DOCK_RED <33> 15
15 SCLA RED2
<35> GPU_VGA_DDC_CLK 10/17 HP 10/17 HP 5
SCLB 32 VGA_GRN 2 2 2 2 2 2
6 GRN1 23 R_DOCK_GRN 2 2 2
<14> PCH_CRT_DDC_DAT SDAA GRN2 R_DOCK_GRN <33> CONN@
150_0402_1% 2
150_0402_1% 2
150_0402_1% 2
<35> GPU_VGA_DDC_DAT 16
SDAB C-H_13-12201572CP
31 VGA_BLU
R350 1 2 10K_0402_5% 2 BLU1 22 R_DOCK_BLU
+5VS EN BLU2 R_DOCK_BLU <33>
<14> PCH_CRT_HSYNC 3 35 VGA_DDCCLK

13 SHA SCL1 26 D_DDCCLK
<35> GPU_VGA_HSYNC SHB SCL2 D_DDCCLK <33>
0_0402_5%
<14> PCH_CRT_VSYNC 4 34 VGA_DDCDATA D47 CRT_HSYNC R1372 1 2 HSYNC_C
14 SVA SDA1 25 D_DDCDATA
<35> GPU_VGA_VSYNC SVB SDA2 D_DDCDATA <33> D48 VSYNC_C 3
D 0_0402_5%
R348 1 2 10K_0402_5% 1 37 R_CRT_HSYNC R385 1 2 33_0402_1% CRT_HSYNC VGA_R 3 1 CRT_VSYNC R1373 1 2 VSYNC_C
D
+5VS S00 SH1 HSYNC_C 2
1
+5VS R349 1 2 10K_0402_5% 40
S01 SH2
28 R_D_HSYNC R386 1 2 33_0402_1%
D_HSYNC <33>
39 VGA_G 2
38 S10 36 R_CRT_VSYNC R387 1 2 33_0402_1% CRT_VSYNC YSLC05CH_SOT23-3 VGA_DDCCLK
S11 SV1 27 R_D_VSYNC R388 1 2 33_0402_1%
SV2 D_VSYNC <33> YSLC05CH_SOT23-3 SCA00000U10
6
30 SCA00000U10 @ VGA_DDCDATA
GND
3
20 12 @
DGPU_SELECT# 2 10 GND NC
GND D46
VGA_B 3
QA2A <29,33> DOCK_ID 5 QA2B 41 Security Classification Compal Secret Data Compal Electronics, Inc.
1
DMN66D0LDW-7_SOT363-6 GPAD 1
DMN66D0LDW-7_SOT363-6 2 2012/06/11 2013/06/11 Title
MAX14885EETL+T_TQFN40_5X5~D Issued Date Deciphered Date
4
Switch/MUX
20120723 YSLC05CH_SOT23-3 Size Document Number Rev
SCA00000U10 Custom 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-9371P
@ MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
1 2 3 4 5
5 4 3 2 1
+VCC_SM
1
R391
D 4.7K_0402_5% D
2
U30
SCardC8 1 28 XTAL_OUT
SCardC6 2 SCard0C8 XO 27 XTAL_IN
SCardFcb 3 SCard0C6 XI 26 PWRSV_SEL# 1 2 XTAL_OUT
4 SCard0Fcb PWRSV_SEL 25 PWRSV_SEL# <14>
+5VS CV33 12P_0402_50V8J
SCardRst 5 SMIO_5VPWR LEDCRD 24 @
SCardclk R395 2 1 0_0402_5% SCardclk_R 6 SCard0Rst LEDPWR 23
SCardData R396 1 2 470_0402_5% 7 SCard0Clk RESET 22 SSDA PLT_RST# <13,14,25,28,29,30,35,39,5>
T93 PAD~D@
SCard0Data EEPDATA
3
2
8 21 SSCL T94 PAD~D@ +3VS_SM
1
1 <17> USBP7- DM EEPCLK
9 20 EEPWP T95 PAD~D@ Y3 @
<17> USBP7+ 10 DP P1(6) 19 20120920 HP's request
C252 +3VS_SM ICCInsertN 12MHZ_12PF_5YEA12000122IFA2Q3
0.1U_0402_16V7K 11 AV33 ICCInsertN 18 RH225 @
2 +VCC_SM SCPWR0 VDDH 1M_0402_5%
C253 12 17 C254
13 5VGND VDDP 16 +1.8VS_SM
CC68
2
1 +5VS 1
4
1
5VInput VDD
0.1U_0402_16V7K
0.1U_0402_16V7K
2 14 15
+3VS_SM V33OUT V18OUT
1U_0402_6.3V6K
CC69 C257 C258 C259 AU9560-GBS-GR_SSOP28 C255 1 2 XTAL_IN
2 2
1 1 1 1 1 1 1 C256 CV34 12P_0402_50V8J
1U_0402_6.3V6K
0.1U_0402_16V7K
1U_0402_6.3V6K
0.1U_0402_16V7K
1U_0402_6.3V6K
@
0.1U_0402_16V7K
20120709 Vendor's suggestion
2 2 2 2 2 2

C C
J3
12
GND 11 +VCC_SM
GND
10
10 9 SCardRst
9 8 SCardclk C260 C261
8 7 SCardFcb
7 1 1
0.1U_0402_16V7K
0.1U_0402_16V7K
6
6 5 SCardC6 @
5 4 SCardData
4 3 SCardC8 2 2
3 2 ICCInsertN
2 1
1
C264 C265 C263 C262
ACES_51524-0100N-001
CONN@
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
1 1 1 1
@ @ @ @
20120705 Correct J3's footprint
2 2 2 2
B B
20120714 Correct J3's pin define
20120912 Modify J3's pin define
A A

Smart Card
Custom 0.3
5 4 3 2 1
5 4 3 2 1
JKB1 KSO12 @ C376

@C376 1 2 100P_0402_50V8J
KSI_D_9 @C377
@ C377 1 2 100P_0402_50V8J
CONN@ @C378
@ C378
KSI_D_13 1 2 100P_0402_50V8J
2 1 @C379
@ C379
20120718 EMI's request KSI_D_6 1 2 100P_0402_50V8J
+5VDS 4 2 1 3
<26> REC_MUTE_CTRL_KB
JPWR1 R400 1 2 360_0402_5% 6 4 3 5
<30> 8051RX_CAPLED#
+5VDS 1 2
+3VDS 1 2 +3VDS_KB 8 6 5 7
1 2
<30,33,39> 8051TX_STBYLED# 8051TX_STBYLED# 3 4
<30> KSI[0..7] R1400 0_0402_5% 10 8 7 9
3 4 <30> 8051_RECOVER#/_NUM_LOCK_LED#
<30,33> ON/OFFBTN_KBC#
ON/OFFBTN_KBC# 5 6 KSI7 KSO13 12 10 9 11
5 6
7 8 KSI6 KSO12 14 12 11 13
7 8 @ C380
@C380 1 2
KSI5 KSO9 16 14 13 15 KSO1 100P_0402_50V8J
@C381
@ C381 1 2
D
ACES_50611-0040N-001 KSI4 KSI_D_9 18 16 15 17 KSO6 100P_0402_50V8J D
@C382
@ C382 1 2
KSI3 KSI_D_11 20 18 17 19 KSO4 100P_0402_50V8J
CONN@ @C383
@ C383 1 2
KSI2 KSI_D_13 22 20 19 21 KSO3 100P_0402_50V8J
KSI1 KSI7 24 22 21 23
20120917 Change JPWR1 to 4 pin KSI0 KSI_D_6 26 24 23 25
<30> KSO[0..13] KSI_D_5 28 26 25 27
KSO1 30 28 27 29
@ C384
@C384 1 2
KSO10 32 30 29 31 KSI_D_1 100P_0402_50V8J
@C385
@ C385 1 2
KSO13 KSO6 34 32 31 33 KSI_D_4 100P_0402_50V8J
@C386
@ C386 1 2
KSO12 KSO7 36 34 33 35 KSI_D_10 100P_0402_50V8J
@C387
@ C387 1 2
KSO11 KSO4 38 36 35 37 KSI_D_8 100P_0402_50V8J
ON/OFFBTN_KBC# KSO10 KSO8 40 38 37 39
KSO9 KSO3 42 40 39 41
KSO8 KSI_D_3 44 42 41 43
2 KSO7 KSI_D_1 46 44 43 45
KSO13 @ @C388
C388 1 2 100P_0402_50V8J
C270 KSO6 KSI_D_2 48 46 45 47 @C389
@ C389
EMI cap KSO5 KSI_D_4 50 48 47 49
KSO9 1 2 100P_0402_50V8J
0.1U_0402_16V7K KSI_D_11 @
@C390
C390 1 2 100P_0402_50V8J
1 KSO4 KSI_D_0 52 50 49 51 @C391
@ C391
KSI7 1 2 100P_0402_50V8J
KSO3 KSI_D_10 54 52 51 53
KSO2 KSI_D_12 56 54 53 55
KSO1 KSI_D_8 58 56 55 57
KSO0 KSI_D_14 60 58 57 59
KSO5 62 60 59 61
KSO2 64 62 61 63
KSO0 66 64 63 65
KSO11 68 66 65 67
68 67 KSI_D_5 @ C392
@C392 1 2 100P_0402_50V8J
70 69 KSO10 @C393
@ C393 1 2 100P_0402_50V8J
GND GND KSO7 @C394
@ C394 1 2 100P_0402_50V8J
HB_A823461-SBVR02 KSO8 @C395
@ C395 1 2 100P_0402_50V8J
+5VS +5VDS
C C
1
20120711 Correct JKB1's footprint KSI_D_3 @ C396
@C396 1 2 100P_0402_50V8J
R407 KSI_D_2 @C397
@ C397 1 2 100P_0402_50V8J
100K_0402_5% 20120712 Correct connection for JKB1 @C398
@ C398
Q47 KSI_D_0 1 2 100P_0402_50V8J
+5VS_KBL 20120917 Correct connection for JKB1 @C399
@ C399
KSI_D_12 1 2 100P_0402_50V8J
3
S
KB backlight Conn 2 2
R408
1 2
20121025 Correct connection for JKB1
G
200K_0402_5%
6
JP9 D
1
8 7 KSI_D_14 @ C400
@C400 1 2 100P_0402_50V8J
8 7 D36
0.047U_0402_16V7K
Q10A
6 5 AO3413L_SOT23-3 KSO2 @C401

@ C401 1 2 100P_0402_50V8J
6 5 D33 2 KSI_D_3 D39
4 3 1 2 KSO11 @C402
@ C402 1 2 100P_0402_50V8J
4 3 KBD_PWM_LED <30> 2 KSI_D_0 KSI_D_0 <39> KSI3 1 2 KSI_D_6
2 1 KSO0 @C403
@ C403 1 2 100P_0402_50V8J
2 1 KSI0 1 3 KSI_D_11 KSI6 1
C295
3 KSI_D_8 3 KSO5 @ C366 1 2 100P_0402_50V8J

1
KSI_D_14
ACES_50611-0040N-001 BAW56W_SOT323-3
2
CONN@ @ BAW56W_SOT323-3 BAW56W_SOT323-3
D37
D34 2 KSI_D_4
2 KSI_D_1 KSI_D_1 <39> KSI4 1
KSI1 1 3 KSI_D_12
20120926 Follow ME's request 3 KSI_D_9
KBL_DET# <13,18>
BAW56W_SOT323-3
BAW56W_SOT323-3
D38
D35 2 KSI_D_5
2 KSI_D_2 KSI5 1
KSI2 1 3 KSI_D_13
3 KSI_D_10
BAW56W_SOT323-3
BAW56W_SOT323-3
B B
TP/B TO M/B
JTP1
Stick Point CONN
1 2 JP13
3 1 2 4
SP_LEFT 5 3 4 6 +5VS 12
SP_MID 7 5 6 8 G4 11
SP_RIGHT 9 7 8 10 G3 10
DDR_XDP_WAN_SMBCLK 11 9 10 12 G2
<11,12,13,16,28,5> DDR_XDP_WAN_SMBCLK 9
DDR_XDP_WAN_SMBDAT 13 11 12 14 G1
<11,12,13,16,28,5> DDR_XDP_WAN_SMBDAT 13 14
TP_DATA 15 16 8
<30> TP_DATA 15 16 8 8
TP_CLK 17 18 7
<30> TP_CLK 17 18 7
19 20 6
+3VS 19 20 6 6
5
<30> SP_DATA 5
E-T_6900K-Q10N-00R 4
<30> SP_CLK 4 4
CONN@ SP_LEFT 3
SP_MID 2 3
20120907 Change JTP1's footprint & Delete JTP2 SP_RIGHT 1 2 2
2
C297 => Need check Pin assigment 1

100P_0402_50V8J
20120911 Change JTP1's footprint ACES_50554-0080N-001

1
2
C298 CONN@
1
D32 YSDA0502C C/A SOT-23
1
100P_0402_50V8J
2 +3VS
1
2 20120713 Change P/N for ESD's request

20120925 Install D32 as ESD's request
A A
1
C296
2 0.1U_0402_16V7K

KB/TP/PWR CONN
Custom 0.3
5 4 3 2 1
5 4 3 2 1
Function Board
D JFB1 D
1 2
+5VS
+3VDS 3 1
3
2
4
4 Thunderbolt
Function Key <38> KSI_D_0 KSI_D_0 5 6
KSI_D_1 7 5 6 8
MUTE <38> KSI_D_1 7 8 JTB1
<30> KSO17 KSO17 9 10
WIRELESS MUTE_LED_CNTR 11 9 10 12
<26> MUTE_LED_CNTR 11 12 1 2
WL/BT_LED# 13 14 <17> USB3TN6 1 2 MXM_TB_LANE_N3 <35>
13 14 3 4
LID_SW# 15 16 <17> USB3TP6 3 4 MXM_TB_LANE_P3 <35>
<22,30> LID_SW# 15 16 5 6
17 18 7 5 6 8
19 17 18 20 <17> USB3RN6 7 8 MXM_TB_LANE_N2 <35>
19 20 9 10
<17> USB3RP6 9 10 MXM_TB_LANE_P2 <35>
11 12
E-T_6900K-Q10N-00R 13 11 12 14
CONN@ <17> USBP5- 13 14 MXM_TB_LANE_N1 <35>
15 16
<17> USBP5+ 15 16 MXM_TB_LANE_P1 <35>
17 18
19 17 18 20
<36> MB_DPA_AUX# 19 20 MXM_TB_LANE_N0 <35>
21 22
<36> MB_DPA_AUX 21 22 MXM_TB_LANE_P0 <35>
20120715 Correct JFB1's footprint 23 24
25 23 24 26
20120912 Correct JFB1's footprint & Pin assignment <36> MB_DPA_TXP3 25 26 MXM_TB_AUX# <35>
<36> MB_DPA_TXN3 27 28
27 28 MXM_TB_AUX <35>
29 30
29 30 TB_HPD <35>
31 32
<36> MB_DPA_TXP2 31 32
<36> MB_DPA_TXN2 33 34
33 34 PCIE_PRX_DTX_N3 <17>
35 36
35 36 PCIE_PRX_DTX_P3 <17>
<36> MB_DPA_TXP1 37 38
39 37 38 40
<36> MB_DPA_TXN1 39 40 PCIE_PTX_C_DRX_N3 <17>
41 42
41 42 PCIE_PTX_C_DRX_P3 <17>
<36> MB_DPA_TXP0 43 44
45 43 44 46
<36> MB_DPA_TXN0 45 46 PCIE_PRX_DTX_N4 <17>
47 48
USB & Card Reader Board <36> MB_DP_HPD 49 47
49
48
50
50
PCIE_PRX_DTX_P4 <17>
51 52
C 51 52 PCIE_PTX_C_DRX_N4 <17> C
53 54
<17> USBP6- 53 54 PCIE_PTX_C_DRX_P4 <17>
55 56
+5VDS +3VS +5VDS +AVDD_CODEC <17> USBP6+ 55 56
57 58
57 58 CLK_TB_REFCLK# <15>
<15> CLK_PCIE_EXP# 59 60
59 60 CLK_TB_REFCLK <15>
JCR1 61 62
<15> CLK_PCIE_EXP 61 62 TB_CLKREQ# <15>
63 64
<15> CLKREQ_EXP# 63 64
1 2 65 66
<17> USB3TN5 1 2 PCIE_PTX_C_DRX_P8 <17> 65 66 PCIE_PRX_DTX_N1 <17>
3 4 67 68
<17> USB3TP5 3 4 PCIE_PTX_C_DRX_N8 <17> <17> PCIE_PRX_EXPTX_N5 67 68 PCIE_PRX_DTX_P1 <17>
5 6 69 70
5 6 <17> PCIE_PRX_EXPTX_P5 69 70
7 8 71 72
<17> USB3RN5 7 8 PCIE_PRX_DTX_P8 <17> 71 72 PCIE_PTX_C_DRX_N1 <17>
9 10 <17> PCIE_PTX_EXPRX_N5 73 74
<17> USB3RP5 9 10 PCIE_PRX_DTX_N8 <17> 73 74 PCIE_PTX_C_DRX_P1 <17>
11 12 <17> PCIE_PTX_EXPRX_P5 75 76
13 11 12 14 77 75 76 78
<17> USBP4- 13 14 CLK_PCIE_CR <15> 77 78 USBP9- <17>
15 16 79 80
<17> USBP4+ 15 16 CLK_PCIE_CR# <15> <17> PCIE_PRX_DTX_N2 79 80 USBP9+ <17>
17 18 81 82
17 18 <17> PCIE_PRX_DTX_P2 81 82
19 20 83 84 SATA_ACT#_R HDD LED
<17> USB3TN2 19 20 83 84
21 22 <17> PCIE_PTX_C_DRX_N2 85 86 PWR_LED
<17> USB3TP2 21 22 85 86 8051TX_STBYLED# <30,33,38>
23 24 PLT_RST# <17> PCIE_PTX_C_DRX_P2 87 88
23 24 87 88 AMBER_BATLED# <30>
<17> USB3RN2
25 26
CR_CLK_REQ# <15>
89 90
BAT_GRNLED# <13,30>
Battery charger LED
27 25 26 28 91 89 90 92 WL/BT_LED#_R
<17> USB3RP2 <13,14,25,28,29,30,35,37,5> PLT_RST# WIRELESS
29 27 28 30 93 91 92 94
29 30 EXT_MIC_L2 <27> +3VS 93 94 HDD_HALTLED <13> HDD LED
31 32 95 96
<17> USBP1- 31 32 <30> CPPWR_EN 95 96 TB_HOT_PLUG# <17>
33 34 20120731 HP's request 97 98
<17> USBP1+ 33 34 HP_OUT_R <26> <14,30,31,34,44> SLP_S3# 97 98 TBT_RR_GPIO# <14>
35 36 99 100 +1.5VS
35 36 <30,33,43,44> EN_P1V5 99 100
37 38 101 102 20121016 HP's request
PAD @
@T141
T141 37 38 HP_OUT_L <26> 101 102
<27> HP_SENSE# 39 40 103 104 +3VDS
41 39 40 42 105 103 104 106
41 42 EXT_MIC_JACK <26,27> 1 105 106
EN_P1V5 43 44 107 108
43 44 EXT_MIC_L <26> 107 108
45 46 C340 109 110
47 45 46 48 111 109 110 112
47 48 0.01U_0402_16V7K_X7R 111 112
20120724 49 50 2 113 114
51 49 50 52 115 113 114 116
B 53 51 52 54 20121031 HP's request 117 115 116 118 B
53 54 117 118 +3VS
55 56 20121102 Move Microphone pre Amp circuit to S/B as IDT's request +5VDS 119 120 +5VS
57 55 56 58 119 120
59 57 58 60
59 60 121 <30> iSCT_LED#
GND 122
2
GND
G
61
GND 62 FOX_QTS0120A-4121M-9H
GND 63 3 1 WL/BT_LED#_R
CONN@ <25> WL/BT_LED#
GND 64
D
GND R1399
65 2 1
GND +1.5VS
66 Q178
GND 1K_0402_1%
20120911 Change JTB1's footprint BSS138W-7-F_SOT323-3
ACES_50121-06001-001
iSCT_LED#
CONN@
2
G
+3VS_NFC
20120910 Add R1376 for NFC power rail option 3 1 SATA_ACT#_R

<13,33> SATA_ACT#
D
1
C352 +3V_PCH
@ R1376
1 2 Q179
0.1U_0402_16V4Z +3VM_LAN
2 2N7002KW_SOT323-3
0_0402_5%
1
JNFC1 20121023 HP's request

R1359 20121025 HP's request
+3VS 1 2 +3VS_NFC 1 2 R358 @
3 1 2 4
0_0402_5% 3 4 NFC_RST# <16> 10K_0402_5%
5 6
<16> NFC_3S_SMBDAT 5 6 NFC_3S_SMBCLK <16>
7 8 NFC_SEL_R R1345
<18> NFC_INT
2
1 2 NFC_SW 9 7 8 10
<25> UIM_VPP @ NFC_SEL_R 1 2 NFC_SEL T151 PAD @
A 0_0402_5% 11 9 10 12 A
<30> NFC_UART_TX R1344 NFC_UART_RX <30>
11 12 0_0402_5%
1
13 14 R1346 @
1
15 GND GND 16
1
GND GND R1377 10K_0402_5%

R1317 200K_0402_5%
Notes:
ACES_50559-01201-001
Install R1346 for UART
2
100K_0402_5% CONN@
2
Install R358 for I2C Security Classification Compal Secret Data Compal Electronics, Inc.
2

20120703 Add connection for NFC
20120710 Correct connection for NFC THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CONN
20120724 Add connection as HP's request Size Document Number Rev
20120730 Correct footprint for JNFC1
20120815 Add R1359 for NFC power rail option MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5 4 3 2 1
5 4 3 2 1
ADP_EN ACDRV
B+ +3VS
DC IN ACFET RBFET
D D
Jumper
RT8243AZQW +3VDSP +3VDS SY8032 +1.5VSP +1.5VS
Jumper
Main +5VDSP +5VDS
BATT B++ EN +3VS EN
ACDRV
Battery BATT
RBFET
Selector
+1.35VP +1.35V
+1.5VP Jumper
RT8207M +1.5V
2nd
BATT
+0.675VSP +0.675VS
Jumper
EN_P1V5 +0.75VSP +0.75VS
Charger SLP_S3# EN 7/19
C BQ24736 C
TPS51212 Jumper
+1.05VMP +1.05VM
SIO_SLP_A# EN
TPS51631 +CPU_CORE
B B
VR_ON EN
A A
5 4 3 2 1
5 4 3 2 1
PD11 PD10
+3VDS 4
AZC099-04S.R7G SOT23 ESD
V I/O V I/O
3 2
L30ESD24VC3-2_SOT23-3
1
ADP_SIGNAL 5 2 3
V BUS Ground
6 1
V I/O V I/O
1
PL1 7/11 PC2 VMB_A PL4 BATT_A
PJP1 HCB2012KF-121T50_0805
VIN PJP2 0.1U_0603_50V7K HCB2012KF-121T50_0805
2
1 2 1 1 2
1 2 PL2 1 2
1 2 HCB2012KF-121T50_0805 2 3 I2C_MAIN_DAT-1 1 2
D D
3 4 ADPIN 1 2 3 4 I2C_MAIN_CLK-1 PL5
3 4 4
1
PL3 5 HCB2012KF-121T50_0805
5
1
5 6 HCB2012KF-121T50_0805 6 PC7
5 6 1 2 6 7 PC3 0.01U_0402_50V7K
100P_0402_50V8J
1000P_0402_50V7K
100P_0402_50V8J
1000P_0402_50V7K
2
7
1
7 8 8 1000P_0402_50V7K
2
7 8 8
1
9
PC1
PC4
PC5
PC6
@ PR1
GND
3
9 10 15K_0402_5% 10
9 10 GND
2
FOX_BP0208C-B24B1-9H
100P_0402_50V8J
100P_0402_50V8J
2
@ ACES_59012-0100N-002
1K_0402_5%
100_0402_5%
100_0402_5%
CONN@
1
1
1
PR3
PC8
PR4
PC9
PR5
PC10
PJP2 Zero force Footprint: 100P_0402_50V8J
2
PD1 FOX_BP0208C-B24B1-9HQ_8P-T
1
2
L30ESD24VC3-2_SOT23-3
I2C_MAIN_DAT <30,42>
<30> MAIN_BAT_DET# I2C_MAIN_CLK <30,42>
VIN
C C
VIN
3.9K_0402_5%
1
PR13
680K_0402_5%
1
SD028680380
2
PR14 300K_0402_5%
PR10
1 2
+3VDS
3
2
ME2N7002DKW-G 2N SOT363-6
PQ1B
5
10K_0402_5%
1
PR11
4
6
PQ1A
2
2
30K_0402_5%
1
+3VDS PD13 PD12

1
AZC099-04S.R7G SOT23 ESD L30ESD24VC3-2_SOT23-3

PR12
4 3 2
V I/O V I/O 1
5 2 3
2
V BUS Ground
SB00000SA00 6 1
V I/O V I/O
1
B B
+3VDS 7/11 PC11

0.1U_0603_50V7K VMB_B PL6 BATT_B
2
PJP3 HCB2012KF-121T50_0805
1 1 2
300_0402_5%
1
1
2
2 3 I2C_BAY_DAT-1 1 2
PR15
3 4 I2C_BAY_CLK-1 PL7
4
1
5 HCB2012KF-121T50_0805
5 6
SD028300080
2
6 7 PC12 PC13
2
7 8 1000P_0402_50V7K 0.01U_0402_50V7K
8
FOX_BR0208C-Z71H1-9H
CONN@
4
100P_0402_50V8J
100P_0402_50V8J
5
1K_0402_5%
100_0402_5%
100_0402_5%
1
1
1
1
PR7
PR8
PR9
PC14
PC15
PQ2B PC16
100P_0402_50V8J
3
2
2
2
6
SB00000SA00 PQ2A
2
I2C_BAY_DAT <30>
1
A A
100K_0402_5%
1
<30> TRAVEL_BAT_DET# I2C_BAY_CLK <30>

PR16

2

DC Conn/BATT Conn
5 4 3 2 1
5 4 3 2 1
7/30
VIN PQ107 AO4423L 1P SO8
P1 P2 B+
1 8
2 7
3 6 to 5*5, 9/7
5 PQ102 8/8
MDU1512RH 1N POW ERDFN56-8
1 PR102 PL101
4
ACFET_CHG 2 0.005 +-1% 2512 100PPM/C 1UH_PCMB053T-1R0MS_7A_20%
3 5 1 4 1 2
PQ101 AO4423L 1P SO8
220K_0402_5%
220K_0402_5%
0.1U_0402_25V6
1 8 2 3
D D
1
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
2 7
68P_0402_50V8J
82P 50V J NPO 0402

4
1
PR101
PC101
PR103
3 6
1
PC103
PC104
PC105
PC106
PC107
5
PC108
PC138
PC102
BAT54WS-7-F_SOD323-2~D
0.1U_0402_25V6
2
1 2
4.12K_0603_1%
4.12K_0603_1%
2
2
2
1
@ @ @
PD101
ACFET_CHG
PR104
PR105
0.1U_0402_25V6
0.1U_0402_25V6
6
1
PC109
PC110
PQ103A for RF request, 8/6
2 ME2N7002DKW -G 2N SOT363-6
2
SB00000SA00
1
B+ P2 PQ105
5
AO4409L 1P SO8
CHRG_ADP_DET
ACDRV_CHG
CMSRC_CHG
ACP_CHG
ACN_CHG
3
100K_0402_5%
+3VDS PQ104 1
2
8
7
PQ103B
AON7408L_DFN8-5
PR107
3 6
5
1
PR108
2 4
P1 5
2
1
2.2_0402_1%
4
4
PU102 PR109
21
5
1
BQ24736RGRR_QFN20_3P5X3P5 10_1206_1%
ACPRES
ACDRV
CMSRC
ACP
ACN
PAD
3
2
1
PC111 BATT
2
ADP_EN <30> 1U_0603_25V6K
6 20 VCC_CHG 1 2
ACDET VCC PR110
PL102
C 0.02_1206_1% C
4.7U 20% VMPI0703AR-4R7M-Z01 5.5A
ICS 7 19 LX_CHG 1 2 CHG 1 4
PR127 IOUT PHASE
10 +-1% 0402 2 3
4.7_1206_5%
1
1 2 8 18 DH_CHG
<30,41> I2C_MAIN_DAT
CSON1
SDA HIDRV
CSOP1
PR111
PR112 PC112
2.2_0402_1% 0.047U_0402_25V7K
1 2 9 17 BST_CHG 1 2BST_CHG-1 1 2
RB551V-30_SOD323-2
<30,41> I2C_MAIN_CLK
10U_0805_25V6K
SCL BTST
5
PR128
0.1U_0402_25V6
0.1U_0402_25V6
1 SNB_CHG 2
1
4/12 10 +-1% 0402
AON7406L_DFN8-5
+3VDS
PC115
10U_0805_25V6K PC116
1
1
2200P_0402_50V7K PC117
PC113
PC114
10 16
PD102
REGN_CHG
0.01U_0402_50V7K PC118
0.01U_0402_50V7KPC118
<49> SRSET ILIM REGN
LODRV
4/11 PD103
DLIM
GND
SRN
SRP
2
1
0.01U_0402_50V7K
RB751V-40_SOD323-2 4
2
PQ106
2 1
1
PC119
PR113
+5VS VIN
11
12
13
14
15
680P_0402_50V7K
22K_0402_1%
PC121
PC120
2
3
2
1
DL_CHG
1U_0603_25V6K
SRN_CHG
SRP_CHG
2
CHRG_ADP_DET <30>
1
4/12
PR114 PR115
18.2K_0402_1% 127K_0402_1% PR116 PR117
1M_0402_5% 10K_0402_5%
PD104 1 2
<49> V_3.9K
2
LL4148_LL34-2
2 1
0.01U_0402_50V7K
100P_0402_50V8J
1
PC123
PR120
1
PC122
0_0402_5%
B PR118 PR119 1 2 B
2
10K_0402_1% 20K_0402_1%
2
1
2
PR121 PC124
0_0402_5% 0.1U_0603_25V7K
2
1 2
PR122
1
D 0 +-5% 0402
2 PQ108 1 2
G CURRENT_ADC <30>
100P_0402_50V8J
CHRG_RST <30> S
3
2N7002KW 1N SOT323-3
1
1
PC125
@ PC126
0.22U_0402_6.3V6K
2
B+
VIN
2200P_0402_50V7K
2200P_0402_50V7K
2200P_0402_50V7K
2200P_0402_50V7K
2200P_0402_50V7K
2200P_0402_50V7K
6.8P_0402_50V8C
6.8P_0402_50V8C
6.8P_0402_50V8C
6.8P_0402_50V8C
6.8P_0402_50V8C
6.8P_0402_50V8C
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
82P 50V J NPO 0402
82P 50V J NPO 0402
82P 50V J NPO 0402
82P 50V J NPO 0402
82P 50V J NPO 0402
82P 50V J NPO 0402

1
1
PC130
PC129
PC131
PC133
PC132
PC134
PC136
PC135
PC137
PC143
PC142
PC144
PC147
PC146
PC148
PC151
PC150
PC152
PC139
PC140
PC141
PC145
PC149
PC153
PR124 PR125
49.9K_0402_1% 576K_0402_1%
1 2 1 2
2
2
VOLTAGE_ADC <30> @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @
100P_0402_50V8J
A A
1
1
PC127
PR126 PC128
49.9K_0402_1% 0.22U_0402_6.3V6K
2
for RF request, 8/6

2

CHARGER
5 4 3 2 1
5 4 3 2 1
PQ306
1
2N7002KW 1N SOT323-3 D PR316
2 0_0402_5%
EN_P1V5 <30,33,39,44>
+5VLP S
G 1 2
3
+3VDS
100K_0402_1%
1
PR326
PQ305A
6
D D
2
2
PQ305B
PC320
1
3
100P_0402_50V8J <1>5V=283KHz 3V=330KHz (Vin=6.5 ~ 12v)
1 2
<2>5V=321KHz 3V=375KHz (Vin=12 ~ 25v)
5
SB00000SA00 PR304 PR305 (By Rton= 68K ohm)
13.7K_0402_1% 30K_0402_1% +5VDSP
4
1 2 2 1
<30,34> KBC_PWR_ON +3VDSP
68K_0603_5%
PR308 124K +-1% 0402
PR309 115K +-1% 0402

B+ B++ PR306 PR307 B++
20K_0402_1% 20K_0402_1%
1
2 1 1 2
1 2
PR310
2200P_0402_50V7K
2200P_0402_50V7K
68P_0402_50V8J
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
82P 50V J NPO 0402
82P 50V J NPO 0402

ENTRIP2 2
ENTRIP1 2
68P_0402_50V8J
10U_0805_25V6K
0.1U_0402_25V6
1
PC306
PC307
PC308
PC309
PC323
PC325
@ PJP301
1
1
PC324
PC322
PC305
PC304
PC303
FB_3V
FB_5V
PAD-OPEN 1x3m
1
PQ301 PC321
2
5
1U_0402_10V6K @ @
For HP request, 11/5
2
5
SIS412DN-T1-GE3 1N POWERPAK1212-8
@ @
2
@ PR311
1
0_0402_5% PU301
1 2
<14> 3VDS_PG
FB2
ENTRIP2
TON
ENTRIP1
FB1
4 21
C PG_3V_5V 6 PAD 4 C
PC310 PR313 PGOOD 20
for RF request, 8/6 0.1U_0603_25V7K 2.2_0603_5% BYP1 PR312 PC311 PQ302 for RF request, 8/6
2 1BST_3V-1 1 2 BST_3V 7 2.2_0603_5% 0.1U_0603_25V7K SIS412DN-T1-GE3 1N POW ERPAK1212-8
1
2
3
BOOT2 19 BST_5V 1 2 BST_5V-1 1 2
3
2
1
RT8243AZQW W QFN 20P BOOT1
PL303 UG_3V 8
4.7U 20% VMPI0703AR-4R7M-Z01 5.5A UGATE2 18 UG_5V PL302
1 2 UGATE1 2.2UH +-20% ETQP3W 2R2W FN 8.5A
+3VDSP +5VDSP
LX_3V 9 1 2
PHASE2 17 LX_5V
PHASE1
1
1
4.7_1206_5%
4.7_1206_5%
PR314
10
PR315
LG_3V
LGATE2
MDV1526URH 1N PDFN33-8
5
16 LG_5V
ENLDO
LGATE1
LDO5
LDO3
ENM
2200P_0402_50V7K
2200P_0402_50V7K
VIN
6.8P_0402_50V8C
6.8P_0402_50V8C
0.1U_0402_25V6
0.1U_0402_25V6
220U_6.3V_M
220U_6.3V_M
1 1
82P 50V J NPO 0402
82P 50V J NPO 0402

2
2
4
1
1
PC326
PC327
PC328
PC330
PC331
PC332
+ +
PC329
PC314
PC315
PC333
11
12
13
14
15
1
1
PC313
PQ303 4
680P_0402_50V7K
680P_0402_50V7K
PQ304
PC312
AON7406L 1N DFN
2
2
@ @ @ @ 2 2 @ @ @ @
+3VLP
2
1
2
3
2
PR321 Typ: 175mA
3
2
1
1
499K_0402_1%
1 2 ENLDO_3V_5V PC302
B++
1
4.7U_0805_10V6K
2
1
100K_0402_1%
1U_0402_10V6K
0.1U_0603_25V7K
1
1
PC319
PC316
for RF request, 8/6
PR325
for RF request, 8/6
+5VLP
2
10K_0402_1% PR324
2
2
B
Typ: 225mA B
1
PC317
4.7U_0805_10V6K
2
+3VLP
PJP302
JUMP_43X118
+5VDSP 1
1 2
2 +5VDS
PJP303
+3VDSP JUMP_43X118
1 2
+3VDS
1 2
PJP306
JUMP_43X39
1 2
+5VLP 1 2 +5VL
A A

3VDSP/5VDSP
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 15W 0.3
5 4 3 2 1
5 4 3 2 1
PL401
HCB1608KF-121T30_0603 PC402 PR418
B+ 1 2 B+_1.35V 0.22U_0402_10V6K 2.2_0603_5%
1 2 1 2
68P_0402_50V8J
2200P_0402_50V7K
10U_0805_25V6K
0.1U_0402_25V6
4.7U_0805_25V6-K
82P 50V J NPO 0402
PR402
1
0_0402_5%
PC419
PC401
PC403
PC404
PC405
PC406
1 2
+1.35VP
2
@ @
+0.675VSP
BST_1.35V
+0.675VSP
DH_1.35V
LX_1.35V
D D
+1.35VP
5
10U_0603_6.3V6M
10U_0603_6.3V6M
1
1
for RF request, 8/6
PC407
PC408
16
17
18
19
20
2
4 PU401
VLDOIN
PHASE
UGATE
BOOT
VTT
21
PL402 PQ401 PAD
2.2UH_VMPI0703AR-2R2M-Z01_8A_20% SIS412DN-T1-GE3 1N POW ERPAK1212-8 DL_1.35V 15 1
1
2
3
LGATE VTTGND
1 2
+1.35VP 14
PGND VTTSNS
2
5
PR403
15.8K +-1% 0402
PR404 1 2 CS_1.35V 13 3
4.7_1206_5% CS RT8207MZQW _W QFN20_3X3 GND
330U_2.5V_M
1
2
4 12 4 VTTREF_0.675V
+ PR405 +5VDS VDDP VTTREF
PC409
1SNB_1.35V
5.1_0603_5%
1 2 VDD_1.35V 11 5 +1.35VP +1.35VP
2 +5VDS VDD VDDQ
PGOOD
680P_0603_50V7K PQ402
1
2
3
1
MDV1526URH 1N PDFN33-8
TON
PC411 PC412 PC413
PC410
FB
S5
S3
1U_0603_10V6K 1U_0603_10V6K 0.033U_0402_16V7K
2
2
10
6
C PR419 C
@ 100K_0402_5%
TON_1.35V
FB_1.35V
S3_1.35V
+3VS 1 2
1.35V_PG PR406
10K_0402_1%
1 2 +1.35VP
7/11 PR407
887K_0402_1% @ PC414
B+_1.35V1 2 .1U_0402_16V7K
1 2
PR408
41.2K_0402_5%
D
3 1 1 2
PQ403
1
2N7002KW 1N SOT323-3
G
2
PC415
.1U_0402_16V7K
2
<30,33,39,43> EN_P1V5
1
PR411 +3VDS
10K_0402_1%
PR412
For HP request, 11/5
100_0402_5%
2
1
0_0402_5%
2
1 2 8/1
PR417
B <14,30,31,34,39> SLP_S3# B
PR416
4.7K +-5% 0402 PR413
100K_0402_1%
2
1
PR414
1
@ PC416 @ PC417 0 +-5% 0402
0.1U_0402_10V7K 0.1U_0402_10V7K 1 2
DDR3_SET <14>
2
1
1
PD401
1
BAT54CW _SOT323-3
PC418 @ PR415
.1U_0402_16V7K 10K_0402_5%
2
2
2
<14> SLP_S4# KBC_DS3_EN <30,5>
PJP401
JUMP_43X118
1 2
+1.35VP +1.35V
PJP402
JUMP_43X39
1 2
A +0.675VSP 1 2 +0.675VS A

DDR Power
5 4 3 2 1
5 4 3 2 1
PL501
HCB2012KF-121T50_0805
B+_1.05V 1 2
B+
2200P_0402_50V7K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
68P_0402_50V8J
0.1U_0402_25V6
D D
82P 50V J NPO 0402

1
1
PC504
PC505
PC502
PC503
PC512
PC513
2
2
@ @
+3VS
5
1
for RF request, 8/6
@ PR511 PR502 PC506
100K_0402_5% 2.2_0603_5% 0.22U_0603_16V7K PQ501
<31> 1.05VM_PG 1 2BST_1.05V-1 1 2 4 SIS412DN-T1-GE3 1N POW ERPAK1212-8
2
7/17 PU501
PR503 1 10 BST_1.05V
3
2
1
86.6K +-1% 0402 PGOOD VBST
PR504 1 2 TRIP_1.05V 2 9 DH_1.05V PL502
100_0402_5% TRIP DRVH 2.2UH +-20% ETQP3W 2R2W FN 8.5A
,30,31> SIO_SLP_A#
1 2 EN_1.05V 3
EN SW
8 LX_1.05V 1 2
+1.05VMP
FB_1.05V 4 7
VFB V5IN
+5VDS 4/11
1
RF_1.05V 5 6 DL_1.05V
RF DRVL PR505
1
11 4.7_1206_5%
.1U_0402_16V7K
TP
1
5
C PC507 1 C
2
1
TPS51212DSCR_SON10_3X3 1U_0603_6.3V6M
PC508
2
PR506 + PC510
220U_B2_2.5VM_R15M
1SNB_1.05V
470K_0402_1%
2
@
2
4 2
PC511
3
2
1
680P_0603_50V7K
2
PQ502
AON7406L 1N DFN
PR508
5.11K_0402_1%
2 1
PQ503
2
2N7002KW 1N SOT323-3
D
1
2 PR510
4> KBC_PWR_ON# 10K_0402_1%
G
S
3
PJP501
JUMP_43X118
B 1 2 B
+1.05VMP +1.05VM
4/11
A A

1.05VMP
5 4 3 2 1
A B C D
10K_0402_1% 100K_0402_1%_TSM0B104F4251RZ
10K_0402_1%_TSM0A103F34D1RZ
CPU_VREF PR244
2.1K_0402_1%
phase3 2 1
4700P_0402_16V7K
37W pop, 47W up unpop
1
255K_0402_1%
274K_0402_1%
88.7K_0402_1%
1
1
100K_0402_1%
PH201
PH202
1
1
PC201
PR204
PR208
PR210
63.4K_0402_1%
@ PR201 CSP3
0.15U_0402_10V6K
1
@ PR206
10K_0402_1% EMI Part (47.1) RF Part (47.3) EMI Part (47.1)
1
PR214
PC209
2
1 2
3.01K_0402_1%
CPU_B+
2200P_0402_50V7K
EMI@ PR243
0.1U_0402_25V6K
EMI@ PC260
2
PR216
68P_0402_50V8J
10U_0805_25V6K
10U_0805_25V6K
470P_0402_50V7K 4.7_1206_5% CSN3
82P 50V J NPO 0402
2
1 1
1 2 1 2
1
EMI@ PC232
EMI@ PC238
@RF@ PC265
@RF@ PC268
PC229
PC230
1
1
39K_0402_1%
150K_0402_1%
150K_0402_1%
150K_0402_1%
.1U_0402_16V7K
2
1
PR205
PR207
PR209
PR211
2
1
PR203
PC202
2 3
9
PR202 5 PGND2 4 1 4
+VCC_CORE
2
39K_0402_1% PR218 2.2_0402_5% VIN VSW
2
1 2 6 3
BOOT_R PGND1 0.15UH +-20% ETQP4LR15AFM 29A
2
1 2 7 2 PL203
BOOT VDD
B-RAM
PC248 .1U_0402_16V7K
OCP-I
F-IMAX PWM3 8 1 1 2 SKIP
PWM SKIP#
PR212 SLEWA PR217 EMI Part (47.1)
10K_0402_1% O-USR PU204 0_0402_5%
2 1 CSD97374CQ4M_SON8_3P5X4P5
CPU_B+ PJP201
PC210 1 2
16
15
14
13
12
11
10
9
PU201 1U_0402_6.3V6K
2 1 CPU_B+ PAD-OPEN 1x3m B+
+5VDS
OCP-I
THERM
VBAT
SLEWA
B-RAMP
F-IMAX
IMON
O-USR
PR227
0_0402_5%
CSP1 17 8 1 2 1 1 1 2 1
CSP1 VR_ON PWR_GD <30,31,5>
100U_25V_M
100U_25V_M
100U_25V_M
@EMI@ PL201
18 7 + + +
PC233
PC234
PC235
37W pop, 47W up unpop CSN1 SKIP FBMA-L11-453215-800LMA90T_1812
CSN1 SKIP#
@ PR242 CSN2 19 6 PWM1
0_0402_5% CSN2 PW M1 2 2 2
1 2 CSP2 20 5 PWM2 Acoustic (37.2)
+3VS CSP2 PW M2 @ @
CSP3 21 TPS51631RSMR_QFN32_4X4 4 PWM3
2 CSP3 PW M3 2
CSN3 22 3 PR241
10K_0402_1%_TSM0A103F34D1RZ
CSN3 PGOOD VGATE <31>
PR221 GFB 23 2 2.1K_0402_1%
0_0402_5% GFB VDD 2 1
VR_HOT#
1 2 24 1
ALERT#
VFB SDIO
DROOP
<10,9> VSSSENSE VFB VDIO
1
COMP
10_0402_1%
10K_0402_1%
VREF
VCLK
GND
PAD
V5A
PR252
PR253
PH203
1 2
63.4K_0402_1%
0.15U_0402_10V6K
<9> VCCSENSE
1
EMI Part (47.1)RF Part (47.3) EMI Part (47.1) CSP1
1
PR225
PC213
PR224
25
26
27
28
29
30
31
32
33
1
0_0402_5% PC250 CPU_B+
1 2
2200P_0402_50V7K
3.01K_0402_1%
1U_0603_10V6K EMI@ PC259 EMI@ PR240
0.1U_0402_25V6K
2
68P_0402_50V8J
10U_0805_25V6K
10U_0805_25V6K
470P_0402_50V7K 4.7_1206_5% CSN1
82P 50V J NPO 0402

2
2
1 2 1 2
PR229
PC246
1
EMI@ PC214
EMI@ PC215
@RF@ PC264
@RF@ PC267
PC211
PC212
2.2P_0402_50V8C
VR_HOT#
1 2 PR219
+3VS
ALERT#
2.94K_0402_1%
SCLK
2
PR220 1 2 2 3
9
10K_0402_1%
1 2 5 PGND2 4 1 4
CPU_VREF PR223 2.2_0402_5% VIN VSW +VCC_CORE
220P_0402_25V8K
1 2 6 3
68P_0402_50V8J
PR215 PC245
BOOT_R PGND1
@RF@ PC257
@RF@ PC258
10K_0402_1% 330P_0402_50V7K 0.15UH +-20% ETQP4LR15AFM 29A
1
1
1 2 1 2 1 2 7 2 PL204
BOOT VDD
PC203 PC253 .1U_0402_16V7K
0.33U_0402_10V6K PWM1 8 1 1 2 SKIP
PWM
2
2
SKIP# PR233
PU202 0_0402_5%
CSD97374CQ4M_SON8_3P5X4P5
PR226
10_0603_1% RF Part (47.3)
1 2 PC216
3
+5VDS 1U_0402_6.3V6K
3
1
2 1
PC254 +5VDS
1U_0603_10V6K
10K_0402_1%_TSM0A103F34D1RZ
2
PR250
2.1K_0402_1%
2 1
1
PH204
63.4K_0402_1%
0.15U_0402_10V6K
1
EMI Part (47.1) RF Part (47.3) EMI Part (47.1) CSP2
1
PR235
PC217
+VCCIO_OUT CPU_B+
1 2
2200P_0402_50V7K
3.01K_0402_1%
0.1U_0402_25V6K
EMI@ PC263 EMI@ PR249
2
10U_0805_25V6K
10U_0805_25V6K
68P_0402_50V8J
470P_0402_50V7K 4.7_1206_5% CSN2

82P 50V J NPO 0402
PR239
1 2 1 2
1
1
EMI@ PC207
EMI@ PC208
@RF@ PC266
@RF@ PC269
PC204
PC205
100 +-5% 0402
100 +-5% 0402
100 +-5% 0402

2
2
PR230
PR231
PR232
PC256 2 3
9
.1U_0402_16V7K
1
5 PGND2 4 1 4
PR245 2.2_0402_5% VIN VSW +VCC_CORE
1
1 2 6 3
BOOT_R PGND1 0.15UH +-20% ETQP4LR15AFM 29A
1 2 SDIO 1 2 7 2 PL202
<9> VR_SVID_DAT PR236 PC261 .1U_0402_16V7K
BOOT VDD
22 +-5% 0402 PWM2 8 1 1 2 SKIP
PWM SKIP#
1 2 ALERT# PR247
<9> VR_SVID_ALRT# PR237 PU203 0_0402_5%
22 +-5% 0402 CSD97374CQ4M_SON8_3P5X4P5
4
1 2 SCLK 4
<9> VR_SVID_CLK PR238

22 +-5% 0402 PC262
<24,5> KBC_PROC_HOT_R 1 2 VR_HOT# 1U_0402_6.3V6K
PR228 2 1
0_0402_5% +5VDS
1
@ PC206
47P_0402_50V8J
2
PWR-CPU_CORE
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.3
Date: Sheet 46 of 51
A B C D
5 4 3 2 1
2 X 470u/4m
+VCC_CORE 30 X 22u/0805
+VCC_CORE
D D
470U_D2_2VM_R4.5M
470U_D2_2VM_R4.5M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
1 1
1 1 1 1
1
+ +
PC2001
@ PC2002
PC2005
PC2006
PC2007
PC2008
PC2009
PC2010
PC2011
PC2012
2
2
2 2 2 2 2 2
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
1 1 1 1
1
1
PC2013
PC2014
PC2015
PC2016
PC2017
PC2018
PC2019
PC2020
PC2021
PC2022
PC2023
2
2
2 2 2 2
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
1
1
C C
PC2024
PC2025
PC2026
PC2027
PC2028
PC2029
PC2030
PC2031
PC2032
PC2033
PC2034
2
B B
A A

PROCESSOR DECOUPLING
5 4 3 2 1
A B C D
1 1
2
PC602
+3VS 680P_0402_50V7K
1 SNUB_+1.5V
7/17
1
PJP602
4.7_0402_1%
2
JUMP_43X39
PR601
@ 4X4
2
2 PU601
SY8032ABC_SOT23-6 PL602
1
0.47UH +-20% PCMC042T-R47MN 6A PJP601
4
IN LX
3 LX_1.5V 1 2
+1.5VSP +1.5VSP 2
2 1
1
+1.5VS
5 2 PR602 @ JUMP_43X39
PG GND 10K_0402_5%
150K_0402_1%
1
6 1 EN_1.5V 1 2
+3VS
22P_0402_50V8J
22U_0805_6.3VAM
22U_0805_6.3VAM
FB EN
1
PR603
22U_0805_6.3VAM
1
@ PC603
PC604
1
0.1U_0402_10V7K
PC605
PC606
2
PC601
+1.5V_PCIEP
2 2
2
2
TDC=0.46A
Peak Current=0.66A
1
1.5VS_PG <31> PR604
100K_0402_1%
7/17
1
2
@ PR605
100K_0402_5% PQ601
2N7002KW 1N SOT323-3
D
1
2
2
<34,9> SLP_S3
G
S
3
+3VS
3 3
4 4

1.5VSP
A B C D
5 4 3 2 1
D D
PQ1101 +3VDS
PR1108 NDS0610_NL_SOT23-3
100_0402_5%
1
S
D
ADP_SIGNAL 1 2 3 1
PR1109
3
<42> V_3.9K 100K_0402_5%
1
1
G
2
+3VDS PR1111
2
PR1125 PR1110 0_0402_5% PD1101 SRSET <42>
C 13K_0402_1% 8.06K_0402_1% @ BAV70W _SOT323-3 C
2
B
PR1112
2
1
100K_0402_5% C
VIN
E
3 1 1 2 2 PQ1103
C
PQ1102 B MMBT3904W H_SOT323-3

MMBT3906H_SOT23-3 E
3
1
1
PR1114 PR1115
PR1113 220K_0402_5% 100_0402_5%
8.66K_0402_1%
2
2
1
PQ504 1
2N7002KW 1N SOT323-3 ADP_A_ID <30> OCP_A_IN <30>
D
1
PR1116 PC1103
2 3.9K_0402_5% 3900P_0402_50V7K
0> ADP_ID_CHK
1
1
G 2 +3VDS
3
E
S PR1117 PR1118
3
130K_0402_1%
B
45.3K_0402_1% @ PR1119 2 PQ1104
PD1102 0_0402_5% MMBT3906H_SOT23-3
C
GLZ4.7B_LL34-2
2
1
PR1120
274K_0402_1%
B P1 1 2 B
+3VDS
1
+5VL
PR1121
200K_0402_1% PR1122
47K_0402_5%
8
2
3
P
+ 1
O ADP_PRES <30,34>
1
2
-
G
PR1123 PU1102A
86.6K_0402_1% LM393DR2G SO8
4
1
PR1126
2
100K_0402_1%
1
PR1124 @ PC1104
2
47K_0402_5% 0.01U_0402_16V7K
2
2
+5VL
A A

ADP_OCP
5 4 3 2 1
5 4 3 2 1
1
PD1201
PR1202 BAV99W T1G_SC70-3
10K_0402_5%
1 3
MFET_B 1 2
PR1201
10K_0402_5%
BATT_A
2
D D
1
1
PD1202 PR1204
SX34H_SMA PR1203
SB00000SA00 470K_0402_5%
3
1 2 MFET_A 10K_0402_5%
PQ1201A
PQ1201B
2
2
LATCHED_ALARM 2 5
+3VDS
6
1
PQ1202A
PR1205 PR1206
470K_0402_5% 220K_0402_5% 2
4
4
5 5
2
1
3 6 6 3
2 7 7 2 BATT_A <30> FET_A
1 8 8 1
BATT PQ1203 PQ1204
AO4409L 1P SO8 AO4409L 1P SO8
PQ1205 PQ1206
AO4409L 1P SO8 AO4409L 1P SO8
1 8 8 1
2 7 7 2 BATT_B
3 6 6 3
5 5
1
1
C C
PR1207 PR1208
4
470K_0402_5% 220K_0402_5%
2
2
1
PR1209
1 2 MFET_B 10K_0402_5%
PD1203
2
SX34H_SMA
BATT_B
1
1
PR1210
10K_0402_5%
SB00000SA00 PR1211
6
470K_0402_5%
MFET_A 1 2
PQ1207B
PQ1207A
3 2
2
2
10K_0402_5% LATCHED_ALARM 5 2
PR1212
4 +3VDS
3
PD1204
BAV99W T1G_SC70-3
PQ1202BB
1
B 5 B
4
<30> FET_B
PR1213
1M_0402_5%
1 2
+3VDS
4/11 +5VL +3VDS
BATT 4/11 4/11
1
1
1
PR1214
1
10K_0402_5% PC1201 PR1215

0.1U_0603_25V7M 100K_0402_5%
2
2
8
PR1216
2
200K_0402_1% 5
P
+ 7 LATCHED_ALARM
LATCHED_ALARM <30>
2
6 O
-
G
PU1102B
1
LM393DR2G SO8
4
PR1217
64.9K_0402_1%
1
PR1218
1 2
A 137K_0402_1% D A
2
2
G
S PQ1209
3
2N7002KW 1N SOT323-3
Battery selector
5 4 3 2 1
5 4 3 2 1
Version Change List ( P. I. R. List ) Page 1

Request
Item Page# Title Date Owner Issue Description Solution Description Rev.
D D
2012/08/06
1 42 Reserve PC130,129,131,139,133,132,134,140,136,135,137,141,143,142,144,145,146,147,148,149,151,150,152,153,138 RF solution
2 43 Reserve PC324,322,323,325326,327,328,329,330,331,332,333
2012/08/06 RF solution
3 43 Add PC305,304,308,309 2012/08/06 RF solution
4 44 Reserve PC419,401 2012/08/06 RF solution
5 44 Add PC403,404,405 2012/08/06 RF solution
6 45 Reserve PC512,513 2012/08/06 RF solution
7 45 Add PC502,503 2012/08/06 RF solution
8 47 Reserve PC264,267,266,269,265,268 2012/08/06 RF solution
9 47 Add PC214,215,207,203,232,236 2012/08/06 RF solution
10 47 Change PC233,234 from SF000001280 to SF000004M00 2012/08/09 Change the hieght to 6mm
11 46 Change PR234 from 19.1K to 62K 2012/08/10 HP suggestion
12 47 Change PQ203,204,211 from SB00000K300 to SB00000U300
2012/09/11 Design change
13 47 Change PQ201,205,209 from SB00000SJ00 to SB00000WX00
14 43 Change PQ301,302 from SB00000JM00 to SB00000IA00 2012/09/17 Design change
15 43 Change PQ303 from SB00000CT00 to SB00000H700 2012/09/17 Design change
C C
16 43 Change PQ304 from SB00000N800 to SB00000TZ00 2012/09/17 Design change
17 44 Change PQ401 from SB00000H800 to SB00000IA00 2012/09/17 Design change
18 44 Change PQ402 from SB00000N800 to SB00000TZ00 2012/09/17 Design change
19 45 Change PQ501 from SB00000H800 to SB00000IA00 2012/09/17 Design change
20 45 Change PQ502 from SB00000N800 to SB00000H700 2012/09/17 Design change
21 50 Reserve PR1101,1102,1103,1104,1105,1106,1107,PC1101,1102,PU1101,PD1101
2012/09/25 HP suggestion
22 44 Change PD401 from SC600000D00 to SCS00006400 2012/10/2 HP suggestion
23 44 Change PR416 from SD034100380 to SD028470180 2012/10/2 HP suggestion
24 42 Change PL101 from SH00000MR00 to SH00000NW00 2012/10/2 Design change
25 47 Change PR240,243,249 from SD001470B80 to SD000010280
26 47 Change PC233 from SF000001280 to SF000004M00 2012/10/2 Design change
B B
A A

PWR - PIR
5 4 3 2 1
5 4 3 2 1
Version Change List ( P. I. R. List ) for HW Circuit

Request
D 1 30 KBC 08/18 HP The quad-mode does not require any GPIO from KBC Delete R1348 & R1349 and Add R541 and R542 0.2 D
2 31 PWR OK 08/18 HP Makes the power good circuit working. Non-install R284 0.2
3 26 MXM 08/28 Compal MXM Card can't be recognized in OS. Change U37 to MC74VHC1G08DFT2G (Non-OD type) 0.2
4 36 Switch/MUX 09/07 HP Move D-Sub connector on M/B Add VGA filter circuit and connector 0.2
5 30 KBC 09/08 HP SUSCLK is off during DS3 condition Add Y4, C423, C424 ; Delete R258, R264 0.2
6 30 KBC 09/08 HP Simplify the KBC solution for MEC1322 Delete R262,R266,R219,R216,R241,R242,R271,R253 0.2
7 25 NGFF 09/08 HP Add PU resistor for WWAN_FULL_PWR/WWAN_RSVD2 0.2

C
8 39 NFC 09/10 HP KBC detection of NFC module Add 200K (R1377) PD resistor to NFC_UART_RX 0.2 C
9 39 NFC 09/10 HP Power rail option for NFC module Add +3VM_LAN (R1376) for NFC module 0.2
10 9 CPU 09/11 HP Remove RC102 and RC103 0.2
11 20 PCH 09/11 HP Connect PCH's pin AD12 to +3V_PCH directly Remove RH226 0.2
12 5 CPU 09/11 HP Connect CPU.AT26 pin to CPU_PLTRST# directly Remove RC66 0.2
13 5 CPU 09/11 HP Connect CPU.AL34 pin to H_CPUPWRGD directly Remove RC30 0.2
14 9 CPU 09/11 HP Connect SLP_S3# to QC5.5 direcly. Remove RC93 0.2

B
15 33 DOCKING 09/11 HP Connect EN_P1V5 to JDOCK1.140 directly. Remove R351 0.2 B
16 33 DOCKING 09/11 HP Connect ON/OFFBTN_KBC# to Docking directly. Remove R336 0.2
09/11 Simplify PCH solution for PCIE CLK Group Remove RH107,RH103,RH114,RH116,RH122
17 15 PCH HP 0.2
RH124,RH126,RH127,RH129,RH130
18 14 PCH 09/11 HP Reassignement GPIO for "BT_OFF" Change it from GPIO72 to GPIO61 0.2
19 30 KBC 09/11 HP Reserve for SUSACK# signal Uninstall R436 and add R1378 0.2
09/11 HP Reassigned BRD_ID4 to GPIO40 for CP support Connect RH180.1 to +3VS & RPH1.8 to GND 0.2
20 18 PCH
and update table for DB1-R
A
21 30 KBC 09/12 HP Simplify the KBC solution for MEC1322 Delete R249,R251,R256,R277 0.2 A
22 36 Switch/MUX 09/12 HP eDP trace length over Intel's specification Change solution to PS8321 0.2
HW Changed-List History-1
5 4 3 2 1
5 4 3 2 1

Request
D 23 29 LAN 09/12 HP Avoid IEEE failure with trace stub lines Add Lan switch solution PI3L500-AZFEX (U43) 0.2 D
24 39 I/O CONN 09/12 HP Move Hall sensor IC on Function board Add +3VDS & LID_SW# pin to JFB1 0.2
25 22 eDP 09/13 Compal Avoid LVDS Burn out Risk Rearrange pin assignment of JEDP1 0.2
26 31 POK CKT 09/13 HP Modify Power OK circuit Delete UH7, RH235 ; Add R1379 0.2
27 39 I/O CONN 09/19 HP Prevent Card Reader can't be recognized issue Add R1380 for PCH_PCIE_WAKE# 0.2
28 13 PCH 09/19 HP Disable the unlock of ME descriptor Change QH11 to P-MOSFET 0.2
29 37 Smart Card 09/20 HP RC delay is NOT good as reset Delete CC67,R393, then connect U30.23 to PLT_RST#. 0.2
C 30 26 CODEC 09/20 HP Uninstall RA13 and CA20 0.2 C
KBC appears drives high during S3, so the change

31 14 PCH 09/20 HP Change RH74 from 10K to 100K Ohm 0.2
to aviod the leakage without losing functionality.
32 31 PWR OK 09/23 HP Modify net name for easy read Modify VR_ON to PWR_GD and PWR_GOOD_3 to VGATE 0.2
33 5 XDP 09/25 HP Connect PM_PWROK to JXDP1.47 via 0 Ohm (RC107) 0.2
34 30 KBC 09/25 HP Resolve ME LAN failures Delete R537, Q73, D21 0.2
35 35 MXM 09/27 HP There is yellow bang in device manager Add pull high resistor (R1382,R1383 & R1384) to +3VS 0.2
B 36 38 KB Backlight 09/27 HP Change R408 to 200K Ohm, and uninstall C295 0.2 B
HP Certain ports have better drive strength than others

37 35 MXM 10/11 DP port re-assignment 0.3
when the system is in DC mode
CODEC 10/11 IDT Change RA14 to 0Ohm, C95 to 0.47uF, R97,R98,R102,R104 0.3
38 26,27
to 1%
Reserve RC108, UH6, CH113, R1388. Change U17.85 and
R1388 connection netname to RSMRST#_EC. Change R455
39 5,14 KBC 10/12 HP To enable Intel Deep SX 0.3
30,34 to 47K. Add Q18A, C431, R1387. Modify +3V_PCH power
circuit
A 40 9 CPU 10/16 HP To enable Intel Deep SX Add QC6 and connect to KBC_PWRON 0.3 A
41 41 CPU 10/16 HP To enable Intel Deep SX Add Q176 and add connection to PLT_DET 0.3
5 4 3 2 1
5 4 3 2 1

Request
42 25 WLAN 10/16 HP To enable Intel Deep SX Delete R64, Install R1354 0.3
D D
43 29 LAN 10/16 HP To enable Intel Deep SX Change connection of R1359 to KBC_WAKE# 0.3
44 30 KBC 10/16 HP To enable Intel Deep SX Change R227 to 3.3K 0.3
45 30 KBC 10/16 HP To enable Intel Deep SX Connect R215.2 to GND, Delete C186 0.3
Remove current VCC1_PWRGD connection to JP6.16.
46 30 KBC 10/16 HP To enable Intel Deep SX Then add a 4.7 K resistor between JP6.16 and new signal 0.3
VCC1_PWRGD_SUS#.
Rename CHARGER_CLK & CHARGER_DAT to
47 30 KBC 10/16 HP To enable Intel Deep SX 0.3
KBC_WAKE# & CHRG_RST
C
Change R1378 to 100K and rename U17.41 to iSCT_LED# C
48 30,39 KBC & I/O 10/16 HP To enable Intel Deep SX Delete C322 0.3
Change JTB1.98 to iSCT_LED#.
49 30 KBC 10/16 HP add R1391between U18.6 pin and signal PVT_SCLK 0.3
Connect R215.2 to GND, Delete C186
Change R227 to 10K
50 30 KBC 10/16 HP Simplify the KBC circuit 0.3
Delete R239, R240 and connect to KBC (U17) directly.
Delete R218 andconnect to KBC (U17) directly.
51 30 KBC 10/16 HP Simplify the KBC circuit Delete R1381 and connect JCR1.5 to +5VDS. 0.3
B
Change R615 to 470K, R610 to 470Ohm and RH247 to 10K B
Change R1387,R137,R1382,R1383,R1384 to 4.7K, RC108 to 10K.

5,9,14 Delete Q177,QC1,RC12,QC5B,QC6B,R461,Q2,RC90.
16,20,24 Install RH209, R492, RC108, RH246, CH113 and UH6. 0.3
52 25,30, KBC 10/20 HP Uninstall QC3, RH148, RH67, RH208.
34,35 Change R492.2 connection to PCH_THERMTRIP#_R
Connect RH247.1 to PM_RSMRST#.
Modify +1.35VS power circuit
53 14 PCH 10/20 Compal To solve bring up issue Add PU resistor (RH248) for GPIO72 0.3
A
Delete R1387, Uninstall RH246,CH113,UH6,RH209,Q176,RH247 0.3 A
54 14,30,34 PCH 10/23 Compal HP Deep SX implementation Install RH67,RH208 ;Add 4.7K (R1392) between KBC 124 pin and
signal SIO_SLP_SUS#,
5 4 3 2 1
5 4 3 2 1

Request
D Change PCH.AL6 to TBT_RR_GPIO# D
55 14,39 PCH, I/O 10/23 HP For Intel ThunderBolt REDWOOD Change RH245.2 to TBT_RR_GPIO# 0.3
Change JTB1.98 to TBT_RR_GPIO#
56 39 I/O 10/23 HP For iSCT_LED# function Add Q177 for control HDD & Wireless LED 0.3
Create about 1.36V with 47K PU when WL LED
57 25 Wireless LED 10/24 HP Add PD 33K (R1393) for WL/BT_LED# 0.3
is off
58 28 G-Sensor 10/24 HP Current connection is incorrect Connect ACCEL_INT# to U9 's pin11and leave pin 9 as NC 0.3
59 18 PCH 10/24 HP Connect RH176.2 to GND (from +3VS) and install RH176
0.3
Install RH185
C
60 25 WLAN 10/24 HP Add serial resistor R1394,R1395,R1396 for CLINK signals 0.3 C
61 14 PCH 10/25 HP Add RH249 for SLP_LAN# and change RH70 to 200K 0.3
62 14,29 PCH, LAN 10/25 HP To provide isolation Add PU RH250 for LANWAKE# and Q177 for isolation 0.3
63 25 WLAN 10/25 HP Delete R89 and R1393 0.3
64 39 I/O 10/25 HP For iSCT_LED# function Change Q178 to BSS138 and Add R1393 0.3
65 35 MXM 10/25 HP For MXM GPIO8 issue Combine Q61/Q62 to Dual 2N7002 (Q61) and Delete R137 0.3
66 34 DC-DC 10/25 HP S5 power consumption concern. Change R455 to 200K and add PD 100K (R1398) 0.3
67 29 LAN 10/26 HP +5VDS may disappear during Deep S4/S5 Connect R376.1 to +3VDS and change R376 to 10K 0.3
68 29 LAN 10/26 HP Connect DOCK_LED_LINK_LAN# to Q34.1and delete R153 0.3
69 18,32 PCH, Super I/O 10/26 HP Reassign Super I/O GPIO45 as mSATA_DET# 0.3
B
Reassign GPIO59 as WWAN_DET#_PCH and connect to B
70 17 PCH 10/26 HP 0.3

JMINI3
71 13 PCH 10/26 HP Swap QH11A.2 and QH11B.5 connection 0.3
72 35 MXM 10/28 HP For MXM GPIO8/GPIO9 issue Change MOS to Diode RB-751(D5) and R1383 to 300 Ohm 0.3
73 35 MXM 10/28 HP Connect Q60 pin 2 & pin 5 to DGPU_PWROK 0.3
74 31 PWR OK 10/31 HP To ensuret +5VDS power off Connect R291.1 to +5VL and change it to 105K Ohm 0.3
75 39 I/O 10/31 HP Change JCR1.48 & 50 from +3VDS to +3VS 0.3
76 29 LAN 11/2 HP Avoid NIC internal PHY voltage drop Reserve 10uF (C428) & change C351 to 47uF 0.3
OBS#894504- SVTP-DB1R_AB1.0: Can't record 0.3
77 27 Audio 11/2 Compal Delete Q1AB & R174 then connect HP_SENSE# to R167
sound via audio jack with external headphone
A A
78 9 CPU 11/4 Compal Change connection of QC5A.2 & QC5B.5 to SLP_S3 0.3

5 4 3 2 1
5 4 3 2 1

Request
D 79 5,15 CPU,PCH 11/04 HP Add CLKOUT_ITPXDP signals to JXDP1 pin 40 & 42 0.3 D
80 15 PCH 11/04 HP To follow ME ICC setting Change CLK_PCIE_CR# to LPT CLKOUT port 0 0.3
81 14 PCH 11/06 HP For the down power sequencing Correct connection of RH246 to 3VDS_PG 0.3
82 15 PCH 11/06 HP Avoid leckage Change CLK_PCIE_CR# back to LPT CLKOUT port 1 0.3
83 17,25 PCH 11/06 HP Follow GPIO table Correct net name to WWANSSD_M12DET and connection 0.3
84 14,25 PCH 11/06 HP Follow GPIO table Correct net name to DDR3_SET and delete Q68,R459 0.3
C C
B B
A A

5 4 3 2 1
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Intel Haswell rPGA Processor with Lynx Point-H

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DP Conn CRT FDI x2 DMI x4 Port 2,5,6

WWAN SIM Card

Dock Conn RJ45 Conn.

RTC CKT. Page 13 Line in/Line out

( O MEANS ON X MEANS OFF )

@ : means just reserve , no build

State AMT@ : means just install for support iAMT

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GPIO 51 GPIO 19 Boot BIOS Destination

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Haswell rPGA EDS

+SM_VREF_CA +DIMM01_VREF_DQ +DIMM23_VREF_DQ

20120802 HP's request

20120710 Change by HP request

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COMPENSATION PU FOR eDP

CAD Note:Trace width=20 mils ,Spacing=25mil,

T28 M27 EDP_CPU_C_AUX# C126 1 2 0.1U_0402_25V6

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CFG STRAPS for CPU

PEG DEFER TRAINING

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+VCCIO_OUT AN35 AF29

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A10 AK34 B34 K10

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Populate RD1, De-Populate RD7 for Intel DDR3

DDR_A_MA10 107 108 DDR_A_BS1 111 112

179 180 DDR_A_D60 DDR_A_D57 183 184

185 186 DDR_A_DQS#7 189 190

205 206 FOX_AS0A626-U4S6-7H

207 208 CONN@

Populate RD4, De-Populate RD8 for Intel DDR3

DDR_CKE0_DIMMB 73 74 DDR_CKE1_DIMMB DDR_B_BS2 79 80 DDR_B_MA14

DDR_B_BS2 79 80 DDR_B_MA14 DDR_B_MA9 85 86 DDR_B_MA7

DDR_B_MA10 107 108 DDR_B_BS1 DDR_B_WE# 113 114 DDR_CS2_DIMMB#

+ CD44 DDR_B_CAS# 115 116 M_B_ODT0 DDR_CS3_DIMMB# 121 122

173 174 DDR_B_D54 179 180 DDR_B_D60

179 180 DDR_B_D60 185 186 DDR_B_DQS#7

205 206 FOX_AS0A626-U4RN-7F

Security Classification Compal Secret Data Compal Electronics, Inc.

DISABLED WHEN LOW (DEFAULT) PCH_RTCX1 SAMTE_BSH-030-01-L-D-A CONN@

RH41 1 2 PCH_JTAG_TDI AE2 BD4 SATA_IREF 1 2 UMA@

@ @ @ 1 OF 11 PLT_RST# 2 2N7002KW _SOT323-3

Security Classification Compal Secret Data Compal Electronics, Inc.

20120810 HP's request <43> 3VDS_PG MC74VHC1G08DFT2G_SC70-5 150_0804_8P4R_1%

20121016 HP's request 10K_0402_5% PIRQC#

PIRQE#/GPIO2 PWRSV_SEL# <37>

Boot BIOS Strap 20120713 Add for ESD's request

20121106 Change back to CLKOUT pair 1 as HP's request LPT_PCH_M_EDS

Y43 AB35 CLK_PCIE_VGA# DGPU_PWR_EN <14,35>

PCIECLK REQ Pull UP Power Rail:

CLK_BUF_DOT96# RH1151 2 10K_0402_5%

CLK_BUF_CKSSCD# RH1191 2 10K_0402_5%