National University lab manual for electronic circuit design

Lab Manual of ‘Electronic Circuit Design’
Department of Electrical Engineering

National University of Computer and
Emerging Sciences,
Chiniot-Faisalabad Campus
EL224: ELECTRONICS CIRCUIT DESIGN

LAB MANUAL
FALL 2019
Name:
Roll No:
Section:
Page | 1
Created by: Engr. Muhammad Abdullah
Date: 2017
1st Revision By: Engr. Hamza Ahmad
Date: 2018
Last Updated by: Engr. Muhammad Arslan
Date: 2019
Approved by the HoD:
Date:
Page | 2
Table of Contents
Sr. No. Description Page No.
1 List of Equipment 4
2 Course Learning Outcomes of Lab 5
3 List of Experiments 6
4 Experiment No.1 7
5 Experiment No.2 13
17 Open-Ended Lab 67
18 Appendix A: Lab Evaluation Criteria 68
19 Appendix B: Lab Rubrics 69
20 Appendix C: Safety around Electricity 70
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List of Equipment
Sr. No. Description
1 DC Power Supply: Used to supply power to electronic components
2 Function Generator: Used to supply different type of signals
3 Oscilloscope: Used to view the waveforms from the circuit
4 Bread Board: Used to connect and test the circuit components in the lab
5 Digital Multimeter: Used to measure the value of signals for testing and verification
6 Transistors: Used for amplification and switching purposes
7 Resistors: Used for dissipation purposes
8 Capacitors: Used to store energy
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Course Learning Outcomes of Lab

Taxonomy
No. Course Learning Outcome (CLO) Statement Domain PLO Tool
Level
To Identify/Select the required components to be used in
01 Cognitive 4 4 L
the lab
To Follow the given design to implement an electronic
02 Psychomotor 3 4 L
circuit of required specifications
To design different types of oscillators circuits using
03 Psychomotor 5 4 L
combination of active and passive elements
To behave responsibly within team and perform the tasks
04 Affective 2 9 L
safely
L = Lab, Q = Quiz, F = Final
Page | 5
List of Experiments
Week Title of Experiment CLO
01 To Implement a stable bias circuit of a given Q-point 1,2,4
To Implement a Common Emitter Amplifier of given parameters and record its

02 2,4
frequency response
03 To Implement a Double Stage Amplifier and record its frequency response 2,4
04 To compare the theoretical and practical output values of a Class A Amplifier 2,4
05 To compare the theoretical and practical output values of a Class A/AB Amplifier 2,4
06 To compare the theoretical and practical output values of a Class C Amplifier 2,4
07 To Design a Wien Bridge Oscillator of given output specifications 1,3,4
08 To Design a Colpitts Oscillator of given output specifications 1,3,4
09 To Design a Square and Triangular wave Oscillator of given output specifications 1,3,4
10 To Design a Wien Bridge Oscillator of given output specifications 1,3,4
11 To Design a 555 timer Oscillator of given output specifications 1,3,4
12 To Implement a Common Source Amplifier of given parameters 2,4
13 To Implement a Common Drain Amplifier of given parameters 2,4
14 Open-Ended Lab 2,4
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EXPERIMENT 1 Date: ________________
To Implement a stable bias circuit of a given Q-point

OBJECTIVES:
 To learn the biasing of the BJT NPN Transistor
 To learn how to establish the Q-point of circuit in middle of the DC Load Line
EQUIPMENT:
 Transistor KN2222A (or any general purpose NPN transistor)
 Function Generator, Oscilloscope, DC Power Supply and DMM
 Resistors, Capacitors
INTRODUCTION:
Theory for Transistor Biasing:
A transistor must be properly biased with a DC voltage in order to operate as a linear amplifier. A DC operating
point must be set so that signal variations at the input terminal are amplified and accurately reproduced at the
output terminal. There are many schemes available to bias the transistor, but we here only study the transistor
biasing with voltage divider, because it is the most stable biasing scheme for transistor as well as mostly used.
DC Analysis of Transistor Biasing Voltage Divider Circuit:

Above biasing scheme can be best analyzed and understood if we replace R1 and R2 voltage divider with its
Thevenin equivalent as shown in Figure.
From Figure, we can write the following equations;
𝑅2
𝑉𝐵𝐵 = ( ) 𝑉𝐶𝐶 Eq. (1)
𝑅1 + 𝑅2
Page | 7
𝑅1 𝑅2
𝑅𝐵 = Eq. (2)
𝑅1 + 𝑅2
𝐼𝐸  𝐼𝐶  𝛽𝐼𝐵 Eq. (3)

𝑉𝐸 = 𝐼𝐸 𝑅𝐸  𝐼𝐶 𝑅𝐸 Eq. (4)
𝑉𝐵𝐵 = 𝐼𝐵 𝑅𝐵 + 𝑉𝐵𝐸 + 𝐼𝐸 𝑅𝐸 Eq. (5)
𝑉𝐶𝐶 = 𝐼𝐶 𝑅𝐶 + 𝑉𝐶𝐸 + 𝐼𝐸 𝑅𝐸  𝑉𝐶𝐸 − 𝐼𝐶 (𝑅𝐶 + 𝑅𝐸 ) Eq. (6)
DC Load Line:
Eq. (6) can be used to draw the DC Load line of the circuit, and can be re-written as,
𝑉𝐶𝐶 − 𝑉𝐶𝐸 1 𝑉
𝐼𝐶 = = − (𝑅 + 𝑅 ) 𝑉𝐶𝐸 + 𝑅 +𝐶𝐶𝑅
𝑅𝐶 + 𝑅𝐸 𝐶 𝐸 𝐶 𝐸
𝑉 𝑉
Put 𝑉𝐶𝐸 = 0  𝐼𝐶 = 𝑅 +𝐶𝐶𝑅  Saturation point is: (0 , 𝑅 +𝐶𝐶𝑅 )
𝐶 𝐸 𝐶 𝐸
Put 𝐼𝐶 = 0  𝑉𝐶𝐸 = 𝑉𝐶𝐶  Cutoff point is: (𝑉𝐶𝐶 , 0)
Fig 1.3: DC Load Line and Location for Ideal Q-point

Linear Operation:
The region along the load line including all points between saturation and cutoff points is generally known as
the linear region of the transistor’s operation. As long as the transistor is operated in this region, the output
voltage is ideally a linear reproduction of the input.
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Q-point:
When we bias a transistor, we establish the DC voltage (VCE) and current values (IC) in the circuit. These
values establish the DC operating point of the circuit usually known as the Q-point (quiescent point) of the
circuit. If the Q-point of the amplifier is not set properly, it can go into saturation or cutoff when an input
signal is applied and hence can produce the distorted output wave. The point at which the load line intersects
a characteristic curve represents the Q-point for that particular value of IB.
Ideal Location for Q-point:
To amplify the input signal linearly without distortion, ideally Q-point should lie in the middle of the DC load
line. The formulas to calculate the ‘𝐼𝐶 ’ and ‘𝑉𝐶𝐸 ’ at ideal Q-point are given in Eq.(7) and Eq.(8).
𝑉𝐶𝐶
𝑉𝐶𝐸 = Eq.(7)
2
𝑉𝐶𝐶
𝐼𝐶 = Eq.(8)
2(𝑅𝐶 + 𝑅𝐸 )
Lab Exercise
Design and Implement a stable bias circuit with Q-point of 𝑰𝑪 = 2.5 mA and 𝑽𝑪𝑬 = 7.5 V
Step # 1: Find 𝑉𝐶𝐶 using Eq.(7)
Step # 2: Find 𝑅𝐶 + 𝑅𝐸 using Eq.(8)
Step # 3: Choosing 𝑅𝐸 and 𝑅𝐶

We are free to choose 𝑅𝐶 and 𝑅𝐸 (choice is usually set by AC behaviour which we will see in next lab). We
1
have to ensure, however, that 𝑉𝐸  𝐼𝐶 𝑅𝐸 > 1𝑉 or 𝑅𝐸 > .
𝐼𝑐
Choose approximate value of 𝑅𝐸 satisfying the above inequality. Using this value of 𝑅𝐸 , calculate value of
𝑅𝐶 from Step # 2.
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Step # 4: Find 𝑅𝐵
𝑅𝐵 = 0.1𝛽𝑅𝐸
Step # 5: Find 𝑉𝐵𝐵 using Eq.(5)
Step # 6: Find 𝑅1 and 𝑅2 using Eq.(1) and Eq.(2)
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Task: Draw the DC Load Line for above calculated parameters as well as for your practical circuit and
label the Q-point for both.
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EVALUATION:
Statement Score Beginning

CLO Exemplary (5) Proficient (4) Developing (3) Novice (1)
↓ → (2)
Selects the Selects some of Selects some of
required the required the required
Understands Does not
components components components
To Identify/Select the understand
depending depending upon depending upon
the required procedure the correct
1 upon the output the output by the output by
components to be but is unable procedure
by performing performing the performing a few
used in the lab to do design for design
all the design design of the design
calculations calculations
calculations calculations with calculations
correctly minor mistakes correctly
Does major
Does the
mistakes in
To Follow the additional Correctly Does minor
connecting
given design to connections implements the mistakes in Does not
the
implement an correctly to circuit on bread connecting the understand
2 components
electronic circuit analyze the board basic components on the circuit
on board
of required response of according to board according diagram
according to
specifications implemented circuit diagram to circuit diagram
circuit
circuit
diagram
Takes help
To Behave Completes the Needs minor help Needs major help from other
responsibly within assigned task from instructor to from instructor to groups to Does not
4
team and perform without any complete complete complete work
the tasks safely help assigned task assigned task assigned
task
CLO: MARKS OBTAINED

1
2
Instructor’s Signatures: __________________________
Page | 12
To Implement a Common Emitter Amplifier of given parameters

and record its frequency response
OBJECTIVES:
 To learn how circuit capacitances affect the frequency response of amplifier
 To learn how to analyze the low frequency response of CE Amplifier
 To learn how to analyze the high frequency response of CE Amplifier
 To learn how to analyze the complete frequency response of CE Amplifier
 To learn about the bandwidth of amplifier
EQUIPMENT:
INTRODUCTION:
Frequency Response:
The frequency response of an amplifier is the change in gain or phase shift over a specified range of input
signal frequencies. Frequency response of the amplifier is expressed using Bode plots. Frequency response of
amplifier can be divided into following three categories.
1. Low Frequency Response
2. High Frequency Response
3. Complete High Frequency Response
Fig 2.1: CE Amplifier
Page | 13
Effect of Coupling Capacitors:

At low frequencies the capacitive reactance of coupling capacitors C1 and C3 increases and gain of the system
decreases because more signal voltage is dropped across these capacitors. Also, a phase shift is introduced by
these coupling capacitors.
Effect of Bypass Capacitor:
At lower frequencies, the reactance of the bypass capacitor C2 increases which reduces the gain of the amplifier
according to the following formula;
𝑅 ||𝑅
𝐴𝑉 = 𝑟 𝐶′ + 𝑍𝐿  𝑍𝑒 = 𝑅𝐸 || 𝑋𝐶2
𝑒 𝑒
Effect of Internal Transistor Capacitances:

At high frequencies, the coupling and bypass capacitors become effective ac shorts (having
very low reactance) and do not affect an amplifier’s response. However, at high
frequencies internal transistor junction capacitances do come into play, reducing an
amplifier’s gain and introducing phase shift as the signal frequency increases.
Midrange Gain:
Many amplifiers exhibit a maximum gain over a certain range of frequencies and a reduced gain at frequencies
below and above this range. The maximum gain occurs for the range of frequencies between the upper and
lower critical frequencies and is called the midrange gain and given as;
𝑅𝐶 ||𝑅𝐿
𝐴𝑉(𝑚𝑖𝑑) =  𝐴𝑉(𝑑𝐵) = 20 𝑙𝑜𝑔(𝐴𝑉(𝑚𝑖𝑑) )
𝑟𝑒 ′
Fig 2.2: Normalized Voltage Gain Curve vs Frequency
Critical Frequency:
The frequency at which the voltage gain is 70.7% of its midrange value is called critical frequency. In dB
scale, magnitude at critical frequency is 3 dB lower than its midrange value.
Low Frequency Response:
The voltage gain and phase shift of capacitive coupled amplifiers are affected when the signal frequency is
below a critical value. At low frequencies, the reactance of the coupling capacitors becomes significant,
resulting in a reduction in voltage gain and an increase in phase shift. Low Frequency response is summarized
in the following table,
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Input RC Circuit Output RC Circuit Bypass RC Circuit
Equivalent
Circuit
Critical 1 1 1
Frequency 𝑓𝑐 2𝜋(𝑅𝑠 + 𝑅𝑖𝑛 )𝐶1 2𝜋(𝑅𝐶 + 𝑅𝐿 )𝐶3 2𝜋[(𝑟𝑒 ′ + 𝑅𝑡ℎ /𝛽𝑎𝑐 )||𝑅𝐸 ]𝐶2
Phase Shift 𝑋𝐶1 𝑋𝐶3 𝑋𝐶2

𝑡𝑎𝑛−1 ( ) 𝑡𝑎𝑛−1 ( ) 𝑡𝑎𝑛−1 ( ′ )
 𝑅𝑠 + 𝑅𝑖𝑛 𝑅𝐶 + 𝑅𝐿 𝑟𝑒 + 𝑅𝑡ℎ /𝛽𝑎𝑐 )||𝑅𝐸
Table 2.1: Low Frequency Response Summary
25 𝑚𝑉
Note: 𝑅𝑖𝑛 = 𝑅1 || 𝑅2 || 𝛽𝑟𝑒 ′ ; 𝑅𝑡ℎ = 𝑅1 || 𝑅2 || 𝑅𝑠 ; 𝑟𝑒 ′ = 𝐼𝐸
High Frequency Response:

We have seen how the coupling and bypass capacitors affect the voltage gain of an amplifier at lower
frequencies where the reactances of the coupling and bypass capacitors are significant. In the midrange of an
amplifier, the effects of the coupling and bypass capacitors are minimal and can be neglected. If the frequency
is increased sufficiently, a point is reached where the transistor’s internal capacitances begin to have a
significant effect on the gain. High Frequency response is summarized in the following table.
Input RC Circuit Output RC Circuit
Equivalent Circuit
1 1
Critical Frequency 𝑓𝑐
2𝜋(𝑅𝑠 ||𝑅1 || 𝑅2 || 𝛽𝑎𝑐 𝑟𝑒 ′ )𝐶𝑖𝑛 2𝜋(𝑅𝐶 ||𝑅𝐿 )𝐶𝑜𝑢𝑡
𝑅𝑠 ||𝑅1 || 𝑅2 || 𝛽𝑎𝑐 𝑟𝑒 ′ 𝑅𝐶 ||𝑅𝐿

Phase Shift  𝑡𝑎𝑛 −1
( ) 𝑡𝑎𝑛−1 ( )
𝑋𝐶𝑖𝑛 𝑋𝐶𝑜𝑢𝑡
Table 2.2: High Frequency Response Summary
𝑅𝐶 ||𝑅𝐿
Note: 𝐶𝑖𝑛 = 𝐶𝑏𝑒 + 𝐶𝑏𝑐 (𝐴𝑉 + 1) ; 𝐶𝑜𝑢𝑡  𝐶𝑏𝑐 ; 𝐴𝑉 = 𝑟𝑒 ′
(𝐶𝑏𝑒 and 𝐶𝑏𝑐 values are given in transistor data sheet)
Page | 15
Complete Frequency Response:

At low frequencies coupling and bypass capacitors reduces the gain of the amplifier while at high frequencies
internal capacitances of transistor are responsible are for reduced gain. So, amplifier shows maximum gain
between low and high frequencies known as the midrange gain of the amplifier. The following figure shows
the complete frequency response of the amplifier.
Fig 2.3: Complete Frequency Response of Amplifier
Note, 𝑓𝑐𝑙1 , 𝑓𝑐𝑙2 and 𝑓𝑐𝑙3 are calculated from low frequency response analysis of amplifier while 𝑓𝑐𝑢1 and 𝑓𝑐𝑢2
are calculated from high frequency response analysis of amplifier.
Dominant Critical Frequencies:

The highest critical frequency obtained from low frequency response analysis i.e. from (𝑓𝑐𝑙1 , 𝑓𝑐𝑙2 ,𝑓𝑐𝑙3 ) is called
the lower dominant critical frequency 𝑓𝑐𝑙(𝑑𝑜𝑚) , while the lowest critical frequency obtained from high
frequency response analysis i.e. from (𝑓𝑐𝑢1 , 𝑓𝑐𝑢2 ) is called the upper dominant critical frequency 𝑓𝑐𝑢(𝑑𝑜𝑚) .
Ideally amplifier should be operated between the frequencies 𝑓𝑐𝑙(𝑑𝑜𝑚) and 𝑓𝑐𝑢(𝑑𝑜𝑚) .
Bandwidth:
The range (band) of frequencies lying between 𝑓𝑐𝑙(𝑑𝑜𝑚) and 𝑓𝑐𝑢(𝑑𝑜𝑚) is defined as bandwidth of the amplifier
i.e.BW = 𝑓𝑐𝑢(𝑑𝑜𝑚) − 𝑓𝑐𝑙(𝑑𝑜𝑚)
Page | 16
Fig 2.4: Response curve showing Bandwidth of Amplifier
Lab Exercise
Use the following values to implement the common emitter amplifier circuit shown in Fig 2.1.
𝑅1 = 22 k ; 𝑅2 = 4.7 k ; 𝑅𝐶 = 2.2 k ; 𝑅𝐸 = 470  ; 𝑅𝐿 = 10 k
𝐶1 = 1 uF ; 𝐶2 = 10 uF ; 𝐶3 = 1 uF ; 𝑉𝑖𝑛(𝑝𝑒𝑎𝑘) = 1 mV ; 𝑉𝐶𝐶 = 10 V
𝐶𝑏𝑐 = 8 pF ; 𝐶𝑏𝑒 = 25 pF (From KN2222A Transistor Datasheet)
Calculations: Using above given data, perform the following tasks. Show all your calculations in the space
provided below.
Task 1: Calculate Midrange voltage gain in dB
Page | 17
Task 2: Low Frequency response parameters
Input RC Circuit Output RC Circuit Bypass RC Circuit
Phase Shift 
Task 3: High Frequency response parameters
Input RC Circuit Output RC Circuit
Phase Shift 
Page | 18
Task 4: Draw the ideal or theoretically calculated frequency response of amplifier in dB scale.
Task 5: Fill the following table, and draw the actual frequency response.
Frequency 𝑽𝒊𝒏(𝒑𝒆𝒂𝒌) 𝑽𝒐𝒖𝒕(𝒑𝒆𝒂𝒌) 𝑽𝒐𝒖𝒕(𝒑𝒆𝒂𝒌)
Sr # 𝑨𝑽 = 𝑨𝑽(𝒅𝑩) = 𝟐𝟎 𝒍𝒐𝒈(𝑨𝑽 )
( Hz ) (V) (V) 𝑽𝒊𝒏(𝒑𝒆𝒂𝒌)
1. 1
2. 10
3. 100
4. 500
5. 1k
6. 10 k
7. 100 k
8. 500 k
9. 1M
10. 5M
11. 10 M
Page | 19
Actual Frequency Response:
Task 6: Write down calculated and measured dominant critical frequencies and bandwidth
Calculated Measured
𝑓𝑐𝑙(𝑑𝑜𝑚)
𝑓𝑐𝑢(𝑑𝑜𝑚)
BW
Page | 20
EVALUATION:

↓ → (2)
Does major
Does the
mistakes in
connecting
the
2 components
on board
according to
circuit
circuit
diagram
Takes help
4
task
CLO: MARKS OBTAINED

2
4
Page | 21
To Implement a Double Stage Amplifier and record its frequency

response
OBJECTIVES:
 To compare the performance of single stage and double stage amplifier
 To learn how to draw the frequency response curves for multistage amplifier
EQUIPMENT:
INTRODUCTION:
Multistage Amplifier:
When amplifier stages are cascaded to form a multistage amplifier, the dominant frequency response is
determined by the responses of the individual stages. There are two cases to consider:
1. Each stage has a different dominant lower critical frequency and a different dominant upper critical
frequency.
2. Each stage has the same dominant lower critical frequency and the same dominant upper critical
frequency.
Fig 3.1: Multi (Double) Stage Amplifier
Page | 22
Different Critical Frequencies:

Ideally, when the dominant lower critical frequency,𝑓𝑐𝑙(𝑑𝑜𝑚) , of each amplifier stage is different from the other
stages, the overall dominant lower critical frequency, 𝑓′𝑐𝑙(𝑑𝑜𝑚) , equals the dominant critical frequency of the
stage with the highest 𝑓𝑐𝑙(𝑑𝑜𝑚) . Ideally, when the dominant upper critical frequency,𝑓𝑐𝑢(𝑑𝑜𝑚) , of each amplifier
stage is different from the other stages, the overall dominant upper critical frequency, 𝑓′𝑐𝑢(𝑑𝑜𝑚) , equals the
dominant critical frequency of the stage with the lowest 𝑓𝑐𝑙(𝑑𝑜𝑚) .
In practice, the critical frequencies interact, so these calculated values should be considered as approximations
that are useful for troubleshooting or estimating the response.
Overall Bandwidth:
The bandwidth of a multistage amplifier is the difference between the overall dominant lower critical
frequency and the overall dominant upper critical frequency.
BW = 𝑓′𝑐𝑢(𝑑𝑜𝑚) − 𝑓′𝑐𝑙(𝑑𝑜𝑚)
Equal Critical Frequencies:

When each amplifier stage in a multistage arrangement has equal dominant critical frequencies, you may think
that the overall dominant critical frequency is equal to the critical frequency of each stage. This is not the case,
however. When the dominant lower critical frequencies of each stage in a multistage amplifier are all the
same, the overall dominant lower critical frequency is increased as shown by the following formula (‘n’ is the
number of stages in the multistage amplifier).
𝑓𝑐𝑙(𝑑𝑜𝑚)
𝑓′𝑐𝑙(𝑑𝑜𝑚) =
√21/𝑛 − 1
When the dominant upper critical frequencies of each stage are all the same, the overall dominant upper critical
frequency is reduced as shown by the following formula;
𝑓′𝑐𝑢(𝑑𝑜𝑚) = 𝑓𝑐𝑢(𝑑𝑜𝑚) √21/𝑛 − 1
Overall Midrange Gain:

The overall midrange gain of the multistage amplifier is equal to the product of gains of individual stages.
Absolute Gain: 𝐴𝑉 = 𝐴𝑉1 𝐴𝑉2 … … … … … 𝐴𝑉𝑛
In dB Scale: 𝐴𝑉(𝑑𝐵) = 20𝑙𝑜𝑔 𝐴𝑉1 + 20𝑙𝑜𝑔 𝐴𝑉2 + ⋯ … … … … + 20𝑙𝑜𝑔 𝐴𝑉𝑛
Page | 23
Lab Exercise
Use the following values to implement the multistage amplifier circuit shown in Fig 3.1.
𝑅1 = 22 k ; 𝑅2 = 4.7 k ; 𝑅𝐶 = 2.2 k ; 𝑅𝐸 = 470  ; 𝑅𝐿 = 10 k
𝐶𝑏𝑐 = 8 pF ; 𝐶𝑏𝑒 = 25 pF (From KN2222A Transistor Datasheet)
Calculations: Using above given data, perform the following tasks. Show all your calculations in the space
provided below.
Task 1: Fill the following table. (Show all the calculations in the space provided)
Parameters Calculated Measured
𝐴𝑉1
𝐴𝑉2
𝐴𝑉
𝐴𝑉(𝑑𝐵)
𝑓′𝑐𝑙(𝑑𝑜𝑚)
𝑓′𝑐𝑢(𝑑𝑜𝑚)
𝐵𝑊
Page | 24
Task 2: Draw the ideal or theoretically calculated frequency response of multistage amplifier in dB scale.
Task 3: Fill the following table, and draw the actual frequency response for multistage amplifier.
Frequency 𝑽𝒊𝒏(𝒑𝒆𝒂𝒌) 𝑽𝒐𝒖𝒕(𝒑𝒆𝒂𝒌) 𝑽𝒐𝒖𝒕(𝒑𝒆𝒂𝒌)

Sr # 𝑨𝑽 = 𝑨𝑽(𝒅𝑩) = 𝟐𝟎 𝒍𝒐𝒈(𝑨𝑽 )
( Hz ) 𝑽𝒊𝒏(𝒑𝒆𝒂𝒌)
(V) (V)
1. 1
2. 10
3. 100
4. 500
5. 1k
6. 10 k
7. 100 k
8. 500 k
9. 1M
10. 5M
11. 10 M
Page | 25
Double Stage Amplifier Actual Frequency Response:
Task 4: What is the phase difference between input and output waveforms at midrange frequencies for
double stage amplifier? How it is different from the single stage amplifier?
Page | 26
EVALUATION:

↓ → (2)
Does major
Does the
mistakes in
connecting
the
2 components
on board
according to
circuit
circuit
diagram
Takes help
4
task
CLO: MARKS OBTAINED

2
4
Page | 27
To Compare the theoretical and practical output values of a Class A

amplifier
OBJECTIVES:
 Analyze the operation of class A Power amplifier (PA)
 Calculate the efficiency of class A PA theoretically as well as practically
EQUIPMENT:
INTRODUCTION:
Class A Power Amplifier:
When an amplifier is biased such that it always operates in the linear region where the output signal is an
amplified replica of the input signal, it is a class A amplifier. The amplifiers (CE, CB, CC) which we have
learnt so far operates in linear region so they are classified as class A amplifier. Power amplifiers are those
amplifiers that have the objective of delivering power to a load.
Fig 4.1: Simple Example of Class A Amplifier
Page | 28
Power Gain:
A power amplifier delivers power to a load. The power gain of an amplifier is the ratio of the output power
(power delivered to the load) to the input power. In general, power gain is;
𝑃
𝐴𝑃 = 𝑃 𝐿
𝑖𝑛
Where 𝐴𝑃 is the power gain, 𝑃𝐿 is the signal power delivered to the load, 𝑃𝑖𝑛 is the signal power delivered to
the amplifier.
𝑉𝐿 2 𝑉𝑖𝑛 2
Where; 𝑃𝐿 = and 𝑃𝑖𝑛 =
𝑅𝐿 𝑅𝑖𝑛
𝑉 2 𝑅 𝑅 𝑉
 𝐴𝑃 = 𝑉 𝐿 2 ( 𝑅𝑖𝑛) = 𝐴𝑉 2 ( 𝑅𝑖𝑛)  𝐴𝑉 = 𝑉 𝐿
𝑖𝑛 𝐿 𝐿 𝑖𝑛
Efficiency of Class A Amplifier:

The efficiency of any amplifier is the ratio of the output signal power ‘𝑃𝑜𝑢𝑡(max) ’ supplied to a load to the
total input power ‘𝑃𝑖𝑛(DC) ’ from the dc supply.
𝑃𝑜𝑢𝑡(max)
𝜂𝑚𝑎𝑥 = 𝑃𝑖𝑛(DC)
Where; 𝑃𝑖𝑛(DC) = 𝐼𝐶𝐶 𝑉𝐶𝐶 = 2𝐼𝐶𝑄 𝑉𝐶𝐸𝑄 𝑉𝐶𝐶 = 2𝑉𝐶𝐸𝑄
𝑃𝑜𝑢𝑡(max) = 0.5𝐼𝐶𝑄 𝑉𝐶𝐸𝑄
0.5𝐼𝐶𝑄 𝑉𝐶𝐸𝑄
 𝜂𝑚𝑎𝑥 = = 0.25 or 25% (Theoretical 𝜂)
2𝐼𝐶𝑄 𝑉𝐶𝐸𝑄
The maximum efficiency of a capacitively coupled class A amplifier cannot be higher than 0.25, or 25%, and,
in practice, is usually considerably less (about 10%). For practical circuit, the efficiency of any power
amplifier can be calculated using the following formula;
𝑃𝐿
𝜂=𝑃 (Practical 𝜂)
𝑖𝑛(DC)
Page | 29
Lab Exercise
For Class A Amplifier:

𝑅1 = 22 k ; 𝑅2 = 4.7 k ; 𝑅𝐶 = 2.2 k ; 𝑅𝐸 = 470  ; 𝑅𝐿 = 1 k
Use the above given data, implement the class A power amplifier circuit shown in Fig 4.1 and perform the
following tasks.
Task 1: Fill the following table for Class A amplifier.
Theoretical Practical
Input DC Power 𝑃𝑖𝑛(𝐷𝐶)
Output Power 𝑃𝑜𝑢𝑡 or 𝑃𝐿
Power Gain 𝐴𝑃
Efficiency 𝜂
Calculations: Show all your calculations in the space provided below.
Page | 30
Task 2: Comment on the performance of Class A power amplifier depending upon its efficiency.
Page | 31
EVALUATION:

↓ → (2)
Does major
Does the
mistakes in
connecting
the
2 components
on board
according to
circuit
circuit
diagram
Takes help
4
task
CLO: MARKS OBTAINED

2
4
Page | 32
To Compare the theoretical and practical output values of a Class

A/AB Amplifier
OBJECTIVES:
 Analyze the operation of class B/AB Power amplifier (PA)
 Calculate the efficiency of class B PA theoretically as well as practically
EQUIPMENT:
INTRODUCTION:
Class B/AB Push Pull Power Amplifier:
When an amplifier is biased at cutoff so that it operates in the linear region for 180 of the input cycle and is
in cutoff for 180, it is a class B amplifier. Class AB amplifiers are biased to conduct for slightly more than
180. The primary advantage of a class B or class AB amplifier over a class A amplifier is that either one is
more efficient than a class A amplifier; you can get more output power for a given amount of input power. A
disadvantage of class B or class AB is that it is more difficult to implement the circuit in order to get a linear
reproduction of the input waveform.
The term push-pull refers to a common type of class B or class AB amplifier circuit in which two
transistors are used on alternating half-cycles to reproduce the input waveform at the output. Class B amplifier
has the problem of crossover distortion, while this problem is omitted in class AB amplifier, so we will only
analyze the class AB amplifier.
Fig 5.1: Class AB Push Pull Power Amplifier
Page | 33
Efficiency of Class B/AB Push Pull Power Amplifier:

The theoretical efficiency of class B/AB amplifiers is calculated as;
𝑃𝑜𝑢𝑡(max)
𝜂𝑚𝑎𝑥 = 𝑃𝑖𝑛(DC)
𝐼𝑐(𝑠𝑎𝑡) 𝐼𝑐(𝑠𝑎𝑡) 𝑉𝐶𝐶

where; 𝑃𝑖𝑛(DC) = 𝐼𝐶𝐶 𝑉𝐶𝐶 = 𝑉𝐶𝐶  𝐼𝐶𝐶 = 𝑉𝐶𝐸𝑄 =
𝜋 𝜋 2
𝑉𝐶𝐸𝑄
𝑃𝑜𝑢𝑡(max) = 0.25𝐼𝑐(𝑠𝑎𝑡) 𝑉𝐶𝐶  𝐼𝑐(𝑠𝑎𝑡) = 𝐼𝑜𝑢𝑡(𝑝𝑒𝑎𝑘) = 𝑅𝐿
0.25𝐼𝑐(𝑠𝑎𝑡) 𝑉𝐶𝐶
 𝜂𝑚𝑎𝑥 = = 0.25 = 0.79 or 79% (Theoretical 𝜂)
𝐼𝑐(𝑠𝑎𝑡) 𝑉𝐶𝐶 /𝜋
The maximum efficiency of class AB power amplifier cannot be higher than 0.79, or 79%, and, in practice, is
usually less due to losses in the circuit elements. For practical circuit, the efficiency of any power amplifier
can be calculated using the following formula;
𝑃𝐿
𝜂=𝑃 (Practical 𝜂)
𝑖𝑛(DC)
Input Resistance:
The complementary push-pull configuration used in class B/class AB amplifiers is, in effect, two
emitter-followers. The input resistance for the emitter-follower, where 𝑅1 and 𝑅2 are the bias resistors, is;
25 𝑚𝑉
𝑅𝑖𝑛 = 𝛽(𝑟𝑒 ′ + 𝑅𝐿 ) || 𝑅1 || 𝑅2 𝑟𝑒 ′  𝐼
𝑐(𝑠𝑎𝑡)
Page | 34
Lab Exercise
For Class AB Amplifier:
𝑅1 = 470  ; 𝑅2 = 470  ; 𝑅𝐿 = 33  @ 5W ; 𝐶1 = 22 uF
𝐶2 = 22 uF ; 𝐶3 = 470 uF ; 𝑉𝑖𝑛(𝑝𝑒𝑎𝑘) = 1 V @ 100 kHz ; 𝑉𝐶𝐶 = 10 V
Use the above given data, implement the class AB power amplifier circuit shown in Fig 5.1 and perform the
following tasks.
Task 1: Fill the following table for Class AB amplifier.
Power Gain 𝐴𝑃
Efficiency 𝜂
Page | 35
EVALUATION:

↓ → (2)
Does major
Does the
mistakes in
connecting
the
2 components
on board
according to
circuit
circuit
diagram
Takes help
4
task
CLO: MARKS OBTAINED

2
4
Page | 36
To Compare the theoretical and practical output values of a Class C

Amplifier
OBJECTIVES:
 Analyze the operation of class C Power amplifier
 Calculate the efficiency of class C PA theoretically as well as practically
EQUIPMENT:
INTRODUCTION:
Class C Power Amplifier:
Class C amplifiers are biased so that conduction occurs for much less than 180. Class C amplifiers are more
efficient than either class A or push-pull class B and class AB, which means that more output power can be
obtained from class C operation. The output amplitude is a nonlinear function of the input, so class C
amplifiers are not used for linear amplification. They are generally used in radio frequency (RF) applications,
including circuits, such as oscillators, that have constant output amplitude, and modulators, where a high-
frequency signal is controlled by a low-frequency signal.
Fig 6.1: Class C Power Amplifier

Page | 37
Efficiency of Class C Power Amplifier:

Since the voltage developed across the tank circuit has a peak-to-peak value of approximately 2𝑉𝐶𝐶 ,
the maximum output power can be expressed as;
𝑉𝑟𝑚𝑠 2 (0.707𝑉𝐶𝐶 )2 0.5 𝑉𝐶𝐶 2
𝑃𝑜𝑢𝑡(𝑎𝑐) = = =
𝑅𝑐 𝑅𝑐 𝑅𝑐
𝑅𝑐 is the equivalent parallel resistance of the collector tank circuit at resonance and represents the
parallel combination of the coil resistance and the load resistance. It usually has a low value. The total power
that must be supplied to the amplifier is;
𝑡𝑜𝑛
𝑃𝑇 = 𝑃𝑜𝑢𝑡(𝑎𝑐) + 𝑃𝐷(𝑎𝑣𝑔)  𝑃𝐷(𝑎𝑣𝑔) = ( ) 𝐼𝑐(𝑠𝑎𝑡) 𝑉𝑐𝑒(𝑠𝑎𝑡)
𝑇
where; 𝑃𝐷(𝑎𝑣𝑔) = Power dissipation across transistor

𝑡𝑜𝑛 = on time of transistor
𝑇 = Time period of input signal
Therefore, the efficiency is;
𝑃𝑜𝑢𝑡(𝑎𝑐)
𝜂=𝑃
𝑜𝑢𝑡(𝑎𝑐) + 𝑃𝐷(𝐴𝑉𝐺)
When 𝑃𝑜𝑢𝑡(𝑎𝑐) >> 𝑃𝐷(𝑎𝑣𝑔) , the class C efficiency approaches to 100%.

Formulas:
Some important formulas for class C amplifier are given as;
1
Resonant Frequency: 𝑓𝑟 =
2𝜋√𝐿𝐶3
𝑉𝑝𝑝(𝑖𝑛)
Input AC Power: 𝑃𝑖𝑛(𝑎𝑐) =
8 × 𝑅1
𝑉𝑝𝑝(𝑜𝑢𝑡)
Output AC Power: 𝑃𝑜𝑢𝑡(𝑎𝑐) =
8 × 𝑅𝐿
Power Gain: 𝐴𝑃 =
𝑃𝑖𝑛(𝑎𝑐)
Input DC Power: 𝑃𝑖𝑛(𝑑𝑐) = 𝑉𝐶𝐶 × 𝐼𝐷𝐶

Note: To calculating DC power, switch off the AC signal and now read the ammeter for DC current 𝐼𝐷𝐶 .
Efficiency: 𝜂= 𝑃𝑖𝑛(𝑑𝑐)
Page | 38
Lab Exercise
For Class C Amplifier:

𝑅1 = 2 k ; 𝑅𝐿 = 100 k ; 𝐶1 = 10 nF ; 𝐶2 = 10 nF
𝐶3 = 680 uF ; 𝑉𝑖𝑛(𝑝𝑒𝑎𝑘) = 1 V ; 𝑉𝐶𝐶 = 15 V
Use the above given data, implement the class C power amplifier circuit shown in Fig 6.1 and perform the
following tasks.
Task 1: Fill the following table for Class C amplifier.
Power Gain 𝐴𝑃
Efficiency 𝜂
Page | 39
Task 2: Comment on the performance of Class A, AB and class C power amplifier depending upon their
efficiencies.
Page | 40
EVALUATION:

↓ → (2)
Does major
Does the
mistakes in
connecting
the
2 components
on board
according to
circuit
circuit
diagram
Takes help
4
task
CLO: MARKS OBTAINED

2
4
Page | 41
To Design a Wien Bridge Oscillator of given output specifications

OBJECTIVES:
 How to design the Wien-Bridge Oscillator
 Analyze the Wien-Bridge Oscillator circuit
EQUIPMENT:
 Op-amp 741
INTRODUCTION:
The Wien-Bridge Oscillator:
The Wien-Bridge Oscillator consists of a series RC circuit connected to a parallel RC forming basically a
High Pass Filter connected to a Low Pass Filter producing a Band Pass Filter with resonance frequency 𝑓𝑟 .
Fig 7.1: Wien-Bridge Oscillator
At low frequencies the reactance of the series capacitor 𝐶1 is very high so acts like an open circuit and
blocks any input signal, therefore there is no output signal. At high frequencies, the reactance of the parallel
capacitor 𝐶2 is very low so this parallel connected capacitor acts like a short circuit on the output so again
there is no output signal. However, between these two extremes the output voltage reaches a maximum value
with the frequency at which this happens being called the resonance frequency 𝑓𝑟 .
1
𝑓𝑟 = (assuming: 𝑅1 = 𝑅2 = 𝑅 𝐶1 = 𝐶2 = 𝐶 )
2𝜋𝑅𝐶
Page | 42
At this resonant frequency, the circuits reactance equals its resistance as 𝑋𝐶 = R so the phase shift
between the input and output equals zero degrees. The magnitude of the output voltage is therefore at its
maximum and is equal to one third (1/3) of the input voltage.
Design Procedure:
To design the Wien-Bridge Oscillator circuit to produce the sinusoidal signal required frequency, the step
by step procedure and formulas used is given below;
1. Suppose desired oscillator frequency is given as; 𝑓𝑟
2. Calculate the value of 𝑅 by assuming some value of 𝐶 using the 𝑓𝑟 formula given above.
3. Ideally the gain of the amplifier should be 3 (practically it should be little more than 3 say 3.1)
𝑅𝑓
𝐴=1+ (Take 𝐴 = 3.1)
𝑅𝑖
4. Assume any reasonable value of 𝑅𝑖 and calculate value of 𝑅𝑓 .

5. Build the Wien-Bride circuit with above designed values and analyze it.
Page | 43
Lab Exercise
A Wien Bridge Oscillator circuit is required to generate a sinusoidal waveform of 5200 Hz. Calculate
the values of the frequency determining resistors 𝑅1 and 𝑅2 and the two capacitors 𝐶1 and 𝐶2 to produce the
required frequency. Also, if the oscillator circuit is based around a non-inverting operational amplifier
configuration, determine the minimum values for the gain resistors to produce the required oscillations. Finally
implement and test the resulting oscillator circuit using op-amp 741 and designed value of resistors and
capacitors.
Task: Fill the following table.
𝑅1 𝑅2 𝐶1 𝐶2 𝑅𝑖 𝑅𝑓 𝑓𝑟(𝑡ℎ𝑒𝑜𝑟𝑦) 𝑓𝑟(𝑝𝑟𝑎𝑐𝑡𝑖𝑐𝑎𝑙)
Value
Page | 44
EVALUATION:
Statement Score
CLO Exemplary (5) Proficient (4) Developing (3) Beginning (2) Novice (1)
↓ →
Selects some of Selects some of
Selects the
the required the required
required
components components Does not
components Understands
To Identify/Select depending upon depending upon understand
depending upon the procedure
the required the output by the output by the correct
1 the output by but is unable
components to be performing the performing a procedure
performing all to do design
used in the lab design few of the for design
the design calculations
calculations design calculations
calculations
with minor calculations
correctly
mistakes correctly
Correctly utilize
To Design Implements the Implements the Chooses the Does not
individual
different types of circuit according circuit according required understand
components to
oscillators circuits to design to design components the correct
3 completely
using combination calculations calculations according to procedure
design and
of active and with minor with major design for design
implement the
passive elements mistakes mistakes calculations calculations
electronic circuit
Needs minor Needs major Takes help
To Behave
Completes the help from help from from other
responsibly within Does not
4 assigned task instructor to instructor to groups to
team and perform work
without any help complete complete complete
the tasks safely
assigned task assigned task assigned task
CLO: MARKS OBTAINED

1
3
4
Page | 45
To Design a Phase Shift Oscillator of given output specifications

OBJECTIVES:
 How to design the phase shift oscillator
 Analyze the phase shift oscillator
EQUIPMENT:
INTRODUCTION:
Phase Shift Oscillator:
Fig 8.1 shows a sinusoidal feedback oscillator called the phase-shift oscillator. Each of the three RC circuits
in the feedback loop can provide a maximum phase shift approaching 90°. Oscillation occurs at the frequency
where the total phase shift through the three RC circuits is 180°. The inversion of the op-amp itself provides
the additional 180° to meet the requirement for oscillation of a 360° (or 0°) phase shift around the feedback
loop.
Fig 8.1: Phase Shift Oscillator
The attenuation, B, of the three-section RC feedback circuit is;

1
𝐵=
29
Where 𝐵 = 𝑅𝑅3 . To meet the greater-than-unity loop gain requirement, the closed-loop voltage gain of the op-
𝑓
amp must be greater than 29 (set by 𝑅3 and 𝑅𝑓 ).
Page | 46
The frequency of oscillation 𝑓𝑟 is stated in the following equation, by assuming 𝑅1 = 𝑅2 = 𝑅3 = 𝑅 and

𝐶1 = 𝐶2 = 𝐶3 = 𝐶.
1
𝑓𝑟 =
2𝜋√6𝑅𝐶
Lab Exercise
Implement and test phase shift oscillator circuit with the following parameters;
𝑅1 = 𝑅2 = 𝑅3 = 𝑅 = 10 k 𝐶1 = 𝐶2 = 𝐶3 = 𝐶 = 0.001𝑢𝐹
Page | 47
EVALUATION:
Statement Score
↓ →
Selects the
required
calculations
correctly
mistakes correctly
Correctly utilize
individual
components to
3 completely
design and
implement the
electronic circuit
To Behave
the tasks safely
CLO: MARKS OBTAINED

1
3
4
Page | 48
To Design a Colpitts Oscillator of given output specifications

OBJECTIVES:
 How to design the Colpitts Oscillator
 Analyze the Colpitts Oscillator circuit
EQUIPMENT:
INTRODUCTION:
The Colpitts Oscillator:
One basic type of resonant circuit feedback oscillator is the Colpitts, named after its inventor—as are most of
the others we cover here. As shown below in Fig 9.1, this type of oscillator uses an LC circuit in the feedback
loop to provide the necessary phase shift and to act as a resonant filter that passes only the desired frequency
of oscillation.
Fig 9.1: Colpitts Oscillator Circuit
Page | 49
The approximate frequency of oscillation is the resonant frequency of the LC circuit and is established by the
values of 𝐶1 , 𝐶2 , and 𝐿 according to this formula:
1 𝐶1
𝑓𝑟 = 2𝜋√𝐿𝐶 where; 𝐶𝑇 =
𝑇 𝐶2
Lab Exercise
Implement and test Colpitts oscillator circuit with the following parameters;
𝑅1 = 47 k ; 𝑅2 = 10 k ; 𝑅3 = 2.2 k ; 𝑅4 = 680  ; 𝐿 = 1 mH
𝐶1 = 0.1 uF ; 𝐶2 = 0.1 uF ; 𝐶3 = 10 uF ; 𝐶4 = 22 uF ; 𝐶5 = 22 uF
Page | 50
EVALUATION:
Statement Score
↓ →
Selects the
required
calculations
correctly
mistakes correctly
Correctly utilize
individual
components to
3 completely
design and
implement the
electronic circuit
To Behave
the tasks safely
CLO: MARKS OBTAINED

1
3
4
Page | 51
EXPERIMENT 10 Date: ________________
To Design a Square and Triangular wave Oscillator of given output

specifications
OBJECTIVES:
 How to design the Colpitts Oscillator
 Analyze the Colpitts Oscillator circuit
EQUIPMENT:
 Op-amp 741
INTRODUCTION:
Square and Triangular Wave Oscillator:
One practical implementation of a triangular wave oscillator utilizes an op-amp comparator with hysteresis to
perform the switching function, as shown in Fig 10.1. The operation is as follows. To begin, assume that the
output voltage of the comparator is at its maximum negative level. This output is connected to the inverting
input of the integrator through 𝑅1 producing a positive-going ramp on the output of the integrator.
When the ramp voltage reaches the upper trigger point (UTP), the comparator switches to its maximum
positive level. This positive level causes the integrator ramp to change to a negative-going direction. The ramp
continues in this direction until the lower trigger point (LTP) of the comparator is reached. At this point, the
comparator output switches back to the maximum negative level and the cycle repeats. This action is illustrated
in Fig 10.2.
Fig 10.1: Function Generator Oscillator Circuit
Page | 52
Fig 10.2: Square and Triangular Waves
Since the comparator produces a square-wave output, the circuit in Fig 10.1 can be used as both a
triangular-wave oscillator and a square-wave oscillator. Devices of this type are commonly known as function
generators because they produce more than one output function. The output amplitude of the square wave is
set by the output swing of the comparator, and the resistors 𝑅2 and 𝑅3 set the amplitude of the triangular output
by establishing the UTP and LTP voltages according to the following formulas:
𝑅 𝑅
𝑉𝑈𝑇𝑃 = +𝑉𝑚𝑎𝑥 (𝑅3 ) ; 𝑉𝐿𝑇𝑃 = −𝑉𝑚𝑎𝑥 (𝑅3 )
2 2
where the comparator output levels +𝑉𝑚𝑎𝑥 and −𝑉𝑚𝑎𝑥 are equal. The frequency of both waveforms depends
on the time constant 𝑅1 𝐶 as well as the amplitude-setting resistors 𝑅2 and 𝑅3 . By varying 𝑅1 the frequency of
oscillations can be adjusted without changing the output amplitude.
1 𝑅
𝑓𝑟 =
4𝑅1
( 2)
𝐶 𝑅 3
Page | 53
Lab Exercise
Design the function generator oscillator circuit to produce the square and triangular wave output of
frequency 8.25 kHz with amplitude of 5V. Implement and test the resulting oscillator circuit using op-amps
741 and designed value of resistors and capacitors.
Task: Fill the following table.
𝑅1 𝑅2 𝑅3 𝐶 𝑓𝑟(𝑡ℎ𝑒𝑜𝑟𝑦) 𝑓𝑟(𝑝𝑟𝑎𝑐𝑡𝑖𝑐𝑎𝑙)
Value
Page | 54
EVALUATION:
Statement Score
↓ →
Selects the
required
calculations
correctly
mistakes correctly
Correctly utilize
individual
components to
3 completely
design and
implement the
electronic circuit
To Behave
the tasks safely
CLO: MARKS OBTAINED

1
3
4
Page | 55
EXPERIMENT 11 Date: ________________
To Design a 555 timer Oscillator of given output specifications

OBJECTIVES:
 To learn about the A-stable operation of 555 Timer
 To learn about the mono-stable operation of 555 Timer
EQUIPMENT:
 555 Timer IC
INTRODUCTION:
555 Timer:
The 8-pin 555 timer must be one of the most useful chips ever made and it is used in many projects. With
just a few external components it can be used to build many circuits, not all of them involve timing.
Fig 11.1: 555 Timer IC

Pin Description:
 Trigger input: When < 1/3 Vs ('active low') this makes the output high (+Vs). It monitors the discharging
of the timing capacitor in an a-stable circuit. It has a high input impedance > 2 M.
 Threshold input: when > 2/3 Vs ('active high') this makes the output low (0V)*. It monitors the
charging of the timing capacitor in a-stable and mono-stable circuits. It has a high input impedance
> 10 M.
* Providing the trigger input is > 1/3 Vs, otherwise the trigger input will override the threshold input
and hold the output high (+Vs).
Page | 56
 Reset input: When less than about 0.7V ('active low') this makes the output low (0V), overriding other
inputs. When not required it should be connected to +Vs. It has an input impedance of about 10 k.
 Control input: This can be used to adjust the threshold voltage which is set internally to be 2/3 Vs. Usually
this function is not required and the control input is connected to 0V with a 0.01µF capacitor to eliminate
electrical noise. It can be left unconnected if noise is not a problem.
 Discharge pin: It is not an input, but it is listed here for convenience. It is connected to 0V when the
timer output is low and is used to discharge the timing capacitor in a-stable and mono-stable circuits.
555 Timer A-stable Mode:

An a-stable circuit produces a 'square wave', this is a digital waveform with sharp transitions between
low (0V) and high (+Vs). Note that the durations of the low and high states may be different. The circuit is called
a-stable because it is not stable in any state: the output is continually changing between 'low' and 'high'. The
time period (T) of the square wave is the time for one complete cycle, but it is usually better to consider frequency
(f) which is the number of cycles per second.
Fig 11.2: 555 Timer A-stable Circuit
𝟏 𝟏.𝟒
T = 0.7 × (R1 + 2R2) × C1 and f= =
𝑻 (𝑹𝟏 + 𝟐𝑹𝟐) × 𝑪𝟏
Where; T = time period in seconds (s)
f = frequency in hertz (Hz)
R1 = resistance in ohms ()
R2 = resistance in ohms ()
C1 = capacitance in farads (F)
Page | 57
555Timer Mono-stable Mode:

A mono-stable circuit produces a single output pulse when triggered. It is called a mono-stable because
it is stable in just one state: 'output low'. The 'output high' state is temporary.
The duration of the pulse is called the time period (T) and this is determined by resistor R1 and capacitor C1.
T = 1.1 × R1 × C1
Where; T = Time period in seconds (s)
R1 = Resistance in ohms ()
C1 = Capacitance in farads (F)
The maximum reliable time period is about 10 minutes.
Fig 11.3: 555 Timer Mono-stable Circuit
Page | 58
Lab Exercise
Task # 1: Design, implement and test the 555 timer circuit to create the square wave having ON time of 30
ms and OFF time of 20 ms. Fill the following table.
𝑅1 𝑅2 𝐶1 𝑇𝑜𝑛(𝑝𝑟𝑎𝑐𝑡𝑖𝑐𝑎𝑙) 𝑇𝑜𝑓𝑓(𝑝𝑟𝑎𝑐𝑡𝑖𝑐𝑎𝑙) 𝑓(𝑝𝑟𝑎𝑐𝑡𝑖𝑐𝑎𝑙) 𝑓(𝑡ℎ𝑒𝑜𝑟𝑦)

Value
Task # 2: Design, implement and test the 555 timer circuit to produce the single pulse having ON time of 10
ms. Fill the following table.
𝑅1 𝑅2 𝐶1 𝑇𝑜𝑛(𝑝𝑟𝑎𝑐𝑡𝑖𝑐𝑎𝑙)
Value
Page | 59
EVALUATION:
Statement Score
↓ →
Selects the
required
calculations
correctly
mistakes correctly
Correctly utilize
individual
components to
3 completely
design and
implement the
electronic circuit
To Behave
the tasks safely
CLO: MARKS OBTAINED

1
3
4
Page | 60
EXPERIMENT 12 Date: ________________
To Implement a Common Source Amplifier of given parameters

OBJECTIVES:
 To learn about the operation of CS Amplifier
 Investigate the characteristics of CS amplifier
EQUIPMENT:
 NTE 3819 N Channel JFET
INTRODUCTION:
Common Source Amplifier:
In this lab, JFET amplifier configuration; the common-source amplifier will be investigated. The basic
common-source (CS) circuit is shown in Fig 12.1. In comparison to the BJT common-emitter amplifier, the
FET amplifier has much higher input impedance, but a lower voltage gain. The voltage gain of the circuit can
be expressed as; Av = -gmRD
Fig 12.1: Common-Source Amplifier
Fig 12.2: The Junction Field Effect Transistor (NTE 3819)
Lab Exercise
Page | 61
Task: Implement and common source amplifier with following parameters:
𝑅1 = 200 k ; 𝑅2 = 100 k ; 𝑅𝑠 = 𝑅𝐷 = 2 k ; 𝑅𝐿 = 3.9 k

𝐶𝐶1 = 1µF ; 𝐶𝐶2 = 47µF ; 𝐶𝐶𝑆 =100 µF ; VDD = 12V ; VIN = 1V p-p
Draw the input and output waveforms, calculate the voltage gain of the amplifier.
Page | 62
EVALUATION:

↓ → (2)
Does major
Does the
mistakes in
connecting
the
2 components
on board
according to
circuit
circuit
diagram
Takes help
4
task
CLO: MARKS OBTAINED

2
4
Page | 63
EXPERIMENT 13 Date: ________________
To Implement a Common Drain Amplifier of given parameters

OBJECTIVES:
 To learn about the operation of CD Amplifier
 Investigate the characteristics of CD amplifier
EQUIPMENT:
 NTE 3819 N Channel JFET
INTRODUCTION:
Common Drain Amplifier:
In this lab, JFET amplifier configurations will be investigated; the common-drain amplifier. The basic
common-Drain (CD) circuit is shown in Fig 13.1. In comparison to the BJT common-emitter amplifier, the
FET amplifier has a much higher input impedance, but a lower voltage gain.
The voltage gain of the circuit can be expressed as;
Av = -gmRD
Fig 13.1: Common-Drain Amplifier
Fig 13.2: The Junction Field Effect Transistor (NTE 3819)
Page | 64
Lab Exercise
Task: Implement and common source amplifier with following parameters:
𝑅𝑠 = 𝑅𝐷 = 2 k ; 𝑅𝐿 = 3.9 k ; VIN = 1V p-p ; VDD = 12V

𝐶𝐶1 = 1µF ; 𝐶𝐶2 = 47µF ; 𝐶𝐶𝑆 =100 µF
Draw the input and output waveforms, calculate the voltage gain of the amplifier.
Page | 65
EVALUATION:

↓ → (2)
Does major
Does the
mistakes in
connecting
the
2 components
on board
according to
circuit
circuit
diagram
Takes help
4
task
CLO: MARKS OBTAINED

2
4
Page | 66
EXPERIMENT 14 Date: ________________
Open Ended Lab
It will be uploaded on SLATE.
EVALUATION:

↓ → (2)
Does major
Does the
mistakes in
connecting
the
2 components
on board
according to
circuit
circuit
diagram
Takes help
4
task
CLO: MARKS OBTAINED

2
4
Page | 67
Appendix A: Lab Evaluation Criteria
1. Experiments and their report 50

2. Open-Ended Lab 10
3. Project 20
a. Project Implementation 60%
b. Project report and quiz 40%
4. Final Exam 20
Notice:
Copying and plagiarism of lab reports is a serious academic misconduct. First
instance of copying may entail ZERO in that experiment. Second instance of
copying may be reported to DC. This may result in awarding FAIL in the lab
course.
Page | 68
Appendix B: Lab Rubrics
CLO Statement↓ Score→ Exemplary (5) Proficient (4) Developing (3) Beginning (2) Novice (1)
Selects the required Selects some of the Selects some of the

Does not
components required components required components Understands the
To Identify/Select the understand the
depending upon the depending upon the depending upon the procedure but is
1 required components to correct procedure
output by performing output by performing output by performing unable to do design
be used in the lab for design
all the design the design calculations a few of the design calculations
calculations
calculations correctly with minor mistakes calculations correctly
Does the additional Does minor mistakes Does major mistakes
To Follow the given Correctly implements
connections correctly in connecting the in connecting the Does not
design to implement an the circuit on bread
2 to analyze the components on board components on board understand the
electronic circuit of board basic according to
response of according to circuit according to circuit circuit diagram
required specifications circuit diagram
implemented circuit diagram diagram
Correctly utilize
To Design different Does not
individual Implements the circuit Implements the Chooses the required
types of oscillators understand the
components to according to design circuit according to components
3 circuits using correct procedure
completely design calculations with minor design calculations according to design
combination of active for design
and implement the mistakes with major mistakes calculations
and passive elements calculations
electronic circuit
Needs major help Takes help from
To Behave responsibly Completes the Needs minor help from
from instructor to other groups to
4 within team and perform assigned task without instructor to complete Does not work
complete assigned complete assigned
the tasks safely any help assigned task
task task
Page | 69
Appendix C: Safety around Electricity
In all the Electrical Engineering (EE) labs, with an aim to prevent any unforeseen accidents during
conduct of lab experiments, following preventive measures and safe practices shall be adopted:
 Remember that the voltage of the electricity and the available electrical current in EE labs has
enough power to cause death/injury by electrocution. It is around 50V/10 mA that the “cannot
let go” level is reached. “The key to survival is to decrease our exposure to energized circuits.”
 If a person touches an energized bare wire or faulty equipment while grounded, electricity will
instantly pass through the body to the ground, causing a harmful, potentially fatal, shock.
 Each circuit must be protected by a fuse or circuit breaker that will blow or “trip” when its safe
carrying capacity is surpassed. If a fuse blows or circuit breaker trips repeatedly while in
normal use (not overloaded), check for shorts and other faults in the line or devices. Do not
resume use until the trouble is fixed.
 It is hazardous to overload electrical circuits by using extension cords and multi-plug outlets.
Use extension cords only when necessary and make sure they are heavy enough for the job.
Avoid creating an “octopus” by inserting several plugs into a multi-plug outlet connected to a
single wall outlet. Extension cords should ONLY be used on a temporary basis in situations
where fixed wiring is not feasible.
 Dimmed lights, reduced output from heaters and poor monitor pictures are all symptoms of an
overloaded circuit. Keep the total load at any one time safely below maximum capacity.
 If wires are exposed, they may cause a shock to a person who comes into contact with them.
Cords should not be hung on nails, run over or wrapped around objects, knotted or twisted.
This may break the wire or insulation. Short circuits are usually caused by bare wires touching
due to breakdown of insulation. Electrical tape or any other kind of tape is not adequate for
insulation!
 Electrical cords should be examined visually before use for external defects such as: Fraying
(worn out) and exposed wiring, loose parts, deformed or missing parts, damage to outer jacket
or insulation, evidence of internal damage such as pinched or crushed outer jacket. If any
defects are found the electric cords should be removed from service immediately.
 Pull the plug not the cord. Pulling the cord could break a wire, causing a short circuit.
 Plug your heavy current consuming or any other large appliances into an outlet that is not
shared with other appliances. Do not tamper with fuses as this is a potential fire hazard. Do not
overload circuits as this may cause the wires to heat and ignite insulation or other combustibles.
 Keep lab equipment properly cleaned and maintained.
 Ensure lamps are free from contact with flammable material. Always use lights bulbs with the
recommended wattage for your lamp and equipment.
 Be aware of the odor of burning plastic or wire.
 ALWAYS follow the manufacturer recommendations when using or installing new lab
equipment. Wiring installations should always be made by a licensed electrician or other
qualified person. All electrical lab equipment should have the label of a testing laboratory.
 Be aware of missing ground prong and outlet cover, pinched wires, damaged casings on
electrical outlets.
 Inform Lab engineer / Lab assistant of any failure of safety preventive measures and safe
practices as soon you notice it. Be alert and proceed with caution at all times in the laboratory.
 Conduct yourself in a responsible manner at all times in the EE Labs.
Page | 70
 Follow all written and verbal instructions carefully. If you do not understand a direction or
part of a procedure, ASK YOUR LAB ENGINEER / LAB ASSISTANT BEFORE
PROCEEDING WITH THE ACTIVITY.
 Never work alone in the laboratory. No student may work in EE Labs without the presence of
the Lab engineer / Lab assistant.
 Perform only those experiments authorized by your teacher. Carefully follow all instructions,
both written and oral. Unauthorized experiments are not allowed.
 Be prepared for your work in the EE Labs. Read all procedures thoroughly before entering the
laboratory. Never fool around in the laboratory. Horseplay, practical jokes, and pranks are
dangerous and prohibited.
 Always work in a well-ventilated area.
 Observe good housekeeping practices. Work areas should be kept clean and tidy at all times.
 Experiments must be personally monitored at all times. Do not wander around the room,
distract other students, startle other students or interfere with the laboratory experiments of
others.
 Dress properly during a laboratory activity. Long hair, dangling jewelry, and loose or baggy
clothing are a hazard in the laboratory. Long hair must be tied back, and dangling jewelry and
baggy clothing must be secured. Shoes must completely cover the foot.
 Know the locations and operating procedures of all safety equipment including fire
extinguisher. Know what to do if there is a fire during a lab period; “Turn off equipment, if
possible and exit EE lab immediately.”
Page | 71

National University lab manual for electronic circuit design

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National University lab manual for electronic circuit design

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Lab Manual of ‘Electronic Circuit Design’

Department of Electrical Engineering

EL224: ELECTRONICS CIRCUIT DESIGN

Created by: Engr. Muhammad Abdullah

1st Revision By: Engr. Hamza Ahmad

Last Updated by: Engr. Muhammad Arslan

Approved by the HoD:

2 Course Learning Outcomes of Lab 5

18 Appendix A: Lab Evaluation Criteria 68

19 Appendix B: Lab Rubrics 69

20 Appendix C: Safety around Electricity 70

1 DC Power Supply: Used to supply power to electronic components

2 Function Generator: Used to supply different type of signals

3 Oscilloscope: Used to view the waveforms from the circuit

6 Transistors: Used for amplification and switching purposes

7 Resistors: Used for dissipation purposes

8 Capacitors: Used to store energy

Course Learning Outcomes of Lab

L = Lab, Q = Quiz, F = Final

01 To Implement a stable bias circuit of a given Q-point 1,2,4

To Implement a Common Emitter Amplifier of given parameters and record its

07 To Design a Wien Bridge Oscillator of given output specifications 1,3,4

08 To Design a Colpitts Oscillator of given output specifications 1,3,4

10 To Design a Wien Bridge Oscillator of given output specifications 1,3,4

11 To Design a 555 timer Oscillator of given output specifications 1,3,4

12 To Implement a Common Source Amplifier of given parameters 2,4

13 To Implement a Common Drain Amplifier of given parameters 2,4

14 Open-Ended Lab 2,4

EXPERIMENT 1 Date: ________________

To Implement a stable bias circuit of a given Q-point

DC Analysis of Transistor Biasing Voltage Divider Circuit:

𝐼𝐸  𝐼𝐶  𝛽𝐼𝐵 Eq. (3)

Put 𝐼𝐶 = 0  𝑉𝐶𝐸 = 𝑉𝐶𝐶  Cutoff point is: (𝑉𝐶𝐶 , 0)

Fig 1.3: DC Load Line and Location for Ideal Q-point

Step # 2: Find 𝑅𝐶 + 𝑅𝐸 using Eq.(8)

Step # 3: Choosing 𝑅𝐸 and 𝑅𝐶

Step # 5: Find 𝑉𝐵𝐵 using Eq.(5)

Step # 6: Find 𝑅1 and 𝑅2 using Eq.(1) and Eq.(2)

Statement Score Beginning

CLO: MARKS OBTAINED

Instructor’s Signatures: __________________________

EXPERIMENT 2 Date: ________________

To Implement a Common Emitter Amplifier of given parameters

Fig 2.1: CE Amplifier

Effect of Coupling Capacitors:

Effect of Internal Transistor Capacitances:

Fig 2.2: Normalized Voltage Gain Curve vs Frequency

Input RC Circuit Output RC Circuit Bypass RC Circuit

Phase Shift 𝑋𝐶1 𝑋𝐶3 𝑋𝐶2

Table 2.1: Low Frequency Response Summary

High Frequency Response:

Input RC Circuit Output RC Circuit

𝑅𝑠 ||𝑅1 || 𝑅2 || 𝛽𝑎𝑐 𝑟𝑒 ′ 𝑅𝐶 ||𝑅𝐿

Complete Frequency Response:

Fig 2.3: Complete Frequency Response of Amplifier

Dominant Critical Frequencies:

Fig 2.4: Response curve showing Bandwidth of Amplifier

Task 1: Calculate Midrange voltage gain in dB

Task 2: Low Frequency response parameters

Input RC Circuit Output RC Circuit Bypass RC Circuit

Task 3: High Frequency response parameters

Input RC Circuit Output RC Circuit

Actual Frequency Response: