17mb95 Service Manual 509 PDF

Table of Contents
1. INTRODUCTION ........................................................................................................................... 3
2. TUNER............................................................................................................................................ 4
3. AUDIO AMPLIFIER STAGES ...................................................................................................... 8
A. MAIN AMPLIFIER (TAS5719)(6-8 W option) ......................................................................... 8
B. MAIN AMPLIFIER (TS4962M)(2.5 W option) ....................................................................... 12
C. HEADPHONE AMPLIFIER STAGE ....................................................................................... 14
4. POWER STAGE ........................................................................................................................... 15
5. MICROCONTROLLER (MSTAR MSD8WB9BX)..................................................................... 24
6. 1Gb DDR3 SDRAM ..................................................................................................................... 28
7. 1Gb G-die DDR3 SDRAM ........................................................................................................... 29
8. 2Gbit (256M x 8 bit) NAND Flash Memory................................................................................. 31
9. 16M-BIT [16M x 1] CMOS SERIAL FLASH EEPROM ............................................................ 35
10. USB Interface ................................................................................................................................ 38
11. CI Interface .................................................................................................................................... 41
12. Demodulator Stage ........................................................................................................................ 41
13. LNB supply and control IC ........................................................................................................... 47
14. Software Update ............................................................................................................................ 49
15. Troubleshooting............................................................................................................................. 49
A. No Backlight Problem ........................................................................................................... 49
B. CI Module Problem ............................................................................................................... 51
C. Staying in Stand-by Mode ..................................................................................................... 53
D. IR Problem ............................................................................................................................ 54
E. Keypad Touchpad Problems.................................................................................................. 54
F. USB Problems ....................................................................................................................... 55
G. No Sound Problem ................................................................................................................ 56
H. Standby On/Off Problem ....................................................................................................... 56
I. No Signal Problem ................................................................................................................ 57
16. Service Menu Settings ................................................................................................................... 57
17. General Block Diagram ................................................................................................................. 63
2
1. INTRODUCTION
17MB95 main board is driven by MStar SOC. This IC is a single chip iDTV solution that
supports channel decoding, MPEG decoding, and media-center functionality enabled by a
high performance AV CODEC and CPU.
Key features includes,
Combo Front-End Demodulator
A multi standart A/V format decoder
The MACEpro video processor
Home theatre sound processor
Internet and Variety of Connectivity Support
Dual-stream decoder for 3D contents
Mılti-purpose CPU for OS and multimedia
Peripheral and power management
Supported peripherals are:

1 RF input VHF I, VHF III, UHF
1 Satellite input
1 Side AV (CVBS, R/L_Audio)
1 SCART socket(Common)
1 Side YPbPr
1 Side S-Video(Common)
1 PC input(Common)
3 HDMI input
1 Common interface(Common)
1 S/PDIF output
1 Headphone(Common)
2 USB
1 Ethernet-RJ45
1 External Touchpad(Common)
3
2. TUNER
A. SI2156 Terrestrial and Cable TV Tuner:
A.1. Description:
The Si2156 integrates a complete hybrid TV tuner supporting all worldwide terrestrial and
cable TV standards. Leveraging Silicon Labs’ field proven digital low-IF architecture, the
Si2156 maintains the unmatched performance and design simplicity of the Si2153 while
further reducing footprint size and bill of materials cost. No external LNAs, tracking filters,
wirewound inductors, or SAW filters are used.
Compared with competing silicon tuners and discrete MOPLL-based tuners, the Si2156
delivers superior picture quality and a higher number of received stations in crowded and
near/far real-world reception conditions. The high linearity and low noise RF front-end
delivers superior blocking performance and higher sensitivity in the presence of strong
undesired channels and interference.
The Si2156 integrates the complete signal path from antenna input to IF outputs for both
analog and digital transmission standards. Compared to traditional discrete MOPLL-based
tuners, the Si2156 eliminates hundreds of external components including external LNAs,
tracking filter varactors and inductors (unlike competing silicon tuners), and SAW filters,
resulting in the simplest, lowest-cost BOM for a hybrid TV tuner.
Interfacing the Si2156 seamlessly with the Si2165 DVB-T/C demodulator creates a
complete terrestrial and cable DVB-T/C receiver plus PAL/SECAM tuner.
A.2. Features:
- Worldwide hybrid TV tuner
- Analog TV: NTSC, PAL/SECAM
- Digital TV: ATSC/QAM, DVB-T/T2/C, ISDB-T/C, DTMB
- 42-1002 MHz frequency range
- Compliance to A/74, NorDig, D-Book, C-Book, ARIB, EN55020, OpenCable™
specifications
- Best-in-class real-world reception
- Exceeds discrete MOPLL-based tuners
- Highly integrated, lowest BOM
- No SAW filters or wirewound inductors required
- Integrated LNAs and complete tracking filters
4
- No alignment, tuning or calibration required
- Digital low-IF architecture
- Integrated channel select filters
- Flexible output interface
- ALIF to analog TV demodulator or SoC
- DLIF to digital TV demodulator or SoC
- 3.3 and 1.8 V power supplies
- Standard CMOS process technology
- 5 x 5 mm, 32-pin QFN package
- RoHS compliant
Figure 1: Pin description
5
Table 1: Pin functions
6
B. M88TS2022 Satellite Tuner
B.1. Features and General Description
B.2. Pin Assigment
7
B.3. Absolute Maximum Ratings and Recommended Operating
Conditions
3. AUDIO AMPLIFIER STAGES
A. MAIN AMPLIFIER (TAS5719)(6-8 W option)

a. General Description
The TAS5717/TAS5719 is a 10-W/15-W, efficient,digital audio-power amplifier for
driving stereo bridge-tied speakers. One serial data input allows processing of up to two
discrete audio channels and seamless integration to most digital audio processors and MPEG
decoders. The device accepts a wide of input data and data rates. A fully programmable data
path routes these channels to the internal speaker drivers.
The TAS5717/9 is a slave-only device receiving all clocks from external sources. The
TAS5717/TAS5719 operates with a PWM carrier between a 384-kHz switching rate and a
352-KHz switching rate, depending on the input sample rate. Oversampling combined with a
fourth-order noise shaper provides a flat noise floor and excellent dynamic range from 20 Hz
to 20 kHz.
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b. Features
• Audio Input/Output
– TAS5717 Supports 2×10 W and TAS5719 Supports 2×15 W Output
– Wide PVDD Range, From 4.5 V to 26 V
– Efficient Class-D Operation Eliminates Need for Heatsinks
– Requires Only 3.3 V and PVDD
– One Serial Audio Input (Two Audio Channels)
– I2C Address Selection via PIN (Chip Select)
– Supports 8-kHz to 48-kHz Sample Rate (LJ/RJ/I2S)
– External Headphone-Amplifier Shutdown Signal
– Integrated CAP-Free Headphone Amplifier
– Stereo Headphone (Stereo 2-V RMS Line Driver) Outputs
• Audio/PWM Processing
– Independent Channel Volume Controls With 24-dB to Mute
– Programmable Two-Band Dynamic Range Control
– 14 Programmable Biquads for Speaker EQ
– Programmable Coefficients for DRC Filters
– DC Blocking Filters
– 0.125-dB Fine Volume Support
• General Features
– Serial Control Interface Operational Without MCLK
– Factory-Trimmed Internal Oscillator for Automatic Rate Detection
– Surface Mount, 48-Pin, 7-mm × 7-mm HTQFP Package
– AD, BD, and Ternary PWM-Mode Support
– Thermal and Short-Circuit Protection
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• Benefits
– EQ: Speaker Equalization Improves Audio Performance
– DRC: Dynamic Range Compression. Can Be Used As Power Limiter. Enables

Speaker Protection, Easy Listening, Night-Mode Listening
– DirectPath Technology: Eliminates Bulky DC Blocking Capacitors
– Stereo Headphone/Stereo Line Drivers: Adjust Gain via External Resistors, Dedicated
Active Headpone Mute Pin, High Signal-to-Noise Ratio
– Two-Band DRC: Set Two Different Thresholds for Low- and High-Frequency
Content
c. Pin descriptions and functions:
10
11
Table 3: Recomnended operating conditions
B. MAIN AMPLIFIER (TS4962M)(2.5 W option)

a. General Description
The TS4962M is a differential Class-D BTL power amplifier. It is able to drive up to 2.3W
into a 4Ω load and 1.4W into a 8Ω load at 5V. It achieves outstanding efficiency (88%typ.)
compared to classical Class-AB audio amps. The gain of the device can be controlled via two
external gain-setting resistors. Pop & click reduction circuitry provides low on/off switch
noise while allowing the device to start within 5ms. A standby function (active low) allows
the reduction of current consumption to 10nA typ.
b. Features
- Operating from VCC = 2.4V to 5.5V

- Standby mode active low
- Output power: 3W into 4Ω and 1.75W into 8Ω
- with 10% THD+N max and 5V power supply.
- Output power: 2.3W @5V or 0.75W @ 3.0V
- into 4Ω with 1% THD+N max.
- Output power: 1.4W @5V or 0.45W @ 3.0V
- into 8Ω with 1% THD+N max.
- Adjustable gain via external resistors
- Low current consumption 2mA @ 3V
- Efficiency: 88% typ.
- Signal to noise ratio: 85dB typ.
- PSRR: 63dB typ. @217Hz with 6dB gain
- PWM base frequency: 250kHz
12
- Low pop & click noise
- Thermal shutdown protection
- Available in flip-chip 9 x 300μm (Pb-free)
c. Pin descriptions and functions:
13
Table 4: Recommended operating conditions
C. HEADPHONE AMPLIFIER STAGE

Headphone is a SoC (single on chip) configuration in mainboard, design scheme is shown
in figure 4.
Figure 4: Headphone
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4. POWER STAGE
Figure 5: Power socket and power options
Power socket is used for taking voltages which are 3.3V, 12V, 5V and 24V(VDD_Audio).
These voltages are produced in power card. Also socket is used for giving dimming, backlight
and standbye signals with power card. İt is shown in figure 5.
24V(VDD_Audio) goes directly to the audio side, through power socket other incoming
voltages from power card are converted several voltages.
Figure 6: Power steps
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FDC642P
General Description and Features
TPS65251
a) General Description
The TPS65251 features three synchronous wide input range high efficiency buck
converters. The converters are designed to simplify its application while giving the designer
the option to optimize their usage according to the target application.
The converters can operate in 5-, 9-, 12- or 15-V systems and have integrated power
transistors. The output voltage can be set externally using a resistor divider to any value
between 0.8 V and close to the input supply. Each converter features enable pin that allows a
delayed start-up for sequencing purposes, soft start pin that allows adjustable soft-start time
by choosing the soft-start capacitor, and a current limit (RLIMx) pin that enables designer to
adjust current limit by selecting an external resistor and optimize the choice of inductor. The
current mode control allows a simple RC compensation.
The switching frequency of the converters can either be set with an external resistor
connected to ROSC pin or can be synchronized to an external clock connected to SYNC pin if
needed. The switching regulators are designed to operate from 300 kHz to 2.2 MHz. 180° out
of phase operation between Buck 1 and Buck 2, 3 (Buck 2 and 3 run in phase) minimizes the
input filter requirements.
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TPS65251 features a supervisor circuit that monitors each converter output. The PGOOD
pin is asserted once sequencing is done, all PG signals are reported and a selectable end of
reset time lapses. The polarity of the PGOOD signal is active high.
TPS65251 also features a light load pulse skipping mode (PSM) by allowing the LOW_P
pin tied to V3V. The PSM mode allows for a reduction on the input power supplied to the
system when the host processor is in stand-by (low activity) mode.
b) Features
• Wide Input Supply Voltage Range (4.5 V - 18 V)
• 0.8 V, 1% Accuracy Reference
• Continuous Loading: 3 A (Buck 1), 2 A (Buck 2 and 3)
• Maximum Current: 3.5 A (Buck 1), 2.5 A (Buck 2 and 3)
• Adjustable Switching Frequency 300 kHz - 2.2 MHz Set By External Resistor
• Dedicated Enable for Each Buck
• External Synchronization Pin for Oscillator
• External Enable/Sequencing and Soft Start Pins
• Adjustable Current Limit Set By External Resistor
• Soft Start Pins
• Current-Mode Control With Simple Compensation Circuit
• Power Good
• Optional Low Power Mode Operation for Light Loads
• QFN Package, 40-Pin 6 mm x 6 mm RHA
APPLICATIONS
• Set Top Boxes
• Blu-ray DVD
• Security Camera
• Car Audio/Video
• DTV
• DVR
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MP1484
The MP1484 is a monolithic synchronous buck regulator. The device integrates top and
bottom 85mΩ MOSFETS that provide 3A of continuous load current over a wide operating
input voltage of 4.75V to 18V. Current mode control provides fast transient response and
cycle-by-cycle current limit.
An adjustable soft-start prevents inrush current at turn-on and in shutdown mode, the
supply current drops below 1μA.
The MP1484 is PIN compatible to the MP1482 2A/18V/Synchronous Step-Down Converter.
b) Features
• 3A Continuous Output Current
• Wide 4.75V to 18V Operating Input Range
• Integrated 85mΩ Power MOSFET Switches
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• Output Adjustable from 0.925V to 20V
• Up to 95% Efficiency
• Programmable Soft-Start
• Stable with Low ESR Ceramic Output Capacitors
• Fixed 340KHz Frequency
• Cycle-by-Cycle Over Current Protection
• Input Under Voltage Lockout
• Thermally Enhanced 8-Pin SOIC Package
APPLICATIONS
• FPGA, ASIC, DSP Power Supplies
• LCD TV
• Green Electronics/Appliances
• Notebook Computers
Figure 8: General description
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APL5910
The APL5910 is a 1A ultra low dropout linear regulator. The IC needs two supply
voltages, one is a control voltage (VCNTL) for the control circuitry, the other is a main
supply voltage (VIN) for power conversion, to reduce power dissipation and provide
extremely low dropout voltage. The APL5910 integrates many functions. A Power-On- Reset
(POR) circuit monitors both supply voltages on VCNTL and VIN pins to prevent erroneous
operations. The functions of thermal shutdown and current-limit protect the device against
thermal and current over-loads. A POK indicates that the output voltage status with a delay
time set internally. It can control other converter for power sequence. The APL5910 can be
enabled by other power systems. Pulling and holding the EN voltage below 0.4V shuts off the
output.
The APL5910 is available in a SOP-8P package which features small size as SOP-8 and an
Exposed Pad to reduce the junction-to-case resistance to extend power range of applications.
b) Features
Ultra Low Dropout
- 0.12V (Typical) at 1AOutput Current
0.8V Reference Voltage
High Output Accuracy
- ±1.5%over Line, Load, and Temperature Range
21
Fast Transient Response
Adjustable Output Voltage
Power-On-Reset Monitoring on Both VCNTL and VIN Pins
Internal Soft-Start
Current-Limit and ShortCurrent-Limit Protections
Thermal Shutdown with Hysteresis
Open-Drain VOUT Voltage Indicator (POK)
Low Shutdown Quiescent Current (< 30mA )
Shutdown/Enable Control Function
Simple SOP-8P Package with Exposed Pad
Lead Free and Green Devices Available (RoHS Compliant)
APPLICATIONS
Motherboards, VGA Cards
Notebook PCs
Add-in Cards
Figure 9: Pin configuration
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Table 9: Pin description
LM1117
The LM1117 is a series of low dropout voltage regulators with a dropout of 1.2V at
800mA of load current. It has the same pin-out as National Semiconductor’s industry standard
LM317.
The LM1117 is available in an adjustable version, which can set the output voltage from
1.25V to 13.8V with only two external resistors. In addition, it is also available in five fixed
voltages, 1.8V, 2.5V, 2.85V, 3.3V, and 5V.
The LM1117 offers current limiting and thermal shutdown. Its circuit includes a zener
trimmed bandgap reference to assure output voltage accuracy to within ±1%.
The LM1117 series is available in LLP, TO-263, SOT-223, TO-220, and TO-252 D-PAK
packages. A minimum of 10µF tantalum capacitor is required at the output to improve the
transient response and stability.
b) Features
Available in 1.8V, 2.5V, 2.85V, 3.3V, 5V, and Adjustable Versions
Space Saving SOT-223 and LLP Packages
Current Limiting and Thermal Protection
Output Current 800mA
Line Regulation 0.2% (Max)
Load Regulation 0.4% (Max)
Temperature Range:
23
- LM1117 0˚C to 125˚C
- LM1117I −40˚C to 125˚C
Applications
- 2.85V Model for SCSI-2 Active Termination
- Post Regulator for Switching DC/DC Converter
- High Efficiency Linear Regulators
- Battery Charger
- Battery Powered Instrumentation
5. MICROCONTROLLER (MSTAR MSD8WB9BX)

24
b) Features
25
26
27
6. 1Gb DDR3 SDRAM

Hynix H5TQ1G630FA
a) Description
The H5TQ1G6(8)3DFR-xxx series are a 1,073,741,824-bit CMOS Double Data Rate III
(DDR3) Synchronous DRAM, ideally suited for the main memory applications which
requires large memory density and high bandwidth. Hynix 1Gb DDR3 SDRAMs offer fully
synchronous operations referenced to both rising and falling edges of the clock. While all
addresses and control inputs are latched on the rising edges of the CK (falling edges of the
CK), Data, Data strobes and Write data masks inputs are sampled on both rising and falling
edges of it. The data paths are internally pipelined and 8-bit prefetched to achieve very high
bandwidth.
b) Features
• DQ Power & Power supply : VDD & VDDQ = 1.5V +/- 0.075V
• DQ Ground supply : VSSQ = Ground
• Fully differential clock inputs (CK, CK) operation
• Differential Data Strobe (DQS, DQS)
• On chip DLL align DQ, DQS and DQS transition with CK transition
• DM masks write data-in at the both rising and falling edges of the data strobe
• All addresses and control inputs except data, data strobes and data masks latched on the
rising edges of the clock
• Programmable CAS latency 6, 7, 8, 9, 10, 11, 12, 13 and 14 supported
• Programmable additive latency 0, CL-1, and CL-2 supported
• Programmable CAS Write latency (CWL) = 5, 6, 7, 8, 9, 10
• Programmable burst length 4/8 with both nibble sequential and interleave mode
• Programmable PASR(Partial Array Self-Refresh) for Digital consumer Applications.
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• Programmable BL=4 supported (tCCD=2CLK) for Digi-tal consumer Applications.
• Programmable ZQ calibration supported
• BL switch on the fly
• 8banks
• Average Refresh Cycle (Tcase of 0 oC~ 95 oC)
- 7.8 μs at -40oC ~ 85 oC
- 3.9 μs at 85oC ~ 95 oC
- Commercial Temperature ( 0oC ~ 85 oC)
- Industrial Temperature ( -40oC ~ 85 oC)
• Auto Self Refresh supported
• JEDEC standard 78ball FBGA(x8), 96ball FBGA(x16)
• Driver strength selected by EMRS
• Dynamic On Die Termination supported
• Asynchronous RESET pin supported
• TDQS (Termination Data Strobe) supported (x8 only)
• Write Levelization supported
• On Die Thermal Sensor supported
• 8 bit pre-fetch
7. 1Gb G-die DDR3 SDRAM

Samsung K4B1G1646G
a) Key Features
• JEDEC standard 1.5V ± 0.075V Power Supply
• VDDQ = 1.5V ± 0.075V
• 400 MHz fCK for 800Mb/sec/pin, 533MHz fCK for 1066Mb/sec/pin, 667MHz fCK for
1333Mb/sec/pin, 800MHz fCK for 1600Mb/sec/pin 900MHz fCK for 1866Mb/sec/pin
29
• 8 Banks
• Programmable CAS Latency(posted CAS): 5,6,7,8,9,10,11,13
• Programmable Additive Latency: 0, CL-2 or CL-1 clock
• Programmable CAS Write Latency (CWL) = 5 (DDR3-800), 6 (DDR3-1066), 7 (DDR3-
1333), 8 (DDR3-1600) and 9 (DDR3-1866)
• 8-bit pre-fetch
• Burst Length: 8 (Interleave without any limit, sequential with starting address “000” only), 4
with tCCD = 4 which does not allow seamless read or write [either On the fly using A12 or
MRS]
• Bi-directional Differential Data-Strobe
• Internal(self) calibration : Internal self calibration through ZQ pin (RZQ : 240 ohm ± 1%)
• On Die Termination using ODT pin
• Average Refresh Period 7.8us at lower than TCASE 85°C, 3.9us at 85°C < TCASE < 95 °C
• Asynchronous Reset
• Package : 78 balls FBGA - x4/x8
• All of Lead-Free products are compliant for RoHS
• All of products are Halogen-free
Table 12: 1Gb DDR3 G-die Speed bins
b) Description
The 1Gb DDR3 SDRAM G-die is organized as a 32Mbit x 4 I/Os x 8banks, 16Mbit x 8
I/Os x 8banks device. This synchronous device achieves high speed double-data-rate transfer
rates of up to 1866Mb/sec/pin (DDR3- 1866) for general applications.
The chip is designed to comply with the following key DDR3 SDRAM fea-tures such as
posted CAS, Programmable CWL, Internal (Self) Calibration, On Die Termination using
ODT pin and Asynchronous Reset.
All of the control and address inputs are synchronized with a pair of exter-nally supplied
differential clocks. Inputs are latched at the crosspoint of dif-ferential clocks (CK rising and
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CK falling). All I/Os are synchronized with a pair of bidirectional strobes (DQS and DQS) in
a source synchronous fash-ion. The address bus is used to convey row, column, and bank
address information in a RAS/CAS multiplexing style. The DDR3 device operates with a
single 1.5V ± 0.075V power supply and 1.5V ± 0.075V VDDQ. The 1Gb DDR3 G-die device
is available in 78ball FBGAs(x4/x8).
Table 13: Absolute Maximum DC Ratings
8. 2Gbit (256M x 8 bit) NAND Flash Memory

H27U2G8F2CTR-BC
a) Key Features
DENSITY
- 2Gbit: 2048blocks
Nand FLASH INTERFACE
- NAND Interface
- ADDRESS / DATA Multiplexing
SUPPLY VOLTAGE
- Vcc = 3.0/1.8V Volt core supply voltage for Program,
Erase and Read operations.
MEMORY CELL ARRAY
- X8: (2K + 64) bytes x 64 pages x 2048 blocks
- X16: (1k+32) words x 64 pages x 2048 blocks
PAGE SIZE
- X8: (2048 + 64 spare) bytes
31
- X16:(1024 + 32spare) Words
Block SIZE
- X8: (128K + 4K spare) bytes
- X16:(64K + 2K spare) Words
PAGE READ / PROGRAM
- Random access: 25us (Max)
- Sequential access: 25ns / 45ns (3.0V/1.8V, min.)
- Program time(3.0V/1.8V): 200us / 250us (Typ)
- Multi-page program time (2 pages):
200us / 250us (3.0V/1.8V, Typ.)
BLOCK ERASE / MULTIPLE BLOCK ERASE
- Block erase time: 3.5 ms (Typ)
- Multi-block erase time (2 blocks):
3.5ms/ 3.5ms (3.0V/1.8V, Typ.)
SEQURITY
- OTP area
- Serial number (unique ID)
- Hardware program/erase disabled during Power transition
- Multiplane Architecture:
Array is split into two independent planes.
Parallel operations on both planes are available, having
program and erase time.
- Single and multiplane copy back program with automatic
EDC (error detection code)
- Single and multiplane page re-program
- Single and multiplane cache program
- Cache read
- Multiplane block erase
Reliability
- 100,000 Program / Erase cycles (with 1bit /528Byte ECC)
- 10 Year Data retention
ONFI 1.0 COMPLIANT COMMAND SET
ELECTRONICAL SIGNATURE
- Maunufacture ID: ADh
32
- Device ID
PACKAGE
- Lead/Halogen Free
- TSOP48 12 x 20 x 1.2 mm
- FBGA63 9 x 11 x 1.0 mm
b) Description
H27(U_S)2G8_6F2C series is a 256Mx8bit with spare 8Mx8 bit capacity. The device is
offered in 3.0/1.8 Vcc Power Supply, and with x8 and x16 I/O interface Its NAND cell
provides the most cost-effective solution for the solid state mass storage market. The memory
is divided into blocks that can be erased independently so it is possible to preserve valid data
while old data is erased.
The device contains 2048 blocks, composed by 64 pages. Memory array is split into 2
planes, each of them consisting of 1024 blocks. Like all other 2KB - page NAND Flash
devices, a program operation allows to write the 2112-byte page in typical 200us(3.3V) and
an erase operation can be performed in typical 3.5ms on a 128K-byte block.
In addition to this, thanks to multi-plane architecture, it is possible to program 2 pages at a
time (one per each plane) or to erase 2 blocks at a time (again, one per each plane). As a
consequence, multi-plane architecture allows program time to be reduced by 40% and erase
time to be reduction by 50%. In case of multi-plane operation, there is small degradation at
1.8V application in terms of program/erase time.
The multiplane operations are supported both with traditional and ONFI 1.0 protocols.
Data in the page can be read out at 25ns (3V version) and 45ns (1.8V version) cycle time per
byte. The I/O pins serve as the ports for address and data input/output as well as command
input. This interface allows a reduced pin count and easy migration towards different
densities, without any rearrangement of footprint. Commands, Data and Addresses are
synchronously introduced using CE#, WE#, ALE and CLE input pin. The on-chip
Program/Erase Controller automates all read, program and erase functions including pulse
repetition, where required, and internal verification and margining of data.
A WP# pin is available to provide hardware protection against program and erase operations.
The output pin RB# (open drain buffer) signals the status of the device during each
operation. In a system with multiple memories the RB# pins can be connected all together to
provide a global status signal. Each block can be programmed and erased up to 100,000
cycles with ECC (error correction code) on. To extend the lifetime of Nand Flash devices, the
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implementation of an ECC is mandatory. The chip supports CE# don't care function. This
function allows the direct download of the code from the NAND Flash memory device by a
microcontroller, since the CE# transitions do not stop the read operation. In addition, device
supports ONFI 1.0 specification.
The copy back function allows the optimization of defective blocks management: when a
page program operation fails the data can be directly programmed in another page inside the
same array section without the time consuming serial
data insertion phase. Copy back operation automatically executes embedded error detection
operation: 1 bit error out of every 528-byte (x8) or 1 bit error out of every 264-word (x16) can
be detected. With this feature it is no longer necessary to use an external to detect copy back
operation errors. Multiplane copy back is also supported, both with traditional and ONFI 1.0
protocols. Data read out after copy back read (both for single and multiplane cases) is
allowed. In addition, Cache program and multi cache program operations improve the
programing throughput by programing data using the cache register.
The devices provide two innovative features: page re-program and multiplane page re
program. The page re-program allows to re-program one page. Normally, this operation is
performed after a previously failed page program operation.Similarly, the multiplane page re-
program allows to re-program two pages in parallel, one per each plane. The first page must
be in the first plane while the second page must be in the second plane; the multiplane page
re-program operation is performed after a previously failed multiplane page program
operation. The page re-program and multiplane page re-program guarantee imporve
performance, since data insertion can be omitted during re-program operations, and save ram
buffer at the host in the case of program failure. The devices, available in the TSOP48
(12X20mm) package, support the ONFI1.0 specfication and come with four sequrity features:
- OTP (one time programmable) area, which is a restricted access area where sensitive
data/code can be stored permantely.
- Serial number (unique identifier), which allows the devices to be uniquely indentified.
- Read ID2 extention
These security features are subject to an NDA (non-disclosure agreement) and are,
therefore, no described in the datasheet. For more details about them, contact your nearest
Hynix sales office.
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Table 15: DC and operating characteristic
9. 16M-BIT [16M x 1] CMOS SERIAL FLASH EEPROM

MX25L1602 Mstar SPI Flash
a) Key Features
■ HIGH DENSITY NAND FLASH MEMORIES

GENERAL
• 16,777,216 x 1 bit structure
• 256 Equal Sectors with 8K-byte each
- Any sector can be erased
• 4096 Equal Segments with 512-byte each
- Provides sequential output within any segment
• Single Power Supply Operation
- 3.0 to 3.6 volt for read, erase, and program operations
• Latch-up protected to 100mA from -1V to Vcc +1V
• Low Vcc write inhibit is equal to or less than 2.5V
35
PERFORMANCE
• High Performance
- Fast access time: 20MHz serial clock (50pF + 1TTL Load)
- Fast program time: 5ms/page (typical, 128-byte per page)
- Fast erase time: 300ms/sector (typical, 8K-byte per sector)
• Low Power Consumption
- Low active read current: 10mA (typical) at 17MHz
- Low active programming current: 10mA (typical)
- Low active erase current: 10mA (typical)
- Low standby current: 30uA (typical, CMOS)
• Minimum 100,000 erase/program cycle
SOFTWARE FEATURES
• Input Data Format
- 1-byte Command code, 3-byte address, 1-byte byte address
• 512-byte Sequential Read Operation
• Built in 9-bit (A0 to A8) pre-settable address counter to support the 512-byte sequential read
operation
• Auto Erase and Auto Program Algorithm
- Automatically erases and verifies data at selected sector
- Automatically programs and verifies data at selected page by an internal algroithm
that automatically times the program pulse widths (Any page to be programed should have
page in the erased state first)
• Status Register Feature
- Provides detection of program and erase operation completion.
- Provides auto erase/ program error report
HARDWARE FEATURES
• SCLK Input
- Serial clock input
• SI Input
- Serial Data Input
• SO Output
- Serial Data Output
36
• PACKAGE
- 28-pin SOP (330mil)
b) General Description
The MX25L1602 is a CMOS 16,777,216 bit serial Flash EEPROM, which is configured as
2,097,152 x 8 internally. The MX25L1602 features a serial peripheral interface and software
protocol allowing operation on a simple 3- wire bus. The three bus signals are a clock input
(SCLK), a serial data input (SI), and a serial data output (SO). SPI access to the device is
enabled by CS input.
The MX25L1602 provide sequential read operation on whole chip. The sequential read
operation is executed on a segment (512 byte) basis. User may start to read from any byte of
the segment. While the end of the segment is reached, the device will wrap around to the
beginning of the segment and continuously outputs data until CS goes high.
After program/erase command is issued, auto program/ erase algorithms which
program/erase and verify the specified page locations will be executed. Program command is
executed on a page (128 bytes) basis, and erase command is executed on both chip and sector
(8K bytes) basis.
To provide user with ease of interface, a status register is included to indicate the status of
the chip. The status read command can be issued to detect completion and error flag status of
a program or erase operation.
When the device is not in operation and CS is high, it is put in standby mode and draws
less than 30uA DC current.
The MX25L1602 utilizes MXIC's proprietary memory cell which reliably stores memory
contents even after 100,000 program and erase cycles.
37
Figure: Pin configuration.
Table 16: Pin description
10. USB Interface
Mstar IC has two input port for USB, therefore air mause, internal wi-fi interface and
USB2 are combined with HUB. This property is optional. If air mause and wi-fi interfaces are
not alined, two USB are connected directly to main IC.
38
Figure 10: USB description
USB2512B
The SMSC USB251xB/xBi hub is a family of low-power, configurable, MTT (multi
transaction translator) hub controller IC products for embedded USB solutions. The x in the
part number indicates the number of downstream ports available, while the B indicates battery
charging support. The SMSC hub supports lowspeed, full-speed, and hi-speed (if operating as
a hispeed hub) downstream devices on all of the enabled downstream ports.
b) Features
- USB251xB/xBi products are fully footprint compatible with USB251x/xi/xA/xAi
products as direct drop-in replacements
Cost savings include using the same PCB components and application of
USB-IF Compliance by Similarity
- Full power management with individual or ganged power control of each downstream
port
- Fully integrated USB termination and pull-up/pulldown resistors
- Supports a single external 3.3 V supply source; internal regulators provide 1.2 V
internal core voltage
- Onboard 24 MHz crystal driver, ceramic resonator, or external 24/48 MHz clock input
- Customizable vendor ID, product ID, and device ID
- 4 kilovolts of HBM JESD22-A114F ESD protection (powered and unpowered)
- Supports self- or bus-powered operation
39
- Supports the USB Battery Charging specification Rev. 1.1 for Charging Downstream
Ports (CDP)
- 36-pin QFN (6x6 mm) Lead-free RoHS compliant package
- USB251xBi products support the industrial temperature range of -40ºC to +85ºC
- USB251xB products support the extended commercial temperature range of 0ºC to
+85ºC
c) Applications
- LCD monitors and TVs
- Multi-function USB peripherals
- PC motherboards
- Set-top boxes, DVD players, DVR/PVR
- Printers and scanners
- PC media drive bay
- Portable hub boxes
- Mobile PC docking
- Embedded systems
Figure 11: Pin configurations
40
11. CI Interface
17MB95 Digital CI ve Smart Card Interface Block diagram:
Figure 12: CI interface
12. Demodulator Stage

A. MSB1231 DVB-T2
a) Key Features
41
b) General Description
c) Block Diagram
42
d) Pinning
43
e) Absolute Maximum Ratings and Recommended Operating Conditions
44
B. M88DS3002 DVB-S/S2 Demodulator
a) Key Features and General Description
45
b) Block Diagram
c) Pin Information
46
a) Absolute Maximum Ratings and Recommended Operating Conditions
13. LNB supply and control IC

MP8125
The MP8125 is a voltage regulator designed to provide efficient, low noise power to the
Satellite receiver’s RF LNB (Low Noise Block) converter via coaxial cable through a DiSEqC
1.x compatible link that receives instructions from a dedicated controller.
The MP8125 integrates a current mode boost regulator followed by a tracking linear
regulator. The boost regulator provides a clean and quiet power source that will not
contaminate the low noise RF signal down converted to the receiver. The tracking linear
regulator protects the output against overload or short.
The MP8125 provides a number of features described in the European EUTELSAT
specification (DiSEqC) including: voltage selection of horizontal or vertical polarization
directions of LNB and a selectable VOUT compensation for voltage drop on the long coaxial
cable. In accordance with DiSEqC standard, a tone signal of 22kHz is generated by an internal
oscillator and can be activated or deactivated onto output by EXTM pin.
The MP8125 is available in thermally enhanced TSSOP16 package.
47
b) Key Features
• DiSEqC 1.x Compatibility
• Up to 550mA Output Current
• 8V to 14V Input Voltage
• Boost Converter with Internal Switch
• Low Noise LDO Output
• Built-in 22kHz Tone Signal Generator
• Programmable Current Limit
• 1V Line Drop Compensation
• Adjustable Soft-start Time
• POK Indicator
• Short Circuit Protection
• Over Temperature Protection
• TSSOP16 Exposed Pad Package
APPLICATIONS
• LNB Power Supply and Control for Satellite Set Top Boxes
c) Package Reference
48
a) Absolute Maximum Ratings and Recommended Operating Conditions
14. Software Update

14.1 Main SW update
In MB95 project there is only one software. From following steps software update procedure
can be seen:
1. MB90_en.bin, mboot.bin and usb_auto_update_A1.txt documents should copy directly

inside of a flash memory(not in a folder).
2. Insert flash memory to the tv when tv is powered off.
3. While pushing the OK button in remote control, power on the and wait. TV will power-up
itself.
4. If First Time Installation screen comes, it means software update procedure is successful.
15. Troubleshooting
A. No Backlight Problem
Problem: If TV is working, led is normal and there is no picture and backlight on the panel.
Possible couses: Backlight pin, dimming pin, backlight supply, stby on/off pin
BACKLIGHT_ON/OFF pin should be high when the backlight is ON. R119 must be low
when the backlight is OFF. If it is a problem, please check Q10 and the panel cables. Also it
can be tested in TP50 in main board.
49
Dimming pin should be high or square wave in open position. If it is low, please check S60
for Mstar side and panel or power cables, connectors.
Backlight power supply should be in panel specs. Please check Q33, shown below; also it can
be checked TP53.
50
STBY_ON/OFF_NOT should be low for tv on condition, please check Q11’s collector.
B. CI Module Problem
Problem: CI is not working when CI module inserted.
Possible couses: Supply, suply control pin, detect pins, mechanical positions of pins.
CI supply should be 5V when CI module inserted. If it is not 5V please check
CI_PWR_CTRL, this pin should be low.
51
Please check mechanical position of CI module. Is it inserted properly or not?
Detect ports should be low. If it is not low please check CI connector pins, CI module
pins.
52
C. Staying in Stand-by Mode
Problem: Staying in stand-by mode, no other operation
This problem indicates a short on Vcc voltages. Protect pin should be logic high while normal
operation. When there is a short circuit protect pin will be logic low. If you detect logic low
on protect pin, unplug the TV set and control voltage points with a multimeter to find the
shorted voltage to ground.
53
D. IR Problem
Problem: LED or IR not working
Check LED card supply on MB95 chasis.
E. Keypad Touchpad Problems

Problem: Keypad or Touchpad is not working
Check keypad supply on MB95.
54
F. USB Problems
Problem: USB is not working or no USB Detection.
Check USB Supply, It should be nearly 5V. Also USB Enable should be logic high.
55
G. No Sound Problem
Problem: No audio at main TV speaker outputs.
Check supply voltages of 24V VDD_AUDIO, 3.3V AUDIO_AVDD and AUDIO_DVDD
with a voltage-meter. There may be a problem in headphone connector or headphone detect
circuit (when headphone is connected, speakers are automatically muted). Measure voltage at
HP_DETECT pin, it should be 3.3v.
H. Standby On/Off Problem

Problem: Device can not boot, TV hangs in standby mode.
There may be a problem about power supply. Check main supplies with a voltage-meter. Also
there may be a problem about SW. Try to update TV with latest SW. Additionally it is good
to check SW printouts via Teraterm. These printouts may give a clue about the problem. You
can use Scart-1 for terraterm connection.
56
I. No Signal Problem
Problem: No signal in TV mode.
Check tuner supply voltage; 5V_VCC, 3V3_TUNER and 1V8_TUNER. Check tuner options
are correctly set in Service menu. Check AGC voltage at IF_AGC pin of tuner.
16. Service Menu Settings

In order to reach service menu, first Press “MENU” buton, then write “4725” by uisng
remote controller.
You can see the service menu main screen below. You can check SW releases by using this
menu. In addition, you can make changes on video, audio etc. by using video settings, audio
settings titles.
57
Service Menu Main Screen
Video Settings
58
Audio Settings
Options-1 Menu
59
Options-2 Menu
Options-3 Menu
60
Tuner Settings Menu
Source Settings Menu
61
Diagnostic Menu
62
17. General Block Diagram
63
1 2 3 4 5 6 7 8
CN6 HDMI0_5V
21 CN5
20 HDMI0_RX0N M1 RXA0N 21
R62 R82
1 1
HDMI0_RX2P HDMI0_HPDIN 1 2
HDMI0_RX0P N3 RXA0P RXC0N R1 20
10R 2
1k R97
2 HDMI0_RX1N N1 RXA1N RXC0P T3 1 1
HDMI2_RX2P
R69 10R
3 1 2
HDMI0_RX2N HDMI0_RX1P N2 RXA1P RXC1N T1 2
10R R141
R10
1k2
4 10R HDMI0_RX1P HDMI0_RX2N P3 RXA2N RXC1P T2 3 1 2
HDMI2_RX2N
1
2
10R
5 R67 HDMI0_RX2P P2 RXA2P RXC2N U3 4 10R HDMI2_RX1P
R70 3 1
HDMI0_CLKN M3 U2 R112
A 6 1
10R
2
HDMI0_RX1N R83 RXACKN RXC2P 5 R158 A
HDMI1
7 10R HDMI0_RX0P Q2 2 1 2
HDMI0_CLKP M2 RXACKP RXCCKN R3 6 1 2
HDMI2_RX1N
1k 10R
HDMI3
1
2
R68 BC848B HDMI0_SCL V5 R2 10R

8
9 1
R66
10R
2
10R
HDMI0_RX0N
1
C14
HDMI0_SDA V4
AD1
DDCDA_CK
DDCDA_DA HDMI / USB RXCCKP
DDCDC_CK V6
W6
7
8 R106
2
R124
HDMI2_RX0P
HDMI2_5V
1 2
10 1
2
HDMI0_CLKP HOTPLUGA DDCDC_DA 9 10R HDMI2_RX0N
11 R65 HDMI0_ARC N4 ARC0 3 HOTPLUGC AD4 10 10R HDMI2_CLKP
R71 1
12 1
10R
2
HDMI0_CLKN 1uF 11 R160 R100
J1 F1
HDMI1_RX0N U4
HDMI1_5V
1 2
13 CEC 6V3 RXB0N RXD0N HDMI2_RX0N 12 10R HDMI2_CLKN
14 HDMI1_RX0P K3 RXB0P RXD0P G3 13 CEC
R64 HDMI2_RX0P
K1 G1
15 1
10R
2
HDMI0_SCL HDMI1_RX1N
K2
RXB1N MSD8WB9BX RXD1N
G2
HDMI2_RX1N 14 R99 HDMI0_ARC
16 1
10R 2
HDMI0_SDA HDMI1_RX1P RXB1P RXD1P HDMI2_RX1P R39 15 1
10R
2
HDMI2_SCL
17 R63 HDMI1_RX2N L3 RXB2N RXD2N H3 2 1
HDMI2_HPDIN 16 10R
HDMI2_RX2N 1k 1
2
HDMI2_SDA
18 HDMI1_RX2P L2 RXB2P RXD2P H2 17 R98
HDMI0_5V HDMI2_RX2P
19 10R HDMI1_HPDIN HDMI1_CLKN J3 RXBCKN RXDCKN F3 18
HDMI0_HPDIN R85 HDMI2_CLKN HDMI2_5V
GPIO55/LED[0]
GPIO56/LED[1]
1 2
1k2
R33
R72 1 2
HDMI1_CLKP J2 RXBCKP RXDCKP F2 19 10R
1k HDMI2_CLKP 1 2 HDMI2_HPDIN
2
HDMI1_SCL U5 DDCDB_CK DDCDD_CK R6 R166

HDMI2_SCL 3
2
R19
47k
R25
47k
R14
47k
HDMI1_SDA U6 DDCDB_DA DDCDD_DA T4 HDMI2_SDA R40
1k2
R31
47k
R30
47k
R32
47k
T5 R5 Q4
R8
2 1 2
HOTPLUGB HOTPLUGD 1k
DM_P0
DP_P0
DM_P1
DP_P1
BC848B
1
3
R86
T6
TN
TP
RP
RN
1
B CEC
1
CN4 Q5 2 1
R84
2
CEC 100R B
1k
BC848B
AD12
AC13
21 3V3_VCC
D1
D2
B5
B4
C5
C4
C6
A6
1
20 R61
1
1 10R HDMI1_RX2P
R130
R125
5k1
5k1
2 R54
1 2
3 10R HDMI1_RX2N ETH_RXN
USB2_DN
USB2_DP
USB1_DN
USB1_DP
4 1
10R HDMI1_RX1P ETH_RXP
5 R53 R56 ETH_YEL
1 2
6 10R HDMI1_RX1N ETH_TXP
HDMI2
7 2
10R HDMI1_RX0P ETH_GRN
8 R57 R55 ETH_TXN
1 2
9 10R HDMI1_RX0N
10 10R HDMI1_CLKP
R116
R122
1
5k1
5k1
11 R52 R58
1 2
12 10R HDMI1_CLKN
13 CEC
14 R59
1 2
15 10R HDMI1_SCL
C 16 1
10R 2
HDMI1_SDA C
17 R60
18 HDMI1_5V
19 1
10R 2 HDMI1_HPDIN
R51 R611
2
2
33k
1
24V_VCC_AU
R23
47k
R24
47k
R22
47k
10k
BAW56
1 2
D26
R188
1
3V3_STBY
R107 1
10k 2
12V_VCC
15k 12V_VCC R185
10k
3V3_STBY
3V3_STBY
3V3_STBY
3V3_STBY
3V3_STBY
3V3_STBY
1 2
2
R258 3V3_STBY R186
3V3_STBY
R13
4k7
220R 5V_VCC
R192
10k
1
2 1
U28 10k 1 2 3V3_VCC_TUNER
MAX809LTR R712
PROTECT
3
BAW56
C626 C562
R108
10k
D24
VCC 1uF 100nF
RST GND
2
2
D 16V 16V 5V_VCC D
R129
R123
R142
330k
TP7
4k7
4k7
4k7
2 1
R5
BC858B 1
10k 2 3V3_VCC
Q35R191 R195
2
1
10k
1
1 2
10k
R128
R110
R144
1 2
4k7
4k7
4k7
R12
AUX_RESET 4k7 R194
2
C52
R183
10k
2
1
100nF R190
USB_ENABLE1 C7 GPIO36 GPIO6 K5 10V
1
1 2
PROTECT 10k
E3 M5
1
USB_ENABLE2 GPIO37 GPIO7/PM_UART1_TX LED1 Q8 R343
DVD_IR_ON/OFF F5 GPIO38 GPIO8 K6 BC848B 100R
LED2
PCM_CD1 R273 B6 GPIO39 GPIO12/CSZ1 L5 SPI_CS Q7
2
LNB_POK 100R E2 GPIO40 GPIO10 J4 BC848B R342 1V8_VCC_TUNER
STBY_ON/OFF_NOT
R189
10k
EXT_RESET R347 D5 GPIO41 GPIO11/PM_UART1_RX M4 1
4k7 2 DVD_WAKEUP 100R
LINEDROP 100R B7 GPIO42 GPIO13 M7 PC_DET R11 Q36
4k7 M6
1
3V3_STBY 1 2 GPIO14 FLASH_WP BC848B
AMP_MUTE R126 D4 GPIO43/UART2_TX GPIO15 K4 R114 TOUCHPAD_SCL
S2_RESET E4 GPIO44/UART2_RX GPIO16 D3 100R AUX_RESET
HP_DETECT D7 GPIO45 GPIO17 L6 R261 TOUCHPAD_SDA
3D_ENABLE D6 GPIO46 GPIO18 N6 100R HP_MUTE
1V2 - 1V25 -1V5 - 2V5 - 3V3 FROM ICs POWER GOOD PINS
B8
E CI_PWR_CTRL GPIO47/UART4_TX R127 E
R697
1k
3V3_VCC 1
4k7
R1
2
A8
F7
GPIO48/UART4_RX
GPIO49 9
1
4k7
2
3V3_STBY
SHORT CCT PROTECTION
R715 A9 GPIO51 PWM0 N24 PWM0
PANEL_VCC 2k7 F4 GPIO52 U4 PWM1 N25 PWM1
P23
R168
C3
MSD8WB9BX PWM2
N23
3V3_VCC HDMI2_5V 18k R662 GPIO58 PWM3 BACKLIGHT_DIM
A3 F6
HDMI1_5V
HDMI0_5V
R663 18k
18k B3
GPIO61
GPIO62 GPIO PWM_PM PWM_OUT_LED3
2
BACKLIGHT_ON/OFF
R121
4k7
TUNER_RST AA18 GPIO131

PANEL_VCC_ON/OFF
U22 GPIO132 SAR0 G5
AB22 H5
1
R119 GPIO133 SAR1 KEYBOARD

S27 NC T22 H6
NC_7
NC_6
NC_5
NC_4
NC_3
NC_2
NC_1
NC_0
4k7 GPIO134 SAR2 SC_PIN8

W21 J6 DVD_SENSE
33R R737
33R R738
GPIO135 SAR3
2
Q10
AE25
2 1
AE1
U23
T25
T24
T23
A25
4k7
R614
R613
R214
R111
R260
A1
R109
R143
33k
33k
33k
4k7
4k7
4k7
4k7
BC848B R120
2
F
1
F
R140
4k7
C5V6
D19
3V3_VCC
3V3_VCC
1
3V3_STBY
2
3V3_VCC
VESTEL PROJECT NAME : 17mb95-2 A3

4k7
4k7
R4
R3
USB_OCD1
USB_OCD2
3V3_VCC
SCH NAME :01_HDMI_GPIO_PROT T. SHT:10

1
DRAWN BY :<YOUR NAME HERE> 26-06-2012_15:33

1 2 3 4 5 6 7 8 AX M
1 2 3 4 5 6 7 8
1V5_VCC 1V5_VCC
C257 C258 C259 C260 C261 C262 C264 C265 C266 C268
1k DDR0_VREFCA 1k DDR1_VREFDQ 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF
R410 R408 F12 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V
1V5_VCC 1V5_DDR0
100nF
100nF
R411
C247
C323
R409
C246
C322
16V
1nF
50V
16V
1nF
50V
60R
1k
1k
A C213 C248 C249 C250 C251 C252 C253 C254 C255 C256 A
10uF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF
1V5_VCC 10V 16V 16V 16V 16V 16V 16V 16V 16V 16V
1V5_VCC
1k DDR0_VREFDQ
R414 1k DDR1_VREFCA
R413
100nF
R415
C267
C325
16V
1nF
50V
1k
100nF
R412
C263
C324
16V
1nF
50V
1k
C278 C279 C280 C281 C282 C283 C284 C285 C286 C287
100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF
F13 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V
1V5_VCC 1V5_DDR1
60R C214 C269 C270 C271 C272 C273 C274 C275 C276 C277
10uF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF PL1
10V 16V 16V 16V 16V 16V 16V 16V 16V 16V
GROUND TERMINALS
PL4
B B
PL3
PL2
1V5_DDR0
U4 1V5_DDR1
MSD8WB9BX
DDR0_A00 A11 A_DDR3_A0 B_DDR3_A0 B23 DDR1_A00
C14 1 D25
DDR0_A01 A_DDR3_A1 B_DDR3_A1 DDR1_A01
B11 F22
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9

F12 G22
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
N3 C15 E24
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
DDR0_A00
P7
A0 DDR0_A04
E12
A_DDR3_A4
DDR3 B_DDR3_A4
F21
DDR1_A04
N3
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
C DDR0_A01
P3
A1 DDR0_A05
A14
A_DDR3_A5 B_DDR3_A5
E23
DDR1_A05 DDR1_A00
P7
A0 C
DDR0_A02 A2 DDR0_A06 A_DDR3_A6 B_DDR3_A6 DDR1_A06 DDR1_A01 A1
DDR0_A03 N2 A3 DDR0_A07 D11 A_DDR3_A7 B_DDR3_A7 D22 DDR1_A07 DDR1_A02 P3 A2
DDR0_A04 P8 A4 VREF_DQ H1 DDR0_VREFDQ DDR0_A08 B14 A_DDR3_A8 B_DDR3_A8 D24 DDR1_A08 DDR1_A03 N2 A3
DDR0_A05 P2 A5 VREF_CA M8 DDR0_VREFCA DDR0_A09 D12 A_DDR3_A9 B_DDR3_A9 D21 DDR1_A09 DDR1_A04 P8 A4 VREF_DQ H1 DDR1_VREFDQ
DDR0_A06 R8 A6 DDR0_A10 C16 A_DDR3_A10 B_DDR3_A10 C24 DDR1_A10 DDR1_A05 P2 A5 VREF_CA M8 DDR1_VREFCA
DDR0_A07 R2 A7 DQL0 E3 DDR0_DQL0 DDR0_A11 C13 A_DDR3_A11 B_DDR3_A11 C25 DDR1_A11 DDR1_A06 R8 A6
DDR0_A08 T8 A8 DQL1 F7 DDR0_DQL1 DDR0_A12 A15 A_DDR3_A12 B_DDR3_A12 F23 DDR1_A12 DDR1_A07 R2 A7 DQL0 E3 DDR1_DQL0
DDR0_A09 R3 A9 DQL2 F2 DDR0_DQL2 DDR0_A13 E11 A_DDR3_A13 B_DDR3_A13 E21 DDR1_A13 DDR1_A08 T8 A8 DQL1 F7 DDR1_DQL1
DDR0_A10 L7 A10/AP DQL3 F8 DDR0_DQL3 B13 A_DDR3_A14 B_DDR3_A14 D23 DDR1_A09 R3 A9 DQL2 F2 DDR1_DQL2
DDR0_A11 R7 A11 DQL4 H3 DDR0_DQL4 DDR1_A10 L7 A10/AP DQL3 F8 DDR1_DQL3
DDR0_A12 N7 A12/BC DQL5 H8 DDR0_DQL5 DDR0_DQL0 D17 A_DDR3_DQL0 B_DDR3_DQL0 L23 DDR1_DQL0 DDR1_A11 R7 A11 DQL4 H3 DDR1_DQL4
DDR0_A13 T3 A13 DQL6 G2 DDR0_DQL6 DDR0_DQL1 G15 A_DDR3_DQL1 B_DDR3_DQL1 J24 DDR1_DQL1 DDR1_A12 N7 A12/BC DQL5 H8 DDR1_DQL5
DQL7 H7 DDR0_DQL7 DDR0_DQL2 B21 A_DDR3_DQL2 B_DDR3_DQL2 L24 DDR1_DQL2 DDR1_A13 T3 A13 DQL6 G2 DDR1_DQL6
J1 NC1 DDR0_DQL3 F15 A_DDR3_DQL3 B_DDR3_DQL3 J23 DDR1_DQL3 DQL7 H7 DDR1_DQL7
L1 NC2 DQU0 D7 DDR0_DQU0 DDR0_DQL4 B22 A_DDR3_DQL4 B_DDR3_DQL4 M24 DDR1_DQL4 J1 NC1
M7 NC3 DQU1 C3 DDR0_DQU1 DDR0_DQL5 F14 A_DDR3_DQL5 B_DDR3_DQL5 H23 DDR1_DQL5 L1 NC2 DQU0 D7 DDR1_DQU0
L9 C8 A22 M23 M7 C3
NC4 U7 DQU2 DDR0_DQU2 DDR0_DQL6 A_DDR3_DQL6 B_DDR3_DQL6 DDR1_DQL6 NC3 DQU1 DDR1_DQU1
DDR0_CKB
T7 C2 D15 K23 L9 C8
U8
DDR0_CK
NC5 DQU3 DDR0_DQU3 DDR0_DQL7 A_DDR3_DQL7 B_DDR3_DQL7 DDR1_DQL7 NC4 DQU2 DDR1_DQU2
DDR1_CKB
J9 A7 T7 C2
H5TQ2G63BFR-PB
DDR1_CK
D NC6 DQU4
A2
DDR0_DQU4
G16 G21 J9
NC5 DQU3
A7
DDR1_DQU3 D
M2
DQU5
B8
DDR0_DQU5 DDR0_DQU0
B20
A_DDR3_DQU0 B_DDR3_DQU0
L22
DDR1_DQU0 NC6 H5TQ2G63BFR-PB DQU4
A2
DDR1_DQU4
DDR0_BA0 BA0 DQU6 DDR0_DQU6 DDR0_DQU1 A_DDR3_DQU1 B_DDR3_DQU1 DDR1_DQU1 DQU5 DDR1_DQU5
DDR0_BA1 N8 BA1 DQU7 A3 DDR0_DQU7 DDR0_DQU2 F16 A_DDR3_DQU2 B_DDR3_DQU2 H22 DDR1_DQU2 DDR1_BA0 M2 BA0 DQU6 B8 DDR1_DQU6
DDR0_BA2 M3 BA2 DDR0_DQU3 C21 A_DDR3_DQU3 B_DDR3_DQU3 K20 DDR1_DQU3 DDR1_BA1 N8 BA1 DQU7 A3 DDR1_DQU7
DQSL_0 F3 DDR0_DQSL DDR0_DQU4 E16 A_DDR3_DQU4 B_DDR3_DQU4 H20 DDR1_DQU4 DDR1_BA2 M3 BA2
J7 CK_0 DQSL_1 G3 DDR0_DQSLB DDR0_DQU5 A20 A_DDR3_DQU5 B_DDR3_DQU5 L21 DDR1_DQU5 DQSL_0 F3 DDR1_DQSL
K7 CK_1 DDR0_DQU6 D16 A_DDR3_DQU6 B_DDR3_DQU6 H21 DDR1_DQU6 J7 CK_0 DQSL_1 G3 DDR1_DQSLB
DQSU_1 B7 DDR0_DQSUB DDR0_DQU7 C20 A_DDR3_DQU7 B_DDR3_DQU7 K21 DDR1_DQU7 K7 CK_1
DDR0_CKE K9 CKE DQSU_0 C7 DDR0_DQSU DQSU_1 B7 DDR1_DQSUB
R321
R322
56R
56R
DDR0_CASB A12 A_DDR3_CASZ B_DDR3_CASZ B24 DDR1_CASB DDR1_CKE K9 CKE DQSU_0 C7 DDR1_DQSU
R323
R324
56R
56R
L2 CS DML E7 DDR0_DML DDR0_RASB B12 A_DDR3_RASZ B_DDR3_RASZ B25 DDR1_RASB
DMU D3 DDR0_DMU DDR0_WEB C12 A_DDR3_WEZ B_DDR3_WEZ A24 DDR1_WEB L2 CS DML E7 DDR1_DML
DDR0_RASB J3 RAS DDR0_DML E15 A_DDR3_DML B_DDR3_DML H24 DDR1_DML DMU D3 DDR1_DMU
DDR0_CASB K3 CAS ODT K1 DDR0_ODT DDR0_DMU A21 A_DDR3_DMU B_DDR3_DMU L20 DDR1_DMU DDR1_RASB J3 RAS
C342
10nF
16V
DDR0_WEB L3 WE DDR0_ODT E14 A_DDR3_ODT B_DDR3_ODT D20 DDR1_ODT DDR1_CASB K3 CAS ODT K1 DDR1_ODT
C343
10nF
16V
F13 G20 L3
VSS_10
VSS_11
VSS_12
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
DDR0_BA0 A_DDR3_BA0 B_DDR3_BA0 DDR1_BA0 DDR1_WEB WE

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
T2 B15 F24
VSS_10
VSS_11
VSS_12
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
DDR0_RESETB RESET DDR0_BA1 A_DDR3_BA1 B_DDR3_BA1 DDR1_BA1
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
R418 L8 ZQ DDR0_BA2 E13 A_DDR3_BA2 B_DDR3_BA2 F20 DDR1_BA2 DDR1_RESETB T2 RESET
F11 E20 L8
E 240R DDR0_RESETB
B16
A_DDR3_RESET B_DDR3_RESET
F25
DDR1_RESETB R421 ZQ E
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
DDR0_CKE A_DDR3_CKE B_DDR3_CKE DDR1_CKE 240R

C17 G25
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
DDR0_CK A_DDR3_MCLK B_DDR3_MCLK DDR1_CK
DDR0_CKB A17 A_DDR3_MCLKZ B_DDR3_MCLKZ G23 DDR1_CKB
DDR0_DQSL B19 A_DDR3_DQSL B_DDR3_DQSL K24 DDR1_DQSL
DDR0_DQSLB C18 A_DDR3_DQSLB B_DDR3_DQSLB K25 DDR1_DQSLB
DDR0_DQSU B18 A_DDR3_DQSU B_DDR3_DQSU J21 DDR1_DQSU
DDR0_DQSUB A18 A_DDR3_DQSUB B_DDR3_DQSUB J20 DDR1_DQSUB
F F
VESTEL PROJECT NAME : 17mb95 A3

SCH NAME :02_MSTAR_DDR3 T. SHT:10
DRAWN BY :ALP KIRAZ-BARAN ÇUBUKÇU 06-04-2012_10:54
1 2 3 4 5 6 7 8 AX M
Ethernet lines must be 100ohm differential
1 2 3 4 5 6 7 8
Place these resistors C21
NAND_ALE R21 NF_ALE PCM_D[0]/NF_AD[0] V20 PCMNANDD0 close to MSTAR 100nF
R169
R170
47R
47R
1 NC1 NC29 48 NAND_WPZ W20 NF_WPZ PCM_D[1]/NF_AD[1] AD22 PCMNANDD1 16V
Y20 AB21
3V3_NAND
NAND_CEZ NF_CEZ PCM_D[2]/NF_AD[2] PCMNANDD2 CN10
2 NC2 NC28 47 NAND_CLE AC21 NF_CLE PCM_D[3]/NF_AD[3] AE17 PCMNANDD3
NAND_REZ P21 NF_REZ PCM_D[4]/NF_AD[4] AC18 PCMNANDD4 ETH_TXP 1 TD+
3 NC3 NC27 46 NAND_WEZ P22 NF_WEZ PCM_D[5]/NF_AD[5] AE18 PCMNANDD5
NAND_RBZ Y21 NF_RBZ PCM_D[6]/NF_AD[6] AA19 PCMNANDD6 ETH_TXN 2 TD-
4 45 P20 AD18 Place these capacitors
A NC4 NC26 NF_CEZ1 PCM_D[7]/NF_AD[7] PCMNANDD7
close to transformer 3 A
R883 TCT
5 NC5 I/O7 44 75R PCM_NAND_D7 PCM_A[0] AA21 PCMA0 speed nets, except for the
R574
3k9
Y22 chassis ground. ETH_RXP 4
6 NC6 I/O6 43
R882
75R
R881
PCM_NAND_D6 CI/NAND 4
PCM_A[1]
PCM_A[2]
PCM_A[3]
R20
W19
PCMA1
PCMA2
PCMA3
Also keep traces short and
route as matched length ETH_RXN 5
RD+
RD-
7 RB I/O5 42 75R PCM_A[4] T20 PCMA4 differential pairs. Do not place
NAND_RBZ PCM_NAND_D5
AA22 6
R880 U4 PCM_A[5] PCMA5 any parts or traces under the RCT
R171
R172
47R
47R
8 R I/O4 41 75R PCM_A[6] V21 PCMA6
NAND_REZ PCM_NAND_D4
AB16 transformer. 7
9 40
MSD8WB9BX PCM_A[7]
W22
PCMA7
Place these resistors
NC1
NAND_CEZ E NC25 PCM_A[8] PCMA8
SPI_CLK A2 SPI_CK PCM_A[9] AE20 PCMA9 close to MSTAR C22 8 NC2
10 NC7 NC24 39 SPI_DI B2 SPI_DI PCM_A[10] AD19 PCMA10 100nF
B1 SPI_DO PCM_A[11] AB17 PCMA11 16V ETH_GRN 510R 9 GR+
SPI_DO
11 NC8 NC23 38 C2 TEST1 PCM_A[12] AB20 PCMA12 R134
C1 SPI_CZ PCM_A[13] AC20 PCMA13 F52 TP32 10 GR-
12
U13 37 AE21
3V3_NAND VDD1 VDD2 3V3_NAND PCM_A[14] PCMA14 2V5_VCC
R240
10k
60R 11
NAND128-A 1uFC127 C20ETH_YEL 510R YL+
13 VSS1 VSS2 36 PCM_IRQA_N Y19 100nF R137
PCMIRQA
AD20 16V 16V 12
B 14 35
PCM_OE_N
AC19
PCMOE YL- B
NC9 NC22 PCM_IORD_N PCMIORD
PCM_CE_N AB18 PCMCE 13 SHLD1
15 NC10 NC21 34 PCM_WE_N AD21 PCMWE
3V3_STBY
PCM_CD_N AB19 14 SHLD2
PCMCD2
16 CL NC20 33 PCM_RST T21 PCMRST
NAND_CLE
R879 PCM_REG_N AA20 PCMREG
17 AL I/O3 32 75R PCM_IOWR_N Y18 PCMIOWR
NAND_ALE PCM_NAND_D3
U21
TP64
BSH103
R878 PCM_WAIT_N PCMWAIT
10pFC451
18 W I/O2 31 75R
NAND_WEZ PCM_NAND_D2
Q30
R877
50V
19 WP I/O1 30 75R F15
NAND_WPZ PCM_NAND_D1
1
100nF
R876
MSTAR SPI FLASH 5V_VCC CI_PWR R586
10uF C101
2
3
20 29 60R
10V
NC11 I/O0 75R 33R TS0_CLK
220uF
PCM_NAND_D0 C3 C99 C100 TS0CLK
C149
6V3
2 2
1N5819 10uF 100nF 100nF
1
TP113
21 28
C1197
1 1
10V
1
NC12 NC19 3V3_STBY 10V 10V R504
10V
3V3_STBY D5 TS1CLK 33R TS1_CLK
22 NC13 NC18 27 C98
TP114
C44810pF R590
R153
4k7
23 26
C4
C NC14 NC17 100nF
12V_VCC 1
R316
2 1
R317
2 8
33R
1 C
10V 47k 47k 50V TS0D3 R1 TS0_D3
24 NC15 NC16 25 R507
U10
22uF
MX25L512 3
6V3
33R 7 R2 2 TS0_D4
SPI_CS R242 TS0D4
R506 1 CS# VCC 8 R808 CI_PWR_CTRL 1 2 2
Q31
10k
33R 2 SO HOLD# 7 4k7 R509 BC847B 6 R3 3 TS0_D5
SPI_DO TS0D5
3 WP# SCLK 6 33R
1
SPI_CLK R585
F51 3V3_NAND TP115 4 GND SI 5 1
TP110 33R 5 R4 4 TS0_D6
TS0D6
3V3_VCC TP116 8 1 TS1_D5
TS1D5 R1
60R 22uF R505 TP117 R508
C291
100nF C292
100nF R589
C210 FLASH_WP 33R 33R 7 R2 2 TS0_VLD 33R
6V3 16V 16V
R152 1
TP109
SPI_DI
RESET TS0VLD
TS1D7
6 R3 3 TS1_D7
TS0D7
8
7 R2 2
R1
1 TS0_D7
3V3_STBY 4k7 TS1SYNC TS1_SYNC

5 R4 4 TS1_D6
TS1D6
R331 6 R3 3 TS1_D0
TS1D0
3V3_STBY 1k
5 R4 4 TS1_D1
100nF
3V3_VCC TS1D1
C103
2
10V
R510
D
1
PCMCD2 33R PCM_CD2 C394 R587 R588 D
R243
10k
22uF 33R 33R
R577 R584 CN9 16V TS0SYNC
8
R1
1 TS0_SYNC TS1D2
8
R1
1 TS1_D2
33R 33R R503 35 1 RESET
1 8 PCM_NAND_D2 1 8 PCM_A6 PCM_CD1 33R 36 2 7 R2 2 TS0_D0 7 R2 2 TS1_D3
PCMNANDD2 R1 PCMA6 R1 PCM_NAND_D3 TS0D0 TS1D3
1N4148
TS0_D3 37 3 PCM_NAND_D4 C102
R245
10k
2 R2 7 2 R2 7 2
6 R3 3 6 R3 3
D3
PCMNANDD1 PCM_NAND_D1 PCMA7 PCM_A7 TS0_D4 38 4 PCM_NAND_D5 100nF TS0D1 TS0_D1 TS1D4 TS1_D4
1
TS0_D5 39 5 PCM_NAND_D6 10V

3 R3 6 PCM_NAND_D0 PCMIRQA 3 R3 6 40 6 5 R4 4 TS0_D2 5 R4 4 TS1_VLD
PCMNANDD0 PCM_IRQA TS0_D6 PCM_NAND_D7 TS0D2 TS1VLD
3V3_VCC 4k7 TS0_D7 41 7 PCM_CE
C390
33pF
50V
4 R4 5 PCM_A0 4 R4 5 PCM_A12 R76 42 8 TP211
PCMA0 PCMA12 PCM_A10
4k7 43 9 PCM_OE RESET 2
100R 1
R184 44 10 R361 N5 RESET TS1_D[0] AC14 TS1D0

R578 PCM_IORD PCM_A11 CI_PWR
33R 45 11 24MHz TS1_D[1] AD14 TS1D1
R583 PCM_IOWR PCM_A9
1 8 PCM_NAND_D6 33R 4k7 46 12 TS1_D[2] AE14 TS1D2
PCMNANDD6 R1 3V3_VCC TS1_SYNC PCM_A8
R154
R395
3 2
4k7
1 8 AE3 AD15
1M
PCMWE R1 PCM_WE R716 TS1_D0 47 13 PCM_A13 XIN TS1_D[3] TS1D3
2 R2 7 4 1 AE2 AC15
PCMNANDD5 PCM_NAND_D5 3V3_VCC 4k7 TS1_D1 48 14 PCM_A14 XOUT TS1_D[4] TS1D4
33pFC391
2 R2 7 PCM_A14 R735 49 15 X10 TS1_D[5] AD16 TS1D5
PCMA14 TS1_D2 PCM_WE S65
3 R3 6 PCM_NAND_D4 50 16 PCM_IRQA TS1_D[6] AD17 TS1D6
PCMNANDD4 TS1_D3
50V
3 R3 6 100R G4 AC17
E 4 R4 5
PCMA13 PCM_A13 CI_PWR 51 17 CI_PWR IR_IN 2
R362
1 IRIN TS1_D[7]
AC16
TS1D7 E
PCMNANDD3 PCM_NAND_D3 52 18 D36 8 TS1_CLK TS1CLK
4 R4 5 PCM_A8 53 19
1 2
TS1_VLD AE15 TS1VLD
PCMA8 TS1_D4 TS1_VLD
AD13
R579 C37810pF TS1_D5 54 20 TS1_CLK R150 C5V6 U4 TS1_SYNC TS1SYNC
33R R582 TS1_D6 55 21 PCM_A12 3V3_STBY 4k7
C392
1 8 12pF Y16
PCMA1 R1 PCM_A1
1
33R
8
50V TS1_D7 56 22 PCM_A7 50V 3V3_STBY 4k7 MSD8WB9BX TS0_D[0]
AA17
TS0D0
PCMA9 R1 PCM_A9 TS0_CLK 57 23 PCM_A6 R151 TS0_D[1] TS0D1
2 R2 7 PCM_A2 58 24 nc UART-RX-SC P5 DDCA_CK/UART0_RX TS0_D[2] AA16 TS0D2
PCMA2 PCM_RST PCM_A5
2 R2 7 PCM_IOWR PCM_WAIT 59 25 UART-TX-SC R4 DDCA_DA/UART0_TX TS0_D[3] Y13 TS0D3
PCMIOWR PCM_A4
3 R3 6 PCM_A3 60 26 R23 UART3_RX/GPIO64 TS0_D[4] AA13 TS0D4
PCMA3 PCM_A3
3 R3 6 PCM_A11 61 27 P24 UART3_TX/GPIO65 TS0_D[5] AA14 TS0D5
PCMA11 PCM_REG PCM_A2
R155
4k7
4 R4 5 PCM_REG 62 28 TP209 TS0_D[6] AB14 TS0D6

PCMREG TS0_VLD PCM_A1
4 R4 5 PCM_OE 63 29 TP210 TS0_D[7] AA15 TS0D7
PCMOE TS0_SYNC PCM_A0
64 30 TS0_CLK AB15 TS0CLK
R580 TS0_D0 PCM_NAND_D0
33R CI_PWR 65 31 SYS_SCL R24 DDCR_CK TS0_VLD Y15 TS0VLD
R581 TS0_D1 PCM_NAND_D1
PCMWAIT 1 8 33R 66 32 SYS_SDA R25 DDCR_DA TS0_SYNC Y14 TS0SYNC
R1 PCM_WAIT TS0_D2 PCM_NAND_D2
1 8 PCM_IORD PCM_CD2 67 33 4k7
PCMIORD R1 CI_PWR
1
2 R2 7 PCM_A4 68 34 R320
PCMA4
R157
R156
4k7
4k7
2 R2 7 PCM_A10
PCMA10
R244
10k
3 R3 6
F PCMA5 PCM_A5
3 R3 6 F
2
PCMCE PCM_CE
4 R4 5 PCM_RST 3V3_VCC
PCMRST
4 R4 5 PCM_NAND_D7
PCMNANDD7 3V3_VCC

SCH NAME :03_CI_ETH_NAND T. SHT:10
1 2 3 4 5 6 7 8 AX M
1 2 3 4 5 6 7 8
C109
27pFC431
27pFC432
220nH S73
50V
50V
DIGITAL_IF_P IF_P_T2
C566 C113 L5 100nF10V
AVDD_MPLL_T2
RF_IN_P C108
AVDD25_ADC
IF_P_T2
IF_N_T2
S72
2
S87 DIGITAL_IF_N IF_N_T2
180R
AVDD33_ADC
47pF 120pF
F67
100nF10V
270nH
JK11 50V 50V
AVDD_SAR
2
1
4 3
L4
ESD0P8RFL
24MHz
S84
X11
F86
390nH
RF_IN_N
AVDD_APLL
D8
L1
A L6 3V3_VCC 1k IF_AGC_T2 A
30067048 60R
3
4
R333
120pF
100nF
C112
C110
50V
10V
220nH R797
F210
F211
1 2
1k
1k
9k1 IF_AGC
I2C Address**pin49
S77
High : D2
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
S100 R307
IF_AGC 100R D_IF_AGC Low : F2
24 MHz
27MHz CRYSTAL
GND_9
AVDD_33_3
GND_8
XIN
XOUT
AVDD_33_2
AVDD_25
GND_7
IP
IM
QP
QM
AVDD_33_1
GND_6
SAR_RSSI
AVDD_33_0
FLASH_WP_T2
100nF
RF_IN_P
RF_IN_N
3V3_VCC_SI
3V3_VCC_SI
22nF
C162
C159
S74
16V
10V
3V3_VCC 10k 49 GPIO[0] GPIO[11] 32
2 3
R251
1 4 50 31
3V3_VDDP VDDP_4 VDDP_3 3V3_VDDP
X1 Close To Concept IC
Close To SI2156
51 VDDC_3 VDDC_2 30
1V2_VDD 1V2_VDD
52 GND_10 GND_5 29
24
23
22
21
20
19
18
17
SH1 53 VDDP_5 VDDP_2 28
RF_SHLD1 3V3_VDDP 3V3_VDDP
RF_IP
RF_IN
RF_SHLD
VDD_H2
VDD_H1
XTAL_I
XTAL_O
B 25 16 54 27 B
GND1 XOUT I2CM_SCL GPIO_2
2
26 GND2 BCLK 15 55 I2CM_SDA SPI_CZ 26
SPI_CS_T2
27 14 56 25
GND3
TUNER VDD_L 1V8_VCC_SI RF_AGC U17 SPI_DO SPI_DO_T2
28 13 S99 S213 57 24
50V
12pF
GPIO U18 DLIF_P DIGITAL_IF_P IF_AGC_T2 IF_AGC MSB1231 SPI_DI SPI_DI_T2
100nF
C158
10V
29 12 58 23
SI2156
TUNER_RST R187
C1 30
INTB
RSTB
DLIF_N
ALIF_P 11
R308
470R S98
NC
DIGITAL_IF_N 1V2_VDD
59
GND_11
VDDC_4
T2 DEMOD SPI_CLK
GPIO_1 22
SPI_CLK_T2
33R
R312
820R
750R
31 10 60 21
ALIF_AGC
R196 GND4 DLIF_AGC VDD_H 3V3_VDDP VDDP_6 GND_4

10k 3V3_VCC_SI
VDD_S
VDD_D
EXT_RESET
32 9 61 20
ADDR
3V3_VCC_SI VDD_IO ALIF_N R73 GND_12 VDDC_1 1V2_VDD

SCL
SDA
GND
470R R379
TUNER_SCL 47R 62 I2CS_SCL GND_3 19
C6
TS_DATA[0]
TS_DATA[1]
TS_DATA[2]
TS_DATA[3]
TS_DATA[4]
TS_DATA[5]
TS_DATA[6]
TS_DATA[7]
R380
1
S83 63 18
C TUNER_SCL TUNER_SDA 47R I2CS_SDA VDDP_1 3V3_VDDP C
TS_SYNC
TS_VLD
VDDP_0
VDDC_0
TS_CLK
TS_ERR
3V3_VCC_SI D_IF_AGC
GND_1
GND_2
12pF S92 64 17 S76
3V3_VCC 10k GPIO[3] RESETZ
1V8_VCC_SI
NC:1100000(R:1,W:0) R252
100nF
S89 S69
16V
C2
TUNER_SDA 3V3_VCC_SI
10
11
12
13
14
15
16
12pF C10 S80
9
nc
S82 TS1_SYNC 33R
R526 TP65
F65 TS1_VLD 33R
1 2
1V8_VCC_SI R527 33R TS1_CLK
2 R2 7
3 R3 6
4 R4 5
5 R4 4
6 R3 3
7 R2 2
1
3V3_VDDP
1V2_VDD
1V8_VCC_TUNER 60R C156 C155 C165 R525
R591
R592
33R
33R
R1
R1
1n2F 1n2F 100nF
C393
12pF
U14 50V 50V 16V 50V
LM1117
8
F164 TP111 1
1 2 3 IN OUT 2 3V3_VCC_TUNER F68 3V3_VCC_SI

3V3_VCC 1V8_VCC_TUNER pin14 pin4
60R 1 2
100uF
C15
C449
10uF
C435
ADJ VOUT
2
6V3
6V3
TS1_D0
TS1_D1
TS1_D2
TS1_D3
TS1_D4
TS1_D5
TS1_D6
TS1_D7
100nF 60R C157 C163 C164 C144 C153 C154
R603
100R
1 4 16V 1n2F 4n7F 100nF 1n2F 1n2F 1n2F

D 50V 50V 50V 50V 50V D
OPTIONAL RESISTORS
1
R606 S75
1 2 1 2
47R pin20 pin19 pin10 pin32 pin1
2
R556
R557
R558
OPTIONAL
2
75R
75R
75R
U6
R560
LM1117
75R
F165 TP112 1
16V C188 R596
3 IN 47nF
OUT 2 Y3 Y5
1 2
1
5V_VCC 3V3_VCC_TUNER 68R RIN0M VCOM 68R
C186 16V47nF W2 47nF
10uF 10V
60R
1
R595 33R RIN0P R513
100uF
C29 VGA_R
C624
C440
ADJ VOUT C196 16V W1 Y4 16V C187

2
6V3
100nF 68R R519 GIN0M CVBS0 33R R517 SC_CVBS_IN

R604
100R
1 4 16V C185 47nF W3 W5 47nF C195

F23 VGA_G R594 33R GIN0P CVBS1 R520 33R SAV_CVBS
2V5_VCC AVDD25_ADC C184 16V V2 W4 C197
68R R512 BIN0M CVBS2 33R R518 SC_R
60R C183 47nF V3 AB5 47nF16V C198
1
R609 C222 C302 VGA_B R593

S66 33R BIN0P CVBS3 33R DVD_CVBS
100R C182 16V V1 47nF
2 1 68R 10uF 100nF VGA_G R511 SOGIN0
R407 10V 16V C326 1nF AC1 HSYNC0
VGA_HSNC CVBS0_OUT
AC2 VSYNC0 CVBSOUT1 AA4 C106
VGA_VSNC 50V S70
CVBSOUT2 AB4 DIGITAL_IF_P
47nF AB2
68R RIN1M 5 100nF
C190 16V47nF AB1 AE6
F20 F22 SC_R R597 33R RIN1P IP 10V
E 3V3_VCC AVDD_MPLL_T2 3V3_VCC AVDD_SAR 68R R514
C189 16V AB3 GIN1M U4 IM AD6
E
60R C219 60R C191 47nF AA1
C299 C221 C301 SC_G R598 33R
C192 16V AA3
GIN1P MSD8WB9BX AD7
C107 S71
10uF 100nF 10uF 100nF 68R R515 BIN1M VIFP 10V DIGITAL_IF_N
16V 16V C193 47nF Y2 AC7
10V 10V SC_B
SC_CVBS_IN
R599
S68 33R
R516
C194 16V
C329 1nF
AA2
AC3
BIN1P
SOGIN1
HSYNC1
VIDEO VIFM
SIFP AC8
100nF
F19 F21 SC_FB AC4 VSYNC1 SIFM AD8

3V3_VCC AVDD_APLL 3V3_VCC AVDD33_ADC
60R 60R 47nF AA8 AC5
C218 C298 C220 C300 68R RIN2M IFAGC IF_AGC
C200 16V47nF Y7 AD5
10uF 100nF 10uF 100nF PR_IN R600 33R RIN2P RFAGC R364
16V 16V C199 16V AA7
10V 10V 68R R521 GIN2M 100R
C201 47nF Y6 nc
T2 DEMOD SPI FLASH 1N5819
Y_IN R601 33R
68R R522
C202 16V AB6
GIN2P
BIN2M TGPIO0/GPIO73 AD3
TP121
TP120
C368
3V3_VCC C203 47nF AA6 AD2

F18 PB_IN R602
S67 33R BIN2P TGPIO1/GPIO74
1V2_VCC 1V2_VDD C204 16V AA5 AC6
D14 Y_IN R523 SOGIN2 TGPIO2/GPIO75 TUNER_SCL
60R C217 C297 AB8 HSYNC2 TGPIO3/GPIO76 AE5
C296 C295 C294 C293 TUNER_SDA
22uF
U11 1nF
6V3
R159 10uF 100nF 100nF 100nF 100nF 100nF C327

MX25L512
1
3V3_VCC 4k7 C105 10V 16V 16V 16V 16V 16V
R161
R162
4k7
4k7
1 CS# VCC 8 R332
SPI_CS_T2
2 7
F SPI_DO_T2
3
SO HOLD#
6
4k7 100nF10V F
2
WP# SCLK SPI_CLK_T2 F24
FLASH_WP_T2 33R 4 GND SI 5 3V3_VCC 3V3_VDDP 3V3_VCC
SPI_DI_T2
6V3 1uF
R524 TP118 60R C223 C303 C304 C305 C306 C307 C308 C309
C175
TP123
TP122
TP119 10uF 100nF 100nF 100nF 100nF 100nF 100nF 100nF

VESTEL PROJECT NAME : 17mb95
R247
A3
10k
10V 16V 16V 16V 16V 16V 16V 16V
SCH NAME :04_TUNER_T2_DEMOD T. SHT:10

3V3_VCC
1 2 3 4 5 6 7 8 AX M
1 2 3 4 5 6 7 8
BTB
20 19 30069495 AP2111 ???
LDO1
4n7F
C477
C473
4n7F
50V
50V
3V3_VCC 18 17 U21 TP72 1
3V3_VCC LM1117
3V3_STBY 24V_VCC_AU 3 IN OUT 2 3V3_STBY
A 16 15 A
5V_STBY
R822 DC/DC1
C1213
C1214
C119
22uF
22uF
R647
R646
ADJ VOUT
6V3
6V3
20k
20k
2
12V_STBY 14 13 12V_STBY
1 4 1
100nF
10V
3V3_STBY 560R 50V
4n7F
50V
4n7F
50V
FB1
FB3
5V_VCC 12 11 5V_VCC
R821
R658
390k
18k
4n7F
12V_STBY 10 9 5V_STBY
C1207
C475
R394
100k
C472
R644
120k 50V
4n7F
DC/DC3
8 7 DIMMING FB1
10
1
6 5 BACKLIGHT_ON/OFF S33
4n7F
C478
R255
C1208
50V
10k
RLIM1
SS1
CMP1
FB1
ROSC
SYNC
FB3
CMP3
SS3
RLIM3
STBY_ON/OFF C1187 C460
4 3 power_pin3 10uF 10uF 16V EN1 EN3 16V
nc 47nF 11 40 47nF
power_pin1 S32 VIN1 16V 16V
2 1 S25 STBY_ON/OFF_NOT VDDC
S85 F53 C205
12 BST BST3 39
C207 60R
VIN3
CN3 1 2
VIN1 VIN3 12V_VCC
C1212
12V_VCC
22uF
S8 13 38 2 1
6V3
60R
24V_VCC_AU
VOUT1 F60
C1209
C1210
22uF
22uF
6V3
6V3
14 LX1_0 LX3_1 37
L39 L38
B F1 60R 3V3_VCC B
1V2_VCC
10uH 15 LX1_1 TPS65251 LX3_0 36 4u7H
1 2
TP105 TP90
LX2_0 U19 GND_2 C463 C1191
R167
16 35
5k6
TP106 L40 10uF 10uF
CN2 power cable 1V5_VCC
4u7H 17 LX2_1 VIN_2 34 16V 16V
C1211
22uF
VOUT3
6V3
2 1
VOUT2 C206 18 VIN2 VIN_1 33
60R
3V3_VCC 4 3 3V3_VCC BST2 VIN_0 12V_VCC
R257
C483
4n7F
19 32 2 1
10k
50V
C1206
INVERTER SOCKET F58
RLIM2
COMP2
LOW_P
GND_0
PGOOD
47nF
AGND
3V3_STBY 6 5 24V_VCC_AU 1V5_DDR0 16V EN2 GND_1
!
SS2
FB2
V7V
V3V
20 31
CN8 S86 C1188 C461 4n7F C1189 C1190
12V_STBY 8 7 12V_STBY 10uF 10uF 50V 10uF FB3
4n7F
C479
R256
S5
50V
10k
21
22
23
24
25
26
27
28
29
30
1 12V_VCC 16V 16V 16V 10uF 16V
DC/DC2
2
5V_VCC 10 9 5V_VCC TP38 R645
R335
F59
60R
4k7
2 FS4 120k
5V_STBY 12V_INV C488
12V_STBY 12 11 FB2
FB2
C480 10uF
1
3 R652
1
7A/32VDC
S216
DIMMING 16V
C 14 13 TP51 220R C
!
R651
7k5
4
VIN2 4n7F C30
12V_VCC
16 15 BACKLIGHT_ON/OFF 50V 4u7F
R648
20k
5 DIMMING R101 10V
18 17 power_pin3 560R
6 BACKLIGHT_ON/OFF
PROTECT
20 19 power_pin1
4n7F
C481
50V
TP37
TP50
TP52
NC
S91
LDO2 2V5_VCC STBY_ON/OFF
S90 5V_VCC
S81 R290 R2 R288
LDO3 STBY_ON/OFF_NOT MOSFET_CONTROL 5V_STBY C137 C138
6
1 POK GND 8
PROTECT
1V25_VCC PROTECT
U5 C152
22k
R289
100R 220uF
6V3
220uF
6V3
FDC642P
R45 R197
W/SAT
1
S79 5V_VCC 2 1 2 EN FB 7 47k R1 1 2
STBY_ON/OFF nc
220nF
Q32
10k 3V3_STBY 10k
C135
R217
2
33k
R2
D R811 R812 60R APL5910 100nF 25V D
C24
6V3
1 POK GND 8 3V3_VCC 3 VIN VOUT 6 10V 2V5_VCC
1
5V_VCC R165 47k 10k 1 2
22uF R198
U15
2
2 1 1 2
C117 R250 F63 TP108 STBY_ON/OFF_NOT
60R 4k7 22uF 10k
5V_VCC
C25
6V3
1
1V5_VCC 2 EN FB 7 33k R1 4 VCNTL NC 5 Q11
5V_VCC R174
10uF
1 2 2 1
S6
10V
F66 APL5910 100nF C151 BC848B 1

47R
2
C5V6
D20
3V3_VCC 3 VIN VOUT 6 10V 1V26_VCC 10uF
1 2
R42
1k
60R F173 C225 TP107 10V
C1198
SW2
22uF
6V3
4 VCNTL NC 5 3V3_VCC
5V_VCC 2 1
S88
C224
10uF
2
10V Q47 R176 R47

R139
10k
TPS_ENABLE 1
10k
2
STBY_ON/OFF MOSFET_CONTROL
2
10k
1 Q22
R284 BC848B
R164
1
1 2
5V_STBY BC848B 12V_STBY 10k 3k9
2
10k 1 R282
R884 1 2
STBY_ON/OFF_NOT
C1228
10k
22uF
6V3
TP89
2
10k 1
S15
4
R163 Q46
2k2 BC848B
FDC642P
E ADAPTER SOCKET R77 S10 FS2 E

Q27
F4
12V_VCC
1 2
DC/DC4 12V_STBY 7A/32VDC

12V_VCC
6
60R
4A
6
F3 0R
FDC642P
1
TP33
1 2
C139 22pF 50V
FDC642P
220nF
Q29
12V_STBY
C134
R216
2
25V
33k
60R VFB
Q43
C131 C130 C55

12V_VCC
1
R49 22uF 22uF 100nF R96 R15 R38
4
W_ADAPTER 16V 16V 16V
2
2 1
12V_VCC 10k 120k 4k7 22k R173
1
TP48
2 1 1 2
F14
FDC642P
5 12V_STBY 10k 47R

1
1 2
R48 5V_VCC
Q28
SW1
1
60R F62
TP36
TPS_ENABLE
!
R215
4
33k
1 EN VIN 8
1 2
3 U9 C92 L3 10uH F7 60R

3
JK2 2 VFB VBST 7

1 2
2
TP35 R44 FS1 VFB 16V 5V_STBY
6
R37
22k
R36
22k
22uF 6V3
22uF 6V3
1
10k
2
12V_STBY TPS54528 100nF C132 60R
2 3 VREG5
TP34 SSW 6 F10
FDC642P
7A/32VDC R46
C133
1 2 2 1 Q21
Q44
1 MOSFET_CONTROL 10k
12V_INV 4 VSS GND 5 60R BC848B
R41 C128
Q19
30049469 1.13k
F 1
1k
2
1uF F
C129
8n2F
50V
BC848B 16V
1
C5
12V_STBY
R34
1k2
R35
2k2
Q6 220nF 10V
TPS54528
BC848B VESTEL PROJECT NAME : 17mb95 A3
SCH NAME :05_POWER T. SHT:10
1 2 3 4 5 6 7 8 AX M
1 2 3 4 5 6 7 8
OPTIONS TABLE PANEL SUPPLY SWITCH

FHD 50Hz 3D FFC S40
TP53
2 1
3D_EN F30
100nF
C140
C96
16V
1 2
OP_PIN43
OP_PIN42
OP_PIN27
OP_PIN11
OP_PIN10
R239 3V3_VCC 100uF
OP_PIN9
OP_PIN8
OP_PIN7
OP_PIN6
OP_PIN5
PANEL_VCC 33k OP_PIN5 60R 16V
R89 F29
1
1 2
A A
TX_2_CLK_P
TX_2_CLK_N
TX_1_CLK_P
TX_1_CLK_N
1 2
10k 12V_VCC PANEL_VCC
60R
TX_2_4_P
TX_2_4_N
TX_2_3_P
TX_2_3_N
TX_2_2_P
TX_2_2_N
TX_2_1_P
TX_2_1_N
TX_2_0_P
TX_2_0_N
TX_1_4_P
TX_1_4_N
TX_1_3_P
TX_1_3_N
TX_1_2_P
TX_1_2_N
TX_1_1_P
TX_1_1_N
TX_1_0_P
TX_1_0_N
6
R236 F16
2
1 2
PANEL_VCC 33k OP_PIN6
220nF
FDC642P
5V_VCC
C136
R249
2
25V
33k
60R
Q33
R88
1
1 2
10k
1
PANEL_VCC R235
1
PANEL_VCC 33k OP_PIN7 3V3_VCC R175
1 2
R81 47R
LVDS
CN11
1 2
10k
1
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
LG BASED 30070519
9
8
7
6
5
4
3
2
1
100nF
R253
C104
S39
33k
16V
1 2
MEGA_DCR_IN
R283
10k
R94
10k
OP_PIN45
OP_PIN44
OP_PIN43
OP_PIN42
OP_PIN41
OP_PIN40
R221
PANEL_VCC OP_PIN8
2
33k
2
R80 3
1
10k
2 NC R95
1
S57 2 2
Q23
PANEL_VCC 2
10k
1
BC848B
2
S56 1
3
1
B MEGA_DCR_OUT OP_PIN9 R93 B

LVDS
2
Q24
CN12
2 1
R220 PANEL_VCC_ON/OFF 10k C141
BC848B
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
SAM BASED 30070519 PANEL_VCC 33k OP_PIN9 1nF
9
8
7
6
5
4
3
2
1
1
R79 50V
1 2
10k
R241
PANEL_VCC 33k OP_PIN10
R87
19" TO 22" DOUBLE LVDS FFC OPTIONS 1
10k
2
LVDS OUT
R248
PANEL_VCC
PANEL_VCC OP_PIN11 U4
TX_2_CLK_P
TX_2_CLK_N
TX_1_CLK_P
TX_1_CLK_N
33k
OP_PIN9
TX_2_3_P
TX_2_3_N
TX_2_2_P
TX_2_2_N
TX_2_1_P
TX_2_1_N
TX_2_0_P
TX_2_0_N
TX_1_3_P
TX_1_3_N
TX_1_2_P
TX_1_2_N
TX_1_1_P
TX_1_1_N
TX_1_0_P
TX_1_0_N
1
R91
2
MSD8WB9BX
10k
6 LVB0P V23 D8_TX_B_0_P
R238 LVB0N U24 D8_TX_B_0_N
33k OP_PIN27 LVB1P V25 D8_TX_B_1_P
PANEL_VCC
LVB1N V24 D8_TX_B_1_N
R90
W25 D8_TX_B_2_P
C 1
10k
2
LVB2P C
FFC
W23 D8_TX_B_2_N TX_1_0_N
CN13
LVB2N TP88 TX_2_0_N TP80

Y23
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
LVBCKP D8_TX_B_CLK_P TX_1_0_P TP87 TP78
1
S54 TX_2_0_P
1 2
OP_PIN40 LVBCKN W24 D8_TX_B_CLK_N TX_1_1_N TP86 TX_2_1_N TP77
12V_VCC
LVB3P AA23 D8_TX_B_3_P TX_1_1_P TP85 TX_2_1_P TP76
1
S53 2 Y24
12V_VCC OP_PIN41 LVB3N D8_TX_B_3_N TX_1_2_N TP84 TX_2_2_N TP75
LVB4P AA25 D8_TX_B_4_P TX_1_2_P TP83 TP74
S35 TX_2_2_P
WXGA FFC 15.6"
3D_EN 2 1
LVB4N AA24 D8_TX_B_4_N
TX_1_CLK_N
TX_1_CLK_P
TX_1_CLK_N
R219 TP82 TX_2_CLK_N TP79

PANEL_VCC OP_PIN42 AB25 D8_TX_A_0_P TX_1_CLK_P
OP_PIN11
OP_PIN27
TX_1_3_P
TX_1_3_N
TX_1_2_P
TX_1_2_N
TX_1_1_P
TX_1_1_N
TX_1_0_P
TX_1_0_N
OP_PIN10
33k LVA0P TP81 TX_2_CLK_P TP73
PANEL_VCC
OP_PIN7
OP_PIN8
OP_PIN9
OP_PIN6
OP_PIN5
LVA0N AB23 D8_TX_A_0_N
R78
1 2
LVA1P AC25 D8_TX_A_1_P TX_1_3_N TP71 TP67
10k TX_2_3_N
LVA1N AB24 D8_TX_A_1_N TX_1_3_P TP70 TP66
S42 TX_2_3_P
1 2
LVA2P AD25 D8_TX_A_2_P TX_1_4_N TP68 TP57
12V_VCC TX_2_4_N
AC24
SAM PANEL_VCC
R218
33k OP_PIN43
LVA2N
LVACKP AE24
D8_TX_A_2_N
D8_TX_A_CLK_P
TX_1_4_P TP69 TX_2_4_P TP62
LVACKN AD24 D8_TX_A_CLK_N

R50
PANEL_VCC
1 2
LVA3P AE23 D8_TX_A_3_P
10k
LVA3N AC23 D8_TX_A_3_N
FFC
AC22 D8_TX_A_4_P
D D
CN14
S41 LVA4P
AD23
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
1 2
OP_PIN44 LVA4N D8_TX_A_4_N
1
BACKLIGHT_ON/OFF
1
S55 2
DIMMING OP_PIN45
R246
PANEL_VCC 33k
FFC
CN16
R92
LG
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
1 2
1
10k
FERRITE R854
JUMPER DIMMING 3V3_VCC
F209 0R S64
D8_TX_A_0_N 4 R1 1 TX_1_0_N D8_TX_B_0_N 2
TX_2_0_N
E D8_TX_A_0_N
90R
4 FR1 1 TX_1_0_N D8_TX_A_0_P 3 R2 2 TX_1_0_P D8_TX_B_0_P
1
S63 2
TX_2_0_P
1 E
1
R18
D8_TX_A_0_P 3 FR2 2 TX_1_0_P 1 2 Q34
R855 4k7 2
2
BC858B
F198 0R S94
R43
4 R1 1
1k
90R D8_TX_A_1_N TX_1_1_N D8_TX_B_1_N 1
2
TX_2_1_N C124 3
4 FR1 1 3 R2 2 S78 2
D8_TX_A_1_N TX_1_1_N D8_TX_A_1_P TX_1_1_P D8_TX_B_1_P 1 TX_2_1_P MEGA_DCR_OUT 1 2 R254
D8_TX_A_1_P 3 FR2 2 TX_1_1_P
1
R856 220pF 100R
0R 8 1
F199 S96 50V R1
S58
90R D8_TX_A_2_N 4 R1 1 TX_1_2_N D8_TX_B_2_N 1
2
TX_2_2_N
4 FR1 1 3 R2 2 S95 2 7 R2 2
D8_TX_A_2_N TX_1_2_N D8_TX_A_2_P TX_1_2_P D8_TX_B_2_P 1 TX_2_2_P 3
D8_TX_A_2_P 3 FR2 2 TX_1_2_P R857 S60 R17 DIMMING

0R BACKLIGHT_DIM 1 2 2
Q25 6 R3 3
F200 S101 4k7
90R D8_TX_A_CLK_N 4 R1 1 TX_1_CLK_N D8_TX_B_CLK_N 1
2
TX_2_CLK_N BC848B
4 FR1 1 3 R2 2 S97 2
C123 1 5 R4 4
D8_TX_A_CLK_N TX_1_CLK_N D8_TX_A_CLK_P TX_1_CLK_P D8_TX_B_CLK_P 1 TX_2_CLK_P
3 FR2 2 S61 3
D8_TX_A_CLK_P TX_1_CLK_P R858 MEGA_DCR_IN 1 2 R16 C142

0R 1
4k7
2 2
Q26 10uF
F202 S103 220pF BC848B
90R D8_TX_A_3_N 4 R1 1 TX_1_3_N D8_TX_B_3_N 1
2
TX_2_3_N 16V
4 FR1 1 3 R2 2 S102 50V
D8_TX_A_3_N TX_1_3_N D8_TX_A_3_P TX_1_3_P D8_TX_B_3_P 1
2
TX_2_3_P C122 1
D8_TX_A_3_P 3 FR2 2 TX_1_3_P 1 2
F D8_TX_A_4_N 1
S7 2
TX_1_4_N D8_TX_B_4_N 1
S105 2
TX_2_4_N
220pF 50V F
S52 2
S104 2
D8_TX_A_4_P 1 TX_1_4_P D8_TX_B_4_P 1 TX_2_4_P
1
S217
S218
2
TX_1_4_N 1
S220
S219
2
TX_2_4_N
1 2
TX_1_4_P 1
2
TX_2_4_P SCH NAME :06_LVDS T. SHT:10
10_BIT PANEL DRAWN BY :ALP KIRAZ-BARAN ÇUBUKÇU 27-06-2012_15:24
1 2 3 4 5 6 7 8 AX M
1 2 3 4 5 6 7 8
S2_TUN_3V3
S2_TUN_3V3
VDDI_1V25 VDDO_3V3 VDDI_1V25 I2C Address**pin VDD_DIG=High
I2C Address**ADDR_SEL pins Write : C0H
LNB_EN
F25 C395
Write : D0H 3V3_VCC VDDO_3V3 Read : C1H 22uF
C416
100nF10V
100nF10V
100nF10V
Read : D1H VDDI_1V25 60R 50V 50V F17 6V3
C396
C417
22uF X7 27pF 3V3_VCC S2_TUN_3V3
C32
C34
C33
VDDA_3V3 6V3 27pF27MHz 60R
100nF10V
C334
NC NC NC NC NC NC NC NC NC NC NC 1 4
A F26 C336 A
C35
2 3
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
1V26_VCC VDDI_1V25 10nF 16V R705
100nF10V
100nF10V
60R C397 10nF 470R
NC5
GPO
VCC_10
NC4
NC3
VDDD_4
NC2
NC1
NC9
NC8
LOCK
VCC_9
LNB_EN
CKXTAL_13
OLF
GNDD
C369 22uF 16V S2_TUN_3V3
C47
C46
14
13
12
11
10
6V3
8
R497 50V 10pF C335
1 48
VDDA4
TEST1
TEST2
TEST3
VDDA3
XTALN
XTALP
CLKO_TS2022 GNDA_1 M_CKOUT 33R TS1_CLK
C414 R496 F27 10nF 16V 16V
2 XTAL_IN M_SYNC 47 33R TS1_SYNC VDDO_3V3 VDDA_3V3 10nF
NC NC
R180
10k
C415 60R C398 R704
27pF 3 46
50V XTAL_OUT VCC_8 22uF 3k3 15 RES VDDA2 7 C333
27pF C371 R498 6V3 10nF R181 10nF 16V
50V 4 VDDA_1 M_VAL 45 33R TS1_VLD 16V CAP CK_OUT NC 10k CLKO_TS2022
16 6
TP1
10pF 50V C370 C331 C332
5 44
GNDA_2 M_ERR R575 2
S19
1
17 CKDIV_OPT U30 IP 5 S2_IP C37410pF 50V
C48 10pF 50V 33R S2_TUN_3V3
S2_IP 6 IP M_DATA7 43 NC M88TS2022
5 R4 4 TS1_D7 2
S20
1
NC 18
RFBYPASS IN 4 S2_IN C37510pF 50V
C49 100nF
7
U29 42 6 R3 3 TS1_D6
S2_IN IN M_DATA6 7 R2 2 TS1_D5 3V3_VCC 10k 19 RESET VDDA1 3 S2_TUN_3V3
B 100nF C373
8
M88DS3002 41 8 R1 1 TS1_D4 R113 2
S11
1
L20 C338 B
VDDA_2 VDDD_3 VDDO_3V3 20 LNA_IN QN 2 S2_QN
4n7H
10pF 50V C372
S2 DEMOD 10V100nF C585
S2 TUNER 10nF 16V
1
9 GNDA_3 M_DATA5 40 Q45 500fF TEST QP S2_QP C37610pF 50V
BC848B
21 1
S16
C50 10pF 50V C38 S2_RESET 10k 50V
VDD_DIG
VDD_REG
S2_QN 10 QN M_DATA4 39 10V100nF R2
VDAA5
VDDA6
2
C51 100nF C37 C341
SDA
SCL
AGC
S2_QP 11 QP VCC_7 38 C377 10pF 50V
VDDI_1V25
100nF 33R 10nF 16V
12 37 C584
22
23
24
25
26
27
28
NC6 M_DATA3 5 R4 4 TS1_D3
NC
13 36 6 R3 3 TS1_D2 CN25 S2_TUN_3V3 S2_TUN_3V3
VDDO_3V3 VDDD_1 M_DATA2 7 R2 2 TS1_D1 R699
100pF
C439
3p3F
2
C45 R1 TS1_D0 50V 50V 50V 1k 2k S2_AGC
C317
8 1
S14
S17
14 VCC_1 M_DATA1 35 R576 R328
C340
10nF
C337
10nF
10V100nF 1nF R502 16V 16V
15 34
1
VCC_2 M_DATA0 33R S2_SCL
1nF
50V
R501
ADDR_SEL1
ADDR_SEL0
DISEQC_IN
CKXTAL_27
100nF10V
VDDI_1V25 16 NC7 VCC_6 33 LNB_OUT 33R S2_SDA R700

VDDI_1V25
2
NC NC close to TS2022
VDDD_2
DISEQC
1nF 1nF 1nF 1nF C230 C231 2k
VCC_3
VCC_4
VCC_5
RESET
C318
C320
C321
C319
C316
C44
S18
AAGC
SCLT
SDAT
C VDDO_3V3 VSEL 18pF 18pF C

NC
SDA
SCL
C339
10nF
10V100nF 50V 50V 50V 50V 50V 50V 16V close to DS3002
NC
1
C36
2
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
R103
4k7
NC NC NC 1
S9 2
EXT_RESET
100nF10V
100nF10V
1
R698 S93
1 2
S2_AGC 2k C41 C42 S2_RESET
USB
C40
C43
100nF10V
VDDO_3V3 100nF 100nF
C330
10nF
I2C_ADR1
I2C_ADR0
2
16V 10V 10V TP96

R102
1
4k7
C39
DISEQC_OUT
60R
2
4
R104
R105
VDDI_1V25
1 2
4k7
4k7
1
VDDO_3V3
F6
NC
VDDI_1V25
VDDI_1V25
13/18V
VDDO_3V3 3
1
1 TP91 R74
2
2
2 6 IO4 IO1 1 1 2
R178 10R USB2_DP
R179
10k
10k
S2_SCL R499 1 TP92 U1
33R SYS_SCL 1
1 2
USB1_VCC 5 VDD GND 2
C12 330R AZ099-04S
1
1
S2_SDA R500 C143 USB1_VCC R311
1
I2C_ADR1 4 IO3 IO2 3
D 33R SYS_SDA CN17 10uF 10uF F69 1
10R
2
USB2_DN D
TP97
SH2 C228 C229 I2C_ADR0 10V 10V
18pF 18pF R309
1
1 2
50V 50V 60R 10R USB1_DN
1
S12
S13
1 2 R310
1 2
4 1 TP98 F5 10R USB1_DP
35V
100uF
C1204
4 1 TP100
3
3 1 TP101
2
30072534 1U bom 2 F70 330R
L10 D12 L19 1
1 2
USB2_VCC
1 C114 F11 330R
1
10uH 10uH C582 CN18 1 2
C579 1N5819 10uFC115 5V_VCC

CN19
TP99
10uF C1177 C1176 C1194 C1195 10V 10uF F50 330R
1 2
25V 10uF 10uF 10uF 10uF 4u7F25V 10V 3V3_VCC
25V 25V 25V 25V
C1205
16V
E 1 16
10uF 25V
100nF C160 16V
E
C236 SGND PGND C1225
C545 C1179 100nF C583
10uF 10uF 16V 2 BYPASS SW 15
10uF 25V C161 1 IN 100nF
16V 16V 220nF 25V C572 5V_VCC OUT 6 USB1_VCC 5V_VCC 1 IN OUT 6 USB2_VCC
12V_VCC R702 3 VDD BST 14 U22 U2
22k R805 C578 U20 100nF50V 2 GND ILIM 5 560R 2 GND ILIM 5 560R
4 13
1N5819
180k COMP VBOOST S23 TPS2553-1 R267 TPS2553-1 R193

D11
15nF 50V MP8125 3 EN FAULT 4 560R 3 EN FAULT 4 560R

USB_ENABLE1 USB_ENABLE2
LNB_EN C577 47n 30000334 bom5 EN VOUT 12 1 TP124 R259 R75
R683 D10
15nF 50V nc LINEDROP 6 LINEDROP ILIMIT 11 10k LNB_OUT
100nF 16V
nc R276 LNB_POK C576 1N5819

7 10 22n 30000312 bom
1N5819
10k POK TCAP

R536
R390
100k
C237
C22V
10k
D16
D9
15nF 50V C238 C573

13/18V 8 13V/18V EXTM 9 100nF
R537 100nF 16V 50V
10k
3V3_VCC
R392
100k
3V3_VCC
F LNB POWER F
3V3_VCC
DISEQC_OUT

SCH NAME :07_S2_TUN_S2_DEMOD_USB T. SHT:10
1 2 3 4 5 6 7 8 AX M
1 2 3 4 5 6 7 8
TP93 1 1
S28 S29 2
U4 DSP_MAIN_L_OUT MAIN_L HP_L
CLOSE TO MSTAR IC
MSD8WB9BX 6
C453 TP94 1
R607
200k
LINEIN_L0 Y12 3n3F C1200 R653
7 AA12 50V 3
LINEIN_R0 DSP_SC_L_OUT 5k6 SC_L_OUT HP_R
LINEIN_L2 AA11
1uF C548
2
AB11 C586 4
A LINEIN_R2 6V3 1nF C1226 C1227 A
R707
R205
R206
S31 S30
8k2
10k
10k
LINEIN_L3 AE8 C587 SC_AUD_L_IN 50V 10nF 10nF TP95 1
DSP_MAIN_R_OUT MAIN_R JK1
LINEIN_R3 AC9 C591 SC_AUD_R_IN 16V 16V 5
Y8 2u2F C590 SAV_L_IN
1
LINEIN_L4 C454
R608
200k
Y9 2u2F 7
LINEIN_R4 2u2F SAV_R_IN 3n3F
LINEIN_L5 AA10 50V C1201 R654
AB9 2u2F
LINEIN_R5 DSP_SC_R_OUT 5k6 SC_R_OUT R329
1uF C549 HP_DETECT 1k 4k7 1 3V3_VCC
EAR_OUTL AA9 R202 1nF R147
OUT_HP_L 6V3
R708
C5V6
8k2
D28
EAR_OUTR Y10 SAV_AUD_L_IN 10k SAV_L_IN 50V
OUT_HP_R
HEADPHONE OUTPUT
TP8
LINEOUT_L0 AC12 SAV_AUD_R_IN 10k SAV_R_IN
DSP_SC_L_OUT
LINEOUT_R0 AE12 R201
DSP_SC_R_OUT
LINEOUT_L2 AC11
DSP_MAIN_L_OUT C501 C502 C599 C598
R398
R397
12k
12k
LINEOUT_R2 AD10 330pF 330pF 560pF 560pF L21 C618 L22 C619
DSP_MAIN_R_OUT
LINEOUT_L3 AD11 50V 50V 50V 50V OUT_HP_L HP_L OUT_HP_R HP_R
LINEOUT_R3 AE11 10uH 10uH
100uF 100uF
16V 16V
R803
220R
R804
220R
AUVRP AD9 R265 R266
AC10 Q41 Q42
B AUVAG
AE9
680R
BC848B
680R
BC848B B
AUVRM C554 C27 C209 C53 HP_MUTE HP_MUTE
10uF 10V
10uF 10V
1uF 4u7F10uF 100nF Layoutta ust ustte yerlestirilecek...
C1170
R262
C1171
R263
10k
10k
SPDIF_IN E6 50V 10V 10V 10V
DVD_SPDIF
SPDIF_OUT E5
SPDIF_OUT
1N4148
3V3_VCC
3V3_STBY
R717
S36
VDD_AUDIO
10k
3V3_VCC
C8
D1
1 2
I2S_IN_BCK F28 60R
I2S_IN_SD D8
D9 1
S38 2
16V
I2S_IN_WS 12V_VCC
2
100uF
1N4148
R703
R207
S37
10k
B10
D2
1 2
5V_VCC
OPTINAL FOR LINE_OUT
2 1
I2S_OUT_BCK R709 22R I2S_OUT_BCK
I2S_OUT_MCK C9 22R R710 I2S_OUT_MCK C546
2
C10
1
I2S_OUT_WS R711 22R I2S_OUT_WS C147 C148
R208
2
NC NC
10k
I2S_OUT_SD B9 22R 180pF 1 INR_P INL_P 14 180pF
I2S_OUT_SD
R718
R212
R213
15k
10k
10k
C23 R274 50V R269 R268 50V R275 C19
50V 22pF
50V 22pF
50V 22pF
50V 22pF
C145 2 13 C146
POP NOISE CIRCUIT SC_R_OUT SC_L_OUT
1
AUBCK_OUT 15k 47k INR_N INL_N 47k 15k
C614
C615
C616
C617
1
1uF 16V R280 R279 16V 1uF
30k 47pF 50V 3 OUTR OUTL 12 47pF 50V 30k
BC858B
Q37 SC_AUD_R_OUT C9 U16 R270 SC_AUD_L_OUT
AMP_EN 4 11
C GND UVP 47k C
2
R27110uF DRV632 R277
R210
2
10k
C888 AMP_EN 1 2 5 MUTE GND1 10 1 2
R209 10k 1k
R573
3k9
R211 100nF Q12 2
10k
1
AMP_MUTE Q13 BC848B 6 9 NCR281
1
1 2
10k 10V R264 VSS VDD
R278
3k3
BC848B
1
2 1
10k 27k VDD_AUDIO
7 CN CP 8
C18
2
CLOSE TO PIN46 1uF F2
R393
100k
1N4148
CLOSE TO PIN35 16V C17 3V3_VCC
S2 S4
D23
12V_VCC VDD_AUDIO 60R
10uF
10uF
C7
C8
1
C561 C563 C54 C31 1uF
S1 D18 100uF 100uF 10uF 10uF HP_MUTE
24V_VCC_AU 35V 35V 10V 10V
AUDIO_AVDD
S3 SK24
5V_VCC C467
SC_AUD_R_OUT
SC_AUD_L_OUT
8W 30067972
2w5 30069845 C466
LINE_R_IN
LINE_L_IN
10k
C181 4n7F
2 1
50V R199
470k SC_R_OUT R655 C520 SC_AUD_R_OUT
C1804n7F
D 50V 47nF R696 5k6
10k
D
470k 16V C612 C613 220pF 2 1
47nF R695 1uF LINE_R_IN 50V R200

C521 CN15
16V 50V 50V SC_L_OUT R656 SC_AUD_L_OUT
100nF
1uF 5k6 R_AUDIO_P 1
C594
12
11
10
50V
AUDIO_AVDD TP177
1
1
220pF
LINE_L_IN 50V R_AUDIO_N 2
VR_ANA
PLL_FLTP
PLL_FLTM
AVSS
HPVDD
CPP
CPN
HPVSS
HPR_IN
HPR_OUT
HPL_OUT
HPL_IN
TP176 1
3V3_VCC 4k7 13 AVDD HP_PWML 48 L_AUDIO_P 3
C1217
R145 VDD_AUDIO TP178 1
C556
ADRES SECIMI
1uF
50V
1uF
50V
4k7 A_SEL HP_PWMR 50V L_AUDIO_N 4
14 47 330pF
U12 PT2333 R146 R802 F54 60R TP175 1
I2S_OUT_MCK 15 MCLK PVDD_AB 46 18R

LEFT
GNDA
OUTN
VDDA
VDD1
GNDB
OUTP
R798 C607 L2 15uH

INP
INN
SDB
C611
18k2 16 OSC_RES BST_A 45 L_AUDIO_P
33nF 50V A_OUT1A F56 60R
A1
A2
A3
B1
B2
B3
C1
C2
C3
17 DVSSO OUT_A 44
C118 R21 A_OUT1B L13 15uH
MAIN_L 4k7 18 VR_DIG TAS5719 PGND_AB 43 C610
L_AUDIO_N
E 220nF A_OUT1A C28 C242 R801 E
R26
4k7
10V AMP_EN
10V 4u7F 100nF AMP_EN

16V
19 PDN U35 OUT_B 42 18R
C13 10V C606 33nF
C558
1uF
C555 50V
C1218
1uF 1uF
50V 50V
2 330pF
A_OUT1B 100nF LRCLK BST_B 50V
20 41
C1220
1
10V
220nF
I2S_OUT_WS
C111
1uF
50V
I2S_OUT_BCK SCLK BST_C 50V
21 40 330pF
VDD_AUDIO C60533nF R800 F55 60R
I2S_OUT_SD 22 SDIN OUT_C 39 18R
C609 L12 15uH
GVDD_OUT
SYS_SDA 100R SDA PGND_CD R_AUDIO_P
SSTIMER
PVDD_CD
23 38
AUDIO AMP for <=24"
RESETN
R351 A_OUT2A F57 60R

STEST
HP_SD
BST_D
DVDD
DVSS
AGND
VREG
SYS_SCL 100R SCL OUT_D
GND
24 37
U3 PT2333 R350 C604 A_OUT2B L11 15uH
33nF R_AUDIO_N
RIGHT C608
GNDA
OUTN
VDDA
VDD1
GNDB
OUTP
25
26
27
28
29
30
31
32
33
34
35
36
F8 50V R799
INP
INN
SDB
3V3_VCC AUDIO_DVDD 18R

60R C597 C244 EXT_RESET 100R C245 C1202
C557
1uF
50V
C1219
1uF
50V
330pF
A1
A2
A3
B1
B2
B3
C1
C2
C3
10uF 100nF R349 C547 100nF 1uF 50V

C125 R20 6V3 16V 1nF 16V 16V C240
AUDIO_DVDD
F MAIN_R 4k7 50V C537 100nF F

A_OUT2A 2n2F 50V
R225
220nF
4k7
10V AMP_EN
10V F71 50V

C16 3V3_VCC AUDIO_AVDD
VDD_AUDIO
A_OUT2B 10V 330R C596 C243 C595 C241

100nF
1
10uF 100nF 10uF 100nF VESTEL PROJECT NAME : 17mb95 A3

220nF
C116
VDD_AUDIO
6V3 16V 6V3 16V I2C Address**pin A_SEL=Low
0x54
AMP_EN
AUDIO AMP for >=26"
SCH NAME :08_AUDIO_HEADPHONE T. SHT:10
I2C Address**pin A_SEL=High
0x56 DRAWN BY :ALP KIRAZ - BARAN ÇUBUKÇU 29-03-2012_13:56
1 2 3 4 5 6 7 8 AX M
F
E
D
C
B
A
3V3_STBY
VDDC
D163
TP102
K12 AVDDLV_USB GND_20 G10
C5V6
E2
30067087
S22
1
1
G9 VDDC_0 GND_21 G11

CN26 H9 G12
R182 TP6 VDDC_1 GND_22
TP2
4 K10 G13
10k 1 VDDC_2 GND_23
3V3_STBY
3V3_STBY
60R
F41
TOUCH_PAD_OPTION
TP5 K11 VDDC_3 GND_24 G14
G4 3 L10 G17
+
2 VDDC_4 GND_25
M12 VDDC_5 GND_26 G18
G3 C M13 G19
TP104 3 VDDC_6 GND_27
SW1
2k N12 VDDC_7 GND_28 G24
G2 T
60R
F45
60R
F46
R701 4 P14 VDDC_8 GND_29 H8
6V3
SOURCE
10uF
C443
R706 TP4 P15 VDDC_9 GND_30 H10
G1 2 R10 H11
470R 5 VDDC_10 GND_31
1
TP3 R14 VDDC_11 GND_32 H12
1 R15 H13
6 VDDC_12 GND_33
10V
C69
-
47R
R793
D17 T10 VDDC_13 GND_34 H14
E1
10V
C74
10V
C75
100nF
2
1 2 P10 H15
AVDD12 GND_35
KEYBOARD_ONBOARD
100nF
100nF
C5V6 GND_36 H16
C5V6
1k
F137
MAGIC BUTTON
R16 H17
AU33
2 1
AVDDL_MOD GND_37
1k
10V
C70
TP103
F140
D162 GND_38 H18
100nF
GND_39 H19
1k
F138
P19 J5
AVDD_EAR33
FB_CORE GND_40
1k
VDDC
F139
J7
2
2
GND_41
J8
AVDD_DVI
F32 GND_42
L11 AVDD_LAN12 GND_43 J9
60R
F33 GND_44 J10
1
2
M14 DVDD_DDR GND_45 J11
2
2
KEYBOARD_ONBOARD
60R J12
3V3_STBY
GND_46
10V
3V3_STBY
3V3_STBY
C630
V8 AVDD_ADC25_0 GND_47 J13
ADC2P5
100nF
3V3_STBY
D35
D34
C5V6
C5V6
W7 AVDD_ADC25_1 GND_48 J14
1
1
W8 AVDD_ADC25_2 GND_49 J15
W9 AVDD_REF25 GND_50 J16
AVDD25_REF
J18
KEYBOARD
GND_51
60R
F44
60R
F43
W14 AVDD_LAN25 GND_52 J19
AVDD25_LAN
60R
F42
GND_53 J25
V16 K9
TOUCHPAD_SDA
TOUCHPAD_SCL
AVDD_MOD AVDD_MOD_0 GND_54
W16 AVDD_MOD_1 GND_55 K13
K14
KEYBOARD
GND_56
W11 AVDD_PGA25 GND_57 K18
AVDD25_PGA
10V
C73
10V
C72
W12 PGA_COM GND_58 K19
PGA_VCOM
100nF
100nF
10V
C71
GND_59 K22
100nF
GND_60 L9
N7 AVDD_ALIVE GND_61 L12
AVDD_NODIE
3
3
GND_62 L13
AVDD_MPLL
K7 AVDD_DVI_USB_0 GND_63 L14

AVDD_DVI
L7 L18
AVDD_DMPLL
AVDD_DVI_USB_1 GND_64
M8 AVDD_MPLL GND_65 L19
AVDD_MPLL
6V3
C11
P6 AVDD_DMPLL GND_66 M9
AVDD_DMPLL
220uF
AVDD_NODIE1V2_VCC
1V5_VCC
GND_67 M10
LED2
M19 BYPASS GND_68 M11
GND_69 M15
GND_70 M16
1
C5V6
16V
1uF
D165 T7 AVDD_AU33 GND_71 M18

AU33
C1203
60R
F31
R7 AVDD_EAR33 GND_72 M20

AVDD_EAR33
10k
60R
F49
R227
GND_73 M21
2
M22
5V_STBY
GND_74
3V3_STBY
M25
2
GND_75
R19 VDDP_0 GND_76 N10
VDD33
6V3
1
3
C399
T19 VDDP_1 GND_77 N11

220uF
CN27 1
CN1 N13
TP181 GND_78
1
1
6V3
6V3
22uF
C401
22uF
C400
1 1 GND_79 N14
Q17
1 N15
R272 TP182 GND_80
6V3
S49
S48
BC848B
10uF
C441
1
10k 2 150R 2 2 W17 AVDD_LPLL_0 GND_81 N16
AVDD_LPLL
2
2
4
4
1 W18 N17
R229 TP183 AVDD_LPLL_1 GND_82
6V3
6V3
10uF
C447
10uF
C446
N19
2
3 3 GND_83
2
BC858B
1 N20
TP184 GND_84
10V
C59
1
3
1
220R 2 1
220R 2 4 4 GND_85 N21
100nF
U4 N22
R721 R722 GND_86
1
10V
C87
10V
C81
Q39
5 5 GND_87 P7
100nF
100nF
MSD8WB9BX
2
C419
GND_88 P8
Q38
10V
C60
220R 220R V19 P9
1
3
1 2 1 2 6 VDD33 VDDP_2 GND_89
100nF
27pF 50V
R720 R719 TP13 GND_90 P11
1k
10V
C86
10V
C80
1
S50 2
2
F143
TOUCHPAD_SCL 7 GND_91 P12
100nF
100nF
1
10k 2 GND_92 P13
10V
C56
1
S51TP12 2
BC858B
R228 TOUCHPAD_SDA 8 GND_93 P16
100nF
J17 AVDD_DDR0_0 GND_94 P17

AVDD_DDR0
10V
C91
10V
C85
1
S45 2 K15 P18
9 AVDD_DDR0_1 GND_95
100nF
100nF
K16 AVDD_DDR0_2 GND_96 R8

10V
C57
BC848B
Q18
10 L15 AVDD_DDR0_3 GND_97 R9
1k
100nF
F144
R11
1
3
GND_98
10V
C90
10V
C84
1
S46 2 R12
11 GND_99
100nF
100nF
2
K17 AVDD_DDR1_0 GND_100 R13
10V
C58
12 L16 AVDD_DDR1_1 GND_101 R17
1
100nF
IR_IN
L17 R18
5
5
AVDD_DDR1_2 GND_102
10V
C89
10V
C83
M17 AVDD_DDR1_3 GND_103 T8

100nF
100nF
10k
R226
GND_104 T9
10V
C61
2
GND_105 T11
100nF
LED1 GND_106 T12

10V
C88
10V
C82
GND_107 T13
R222
100nF
100nF
2 1 E9 T14
2V5_VCC 10k TEST2 GND_108
1k
1k
10V
C62
F146
F147
GND_109 T15
100nF
GND_110 T16
GND_111 T17
AVDD_DDR0
AVDD_DDR0
BC848B
Q16
GND_112 T18
U7
1
3
GND_113
2V5_VCC
D164
C5V6
GND_114 U8
2
D166 A5 GND_0 GND_115 U9

LED&VFD&RF
5V_STBY
C420 A23 U10

2
3V3_STBY
VDDC
GND_1 GND_116
B17 GND_2 GND_117 U11
1 2 C5V6
1
3
C11 GND_3 GND_118 U12

2V5_VCC
27pF C19 U13

50V GND_4 GND_119
Q1
C22 GND_5 GND_120 U14

1
C23 GND_6 GND_121 U15

BC848B
D14 GND_7 GND_122 U16
6
6
10k
R224
D18 GND_8 GND_123 U17

60R
F38
60R
F36
60R
F35
D19 GND_9 GND_124 V9

E8 V10
KEYBOARD
GND_10 GND_125
E17 GND_11 GND_126 V11
E18 GND_12 GND_127 V12
E19 GND_13 GND_128 V14
E22 GND_14 GND_129 V15
6V3
10V
C65
10uF
C442
F8 GND_15 GND_130 V17

100nF
PWM_OUT_LED3
F17 GND_16 GND_131 V18

F18 GND_17 GND_132 W10
F19 W13
PGA_VCOM
GND_18 GND_133
10V
C67
G8 GND_19 GND_134 W15

100nF
R138
2 1
4k7
AVDD25_PGA
AVDD25_LAN
3V3_VCC
D167
3V3_VCC
7
7
R131
3V3_VCC
5V_VCC
2V5_VCC
2V5_VCC
2 1
PWM_OUT_LED3
4k7 C5V6
2V5_VCC
3V3_VCC
2
2
2
60R
F48
60R
F47
4k7
4k7
4k7
60R
F34
60R
F37
R118
R115
R117
1
1
1
BC848B
Q9
AUBCK_OUT
60R
F40
60R
F39
1
3
R132 R133
2 1 2 1
4k7 4k7 3V3_VCC
10V
C78
2
NC
100nF
6V3
NC
10uF
C444
10V
C63
10V
C66
S26
100nF
100nF
10V
C68
10V
C79
nc
100nF
100nF
6V3
10uF
C445
DRAWN BY :ALP KIRAZ-BARAN ÇUBUKÇU

SCH NAME :09_MST_SUPPLY_KEY_TOUCH
10V
C64
R135
16V
I2S_OUT_MCK
100nF
2 1
C239
AVDD25_REF
4k7
100nF
AVDD_MOD
10V
C77
100R
R346
ADC2P5
100nF
VESTEL PROJECT NAME : 17mb95

AVDD_LPLL
MSTAR BOOT CONFIG
8
8
PWM1
R136
10V
C76
2 1
4k7
100nF
3D_EN
VDD33
PWM0
3D_ENABLE
A3
T. SHT:10
06-04-2012_10:56
F
E
D
C
B
A
AX M
1 2 3 4 5 6 7 8
INDIA OPTION
SC_CVBS_IN 4 R419 5V_VCC
YEL 12V_VCC 220R
SCART 1
5
C854 TP43
BAV70
1
CDA4C16GTH
5
D32
SCART_AUD_L_IN 3 10uF
VGA INPUT
CDA4C16GTH
CDA4C16GTH
R728
390R
R730
JK4
68k
WHT 16V C97
2
2
D6
C383 100nF
R230
R231
R232
D29
10k
10k
10k
SCART_AUD_R_IN
D4
1
A 33pF 2 10V VGA_DDC_5V A
R533
BC858B
75R
50V 1 RED Q40
4
50V 24C02 option
1
21
1
33pF C211 10k 8 1
2
1 TP63 15 R688 2 1 VCC A0
SC_CVBS_IN Q20 CVBS0_OUT 100R R693 U34
20 BC848B 8 1 7 2
1 TP26 C385 10uF 14 R1 WP A1
SC_CVBS_OUT R416 10V ST24LC21
19 SC_CVBS_OUT 7 R2 2 6 3
1 TP25 68R 100R 13 SCL A2
50V R794
18 33pF 6 R3 3 5 4
12 SDA GND
R618
R355
100R
R619
33k
33k
75R C809
1
2 1
17 R531 5 R4 4
C386 11
TP39
TP40
TP41
TP42
2
47R 1 SC_FB 100pF R237
16 R373 1 2
1 TP24 50V 10 1 2 10k
50V S59 F160 VGA_DDC_5V R569
15 SC_R
1 TP23 33pF 9 510R VGA_VSNC
75R
1 2 2
75R 1 UART-TX-SC 1 1k R570
14 R534 R532
C382 8 TP47 510R VGA_HSNC
2
75R 1
50V R731
13
SCART LT1
R535 33pF
B 7 2k4 B
SC1
BAV70
D170
12
1 TP14 C384 6 10k PC_DET
27pF 50V
27pF 50V
27pF 50V
SC_G R818
C1178
100nF
11
10V
TP15 5
C425
C427
C426
1
2
75R
2
2 1 UART-RX-SC 1 TP46
10 30069137
1
1 TP16 R723 R530 4
2
75R 1 22k SC_PIN8 F163
9 R538 R725 3 VGA_B
4k7 TP49 F161 1k
C15V
1
8
D33
1 TP17 2 VGA_G
SC_B C95 TP44 F162 1k
7
1
S24
1 TP19 1 TP18 50V 2 1
1 VGA_R
33pF TP45 1k
6 100nF
1
S34
10V CN29
1
C503
R545
R546
R547
C381 S47
2 NUP4004M5
5
1
3
4
5
75R
75R
75R
330pF
50V SCART_AUD_L_IN
D7
4 S62
2
F148 R353
C 1
100R
2
SC_AUD_L_OUT C
3 1k
1 TP20
SCART_AUD_R_IN C468
2
1 TP21
50V
4n7F F9
1 5V_VCC
1 TP22
60R
C504 C328
YPBPR INPUT
5
330pF F150 R354 10uF
CDA4C16GTH
50V 1
100R
2
SC_AUD_R_OUT 10V
SPDIF OUT INTERFACE
R148
4k7
1k
D31
C469 3
C94 50V
1
R352
SPDIF_OUT 2 1 2
Q14 220pF
4n7F 100R 2 1
4
BC848B 2 1
F152
220pF
NC
C523
50V 100nF
2
50V
1
C522 PR_IN
R149
10V
4k7
C93100nF 1k
2
S43 TP9
2 1 TP54
3 2 1 2 1
S44 3
1
R223 10V JK3
2
Q15 1
AMP_MUTE 10k R330
D SCART AUDIO FILTER 1
BC848B 2
1k
1
7 D
R233
SCART_AUD_L_IN 10k SC_AUD_L_IN F154
JK15 5
PB_IN
SCART_AUD_R_IN 10k SC_AUD_R_IN 1 TP55 1k
4
R234
3
C508 C507 C600 C601
R402
R401
12k
12k
330pF 330pF 560pF 560pF 6

50V 50V 50V 50V
2
BC848B DVD_IR 1 TP56
Q3 1
R9
IR_IN 1 3
2
4k7
1
3V3_VCC F155 220nH
Y_IN
2 1k L23
27pF
27pF
27pF
1
2
50V
50V
50V
50V
2
4k7
75R
75R
75R
4p7F
R7 50V
C430
C429
C428
R548
R550
R549
2
2
R29
47k
E 22pF E
SLIM SIDE AV
1
2
1
C493 C620
1
DVD_IR_ON/OFF
2
220pF
C5V6
C526
R551
2
D21
50V
75R
1
1
TP61
DVD CONNECTION
1
1
TP60 F159
2
1k C513
SAV_CVBS S106 OPTIONAL
R203 TP11 FS3
6 75R CN7
1 2
5V_VCC GASGET POSITIONS
1
TP59 F158 330pF R177 4A/24VDC
3
TP10
50V SAV_AUD_L_IN DVD_CVBS 180R 1 2 GS1

1k
4
F156
1k R27 TP27
3 4
C26
10uF
16V
!
FS5
GS2
1
JK10 5 1 2 1 2
DVD_SENSE 100R 5 6 12V_VCC GS3
100nF10V
F157 TP28 TP29 4A/24VDC

1
7
F SAV_AUD_R_IN 7 8 GS4 F
C5V6
C120
C5V6
1 2
2
D15
4k7
D13
1k C514 S21
R6
DVD_WAKEUP
NC
1
1
TP58 9 10 DVD_IR GS5
2
TP31 TP30
27pF
C126
330pF
2
50V
50V 50V
220pF
1
R28
DVD_SPDIF 1
100R
2
C121 SCH NAME :10_AV_INOUT_DVD T. SHT:10

1 2 3 4 5 6 7 8 AX M

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Table of Contents

Supported peripherals are:

Figure 1: Pin description

B.2. Pin Assigment

3. AUDIO AMPLIFIER STAGES

A. MAIN AMPLIFIER (TAS5719)(6-8 W option)

– TAS5717 Supports 2×10 W and TAS5719 Supports 2×15 W Output

– Wide PVDD Range, From 4.5 V to 26 V

– Efficient Class-D Operation Eliminates Need for Heatsinks

– Requires Only 3.3 V and PVDD

– One Serial Audio Input (Two Audio Channels)

– I2C Address Selection via PIN (Chip Select)

– Supports 8-kHz to 48-kHz Sample Rate (LJ/RJ/I2S)

– External Headphone-Amplifier Shutdown Signal

– Integrated CAP-Free Headphone Amplifier

– Stereo Headphone (Stereo 2-V RMS Line Driver) Outputs

– Independent Channel Volume Controls With 24-dB to Mute

– Programmable Two-Band Dynamic Range Control

– 14 Programmable Biquads for Speaker EQ

– Programmable Coefficients for DRC Filters

– 0.125-dB Fine Volume Support

– Serial Control Interface Operational Without MCLK

– Factory-Trimmed Internal Oscillator for Automatic Rate Detection

– Surface Mount, 48-Pin, 7-mm × 7-mm HTQFP Package

– AD, BD, and Ternary PWM-Mode Support

– Thermal and Short-Circuit Protection

– EQ: Speaker Equalization Improves Audio Performance

– DRC: Dynamic Range Compression. Can Be Used As Power Limiter. Enables

– DirectPath Technology: Eliminates Bulky DC Blocking Capacitors

c. Pin descriptions and functions:

Figure 2: Pin description

B. MAIN AMPLIFIER (TS4962M)(2.5 W option)

- Operating from VCC = 2.4V to 5.5V

c. Pin descriptions and functions:

Figure 3: Pin description

C. HEADPHONE AMPLIFIER STAGE

Figure 5: Power socket and power options

Figure 6: Power steps

General Description and Features

Figure 7: Pin description

Figure 8: General description

Figure 9: Pin configuration

Table 8: Recommended operating conditions

5. MICROCONTROLLER (MSTAR MSD8WB9BX)

6. 1Gb DDR3 SDRAM

Table 11: Recommended operating conditions

7. 1Gb G-die DDR3 SDRAM

Table 12: 1Gb DDR3 G-die Speed bins

Table 13: Absolute Maximum DC Ratings

Table 14: Recommended operating conditions

8. 2Gbit (256M x 8 bit) NAND Flash Memory

9. 16M-BIT [16M x 1] CMOS SERIAL FLASH EEPROM

■ HIGH DENSITY NAND FLASH MEMORIES

Table 16: Pin description

10. USB Interface

Figure 11: Pin configurations

Figure 12: CI interface

12. Demodulator Stage

13. LNB supply and control IC

14. Software Update

1. MB90_en.bin, mboot.bin and usb_auto_update_A1.txt documents should copy directly

E. Keypad Touchpad Problems

H. Standby On/Off Problem