DE LA SALLE UNIVERSITY

GOKONGWEI COLLEGE OF ENGINEERING

SY 2018-2019, TERM 3

LBYCP2B - Microprocessor Systems Laboratory

Final Report No. 5

Name: Cajayon, Bryon Gil p.

ID No.: 11412712
Section:EQ
Schedule: F 0915-1215

Instructor: Ms. Armie Pakzad

Rubric for Final Report:

Observation
30%

Data & Results including photos of the FPGA showing

different set of inputs and outputs
(35%)

Analysis & Conclusion

(35%)

Total

Student’s Signature:
Date of Submission: June 14,2019
CRITERIA EXEMPLARY SATISFACTORY DEVELOPING BEGINNING RATING

90-100 80-89 70-79 Below 70

Observation Observation is Observation is Observation is No

comprehensive incomplete with incomplete with observation is
(30%)
with good good grammar. poor grammar written
grammar

Data & Results Data and Results Data and Results Data and Results No data and
including were complete were incomplete were incomplete results
photos of the and explained and not explained and not explained
FPGA showing accompanied by accompanied by without photos of
different set of photos of the photos of the FPGA the FPGA showing
inputs and FPGA showing showing different different set of
outputs different set of set of inputs and inputs and
inputs and outputs outputs outputs
(35%)

Analysis & Explains the Fails to explain of Fails to explain of Fails to explain
Conclusion program and its the program and its the program and the program
effect on the effect on the its effect on the and no analysis
(35%)
hardware hardware behavior. hardware of sources of
behavior. Has Has analyses of behavior. Fails to error or
analyses of sources of errors give analyses of recommendati
sources of errors and gives sources of errors ons.
and gives recommendations. and does not give Conclusion
recommendations Conclusion answers recommendation way off base.
. Conclusion objectives s. Conclusion
answers answers
objectives objectives

TOTAL: 100%
I. Observation

The course LBYCP2B (Microprocessor Systems Laboratory) will revolve around

understanding the Microprocessor in terms of structure, uses or application, etc. A
microprocessor “contains the arithmetic, logic, and control circuitry necessary to
perform the functions of a digital computer’s central processing unit” (Britannica), due
to the roles of the microprocessor in a computer it is best for computer engineering
students to understand it for it controls most of the work performed by the computer
and thus may also be treated as the brain of the entire computer. This lab will provide
valuable information for the computer engineering students.

In order for the computer engineering students students in this course to understand
microprocessors the use of Xilinx Vivado and Zedboard Zynq development board for
the experiments will be a necessity. Xilinx Vivado will be used as the main
development software tool for the engineers to use in designing the experiments, Xilinx
is a company that provides easy to grasp development tools in the field of FPGA, SoC,
and ACAP(Xilinx). The computer engineering students in this course are expected to
explore the use of Xilinx in developing microprocessing systems to receive firsthand
experience and knowledge that will be useful in understanding the essence of computer
engineering. Zedboard on the other hand provides the development kits to be used
together with Xilinx. With the Zedboard, the computer engineering students will be
able to simulate the hardware designs that they will be creating in Xilinx Vivado these
experiences will supplement the knowledge the students will be gaining with regards
to the hardware side of microprocessors. Overall, the use of Xilinx Vivado and
Zedboard will lay the cornerstones of the computer engineering students’ knowledge
in designing and creation of microprocessors for the computer engineering students

This activity introduced the computer engineering students to the implementation of

the Video Graphics Array (VGA) through Zedboard. VGA in colloquial manner is
referred to as the cable that is used for connecting displays from an I/O port of any kind
of microcontroller capable of sending data to the VGA and then to a monitor or display.
Initially, the release of the VGA in 1987 allowed for display resolution of 640x480
pixels and was developed by International Business Machines (IBM) since then VGA
has evolved and branched out to other iterations and standards of itself allowing more
pixels for it to handle. Furthermore, the computer engineering students are introduced
to the use of Videos Direct Memory Access (Videos DMA) in Xilinx Vivado, the
Videos DMA is a “soft Xilinx IP core that provides high-bandwidth direct memory
access between memory and AXI4-Stream type video target peripherals” which is
compatible with VGA..
II. Results
Vivado:

Figure 1
Figure 2.

Figure 3.
 Figure 4.

Figure 5.

III. }
 IV. Analysis
The computer engineering students used ZYNQ7 processing system, clocking wizard,
and video timing controller in Fig.2 to initialize the system. The use of the clocking
wizard is to set a the frequency output of the processing system to appropriate it with
the target output in this case the target output is from 100MHz input to 74.25MHz that
required operating frequency for a video resolution of 720p (1280 x 720 pixels) with a
refresh rate of 60Hz. The clocking wizard has many uses aside from changing clock
speeds for it has other ports that can be utilized however, for this activity it is limited
to changing clock speeds seen in Fig.1. In Fig3. The settings of a Video Timing
Controller(VTC) is shown which is set to the target resolution 720P and in Fig2. The
actual connection of the VTC to the clocking wizard the VTC is video timing detector
and generator. The video test pattern generator generates pattern to test the input
coming from the clocking wizard in the connection made in Fig.4 the students may
derived that the video output would be the generated pattern of the video test pattern
generator and the VTC sets the timings right for a 720P resolution while the clocking
wizard is to send the clocks to the AXI4-Stream to Video Out which actualizes the
video into a frame which is then sliced into 3 for faster processing of the video.

V. Conclusion

The activity performed by the computer engineering students provided great

knowledge in video processing or the actual process of sending video the activity is a
great baseline in getting started with video processing or graphics processing for it
shows the basic route of graphics processing that is allocated to a display. The
techniques used in the activity are the same techniques with minor differences used in
other types of display standards such as the Digital Visual Interface (DVI) and the
newer Display Port(DP) both provides higher resolution and refresh rates to displays.
The method of slicing the video is a processor heavy task in this activity it was sliced
into three however, for modern graphics processing the technique is exaggerated and
implemented in a larger scale which means the activity served as great introduction for
the computer engineering students to graphics processing which has been a field with
many advancements.

VI. References

Britannica, T. E. (2018, January 26). Microprocessor. Retrieved June 5, 2019, from

https://www.britannica.com/technology/microprocessor
Xilinx Company Overview. (n.d.). Retrieved June 4, 2019, from
https://www.xilinx.com/about/company-overview.html
Zedboard. (n.d.). Retrieved June 4, 2019, from http://zedboard.org/