Simulation Experiments

Sl.No Date Name of the Experiment Remark

1 18/9/19 Verification of NETWORK THEOREMS (Thevenin’s

Theorem)

2 25/9/19 Maximum Power Transfer Theorem using Parametric Sweep

Method

3 23/10/19 Response of RLC series circuit

4 16/10/19 Design of Half Adder and Full Adder circuits

5 9/10/19 Design of Single phase Half-wave and Full wave Rectifier

6 -------------- **Design of Regulated Power Supply

Hardware Experiments

Sl.No Date Name of the Experiment Remark

1 Verification of KVL and KCL

24/7/19

2 Verification of Superposition Theorem

-----------

3 Verification of Thevevnin's Theorem

7/8/19

4 Design of Half Adder Circuit using gates.

28/8/19

5 Lamp Dimmer Circuit (Darlington Pair)

14/8/10

6 **Line and Load Regulation using Zener Diode

31/7/19

Reg. No: 19BCT0210 Name: HARSH GULATI

Exp No.:1 Date: 18/09/19
Verification of NETWORK THEOREMS
(Thevenin’s Theorem)

Aim: To Calculate Rth , Vth and Il and hence verify

Thevenin’s Theorem.

Apparatus/Tool required:
ORCAD / Capture CIS -->
Simulation Settings:
Analog Library – R,
Source Library – Vdc, Idc &
Ground (GND) – 0 (zero)
Analysis Type - Bias Point

Circuit Diagram

Statement: Thevenin’s Theorem

Thevenin’s Theorem states that “Any linear circuit containing several voltages and resistances can be
replaced by just one single voltage in series with a single resistance connected across the load“. In other
words, it is possible to simplify any electrical circuit, no matter how complex, to an equivalent two-terminal
circuit with just a single constant voltage source in series with a resistance (or impedance) connected to a
load.
Manual Calculations:

ToFind Vth: VA =
50 V
VB = 40 V
VTH = VA - VB
= 50 -40
= 10 V

To Find Rth:

20 ohm resistor is in parallel with 30 ohm resistor.

Parallel combination of 20 ohm and 30 ohm resistors is in series with 5
ohm resistor.

RTH = 12 +5
= 17 ohm

To Find IL:
IL = 10/(17+10)
= 0.37037 A

FROM MANUAL CALCULATION

Vth=10V Rth=17 ohm IL= 0.370A
 Simulation Circuit:
To Find Vth Rth IL::

Procedure:

1) Make the connections as shown in the circuit diagrams using

ORCAD Capture CIS software.
2) Click on P-Spice button to show the value of current and
voltages across various branches and then click on Run.
3) Find the value of Vth , Rth and IL.

4) Compare these values with those obtained from simulation

Result:

Thevenin’s Theorem

Manual Calculations Simulated Results

Vth=10V Vth=10V

Rth=17 ohm Rth=17 ohm

IL=0.37037 A
IL=0.37037 A

Inference:
Hence, Thevenin’s theorm is verified and the values of manual
calculations and the stimulation results are equal.

Reg. No: 19BCT0210 Name: HARSH GULATI Date:18-9-19

Ex. No.:2 Date: 25/9/19
Verification of NETWORK THEOREMS
(Maximum Power Transfer Theorem)

Aim: To verify the Maximum Power Transfer Theorem and hence

calculate Vth, Rth, Load Current(IL) and maximum power

Apparatus/Tool required:
ORCAD / Capture CIS --> Analog Library – R,
Source Library – Vdc, Idc &
Ground (GND) – 0 (zero)
Simulation Settings: Analysis Type - Bias Point

Circuit Diagram

Statement:
Maximum Power Transfer Theorem:-
It states that to obtain maximum external power from a source with a finite internal resistance, the
resistance of the load must equal the resistance of the source as viewed from its output terminals
Manual
Calculations

To Find
Vth
(at 5 ohm)
Using Nodal Analysis for Node 1,

-(2 - VA) + VA /10 = 0

VA= 20/11 V

Using Nodal Analysis for Node 2,

VB= 60 V

Vth =VA-VB = 58.182V

To Find Rth:-
1 ohm resistor is in parallel with 10 ohm resistor.
Parallel combination of 1 ohm and 10 ohm resistors is in series with 15 ohm resistor. Rth = 10/11 +
15
= 15.9 ohm

To Find Power:-
P =(Vth /(Rth+RL)) 2 *RL

FOR MAXIMUM POWER Rth = RL

P= Vth2/4Rth P=(58.18) 2/4(15.9)
P max = 53.2 W
FOR RL=35ohm
P max = 45.72 W

FROM MANUAL CALCULATION

Vth=58.182V(at 5 ohm )
Rth=15.909 ohm P max= 53.2W
Simulation Circuit:
To Find Vth Rth Pmax::

(THIS IS THE SIMULATION RESULT FOR RL=35ohm)

Procedure:

1) Make the connections as shown in the circuit diagram using ORCAD

Capture Cis Software.
2) Click on P-Spice option to display the values of current and
voltages along various branches.
3) Click on Run Option.
4) Find the value of Vth , Rth and P.
5) Compare these values with those obtained from simulation.

7
 Result:

MAXIMUM POWER TRANSFER

Manual Calculations Simulated Results

RL(ohm) POWER(_calculated)W POWER(simulated)

W
5 38.8 38.72
10 50.5 50.43
15.9(Rth) 53.07(Rl=Rth) 53.2
25 50.67 50.7
35 45.74 45.72
Inference:
Hence Maximum Power Transfer Theorem is verified and the values of Manual Calculations are equal
to the Simulated Result.

Reg. No: 19BCT0210 Name: HARSH GULATI Date: 25-9-19

8
Exp. No. 3 Date: 9/10/19
Design of Single phase Half wave
and Full wave Rectifiers

Aim: To study the Variations of Input and Output

Voltages in Half wave and Full wave Rectifier.

Apparatus/Tool required:
ORCAD / PSpice simulator -> Diode Library - D1N4002/4007,
Source Library – Vsin & Ground (GND) – 0(zero)
Analog Library – R
Simulation Settings: Analysis Type - Time Domain
Run to time: 80ms (for 4 cycles)
Circuit Diagram:

Single phase Half – wave Rectifier

9
Single phase Full – Wave Rectifier

Theory:

Half – wave Rectifier

A half wave rectifier is a type of device which converts the positive half cycle (positive current) of
the input signal into pulsating DC output signal. If the positive half cycle is allowed then the
negative half cycle is blocked and vice versa. However, it does not allow both positive and
negative half cycles at the same time. The half wave rectifier is made up of an AC source,
transformer (step-down), diode and load resistance. During the positive half cycle of AC, the diode
is forward biased and current flows through the circuit.
During the negative half cycle of AC, the polarities are reversed and the diode is reverse biased.
Hence it does not allow current to flow through the circuit. Therefore, a half wave rectifier gives
output only for the positive half cycle of AC.

10
Full – wave Rectifier
A Full Wave Rectifier is a circuit, which converts an ac voltage into a pulsating dc voltage using
both half cycles of the applied ac voltage. It uses two diodes of which one conducts during one
half cycle while the other conducts during the other half cycle of the applied ac voltage. During the
positive half cycle of the input voltage, diode D1 becomes forward biased and D2 becomes reverse
biased. Hence D1 conducts and D2 remains OFF. The load current flows through D1 and the
voltage drop across RL will be equal to the input voltage. During the negative half cycle of the
input voltage, diode D4 becomes reverse biased and D3 becomes forward biased. Hence D4
remains OFF and D3 conducts. The load current flows through D3 and the voltage drop across RL
will be equal to the input voltage. Hence a full wave rectifier gives output for both the half cycles
of AC.

Procedure:

1) Make the connections as shown in the circuit diagrams using

ORCAD Capture CIS software.
2) Click on P-Spice option to display the values of current and
voltages along various branches.
3) Click on Run button.

4) The output waveforms for both the half wave and full wave
rectifiers will be displayed.

11
Model Graph:

Output for Half Wave Rectifier:

Output for a Full Wave Rectifier:

12
 Result

Half Wave Rectifier gives output only for the positive half cycle of
AC whereas Full Wave Rectifier gives output for both the half
cycles of AC.

Inference

Hence the design of Single Phase Half Wave and Full Wave
Rectifiers is verified.
Reg. No: 19BCT0210 Name: HARSH GULATI Date: 9/10/19

13
Ex. No.: 4 Date: 16/10/19
Design of Half Adder and Full Adder circuits

Aim:
To verify the Design of Half Adder and Full Adder circuits and draw truth tables for the respective.

Apparatus/Tool required:
ORCAD / PSpice simulator - > 7400 Library – 7408, 7432 &
7486
Source Library – Dig clock
Simulation Settings: Analysis Type - Time Domain
Run to time: 4ms (for Half
Adder) Run to time: 8ms
(for Full Adder)
Circuit Diagram:
Half – Adder Circuit:-

14
Full – Adder Circuit:-

Theory:

Half Adder Circuit:-

Truth Table:-

A B S=AB C=A.B

0 0 0 0
0 1 1 0
1 0 1 0
1 1 0 1

15
Model Timing Diagram:-

Half – Adder:-

Full Adder Circuit:-

Truth Table:-
A B C S=ABB C= (AB).C+A.B

0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1

16
Model Timing Diagram:-

Full –Adder:-

Procedure:-
1) Make the connections as shown in the circuit diagrams using
ORCAD Capture CIS software.
2) Click on PSpice and then Run option.
3) Time diagrams for Half Adder and Full Adder circuits will be
displayed.
17
Result:
Time diagrams for both the circuits will be displayed. With the help of these diagrams, we can
frame the truth tables for both the circuits.

Inference:
Hence the design of Half Adder and Full Adder circuits is verified.

Reg. No: 19BCT0210 Name: HARSH GULATI Date: 16/10/19

18
Ex. No.: 5 Date: 23/10/19
Response of RLC Series Circuit

Aim:
To verify the response of RLC circuit and hence calculate maximum current and resonant frequency
of the circuit.

Apparatus/Tool required:
ORCAD / Capture CIS --> Analog Library – R, L & C
Source Library – V
ac Ground (GND) –
0 (zero)
Simulation Settings: Analysis Type – Transient (Time
Domain )
Run to time: 20ms

Circuit Diagram:

19
Theory:
A series RLC Circuit consists of a Resistor, an Inductor and a Capacitor connected in series across an AC
voltage source. The overall resistance of the circuit is called Impedance (Z). RLC Circuit is said to be in
resonance when Impedance of the Circuit = Resistance of the resistor i.e. Z = R. The frequency of the
circuit at this point is called Resonant Frequency.

Formulae:-
I max = V/R

Resonant Frequency, fr = 1/ (2 pi (LC) 1/2

Calculation:-
I max = V/R
= 20/200
= 0.1 A
= 100 mA

F r = 1/(2 pi
(LC)1/2
= 1/ (2*3.14*(47*47*10 -9)1/2
= 107.083 Hz

Model Graph:

20
Simulation Circuit Diagram and Output:

21
Procedure:-
1) Make the connections as shown in the circuit
diagrams using ORCAD Capture Cis software.

2) Click on P-Spice option to display the values of current

and voltages along various branches.

3) Click on Run button.

4) The output waveform will be displayed.

Result:-
At resonance, Frequency ofthecircuit =Resonant Frequency. Impedance of the circuit=Resistance of the Resistor.

Inference:-
Hence the Response of RLC circuit is verified.

Reg. No: 19BCT0210 Name: HARSH GULATI Date: 23/10/19

22
23
Ex. No.: 1 Date: 24-07-19
Verification of KIRCHHOFF’S LAWS
(Mesh and Nodal Analysis)

Aim:
To verify the “KCL” and “KVL” Laws.

Apparatus/Tool required:
Sl. No. Components Name Range Quantity
1 330Ω, 270Ω, 390Ω,
Resister 220Ω, 180Ω Each 1 No.
2 Ammeter 0-50mA (DC) 1 No.
3 Voltmeter 0-30V (DC) 1 No.
4 RPS 0-32 V (DC) 1 No.
5 Connecting Wires - Few
6 Bread Board - 1 No.

Circuit Diagram:

330 270 390

10V
12V
220 180

Theory:
Kirchhoff’s Current Law (KCL):
The sum of the currents entering a node is equal to the sum of the currents leaving the node. It
states that the algebraic sum of currents entering a node (or a closed boundary) is zero.

Kirchhoff’s Voltage Law (KVL):

It states that the algebraic sum of all voltages around a closed path(or
loop) is zero.

24
Practical Circuit and output:

SNO: Mesh Current

I1 25

I2 4

I3 18

Mesh Analysis:
Mesh 1:
330I1 + 220I1 - 220I2 = 12

Mesh 2:
220I2 - 220I1 + 270I2 + 180I2 – 180I3 = 0

Mesh 3:
180I3 - 180I2 + 390I3 = 10

Manual Calculations:

S.No Mesh Current

I1 23.5

I2 3.2

I3 16.5

25
Practical Circuit and output:

S.No NODE Voltage

V1 4.2

V2 3.6

Node Analysis:

( - 12 - V1)/330 + (V1 - V2)/270 + V1/220 = 0

( - V1 - V2)/270 - (10 - V2)/390 + V2/180 = 0

Manual Calculations:

S.No NODE
Voltage

V1 4.5

V2 3.5

Procedure:
1. Make the circuit connections according to the circuit diagram given above.
2. Find the values of current and voltage through each mesh.
3. Perform the Mesh and Nodal analysis of the above meshes.

26
Result:
Mesh Analysis:
Manual Calculations Practical output

S.No Mesh S.No Mesh Current

Current

I1 23.5 I1 25

I2 3.2 I2 4

I3 16.5 I3 18

Node Voltage Analysis:

Manual Calculations Practical output

S.No NODE S.No NODE

Voltage Voltage
V1 4.5 V1 4.2

V2 3.5 V2 3.6

Inference:
The values of pratical and manual output of Current and Voltage are
very similar.

Reg. No:19BCT0210 Name: HARSH GULATI Date: 24/7/19

27
Ex. No.: 2 Date: 31-07-19
Line and Load Regulation using zener diode

Aim:
To find the breakdown voltage of a zener diode

Apparatus Required

S. No. Name of the apparatus Range / Type Quantity

1 Zener diode - 1 No.
2 RPS 0 – 30 V 1 No.
3 Ammeter 0 – 10 A 2 No.
4 Voltmeter 0 – 30 V 2 No.
5 Resistor 330 Ω 1 No.
6 Resistor 1 kΩ 1 No.
7 Breadboard - 1 No.
8 Wires - Few

Theory

Zener diodes are generally used in the reverse bias mode. You have seen already in one of your previous
experiments that the zener diode has a region of almost a constant voltage in its reverse bias
characteristics, regardless of the current flowing through the diode. This voltage across the diode (zener
Voltage, Vz) remains nearly constant even with large changes in current through the diode caused by
variations in the supply voltage or load. This ability to control itself can be used to great effect to regulate
or stabilize a voltage source against supply or load variations. The zener diode maintains a constant
output voltage until the diode current falls below the minimum Iz value in the reverse breakdown region,
which means the supply voltage, VS, must be much greater than Vz for a successful breakdown operation.
When no load resistance, RL, is connected to the circuit, no load current (IL = 0), is drawn and all the
circuit current passes through the zener diode which dissipates its maximum power. So, a suitable current
limiting resistor, (RS) is always used in series to limit the zener current to less than its maximum rating
under this "no- load" condition.
From the previous experiments on rectifiers, you know that the d.c. output voltage from the half or full-
wave rectifiers contains ripples superimposed on the d.c. voltage and that the average output voltage
changes with load. As shown in the circuit diagram, a more stable reference voltage can be produced by
connecting a simple zener regulator circuit across the output of the rectifier. The breakdown condition of
the zener can be confirmed by calculating the Thevenin voltage, VTH, facing the diode is given as:

28
This is the voltage that exists when the zener is disconnected from the circuit. Thus, V TH has to be greater
than the zener voltage to facilitate breakdown. Now, under this breakdown condition, irrespective of the
load resistance value, the current through the current limiting resistor, IS, is given by

The output voltage across the load resistor, VL, is ideally equal to the zener voltage and the load
current, IL, can be calculated using Ohm’s law:

Thus the zener current, IZ, is

Now that you have constructed a basic power supply, its quality depends on its load and line regulation
characteristics as defined below.
Load Regulation: It indicates how much the load voltage varies when the load current changes.
Quantitatively, it is defined as:

where VNL = load voltage with no load current (IL = 0) and VFL = load voltage with full load current. The
smaller the regulation, the better is the power supply.
Line Regulation: It indicates how much the load voltage varies when the input line voltage changes.
Quantitatively, it is defined as:

where VHL = load voltage with high input line voltage, and VLL = load voltage with low input line voltage.
As with load regulation, the smaller the regulation, the better is the power supply.

Procedure:
1. Use the full-wave rectifier circuit configured in your previous lab (with capacitor filter minus the load).
Connect the primary of a variable transformer to a.c. mains and the secondary as the
a.c. source for the rectifier circuit. This will facilitate to change the magnitude of input voltage to rectifier
by choosing different secondary terminals. You can use only those secondary terminals whose voltage is
much more than the zener breakdown voltage you are using.
2. Complete the rest part of the circuit as shown in the circuit diagram. Note down all the values of the
components being used including the zener breakdown voltage.
3. Keeping input voltage suitably fixed, use different values of RL and measure both the output
d.c. voltage and current using multimeter (in d.c. mode). Measure input unregulated d.c. voltage across
capacitor. Calculate VTH before each measurement and ensure that the zener is operating in breakdown
region.
4. Similarly, keeping RL fixed, vary the input voltage and measure again the output d.c. voltage, current
and input unregulated d.c. voltage across capacitor. Calculate VTH before each measurement.

29
Observations:
Specifications of zener diode:
Breakdown voltage = 5.5 V
RS = 330Ω
Circuit Diagram
330

0-15V 0-15V

Zener Diode
1k
V

Table (i) Line Regulation: Load Resistor = 1000 Ω

Input DC Voltage Output DC Voltage

S.No
(Vi) in Volts (VL) in Volts
1 2 1.5
2 4 3
3 6 4.5
4 8 5.5
5 10 5.5
6 12 5.5

Table (ii) Load Regulation: Input d.c. voltage = 12V

Load Resistance in Output DC Voltage
S.No
ohms (VL) in Volts
1 1000 5.5
2 2200 5.5
3 10000 5.5

Result
The breakdown voltage is 5.5 V .

Reg. No:19BCT0210 Name: HARSH GULATI Date: 31/7/19

30
Ex. No.:3 Date: 7-AUG-2019
Verification of Thevenin’s Theorem

Aim: T0 VERIFY THEVENIN’s THEOREM

Circuit Diagram
R1 R2

120 470

R3
V1
10V
100

R4 R5

330 220

Apparatus/Tool required:
Sl. Components Range Quantity
N Name
o.
1 Resister 120Ω, 330Ω, 470Ω,
Each 1 No.
220Ω, 100Ω
2 Ammeter 0-50mA (DC) 1 No.
3 Voltmeter 0-10V (DC) 1 No.
4 RPS 0-32 V (DC) 1 No.
5 Connecting - Few
Wires
6 Bread Board - 1 No.

Theory

31
Statement:
Thevenin’s Theorem,states that a linear two-terminal circuit can be replaced by an
equivalent circuit consisting of a voltage source VTh in series with a resistor RTh,
where VTh is the open-circuit voltage at the terminals and RTh is the input or
equivalent resistance at the terminals when the independent sources are turned off.

Hardware Circuit:
To Find VTH:

Reading: VTH (Volts)

THE VALUE OF Vth OBSERVED IN VOLTMETER IS 4.14V

To Find RTH:

32
Reading:
Applied Ammeter RTH = V/I ohms
Voltage Reading
2 11 181

6 27 222

10 44 222

Average of
RTH = _208 Ohms.

To Find IL :
Reading: THE VALUE I IS (Vth/Rth) = 0.132 A

Manual Calculations:
To Find RTH:

33
Rth=120||330+470||220
=88+149.855
=237.855ohms

To Find VTH:
I=voltage/r
=10/237.855
=0.037A

I1=0.0367*650/1140 ……(1)
=0.0222A

I2=0.0367*650/1140………….(2)
=0.0144A

THEREFORE FROM EQUATION 1 AND 2

(10-Va)/120 = I1=0.222 Va=7.334V

(10-Vb)/470 = I2=0.0149 Vb=3.184V

Vth=Va-Vb=4.145

To Find IL:
IL= Vth/Rth =4.145/(237.855+100) = 0.0125A

34
Result:
Thevenin’s Theorem

Manual Calculations Practical Output

Vth 4.14V 4.2V
Rth 237.855 ohms 208 ohms
I 0.0125A 0.132A
Inference:
THEVENIN’s THEORM IS VERIFIED

Reg. No:19BCT0210 Name: HARSH GULATI Date: 7-AUG-19

35
Ex. No.:4 Date: 14/8/19
Lamp Dimmer Circuit (Darlington Pair)

Aim
To design a circuit to vary the intensity of the lamp using darlington pair of BJT

Apparatus Required
S. No. Name of the apparatus Range / Type Quantity
1 BJT BC547 2 Nos.
2 RPS 0 – 30 V 1 No.
3 Diode 1N4007 1 No.
4 Potentiometer 1 kΩ 1 No.
5 LED - 1 No.
6 Breadboard - 1 No.
7 Wires - Few

Theory:
A Darlington pair is two transistors that act as a single transistor but with a much higher current gain. This
mean that a tiny amount of current from a sensor, micro-controller or similar can be used to drive a larger load.
An example circuit is shown below:

The Darlington Pair can be made from two transistors as shown in the diagram or Darlington Pair transistors
are available where the two transistors are contained within the same package.
Transistors have a characteristic called current gain. This is referred to as its hFE. The amount of
current that can pass through the load in the circuit above when the transistor is turned on is:

36
Load current = input current x transistor gain (hFE)

The current gain varies for different transistors and can be looked up in the data sheet for the device.
For a normal transistor this would typically be about 100. This would mean that the current available
to drive the load would be 100 times larger than the input to the transistor. In some applications the
amount of input current available to switch on a transistor is very low. This may mean that a single
transistor may not be able to pass sufficient current required by the load. As stated earlier this equals
the input current x the gain of the transistor (hFE). If it is not possible to increase the input current
then the gain of the transistor will need to be increased. This can be achieved by using a Darlington
Pair.

A Darlington Pair acts as one transistor but with a current gain that equals:

Total current gain (hFE total) = current gain of transistor 1 (hFE t1) x current gain of transistor 2 (hFE
t2)

So for example if you had two transistors with a current gain (hFE) = 100:

(hFE total) = 100 x 100

(hFE total) = 10,000

You can see that this gives a vastly increased current gain when compared to a single transistor.
Therefore this will allow a very low input current to switch a much bigger load current.

Normally to turn on a transistor the base input voltage of the transistor will need to be greater than
0.7V. As two transistors are used in a Darlington Pair this value is doubled. Therefore the base voltage
will need to be greater than 0.7V x 2 = 1.4V.IABLE

It is also worth noting that the voltage drop across collector and emitter pins of the Darlington Pair
when the turn on will be around 0.9V Therefore if the supply voltage is 5V (as above) the voltage
across the load will be will be around 4.1V (5V – 0.9V)

Circuit:

DC BJT
1 KΩ Potentiometer

BJT

Diode Lamp

Result: THE LED WAS DAMPING WHEN WE CHANGE THE

37
 VARIABLE VOLTAGE.

(DATE-14/8/19)
DARLINGTON PAIR CIRCUIT AS PERFORMED IN LAB

Reg. No:19BCT0210 Name: HARSH GULATI Date: 14-AUG-19

38
Ex. No.:5 Date: 28-AUG-2019
Design of Half Adder Circuit using gates

Aim: TO VERIFY THE TRUTH TABLE OF THE FOLLOWING HALF ADDER CIRCUIT.

Apparatus Required:
S. No. Name of the apparatus Range / Type Quantity
1 7486 gate - 1 No.
2 7408 gate - 1 No.
3 LED - 2 Nos.
4 RPS 0 – 15 V 1 No.
5 Resistor 330 Ω 2 Nos.
6 Breadboard - 1 No.
7 Wires - Few

Circuit Diagram:

U1A
1 330 LED
7486 3
2

A
U2A
1 330 LED
7408 3

B 2

Theory:

A half adder is a type of adder, an electronic circuit that performs the addition of numbers. The
half adder is able to add two single binary digits and provide the output plus a carry value. It
has two inputs, called A and B, and two outputs S (sum) and C (carry). The common
representation uses a XOR logic gate and an AND logic gate.

39
Truth Table

A B S=AB C=A.B

0 0 0 0

0 1 1 0

1 0 1 0

1 1 0 1

Observation:
Half adder is a combinational arithmetic circuit that adds two numbers and produces a sum bit (S) and
carry bit (C) as the output. If A and B are the input bits, then sum bit (S) is the X-OR of A and B and the
carry bit (C) will be the AND of A and B. From this it is clear that a half adder circuit can be easily
constructed using one X-OR gate and one AND gate. Half adder is the simplest of all adder circuit, but it has
a major disadvantage. The half adder can add only two input bits (A and B) and has nothing to do with the
carry if there is any in the input. So if the input to a half adder have a carry, then it will be neglected it and
adds only the A and B bits.

Procedure:
We have seen the Block Diagram of Half Adder circuit above with two inputs A,B and two outputs-
Sum, Carry Out.
We can make this circuit using two basic gates
2-input Exclusive-OR Gate or Ex-OR Gate
2-input AND Gate.

So we connect +5V of power to pin 14 on each of the logic chips and we connect pin 7 of the logic
chips to ground. This establishes sufficient power to the chips.

We inputs to the 2 gates of each of the logic chips are pins 1 and 2. We tie the 2 logic pin 1s
together and the 2 logic pin 2s togethers.

40
We then put in a pull-down resistor to each of the inputs.With pull-down resistors, when the
pushbuttons are unpressed, the inputs will be at a logic level of 0. When the pushbuttons are
pressed down, the inputs go HIGH and now have a logic level of 1.

Result: HENCE THE TRUTH TABLE IS VERIFIED

DATE-28-AUG-2019
CIRCUIT OF HALF ADDER CIRCUIT PERFORMED IN LAB

Reg. No:19BCT0210 Name: HARSH GULATI Date: 28-AUG-19

41