BJT concepts and circuits : simple

biasing methods

EE 112
SPRING 2017
 PART B : DC Biasing Methods

OVERVIEW
• Operation region and application
• BJT as a Switch
• Biasing
• Operating point
• DC Biasing Circuits
– Fixed-bias circuit
– Emitter-stabilized bias circuit
– Voltage divider bias circuit
– DC bias with voltage feedback
 Operation region and application

• BJT can operate as a switch

• BJT can operate as an amplifier

ume.gatech.edu/mechatronics_course/Transistor_S06.pp
 BJT as a Switch
• Vin(Low ) < 0.7 V

• Junction EB not forward biased

• Cutoff region
ume.gatech.edu/mechatronics_course/Transistor_S06.pp

• No current flows
• Vout = VCE = VCC
•Vout = High

• Vin(High)
• BE junction forward biased (VBE= 0.7V)
• Saturation region
• VCE small (~0.2 V for saturated BJT)
• Vout = small
• IB = (Vin-VB)/RB
•Vout = Low
 Biasing

• Biasing: The DC voltages applied to a transistor in order to turn it on so that it can

amplify the AC signal

• VCE is at maximum and IC is

at minimum (ICmax=ICEO) in
the cutoff region. IC is at
maximum and VCE is at
minimum (VCE max = VCEsat
= VCEO) in the saturation
region. The transistor
operates in the active
region between saturation
and cutoff.

Electronic Devices and circuit Theory by Robert Boylestad and Louis Nashelsky
 Operating point

• The DC input establishes an operating or quiescent point called the Q-

point

• The operating point defines where the

transistor will operate on its characteristics
curves under dc conditions

• For linear (minimum distortion)

amplification, the dc operating
point should not be too close to
the maximum power, voltage, or
current rating and should avoid
the regions of saturation and
cutoff

Electronic Devices and circuit Theory by Robert Boylestad and Louis Nashelsky
 DC Biasing Circuits

• Fixed-bias circuit
• Emitter-stabilized bias circuit
• Voltage divider bias circuit
• DC bias with voltage feedback
 • In the dc equivalent circuit of the fixed bias
circuit the capacitor is replaced with an
Fixed-Bias circuit

open-circuit
Electronic Devices and circuit Theory by Robert Boylestad and Louis Nashelsky
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Electronic Devices and circuit Theory by Robert Boylestad and Louis Nashelsky
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 (b) approximation
Saturation region
(a) actual
Saturation Electronic Devices and circuit Theory by Robert Boylestad and Louis Nashelsky
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 The variables IC and VCE are related by the equation:
Load Line Analysis

VCE  VCC  I C RC
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 Load Line Analysis

The end points of the load line are:

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The Q-point is the operating point
• where the value of RB sets the value of IB
• that sets the values of VCE and IC
 Circuit values affect the Q - Point

(a) Movement of the Q-point with increasing level

Electronic Devices and circuit Theory by Robert Boylestad and Louis Nashelsky

of IB
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(b) Effect of lower values of VCC on the load line

the Q-point

(c) Effect of an increasing level of RC on the load line the Q-point

Emitter-Stabilized Bias Circuit Electronic Devices and circuit Theory by Robert Boylestad and Louis Nashelsky
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 Electronic Devices and circuit Theory by Robert Boylestad and Louis Nashelsky
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Collector-Emitter Loop
Base-Emitter Loop
Load-line Analysis
Saturation Level Electronic Devices and circuit Theory by Robert Boylestad and Louis Nashelsky
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 Electronic Devices and circuit Theory by Robert Boylestad and Louis Nashelsky
Voltage Divider Bias

• This is a very stable bias

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circuit.

• The currents and voltages

are nearly independent of
any variations in .
 Electronic Devices and circuit Theory by Robert Boylestad and Louis Nashelsky
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Exact Analysis
 R2VCC
RTh  R1 || R2 ETh  VR 2 
R1  R2

Electronic Devices and circuit Theory by Robert Boylestad and Louis Nashelsky
Applying Kirchhoff’s voltage law in the clockwise direction in the Thevenin
network,

ETh  I B RTh  VBE  I E RE  0

ETh VBE
IB 
RTh  ( 1)RE (Substituting IE = (+1)IB)

VCE  VCC  I C ( RC  RE )
 Electronic Devices and circuit Theory by Robert Boylestad and Louis Nashelsky
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Approximate Analysis
 Saturation Level Load-line Analysis

Electronic Devices and circuit Theory by Robert Boylestad and Louis Nashelsky
V CC Saturation
I Csat  I Cmax 
RC  RE
VCC
IC 
RC  RE
VCE  0V

Cutoff

VCE  VCC
I C  0mA
 DC Bias with Voltage Feedback

• Another way to improve

the stability of a bias
circuit is to add a
feedback path from
collector to base

• In this bias circuit the Q-

point is only slightly
dependent on the
transistor beta, 

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Electronic Devices and circuit Theory by Robert Boylestad and Louis Nashelsky
 The Base-Emitter Loop
From Kirchhoff’s voltage law:

VCC – I C R C – I B R B – VBE – I E R E  0

Where IB << IC
I'  I  I  I
C C B C

Knowing IC = IB and IE  IC, the loop equation

becomes

VCC –  I B R C  I B R B  VBE   I B R E  0

Solving for IB
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VCC  VBE Electronic Devices and circuit Theory by Robert Boylestad and Louis Nashelsky
IB 
R B  (R C  R E )
 Collector-Emitter Loop

Electronic Devices and circuit Theory by Robert Boylestad and Louis Nashelsky
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• Saturation Level and Load Line Analysis of Base-Emitter bias is similar
as that of Voltage Divider Bias