AN-1006

APPLICATION NOTE
One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com

Using the EVAL-ADUSB2EBZ

by Brett Gildersleeve

INTRODUCTION
The EVAL-ADUSB2EBZ features USB-to-I2C and SPI conversion.
It is compatible with 1.8 V and 3.3 V target devices and allows
for SigmaStudio™ integration for most SigmaDSP® processors.
Its on-board power regulators are capable of supplying the
target board, and it features a standard Aardvark-compatible
programming header. The EVAL-UDSUB2EBZ provides SPI
control of up to five slave devices with a low profile surface-
mount USB miniature Type B connector, and it allows for plug-
and-play operation.
The EVAL-ADUSB2EBZ is ideal for downloading code
and register settings to SigmaDSP processors and codecs
with SigmaStudio. It can also be used for real-time tuning
of SigmaDSP production units with SigmaStudio.
GENERAL DESCRIPTION
The EVAL-ADUSB2EBZ, also known as the USBi, is a standalone
communications interface and programmer for SigmaDSPsystems.
It translates USB control commands from SigmaStudio to the I2C
and SPI communications protocols. The USBi is powered over
the USB cable; therefore, no external power supply is required.
The ribbon cable and 10-pin header form a bridge to the target
board to connect the communications signals to the target IC.
The ribbon cable also carries 5 V power from the USB hub, which
can be used to power the target board if desired.
The on-board regulators enable both 1.8 V and 3.3 V IOVDD
operation, allowing for increased compatibility with target
devices.
Up to five slave devices can be controlled by the USBi simulta-
neously. To control multiple SPI devices, additional latch signals
are provided, although they are not connected to the ribbon cable.
The USBi can be used to control SigmaDSP systems in real time
via SigmaStudio, and is capable of programming an EEPROM
in self-boot systems. It is an ideal solution for in-circuit program-
ming and tuning of prototype systems.
The USBi only supports USB 2.0 interfaces; the USBi will not
work with PCs that only support USB Version 1.0 and USB
Version 1.1.

FUNCTIONAL BLOCK DIAGRAM

EVAL-ADUSB2 (USBi)
1.8V/3.3V
POWER SELECTOR
REGULATOR SWITCH
TARGET
HOST PC BOARD

USB CYPRESS PROGRAMMING SIGMA

SigmaStudio CONNECTOR USB INTERFACE HEADER DSP

EEPROM
PROGRAMMING EEPROM
08093-001

HEADER

Figure 1.

Rev. A | Page 1 of 16
AN-1006 Application Note

TABLE OF CONTENTS
Introduction ...................................................................................... 1  USB Connector ..............................................................................7 

General Description ......................................................................... 1  Power Regulator ............................................................................7 

Functional Block Diagram .............................................................. 1  Cypress USB Interface ..................................................................8 

Using the USB Interface with SigmaStudio................................... 3  Crystal Oscillator Schematic........................................................8 

Installing the Drivers ................................................................... 3  LEDs ................................................................................................9 

Adding the USBi to a SigmaStudio Project ............................... 4  EEPROM ........................................................................................9 

Configuring the USBi to Communicate with an IC ................ 4  Target Board Power Switch ..........................................................9 

Configuring the USBi to Communicate with Multiple ICs .... 4  Target Board Programming Header ...........................................9 

Controlling the USBi.................................................................... 5  Evaluation Board Schematics and Artwork ................................ 10 

Monitoring the USBi .................................................................... 6  Schematics ................................................................................... 10 

Using the USBi to Program a Self-Boot EEPROM .................. 6  Board Layout ............................................................................... 12 

Warning ......................................................................................... 6  Bill of Materials ............................................................................... 13 

Circuit Schematics ............................................................................ 7 

REVISION HISTORY
4/10—Rev. 0 to Rev. A
Changes to General Description Section .......................................1
Added Warning Section................................................................... 6

5/09—Revision 0: Initial Version

Rev. A | Page 2 of 16
Application Note AN-1006

USING THE USB INTERFACE WITH SIGMASTUDIO

INSTALLING THE DRIVERS Click Search for the best driver in these locations, then select
SigmaStudio must be installed to use the USBi. Once Include this location in the search. Click Browse to find the
SigmaStudio has been properly installed, connect the USBi to SigmaStudio 3.0\USB drivers directory.
an available USB port with the included USB cable. At this
point, Windows® XP recognizes the device and prompts the
user to install drivers.

08093-002
Figure 2. Found New Hardware Notification

Select the Install from a list or specific location (Advanced)

option and click Next >.

08093-004
Figure 4. Windows Found New Hardware Wizard—Search and
Installation Options

When the warning about Windows Logo testing appears on the

screen, click Continue Anyway.
08093-003

Figure 3. Found New Hardware Wizard—Installation

08093-005

Figure 5. Windows Logo Testing Warning

Rev. A | Page 3 of 16
AN-1006 Application Note
ADDING THE USBi TO A SIGMASTUDIO PROJECT
To use the USBi in conjunction with SigmaStudio, first select it
in the Communication Channels subsection of the toolbox in
the Hardware Configuration tab, and add it to the project space.

08093-006
Figure 6. Adding the USBi Communication Channel

08093-009
If SigmaStudio cannot detect the USBi on the USB port of the Figure 9. Connecting the USBi to an IC
computer, then the background of the USB label will be red.
This may happen when the USBi is not connected or when the To change the communication mode and channel, click the
drivers are incorrectly installed. drop-down box and select the appropriate mode and channel
from the list.
08093-007

08093-010
Figure 7. USBi Not Detected by SigmaStudio

If SigmaStudio detects the USBi on the USB port of the computer, Figure 10. Selecting the Communications Mode and Channel
the background of the USB label changes to orange.
CONFIGURING THE USBi TO COMMUNICATE WITH
MULTIPLE ICS
The USBi can communicate with up to five ICs simultaneously.
To communicate with more than one IC, add another IC to the
project and connect it to the next available pin of the USBi.

Multiple Address Operation with I2C

The USBi can support up to four identical devices on the same
bus if the I2C address pins of the target devices are indepen-
08093-008

dently set to four different addresses, matching the addresses in

Figure 8. USBi Detected by SigmaStudio the drop-down box in the Hardware Configuration tab of
SigmaStudio.
CONFIGURING THE USBi TO COMMUNICATE WITH
AN IC
To use the USBi to communicate with the target IC, connect it
by click-dragging a wire between the blue pin of the USBi and
the green pin of the IC. The corresponding drop-down box of
the USBi automatically fills with the default mode and channel
for that IC.
08093-011

Figure 11. Multiple Address Operation with I2C

Rev. A | Page 4 of 16
Application Note
Multiple Address Operation with SPI
The USBi can support up to two identical devices on the same
SPI latch if the SPI address pins of the target devices are indepen-
dently set to two different addresses, matching the addresses in
the drop-down box in the Hardware Configuration tab of
SigmaStudio.
AN-1006
Combined Multiple Latch and Multiple Address
Operation with SPI
A combination of multiple latch and multiple address schemes
can be used, but the total number of devices cannot exceed five.
CONTROLLING THE USBi
The USBi has several functions for controlling the target hardware.
The control options are accessed in SigmaStudio by right-clicking
on the USB Interface in the Hardware Configuration tab.

08093-015
08093-012
Figure 15. USBi Control Menu
Figure 12. Multiple Address Operation with SPI
Capture Output Data
Multiple Latch Operation with SPI
This option accesses the Capture Window, which displays a log
The USBi can support devices on five different SPI latches. of all communication between the PC and the target IC
When multiple latches are used, the additional SPI latch signals (see Figure 17).
from the USBi that are not connected to the ribbon cable need
to be manually wired to the target. Device Power On/Off
This option switches the line that supplies power to the target
board. By default, the device power is on.

Device Enable/Disable
For supported ICs, selecting this option switches the device to
low power mode.

Reset USB Interface

This function performs a software reset of the USB driver, and
08093-013

causes the Cypress USB microcontroller to reload its firmware.

Figure 13. Multiple Latch Operation with SPI

The locations of extended SPI latch signals are shown in Figure 14.

0x01
0x02 0x04

0x03 0x05

Q1
08093-014

R12 R11

Figure 14. Extended SPI Latch Signal Pinout (Bottom View of Board)

Rev. A | Page 5 of 16
AN-1006
MONITORING THE USBi
Using the Capture Window, it is possible to view all outgoing
communications transfers from the PC to the target IC. For
each write, the write mode, time of write, cell name (if applica-
ble), parameter name, address, value, data (in decimal and
hexadecimal), and byte length are shown.
For block writes where more than one memory location is
written, only the first location is shown. The expand/collapse
button in the leftmost column allows the user to view the full
data write.
Application Note
WARNING
The USBi has an EEPROM on the I2C bus at Address 0x51, which
it uses to indicate its Vendor ID and Product ID to the PC, as
well as boot its internal program. You should avoid having any
other EEPROMs in your system design at this address. This
EEPROM is not write-protected; therefore, if you attempt to
write to Address 0x51, you will overwrite the USBi's onboard
EEPROM, and the USBi will cease to function. The USBi cannot be
reprogrammed without returning the board to Analog Devices.
Most EEPROMs are set to Address 0x51 by setting its pins A0 = 1
and A1 = A2 = 0.

USING THE USBi TO PROGRAM A SELF-BOOT

EEPROM
After compiling a project, the registers and RAM contents
can be written to a target EEPROM for self-boot. To use this
functionality, an EEPROM IC must be connected to the USBi
in the Hardware Configuration window. After verifying that
the EEPROM write protect pin is disabled on the target board,
right-click the target IC (SigmaDSP), and select Write Latest
Compilation to E2PROM.
08093-017

Figure 16. Writing to the Self-Boot EEPROM

08093-016

Figure 17. Output Capture Window

Rev. A | Page 6 of 16
Application Note AN-1006

CIRCUIT SCHEMATICS
USB CONNECTOR POWER REGULATOR
The connection between the host PC and the Cypress USB The Cypress USB Interface I/O ports are capable of operating in
interface device is via a standard USB cable that carries D+ and both 1.8 V and 3.3 V modes, depending on the target device in
D− signals for data communications, a 5 V power supply, and the system. Two regulators, one for 5 V to 3.3 V regulation and
ground. The D+ and D− lines are a one-wire communication the other for 5 V to 1.8 V regulation, run simultaneously when
interface carried by half-duplex differential signals on a twisted the board is powered. A switch (S1) is provided to easily switch
pair. The clock is embedded in the data using the nonreturn-to- the IOVDD supply between the two regulators. LED D4 provides
zero inverted (NRZI) line code. These signal lines connect visual feedback that the board is being supplied with 5 V power
directly to pins on the Cypress USB interface. from the PC USB port.

A surface-mounted USB miniature Type B jack was selected for The position of switch S1 should not be changed when the
its low profile and increasing ubiquity in consumer electronics. board is connected to the USB bus.
5V0DD

VCC 1
J3 D– 2 DMINUS
USB-MINI-B-SMD D+ 3 DPLUS

GND 4
08093-018

Figure 18. USB Connector Schematic

5V0DD

3V3DD

ADP1711AUJZ-3.3-R7
1 IN OUT 5
3 EN BYP 4
C21 GND C19 +
1.0uF C14
2 U8 1.0uF 10uF
C18
10nF
D4

IOVDD
1V8DD 3V3DD

Red Diffused 1V8DD

ADP1711AUJZ-1.8-R7 S1
3
1 IN OUT 5 2
3 4 1
EN BYP
SPDT
R10 GND C17 + C13
475R + C22 C20 2 U7 1.0uF 10uF
15uF 1.0uF C16 TP1
10nF
08093-019

Figure 19. Power Regulator Schematic

Rev. A | Page 7 of 16
AN-1006 Application Note

22pF
C11
CYPRESS USB INTERFACE
The Cypress USB interface is the core of the system, including
all of the necessary functionality to convert USB commands
24.000MHz
into corresponding I2C or SPI read/write transfers, and acts as a Y1
FIFO to route data between the host PC and the target device.

22pF
C27

08093-021
CRYSTAL OSCILLATOR SCHEMATIC
The Cypress USB interface is its own clock master, and the board
Figure 20. Crystal Oscillator Schematic
includes a crystal oscillator circuit with a 24 MHz piezoelectric
crystal resonator to provide stability to the oscillator circuit.
The crystal resonator is driven in parallel by the XTALOUT
and XTALIN pins of the Cypress USB interface.
3DD3V IOVDD 1DD8V
IOVDD

Local to 68053

C9 + C15 C4 C5
0.10uF C10 C12 15uF 0.10uF
0.10uF 0.10uF 0.10uF

IOVDD
1G
AVCC 2D
AVCC 1D

VCC_IO 5A
VCC_IO 5B

5C
VCC_IO 7E
VCC_IO 8E

10k0
VCC_A

U3 10k0
VCC_D

R1 R2

DPLUS 2E DPLUS PA0/INT0 8G CDATA

DMINUS 1E DMINUS PA1/INT1 6G COUT CLATCH1
PA2/SLOE 8F
PA3/WU2 7F CLATCH2
3F 6F
SCL 3G SCL PA4/FIFOADR0 8C CLATCH3
SDA SDA PA5/FIFOADR1 7C CLATCH4
PA6/PKTEND 6C CLATCH5
1A PA7/FLAGD/SLCS CCLK
1B RDY0/SLRD
RDY1/SLWR
R6 475R
3H
7H PB0/FD[0] 4F
7G CTL0/FLAGA PB1/FD[1] 4H BRD_RESET
8H CTL1/FLAGB PB2/FD[2] 4G
CTL2/FLAGC PB3/FD[3] 5H
PB4/FD[4] 5G USB_PWR_ON
PB5/FD[5] 5F
PB6/FD[6]
22pF

6H
C11

R15 PB7/FD[7]
2B
USB_CLK 2G CLKOUT
49R9 IFCLK
3V3DD
8A
2C XTALOUT PD0/FD[8] 7A
1C XTALIN PD1/FD[9] 6B
PD2/FD[10] 6A
IOVDD PD3/FD[11] 3B
PD4/FD[12] 3A

YELLOW DIFFUSED

YELLOW DIFFUSED
24.000MHz 7B
WAKEUP PD5/FD[13] 3C

BLUE CLEAR
Y1 R5 PD6/FD[14] 2A
8B
RESET PD7/FD[15]
D1

D2

D3
100k CYPRESS_CY7C68053_56BAXI
22pF

1F AGND
2F AGND
C27

1H GND
2H GND
4A GND
4B GND

GND
GND
GND

C1
1.0uF
4C
7D
8D

R7

475R R8

3V3DD 475R R9
475R

IOVDD
1

GND
5
VCCA

2 4
GND
VCCY

A Y
3

IOVDD 3V3DD U4
FXLP34P5X
IOVDD 3V3DD
1
5

C6 C8
VCCA

2 4
3 GND

0.10uF 0.10uF
VCCY

A Y

U5
FXLP34P5X
IOVDD
3V3DD
1
5
VCCA

2 4
GND
VCCY

A Y
3

U6
08093-020

FXLP34P5X

Figure 21. Cypress USB Interface Schematic

Rev. A | Page 8 of 16
Application Note AN-1006
IOVDD

LEDS

0.10uF
The LEDs provide feedback to the user about the status of the

C3
10k0 10k0
R3 R4
Cypress USB microcontroller.
3V3DD J2
U1
1 A0 8 1
VCC 2
2 A1 7 3
WP
3 A2 SCL 6 SCL
4 GND SDA 5 SDA

BLUE CLEAR
YELLOW CLEAR

YELLOW CLEAR
D1

D2

D3

08093-023
24AA256-I/ST

5V0DD
Figure 23. EEPROM Schematic
R7

R8

R9
3V3DD
475R

475R

475R
IOVDD
TARGET BOARD POWER SWITCH
VCCA 1
VCCY 5

D4
3 GND

2 4
A Y The USBi is capable of supplying power to the target board after
U4
RED DIFFUSED the Cypress USB microcontroller has finished its boot up process.
FXLP34P5X
IOVDD 3V3DD
R10
The USB_PWR_ON signal connects to the base of Q2 and turns
VCCA 1

on both transistors when driven high.

VCCY 5

TO U3 475R
3 GND

2 4
A Y

U5

IOVDD
FXLP34P5X This circuit also enables a software-controlled target reset from
3V3DD
SigmaStudio.
VCCA 1
VCCY 5
3 GND

2 4
A Y
C
3E 4
U6 5V0DD C2 5V0DD_USB
08093-022

FXLP34P5X FZT705TA
Q1
B 1
R12

Figure 22. LEDs Schematic 100k

R11
2k00
Table 1. LED Functions
C3
Reference R13
1 Q2
USB_PWR_ON MMBT3904LT1G
Designator Color Functionality 1k50 B
2
E
D1 Yellow I2C mode is active 10k0
R14
D2 Blue GPIO LED, for firmware debug purposes
D3 Yellow SPI mode is active
D4 Red 5 V power being is supplied over the USB bus

08093-024
EEPROM
Figure 24. Target Power Switch Schematic
The EEPROM is an important system element that identifies
the board to the host PC and stores the firmware for the TARGET BOARD PROGRAMMING HEADER
Cypress USB Interface. The EEPROM is programmed during
To properly boot the Cypress USB microcontroller from the
manufacturing via the J2 connector.
EEPROM, it is necessary to remove all other devices from the
I2C bus. The ADG721BRMZ analog switch remains open,
isolating the I2C bus from the target, until the boot process has
completed.
5V0DD_USB

ADG721BRMZ
ADG721BRMZ J1
U2-A
U2-B 1 2
SCL CLATCH2 3 4 CLATCH3
S1 D1 5 6 USB_CLK
CTRL SDA 7 8
S2 D2 COUT BRD_RESET
USB_PWR_ON CCLK 9 10
IN1 CTRL CDATA
USB_PWR_ON CLATCH1 11 12
IN2 13 14
CLATCH4 CLATCH5
2X5 CUSTOM RIBBON
3V3DD

C2
0.10uF

LOCAL FOR ADG721

08093-025

Figure 25. Target Board Programming Header Schematic

Rev. A | Page 9 of 16
 AN-1006

3DD3V IOVDD 1DD8V

IOVDD
SCHEMATICS
LOCAL TO 68053

IOVDD

C9 + C15 C4 C5
0.10uF C10 C12 15uF 0.10uF 0.10uF
0.10uF 0.10uF

C3
0.10uF
10k0 10k0
R3 R4
IOVDD

J2
U1
1 8 1
A0 VCC 2

2D
1D
5A
5B
7E
8E
5C
1G
2 7 3
A1 WP
U3 10k0 10k0
R1 3 6 SCL
R2 A2 SCL

AVCC
AVCC
VCC_A

VCC_D

VCC_IO
VCC_IO
VCC_IO
VCC_IO
4 GND SDA 5 SDA

DPLUS 2E 8G CDATA
DPLUS PA0/INT0
DMINUS 1E 6G COUT CLATCH1
DMINUS PA1/INT1 24AA256-I/ST
8F
PA2/SLOE
7F CLATCH2
3F PA3/WU2
6F CLATCH3
SCL 3G SCL PA4/FIFOADR0
8C CLATCH4
SDA SDA PA5/FIFOADR1
7C CLATCH5
PA6/PKTEND
6C CCLK
1A PA7/FLAGD/SLCS
RDY0/SLRD
1B
RDY1/SLWR
R6 475R
C

3H
7H PB0/FD[0] 4F 3 4
E

PB1/FD[1] 5V0DD 5V0DD_USB

7G CTL0/FLAGA 4H BRD_RESET
8H CTL1/FLAGB PB2/FD[2] 4G 2
C

CTL2/FLAGC PB3/FD[3] 5H
PB4/FD[4] USB_PWR_ON FZT705TA
5G Q1
PB5/FD[5]
B

5F 1
PB6/FD[6]
R15 6H
PB7/FD[7] R12
2B

C11
22pF
USB_CLK CLKOUT
2G
49R9 IFCLK 100k
3V3DD
8A
PD0/FD[8]
2C 7A
XTALOUT PD1/FD[9]
1C 6B
R11

XTALIN PD2/FD[10] 6A
IOVDD PD3/FD[11] 3B
2k00

24.000MHz PD4/FD[12]
7B 3A
WAKEUP PD5/FD[13] 3C
Y1 R5 PD6/FD[14]
8B 2A
RESET PD7/FD[15] C 3
100k CYPRESS_CY7C68053_56BAXI

D1
D2
D3

R13 Q2
EVALUATION BOARD SCHEMATICS AND ARTWORK

USB_PWR_ON 1
MMBT3904LT1G

C7
22pF
B

Rev. A | Page 10 of 16
1k50

AGND
AGND
GND
GND
GND
GND
GND
GND
GND
C1 BLUE CLEAR
1.0uF E 2

1F
2F
4A
4B
4C

1H
2H
7D
8D
YELLOW CLEAR
YELLOW CLEAR

10k0
R14
R7
R8
R9

Figure 26. Board Schematics Page 1

3V3DD
475R
475R
475R

IOVDD

1
GND 5
2 4
A Y
GND
VCCA
VCCY
3

IOVDD 3V3DD
U4
FXLP34P5X
IOVDD 3V3DD
1
5

C6 C8
2 4 0.10uF
A Y 0.10uF
GND
VCCA
VCCY
3

U5
FXLP34P5X
IOVDD
3V3DD
1
5

2 4
A Y
GND
VCCA
VCCY
3

U6
LOCAL FOR FXLP34
FXLP34P5X
08093-028
Application Note
 5V0DD
5V0DD_USB

1
VCC
ADG721BRMZ
J3 2 DMINUS
D-
U2-A ADG721BRMZ
3 DPLUS J1
USB-MINI-B-SMD D+
U2-B CLATCH2 1 2 CLATCH3
4 SCL
3 4 USB_CLK
Application Note

GND S1 D1
CTRL SDA 5 6
S2 D2 CO U T 7 8 BRD _ RES ET
USB_PWR_ON
IN1 CTRL CCLK 9 10 CDATA
USB_PWR_ON CLATCH1 11 12
IN2 CLATCH4 13 14 CLATCH5

2X5 CUSTOM RIBBON

3V3DD

C2
0.10uF

LOCAL FOR ADG721

Rev. A | Page 11 of 16
5V0DD

Figure 27. Board Schematics Page 2

3V3DD

ADP1711AUJZ-3.3-R7
1 5
IN OUT
3 4
EN BYP
C21 GND C19 + C14
1.0uF 2 U8 1.0uF 10uF
C18
10nF

D4
IOVDD
1V8DD 3V3DD

1V8DD
RED DIFFUSED
ADP1711AUJZ-1.8-R7 S1
3
1 5
IN OUT 2
1
3 4
EN BYP
SPDT
R10 GND +
C17 C13
+ C20 2 U7 1.0uF 10uF
475R C22
15uF 1.0uF
C16
TP1
10nF
08093-029
AN-1006
AN-1006 Application Note
BOARD LAYOUT

08093-026
Figure 28. Board Layout—Top View

08093-027

Figure 29. Board Layout—Bottom View

Rev. A | Page 12 of 16
Application Note AN-1006

BILL OF MATERIALS
Table 2.
Reference Manufacturer
Qty Designator Description Part Number Vendor Vendor Order No.
5 C1, C17, C19 1.0 μF, 10%, multilayer ceramic, 16 V, X7R (0603) EMK107B7105KA-T Digi-Key 587-1241-1-ND
to C21
9 C2 to C6, C8 0.10 μF, 10%, multilayer ceramic, 16 V, X7R (0402) ECJ-0EX1C104K Digi-Key PCC13490CT-ND
to C10, C12
2 C7, C11 22 pF, 5%, multilayer ceramic, 50 V, NP0 (0402) GRM1555C1H220JZ01D Digi-Key 490-1283-1-ND
2 C13, C14 10 μF, 20%, SMD tantalum capacitor, 0805, 6.3 V TCP0J106M8R Digi-Key 511-1447-1-ND
2 C15, C22 15 μF, 20%, SMD tantalum capacitor 0805 6.3 V TCP0J156M8R Digi-Key 511-1448-1-ND
2 C16, C18 10 nF, 5%, multilayer ceramic, 25 V, NP0 (0603) C1608C0G1E103J Digi-Key 445-2664-1-ND
2 D1, D3 LED, yellow clear, 6.0 mcd, 585 nm, 1206 SML-LX1206YC-TR Digi-Key 67-1358-1-ND
1 D2 LED, blue clear, 25 mcd, 470 nm, 1206 SML-LX1206USBC-TR Digi-Key 67-1701-1-ND
1 D4 LED, red diffused, 6.0 mcd, 635 nm, 1206 SML-LX1206IW-TR Digi-Key 67-1003-1-ND
1 J1 Header, 10-way, custom ribbon cable, install RCC-2184-ND Digi-Key RCC-2184-ND
centered on 14-way footprint
1 J2 3-way socket, 2 mm, single row, 1 × 3 25630301RP2 Digi-Key 2563S-03-ND
1 J3 USB, mini Type B receptacle SMD 54819-0572 Digi-Key WM17116CT-ND
1 Q1 PNP Darlington transistor, SOT223 FZT705TA Digi-Key FZT705CT-ND
1 Q2 NPN general-purpose transistor MMBT3904LT1G Digi-Key MMBT3904LT1GOSCT-ND
4 R1 to R4 10.0 kΩ chip resistor, 1%, 63mW, thick film, 0402 MCR01MZPF1002 Digi-Key RHM10.0KLCT-ND
2 R5, R12 100 kΩ chip resistor, 1%, 63 mW, thick film, 0402 MCR01MZPF1003 Digi-Key RHM100KLCT-ND
5 R6 to R10 475 Ω chip resistor, 1%, 63 mW, thick film, 0402 CRCW0402475RFKED Digi-Key 541-475LCT-ND
1 R11 2.00 kΩ chip resistor, 1%, 63 mW, thick film, 0402 ERJ-2RKF2001X Digi-Key P2.00KLCT-ND
1 R13 1.50 kΩ chip resistor, 1%, 63 mW, thick film, 0402 ERJ-2RKF1501X Digi-Key P1.50KLCT-ND
1 R14 10.0 kΩ chip resistor, 1%, 63 mW, thick film, 0402 MCR01MZPF1002 Digi-Key RHM10.0KLCT-ND
1 R15 49.9 Ω chip resistor, 1%, 63 mW, thick film, 0402 MCR01MZPF49R9 Digi-Key RHM49.9LCT-ND
1 S1 SPDT slide switch SMD J hook CAS-120TA Digi-Key CAS120JCT-ND
1 TP1 Mini test point white 0.040 inch hole diameter, 5002 Digi-Key 5002K-ND
0.10 inch × 0.020 inch
1 U1 256 kb I2C, CMOS serial EEPROM 24AA256-I/ST Digi-Key 24AA256-I/ST-ND
1 U2 CMOS, low voltage, 4 Ω dual SPST switch ADG721BRMZ Analog ADG721BRMZ
Devices
1 U3 USB microcontroller, I2C (3) 8-bit ports CY7C68053-56BAXI Arrow CY7C68053-56BAXI
Electronics
3 U4 to U6 Translator, 1-bit, unidirect SC70-5 FXLP34P5X Digi-Key FXLP34P5XCT-ND
1 U7 Adjustable, low dropout voltage regulator, 1.0% ADP1711AUJZ-1.8-R7 Analog ADP1711AUJZ-1.8-R7
Devices
1 U8 Adjustable, low dropout voltage regulator, 1.0% ADP1711AUJZ-3.3-R7 Analog ADP1711AUJZ-3.3-R7
Devices
1 Y1 Crystal, 24.000 MHz, SMT 18 pF, 3.2 mm × 2.5 mm ABM8-24.000MHZ-B2-T Digi-Key 535-9138-1-ND

Rev. A | Page 13 of 16
AN-1006 Application Note

NOTES

Rev. A | Page 14 of 16
Application Note AN-1006

NOTES

Rev. A | Page 15 of 16
AN-1006 Application Note

NOTES

I2C refers to a communications protocol originally developed by Philips Semiconductors (now NXP Semiconductors).

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AN08093-0-4/10(A)

Rev. A | Page 16 of 16