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Motivated by emerging portable applications that demand ultra-low-power hardware to

maximize battery run-time, high-efficiency low-voltage DC-DC conversion is presented as
a key low-power enabler. Recent innovations in low-power digital CMOS design have
assumed that the supply voltage is a free variable and can be set to any arbitrarily low level
with little penalty. This thesis introduces and demonstrates an array of DC-DC converter
design techniques which make this assumption more viable. The primary design challenges
to high-efficiency low-voltage DC-DC converters are summarized. Design techniques at
the power delivery system, individual control system, and circuit levels are described
which help meet the stringent requirements imposed by the portable environment. Design
equations and closed-form expressions for losses are presented. Special design
considerations for the key dynamic voltage scaling enabler, called the dynamic DC-DC
converter are given. The focus throughout is on low-power portable applications, where
small size, low cost, and high energy efficiency are the primary design objectives.



Motivation Current trends in consumer electronics demand progressively lower-voltage

supplies. Portable electronic equipment, such as laptop computers and cellular phones, require
ultra-low-power circuitry to maximize battery run-time. Perhaps the most effective way to
reduce power dissipation and maintain computational throughput in such systems is to run the
digital CMOS circuits at the lowest possible supply voltage and compensate for the resulting
decrease in performance with architectural, logicstyle, circuit, and other technology
optimizations [Chandrakasan94b]. Such optimizations can be performed at design time, where
a well-known computational throughput requirement can be met at some minimum voltage
[Chandrakasan92], or at run-time, dynamically adjusting the supply voltage to trade
performance for energy efficiency [Burd95], [Chandrakasan96], [Wei96], [Kuroda98]. In
either case, this lowpower design strategy assumes that the supply voltage is a free variable
and can be set to any arbitrarily low level with little penalty. In portable electronic systems,
highefficiency low-voltage DC-DC conversion is required to efficiently generate each
lowvoltage supply from a single battery source. 1.1 Motivation 2 Consider, for example, the
multimedia Infopad terminal [Brodersen92], [Sheng92], [Chandrakasan93], [Truman98]. The
custom hardware in the InfoPad terminal, including the digital baseband circuitry, and speech,
pen, and text/graphics I/ O chipset [Chandrakasan94a], is designed to operate at each
component’s optimum supply voltage to minimize its power consumption. Thus, a number of
low-voltage (from 1.5 V to 1.1 V), low-current (as low as 5 mA) DC power supplies must be
supported by a single battery source. Because the system also requires supplies of +/- 5 V and
8 V to power the flat panel display, RF transceiver circuitry, and microprocessor subsystem, a
total of six voltage converters are needed to generate all of the voltages from a single 9 V
battery source. These converters consume 42% of the overall power and 12% of the system
volume of the Infopad [Truman98], and cost as much as 54 dollars1. Voltage regulation as an
interface between the battery source and load can further enhance battery run-time. A circuit
may be designed such that its optimum operating voltage is the end-of-life voltage of a specific

cell, apparently minimizing its power consumption without the use of a DC-DC converter.
This not only makes the circuit design challenging (the voltage of a typical AA-type lithium
ion cell may vary by as much as +/- 20% of its nominal value throughout its discharge), but
because the cell discharge characteristic is not flat, the circuit will consume greater than its
minimum operating power from the cell throughout the majority of its discharge. If a DC-DC
converter is inserted between the cell and the load, and the converter’s output voltage is
maintained down to the end-of-life cell voltage, the circuit will consume its minimum
operating power independent of the cell voltage, substantially extending system run-time (by
as much as 50% for a digital CMOS circuit powered by a single lithium ion cell)
Since battery capacity is limited in any portable electronic device, power minimization is
crucial. DC-DC converters must dissipate minimal energy to extend battery run-time. Power
management schemes are used in most low-power hardware: Unused circuitry is powered-
down and gated clocks are employed to reduce power consumption during idle mode
[Chandrakasan94b], [Ikeda95], [Kunii95]. Such techniques may present severe load variations
(up to several orders of magnitude), and the system may idle for a large fraction of the overall
run-time. This implies the need for a high conversion efficiency not only under full load, but
over a large load variation. Furthermore, in the ultra-low-power applications common to
portable systems, the quiescent operating power (control power) of the regulator must be kept
to an even lower level to ensure that it does not contribute significantly to the overall
dissipation. For example, a multimedia chipset has been demonstrated in [Chandrakasan94a]
which supports speech I/O, pen input and full motion video, and consumes less than 5 mW at
1.1 V. The control circuit for a converter supplying this chipset must have substantially lower
quiescent power. The portability requirement places severe constraints on physical size and
mass. While high-efficiency DC-DC conversion can substantially improve system runtime in
virtually any battery-operated application, this same enhancement of run-time may also be
achieved by simply increasing the capacity of the battery source. However, particularly if
voltage conversion is performed by highly-integrated CMOS converters custom-designed to
their individual loads, their volume will typically be much smaller than the volume of the
additional battery capacity required to achieve the equivalent extension of run-time.

This chapterwillreviewon the basic ofabuck converterand its applications.

The Challenge of Lower-Voltage DC-DC Conversion

There are two fundamentally different classes of application for lower-voltage DC-DC
conversion, each with a unique set of challenges: Low-voltage and high current; and low-
voltage and low-current. While both are summarized below, this thesis is concerned primarily
with applications designed for ultra-low-power hand-held devices where high efficiency is
crucial to maximize battery run-time, and small physical size is of critical importance.

Research Goals and Contributions

The goal of this research is to design and implement DC-DC converters as lowpower
and low-voltage enablers. This includes the development and demonstration of an array of
system- and circuit-level design techniques to increase the usefulness of DC-DC converters in
nearly any portable electronic application. Several key research contributions which address
these goals are highlighted below:
• Developed a series of design techniques which decrease the size, cost, and energy
dissipation of low-voltage DC-DC converters. These include new ideas, such as: Minimum
inductor design; adaptive dead-time control; dynamic transistor sizing; optimal gate-drive
strategies; and ultra-low-power digital PWM control; and the new application of existing ideas:
High-frequency operation; synchronous rectification; soft-switching; and others.
• Demonstrated the concept of adaptive dead-time control with a 6 V to 1.5 V, 500 mA
prototype DC-DC converter
Successfully demonstrated a high-efficiency DC-DC converter with the lowest reported
output voltage and power levels: Greater than 70% efficiency at 0.2 V and less than 1 mW.
• Developed a new class of converter, called a dynamic DC-DC converter, which
enables as much as an order of magnitude battery run-time improvement for a general-purpose
processor system. This included the identification of the key system- and circuit-level design
considerations, and a successful prototype build.


This chapterwillcover topic on buckconverter issues.

2.1 DC to DCconversionmethod

Therearethreetechniquesto convert DC voltage from highervalue to lower value.These

 Voltagedivider

 Linear voltageregulator

 DC-DCconverter(buck)

A comparison will bemadeon the efficiencyofeach method to do

theDCconversion.Consideranapplication that requires100mA at 5V. Thesupplyis
+15V.With a voltage dividercircuit such as in Figure 1,the maximum load is 5V/100mA
=50Ω resistor.For smallerload currents, theequivalent resistor will be larger.The
designreaches 5V across the load forthe maximum loadcurrentrequirement.

Figure1: Voltage divider

Kirchhoff's voltagelaw (KVL)tell that there shouldbe15V– 5V =10Vacrossthe

10Ωresistorand,therefore,wearedrawing 1Afrom the15V supply. Thusthevoltage divider

5V(100mA) 0.5W
100 100 100 3.33%
PIN 15V(1A) 15W

Clearlythe voltage divider is not effectively using input voltage energy.In fac the

circuit is wasting (1A)210Ω =10W in theoneresistorand (5V)2/ 5.56Ω = 4.5W in the other.
Figure2 shows linear voltageregulator using LM317chip.The LM317
worksbycreating1.25Vacrossthe 120 Ω resistor. So the current in 120 Ω
resistor,I120Ω=1.25V/120 Ω =10.4mA. With zero current leaving the bottom of the chip,this
meansthat there is 10.4mAx360 Ω =3.75Vacross the bottom resistor, so that there is
always1.25V +3.75V =5V across theload.
UsingKCL, output current fromLM317,I317(out)=100 mA +10.4 mA.
ThenapplyingKCLto theentire LM317 chip, the inputcurrent must be thesame as theoutput
current orI317(in)=I317(out)=110.4 mA. Wecan then calculate theefficiencyas


Eventhough theefficiencyis better thanvoltagedivider,linearvoltageregulatorarestill

inefficientlyusingthe power supplyenergyandwasting1.656W-0.5W=1.156Win the chip and

Figure3: DC-DC converter

With a buckconverterwith assumingefficiencyof 92%, the required input power fromthe

Thus weareonly“wasting” 0.543W-0.5W=0.043Wand the required input currenthasdropped
toIin=Pin/Vin=0.543W/15V = 36.2 mA. Theconverter is drawingfarless current from the
supplyvoltage with improved efficiency.

2.2 Buckconverter

A buckconverter is astep-down DC to DC converter. ForaDC–DC converter,

inputand output voltagesare both DC.It uses apower semiconductordevice asaswitch
toturn on andoff the DC supplyto theload.
Theswitching action canbe implementedbyaBJT, aMOSFET, or
anIGBT.Figure4 showsa simplifiedblock diagramof abuck converter that acceptsa DC
inputandusespulse-width modulation (PWM) ofswitchingfrequencyto
controltheswitch.An external diode, togetherwith externalinductorand output
capacitor,produces theregulated dcoutput.Buck, orstep downconvertersproduce
anaverage output voltagelowerthan theinput source voltage.

Figure4:Buck converter

2.3 Buckconverter operation

Theoperation ofa buckconverterhappens in twomodes. Thefirst modeiswhenswitchQ

close,and the second oneis whenswitch Q open.

When switch Q closes,current flows from the supplyvoltage Vithrough
the inductor andinto the load,chargingtheinductorbyincreasingits magneticfield and
increasingVo.DiodeD will be on reverse bias, thus blockingthepath forcurrent. An
inductor reduces ripple in current passingthrough it and the output voltagewould
contain less ripplecontentsince the currentthrough the loadresistoris thesameas that of
the inductor. Atthe sametime, the currentthrough the inductorincreases andthe
energystored in theinductor increases.WhenVoreaches the desired value, switchQ is
openand diode Disturned on. Figure 5 shows this mode.

Figure5: Switch Qclosed

When theswitch Qopens, the inductoracts asa source and maintainsthe

currentthrough theload resistor. Duringthis period, the energystoredin theinductor
decreasesand its current falls.Current continues to flow in theinductorthrough the
diodeD as the magnetic fieldcollapses andthe inductordischarges.Beforethe inductor
completelydischarges, diodeD is openand Q is closedand the cyclerepeats.It is
important that thereis continuous conduction through the loadforthiscircuit.Figure 6
shows this mode.

Figure6: Switch Q open

2.4 Buckconverter duty cycle

The ratio ofoutput voltage,Voutto input voltage,Vincan be

adjustedbyvaryingthedutycycle of switch Q. ThelongerQis turned on,the
greaterVoutwill be. Thedutycycle ofQis usuallycalled the converter’sdutycycle.If
theswitches andtheinductorarelossless, Vinis converted to Voutwith no loss
ofpowerand the conversion is 100%efficient.Figure 7 showsvariation ofdutycycle.
Dutycycle is alwaysbeingpresented in percentage value.
A60%dutycycle means thepower is on 60%of thetime andoff 40%of thetime.
Whilea50%dutycycle means thepower is on 50%of thetime andoff 50%of thetime.

Figure7: Dutycycle

2.5 CCM and DCM

Thebuckconvertercanoperate intwo different modes; continuous conduction

mode(CCM) anddiscontinuousconduction mode(DCM).Thedifference between the two
isthat in CCM the current in the inductordoes not fall to zero.
A buckconverteroperates incontinuous modeif the currentthroughthe
inductorneverfallsto zero duringthecommutationcycle.In DCM, thecurrentthroughthe
inductor fallsto zero duringpart oftheperiod.Practically,convertercanoperated in either
operation modes. Figure 8 shows CCM and DCMmode.

Figure8: (a)CCM (b)DCM

2.6 Buckconverter analysis

Theinitial studyofthis circuit utilizes the followingassumptions. Capacitoris

largeenough that theoutput voltagerippleis small relative to its average value.Inductor
islarge enough to ensurethat theinductor currentstayspositive for the
switchingperiod.This is referred to as continuous conduction mode orCCM.
Thisensures that when theswitch isoff, the diodemust be on.
Allcomponentsareinitiallyassumed ideal. The circuit is in
thesteadystate,implyingthatallwaveformsarein factperiodic, ensuringthat theyhavethe
same valueat thebeginningandend ofaswitchingperiod.
Twostateof operation is considered.First,switchQ turn on and D turnoff.
After steadystatecondition has beenreached,switchQwill turn off and D turn on.Figure9
shows thesetwooperations.

Figure 9:Buck converteroperation(a) Qturn on (b)Q turnoff

Byusing Kirchhoff'sVoltage Law(KVL), the voltage across the inductorwhen switchQ is

closed is


So theinductor current increaseduringtheon stateis givenby:

Againfrom Figure7,dt=∆t2=TOFF

So the inductorcurrent increaseduringthe on stateis givenby:

Forsteady-state operation,ΔIL(on)andΔIL(off)must be equal. Orelse, theinductorcurrent

would haveanetincrease or decrease from cycle to cyclewhich would not beasteadystate
condition.Thus, thesetwo equationscan beequatedand solved forVOtoobtain the
continuousconduction mode buck voltageconversion relationship.

And using

This equationdemonstratesthe factthat, output voltageVOis definedwith thedutycycle,

Dfor theconverter. For this explanation, the buckconverter output voltage islowerthan
input voltagebecauseD is anumberbetween 0and 1. Togeneralize (2.11),VQandVD
areneglectedbecausetheyaresmall enough to ignore. Simplified outputvoltagecanbe



This chapterwill summarizeon how the project isdeveloped, from

componentsselection,software selection,

3.1 Componentsselection

Basiccomponents to build asimple buck converter are chosen. TheyareDC inputvoltage

source,controlled switch, diode, filterinductor,filtercapacitor,and loadresistance.
For the switchingaction, severalcomponents must be considered.

These includethe switchto theload and the switchingcontroller. For switch, MOSFETis
chosen.IR2101 is selected to drive the MOSFET. Theinput signal for
thedrivercomefrom PWM
signalgeneratedbyMicrochipPIC18F4550microcontroller.ThisPWM outputis not
capable ofdrivingthe MOSFET.Driver is used to amplifythePWM output and is
connected to thegate of theMOSFET [7].

3.1.1 DCvoltagesource

This is the main DC source for buck converter operation. Fora buckconverter, inputDC
voltage sourceis higher than the output DC voltage. The
buckconverterwillreduceorstep down the higher input voltage to lower output voltage.

3.1.2 Inductor

An inductor is a passiveelementdesigned to store energyin its magnetic field.

Aninductorwill resist thechangein current flowingthrough it.The
currentthroughinductor cannotchange instantaneously.
An idealinductordoes not dissipateenergy. The energystored in it
canbe retrievedat a later time. Theinductortakes power from the circuit when
storingenergyand delivers power to the circuitwhenreturningpreviouslystoredenergy.
A practicalnonideal inductor has a significant resistive component.

This is dueto the fact that theinductoris made ofaconductingmaterial such as

copper,whichhas some resistance. This resistance iscalled the windingresistance,and
itappears in series with theinductance of theinductor. Thepresenceof windingresistance
makes it both an energystoragedevice andan energydissipation device.
Sincethe windingresistanceis usuallyverysmall,it is ignored in most cases.

Thenonidealinductoralso has awindingcapacitance

duetothecapacitivecouplingbetween the conducting coils.Windingcapacitance is
verysmallandcanbe ignored in most cases,except at highfrequencies.

3.1.3 Capacitor

A capacitor is a passiveelementdesigned to store energyin its electricfield.

Thecapacitor resists an abrupt change in the voltageacross it. Thevoltage on
acapacitorcannot change abruptly. Theidealcapacitor doesnot dissipateenergy.It takes
powerfrom thecircuitwhen storingenergyin its field and returnspreviouslystored
energywhendeliveringpower to thecircuit. A real, nonideal capacitor has a parallel-
model leakageresistance. The leakage resistance maybe ashighas 100 MQ and can be
neglectedformost practicalapplications.

3.1.4 Diode

Sincethe current in the inductorcannotchangeinstantaneously,a path must exist forthe

inductorcurrent when the switch is off(open). This path is
providedbythefreewheelingdiode (or catchdiode).
Thepurposeof this diodeis not to rectify, but to directcurrent flow inthe
circuitand to ensurethat thereis alwaysa pathfor the current to flowinto theinductor.It is
also necessarythat this diodeshould be able to turn offrelativelyfast.
Thus the diode enables the converter to convertstored energyin theinductor to theload.

3.1.5 MOSFET

MOSFET is anacronymforMetal Oxide SemiconductorField Effect Transistor and itis

thekeycomponent in highfrequency,highefficiencyswitchingapplicationsacrossthe
MOSFET(eitherN−channel or P−channel)that passes the
voltagesupplyto a specified loadwhen the transistor is on. Theselection ofa
P−channel orN−channelloadswitch depends on thespecific needs of the application.
TheN−channelMOSFET has severaladvantagesoverthe P−channel
MOSFET.Forexample, the N−channelmajoritycarriers(electrons)have ahigher
mobilitythan theP−channel majoritycarriers (holes).For high current applications the
N−channeltransistor is preferred.
3.1.6 IR2101

The IR2101 are high voltage, highspeed power MOSFET andIGBT drivers
withindependent high and low side referenced outputchannels. The logic
inputiscompatible with standardCMOS orLSTTLoutput, down to 3.3V logic.
Theoutputdriversfeature a high pulse current buffer stage designed for minimum
driver cross-conduction. Thefloating channel can beusedto drive an N-channel
powerMOSFET orIGBT in the high sideconfigurationwhich operates up to 600 volts.

555 Timer (NE 555)


The 555 is an integrated circuit implementing a variety of timer and multivibrator

applications. The original name was the SE555/NE555 and was called "The IC Time
Machine". The 555 gets its name from the three 5-kOhm resistors used in typical early
implementations . It is still in wide use, thanks to its ease of use, low price and good
stability. .

The 555 timer is one of the most popular and versatile integrated circuits ever produced.
It includes 23 transistors, 2 diodes and 16 resistors on a silicon chip installed in an 8-pin mini
dual-in-line package (DIP-8). The 556 is a 14-pin DIP that combines two 555s on a single
chip. The 558 is a 16-pin DIP that combines four slightly modified 555s on a single chip
(DIS & THR are connected internally, TR is falling edge sensitive instead of level sensitive).
Also available are ultra-low power versions of the 555 such as the 7555 and TLC555. The
7555 requires slightly different wiring using fewer external cmponents and less power.

The Pins of the 555:

The Power Supply:

Pin 8 is where you connect the positive power supply (Vs) to the 555. This can be any
voltage between 3V and 15V DC, but is commonly 5V DC when working with digital ICs.
Pin 1 is the 0V connection to the power supply.

Trigger and Reset Inputs:

Pin 2 is called the Trigger input as it is this input that sets the output to the high state. Pin 4
is called the Reset input as it is this input that resets the output to the low state. Both pins
may be connected to push buttons to control the operation of the 555. Sometimes the Reset
input is not used in a circuit, in which case it is connected directly to Vs so that unwanted
resetting cannot occur.

Threshold and Discharge:

Pins 6 and 7 (and sometimes the Trigger input, pin 2) are used to set up the timing aspect of
the 555 IC. They are normally connected to a combination of resistors and a capacitor.


Pin 5 can be used to alter the timing aspect of the 555 IC in applications such as frequency


Pin 3 is the digital output of the 555. It can be connected directly to the inputs of other digital
ICs, or it can control other devices with the help of a few extra components.

Internal circuitry of the 555:

The 555 circuit is consisted by two comparators, one ohmic ladder one flip-flop and a
discharging transistor, as it is shown in figure.


. To make the 555 work, a trigger pulse at pin 2 initially sets the 555's internal flip-flop 'on'. It
does so by comparing the input pulse to 1/3 of the supply power to a second comparator. This turns
off the transistor across the timing capacitor and allows the

timing capacitor to start the charge cycle. The 555 stays 'on' until this timing cycle turns it 'off' again
by resetting the control flip-flop. The timing cycle can be made to start over again by applying a
pulse to pin 4 (reset). This turns on the transistor that discharges the timing capacitor, and so
delaying the charge from reaching 2/3 Vcc. In some applications, the reset (pin 4) is connected to the
trigger input (pin 2) so that each new input trigger signal restarts the timing cycle. When the
threshold at pin 2 drops, at the end of a timing cycle, that voltage drop can be used to start a new
timing cycle right away by connecting pin 6 (threshold) to pin 2, the trigger input. This type of system
is called an "astable, free running, oscillator" and is the most common one. If you look at a variety of
diagrams where a 555 is used you notice that in most cases pins 2 and 6 are connected. The 555's
output circuit includes two high current transistors, each capable of handling at least 200mA. One
transistor is connected between the output pin 3 and Vcc, and the other between pin 3 and ground.
This way you can use the output pin 3 to either supply Vcc to your load (source) or provide a ground
for your load (sink). If you have heard mentioning about 'sink' or 'source' this is exactly what it
means. This tester will flash the led's alternately with good 555 under test, because both led's are
driven from the single output pin 3 because of the way the 555 is designed.


Monostable,Astable,Pulse width modulation,schimitt trigger etc

Monostable Application:

In the this application, with the external connections the timer circuit will operate as a single-
shot multivibrator. Here, if the trigger gets a negative pulse, the flip-flop is set, making Q’ high,
truning off the discharge transistor, which then allows the capacitor to be charged up toward VCC.
When the capacitor voltage reaches 2/3VCC, the threshold signal causes the flip-flop to be reset,
discharging the capacitor again. Typical waveforms are shown in Figure 8. It can be seen from the
waveforms that theouputremains low until a trigger signal is received. Then the output goes high
while the capacitor charges and hen goes back low where it remains until another trigger pulse is
received. Hence, the name single-shot. Multiple triggers or continuous low voltage on the trigger
input during charging have no effect, but the trigger signal must go back high again before the flip-
flop can be reset by the threshold signal. Timing is dependent on the time it takes the capacitor to
charge up from a discharged state, or very near zero volts, to 2/3VCC. The charging equation is
vC(t) = VCC(1 - e-t/RC)

Astable Application:

In this both the trigger and threshold inputs are connected directly to the capacitor. There is an
additional resistor, RB, connected between the capacitor and the discharge transistor to slow the
discharge. When the capacitor discharges to 1/3VCC, the trigger comparator switches and sets the flip-
flop which in turn turns off the discharge transistor, allowing the capacitor to start charging up
through both resistors, RA and RB. When the capacitor reaches 2/3VCC, the threshold input causes the
flip-flop to reset which in turn turns on the discharge transistor and the capacitor discharges again.
Thus, the capacitor charges and discharges back and forth between 1/3VCC and 2/3VCC.

Schmitt Trigger:

Shown on the schematic is a secondary output that uses the open collector at the
discharge terminal (Pin 7) of the timer. This output can sink up to 200 milliamps and would
be ideal for driving relays.

The main disadvantage to using this circuit is the the large dead-band (1/3Vcc) between
upper and lower threshold voltages. An optional resistor, R5, can be added to the circuit to
lower and compress the detection voltage range but this only partially alleviates the problem.

The two graphs at the bottom of the diagram show the input voltages at which the output of the
LM555 will change states. The effect that resistor R5 has on the circuit can be seen in the right hand


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