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® 114
INA114
INA
114
Precision
INSTRUMENTATION AMPLIFIER
FEATURES DESCRIPTION
● LOW OFFSET VOLTAGE: 50µV max The INA114 is a low cost, general purpose instrumen-
● LOW DRIFT: 0.25µV/°C max tation amplifier offering excellent accuracy. Its versa-
tile 3-op amp design and small size make it ideal for a
● LOW INPUT BIAS CURRENT: 2nA max
wide range of applications.
● HIGH COMMON-MODE REJECTION:
A single external resistor sets any gain from 1 to 10,000.
115dB min
Internal input protection can withstand up to ±40V
● INPUT OVER-VOLTAGE PROTECTION: without damage.
±40V
The INA114 is laser trimmed for very low offset voltage
● WIDE SUPPLY RANGE: ±2.25 to ±18V (50µV), drift (0.25µV/°C) and high common-mode
● LOW QUIESCENT CURRENT: 3mA max rejection (115dB at G = 1000). It operates with power
● 8-PIN PLASTIC AND SOL-16 supplies as low as ±2.25V, allowing use in battery
operated and single 5V supply systems. Quiescent cur-
rent is 3mA maximum.
APPLICATIONS The INA114 is available in 8-pin plastic and SOL-16
surface-mount packages. Both are specified for the
● BRIDGE AMPLIFIER –40°C to +85°C temperature range.
● THERMOCOUPLE AMPLIFIER
● RTD SENSOR AMPLIFIER
● MEDICAL INSTRUMENTATION
● DATA ACQUISITION
V+
7 (13)
– 2 Over-Voltage INA114
VIN Feedback
(4) Protection
A1
(12)
25kΩ 25kΩ
1 DIP Connected
25kΩ Internally
(2)
6
RG A3 VO
(11)
8 50kΩ
25kΩ G=1+
(15) RG
5
A2 Ref
+ 3 Over-Voltage (10)
VIN 25kΩ 25kΩ
(5) Protection
4 (7)
DIP (SOIC)
V–
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Internet: http://www.burr-brown.com/ • FAXLine: (800) 548-6133 (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
®
SBOS014
SPECIFICATIONS
ELECTRICAL
At TA = +25°C, VS = ±15V, RL = 2kΩ, unless otherwise noted.
INA114BP, BU INA114AP, AU
PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
INPUT
Offset Voltage, RTI
Initial TA = +25°C ±10 + 20/G ±50 + 100/G ±25 + 30/G ±125 + 500/G µV
vs Temperature TA = TMIN to TMAX ±0.1 + 0.5/G ±0.25 + 5/G ±0.25 + 5/G ±1 + 10/G µV/°C
vs Power Supply VS = ±2.25V to ±18V 0.5 + 2/G 3 + 10/G ✻ ✻ µV/V
Long-Term Stability ±0.2 + 0.5/G ✻ µV/mo
Impedance, Differential 1010 || 6 ✻ Ω || pF
Common-Mode 1010 || 6 ✻ Ω || pF
Input Common-Mode Range ±11 ±13.5 ✻ ✻ V
Safe Input Voltage ±40 ✻ V
Common-Mode Rejection VCM = ±10V, ∆RS = 1kΩ
G=1 80 96 75 90 dB
G = 10 96 115 90 106 dB
G = 100 110 120 106 110 dB
G = 1000 115 120 106 110 dB
BIAS CURRENT ±0.5 ±2 ✻ ±5 nA
vs Temperature ±8 ✻ pA/°C
OFFSET CURRENT ±0.5 ±2 ✻ ±5 nA
vs Temperature ±8 ✻ pA/°C
NOISE VOLTAGE, RTI G = 1000, RS = 0Ω
f = 10Hz 15 ✻ nV/√Hz
f = 100Hz 11 ✻ nV/√Hz
f = 1kHz 11 ✻ nV/√Hz
fB = 0.1Hz to 10Hz 0.4 ✻ µVp-p
Noise Current
f=10Hz 0.4 ✻ pA/√Hz
f=1kHz 0.2 ✻ pA/√Hz
fB = 0.1Hz to 10Hz 18 ✻ pAp-p
GAIN
Gain Equation 1 + (50kΩ/RG) ✻ V/V
Range of Gain 1 10000 ✻ ✻ V/V
Gain Error G=1 ±0.01 ±0.05 ✻ ✻ %
G = 10 ±0.02 ±0.4 ✻ ±0.5 %
G = 100 ±0.05 ±0.5 ✻ ±0.7 %
G = 1000 ±0.5 ±1 ✻ ±2 %
Gain vs Temperature G=1 ±2 ±10 ✻ ±10 ppm/°C
50kΩ Resistance(1) ±25 ±100 ✻ ✻ ppm/°C
Nonlinearity G=1 ±0.0001 ±0.001 ✻ ±0.002 % of FSR
G = 10 ±0.0005 ±0.002 ✻ ±0.004 % of FSR
G = 100 ±0.0005 ±0.002 ✻ ±0.004 % of FSR
G = 1000 ±0.002 ±0.01 ✻ ±0.02 % of FSR
OUTPUT
Voltage IO = 5mA, TMIN to TMAX ±13.5 ±13.7 ✻ ✻ V
VS = ±11.4V, RL = 2kΩ ±10 ±10.5 ✻ ✻ V
VS = ±2.25V, RL = 2kΩ ±1 ±1.5 ✻ ✻ V
Load Capacitance Stability 1000 ✻ pF
Short Circuit Current +20/–15 ✻ mA
FREQUENCY RESPONSE
Bandwidth, –3dB G=1 1 ✻ MHz
G = 10 100 ✻ kHz
G = 100 10 ✻ kHz
G = 1000 1 ✻ kHz
Slew Rate VO = ±10V, G = 10 0.3 0.6 ✻ ✻ V/µs
Settling Time, 0.01% G=1 18 ✻ µs
G = 10 20 ✻ µs
G = 100 120 ✻ µs
G = 1000 1100 ✻ µs
Overload Recovery 50% Overdrive 20 ✻ µs
POWER SUPPLY
Voltage Range ±2.25 ±15 ±18 ✻ ✻ ✻ V
Current VIN = 0V ±2.2 ±3 ✻ ✻ mA
TEMPERATURE RANGE
Specification –40 85 ✻ ✻ °C
Operating –40 125 ✻ ✻ °C
θJA 80 ✻ °C/W
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
INA114 2
PIN CONFIGURATIONS ELECTROSTATIC
P Package 8-Pin DIP DISCHARGE SENSITIVITY
Top View
This integrated circuit can be damaged by ESD. Burr-Brown
RG 1 8 RG recommends that all integrated circuits be handled with ap-
V–IN 2 7 V+
propriate precautions. Failure to observe proper handling and
installation procedures can cause damage.
+
V IN 3 6 VO
ESD damage can range from subtle performance degradation
V– 4 5 Ref
to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric
U Package SOL-16 Surface-Mount changes could cause the device not to meet its published
Top View specifications.
NC 1 16 NC
PACKAGE/ORDERING INFORMATION
RG 2 15 RG
PACKAGE
NC 3 14 NC DRAWING TEMPERATURE
PRODUCT PACKAGE NUMBER(1) RANGE
V–IN 4 13 V+
INA114AP 8-Pin Plastic DIP 006 –40°C to +85°C
V+IN 5 12 Feedback
INA114BP 8-Pin Plastic DIP 006 –40°C to +85°C
NC 6 11 VO INA114AU SOL-16 Surface-Mount 211 –40°C to +85°C
INA114BU SOL-16 Surface-Mount 211 –40°C to +85°C
V– 7 10 Ref NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix C of Burr-Brown IC Data Book.
NC 8 9 NC
NOTE: (1) Stresses above these ratings may cause permanent damage.
3 INA114
TYPICAL PERFORMANCE CURVES
At TA = +25°C, VS = ±15V, unless otherwise noted.
100 80 G = 100
60
10
G = 10
40
1 G=1
20
0
10 100 1k 10k 100k 1M 10 100 1k 10k 100k 1M
Frequency (Hz) Frequency (Hz)
10 u
Common-Mode Voltage (V)
+O g
–
VD/2 VO 100
5 +
– G = 1000
VD/2
+ 80
0 VCM G = 100
(Any Gain) 60 G = 10
–5 A3 – Output A3 + Output
G=1
Swing Limit Swing Limit 40
Lim
it
–10 – O ed by by A 1 g
utpu A ited in 20
t Sw 2
ing Lim put Sw
O u t
–15 – 0
–15 –10 –5 0 5 10 15 10 100 1k 10k 100k 1M
Output Voltage (V) Frequency (Hz)
120 G = 100
Power Supply Rejection (dB)
G = 1000
100
100
G=1
G = 10
80
G=1
60 G = 10
10
40 G = 100, 1000
20 G = 1000
BW Limit
0 1
10 100 1k 10k 100k 1M 1 10 100 1k 10k
Frequency (Hz) Frequency (Hz)
INA114 4
TYPICAL PERFORMANCE CURVES (CONT)
At TA = +25°C, VS = ±15V, unless otherwise noted.
1000 4
800 2
600 0
0.01%
400 –2
0.1%
200 –4
0 –6
1 10 100 1000 0 15 30 45 60 75 90 105 120
Gain (V/V) Time from Power Supply Turn-on (s)
2
1 Input Bias Current (mA)
1
±IB
0 0
IOS
–1 G=1
–1
G = 10
–2
G = 100
G = 1000
–2 –3
–40 –15 10 35 60 85 –45 –30 –15 0 15 30 45
Temperature (°C) Differential Overload Voltage (V)
G = 1, 10
Input Bias Current (mA)
One Input 24
1 G = 100
20
Over-Voltage
0 Protection 16
Over-Voltage Normal G = 1000
Protection Operation 12
–1
8
One Input
–2
4
Both Inputs
–3 0
–45 –30 –15 0 15 30 45 10 100 1k 10k 100k 1M
Common-Mode Voltage (V) Frequency (Hz)
5 INA114
TYPICAL PERFORMANCE CURVES (CONT)
At TA = +25°C, VS = ±15V, unless otherwise noted.
0.6
+|ICL|
20
0.4
15
0.2 –|ICL|
0 10
–75 –50 –25 0 25 50 75 100 125 –40 –15 10 35 60 85
Temperature (°C) Temperature (°C)
2.5 100
2.6
2.4 80
2.4 Power Dissipation
2.3 60
2.2 Quiescent Current
2.2 40
2.0 2.1 20
1.8 2.0 0
–75 –50 –25 0 25 50 75 100 125 0 ±3 ±6 ±9 ±12 ±15 ±18
Temperature (°C) Power Supply Voltage (V)
POSITIVE SIGNAL SWING vs TEMPERATUE (RL = 2kΩ) NEGATIVE SIGNAL SWING vs TEMPERATUE (RL = 2kΩ)
16 –16
VS = ±15V VS = ±15V
14 –14
12 –12
VS = ±11.4V
Output Voltage (V)
VS = ±11.4V
10 –10
8 –8
6 –6
4 –4
VS = ±2.25V VS = ±2.25V
2 –2
0 0
–75 –50 –25 0 25 50 75 100 125 –75 –50 –25 0 25 50 75 100 125
Temperature (°C) Temperature (°C)
INA114 6
TYPICAL PERFORMANCE CURVES (CONT)
At TA = +25°C, VS = ±15V, unless otherwise noted.
+10V
+100mV
0 0
–10V –200mV
+10V +200mV
0 0
–10V –200mV
0.1µV/div
1 s/div
7 INA114
APPLICATION INFORMATION
Figure 1 shows the basic connections required for operation ues. The accuracy and temperature coefficient of these
of the INA114. Applications with noisy or high impedance resistors are included in the gain accuracy and drift specifi-
power supplies may require decoupling capacitors close to cations of the INA114.
the device pins as shown. The stability and temperature drift of the external gain
The output is referred to the output reference (Ref) terminal setting resistor, RG, also affects gain. RG’s contribution to
which is normally grounded. This must be a low-impedance gain accuracy and drift can be directly inferred from the gain
connection to assure good common-mode rejection. A resis- equation (1). Low resistor values required for high gain can
tance of 5Ω in series with the Ref pin will cause a typical make wiring resistance important. Sockets add to the wiring
device to degrade to approximately 80dB CMR (G = 1). resistance which will contribute additional gain error (possi-
bly an unstable gain error) in gains of approximately 100 or
SETTING THE GAIN greater.
Gain of the INA114 is set by connecting a single external
resistor, RG: NOISE PERFORMANCE
The INA114 provides very low noise in most applications.
G = 1 + 50 kΩ (1) For differential source impedances less than 1kΩ, the INA103
RG
may provide lower noise. For source impedances greater
Commonly used gains and resistor values are shown in than 50kΩ, the INA111 FET-input instrumentation ampli-
Figure 1. fier may provide lower noise.
The 50kΩ term in equation (1) comes from the sum of the Low frequency noise of the INA114 is approximately
two internal feedback resistors. These are on-chip metal film 0.4µVp-p measured from 0.1 to 10Hz. This is approximately
resistors which are laser trimmed to accurate absolute val- one-tenth the noise of “low noise” chopper-stabilized ampli-
fiers.
V+
0.1µF
– 2 Over-Voltage INA114
VIN
Protection
A1
+ –
25kΩ 25kΩ VO = G • (VIN – VIN )
1 50kΩ
25kΩ G=1+
RG
6
RG A3
+
8
25kΩ Load VO
–
5
A2
+ 3 Over-Voltage
VIN 25kΩ 25kΩ
Protection
4 0.1µF
DESIRED RG NEAREST 1% RG
GAIN (Ω) (Ω) Also drawn in simplified form:
V–
1 No Connection No Connection
2 50.00k 49.9k V– IN
5 12.50k 12.4k INA114 VO
RG
10 5.556k 5.62k
20 2.632k 2.61k V+ IN
Ref
50 1.02k 1.02k
100 505.1 511
200 251.3 249
500 100.2 100
1000 50.05 49.9
2000 25.01 24.9
5000 10.00 10
10000 5.001 4.99
INA114 8
OFFSET TRIMMING
The INA114 is laser trimmed for very low offset voltage and
Microphone,
drift. Most applications require no external offset adjust- Hydrophone INA114
ment. Figure 2 shows an optional circuit for trimming the etc.
output offset voltage. The voltage applied to Ref terminal is
summed at the output. Low impedance must be maintained 47kΩ 47kΩ
at this node to assure good common-mode rejection. This is
achieved by buffering trim voltage with an op amp as
shown.
– Thermocouple INA114
VIN V+
VO
RG INA114
100µA
+ Ref 1/2 REF200 10kΩ
VIN
100Ω
OPA177
±10mV 10kΩ
Adjustment Range INA114
100Ω
9 INA114
current limit behavior. The inputs are protected even if no The output sense connection can be used to sense the output
power supply voltage is present. voltage directly at the load for best accuracy. Figure 5 shows
how to drive a load through series interconnection resis-
OUTPUT VOLTAGE SENSE (SOL-16 package only) tance. Remotely located feedback paths may cause instabil-
ity. This can be generally be eliminated with a high
The surface-mount version of the INA114 has a separate
frequency feedback path through C1. Heavy loads or long
output sense feedback connection (pin 12). Pin 12 must be
lines can be driven by connecting a buffer inside the feed-
connected to the output terminal (pin 11) for proper opera-
back path (Figure 6).
tion. (This connection is made internally on the DIP version
of the INA114.)
V+
G • VD
VCM –
2
INA114
Over-Voltage
Protection
A1
VD 25kΩ 25kΩ 50kΩ
2 G=1+
RG
25kΩ
RG A3 VO = G • VD
25kΩ
VD
2
A2
Over-Voltage
25kΩ 25kΩ
VCM Protection
G • VD
VCM +
2
V–
– Output
VIN C1 –
VIN Output
Sense
1000pF Sense OPA633
RG INA114 RG IL: ±100mA
INA114
+ Ref Ref 180Ω
VIN Load +
VIN RL
FIGURE 5. Remote Load and Ground Sensing. FIGURE 6. Buffered Output for Heavy Loads.
– VO
VIN 22.1kΩ
511Ω INA114
+
VIN 22.1kΩ
Ref
Shield is driven at the
common-mode potential. 100Ω For G = 100
RG = 511Ω // 2(22.1kΩ)
effective RG = 505Ω
OPA602
INA114 10
V+ V+
REF200
Equal line resistance here creates 100µA
a small common-mode voltage
which is rejected by INA114.
1
VO
RTD RG INA114
2
Ref
RZ
3
V+
2
10.0V 6
REF102
R1
R4
27k Ω
80.6k Ω 4
1N4148 (2)
(1) R2 R7
Cu 5.23k Ω 1MΩ VO
INA114
K
Cu Ref
R3 R5
100Ω 50Ω
R6
100Ω
Zero Adj
SEEBECK
ISA COEFFICIENT R2 R4
TYPE MATERIAL (µV/°C) (R3 = 100Ω) (R5 + R6 = 100Ω)
11 INA114
2.8kΩ
VO
LA RG/2 INA114
RA
Ref
2.8kΩ G = 10
390kΩ
1/2
1/2 OPA2604
RL OPA2604 10kΩ
390kΩ
–
+10V VO
VIN RG INA114
+
Ref R1
G = 500 C1
1MΩ
Bridge 0.1µF
RG VO
INA114
100Ω
Ref 1
f–3dB =
OPA602 2πR1C1
= 1.59Hz
FIGURE 11. Bridge Transducer Amplifier. FIGURE 12. AC-Coupled Instrumentation Amplifier.
– VIN
R1 IO = •G
R
VIN RG INA114
+
Ref
IB
A1 IO
Load
A1 IB Error
OPA177 ±1.5nA
OPA602 1pA
OPA128 75fA
INA114 12
IMPORTANT NOTICE
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.