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Features
• Output voltage tolerance ≤ ± 2 %
• Low-drop voltage
• Integrated overtemperature protection
• Reverse polarity protection
• Input voltage up to 42 V P-TO220-5-11
• Overvoltage protection up to 65 V (≤ 400 ms) (P-TO220-5-1)
• Short-circuit proof
• Suitable for use in automotive electronics
• Wide temperature range
• Adjustable reset time
• ESD protection > 4000 V
Functional Description
This device is a 5-V low-drop fixed-voltage regulator.
The maximum input voltage is 42 V (65 V, ≤ 400 ms).
Up to an input voltage of 26 V and for an output current
up to 550 mA it regulates the output voltage within a
2 % accuracy. The short circuit protection limits the P-TO252-5-1 (D-PAK)
output current of more than 650 mA. The device incorporates overvoltage protection
and temperature protection that disables the circuit at unpermissibly high temperatures.
Pin Configuration
(top view)
1 5
RO D
1 5 1 5 Ι GND Q
AEP01922
P-TO252-5-1 (D-PAK)
GND
RO D Ι GND Q
Ι GND Q RO D
AEP01923 AEP02172
1 5
Ι RO D Q
AEP02580
Figure 1
Application Description
The IC regulates an input voltage in the range of 5.5 V < VI < 36 V to VQnom = 5.0 V. Up
to 26 V it produces a regulated output current of more than 550 mA. Above 26 V the
save-operating-area protection allows operation up to 36 V with a regulated output
current of more than 300 mA. Overvoltage protection limits operation at 42 V. The
overvoltage protection hysteresis restores operation if the input voltage has dropped
below 36 V. A reset signal is generated for an output voltage of VQ < 4.5 V. The delay for
power-on reset can be set externally with a capacitor.
Circuit Description
The control amplifier compares a reference voltage, which is kept highly accurate by
resistance adjustment, to a voltage that is proportional to the output voltage and drives
the base of a series transistor via a buffer. Saturation control as a function of the load
current prevents any over-saturation of the power element.
If the output voltage decreases below 4.5 V, an external capacitor CD on pin 4 (D) will be
discharged by the reset generator. If the voltage on this capacitor drops below VDRL, a
reset signal is generated on pin 2 (RO), i.e. reset output is set low. If the output voltage
rises above 4.5 V, CD will be charged with constant current. After the power-on-reset time
the voltage on the capacitor reaches VDU and the reset output will be set high again. The
value of the power-on-reset time can be set within a wide range depending of the
capacitance of CD.
The IC also incorporates a number of internal circuits for protection against:
• Overload
• Overvoltage
• Overtemperature
• Reverse polarity
Temperature Saturation
Control and
Sensor
Protection
Circuit
1 5
Input Output
Control
Amplifier
Buffer 2 Reset
Adjustment Bandgap Reset Output
+
Reference Generator
- 4 Reset
Delay
3
GND AEB01924
Figure 2
Block Diagram
Input
Voltage VI – 42 42 V
Voltage VI 65 V t ≤ 400 ms
Current II internally limited
Reset Output
Voltage VR – 0.3 7 V
Current IR Internally limited
Reset Delay
Voltage VD – 0.3 7 V
Current ID Internally limited
Output
Voltage VQ – 1.0 16 V
Current IQ Internally limited
Ground
Temperatures
Optimum reliability and life time are guaranteed if the junction temperature does not
exceed 125 °C in operating mode. Operation at up to the maximum junction temperature
of 150 °C is possible in principle. Note, however, that operation at the maximum
permitted ratings could affect the reliability of the device.
Operating Range
Thermal Resistance
Characteristics
VI = 13.5 V; – 40 °C ≤ Tj = ≤ 125 °C (unless otherwise specified)
Parameter Symbol Limit Values Unit Test Condition
min. typ. max.
Output voltage VQ 4.90 5.00 5.10 V 5 mA ≤ IQ ≤ 550 mA;
6 V ≤ VI ≤ 26 V
Output voltage VQ 4.90 5.00 5.10 V 26 V ≤ VI ≤ 36 V;
IQ ≤ 300 mA
Output current IQmax 650 850 – mA VQ = 0 V
limiting
Current Iq – 1 1.5 mA IQ = 5 mA
consumption
Iq = II − IQ
Current Iq – 55 75 mA IQ = 550 mA
consumption
Iq = II – IQ
Current Iq – 70 90 mA IQ = 550 mA; VI = 5 V
consumption
Iq = II – IQ
Drop voltage Vdr – 350 700 mV IQ = 550 mA1)
Characteristics (cont’d)
VI = 13.5 V; – 40 °C ≤ Tj = ≤ 125 °C (unless otherwise specified)
Parameter Symbol Limit Values Unit Test Condition
min. typ. max.
Load regulation ∆VQ – 25 50 mV IQ = 5 to 550 mA;
VI = 6 V
Supply voltage ∆VQ – 12 25 mV VI = 6 to 26 V
regulation IQ = 5 mA
Power supply PSRR – 54 – dB fr = 100 Hz;
Ripple rejection Vr = 0.5 VSS
Reset Generator
Overvoltage Protection
ΙΙ 1 5
ΙQ
1000 µF 470 nF 22 µF
TLE 4270G
2
ΙR
VΙ VQ
4 3
ΙD
VR
VD CD Ι GND
AES01925
Figure 3
Test Circuit
1 5
Input 5 V-Output
Figure 4
Application Circuit
VΙ
< t RR
VQ
V RT
dV Ι d
=
V D V DU dt C d
V DRL
td t RR
VR
Figure 5
Time Response
AED01928 AED01929
5.20 12
V V
VQ VQ
5.10 10
V Ι = 13.5 V
5.00 8
4.90 6
R L = 25 Ω
4.80 4
4.70 2
4.60 0
-40 0 40 80 120 C 160 0 2 4 6 8 V 10
Tj VΙ
AED01930 AED01931
1200 1.2
mA A
ΙQ ΙQ
1000 1.0
T j = 25 C
800 0.8
600 0.6
T j = 125 C
400 0.4
200 0.2
0 0
-40 0 40 80 120 C 160 0 10 20 30 40 V 50
Tj VΙ
0 0
0 20 40 60 80 mA 120 0 100 200 300 400 mA 600
ΙQ ΙQ
AED01934 AED01935
120 800
mA mV
Ιq V Dr 700
100
600
80
500
T j = 125 C
60 400
R L = 10 Ω
300
40
200 Tj =25 C
R L = 20 Ω R L = 50 Ω
20
100
0 0
0 10 20 30 40 V 50 0 200 400 600 mA 1000
VΙ ΙQ
3 1.5
2 1.0
1 0.5
0 0
-40 0 40 80 120 C 160 -40 0 40 80 120 C 160
Tj Tj
Package Outlines
P-TO220-5-1
(Plastic Transistor Single Outline)
2.8
15.4 ±0.3
19.5 max
8.8 -0.2
16 ±0.4
8.6 ±0.3
10.2 ±0.3
2.6
1 5
GPT05107
Sorts of Packing
Package outlines for tubes, trays etc. are contained in our
Data Book “Package Information”. Dimensions in mm
P-TO220-5-2
(Plastic Transistor Single Outline)
2.8
15.4 ±0.3
8.8 -0.2
10.9 ±0.2
12.9 ±0.2
1 5
GPT05256
Sorts of Packing
Package outlines for tubes, trays etc. are contained in our
Data Book “Package Information”. Dimensions in mm
P-TO220-5-11
(Plastic Transistor Single Outline)
10 ±0.2
A
9.8 ±0.15
8.5 1) 4.4
3.7-0.15 1.27 ±0.1
1)
15.65 ±0.3
2.8 ±0.2
13.4
17±0.3
9.25 ±0.2
0.05
8.6 ±0.3
10.2 ±0.3
3.7 ±0.3
C
Sorts of Packing
Package outlines for tubes, trays etc. are contained in our
Data Book “Package Information”. Dimensions in mm
P-TO220-5-12
(Plastic Transistor Single Outline)
10 ±0.2
A
9.8 ±0.15 B
1)
8.5 4.4
3.7 -0.15 1.27 ±0.1
1)
15.65 ±0.3
2.8 ±0.2
13.4
17±0.3
9.25 ±0.2
0.05
11±0.5
13 ±0.5
Typical
1) All metal surfaces tin plated, except area of cut.
GPT09065
Sorts of Packing
Package outlines for tubes, trays etc. are contained in our
Data Book “Package Information”. Dimensions in mm
P-TO263-5-1
(Plastic Transistor Single Outline)
10 ±0.2 4.4
9.8 ±0.15 1.27 ±0.1
A B
8.5 1) 0.1
0.05
1±0.3
2.4
9.25 ±0.2
8 1)
(15)
2.7 ±0.3
4.7 ±0.5
0...0.15
5x0.8 ±0.1 0.5 ±0.1
4x1.7
8˚ max.
0.25 M A B 0.1
1)
Typical
GPT09113
All metal surfaces tin plated, except area of cut.
Sorts of Packing
Package outlines for tubes, trays etc. are contained in our
Data Book “Package Information”.
SMD = Surface Mounted Device Dimensions in mm
P-TO220-5-8
(Plastic Transistor Single Outline)
4.6
1.27
10.2 0.2
8.0 2.6
1)
10.1
8.8
3.5
1.5
0.8
1.7 0.4
Sorts of Packing
Package outlines for tubes, trays etc. are contained in our
Data Book “Package Information”.
SMD = Surface Mounted Device Dimensions in mm
P-TO252-5-1
(Plastic Transistor Single Outline)
1 ±0.1
0.8 ±0.15
(4.17)
6.22 -0.2
0...0.15
9.9 ±0.5
0.51 min
0.15 max
per side 5x0.6 ±0.1 0.5 +0.08
-0.04
1.14
0.1
4.56
0.25 M A B GPT09161
Sorts of Packing
Package outlines for tubes, trays etc. are contained in our
Data Book “Package Information”.
SMD = Surface Mounted Device Dimensions in mm